diff options
Diffstat (limited to 'arm9/lib/include')
| -rw-r--r-- | arm9/lib/include/consts.h | 14 | ||||
| -rw-r--r-- | arm9/lib/include/fx.h | 18 | ||||
| -rw-r--r-- | arm9/lib/include/registers.h | 55 |
3 files changed, 56 insertions, 31 deletions
diff --git a/arm9/lib/include/consts.h b/arm9/lib/include/consts.h index c37d6269..b99b4148 100644 --- a/arm9/lib/include/consts.h +++ b/arm9/lib/include/consts.h @@ -6,6 +6,7 @@ #define POKEDIAMOND_CONSTS_H #include "mmap.h" +#include "registers.h" #define HW_PSR_CPU_MODE_MASK 0x1f // CPU mode @@ -13,19 +14,6 @@ #define HW_PSR_DISABLE_IRQ 0x80 // Disable IRQ #define HW_PSR_DISABLE_IRQ_FIQ 0xc0 // Disable FIQ and IRQ -#define HW_REG_BASE 0x04000000 -#define REG_VCOUNT_OFFSET 0x006 -#define REG_VCOUNT_ADDR (HW_REG_BASE + REG_VCOUNT_OFFSET) -#define reg_GX_VCOUNT (*(REGType16v *)REG_VCOUNT_ADDR) - -#define REG_KEYINPUT_OFFSET 0x130 -#define REG_KEYINPUT_ADDR (HW_REG_BASE + REG_KEYINPUT_OFFSET) -#define reg_PAD_KEYINPUT (*(REGType16v *)REG_KEYINPUT_ADDR) - -#define REG_GXSTAT_OFFSET 0x600 -#define REG_GXSTAT_ADDR (HW_REG_BASE + REG_GXSTAT_OFFSET) -#define reg_G3X_GXSTAT (*(REGType32v *)REG_GXSTAT_ADDR) - #define HW_C6_PR_4KB 0x16 #define HW_C6_PR_8KB 0x18 #define HW_C6_PR_16KB 0x1a diff --git a/arm9/lib/include/fx.h b/arm9/lib/include/fx.h index 7e74d079..b1c3aa88 100644 --- a/arm9/lib/include/fx.h +++ b/arm9/lib/include/fx.h @@ -46,24 +46,6 @@ typedef s64 fx64c; #define FX64C_INT_ABS(x) FX_INT_ABS(FX64C, x) #define FX64C_FRAC(x) FX_FRAC(FX64C, x) - -#define HW_REG_DIVCNT 0x04000280 -#define HW_REG_DIV_NUMER 0x04000290 -#define HW_REG_DIV_DENOM 0x04000298 -#define HW_REG_DIV_RESULT 0x040002A0 -#define HW_REG_DIVREM_RESULT 0x040002A8 - -#define HW_REG_SQRTCNT 0x040002B0 -#define HW_REG_SQRT_RESULT 0x040002B4 -#define HW_REG_SQRT_PARAM 0x040002B8 - -#define SETREG16(x, y) ((*(vu16 *)x) = y) -#define SETREG32(x, y) ((*(vu32 *)x) = y) -#define SETREG64(x, y) ((*(vu64 *)x) = y) -#define READREG16(x) (*(vu16 *)x) -#define READREG32(x) (*(vu32 *)x) -#define READREG64(x) (*(vu64 *)x) - #define FX32_MUL(a, b) ((fx32)(((fx64)a * b) >> FX32_INT_SHIFT)) #define FX32_MUL_ADD_MUL(a, b, c, d) ((fx32)(((fx64)a * b + (fx64)c * d) >> FX32_INT_SHIFT)) //the extra term here is for rounding diff --git a/arm9/lib/include/registers.h b/arm9/lib/include/registers.h new file mode 100644 index 00000000..45b36334 --- /dev/null +++ b/arm9/lib/include/registers.h @@ -0,0 +1,55 @@ +// +// Created by red031000 on 2020-05-06. +// + +#ifndef POKEDIAMOND_REGISTERS_H +#define POKEDIAMOND_REGISTERS_H + +#include "types.h" + +#define HW_REG_BASE 0x04000000 +#define REG_VCOUNT_OFFSET 0x006 +#define REG_VCOUNT_ADDR (HW_REG_BASE + REG_VCOUNT_OFFSET) +#define reg_GX_VCOUNT (*(REGType16v *)REG_VCOUNT_ADDR) + +#define REG_KEYINPUT_OFFSET 0x130 +#define REG_KEYINPUT_ADDR (HW_REG_BASE + REG_KEYINPUT_OFFSET) +#define reg_PAD_KEYINPUT (*(REGType16v *)REG_KEYINPUT_ADDR) + +#define REG_DIVCNT_OFFSET 0x280 +#define REG_DIVCNT_ADDR (HW_REG_BASE + REG_DIVCNT_OFFSET) +#define reg_CP_DIVCNT (*(REGType16v *)REG_DIVCNT_ADDR) + +#define REG_DIV_NUMER_OFFSET 0x290 +#define REG_DIV_NUMER_ADDR (HW_REG_BASE + REG_DIV_NUMER_OFFSET) +#define reg_CP_DIV_NUMER (*(REGType64v *)REG_DIV_NUMER_ADDR) + +#define REG_DIV_DENOM_OFFSET 0x298 +#define REG_DIV_DENOM_ADDR (HW_REG_BASE + REG_DIV_DENOM_OFFSET) +#define reg_CP_DIV_DENOM (*(REGType64v *)REG_DIV_DENOM_ADDR) + +#define REG_DIV_RESULT_OFFSET 0x2A0 +#define REG_DIV_RESULT_ADDR (HW_REG_BASE + REG_DIV_RESULT_OFFSET) +#define reg_CP_DIV_RESULT (*(REGType64v *)REG_DIV_RESULT_ADDR) + +#define REG_DIVREM_RESULT_OFFSET 0x2A8 +#define REG_DIVREM_RESULT_ADDR (HW_REG_BASE + REG_DIVREM_RESULT_OFFSET) +#define reg_CP_DIVREM_RESULT (*(REGType64v *)REG_DIVREM_RESULT_ADDR) + +#define REG_SQRTCNT_OFFSET 0x2B0 +#define REG_SQRTCNT_ADDR (HW_REG_BASE + REG_SQRTCNT_OFFSET) +#define reg_CP_SQRTCNT (*(REGType16v *)REG_SQRTCNT_ADDR) + +#define REG_SQRT_RESULT_OFFSET 0x2B4 +#define REG_SQRT_RESULT_ADDR (HW_REG_BASE + REG_SQRT_RESULT_OFFSET) +#define reg_CP_SQRT_RESULT (*(REGType32v *)REG_SQRT_RESULT_ADDR) + +#define REG_SQRT_PARAM_OFFSET 0x2B8 +#define REG_SQRT_PARAM_ADDR (HW_REG_BASE + REG_SQRT_PARAM_OFFSET) +#define reg_CP_SQRT_PARAM (*(REGType64v *)REG_SQRT_PARAM_ADDR) + +#define REG_GXSTAT_OFFSET 0x600 +#define REG_GXSTAT_ADDR (HW_REG_BASE + REG_GXSTAT_OFFSET) +#define reg_G3X_GXSTAT (*(REGType32v *)REG_GXSTAT_ADDR) + +#endif //POKEDIAMOND_REGISTERS_H |