From e5725164d4f47a7ed3cbb811846da4b77417e507 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 11:16:22 -0400 Subject: Split out libc, libmwcc, and libfx --- arm7/global.inc | 6 +- arm9/arm9.lcf | 7 +- arm9/asm/FX_arm9.s | 1991 ++++++ arm9/asm/STD_arm9.s | 17023 ---------------------------------------------- arm9/asm/libc.s | 13882 +++++++++++++++++++++++++++++++++++++ arm9/asm/libmwcc.s | 3149 +++++++++ arm9/asm/unk_02006864.s | 6 +- arm9/asm/unk_020AF030.s | 1990 ------ arm9/global.inc | 130 +- arm9/undefined_syms.txt | 2 + global.inc | 6 +- 11 files changed, 19123 insertions(+), 19069 deletions(-) create mode 100644 arm9/asm/FX_arm9.s create mode 100644 arm9/asm/libc.s create mode 100644 arm9/asm/libmwcc.s diff --git a/arm7/global.inc b/arm7/global.inc index 478abdaa..123bc193 100644 --- a/arm7/global.inc +++ b/arm7/global.inc @@ -2554,8 +2554,8 @@ .extern FUN_020C3910 .extern FUN_020C3980 .extern FUN_020C39CC -.extern FUN_020C3EA4 -.extern FUN_020C3EB0 +.extern MTX_Rot22_ +.extern MTX_ScaleApply22 .extern FUN_020C6034 .extern FUN_020C605C .extern FUN_021D74E0 @@ -3001,7 +3001,7 @@ .extern FX_GetDivResultFx64c .extern FX_Init .extern FX_InvAsync -.extern FX_Modf +.extern FX_Atan2 .extern FX_Sqrt .extern G2S_GetBG0CharPtr .extern G2S_GetBG1CharPtr diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index c5f29baf..58dbe37b 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -27,7 +27,8 @@ SECTIONS { unk_02046030.o (.text) unk_0208AC14.o (.text) unk_020AF030.o (.text) - /* SDK */ + /* Nitro SDK */ + FX_arm9.o (.text) GX_arm9.o (.text) OS_arm9.o (.text) MI_arm9.o (.text) @@ -44,6 +45,10 @@ SECTIONS { CTRDG_arm9.o (.text) MATH_arm9.o (.text) STD_arm9.o (.text) + /* C standard library */ + libc.o (.text) + /* MWCC library */ + libmwcc.o (.text) } > .text .data : AT (0xEC710) { diff --git a/arm9/asm/FX_arm9.s b/arm9/asm/FX_arm9.s new file mode 100644 index 00000000..68dec58c --- /dev/null +++ b/arm9/asm/FX_arm9.s @@ -0,0 +1,1991 @@ + .include "asm/macros.inc" + .include "global.inc" + .section .text + .balign 4, 0 + + arm_func_start MTX_Identity22_ +MTX_Identity22_: ; 0x020C3E8C + mov r1, #0x0 + mov r2, #0x1000 + mov r3, #0x0 + stmia r0!, {r2-r3} + stmia r0!, {r1-r2} + bx lr + + thumb_func_start MTX_Rot22_ +MTX_Rot22_: ; 0x020C3EA4 + str r2, [r0, #0x0] + str r1, [r0, #0x4] + neg r1, r1 + str r1, [r0, #0x8] + str r2, [r0, #0xc] + bx lr + + arm_func_start MTX_ScaleApply22 +MTX_ScaleApply22: ; 0x020C3EB0 + stmdb sp!, {lr} + sub sp, sp, #0x4 + ldr r12, [r0, #0x0] + smull lr, r12, r2, r12 + mov lr, lr, lsr #0xc + orr lr, lr, r12, lsl #0x14 + str lr, [r1, #0x0] + ldr r12, [r0, #0x4] + smull lr, r12, r2, r12 + mov r2, lr, lsr #0xc + orr r2, r2, r12, lsl #0x14 + str r2, [r1, #0x4] + ldr r2, [r0, #0x8] + smull r12, r2, r3, r2 + mov r12, r12, lsr #0xc + orr r12, r12, r2, lsl #0x14 + str r12, [r1, #0x8] + ldr r0, [r0, #0xc] + smull r2, r0, r3, r0 + mov r2, r2, lsr #0xc + orr r2, r2, r0, lsl #0x14 + str r2, [r1, #0xc] + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + + arm_func_start MTX_Identity33_ +MTX_Identity33_: ; 0x020C3F14 + mov r2, #0x1000 + str r2, [r0, #0x20] + mov r3, #0x0 + stmia r0!, {r2-r3} + mov r1, #0x0 + stmia r0!, {r1,r3} + stmia r0!, {r2-r3} + stmia r0!, {r1,r3} + bx lr + + thumb_func_start MTX_RotX33_ +MTX_RotX33_: ; 0x020C3F38 + mov r3, #0x1 + lsl r3, r3, #0xc + str r3, [r0, #0x0] + mov r3, #0x0 + str r3, [r0, #0x4] + str r3, [r0, #0x8] + str r3, [r0, #0xc] + str r2, [r0, #0x10] + str r1, [r0, #0x14] + str r3, [r0, #0x18] + neg r1, r1 + str r1, [r0, #0x1c] + str r2, [r0, #0x20] + bx lr + + thumb_func_start MTX_RotY33_ +MTX_RotY33_: ; 0x020C3F54 + str r2, [r0, #0x0] + str r2, [r0, #0x20] + mov r3, #0x0 + str r3, [r0, #0x4] + str r3, [r0, #0xc] + str r3, [r0, #0x14] + str r3, [r0, #0x1c] + neg r2, r1 + mov r3, #0x1 + lsl r3, r3, #0xc + str r1, [r0, #0x18] + str r2, [r0, #0x8] + str r3, [r0, #0x10] + bx lr + + thumb_func_start MTX_RotZ33_ +MTX_RotZ33_: ; 0x020C3F70 + stmia r0!, {r2} + mov r3, #0x0 + stmia r0!, {r1,r3} + neg r1, r1 + stmia r0!, {r1-r2} + mov r1, #0x1 + lsl r1, r1, #0xc + str r3, [r0, #0x0] + str r3, [r0, #0x4] + str r3, [r0, #0x8] + str r1, [r0, #0xc] + bx lr + + arm_func_start MTX_MultVec33 +MTX_MultVec33: ; 0x020C3F88 + stmdb sp!, {r4-r6,lr} + ldr r12, [r0, #0x4] + ldr r4, [r1, #0xc] + ldr r3, [r0, #0x0] + smull r6, r5, r12, r4 + ldr r4, [r1, #0x0] + ldr r0, [r0, #0x8] + smlal r6, r5, r3, r4 + ldr r4, [r1, #0x18] + smlal r6, r5, r0, r4 + mov r4, r6, lsr #0xc + orr r4, r4, r5, lsl #0x14 + str r4, [r2, #0x0] + ldr r4, [r1, #0x10] + ldr r5, [r1, #0x4] + smull r6, lr, r12, r4 + smlal r6, lr, r3, r5 + ldr r4, [r1, #0x1c] + smlal r6, lr, r0, r4 + mov r4, r6, lsr #0xc + orr r4, r4, lr, lsl #0x14 + str r4, [r2, #0x4] + ldr lr, [r1, #0x14] + ldr r4, [r1, #0x8] + smull r5, lr, r12, lr + smlal r5, lr, r3, r4 + ldr r1, [r1, #0x20] + smlal r5, lr, r0, r1 + mov r0, r5, lsr #0xc + orr r0, r0, lr, lsl #0x14 + str r0, [r2, #0x8] + ldmia sp!, {r4-r6,lr} + bx lr + + arm_func_start MTX_Concat33 +MTX_Concat33: ; 0x020C400C + stmdb sp!, {r4-r9,lr} + sub sp, sp, #0x24 + ldr r5, [r0, #0x4] + ldr r3, [r1, #0xc] + mov r12, r2 + smull r8, r7, r5, r3 + ldr r6, [r0, #0x0] + ldr r3, [r1, #0x0] + cmp r12, r1 + smlal r8, r7, r6, r3 + ldr r4, [r0, #0x8] + ldr r3, [r1, #0x18] + addeq r2, sp, #0x0 + smlal r8, r7, r4, r3 + mov r3, r8, lsr #0xc + orr r3, r3, r7, lsl #0x14 + str r3, [r2, #0x0] + ldr r3, [r1, #0x10] + ldr r7, [r1, #0x4] + smull r9, r8, r5, r3 + smlal r9, r8, r6, r7 + ldr r3, [r1, #0x1c] + add lr, sp, #0x0 + smlal r9, r8, r4, r3 + mov r3, r9, lsr #0xc + orr r3, r3, r8, lsl #0x14 + str r3, [r2, #0x4] + ldr r3, [r1, #0x14] + ldr r7, [r1, #0x8] + smull r9, r8, r5, r3 + smlal r9, r8, r6, r7 + ldr r6, [r1, #0x20] + cmp r2, lr + smlal r9, r8, r4, r6 + mov r4, r9, lsr #0xc + orr r4, r4, r8, lsl #0x14 + str r4, [r2, #0x8] + ldr r4, [r0, #0x10] + ldr r5, [r0, #0xc] + smull r9, r8, r4, r3 + smlal r9, r8, r5, r7 + ldr r3, [r0, #0x14] + addne sp, sp, #0x24 + smlal r9, r8, r3, r6 + mov r6, r9, lsr #0xc + orr r6, r6, r8, lsl #0x14 + str r6, [r2, #0x14] + ldr r6, [r1, #0x10] + ldr r7, [r1, #0x4] + smull r9, r8, r4, r6 + smlal r9, r8, r5, r7 + ldr r6, [r1, #0x1c] + smlal r9, r8, r3, r6 + mov r6, r9, lsr #0xc + orr r6, r6, r8, lsl #0x14 + str r6, [r2, #0x10] + ldr r7, [r1, #0xc] + ldr r6, [r1, #0x0] + smull r9, r8, r4, r7 + smlal r9, r8, r5, r6 + ldr r5, [r1, #0x18] + smlal r9, r8, r3, r5 + mov r3, r9, lsr #0xc + orr r3, r3, r8, lsl #0x14 + str r3, [r2, #0xc] + ldr r4, [r0, #0x1c] + ldr r3, [r0, #0x18] + smull r8, r7, r4, r7 + smlal r8, r7, r3, r6 + ldr r0, [r0, #0x20] + smlal r8, r7, r0, r5 + mov r5, r8, lsr #0xc + orr r5, r5, r7, lsl #0x14 + str r5, [r2, #0x18] + ldr r5, [r1, #0x10] + ldr r6, [r1, #0x4] + smull r8, r5, r4, r5 + smlal r8, r5, r3, r6 + ldr r7, [r1, #0x1c] + smlal r8, r5, r0, r7 + mov r6, r8, lsr #0xc + orr r6, r6, r5, lsl #0x14 + str r6, [r2, #0x1c] + ldr r6, [r1, #0x20] + ldr r5, [r1, #0x8] + ldr r1, [r1, #0x14] + smull r7, r1, r4, r1 + smlal r7, r1, r3, r5 + smlal r7, r1, r0, r6 + mov r0, r7, lsr #0xc + orr r0, r0, r1, lsl #0x14 + str r0, [r2, #0x20] + ldmneia sp!, {r4-r9,lr} + bxne lr + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldr r0, [lr, #0x0] + str r0, [r12, #0x0] + add sp, sp, #0x24 + ldmia sp!, {r4-r9,lr} + bx lr + + arm_func_start MTX_ScaleApply33 +MTX_ScaleApply33: ; 0x020C41A8 + stmdb sp!, {r4,lr} + ldr r4, [r0, #0x0] + ldr r12, [sp, #0x8] + smull lr, r4, r2, r4 + mov lr, lr, lsr #0xc + orr lr, lr, r4, lsl #0x14 + str lr, [r1, #0x0] + ldr r4, [r0, #0x4] + smull lr, r4, r2, r4 + mov lr, lr, lsr #0xc + orr lr, lr, r4, lsl #0x14 + str lr, [r1, #0x4] + ldr lr, [r0, #0x8] + smull r4, lr, r2, lr + mov r2, r4, lsr #0xc + orr r2, r2, lr, lsl #0x14 + str r2, [r1, #0x8] + ldr r2, [r0, #0xc] + smull lr, r2, r3, r2 + mov lr, lr, lsr #0xc + orr lr, lr, r2, lsl #0x14 + str lr, [r1, #0xc] + ldr r2, [r0, #0x10] + smull lr, r2, r3, r2 + mov lr, lr, lsr #0xc + orr lr, lr, r2, lsl #0x14 + str lr, [r1, #0x10] + ldr r2, [r0, #0x14] + smull lr, r2, r3, r2 + mov r3, lr, lsr #0xc + orr r3, r3, r2, lsl #0x14 + str r3, [r1, #0x14] + ldr r2, [r0, #0x18] + smull r3, r2, r12, r2 + mov r3, r3, lsr #0xc + orr r3, r3, r2, lsl #0x14 + str r3, [r1, #0x18] + ldr r2, [r0, #0x1c] + smull r3, r2, r12, r2 + mov r3, r3, lsr #0xc + orr r3, r3, r2, lsl #0x14 + str r3, [r1, #0x1c] + ldr r0, [r0, #0x20] + smull r2, r0, r12, r0 + mov r2, r2, lsr #0xc + orr r2, r2, r0, lsl #0x14 + str r2, [r1, #0x20] + ldmia sp!, {r4,lr} + bx lr + + arm_func_start MTX_Identity43_ +MTX_Identity43_: ; 0x020C426C + mov r2, #0x1000 + mov r3, #0x0 + stmia r0!, {r2-r3} + mov r1, #0x0 + stmia r0!, {r1,r3} + stmia r0!, {r2-r3} + stmia r0!, {r1,r3} + stmia r0!, {r2-r3} + stmia r0!, {r1,r3} + bx lr + + arm_func_start MTX_Copy43To44_ +MTX_Copy43To44_: ; 0x020C4294 + stmdb sp!, {r4} + mov r12, #0x0 + ldmia r0!, {r2-r4} + stmia r1!, {r2-r4,r12} + ldmia r0!, {r2-r4} + stmia r1!, {r2-r4,r12} + ldmia r0!, {r2-r4} + stmia r1!, {r2-r4,r12} + mov r12, #0x1000 + ldmia r0!, {r2-r4} + stmia r1!, {r2-r4,r12} + ldmia sp!, {r4} + bx lr + + thumb_func_start MTX_Scale43_ +MTX_Scale43_: ; 0x020C42C8 + stmia r0!, {r1} + mov r1, #0x0 + str r3, [r0, #0x1c] + mov r3, #0x0 + stmia r0!, {r1,r3} + stmia r0!, {r1-r3} + mov r2, #0x0 + stmia r0!, {r1,r3} + add r0, #0x4 + stmia r0!, {r1-r3} + bx lr + .balign 4 + + thumb_func_start MTX_RotX43_ +MTX_RotX43_: ; 0x020C42E0 + str r1, [r0, #0x14] + neg r1, r1 + str r1, [r0, #0x1c] + mov r1, #0x1 + lsl r1, r1, #0xc + stmia r0!, {r1} + mov r3, #0x0 + mov r1, #0x0 + stmia r0!, {r1,r3} + stmia r0!, {r1-r2} + str r1, [r0, #0x4] + add r0, #0xc + stmia r0!, {r2-r3} + stmia r0!, {r1,r3} + bx lr + .balign 4 + + thumb_func_start MTX_RotY43_ +MTX_RotY43_: ; 0x020C4300 + str r1, [r0, #0x18] + mov r3, #0x0 + stmia r0!, {r2-r3} + neg r1, r1 + stmia r0!, {r1,r3} + mov r1, #0x1 + lsl r1, r1, #0xc + stmia r0!, {r1,r3} + add r0, #0x4 + mov r1, #0x0 + stmia r0!, {r1-r3} + stmia r0!, {r1,r3} + bx lr + .balign 4 + + arm_func_start MTX_MultVec43 +MTX_MultVec43: ; 0x020C431C + stmdb sp!, {r4-r6,lr} + ldr r12, [r0, #0x4] + ldr r4, [r1, #0xc] + ldr r3, [r0, #0x0] + smull r6, r5, r12, r4 + ldr r4, [r1, #0x0] + ldr r0, [r0, #0x8] + smlal r6, r5, r3, r4 + ldr r4, [r1, #0x18] + smlal r6, r5, r0, r4 + mov r4, r6, lsr #0xc + orr r4, r4, r5, lsl #0x14 + str r4, [r2, #0x0] + ldr r5, [r2, #0x0] + ldr r4, [r1, #0x24] + add r4, r5, r4 + str r4, [r2, #0x0] + ldr r4, [r1, #0x10] + ldr r5, [r1, #0x4] + smull r6, lr, r12, r4 + smlal r6, lr, r3, r5 + ldr r4, [r1, #0x1c] + smlal r6, lr, r0, r4 + mov r4, r6, lsr #0xc + orr r4, r4, lr, lsl #0x14 + str r4, [r2, #0x4] + ldr r5, [r2, #0x4] + ldr r4, [r1, #0x28] + add r4, r5, r4 + str r4, [r2, #0x4] + ldr lr, [r1, #0x14] + ldr r4, [r1, #0x8] + smull r5, lr, r12, lr + smlal r5, lr, r3, r4 + ldr r3, [r1, #0x20] + smlal r5, lr, r0, r3 + mov r0, r5, lsr #0xc + orr r0, r0, lr, lsl #0x14 + str r0, [r2, #0x8] + ldr r3, [r2, #0x8] + ldr r0, [r1, #0x2c] + add r0, r3, r0 + str r0, [r2, #0x8] + ldmia sp!, {r4-r6,lr} + bx lr + + arm_func_start MTX_Concat43 +MTX_Concat43: ; 0x020C43D0 + stmdb sp!, {r4-r10,lr} + sub sp, sp, #0x30 + ldr r5, [r0, #0x4] + ldr r3, [r1, #0xc] + mov r12, r2 + smull r8, r7, r5, r3 + ldr r6, [r0, #0x0] + ldr r3, [r1, #0x0] + cmp r12, r1 + smlal r8, r7, r6, r3 + ldr r4, [r0, #0x8] + ldr r3, [r1, #0x18] + addeq r2, sp, #0x0 + smlal r8, r7, r4, r3 + mov r3, r8, lsr #0xc + orr r3, r3, r7, lsl #0x14 + str r3, [r2, #0x0] + ldr r3, [r1, #0x10] + ldr r7, [r1, #0x4] + smull r9, r8, r5, r3 + smlal r9, r8, r6, r7 + ldr r3, [r1, #0x1c] + add lr, sp, #0x0 + smlal r9, r8, r4, r3 + mov r3, r9, lsr #0xc + orr r3, r3, r8, lsl #0x14 + str r3, [r2, #0x4] + ldr r3, [r1, #0x14] + ldr r7, [r1, #0x8] + smull r9, r8, r5, r3 + smlal r9, r8, r6, r7 + ldr r6, [r1, #0x20] + smlal r9, r8, r4, r6 + mov r4, r9, lsr #0xc + orr r4, r4, r8, lsl #0x14 + str r4, [r2, #0x8] + ldr r4, [r0, #0x10] + ldr r5, [r0, #0xc] + smull r9, r8, r4, r3 + smlal r9, r8, r5, r7 + ldr r3, [r0, #0x14] + smlal r9, r8, r3, r6 + mov r6, r9, lsr #0xc + orr r6, r6, r8, lsl #0x14 + str r6, [r2, #0x14] + ldr r6, [r1, #0x10] + ldr r7, [r1, #0x4] + smull r9, r8, r4, r6 + smlal r9, r8, r5, r7 + ldr r6, [r1, #0x1c] + smlal r9, r8, r3, r6 + mov r6, r9, lsr #0xc + orr r6, r6, r8, lsl #0x14 + str r6, [r2, #0x10] + ldr r7, [r1, #0xc] + ldr r8, [r1, #0x0] + smull r10, r9, r4, r7 + smlal r10, r9, r5, r8 + ldr r6, [r1, #0x18] + smlal r10, r9, r3, r6 + mov r3, r10, lsr #0xc + orr r3, r3, r9, lsl #0x14 + str r3, [r2, #0xc] + ldr r4, [r0, #0x1c] + ldr r5, [r0, #0x18] + smull r9, r7, r4, r7 + smlal r9, r7, r5, r8 + ldr r3, [r0, #0x20] + smlal r9, r7, r3, r6 + mov r6, r9, lsr #0xc + orr r6, r6, r7, lsl #0x14 + str r6, [r2, #0x18] + ldr r6, [r1, #0x10] + ldr r7, [r1, #0x4] + smull r9, r6, r4, r6 + smlal r9, r6, r5, r7 + ldr r8, [r1, #0x1c] + smlal r9, r6, r3, r8 + mov r7, r9, lsr #0xc + orr r7, r7, r6, lsl #0x14 + str r7, [r2, #0x1c] + ldr r7, [r1, #0x14] + ldr r6, [r1, #0x8] + smull r9, r8, r4, r7 + smlal r9, r8, r5, r6 + ldr r5, [r1, #0x20] + smlal r9, r8, r3, r5 + mov r3, r9, lsr #0xc + orr r3, r3, r8, lsl #0x14 + str r3, [r2, #0x20] + ldr r4, [r0, #0x28] + ldr r3, [r0, #0x24] + smull r8, r7, r4, r7 + smlal r8, r7, r3, r6 + ldr r0, [r0, #0x2c] + ldr r6, [r1, #0x2c] + smlal r8, r7, r0, r5 + mov r5, r8, lsr #0xc + orr r5, r5, r7, lsl #0x14 + adds r5, r6, r5 + str r5, [r2, #0x2c] + ldr r5, [r1, #0x10] + ldr r6, [r1, #0x4] + smull r8, r5, r4, r5 + smlal r8, r5, r3, r6 + ldr r7, [r1, #0x1c] + ldr r9, [r1, #0x28] + smlal r8, r5, r0, r7 + mov r6, r8, lsr #0xc + orr r6, r6, r5, lsl #0x14 + adds r5, r9, r6 + str r5, [r2, #0x28] + ldr r8, [r1, #0x24] + ldr r6, [r1, #0x18] + ldr r5, [r1, #0x0] + ldr r1, [r1, #0xc] + smull r7, r1, r4, r1 + smlal r7, r1, r3, r5 + smlal r7, r1, r0, r6 + mov r0, r7, lsr #0xc + orr r0, r0, r1, lsl #0x14 + adds r0, r8, r0 + cmp r2, lr + str r0, [r2, #0x24] + addne sp, sp, #0x30 + ldmneia sp!, {r4-r10,lr} + bxne lr + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr, {r0-r3} + stmia r12, {r0-r3} + add sp, sp, #0x30 + ldmia sp!, {r4-r10,lr} + bx lr + + arm_func_start MTX_Inverse43 +MTX_Inverse43: ; 0x020C45F0 + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x5c + mov r10, r0 + ldr r11, [r10, #0x14] + cmp r10, r1 + addeq r9, sp, #0x2c + ldr r3, [r10, #0x18] + ldr r2, [r10, #0xc] + ldr r8, [r10, #0x20] + str r1, [sp, #0x0] + movne r9, r1 + smull r7, r5, r2, r8 + smull r6, r1, r11, r3 + ldr r4, [r10, #0x1c] + subs r12, r7, r6 + ldr r0, [r10, #0x10] + smull r6, lr, r11, r4 + sbc r11, r5, r1 + smull r5, r4, r2, r4 + mov r1, #0x800 + smull r8, r7, r0, r8 + smull r3, r2, r0, r3 + adds r12, r12, r1 + adc r0, r11, #0x0 + subs r8, r8, r6 + sbc r6, r7, lr + adds r7, r8, r1 + adc r11, r6, #0x0 + mov r7, r7, lsr #0xc + mov r8, r12, lsr #0xc + orr r7, r7, r11, lsl #0x14 + orr r8, r8, r0, lsl #0x14 + subs r0, r5, r3 + sbc r12, r4, r2 + ldr r6, [r10, #0x4] + ldr r11, [r10, #0x0] + smull r3, r2, r6, r8 + adds r0, r0, r1 + smull r5, r4, r11, r7 + adc r11, r12, #0x0 + mov r6, r0, lsr #0xc + subs r3, r5, r3 + ldr r0, [r10, #0x8] + orr r6, r6, r11, lsl #0x14 + sbc r2, r4, r2 + smlal r3, r2, r0, r6 + adds r0, r3, r1 + mov r1, r8, asr #0x1f + str r1, [sp, #0x4] + mov r1, r7, asr #0x1f + str r1, [sp, #0x8] + mov r1, r6, asr #0x1f + adc r2, r2, #0x0 + mov r0, r0, lsr #0xc + orrs r0, r0, r2, lsl #0x14 + str r1, [sp, #0xc] + addeq sp, sp, #0x5c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + bxeq lr + bl FX_InvAsync + ldr r1, [r10, #0x8] + ldr r2, [r10, #0x1c] + ldr r11, [r10, #0x10] + smull r0, r4, r2, r1 + smull r3, r2, r11, r1 + ldr r5, [r10, #0x18] + str r2, [sp, #0x18] + str r3, [sp, #0x14] + smull r3, r2, r5, r1 + str r2, [sp, #0x20] + ldr r2, [r10, #0x20] + ldr lr, [r10, #0x4] + str r2, [sp, #0x10] + ldr r5, [sp, #0x10] + str r3, [sp, #0x1c] + smull r12, r5, lr, r5 + subs r0, r12, r0 + ldr r2, [r10, #0xc] + sbc r4, r5, r4 + smull r1, r5, r2, r1 + str r5, [sp, #0x28] + mov r5, r0, lsr #0xc + ldr r11, [r10, #0x14] + orr r5, r5, r4, lsl #0x14 + smull r4, r2, lr, r11 + ldr r0, [sp, #0x14] + ldr r3, [r10, #0x0] + subs r4, r4, r0 + ldr r0, [sp, #0x18] + mov r4, r4, lsr #0xc + sbc r0, r2, r0 + orr r4, r4, r0, lsl #0x14 + ldr r0, [sp, #0x10] + ldr r2, [sp, #0x1c] + smull r12, r0, r3, r0 + subs r2, r12, r2 + ldr r12, [sp, #0x20] + sbc r0, r0, r12 + smull r12, r11, r3, r11 + ldr r3, [sp, #0x28] + subs r1, r12, r1 + sbc r3, r11, r3 + mov r11, r2, lsr #0xc + orr r11, r11, r0, lsl #0x14 + mov r0, r1, lsr #0xc + str r0, [sp, #0x24] + orr r0, r0, r3, lsl #0x14 + str r0, [sp, #0x24] + bl FX_GetDivResult + smull r2, r1, r0, r5 + mov r2, r2, lsr #0xc + orr r2, r2, r1, lsl #0x14 + rsb lr, r2, #0x0 + smull r2, r1, r0, r4 + mov r4, r2, lsr #0xc + orr r4, r4, r1, lsl #0x14 + smull r2, r1, r0, r11 + mov r3, r2, lsr #0xc + orr r3, r3, r1, lsl #0x14 + ldr r1, [sp, #0x24] + umull r11, r5, r0, r7 + smull r2, r1, r0, r1 + mov r2, r2, lsr #0xc + orr r2, r2, r1, lsl #0x14 + ldr r1, [sp, #0x8] + mov r12, r0, asr #0x1f + mla r5, r0, r1, r5 + mla r5, r12, r7, r5 + mov r1, r11, lsr #0xc + orr r1, r1, r5, lsl #0x14 + str r1, [r9, #0x0] + str lr, [r9, #0x4] + str r4, [r9, #0x8] + ldr r1, [sp, #0x4] + umull r5, r4, r0, r8 + mla r4, r0, r1, r4 + mla r4, r12, r8, r4 + mov r1, r5, lsr #0xc + orr r1, r1, r4, lsl #0x14 + rsb r1, r1, #0x0 + str r1, [r9, #0xc] + ldr r1, [sp, #0xc] + rsb r2, r2, #0x0 + str r3, [r9, #0x10] + str r2, [r9, #0x14] + umull r3, r2, r0, r6 + mla r2, r0, r1, r2 + mla r2, r12, r6, r2 + mov r1, r3, lsr #0xc + orr r1, r1, r2, lsl #0x14 + str r1, [r9, #0x18] + ldr r3, [r10, #0x0] + ldr r1, [r10, #0x1c] + ldr r2, [r10, #0x18] + smull r5, r4, r3, r1 + ldr r1, [r10, #0x4] + smull r3, r1, r2, r1 + subs r2, r5, r3 + sbc r1, r4, r1 + mov r2, r2, lsr #0xc + orr r2, r2, r1, lsl #0x14 + smull r2, r1, r0, r2 + mov r2, r2, lsr #0xc + orr r2, r2, r1, lsl #0x14 + rsb r1, r2, #0x0 + str r1, [r9, #0x1c] + ldr r3, [r10, #0x0] + ldr r1, [r10, #0x10] + ldr r2, [r10, #0xc] + smull r5, r4, r3, r1 + ldr r1, [r10, #0x4] + smull r3, r1, r2, r1 + subs r2, r5, r3 + sbc r1, r4, r1 + mov r2, r2, lsr #0xc + orr r2, r2, r1, lsl #0x14 + smull r2, r1, r0, r2 + mov r0, r2, lsr #0xc + orr r0, r0, r1, lsl #0x14 + str r0, [r9, #0x20] + add r0, sp, #0x2c + ldr r2, [r9, #0xc] + ldr r1, [r10, #0x28] + ldr r4, [r9, #0x0] + smull r7, r1, r2, r1 + ldr r3, [r10, #0x24] + ldr r6, [r9, #0x18] + smlal r7, r1, r4, r3 + ldr r5, [r10, #0x2c] + cmp r9, r0 + smlal r7, r1, r6, r5 + mov r2, r7, lsr #0xc + orr r2, r2, r1, lsl #0x14 + rsb r1, r2, #0x0 + str r1, [r9, #0x24] + ldr r2, [r9, #0x10] + ldr r1, [r10, #0x28] + ldr r4, [r9, #0x4] + smull r7, r1, r2, r1 + ldr r3, [r10, #0x24] + ldr r6, [r9, #0x1c] + smlal r7, r1, r4, r3 + ldr r5, [r10, #0x2c] + smlal r7, r1, r6, r5 + mov r2, r7, lsr #0xc + orr r2, r2, r1, lsl #0x14 + rsb r1, r2, #0x0 + str r1, [r9, #0x28] + ldr r1, [r10, #0x28] + ldr r2, [r9, #0x14] + ldr r4, [r9, #0x8] + smull r7, r1, r2, r1 + ldr r3, [r10, #0x24] + ldr r6, [r9, #0x20] + smlal r7, r1, r4, r3 + ldr r5, [r10, #0x2c] + smlal r7, r1, r6, r5 + mov r2, r7, lsr #0xc + orr r2, r2, r1, lsl #0x14 + rsb r1, r2, #0x0 + str r1, [r9, #0x2c] + bne _020C4974 + ldr r1, [sp, #0x0] + bl MI_Copy48B +_020C4974: + mov r0, #0x0 + add sp, sp, #0x5c + ldmia sp!, {r4-r11,lr} + bx lr + + arm_func_start MTX_ScaleApply43 +MTX_ScaleApply43: ; 0x020C4984 + stmdb sp!, {r4-r5,lr} + sub sp, sp, #0x4 + ldr r12, [sp, #0x10] + mov r5, r0 + str r12, [sp, #0x0] + mov r4, r1 + bl MTX_ScaleApply33 + ldr r0, [r5, #0x24] + str r0, [r4, #0x24] + ldr r0, [r5, #0x28] + str r0, [r4, #0x28] + ldr r0, [r5, #0x2c] + str r0, [r4, #0x2c] + add sp, sp, #0x4 + ldmia sp!, {r4-r5,lr} + bx lr + + arm_func_start MTX_Identity44_ +MTX_Identity44_: ; 0x020C49C4 + mov r2, #0x1000 + mov r3, #0x0 + stmia r0!, {r2-r3} + mov r1, #0x0 + stmia r0!, {r1,r3} + stmia r0!, {r1-r3} + stmia r0!, {r1,r3} + stmia r0!, {r1-r3} + stmia r0!, {r1,r3} + stmia r0!, {r1-r2} + bx lr + + arm_func_start MTX_Copy44To43_ +MTX_Copy44To43_: + ldmia r0!, {r2-r3,r12} + add r0, r0, #0x4 + stmia r1!, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + add r0, r0, #0x4 + stmia r1!, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + add r0, r0, #0x4 + stmia r1!, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + add r0, r0, #0x4 + stmia r1!, {r2-r3,r12} + bx lr + + thumb_func_start MTX_RotX44_ +MTX_RotX44_: ; 0x020C4A24 + str r2, [r0, #0x14] + str r2, [r0, #0x28] + str r1, [r0, #0x18] + neg r1, r1 + str r1, [r0, #0x24] + mov r1, #0x1 + mov r2, #0x0 + lsl r1, r1, #0xc + mov r3, #0x0 + stmia r0!, {r1-r3} + stmia r0!, {r2-r3} + add r0, #0x8 + stmia r0!, {r2-r3} + add r0, #0x8 + stmia r0!, {r2-r3} + stmia r0!, {r2-r3} + str r1, [r0, #0x0] + bx lr + + thumb_func_start MTX_RotY44_ +MTX_RotY44_: ; 0x020C4A48 + str r2, [r0, #0x0] + str r2, [r0, #0x28] + str r1, [r0, #0x20] + neg r1, r1 + str r1, [r0, #0x8] + mov r3, #0x1 + mov r1, #0x0 + lsl r3, r3, #0xc + mov r2, #0x0 + str r2, [r0, #0x4] + add r0, #0xc + stmia r0!, {r1-r3} + stmia r0!, {r1-r2} + str r2, [r0, #0x4] + add r0, #0xc + stmia r0!, {r1-r2} + stmia r0!, {r1-r3} + bx lr + + thumb_func_start MTX_RotZ44_ +MTX_RotZ44_: ; 0x020C4A6C + str r2, [r0, #0x0] + str r2, [r0, #0x14] + str r1, [r0, #0x4] + neg r1, r1 + str r1, [r0, #0x10] + mov r3, #0x1 + mov r1, #0x0 + lsl r3, r3, #0xc + mov r2, #0x0 + add r0, #0x8 + stmia r0!, {r1-r2} + add r0, #0x8 + stmia r0!, {r1-r2} + stmia r0!, {r1-r3} + stmia r0!, {r1-r2} + stmia r0!, {r1-r3} + bx lr + .balign 4 + + arm_func_start MTX_Concat44 +MTX_Concat44: ; 0x020C4A90 + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x44 + ldr r5, [r0, #0x4] + ldr r3, [r1, #0x10] + mov r12, r2 + smull r6, r4, r5, r3 + ldr r9, [r0, #0x0] + ldr r3, [r1, #0x0] + cmp r12, r1 + smlal r6, r4, r9, r3 + ldr r10, [r0, #0x8] + ldr r3, [r1, #0x20] + ldr r8, [r0, #0xc] + smlal r6, r4, r10, r3 + ldr r3, [r1, #0x30] + addeq r2, sp, #0x0 + smlal r6, r4, r8, r3 + mov r3, r6, lsr #0xc + orr r3, r3, r4, lsl #0x14 + str r3, [r2, #0x0] + ldr r3, [r1, #0x14] + ldr r4, [r1, #0x4] + smull r7, r6, r5, r3 + smlal r7, r6, r9, r4 + ldr r3, [r1, #0x24] + ldr r4, [r1, #0x34] + smlal r7, r6, r10, r3 + smlal r7, r6, r8, r4 + mov r3, r7, lsr #0xc + orr r3, r3, r6, lsl #0x14 + str r3, [r2, #0x4] + ldr r3, [r1, #0x1c] + ldr r4, [r1, #0xc] + smull r7, r6, r5, r3 + smlal r7, r6, r9, r4 + ldr r3, [r1, #0x2c] + ldr r4, [r1, #0x3c] + smlal r7, r6, r10, r3 + smlal r7, r6, r8, r4 + mov r3, r7, lsr #0xc + orr r3, r3, r6, lsl #0x14 + str r3, [r2, #0xc] + ldr r6, [r1, #0x18] + ldr r7, [r1, #0x8] + smull r4, r3, r5, r6 + smlal r4, r3, r9, r7 + ldr r9, [r1, #0x28] + ldr r5, [r1, #0x38] + smlal r4, r3, r10, r9 + smlal r4, r3, r8, r5 + mov r4, r4, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x8] + ldr r8, [r0, #0x14] + ldr r10, [r0, #0x10] + smull r4, r3, r8, r6 + smlal r4, r3, r10, r7 + ldr r7, [r0, #0x18] + ldr r6, [r0, #0x1c] + smlal r4, r3, r7, r9 + smlal r4, r3, r6, r5 + mov r4, r4, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x18] + ldr r3, [r1, #0x14] + ldr r4, [r1, #0x4] + smull r11, r3, r8, r3 + smlal r11, r3, r10, r4 + ldr r5, [r1, #0x24] + ldr r9, [r1, #0x34] + smlal r11, r3, r7, r5 + smlal r11, r3, r6, r9 + mov r4, r11, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x14] + ldr r3, [r1, #0x1c] + ldr r4, [r1, #0xc] + smull r11, r3, r8, r3 + smlal r11, r3, r10, r4 + ldr r5, [r1, #0x2c] + ldr r9, [r1, #0x3c] + smlal r11, r3, r7, r5 + smlal r11, r3, r6, r9 + mov r4, r11, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x1c] + ldr r9, [r1, #0x10] + ldr r11, [r1, #0x0] + smull r4, r3, r8, r9 + smlal r4, r3, r10, r11 + ldr r5, [r1, #0x20] + ldr r8, [r1, #0x30] + smlal r4, r3, r7, r5 + smlal r4, r3, r6, r8 + mov r4, r4, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x10] + ldr r6, [r0, #0x24] + ldr r7, [r0, #0x20] + smull r4, r3, r6, r9 + smlal r4, r3, r7, r11 + ldr r10, [r0, #0x28] + add lr, sp, #0x0 + smlal r4, r3, r10, r5 + ldr r5, [r0, #0x2c] + cmp r2, lr + smlal r4, r3, r5, r8 + mov r4, r4, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x20] + ldr r3, [r1, #0x14] + ldr r4, [r1, #0x4] + smull r11, r3, r6, r3 + smlal r11, r3, r7, r4 + ldr r8, [r1, #0x24] + ldr r9, [r1, #0x34] + smlal r11, r3, r10, r8 + smlal r11, r3, r5, r9 + mov r4, r11, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x24] + ldr r3, [r1, #0x1c] + ldr r4, [r1, #0xc] + smull r11, r3, r6, r3 + smlal r11, r3, r7, r4 + ldr r8, [r1, #0x2c] + ldr r9, [r1, #0x3c] + smlal r11, r3, r10, r8 + smlal r11, r3, r5, r9 + mov r4, r11, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x2c] + ldr r9, [r1, #0x18] + ldr r8, [r1, #0x8] + smull r4, r3, r6, r9 + smlal r4, r3, r7, r8 + ldr r7, [r1, #0x28] + ldr r6, [r1, #0x38] + smlal r4, r3, r10, r7 + smlal r4, r3, r5, r6 + mov r4, r4, lsr #0xc + orr r4, r4, r3, lsl #0x14 + str r4, [r2, #0x28] + ldr r5, [r0, #0x34] + ldr r4, [r0, #0x30] + smull r10, r9, r5, r9 + ldr r3, [r0, #0x38] + smlal r10, r9, r4, r8 + smlal r10, r9, r3, r7 + ldr r0, [r0, #0x3c] + addne sp, sp, #0x44 + smlal r10, r9, r0, r6 + mov r6, r10, lsr #0xc + orr r6, r6, r9, lsl #0x14 + str r6, [r2, #0x38] + ldr r6, [r1, #0x14] + ldr r7, [r1, #0x4] + smull r10, r6, r5, r6 + smlal r10, r6, r4, r7 + ldr r8, [r1, #0x24] + ldr r9, [r1, #0x34] + smlal r10, r6, r3, r8 + smlal r10, r6, r0, r9 + mov r7, r10, lsr #0xc + orr r7, r7, r6, lsl #0x14 + str r7, [r2, #0x34] + ldr r6, [r1, #0x10] + ldr r7, [r1, #0x0] + smull r10, r6, r5, r6 + smlal r10, r6, r4, r7 + ldr r8, [r1, #0x20] + ldr r9, [r1, #0x30] + smlal r10, r6, r3, r8 + smlal r10, r6, r0, r9 + mov r7, r10, lsr #0xc + orr r7, r7, r6, lsl #0x14 + str r7, [r2, #0x30] + ldr r8, [r1, #0x3c] + ldr r7, [r1, #0x2c] + ldr r6, [r1, #0xc] + ldr r1, [r1, #0x1c] + smull r9, r1, r5, r1 + smlal r9, r1, r4, r6 + smlal r9, r1, r3, r7 + smlal r9, r1, r0, r8 + mov r0, r9, lsr #0xc + orr r0, r0, r1, lsl #0x14 + str r0, [r2, #0x3c] + ldmneia sp!, {r4-r11,lr} + bxne lr + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr!, {r0-r3} + stmia r12!, {r0-r3} + ldmia lr, {r0-r3} + stmia r12, {r0-r3} + add sp, sp, #0x44 + ldmia sp!, {r4-r11,lr} + bx lr + + arm_func_start MTX_TransApply44 +MTX_TransApply44: ; 0x020C4DB4 + stmdb sp!, {r4-r7,lr} + sub sp, sp, #0x4 + mov r7, r0 + mov r6, r1 + mov r5, r2 + mov r4, r3 + cmp r7, r6 + beq _020C4DD8 + bl MI_Copy48B +_020C4DD8: + ldr r0, [r7, #0x10] + ldr r1, [r7, #0x0] + smull r3, r2, r4, r0 + smlal r3, r2, r5, r1 + ldr r0, [sp, #0x18] + ldr r1, [r7, #0x20] + ldr r12, [r7, #0x30] + smlal r3, r2, r0, r1 + mov r1, r3, lsr #0xc + orr r1, r1, r2, lsl #0x14 + add r1, r12, r1 + str r1, [r6, #0x30] + ldr r1, [r7, #0x14] + ldr r2, [r7, #0x4] + smull r12, r3, r4, r1 + smlal r12, r3, r5, r2 + ldr r1, [r7, #0x24] + ldr r2, [r7, #0x34] + smlal r12, r3, r0, r1 + mov r1, r12, lsr #0xc + orr r1, r1, r3, lsl #0x14 + add r1, r2, r1 + str r1, [r6, #0x34] + ldr r1, [r7, #0x18] + ldr r2, [r7, #0x8] + smull r12, r3, r4, r1 + smlal r12, r3, r5, r2 + ldr r1, [r7, #0x28] + ldr r2, [r7, #0x38] + smlal r12, r3, r0, r1 + mov r1, r12, lsr #0xc + orr r1, r1, r3, lsl #0x14 + add r1, r2, r1 + str r1, [r6, #0x38] + ldr r1, [r7, #0x1c] + ldr r2, [r7, #0xc] + smull r12, r3, r4, r1 + smlal r12, r3, r5, r2 + ldr r1, [r7, #0x2c] + ldr r2, [r7, #0x3c] + smlal r12, r3, r0, r1 + mov r0, r12, lsr #0xc + orr r0, r0, r3, lsl #0x14 + add r0, r2, r0 + str r0, [r6, #0x3c] + add sp, sp, #0x4 + ldmia sp!, {r4-r7,lr} + bx lr + + arm_func_start FX_ModS32 +FX_ModS32: ; 0x020C4E98 + stmdb sp!, {lr} + sub sp, sp, #0x4 + ldr ip, _020C4EE0 ; =0x04000280 + mov lr, #0x0 + ldr r3, _020C4EE4 ; =0x04000290 + strh lr, [r12, #0x0] + ldr r2, _020C4EE8 ; =0x04000298 + str r0, [r3, #0x0] + str r1, [r2, #0x0] + str lr, [r2, #0x4] +_020C4EC0: + ldrh r0, [r12, #0x0] + ands r0, r0, #0x8000 + bne _020C4EC0 + ldr r0, _020C4EEC ; =0x040002A8 + ldr r0, [r0, #0x0] + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + .balign 4 +_020C4EE0: .word 0x04000280 +_020C4EE4: .word 0x04000290 +_020C4EE8: .word 0x04000298 +_020C4EEC: .word 0x040002A8 + + arm_func_start FX_DivS32 +FX_DivS32: ; 0x020C4EF0 + stmdb sp!, {lr} + sub sp, sp, #0x4 + ldr ip, _020C4F38 ; =0x04000280 + mov lr, #0x0 + ldr r3, _020C4F3C ; =0x04000290 + strh lr, [r12, #0x0] + ldr r2, _020C4F40 ; =0x04000298 + str r0, [r3, #0x0] + str r1, [r2, #0x0] + str lr, [r2, #0x4] +_020C4F18: + ldrh r0, [r12, #0x0] + ands r0, r0, #0x8000 + bne _020C4F18 + ldr r0, _020C4F44 ; =0x040002A0 + ldr r0, [r0, #0x0] + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + .balign 4 +_020C4F38: .word 0x04000280 +_020C4F3C: .word 0x04000290 +_020C4F40: .word 0x04000298 +_020C4F44: .word 0x040002A0 + + arm_func_start FX_DivAsync +FX_DivAsync: ; 0x020C4F48 + ldr r2, _020C4F74 ; =0x04000280 + mov r12, #0x1 + ldr r3, _020C4F78 ; =0x04000290 + strh r12, [r2, #0x0] + mov r12, #0x0 + str r12, [r3, #0x0] + ldr r2, _020C4F7C ; =0x04000298 + str r0, [r3, #0x4] + str r1, [r2, #0x0] + str r12, [r2, #0x4] + bx lr + .balign 4 +_020C4F74: .word 0x04000280 +_020C4F78: .word 0x04000290 +_020C4F7C: .word 0x04000298 + + arm_func_start FX_GetSqerResult +FX_GetSqerResult: ; 0x020C4F80 + ldr r1, _020C4FA4 ; =0x040002B0 +_020C4F84: + ldrh r0, [r1, #0x0] + ands r0, r0, #0x8000 + bne _020C4F84 + ldr r0, _020C4FA8 ; =0x040002B4 + ldr r0, [r0, #0x0] + add r0, r0, #0x200 + mov r0, r0, lsr #0xa + bx lr + .balign 4 +_020C4FA4: .word 0x040002B0 +_020C4FA8: .word 0x040002B4 + + arm_func_start FX_InvAsync +FX_InvAsync: + ldr r1, _020C4FDC ; =0x04000280 + mov r3, #0x1 + ldr r2, _020C4FE0 ; =0x04000290 + strh r3, [r1, #0x0] + mov r12, #0x0 + str r12, [r2, #0x0] + mov r3, #0x1000 + ldr r1, _020C4FE4 ; =0x04000298 + str r3, [r2, #0x4] + str r0, [r1, #0x0] + str r12, [r1, #0x4] + bx lr + .balign 4 +_020C4FDC: .word 0x04000280 +_020C4FE0: .word 0x04000290 +_020C4FE4: .word 0x04000298 + + arm_func_start FX_GetDivResult +FX_GetDivResult: ; 0x020C4FE8 + ldr r1, _020C501C ; =0x04000280 +_020C4FEC: + ldrh r0, [r1, #0x0] + ands r0, r0, #0x8000 + bne _020C4FEC + ldr r1, _020C5020 ; =0x040002A0 + mov r0, #0x80000 + ldr r2, [r1, #0x0] + ldr r1, [r1, #0x4] + adds r0, r2, r0 + adc r1, r1, #0x0 + mov r0, r0, lsr #0x14 + orr r0, r0, r1, lsl #0xc + bx lr + .balign 4 +_020C501C: .word 0x04000280 +_020C5020: .word 0x040002A0 + + arm_func_start FX_GetDivResultFx64c +FX_GetDivResultFx64c: ; 0x020C5024 + ldr r1, _020C5044 ; =0x04000280 +_020C5028: + ldrh r0, [r1, #0x0] + ands r0, r0, #0x8000 + bne _020C5028 + ldr r1, _020C5048 ; =0x040002A0 + ldr r0, [r1, #0x0] + ldr r1, [r1, #0x4] + bx lr + .balign 4 +_020C5044: .word 0x04000280 +_020C5048: .word 0x040002A0 + + arm_func_start FX_Sqrt +FX_Sqrt: ; 0x020C504C + stmdb sp!, {lr} + sub sp, sp, #0x4 + cmp r0, #0x0 + addle sp, sp, #0x4 + movle r0, #0x0 + ldmleia sp!, {lr} + bxle lr + ldr r2, _020C5094 ; =0x040002B0 + mov r3, #0x1 + strh r3, [r2, #0x0] + ldr r1, _020C5098 ; =0x040002B8 + mov r2, #0x0 + str r2, [r1, #0x0] + str r0, [r1, #0x4] + bl FX_GetSqerResult + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + .balign 4 +_020C5094: .word 0x040002B0 +_020C5098: .word 0x040002B8 + + arm_func_start FX_Inv +FX_Inv: ; 0x020C509C + stmdb sp!, {lr} + sub sp, sp, #0x4 + bl FX_InvAsync + bl FX_GetDivResult + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + + arm_func_start FX_Div +FX_Div: ; 0x020C50B8 + stmdb sp!, {lr} + sub sp, sp, #0x4 + bl FX_DivAsync + bl FX_GetDivResult + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + + arm_func_start VEC_MultAdd +VEC_MultAdd: ; 0x020C50D4 + stmdb sp!, {r4,lr} + ldr r4, [r1, #0x0] + ldr lr, [r2, #0x0] + smull r12, r4, r0, r4 + mov r12, r12, lsr #0xc + orr r12, r12, r4, lsl #0x14 + add r4, lr, r12 + str r4, [r3, #0x0] + ldr r12, [r1, #0x4] + ldr r4, [r2, #0x4] + smull lr, r12, r0, r12 + mov lr, lr, lsr #0xc + orr lr, lr, r12, lsl #0x14 + add r4, r4, lr + str r4, [r3, #0x4] + ldr r1, [r1, #0x8] + ldr r12, [r2, #0x8] + smull r2, r1, r0, r1 + mov r0, r2, lsr #0xc + orr r0, r0, r1, lsl #0x14 + add r0, r12, r0 + str r0, [r3, #0x8] + ldmia sp!, {r4,lr} + bx lr + + arm_func_start VEC_Fx16Normalize +VEC_Fx16Normalize: ; 0x020C5134 + stmdb sp!, {r4-r8,lr} + ldrsh r4, [r0, #0x0] + ldrsh r3, [r0, #0x2] + ldrsh r2, [r0, #0x4] + mul r8, r4, r4 + mul r7, r3, r3 + mul r6, r2, r2 + ldr r2, _020C526C ; =0x04000280 + mov r3, #0x2 + ldr r4, _020C5270 ; =0x04000290 + strh r3, [r2, #0x0] + mov r2, #0x0 + str r2, [r4, #0x0] + mov r5, #0x1000000 + mov r2, r8, asr #0x1f + adds r3, r8, r7 + adc r2, r2, r7, asr #0x1f + adds r7, r3, r6 + adc r6, r2, r6, asr #0x1f + mov r3, r6, lsl #0x2 + ldr r2, _020C5274 ; =0x04000298 + str r5, [r4, #0x4] + str r7, [r2, #0x0] + ldr r5, _020C5278 ; =0x040002B0 + str r6, [r2, #0x4] + mov r4, #0x1 + ldr r2, _020C527C ; =0x040002B8 + strh r4, [r5, #0x0] + mov r4, r7, lsl #0x2 + str r4, [r2, #0x0] + orr r3, r3, r7, lsr #0x1e + str r3, [r2, #0x4] +_020C51B4: + ldrh r2, [r5, #0x0] + ands r2, r2, #0x8000 + bne _020C51B4 + ldr r2, _020C5280 ; =0x040002B4 + ldr r12, [r2, #0x0] + ldr r3, _020C526C ; =0x04000280 +_020C51CC: + ldrh r2, [r3, #0x0] + ands r2, r2, #0x8000 + bne _020C51CC + ldr r7, _020C5284 ; =0x040002A0 + ldrsh r5, [r0, #0x0] + ldr r6, [r7, #0x0] + mov r4, r12, asr #0x1f + umull r3, r2, r6, r12 + mla r2, r6, r4, r2 + ldr r8, [r7, #0x4] + mov r4, r5, asr #0x1f + umull r7, r6, r3, r5 + mov lr, #0x0 + mla r2, r8, r12, r2 + mla r6, r3, r4, r6 + mla r6, r2, r5, r6 + adds r4, r7, lr + adc r4, r6, #0x1000 + mov r4, r4, asr #0xd + strh r4, [r1, #0x0] + ldrsh r5, [r0, #0x2] + umull r6, r12, r3, r5 + mov r4, r5, asr #0x1f + mla r12, r3, r4, r12 + mla r12, r2, r5, r12 + adds r4, r6, lr + adc r4, r12, #0x1000 + mov r4, r4, asr #0xd + strh r4, [r1, #0x2] + ldrsh r12, [r0, #0x4] + umull r5, r4, r3, r12 + mov r0, r12, asr #0x1f + adds r5, r5, lr + mla r4, r3, r0, r4 + mla r4, r2, r12, r4 + adc r0, r4, #0x1000 + mov r0, r0, asr #0xd + strh r0, [r1, #0x4] + ldmia sp!, {r4-r8,lr} + bx lr + .balign 4 +_020C526C: .word 0x04000280 +_020C5270: .word 0x04000290 +_020C5274: .word 0x04000298 +_020C5278: .word 0x040002B0 +_020C527C: .word 0x040002B8 +_020C5280: .word 0x040002B4 +_020C5284: .word 0x040002A0 + + arm_func_start VEC_Normalize +VEC_Normalize: + stmdb sp!, {r4-r8,lr} + ldr r3, [r0, #0x4] + ldr r4, [r0, #0x0] + smull r2, r7, r3, r3 + smlal r2, r7, r4, r4 + ldr r4, [r0, #0x8] + ldr r3, _020C53AC ; =0x04000280 + smlal r2, r7, r4, r4 + mov r6, #0x2 + mov r4, r7, lsl #0x2 + ldr r5, _020C53B0 ; =0x04000290 + strh r6, [r3, #0x0] + mov r3, #0x0 + str r3, [r5, #0x0] + mov r6, #0x1000000 + ldr r3, _020C53B4 ; =0x04000298 + str r6, [r5, #0x4] + str r2, [r3, #0x0] + ldr r6, _020C53B8 ; =0x040002B0 + str r7, [r3, #0x4] + mov r5, #0x1 + ldr r3, _020C53BC ; =0x040002B8 + strh r5, [r6, #0x0] + mov r5, r2, lsl #0x2 + str r5, [r3, #0x0] + orr r4, r4, r2, lsr #0x1e + str r4, [r3, #0x4] +_020C52F4: + ldrh r2, [r6, #0x0] + ands r2, r2, #0x8000 + bne _020C52F4 + ldr r2, _020C53C0 ; =0x040002B4 + ldr r12, [r2, #0x0] + ldr r3, _020C53AC ; =0x04000280 +_020C530C: + ldrh r2, [r3, #0x0] + ands r2, r2, #0x8000 + bne _020C530C + ldr r7, _020C53C4 ; =0x040002A0 + ldr r5, [r0, #0x0] + ldr r6, [r7, #0x0] + mov r4, r12, asr #0x1f + umull r3, r2, r6, r12 + mla r2, r6, r4, r2 + ldr r8, [r7, #0x4] + mov r4, r5, asr #0x1f + umull r7, r6, r3, r5 + mov lr, #0x0 + mla r2, r8, r12, r2 + mla r6, r3, r4, r6 + mla r6, r2, r5, r6 + adds r4, r7, lr + adc r4, r6, #0x1000 + mov r4, r4, asr #0xd + str r4, [r1, #0x0] + ldr r5, [r0, #0x4] + umull r6, r12, r3, r5 + mov r4, r5, asr #0x1f + mla r12, r3, r4, r12 + mla r12, r2, r5, r12 + adds r4, r6, lr + adc r4, r12, #0x1000 + mov r4, r4, asr #0xd + str r4, [r1, #0x4] + ldr r12, [r0, #0x8] + umull r5, r4, r3, r12 + mov r0, r12, asr #0x1f + adds r5, r5, lr + mla r4, r3, r0, r4 + mla r4, r2, r12, r4 + adc r0, r4, #0x1000 + mov r0, r0, asr #0xd + str r0, [r1, #0x8] + ldmia sp!, {r4-r8,lr} + bx lr + .balign 4 +_020C53AC: .word 0x04000280 +_020C53B0: .word 0x04000290 +_020C53B4: .word 0x04000298 +_020C53B8: .word 0x040002B0 +_020C53BC: .word 0x040002B8 +_020C53C0: .word 0x040002B4 +_020C53C4: .word 0x040002A0 + + arm_func_start VEC_Mag +VEC_Mag: + ldr r2, [r0, #0x4] + ldr r3, [r0, #0x0] + smull r12, r1, r2, r2 + smlal r12, r1, r3, r3 + ldr r0, [r0, #0x8] + ldr r3, _020C5424 ; =0x040002B0 + smlal r12, r1, r0, r0 + mov r2, #0x1 + mov r1, r1, lsl #0x2 + ldr r0, _020C5428 ; =0x040002B8 + strh r2, [r3, #0x0] + mov r2, r12, lsl #0x2 + str r2, [r0, #0x0] + orr r1, r1, r12, lsr #0x1e + str r1, [r0, #0x4] +_020C5404: + ldrh r0, [r3, #0x0] + ands r0, r0, #0x8000 + bne _020C5404 + ldr r0, _020C542C ; =0x040002B4 + ldr r0, [r0, #0x0] + add r0, r0, #0x1 + mov r0, r0, asr #0x1 + bx lr + .balign 4 +_020C5424: .word 0x040002B0 +_020C5428: .word 0x040002B8 +_020C542C: .word 0x040002B4 + + arm_func_start VEC_Fx16CrossProduct +VEC_Fx16CrossProduct: ; 0x020C5430 + stmdb sp!, {r4-r6,lr} + ldrsh r4, [r1, #0x4] + ldrsh r12, [r0, #0x2] + ldrsh lr, [r0, #0x0] + ldrsh r3, [r1, #0x2] + ldrsh r6, [r0, #0x4] + ldrsh r1, [r1, #0x0] + mul r5, r12, r4 + mul r0, r6, r3 + sub r0, r5, r0 + add r0, r0, #0x800 + mov r0, r0, asr #0xc + mul r5, r6, r1 + mul r4, lr, r4 + sub r4, r5, r4 + add r4, r4, #0x800 + mul r3, lr, r3 + mul r1, r12, r1 + sub r1, r3, r1 + add r1, r1, #0x800 + strh r0, [r2, #0x0] + mov r0, r4, asr #0xc + strh r0, [r2, #0x2] + mov r0, r1, asr #0xc + strh r0, [r2, #0x4] + ldmia sp!, {r4-r6,lr} + bx lr + + arm_func_start VEC_CrossProduct +VEC_CrossProduct: + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x4 + ldr r12, [r1, #0x8] + ldr r9, [r0, #0x4] + ldr r3, [r0, #0x0] + ldr r11, [r1, #0x4] + ldr r0, [r0, #0x8] + ldr r10, [r1, #0x0] + smull r4, r7, r9, r12 + smull r1, r6, r0, r11 + subs r8, r4, r1 + smull r5, r4, r0, r10 + smull lr, r12, r3, r12 + smull r1, r0, r3, r11 + smull r10, r3, r9, r10 + sbc r6, r7, r6 + mov r9, #0x800 + adds r7, r8, r9 + adc r6, r6, #0x0 + subs r8, r5, lr + sbc r5, r4, r12 + adds r8, r8, r9 + mov r4, r7, lsr #0xc + adc r5, r5, #0x0 + subs r1, r1, r10 + orr r4, r4, r6, lsl #0x14 + mov r6, r8, lsr #0xc + sbc r0, r0, r3 + adds r1, r1, r9 + str r4, [r2, #0x0] + orr r6, r6, r5, lsl #0x14 + adc r0, r0, #0x0 + mov r1, r1, lsr #0xc + str r6, [r2, #0x4] + orr r1, r1, r0, lsl #0x14 + str r1, [r2, #0x8] + add sp, sp, #0x4 + ldmia sp!, {r4-r11,lr} + bx lr + + arm_func_start VEC_Fx16DotProduct +VEC_Fx16DotProduct: ; 0x020C5538 + stmdb sp!, {r4-r5,lr} + sub sp, sp, #0x4 + ldrsh lr, [r0, #0x2] + ldrsh r12, [r1, #0x2] + ldrsh r3, [r0, #0x4] + ldrsh r2, [r1, #0x4] + ldrsh r5, [r0, #0x0] + ldrsh r4, [r1, #0x0] + smulbb r1, lr, r12 + smulbb r0, r3, r2 + smlabb r1, r5, r4, r1 + add r0, r0, #0x800 + adds r2, r1, r0 + mov r1, r1, asr #0x1f + adc r1, r1, r0, asr #0x1f + mov r0, r2, lsr #0xc + orr r0, r0, r1, lsl #0x14 + add sp, sp, #0x4 + ldmia sp!, {r4-r5,lr} + bx lr + + arm_func_start VEC_DotProduct +VEC_DotProduct: + stmdb sp!, {r4,lr} + ldr r3, [r0, #0x4] + ldr r2, [r1, #0x4] + ldr r12, [r0, #0x0] + smull r4, lr, r3, r2 + ldr r2, [r1, #0x0] + ldr r3, [r0, #0x8] + smlal r4, lr, r12, r2 + ldr r1, [r1, #0x8] + mov r0, #0x800 + smlal r4, lr, r3, r1 + adds r0, r4, r0 + adc r1, lr, #0x0 + mov r0, r0, lsr #0xc + orr r0, r0, r1, lsl #0x14 + ldmia sp!, {r4,lr} + bx lr + + arm_func_start VEC_Fx16Add +VEC_Fx16Add: ; 0x020C55CC + ldrsh r12, [r0, #0x0] + ldrsh r3, [r1, #0x0] + add r3, r12, r3 + strh r3, [r2, #0x0] + ldrsh r12, [r0, #0x2] + ldrsh r3, [r1, #0x2] + add r3, r12, r3 + strh r3, [r2, #0x2] + ldrsh r3, [r0, #0x4] + ldrsh r0, [r1, #0x4] + add r0, r3, r0 + strh r0, [r2, #0x4] + bx lr + + arm_func_start VEC_Subtract +VEC_Subtract: ; 0x020C5600 + ldr r12, [r0, #0x0] + ldr r3, [r1, #0x0] + sub r3, r12, r3 + str r3, [r2, #0x0] + ldr r12, [r0, #0x4] + ldr r3, [r1, #0x4] + sub r3, r12, r3 + str r3, [r2, #0x4] + ldr r3, [r0, #0x8] + ldr r0, [r1, #0x8] + sub r0, r3, r0 + str r0, [r2, #0x8] + bx lr + + arm_func_start VEC_Add +VEC_Add: ; 0x020C5634 + ldr r12, [r0, #0x0] + ldr r3, [r1, #0x0] + add r3, r12, r3 + str r3, [r2, #0x0] + ldr r12, [r0, #0x4] + ldr r3, [r1, #0x4] + add r3, r12, r3 + str r3, [r2, #0x4] + ldr r3, [r0, #0x8] + ldr r0, [r1, #0x8] + add r0, r3, r0 + str r0, [r2, #0x8] + bx lr + + arm_func_start FX_Atan2 +FX_Atan2: ; 0x020C5668 + stmdb sp!, {r4,lr} + cmp r0, #0x0 + ble _020C5704 + cmp r1, #0x0 + ble _020C56B4 + cmp r1, r0 + movgt r3, r0 + movgt r4, #0x0 + movgt r0, #0x1 + bgt _020C57C8 + cmp r1, r0 + movlt r3, r1 + movlt r1, r0 + movlt r4, #0x4000 + movlt r0, #0x0 + blt _020C57C8 + mov r0, #0x2000 + ldmia sp!, {r4,lr} + bx lr +_020C56B4: + cmp r1, #0x0 + bge _020C56F8 + rsb r1, r1, #0x0 + cmp r1, r0 + movlt r3, r1 + movlt r1, r0 + movlt r4, #0x4000 + movlt r0, #0x1 + blt _020C57C8 + cmp r1, r0 + movgt r3, r0 + movgt r4, #0x8000 + movgt r0, #0x0 + bgt _020C57C8 + mov r0, #0x6000 + ldmia sp!, {r4,lr} + bx lr +_020C56F8: + mov r0, #0x4000 + ldmia sp!, {r4,lr} + bx lr +_020C5704: + cmp r0, #0x0 + bge _020C57B4 + cmp r1, #0x0 + rsb r2, r0, #0x0 + bge _020C5760 + rsb r1, r1, #0x0 + cmp r1, r2 + movgt r0, #0x8000 + rsbgt r4, r0, #0x0 + movgt r3, r2 + movgt r0, #0x1 + bgt _020C57C8 + cmp r1, r2 + bge _020C5754 + mov r0, #0x4000 + mov r3, r1 + mov r1, r2 + rsb r4, r0, #0x0 + mov r0, #0x0 + b _020C57C8 +_020C5754: + mov r0, #0xa000 + ldmia sp!, {r4,lr} + bx lr +_020C5760: + cmp r1, #0x0 + ble _020C57A8 + cmp r1, r2 + bge _020C5788 + mov r0, #0x4000 + mov r3, r1 + mov r1, r2 + rsb r4, r0, #0x0 + mov r0, #0x1 + b _020C57C8 +_020C5788: + cmp r1, r2 + movgt r4, #0x0 + movgt r3, r2 + movgt r0, r4 + bgt _020C57C8 + mov r0, #0xe000 + ldmia sp!, {r4,lr} + bx lr +_020C57A8: + mov r0, #0xc000 + ldmia sp!, {r4,lr} + bx lr +_020C57B4: + cmp r1, #0x0 + movge r0, #0x0 + movlt r0, #0x8000 + ldmia sp!, {r4,lr} + bx lr +_020C57C8: + cmp r1, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r4,lr} + bxeq lr + cmp r0, #0x0 + beq _020C580C + mov r0, r3 + bl FX_Div + mov r1, r0, asr #0x5 + ldr r0, _020C5838 ; =FX_AtanTable_ + mov r1, r1, lsl #0x1 + ldrsh r0, [r0, r1] + add r0, r4, r0 + mov r0, r0, lsl #0x10 + mov r0, r0, lsr #0x10 + ldmia sp!, {r4,lr} + bx lr +_020C580C: + mov r0, r3 + bl FX_Div + mov r1, r0, asr #0x5 + ldr r0, _020C5838 ; =FX_AtanTable_ + mov r1, r1, lsl #0x1 + ldrsh r0, [r0, r1] + sub r0, r4, r0 + mov r0, r0, lsl #0x10 + mov r0, r0, lsr #0x10 + ldmia sp!, {r4,lr} + bx lr + .balign 4 +_020C5838: .word FX_AtanTable_ + + arm_func_start FX_Atan +FX_Atan: ; 0x020C583C + stmdb sp!, {lr} + sub sp, sp, #0x4 + cmp r0, #0x0 + blt _020C58A4 + cmp r0, #0x1000 + ble _020C5880 + bl FX_Inv + mov r1, r0, asr #0x5 + ldr r0, _020C5924 ; =FX_AtanTable_ + mov r1, r1, lsl #0x1 + ldrsh r0, [r0, r1] + add sp, sp, #0x4 + rsb r0, r0, #0x4000 + mov r0, r0, lsl #0x10 + mov r0, r0, lsr #0x10 + ldmia sp!, {lr} + bx lr +_020C5880: + cmp r0, #0x1000 + movlt r1, r0, asr #0x5 + ldrlt r0, _020C5924 ; =FX_AtanTable_ + movlt r1, r1, lsl #0x1 + ldrlth r0, [r0, r1] + add sp, sp, #0x4 + movge r0, #0x2000 + ldmia sp!, {lr} + bx lr +_020C58A4: + mov r1, #0x1000 + rsb r1, r1, #0x0 + cmp r0, r1 + bge _020C58E4 + rsb r0, r0, #0x0 + bl FX_Inv + mov r1, r0, asr #0x5 + ldr r0, _020C5924 ; =FX_AtanTable_ + mov r1, r1, lsl #0x1 + ldrsh r0, [r0, r1] + add sp, sp, #0x4 + sub r0, r0, #0x4000 + mov r0, r0, lsl #0x10 + mov r0, r0, lsr #0x10 + ldmia sp!, {lr} + bx lr +_020C58E4: + cmp r0, r1 + addle sp, sp, #0x4 + movle r0, #0xe000 + ldmleia sp!, {lr} + bxle lr + rsb r0, r0, #0x0 + mov r1, r0, asr #0x5 + ldr r0, _020C5924 ; =FX_AtanTable_ + mov r1, r1, lsl #0x1 + ldrsh r0, [r0, r1] + rsb r0, r0, #0x0 + mov r0, r0, lsl #0x10 + mov r0, r0, lsr #0x10 + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr + .balign 4 +_020C5924: .word FX_AtanTable_ + + arm_func_start FX_Modf +FX_Modf: ; 0x020C5928 + cmp r0, #0x0 + blt _020C5948 + ldr r2, _020C596C ; =0x7FFFF000 + ldr r3, _020C5970 ; =0x00000FFF + and r2, r0, r2 + str r2, [r1, #0x0] + and r0, r0, r3 + bx lr +_020C5948: + ldr r2, _020C596C ; =0x7FFFF000 + rsb r3, r0, #0x0 + ldr r0, _020C5970 ; =0x00000FFF + and r2, r3, r2 + rsb r2, r2, #0x0 + and r0, r3, r0 + str r2, [r1, #0x0] + rsb r0, r0, #0x0 + bx lr + .balign 4 +_020C596C: .word 0x7FFFF000 +_020C5970: .word 0x00000FFF + + arm_func_start FX_Init +FX_Init: ; 0x020C5974 + bx lr diff --git a/arm9/asm/STD_arm9.s b/arm9/asm/STD_arm9.s index b38ac8e4..39946c46 100644 --- a/arm9/asm/STD_arm9.s +++ b/arm9/asm/STD_arm9.s @@ -92,17026 +92,3 @@ _020DE138: add sp, sp, #0x4 ldmia sp!, {lr} bx lr - - arm_func_start abort -abort: ; 0x020DE14C - stmdb sp!, {r3,lr} - mov r0, #0x1 - bl raise - ldr r1, _020DE16C ; =0x021D6F78 - mov r0, #0x1 - str r0, [r1, #0xc] - bl exit - ldmia sp!, {r3,pc} - .balign 4 -_020DE16C: .word 0x021D6F78 - - arm_func_start exit -exit: ; 0x020DE170 - stmdb sp!, {r4,lr} - ldr r1, _020DE1B8 ; =0x021D6F78 - mov r4, r0 - ldr r0, [r1, #0xc] - cmp r0, #0x0 - bne _020DE1AC - bl __destroy_global_chain - ldr r0, _020DE1B8 ; =0x021D6F78 - ldr r0, [r0, #0x4] - cmp r0, #0x0 - beq _020DE1AC - blx r0 - ldr r0, _020DE1B8 ; =0x021D6F78 - mov r1, #0x0 - str r1, [r0, #0x4] -_020DE1AC: - mov r0, r4 - bl __exit - ldmia sp!, {r4,pc} - .balign 4 -_020DE1B8: .word 0x021D6F78 - - arm_func_start __exit -__exit: ; 0x020DE1BC - stmdb sp!, {r3-r5,lr} - ldr r0, _020DE2CC ; =0x021D70D0 - bl OS_TryLockMutex -_020DE1C8: ; 0x020DE1C8 - cmp r0, #0x0 - bne _020DE1F4 - ldr r0, _020DE2D0 ; =0x021D3498 - ldr r1, _020DE2D4 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020DE2D8 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0x0] - str r2, [r0, #0x0] - b _020DE24C -_020DE1F4: - ldr r0, _020DE2D0 ; =0x021D3498 - ldr r1, _020DE2D4 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, #0x0] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020DE224 - ldr r0, _020DE2D8 ; =0x021D70AC - ldr r1, [r0, #0x0] - add r1, r1, #0x1 - str r1, [r0, #0x0] - b _020DE24C -_020DE224: - ldr r0, _020DE2CC ; =0x021D70D0 - bl OS_LockMutex - ldr r0, _020DE2D0 ; =0x021D3498 - ldr r1, _020DE2D4 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020DE2D8 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0x0] - str r2, [r0, #0x0] -_020DE24C: - ldr r4, _020DE2DC ; =0x021D6F78 - ldr r0, [r4, #0x8] - cmp r0, #0x0 - ble _020DE280 - ldr r5, _020DE2E0 ; =0x021D6F88 -_020DE260: - ldr r0, [r4, #0x8] - sub r1, r0, #0x1 - ldr r0, [r5, r1, lsl #0x2] - str r1, [r4, #0x8] - blx r0 - ldr r0, [r4, #0x8] - cmp r0, #0x0 - bgt _020DE260 -_020DE280: - ldr r0, _020DE2D8 ; =0x021D70AC - ldr r1, [r0, #0x0] - subs r1, r1, #0x1 - str r1, [r0, #0x0] - bne _020DE29C - ldr r0, _020DE2CC ; =0x021D70D0 - bl OS_UnlockMutex -_020DE29C: - ldr r0, _020DE2DC ; =0x021D6F78 - ldr r0, [r0, #0x0] - cmp r0, #0x0 - beq _020DE2BC - blx r0 - ldr r0, _020DE2DC ; =0x021D6F78 - mov r1, #0x0 - str r1, [r0, #0x0] -_020DE2BC: - mov r0, #0x0 - bl fflush - bl _ExitProcess - ldmia sp!, {r3-r5,pc} - .balign 4 -_020DE2CC: .word 0x021D70D0 -_020DE2D0: .word 0x021D3498 -_020DE2D4: .word 0x021D7088 -_020DE2D8: .word 0x021D70AC -_020DE2DC: .word 0x021D6F78 -_020DE2E0: .word 0x021D6F88 - - arm_func_start nan -nan: ; 0x020DE2E4 - ldr r0, _020DE2F4 ; =0x02106B78 - ldr ip, _020DE2F8 ; =_f2d - ldr r0, [r0, #0x0] - bx r12 - .balign 4 -_020DE2F4: .word 0x02106B78 -_020DE2F8: .word _f2d - - arm_func_start __flush_line_buffered_output_files -__flush_line_buffered_output_files: - stmdb sp!, {r3-r9,lr} - ldr r0, _020DE384 ; =0x02106A58 - mov r4, #0x0 - mov r5, #0x1 - mov r8, r0 - mvn r9, #0x0 - mov r7, r4 - mov r6, #0x4c -_020DE31C: - ldr r1, [r0, #0x4] - mov r2, r1, lsl #0x16 - movs r2, r2, lsr #0x1d - beq _020DE35C - mov r1, r1, lsl #0x19 - mov r1, r1, lsr #0x1e - tst r1, #0x1 - beq _020DE35C - ldr r1, [r0, #0x8] - mov r1, r1, lsl #0x1d - mov r1, r1, lsr #0x1d - cmp r1, #0x1 - bne _020DE35C - bl fflush -_020DE354: ; 0x020DE354 - cmp r0, #0x0 - movne r4, r9 -_020DE35C: - cmp r5, #0x3 - movge r0, r7 - bge _020DE374 - mul r0, r5, r6 - add r5, r5, #0x1 - add r0, r8, r0 -_020DE374: - cmp r0, #0x0 - bne _020DE31C - mov r0, r4 - ldmia sp!, {r3-r9,pc} - .balign 4 -_020DE384: .word 0x02106A58 - - arm_func_start __flush_all -__flush_all: ; 0x020DE388 - stmdb sp!, {r3-r9,lr} - ldr r0, _020DE3EC ; =0x02106A58 - mov r4, #0x0 - mov r5, #0x1 - mov r8, r0 - mvn r9, #0x0 - mov r7, r4 - mov r6, #0x4c -_020DE3A8: - ldr r1, [r0, #0x4] - mov r1, r1, lsl #0x16 - movs r1, r1, lsr #0x1d - beq _020DE3C4 - bl fflush -_020DE3BC: ; 0x020DE3BC - cmp r0, #0x0 - movne r4, r9 -_020DE3C4: - cmp r5, #0x3 - movge r0, r7 - bge _020DE3DC - mul r0, r5, r6 - add r5, r5, #0x1 - add r0, r8, r0 -_020DE3DC: - cmp r0, #0x0 - bne _020DE3A8 - mov r0, r4 - ldmia sp!, {r3-r9,pc} - .balign 4 -_020DE3EC: .word 0x02106A58 - - arm_func_start abs -abs: ; 0x020DE3F0 - cmp r0, #0x0 - rsblt r0, r0, #0x0 - bx lr - - arm_func_start __msl_assertion_failed -__msl_assertion_failed: ; 0x020DE3FC - stmdb sp!, {r3-r4,lr} - sub sp, sp, #0x4 - mov r4, r0 - mov lr, r1 - mov r12, r2 - str r3, [sp, #0x0] - ldr r0, _020DE434 ; =0x02106B3C - mov r1, r4 - mov r2, lr - mov r3, r12 - bl printf - bl abort - add sp, sp, #0x4 - ldmia sp!, {r3-r4,pc} - .balign 4 -_020DE434: .word 0x02106B3C - - arm_func_start __convert_from_newlines -__convert_from_newlines: - bx lr - - arm_func_start __convert_to_newlines -__convert_to_newlines: - bx lr - - arm_func_start __prep_buffer -__prep_buffer: - ldr r1, [r0, #0x1c] - str r1, [r0, #0x24] - ldr r3, [r0, #0x20] - str r3, [r0, #0x28] - ldr r2, [r0, #0x18] - ldr r1, [r0, #0x2c] - and r1, r2, r1 - sub r1, r3, r1 - str r1, [r0, #0x28] - ldr r1, [r0, #0x18] - str r1, [r0, #0x34] - bx lr - - arm_func_start __load_buffer -__load_buffer: - stmdb sp!, {r4-r6,lr} - mov r5, r2 - mov r4, r0 - mov r6, r1 - bl __prep_buffer - cmp r5, #0x1 - ldreq r0, [r4, #0x20] - add r2, r4, #0x28 - streq r0, [r4, #0x28] - ldr r0, [r4, #0x0] - ldr r1, [r4, #0x1c] - ldr r3, [r4, #0x48] - ldr r12, [r4, #0x3c] - blx r12 - cmp r0, #0x2 - moveq r1, #0x0 - streq r1, [r4, #0x28] - cmp r6, #0x0 - ldrne r1, [r4, #0x28] - strne r1, [r6, #0x0] - cmp r0, #0x0 - ldmneia sp!, {r4-r6,pc} -_020DE4C8: ; 0x020DE4C8 - ldr r1, [r4, #0x18] - ldr r0, [r4, #0x28] - add r0, r1, r0 - str r0, [r4, #0x18] - ldr r0, [r4, #0x4] - mov r0, r0, lsl #0x13 - movs r0, r0, lsr #0x1f - bne _020DE4F4 - ldr r0, [r4, #0x1c] - add r1, r4, #0x28 - bl __convert_to_newlines -_020DE4F4: - mov r0, #0x0 - ldmia sp!, {r4-r6,pc} - - arm_func_start __flush_buffer -__flush_buffer: - stmdb sp!, {r3-r5,lr} - mov r5, r0 - ldr r2, [r5, #0x24] - ldr r0, [r5, #0x1c] - mov r4, r1 - subs r0, r2, r0 - beq _020DE574 - str r0, [r5, #0x28] - ldr r0, [r5, #0x4] - mov r0, r0, lsl #0x13 - movs r0, r0, lsr #0x1f - bne _020DE538 - ldr r0, [r5, #0x1c] - add r1, r5, #0x28 - bl __convert_from_newlines -_020DE538: - ldr r0, [r5, #0x0] - ldr r1, [r5, #0x1c] - ldr r3, [r5, #0x48] - ldr r12, [r5, #0x40] - add r2, r5, #0x28 - blx r12 - cmp r4, #0x0 - ldrne r1, [r5, #0x28] - strne r1, [r4, #0x0] - cmp r0, #0x0 - ldmneia sp!, {r3-r5,pc} -_020DE564: ; 0x020DE564 - ldr r1, [r5, #0x18] - ldr r0, [r5, #0x28] - add r0, r1, r0 - str r0, [r5, #0x18] -_020DE574: - mov r0, r5 - bl __prep_buffer -_020DE57C: ; 0x020DE57C - mov r0, #0x0 - ldmia sp!, {r3-r5,pc} - - arm_func_start fread -fread: ; 0x020DE584 - stmdb sp!, {r4-r10,lr} - ldr r4, _020DE67C ; =0x02106A58 - mov r7, r3 - cmp r7, r4 - moveq r6, #0x2 - mov r10, r0 - movne r6, #0x5 - mov r0, #0x18 - mul r4, r6, r0 - ldr r5, _020DE680 ; =0x021D70D0 - mov r9, r1 - add r0, r5, r4 - mov r8, r2 - bl OS_TryLockMutex -_020DE5BC: ; 0x020DE5BC - cmp r0, #0x0 - bne _020DE5E8 - ldr r0, _020DE684 ; =0x021D3498 - ldr r2, _020DE688 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DE68C ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] - b _020DE640 -_020DE5E8: - ldr r0, _020DE684 ; =0x021D3498 - ldr r1, _020DE688 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, r6, lsl #0x2] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020DE618 - ldr r1, _020DE68C ; =0x021D70AC - ldr r0, [r1, r6, lsl #0x2] - add r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - b _020DE640 -_020DE618: - add r0, r5, r4 - bl OS_LockMutex - ldr r0, _020DE684 ; =0x021D3498 - ldr r2, _020DE688 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DE68C ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] -_020DE640: - mov r0, r10 - mov r1, r9 - mov r2, r8 - mov r3, r7 - bl __fread - ldr r1, _020DE68C ; =0x021D70AC - mov r7, r0 - ldr r0, [r1, r6, lsl #0x2] - subs r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - bne _020DE674 - add r0, r5, r4 - bl OS_UnlockMutex -_020DE674: - mov r0, r7 - ldmia sp!, {r4-r10,pc} - .balign 4 -_020DE67C: .word 0x02106A58 -_020DE680: .word 0x021D70D0 -_020DE684: .word 0x021D3498 -_020DE688: .word 0x021D7088 -_020DE68C: .word 0x021D70AC - - arm_func_start __fread -__fread: ; 0x020DE690 - stmdb sp!, {r3-r10,lr} - sub sp, sp, #0x4 - mov r7, r3 - mov r9, r0 - mov r8, r1 - mov r0, r7 - mov r1, #0x0 - mov r4, r2 - bl fwide -_020DE6B4: ; 0x020DE6B4 - cmp r0, #0x0 - bne _020DE6C8 - mov r0, r7 - mvn r1, #0x0 - bl fwide -_020DE6C8: - muls r4, r8, r4 - beq _020DE6EC - ldrb r0, [r7, #0xd] - cmp r0, #0x0 - bne _020DE6EC - ldr r1, [r7, #0x4] - mov r0, r1, lsl #0x16 - movs r0, r0, lsr #0x1d - bne _020DE6F8 -_020DE6EC: - add sp, sp, #0x4 - mov r0, #0x0 - ldmia sp!, {r3-r10,pc} -_020DE6F8: - mov r0, r1, lsl #0x13 - movs r0, r0, lsr #0x1f - movne r0, r1, lsl #0x19 - movne r0, r0, lsr #0x1e - ldr r1, [r7, #0x8] - cmpne r0, #0x2 - mov r6, #0x1 - mov r0, r1, lsl #0x1d - movne r6, #0x0 - movs r0, r0, lsr #0x1d - bne _020DE74C - ldr r0, [r7, #0x4] - mov r0, r0, lsl #0x1b - mov r0, r0, lsr #0x1d - tst r0, #0x1 - beq _020DE74C - bic r0, r1, #0x7 - orr r0, r0, #0x2 - str r0, [r7, #0x8] - mov r0, #0x0 - str r0, [r7, #0x28] -_020DE74C: - ldr r0, [r7, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x2 - bhs _020DE778 - mov r0, #0x1 - strb r0, [r7, #0xd] - mov r0, #0x0 - add sp, sp, #0x4 - str r0, [r7, #0x28] - ldmia sp!, {r3-r10,pc} -_020DE778: - ldr r0, [r7, #0x4] - mov r0, r0, lsl #0x19 - mov r0, r0, lsr #0x1e - tst r0, #0x1 - beq _020DE7B0 - bl __flush_line_buffered_output_files -_020DE790: ; 0x020DE790 - cmp r0, #0x0 - beq _020DE7B0 - mov r0, #0x1 - strb r0, [r7, #0xd] - mov r0, #0x0 - add sp, sp, #0x4 - str r0, [r7, #0x28] - ldmia sp!, {r3-r10,pc} -_020DE7B0: - cmp r4, #0x0 - mov r5, #0x0 - beq _020DE874 - ldr r0, [r7, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x3 - blo _020DE874 - mov r10, r5 -_020DE7D4: - mov r0, r7 - mov r1, r10 - bl fwide - cmp r0, #0x1 - ldr r0, [r7, #0x8] - bne _020DE808 - mov r0, r0, lsl #0x1d - add r0, r7, r0, lsr #0x1c - ldrh r0, [r0, #0xe] - add r5, r5, #0x2 - sub r4, r4, #0x2 - strh r0, [r9], #0x2 - b _020DE820 -_020DE808: - mov r0, r0, lsl #0x1d - add r0, r7, r0, lsr #0x1d - ldrb r0, [r0, #0xf] - add r5, r5, #0x1 - sub r4, r4, #0x1 - strb r0, [r9], #0x1 -_020DE820: - ldr r1, [r7, #0x8] - cmp r4, #0x0 - mov r0, r1, lsl #0x1d - mov r0, r0, lsr #0x1d - sub r0, r0, #0x1 - bic r1, r1, #0x7 - and r0, r0, #0x7 - orr r0, r1, r0 - str r0, [r7, #0x8] - beq _020DE85C - ldr r0, [r7, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x3 - bhs _020DE7D4 -_020DE85C: - ldr r0, [r7, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x2 - ldreq r0, [r7, #0x30] - streq r0, [r7, #0x28] -_020DE874: - cmp r4, #0x0 - beq _020DE938 - ldr r0, [r7, #0x28] - cmp r0, #0x0 - cmpeq r6, #0x0 - beq _020DE938 - mov r10, #0x0 -_020DE890: - ldr r0, [r7, #0x28] - cmp r0, #0x0 - bne _020DE8E4 - mov r0, r7 - mov r1, r10 - mov r2, r10 - bl __load_buffer -_020DE8AC: ; 0x020DE8AC - cmp r0, #0x0 - beq _020DE8E4 - cmp r0, #0x1 - mov r0, #0x1 - streqb r0, [r7, #0xd] - beq _020DE8D4 - ldr r1, [r7, #0x8] - bic r1, r1, #0x7 - str r1, [r7, #0x8] - strb r0, [r7, #0xc] -_020DE8D4: - mov r0, #0x0 - str r0, [r7, #0x28] - mov r4, #0x0 - b _020DE938 -_020DE8E4: - ldr r0, [r7, #0x28] - str r0, [sp, #0x0] - cmp r0, r4 - strhi r4, [sp, #0x0] - ldr r1, [r7, #0x24] - ldr r2, [sp, #0x0] - mov r0, r9 - bl memcpy - ldr r2, [sp, #0x0] - ldr r0, [r7, #0x24] - subs r4, r4, r2 - add r0, r0, r2 - str r0, [r7, #0x24] - ldr r1, [r7, #0x28] - ldr r0, [sp, #0x0] - add r9, r9, r2 - sub r0, r1, r0 - add r5, r5, r2 - str r0, [r7, #0x28] - cmpne r6, #0x0 - bne _020DE890 -_020DE938: - cmp r4, #0x0 - beq _020DE9C4 - cmp r6, #0x0 - bne _020DE9C4 - ldr r6, [r7, #0x1c] - ldr r10, [r7, #0x20] - add r1, sp, #0x0 - str r9, [r7, #0x1c] - mov r0, r7 - mov r2, #0x1 - str r4, [r7, #0x20] - bl __load_buffer -_020DE968: ; 0x020DE968 - cmp r0, #0x0 - beq _020DE9A4 - cmp r0, #0x1 - mov r0, #0x1 - bne _020DE98C - strb r0, [r7, #0xd] - mov r0, #0x0 - str r0, [r7, #0x28] - b _020DE9A4 -_020DE98C: - ldr r1, [r7, #0x8] - bic r1, r1, #0x7 - str r1, [r7, #0x8] - strb r0, [r7, #0xc] - mov r0, #0x0 - str r0, [r7, #0x28] -_020DE9A4: - ldr r1, [sp, #0x0] - mov r0, r7 - str r6, [r7, #0x1c] - str r10, [r7, #0x20] - add r5, r5, r1 - bl __prep_buffer -_020DE9BC: ; 0x020DE9BC - mov r0, #0x0 - str r0, [r7, #0x28] -_020DE9C4: - mov r0, r5 - mov r1, r8 - bl _u32_div_f - add sp, sp, #0x4 - ldmia sp!, {r3-r10,pc} - - arm_func_start __fwrite -__fwrite: - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x8 - mov r9, r3 - mov r10, r0 - str r1, [sp, #0x0] - mov r0, r9 - mov r1, #0x0 - mov r4, r2 - bl fwide -_020DE9FC: ; 0x020DE9FC - cmp r0, #0x0 - bne _020DEA10 - mov r0, r9 - mvn r1, #0x0 - bl fwide -_020DEA10: - ldr r0, [sp, #0x0] - muls r5, r0, r4 - beq _020DEA38 - ldrb r0, [r9, #0xd] - cmp r0, #0x0 - bne _020DEA38 - ldr r1, [r9, #0x4] - mov r0, r1, lsl #0x16 - movs r0, r0, lsr #0x1d - bne _020DEA44 -_020DEA38: - add sp, sp, #0x8 - mov r0, #0x0 - ldmia sp!, {r3-r11,pc} -_020DEA44: - mov r0, r1, lsl #0x13 - movs r0, r0, lsr #0x1f - movne r0, r1, lsl #0x19 - movne r0, r0, lsr #0x1e - cmpne r0, #0x2 - ldr r1, [r9, #0x8] - cmpne r0, #0x1 - mov r8, #0x1 - mov r0, r1, lsl #0x1d - movne r8, #0x0 - movs r0, r0, lsr #0x1d - bne _020DEA9C - ldr r0, [r9, #0x4] - mov r0, r0, lsl #0x1b - mov r0, r0, lsr #0x1d - tst r0, #0x2 - beq _020DEA9C - bic r0, r1, #0x7 - orr r1, r0, #0x1 - mov r0, r9 - str r1, [r9, #0x8] - bl __prep_buffer -_020DEA9C: - ldr r0, [r9, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x1 - beq _020DEAC8 - mov r0, #0x1 - strb r0, [r9, #0xd] - mov r0, #0x0 - add sp, sp, #0x8 - str r0, [r9, #0x28] - ldmia sp!, {r3-r11,pc} -_020DEAC8: - cmp r5, #0x0 - mov r6, #0x0 - beq _020DEBF0 - ldr r0, [r9, #0x1c] - ldr r2, [r9, #0x24] - cmp r2, r0 - cmpeq r8, #0x0 - beq _020DEBF0 - ldr r1, [r9, #0x20] - sub r0, r2, r0 - sub r0, r1, r0 - str r0, [r9, #0x28] - mov r11, #0xa - mov r4, #0x0 -_020DEB00: - ldr r0, [r9, #0x28] - mov r7, r4 - str r0, [sp, #0x4] - cmp r0, r5 - strhi r5, [sp, #0x4] - ldr r0, [r9, #0x4] - mov r0, r0, lsl #0x19 - mov r0, r0, lsr #0x1e - cmp r0, #0x1 - bne _020DEB50 - ldr r2, [sp, #0x4] - cmp r2, #0x0 - beq _020DEB50 - mov r0, r10 - mov r1, r11 - bl __memrchr - movs r7, r0 - addne r0, r7, #0x1 - subne r0, r0, r10 - strne r0, [sp, #0x4] -_020DEB50: - ldr r2, [sp, #0x4] - cmp r2, #0x0 - beq _020DEB90 - ldr r0, [r9, #0x24] - mov r1, r10 - bl memcpy - ldr r2, [sp, #0x4] - ldr r0, [r9, #0x24] - add r10, r10, r2 - add r0, r0, r2 - str r0, [r9, #0x24] - ldr r1, [r9, #0x28] - ldr r0, [sp, #0x4] - sub r5, r5, r2 - sub r0, r1, r0 - str r0, [r9, #0x28] -_020DEB90: - ldr r0, [r9, #0x28] - cmp r0, #0x0 - beq _020DEBB4 - cmp r7, #0x0 - bne _020DEBB4 - ldr r0, [r9, #0x4] - mov r0, r0, lsl #0x19 - movs r0, r0, lsr #0x1e - bne _020DEBDC -_020DEBB4: - mov r0, r9 - mov r1, #0x0 - bl __flush_buffer -_020DEBC0: ; 0x020DEBC0 - cmp r0, #0x0 - beq _020DEBDC - mov r0, #0x1 - strb r0, [r9, #0xd] - mov r5, #0x0 - str r5, [r9, #0x28] - b _020DEBF0 -_020DEBDC: - ldr r0, [sp, #0x4] - cmp r5, #0x0 - add r6, r6, r0 - cmpne r8, #0x0 - bne _020DEB00 -_020DEBF0: - cmp r5, #0x0 - beq _020DEC5C - cmp r8, #0x0 - bne _020DEC5C - ldr r4, [r9, #0x1c] - ldr r7, [r9, #0x20] - add r2, r10, r5 - str r10, [r9, #0x1c] - str r5, [r9, #0x20] - add r1, sp, #0x4 - mov r0, r9 - str r2, [r9, #0x24] - bl __flush_buffer -_020DEC24: ; 0x020DEC24 - cmp r0, #0x0 - ldreq r0, [sp, #0x4] - addeq r6, r6, r0 - beq _020DEC44 - mov r0, #0x1 - strb r0, [r9, #0xd] - mov r0, #0x0 - str r0, [r9, #0x28] -_020DEC44: - str r4, [r9, #0x1c] - mov r0, r9 - str r7, [r9, #0x20] - bl __prep_buffer -_020DEC54: ; 0x020DEC54 - mov r0, #0x0 - str r0, [r9, #0x28] -_020DEC5C: - ldr r0, [r9, #0x4] - ldr r1, [sp, #0x0] - mov r0, r0, lsl #0x19 - mov r0, r0, lsr #0x1e - cmp r0, #0x2 - movne r0, #0x0 - strne r0, [r9, #0x28] - mov r0, r6 - bl _u32_div_f - add sp, sp, #0x8 - ldmia sp!, {r3-r11,pc} - - arm_func_start fclose -fclose: ; 0x020DEC88 - stmdb sp!, {r3-r5,lr} - movs r5, r0 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020DEC98: ; 0x020DEC98 - ldr r1, [r5, #0x4] - mov r1, r1, lsl #0x16 - movs r1, r1, lsr #0x1d - moveq r0, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020DECAC: ; 0x020DECAC - bl fflush - mov r4, r0 - ldr r0, [r5, #0x0] - ldr r1, [r5, #0x44] - blx r1 - ldr r1, [r5, #0x4] - mov r2, #0x0 - bic r1, r1, #0x380 - str r1, [r5, #0x4] - str r2, [r5, #0x0] - ldr r1, [r5, #0x8] - mov r1, r1, lsl #0x1c - movs r1, r1, lsr #0x1f - subne r0, r2, #0x1 - ldmneia sp!, {r3-r5,pc} -_020DECE8: ; 0x020DECE8 - cmp r4, #0x0 - cmpeq r0, #0x0 - movne r2, #0x1 - rsb r0, r2, #0x0 - ldmia sp!, {r3-r5,pc} - - arm_func_start fflush -fflush: - stmdb sp!, {r4,lr} - movs r4, r0 - bne _020DED10 - bl __flush_all - ldmia sp!, {r4,pc} -_020DED10: - ldrb r0, [r4, #0xd] - cmp r0, #0x0 - bne _020DED2C - ldr r0, [r4, #0x4] - mov r1, r0, lsl #0x16 - movs r1, r1, lsr #0x1d - bne _020DED34 -_020DED2C: - mvn r0, #0x0 - ldmia sp!, {r4,pc} -_020DED34: - mov r0, r0, lsl #0x1b - mov r0, r0, lsr #0x1d - cmp r0, #0x1 - moveq r0, #0x0 - ldmeqia sp!, {r4,pc} -_020DED48: ; 0x020DED48 - ldr r0, [r4, #0x8] - mov r1, r0, lsl #0x1d - mov r1, r1, lsr #0x1d - cmp r1, #0x3 - biccs r0, r0, #0x7 - orrcs r0, r0, #0x2 - strcs r0, [r4, #0x8] - ldr r0, [r4, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - cmp r0, #0x2 - moveq r0, #0x0 - streq r0, [r4, #0x28] - ldr r0, [r4, #0x8] - mov r1, r0, lsl #0x1d - mov r1, r1, lsr #0x1d - cmp r1, #0x1 - beq _020DEDA0 - bic r0, r0, #0x7 - str r0, [r4, #0x8] - mov r0, #0x0 - ldmia sp!, {r4,pc} -_020DEDA0: - mov r0, r4 - mov r1, #0x0 - bl __flush_buffer -_020DEDAC: ; 0x020DEDAC - cmp r0, #0x0 - mov r0, #0x0 - beq _020DEDCC - mov r1, #0x1 - strb r1, [r4, #0xd] - str r0, [r4, #0x28] - sub r0, r0, #0x1 - ldmia sp!, {r4,pc} -_020DEDCC: - ldr r1, [r4, #0x8] - bic r1, r1, #0x7 - str r1, [r4, #0x8] - str r0, [r4, #0x18] - str r0, [r4, #0x28] - ldmia sp!, {r4,pc} - - arm_func_start _ftell -_ftell: ; 0x020DEDE4 - ldr r1, [r0, #0x4] - mov r1, r1, lsl #0x16 - mov r1, r1, lsr #0x1d - and r1, r1, #0xff - add r1, r1, #0xff - and r1, r1, #0xff - cmp r1, #0x1 - bhi _020DEE10 - ldrb r1, [r0, #0xd] - cmp r1, #0x0 - beq _020DEE24 -_020DEE10: - ldr r0, _020DEE5C ; =0x021D74A8 - mov r1, #0x28 - str r1, [r0, #0x0] - sub r0, r1, #0x29 - bx lr -_020DEE24: - ldr r1, [r0, #0x8] - mov r1, r1, lsl #0x1d - movs r12, r1, lsr #0x1d - ldreq r0, [r0, #0x18] - bxeq lr - ldr r2, [r0, #0x24] - ldr r1, [r0, #0x1c] - ldr r3, [r0, #0x34] - sub r0, r2, r1 - cmp r12, #0x3 - add r0, r3, r0 - subcs r1, r12, #0x2 - subcs r0, r0, r1 - bx lr - .balign 4 -_020DEE5C: .word 0x021D74A8 - - arm_func_start ftell -ftell: ; 0x020DEE60 - stmdb sp!, {r3-r7,lr} - ldr r1, _020DEF60 ; =0x02106A58 - mov r7, r0 - cmp r7, r1 - moveq r6, #0x2 - beq _020DEE98 - ldr r0, _020DEF64 ; =0x02106AA4 - cmp r7, r0 - moveq r6, #0x3 - beq _020DEE98 - ldr r0, _020DEF68 ; =0x02106AF0 - cmp r7, r0 - moveq r6, #0x4 - movne r6, #0x5 -_020DEE98: - mov r0, #0x18 - mul r4, r6, r0 - ldr r5, _020DEF6C ; =0x021D70D0 - add r0, r5, r4 - bl OS_TryLockMutex -_020DEEAC: ; 0x020DEEAC - cmp r0, #0x0 - bne _020DEED8 - ldr r0, _020DEF70 ; =0x021D3498 - ldr r2, _020DEF74 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DEF78 ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] - b _020DEF30 -_020DEED8: - ldr r0, _020DEF70 ; =0x021D3498 - ldr r1, _020DEF74 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, r6, lsl #0x2] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020DEF08 - ldr r1, _020DEF78 ; =0x021D70AC - ldr r0, [r1, r6, lsl #0x2] - add r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - b _020DEF30 -_020DEF08: - add r0, r5, r4 - bl OS_LockMutex - ldr r0, _020DEF70 ; =0x021D3498 - ldr r2, _020DEF74 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DEF78 ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] -_020DEF30: - mov r0, r7 - bl _ftell - ldr r1, _020DEF78 ; =0x021D70AC - mov r7, r0 - ldr r0, [r1, r6, lsl #0x2] - subs r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - bne _020DEF58 - add r0, r5, r4 - bl OS_UnlockMutex -_020DEF58: - mov r0, r7 - ldmia sp!, {r3-r7,pc} - .balign 4 -_020DEF60: .word 0x02106A58 -_020DEF64: .word 0x02106AA4 -_020DEF68: .word 0x02106AF0 -_020DEF6C: .word 0x021D70D0 -_020DEF70: .word 0x021D3498 -_020DEF74: .word 0x021D7088 -_020DEF78: .word 0x021D70AC - - arm_func_start _fseek -_fseek: ; 0x020DEF7C - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r5,lr} - mov r5, r0 - ldr r1, [r5, #0x4] - mov r4, r2 - mov r1, r1, lsl #0x16 - mov r1, r1, lsr #0x1d - and r1, r1, #0xff - cmp r1, #0x1 - ldreqb r1, [r5, #0xd] - cmpeq r1, #0x0 - beq _020DEFC8 - ldr r0, _020DF160 ; =0x021D74A8 - mov r1, #0x28 - str r1, [r0, #0x0] - sub r0, r1, #0x29 - ldmia sp!, {r3-r5,lr} - add sp, sp, #0x10 - bx lr -_020DEFC8: - ldr r1, [r5, #0x8] - mov r1, r1, lsl #0x1d - mov r1, r1, lsr #0x1d - cmp r1, #0x1 - bne _020DF018 - mov r1, #0x0 - bl __flush_buffer -_020DEFE4: ; 0x020DEFE4 - cmp r0, #0x0 - beq _020DF018 - mov r0, #0x1 - strb r0, [r5, #0xd] - mov r2, #0x0 - ldr r0, _020DF160 ; =0x021D74A8 - mov r1, #0x28 - str r2, [r5, #0x28] - str r1, [r0, #0x0] - sub r0, r1, #0x29 - ldmia sp!, {r3-r5,lr} - add sp, sp, #0x10 - bx lr -_020DF018: - cmp r4, #0x1 - bne _020DF038 - mov r0, r5 - mov r4, #0x0 - bl _ftell - ldr r1, [sp, #0x14] - add r0, r1, r0 - str r0, [sp, #0x14] -_020DF038: - cmp r4, #0x2 - beq _020DF0CC - ldr r0, [r5, #0x4] - mov r0, r0, lsl #0x1b - mov r0, r0, lsr #0x1d - cmp r0, #0x3 - beq _020DF0CC - ldr r0, [r5, #0x8] - mov r0, r0, lsl #0x1d - mov r0, r0, lsr #0x1d - sub r0, r0, #0x2 - cmp r0, #0x1 - bhi _020DF0CC - ldr r2, [sp, #0x14] - ldr r0, [r5, #0x18] - cmp r2, r0 - bhs _020DF088 - ldr r0, [r5, #0x34] - cmp r2, r0 - bhs _020DF098 -_020DF088: - ldr r0, [r5, #0x8] - bic r0, r0, #0x7 - str r0, [r5, #0x8] - b _020DF0D8 -_020DF098: - ldr r1, [r5, #0x1c] - sub r0, r2, r0 - add r0, r1, r0 - str r0, [r5, #0x24] - ldr r1, [r5, #0x18] - ldr r0, [sp, #0x14] - sub r0, r1, r0 - str r0, [r5, #0x28] - ldr r0, [r5, #0x8] - bic r0, r0, #0x7 - orr r0, r0, #0x2 - str r0, [r5, #0x8] - b _020DF0D8 -_020DF0CC: - ldr r0, [r5, #0x8] - bic r0, r0, #0x7 - str r0, [r5, #0x8] -_020DF0D8: - ldr r0, [r5, #0x8] - mov r0, r0, lsl #0x1d - movs r0, r0, lsr #0x1d - bne _020DF150 - ldr r12, [r5, #0x38] - cmp r12, #0x0 - beq _020DF13C - ldr r0, [r5, #0x0] - ldr r3, [r5, #0x48] - add r1, sp, #0x14 - mov r2, r4 - blx r12 - cmp r0, #0x0 - beq _020DF13C - mov r0, #0x1 - strb r0, [r5, #0xd] - mov r2, #0x0 - ldr r0, _020DF160 ; =0x021D74A8 - mov r1, #0x28 - str r2, [r5, #0x28] - str r1, [r0, #0x0] - sub r0, r1, #0x29 - ldmia sp!, {r3-r5,lr} - add sp, sp, #0x10 - bx lr -_020DF13C: - mov r1, #0x0 - strb r1, [r5, #0xc] - ldr r0, [sp, #0x14] - str r0, [r5, #0x18] - str r1, [r5, #0x28] -_020DF150: - mov r0, #0x0 - ldmia sp!, {r3-r5,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020DF160: .word 0x021D74A8 - - arm_func_start fseek -fseek: - stmdb sp!, {r3-r9,lr} - ldr r3, _020DF274 ; =0x02106A58 - mov r9, r0 - cmp r9, r3 - mov r8, r1 - mov r7, r2 - moveq r6, #0x2 - beq _020DF1A4 - ldr r0, _020DF278 ; =0x02106AA4 - cmp r9, r0 - moveq r6, #0x3 - beq _020DF1A4 - ldr r0, _020DF27C ; =0x02106AF0 - cmp r9, r0 - moveq r6, #0x4 - movne r6, #0x5 -_020DF1A4: - mov r0, #0x18 - mul r4, r6, r0 - ldr r5, _020DF280 ; =0x021D70D0 - add r0, r5, r4 - bl OS_TryLockMutex -_020DF1B8: ; 0x020DF1B8 - cmp r0, #0x0 - bne _020DF1E4 - ldr r0, _020DF284 ; =0x021D3498 - ldr r2, _020DF288 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DF28C ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] - b _020DF23C -_020DF1E4: - ldr r0, _020DF284 ; =0x021D3498 - ldr r1, _020DF288 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, r6, lsl #0x2] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020DF214 - ldr r1, _020DF28C ; =0x021D70AC - ldr r0, [r1, r6, lsl #0x2] - add r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - b _020DF23C -_020DF214: - add r0, r5, r4 - bl OS_LockMutex - ldr r0, _020DF284 ; =0x021D3498 - ldr r2, _020DF288 ; =0x021D7088 - ldr r1, [r0, #0x4] - ldr r0, _020DF28C ; =0x021D70AC - ldr r3, [r1, #0x6c] - mov r1, #0x1 - str r3, [r2, r6, lsl #0x2] - str r1, [r0, r6, lsl #0x2] -_020DF23C: - mov r0, r9 - mov r1, r8 - mov r2, r7 - bl _fseek - ldr r1, _020DF28C ; =0x021D70AC - mov r7, r0 - ldr r0, [r1, r6, lsl #0x2] - subs r0, r0, #0x1 - str r0, [r1, r6, lsl #0x2] - bne _020DF26C - add r0, r5, r4 - bl OS_UnlockMutex -_020DF26C: - mov r0, r7 - ldmia sp!, {r3-r9,pc} - .balign 4 -_020DF274: .word 0x02106A58 -_020DF278: .word 0x02106AA4 -_020DF27C: .word 0x02106AF0 -_020DF280: .word 0x021D70D0 -_020DF284: .word 0x021D3498 -_020DF288: .word 0x021D7088 -_020DF28C: .word 0x021D70AC - - arm_func_start rewind -rewind: ; 0x020DF290 - stmdb sp!, {r4,lr} - mov r1, #0x0 - mov r4, r0 - mov r2, r1 - strb r1, [r4, #0xd] - bl fseek -_020DF2A8: ; 0x020DF2A8 - mov r0, #0x0 - strb r0, [r4, #0xd] - ldmia sp!, {r4,pc} - - arm_func_start mbtowc -mbtowc: - stmdb sp!, {r3,lr} - ldr r3, _020DF2CC ; =0x02106C98 - ldr r3, [r3, #0x8] - ldr r3, [r3, #0x0] - blx r3 - ldmia sp!, {r3,pc} - .balign 4 -_020DF2CC: .word 0x02106C98 - - arm_func_start __mbtowc_noconv -__mbtowc_noconv: ; 0x020DF2D0 - cmp r1, #0x0 - moveq r0, #0x0 - bxeq lr - cmp r2, #0x0 - mvneq r0, #0x0 - bxeq lr - cmp r0, #0x0 - ldrneb r2, [r1, #0x0] - strneh r2, [r0, #0x0] - ldrsb r0, [r1, #0x0] - cmp r0, #0x0 - moveq r0, #0x0 - movne r0, #0x1 - bx lr - - arm_func_start __wctomb_noconv -__wctomb_noconv: ; 0x020DF308 - cmp r0, #0x0 - moveq r0, #0x0 - strneb r1, [r0, #0x0] - movne r0, #0x1 - bx lr - - arm_func_start wctomb -wctomb: ; 0x020DF31C - stmdb sp!, {r3,lr} - ldr r2, _020DF334 ; =0x02106C98 - ldr r2, [r2, #0x8] - ldr r2, [r2, #0x4] - blx r2 - ldmia sp!, {r3,pc} - .balign 4 -_020DF334: .word 0x02106C98 - - arm_func_start mbstowcs -mbstowcs: ; 0x020DF338 - stmdb sp!, {r4-r8,lr} - mov r7, r1 - mov r8, r0 - mov r0, r7 - mov r6, r2 - bl strlen - mov r5, r0 - cmp r8, #0x0 - mov r4, #0x0 - beq _020DF3B8 - cmp r6, #0x0 - bls _020DF3B8 -_020DF368: - ldrsb r0, [r7, #0x0] - cmp r0, #0x0 - beq _020DF3A0 - mov r0, r8 - mov r1, r7 - mov r2, r5 - bl mbtowc -_020DF384: ; 0x020DF384 - cmp r0, #0x0 - add r8, r8, #0x2 - addgt r7, r7, r0 - subgt r5, r5, r0 - bgt _020DF3AC - mvn r0, #0x0 - ldmia sp!, {r4-r8,pc} -_020DF3A0: - mov r0, #0x0 - strh r0, [r8, #0x0] - b _020DF3B8 -_020DF3AC: - add r4, r4, #0x1 - cmp r4, r6 - blo _020DF368 -_020DF3B8: - mov r0, r4 - ldmia sp!, {r4-r8,pc} - - arm_func_start wcstombs -wcstombs: - stmdb sp!, {r3-r9,lr} - movs r4, r0 - mov r9, r1 - cmpne r9, #0x0 - mov r8, r2 - mov r7, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r3-r9,pc} -_020DF3E0: ; 0x020DF3E0 - add r6, sp, #0x0 -_020DF3E4: - ldrh r1, [r9, #0x0] - cmp r1, #0x0 - moveq r0, #0x0 - streqb r0, [r4, r7] - beq _020DF430 - mov r0, r6 - add r9, r9, #0x2 - bl wctomb - mov r5, r0 - add r0, r7, r5 - cmp r0, r8 - bhi _020DF430 - mov r1, r6 - mov r2, r5 - add r0, r4, r7 - bl strncpy - add r7, r7, r5 - cmp r7, r8 - bls _020DF3E4 -_020DF430: - mov r0, r7 - ldmia sp!, {r3-r9,pc} - - arm_func_start memcpy -memcpy: ; 0x020DF438 - mov r12, r0 - cmp r2, #0x0 - bxeq lr -_020DF444: - ldrsb r3, [r1], #0x1 - subs r2, r2, #0x1 - strb r3, [r12], #0x1 - bne _020DF444 - bx lr - - arm_func_start memmove -memmove: ; 0x020DF458 - cmp r1, r0 - blo _020DF480 - mov r12, r0 - cmp r2, #0x0 - bxeq lr -_020DF46C: - ldrsb r3, [r1], #0x1 - subs r2, r2, #0x1 - strb r3, [r12], #0x1 - bne _020DF46C - bx lr -_020DF480: - cmp r2, #0x0 - add r3, r1, r2 - add r12, r0, r2 - bxeq lr -_020DF490: - ldrsb r1, [r3, #-0x1]! - subs r2, r2, #0x1 - strb r1, [r12, #-0x1]! - bne _020DF490 - bx lr - - arm_func_start Call_FillMemWithValue -Call_FillMemWithValue: ; 0x020DF4A4 - stmdb sp!, {r4,lr} - mov r4, r0 - bl __fill_mem - mov r0, r4 - ldmia sp!, {r4,pc} - - arm_func_start memchr -memchr: - cmp r2, #0x0 - and r3, r1, #0xff - beq _020DF4DC -_020DF4C4: - ldrb r1, [r0], #0x1 - cmp r1, r3 - subeq r0, r0, #0x1 - bxeq lr - subs r2, r2, #0x1 - bne _020DF4C4 -_020DF4DC: - mov r0, #0x0 - bx lr - - arm_func_start __memrchr -__memrchr: ; 0x020DF4E4 - cmp r2, #0x0 - and r3, r1, #0xff - add r0, r0, r2 - beq _020DF508 -_020DF4F4: - ldrb r1, [r0, #-0x1]! - cmp r1, r3 - bxeq lr - subs r2, r2, #0x1 - bne _020DF4F4 -_020DF508: - mov r0, #0x0 - bx lr - - arm_func_start memcmp -memcmp: ; 0x020DF510 - cmp r2, #0x0 - beq _020DF548 -_020DF518: - ldrb r12, [r0], #0x1 - ldrb r3, [r1], #0x1 - cmp r12, r3 - beq _020DF540 - ldrb r2, [r0, #-0x1] - ldrb r0, [r1, #-0x1] - cmp r2, r0 - mvncc r0, #0x0 - movcs r0, #0x1 - bx lr -_020DF540: - subs r2, r2, #0x1 - bne _020DF518 -_020DF548: - mov r0, #0x0 - bx lr - - arm_func_start __fill_mem -__fill_mem: ; 0x020DF550 - cmp r2, #0x20 - and r3, r1, #0xff - blo _020DF5E4 - rsb r1, r0, #0x0 - ands r12, r1, #0x3 - beq _020DF57C - sub r2, r2, r12 - and r1, r3, #0xff -_020DF570: - strb r1, [r0], #0x1 - subs r12, r12, #0x1 - bne _020DF570 -_020DF57C: - cmp r3, #0x0 - beq _020DF594 - mov r1, r3, lsl #0x10 - orr r1, r1, r3, lsl #0x18 - orr r1, r1, r3, lsl #0x8 - orr r3, r3, r1 -_020DF594: - movs r1, r2, lsr #0x5 - beq _020DF5C8 -_020DF59C: - str r3, [r0, #0x0] - str r3, [r0, #0x4] - str r3, [r0, #0x8] - str r3, [r0, #0xc] - str r3, [r0, #0x10] - str r3, [r0, #0x14] - str r3, [r0, #0x18] - str r3, [r0, #0x1c] - add r0, r0, #0x20 - subs r1, r1, #0x1 - bne _020DF59C -_020DF5C8: - and r1, r2, #0x1f - movs r1, r1, lsr #0x2 - beq _020DF5E0 -_020DF5D4: - str r3, [r0], #0x4 - subs r1, r1, #0x1 - bne _020DF5D4 -_020DF5E0: - and r2, r2, #0x3 -_020DF5E4: - cmp r2, #0x0 - bxeq lr - and r1, r3, #0xff -_020DF5F0: - strb r1, [r0], #0x1 - subs r2, r2, #0x1 - bne _020DF5F0 - bx lr - - arm_func_start parse_format_printf -parse_format_printf: ; 0x020DF600 - stmdb sp!, {r4-r8,lr} - sub sp, sp, #0x10 - ldrsb r3, [r0, #0x1] - mov r4, #0x0 - mov r5, #0x1 - mov lr, r2 - strb r5, [sp, #0x0] - strb r4, [sp, #0x1] - strb r4, [sp, #0x2] - strb r4, [sp, #0x3] - strb r4, [sp, #0x4] - str r4, [sp, #0x8] - str r4, [sp, #0xc] - cmp r3, #0x25 - add r12, r0, #0x1 - bne _020DF65C - add r0, sp, #0x0 - strb r3, [sp, #0x5] - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add sp, sp, #0x10 - add r0, r12, #0x1 - ldmia sp!, {r4-r8,pc} -_020DF65C: - mov r2, #0x2 - mov r0, r4 - mov r5, r2 - mov r6, r4 - mov r7, #0x1 -_020DF670: - mov r8, r7 - cmp r3, #0x2b - bgt _020DF6A0 - bge _020DF6C8 - cmp r3, #0x23 - bgt _020DF6F8 - cmp r3, #0x20 - blt _020DF6F8 - beq _020DF6D0 - cmp r3, #0x23 - beq _020DF6E0 - b _020DF6F8 -_020DF6A0: - cmp r3, #0x30 - bgt _020DF6F8 - cmp r3, #0x2d - blt _020DF6F8 - beq _020DF6C0 - cmp r3, #0x30 - beq _020DF6E8 - b _020DF6F8 -_020DF6C0: - strb r6, [sp, #0x0] - b _020DF6FC -_020DF6C8: - strb r7, [sp, #0x1] - b _020DF6FC -_020DF6D0: - ldrb r4, [sp, #0x1] - cmp r4, #0x1 - strneb r5, [sp, #0x1] - b _020DF6FC -_020DF6E0: - strb r7, [sp, #0x3] - b _020DF6FC -_020DF6E8: - ldrb r4, [sp, #0x0] - cmp r4, #0x0 - strneb r2, [sp, #0x0] - b _020DF6FC -_020DF6F8: - mov r8, r0 -_020DF6FC: - cmp r8, #0x0 - ldrnesb r3, [r12, #0x1]! - bne _020DF670 - cmp r3, #0x2a - bne _020DF744 - ldr r0, [r1, #0x0] - add r0, r0, #0x4 - str r0, [r1, #0x0] - ldr r0, [r0, #-0x4] - str r0, [sp, #0x8] - cmp r0, #0x0 - bge _020DF73C - rsb r0, r0, #0x0 - mov r2, #0x0 - strb r2, [sp, #0x0] - str r0, [sp, #0x8] -_020DF73C: - ldrsb r3, [r12, #0x1]! - b _020DF794 -_020DF744: - ldr r4, _020DFB88 ; =0x0210430C - mov r5, #0x0 - mov r0, #0xa - b _020DF768 -_020DF754: - ldr r2, [sp, #0x8] - sub r3, r3, #0x30 - mla r6, r2, r0, r3 - ldrsb r3, [r12, #0x1]! - str r6, [sp, #0x8] -_020DF768: - cmp r3, #0x0 - blt _020DF778 - cmp r3, #0x80 - blt _020DF780 -_020DF778: - mov r2, r5 - b _020DF78C -_020DF780: - mov r2, r3, lsl #0x1 - ldrh r2, [r4, r2] - and r2, r2, #0x8 -_020DF78C: - cmp r2, #0x0 - bne _020DF754 -_020DF794: - ldr r2, [sp, #0x8] - ldr r0, _020DFB8C ; =0x000001FD - cmp r2, r0 - ble _020DF7C4 - mov r1, #0xff - add r0, sp, #0x0 - strb r1, [sp, #0x5] - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add sp, sp, #0x10 - add r0, r12, #0x1 - ldmia sp!, {r4-r8,pc} -_020DF7C4: - cmp r3, #0x2e - bne _020DF858 - ldrsb r3, [r12, #0x1]! - mov r0, #0x1 - strb r0, [sp, #0x2] - cmp r3, #0x2a - bne _020DF808 - ldr r0, [r1, #0x0] - add r0, r0, #0x4 - str r0, [r1, #0x0] - ldr r0, [r0, #-0x4] - ldrsb r3, [r12, #0x1]! - str r0, [sp, #0xc] - cmp r0, #0x0 - movlt r0, #0x0 - strltb r0, [sp, #0x2] - b _020DF858 -_020DF808: - ldr r2, _020DFB88 ; =0x0210430C - mov r4, #0x0 - mov r0, #0xa - b _020DF82C -_020DF818: - ldr r1, [sp, #0xc] - sub r3, r3, #0x30 - mla r5, r1, r0, r3 - ldrsb r3, [r12, #0x1]! - str r5, [sp, #0xc] -_020DF82C: - cmp r3, #0x0 - blt _020DF83C - cmp r3, #0x80 - blt _020DF844 -_020DF83C: - mov r1, r4 - b _020DF850 -_020DF844: - mov r1, r3, lsl #0x1 - ldrh r1, [r2, r1] - and r1, r1, #0x8 -_020DF850: - cmp r1, #0x0 - bne _020DF818 -_020DF858: - cmp r3, #0x6c - mov r0, #0x1 - bgt _020DF890 - cmp r3, #0x68 - blt _020DF884 - beq _020DF8AC - cmp r3, #0x6a - beq _020DF8F8 - cmp r3, #0x6c - beq _020DF8C8 - b _020DF91C -_020DF884: - cmp r3, #0x4c - beq _020DF8EC - b _020DF91C -_020DF890: - cmp r3, #0x74 - bgt _020DF8A0 - beq _020DF904 - b _020DF91C -_020DF8A0: - cmp r3, #0x7a - beq _020DF910 - b _020DF91C -_020DF8AC: - ldrsb r1, [r12, #0x1] - mov r2, #0x2 - strb r2, [sp, #0x4] - cmp r1, #0x68 - streqb r0, [sp, #0x4] - ldreqsb r3, [r12, #0x1]! - b _020DF920 -_020DF8C8: - ldrsb r1, [r12, #0x1] - mov r2, #0x3 - strb r2, [sp, #0x4] - cmp r1, #0x6c - bne _020DF920 - mov r1, #0x4 - strb r1, [sp, #0x4] - ldrsb r3, [r12, #0x1]! - b _020DF920 -_020DF8EC: - mov r1, #0x9 - strb r1, [sp, #0x4] - b _020DF920 -_020DF8F8: - mov r1, #0x6 - strb r1, [sp, #0x4] - b _020DF920 -_020DF904: - mov r1, #0x8 - strb r1, [sp, #0x4] - b _020DF920 -_020DF910: - mov r1, #0x7 - strb r1, [sp, #0x4] - b _020DF920 -_020DF91C: - mov r0, #0x0 -_020DF920: - cmp r0, #0x0 - ldrnesb r3, [r12, #0x1]! - strb r3, [sp, #0x5] - cmp r3, #0x61 - bgt _020DF974 - bge _020DFA5C - cmp r3, #0x47 - bgt _020DF968 - subs r0, r3, #0x41 - addpl pc, pc, r0, lsl #0x2 - b _020DFB68 -_020DF94C: ; 0x020DF94C - b _020DFA5C -_020DF950: ; 0x020DF950 - b _020DFB68 -_020DF954: ; 0x020DF954 - b _020DFB68 -_020DF958: ; 0x020DF958 - b _020DFB68 -_020DF95C: ; 0x020DF95C - b _020DFAA4 -_020DF960: ; 0x020DF960 - b _020DFA24 -_020DF964: ; 0x020DF964 - b _020DFA94 -_020DF968: - cmp r3, #0x58 - beq _020DF9E8 - b _020DFB68 -_020DF974: - cmp r3, #0x63 - bgt _020DF984 - beq _020DFB04 - b _020DFB68 -_020DF984: - sub r0, r3, #0x64 - cmp r0, #0x14 - addls pc, pc, r0, lsl #0x2 - b _020DFB68 -_020DF994: - b _020DF9E8 -_020DF998: - b _020DFAA4 -_020DF99C: - b _020DFA24 -_020DF9A0: - b _020DFA94 -_020DF9A4: - b _020DFB68 -_020DF9A8: - b _020DF9E8 -_020DF9AC: - b _020DFB68 -_020DF9B0: - b _020DFB68 -_020DF9B4: - b _020DFB68 -_020DF9B8: - b _020DFB68 -_020DF9BC: - b _020DFB54 -_020DF9C0: - b _020DF9E8 -_020DF9C4: - b _020DFAE0 -_020DF9C8: - b _020DFB68 -_020DF9CC: - b _020DFB68 -_020DF9D0: - b _020DFB30 -_020DF9D4: - b _020DFB68 -_020DF9D8: - b _020DF9E8 -_020DF9DC: - b _020DFB68 -_020DF9E0: - b _020DFB68 -_020DF9E4: - b _020DF9E8 -_020DF9E8: - ldrb r0, [sp, #0x4] - cmp r0, #0x9 - moveq r0, #0xff - streqb r0, [sp, #0x5] - beq _020DFB70 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x1 - streq r0, [sp, #0xc] - beq _020DFB70 - ldrb r0, [sp, #0x0] - cmp r0, #0x2 - moveq r0, #0x1 - streqb r0, [sp, #0x0] - b _020DFB70 -_020DFA24: - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - moveq r0, #0xff - streqb r0, [sp, #0x5] - beq _020DFB70 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x6 - streq r0, [sp, #0xc] - b _020DFB70 -_020DFA5C: - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0xd - streq r0, [sp, #0xc] - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - cmpne r0, #0x1 - moveq r0, #0xff - streqb r0, [sp, #0x5] - b _020DFB70 -_020DFA94: - ldr r0, [sp, #0xc] - cmp r0, #0x0 - moveq r0, #0x1 - streq r0, [sp, #0xc] -_020DFAA4: - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - cmpne r0, #0x1 - moveq r0, #0xff - streqb r0, [sp, #0x5] - beq _020DFB70 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x6 - streq r0, [sp, #0xc] - b _020DFB70 -_020DFAE0: - mov r3, #0x78 - mov r2, #0x1 - mov r1, #0x3 - mov r0, #0x8 - strb r3, [sp, #0x5] - strb r2, [sp, #0x3] - strb r1, [sp, #0x4] - str r0, [sp, #0xc] - b _020DFB70 -_020DFB04: - ldrb r1, [sp, #0x4] - cmp r1, #0x3 - moveq r0, #0x5 - streqb r0, [sp, #0x4] - beq _020DFB70 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - cmpeq r1, #0x0 - movne r0, #0xff - strneb r0, [sp, #0x5] - b _020DFB70 -_020DFB30: - ldrb r0, [sp, #0x4] - cmp r0, #0x3 - moveq r0, #0x5 - streqb r0, [sp, #0x4] - beq _020DFB70 - cmp r0, #0x0 - movne r0, #0xff - strneb r0, [sp, #0x5] - b _020DFB70 -_020DFB54: - ldrb r0, [sp, #0x4] - cmp r0, #0x9 - moveq r0, #0xff - streqb r0, [sp, #0x5] - b _020DFB70 -_020DFB68: - mov r0, #0xff - strb r0, [sp, #0x5] -_020DFB70: - add r0, sp, #0x0 - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add r0, r12, #0x1 - add sp, sp, #0x10 - ldmia sp!, {r4-r8,pc} - .balign 4 -_020DFB88: .word 0x0210430C -_020DFB8C: .word 0x000001FD - - arm_func_start long2str -long2str: ; 0x020DFB90 - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x10 - movs r10, r0 - mov r0, #0x0 - mov r5, r1 - str r0, [sp, #0xc] - ldr r7, [sp, #0x4c] - mov r6, r0 - strb r0, [r5, #-0x1]! - ldrb r0, [sp, #0x43] - str r1, [sp, #0x0] - ldrb r8, [sp, #0x45] - str r0, [sp, #0x4] - ldr r0, [sp, #0x48] - ldrb r11, [sp, #0x41] - str r0, [sp, #0x8] - cmpeq r7, #0x0 - bne _020DFC04 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - beq _020DFBF0 - cmp r8, #0x6f - beq _020DFC04 -_020DFBF0: - add sp, sp, #0x10 - mov r0, r5 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020DFC04: - cmp r8, #0x69 - bgt _020DFC2C - bge _020DFC60 - cmp r8, #0x58 - bgt _020DFC20 - beq _020DFC8C - b _020DFC94 -_020DFC20: - cmp r8, #0x64 - beq _020DFC60 - b _020DFC94 -_020DFC2C: - cmp r8, #0x6f - bgt _020DFC40 - moveq r4, #0x8 - moveq r11, #0x0 - b _020DFC94 -_020DFC40: - cmp r8, #0x78 - bgt _020DFC94 - cmp r8, #0x75 - blt _020DFC94 - beq _020DFC80 - cmp r8, #0x78 - beq _020DFC8C - b _020DFC94 -_020DFC60: - cmp r10, #0x0 - mov r4, #0xa - bge _020DFC94 - mov r0, #0x1 - cmp r10, #0x80000000 - rsbne r10, r10, #0x0 - str r0, [sp, #0xc] - b _020DFC94 -_020DFC80: - mov r4, #0xa - mov r11, #0x0 - b _020DFC94 -_020DFC8C: - mov r4, #0x10 - mov r11, #0x0 -_020DFC94: - mov r0, r10 - mov r1, r4 - bl _u32_div_f - mov r9, r1 - mov r0, r10 - mov r1, r4 - bl _u32_div_f - cmp r9, #0xa - mov r10, r0 - addlt r9, r9, #0x30 - blt _020DFCCC - cmp r8, #0x78 - addeq r9, r9, #0x57 - addne r9, r9, #0x37 -_020DFCCC: - cmp r10, #0x0 - strb r9, [r5, #-0x1]! - add r6, r6, #0x1 - bne _020DFC94 - cmp r4, #0x8 - bne _020DFD00 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrnesb r0, [r5, #0x0] - cmpne r0, #0x30 - movne r0, #0x30 - strneb r0, [r5, #-0x1]! - addne r6, r6, #0x1 -_020DFD00: - ldrb r0, [sp, #0x40] - cmp r0, #0x2 - bne _020DFD34 - ldr r0, [sp, #0xc] - ldr r7, [sp, #0x8] - cmp r0, #0x0 - cmpeq r11, #0x0 - subne r7, r7, #0x1 - cmp r4, #0x10 - bne _020DFD34 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - subne r7, r7, #0x2 -_020DFD34: - ldr r0, [sp, #0x0] - sub r1, r0, r5 - ldr r0, _020DFDD8 ; =0x000001FD - add r1, r7, r1 - cmp r1, r0 - addgt sp, sp, #0x10 - movgt r0, #0x0 - ldmgtia sp!, {r3-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - cmp r6, r7 - bge _020DFD78 - mov r0, #0x30 -_020DFD68: - add r6, r6, #0x1 - cmp r6, r7 - strb r0, [r5, #-0x1]! - blt _020DFD68 -_020DFD78: - cmp r4, #0x10 - bne _020DFD94 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x30 - strneb r8, [r5, #-0x1] - strneb r0, [r5, #-0x2]! -_020DFD94: - ldr r0, [sp, #0xc] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r5, #-0x1]! - bne _020DFDC4 - cmp r11, #0x1 - moveq r0, #0x2b - streqb r0, [r5, #-0x1]! - beq _020DFDC4 - cmp r11, #0x2 - moveq r0, #0x20 - streqb r0, [r5, #-0x1]! -_020DFDC4: - mov r0, r5 - add sp, sp, #0x10 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020DFDD8: .word 0x000001FD - - arm_func_start longlong2str -longlong2str: ; 0x020DFDDC - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x18 - mov r9, r1 - mov r1, #0x0 - mov r10, r0 - mov r6, r2 - mov r0, r1 - strb r0, [r6, #-0x1]! - ldr r0, [sp, #0x58] - cmp r9, #0x0 - str r0, [sp, #0x10] - ldrb r0, [sp, #0x4f] - cmpeq r10, #0x0 - str r2, [sp, #0x0] - str r0, [sp, #0x4] - ldr r0, [sp, #0x54] - str r1, [sp, #0x14] - str r0, [sp, #0x8] - ldrb r0, [sp, #0x4d] - mov r7, r1 - ldrb r8, [sp, #0x51] - str r0, [sp, #0xc] - ldreq r0, [sp, #0x10] - cmpeq r0, #0x0 - bne _020DFE6C - ldr r0, [sp, #0x4] - cmp r0, #0x0 - beq _020DFE58 - cmp r8, #0x6f - beq _020DFE6C -_020DFE58: - add sp, sp, #0x18 - mov r0, r6 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020DFE6C: - cmp r8, #0x69 - bgt _020DFE94 - bge _020DFEC4 - cmp r8, #0x58 - bgt _020DFE88 - beq _020DFF18 - b _020DFF24 -_020DFE88: - cmp r8, #0x64 - beq _020DFEC4 - b _020DFF24 -_020DFE94: - cmp r8, #0x6f - bgt _020DFEA4 - beq _020DFEF8 - b _020DFF24 -_020DFEA4: - cmp r8, #0x78 - bgt _020DFF24 - cmp r8, #0x75 - blt _020DFF24 - beq _020DFF08 - cmp r8, #0x78 - beq _020DFF18 - b _020DFF24 -_020DFEC4: - subs r0, r10, #0x0 - sbcs r0, r9, #0x0 - mov r11, #0xa - mov r5, #0x0 - bge _020DFF24 - cmp r9, #0x80000000 - cmpeq r10, r5 - beq _020DFEEC - rsbs r10, r10, #0x0 - rsc r9, r9, #0x0 -_020DFEEC: - mov r0, #0x1 - str r0, [sp, #0x14] - b _020DFF24 -_020DFEF8: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0x8 - b _020DFF24 -_020DFF08: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0xa - b _020DFF24 -_020DFF18: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0x10 -_020DFF24: - mov r0, r10 - mov r1, r9 - mov r2, r11 - mov r3, r5 - bl _ull_mod - mov r4, r0 - mov r0, r10 - mov r1, r9 - mov r2, r11 - mov r3, r5 - bl _ll_udiv - mov r10, r0 - cmp r4, #0xa - mov r9, r1 - addlt r0, r4, #0x30 - blt _020DFF70 - cmp r8, #0x78 - addeq r0, r4, #0x57 - addne r0, r4, #0x37 -_020DFF70: - strb r0, [r6, #-0x1]! - mov r0, #0x0 - cmp r9, r0 - cmpeq r10, r0 - add r7, r7, #0x1 - bne _020DFF24 - cmp r5, #0x0 - cmpeq r11, #0x8 - bne _020DFFB0 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrnesb r0, [r6, #0x0] - cmpne r0, #0x30 - movne r0, #0x30 - strneb r0, [r6, #-0x1]! - addne r7, r7, #0x1 -_020DFFB0: - ldrb r0, [sp, #0x4c] - cmp r0, #0x2 - bne _020E0000 - ldr r0, [sp, #0x8] - str r0, [sp, #0x10] - ldr r0, [sp, #0x14] - cmp r0, #0x0 - ldreq r0, [sp, #0xc] - cmpeq r0, #0x0 - ldrne r0, [sp, #0x10] - subne r0, r0, #0x1 - strne r0, [sp, #0x10] - cmp r5, #0x0 - cmpeq r11, #0x10 - bne _020E0000 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrne r0, [sp, #0x10] - subne r0, r0, #0x2 - strne r0, [sp, #0x10] -_020E0000: - ldr r0, [sp, #0x0] - ldr r1, _020E00B8 ; =0x000001FD - sub r2, r0, r6 - ldr r0, [sp, #0x10] - add r0, r0, r2 - cmp r0, r1 - addgt sp, sp, #0x18 - movgt r0, #0x0 - ldmgtia sp!, {r3-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - ldr r0, [sp, #0x10] - cmp r7, r0 - bge _020E0050 - mov r1, #0x30 -_020E003C: - ldr r0, [sp, #0x10] - add r7, r7, #0x1 - cmp r7, r0 - strb r1, [r6, #-0x1]! - blt _020E003C -_020E0050: - cmp r5, #0x0 - cmpeq r11, #0x10 - bne _020E0070 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x30 - strneb r8, [r6, #-0x1] - strneb r0, [r6, #-0x2]! -_020E0070: - ldr r0, [sp, #0x14] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r6, #-0x1]! - bne _020E00A4 - ldr r0, [sp, #0xc] - cmp r0, #0x1 - moveq r0, #0x2b - streqb r0, [r6, #-0x1]! - beq _020E00A4 - cmp r0, #0x2 - moveq r0, #0x20 - streqb r0, [r6, #-0x1]! -_020E00A4: - mov r0, r6 - add sp, sp, #0x18 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E00B8: .word 0x000001FD - - arm_func_start double2hex -double2hex: ; 0x020E00BC - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r10,lr} - sub sp, sp, #0x44 - ldr r7, [sp, #0x80] - ldr r0, _020E056C ; =0x000001FD - mov r8, r2 - cmp r7, r0 - ldrb r6, [sp, #0x79] - ldrb r5, [sp, #0x77] - ldrb r4, [sp, #0x75] - ldr r1, [sp, #0x68] - ldr r2, [sp, #0x6c] - addgt sp, sp, #0x44 - movgt r0, #0x0 - ldmgtia sp!, {r3-r10,lr} - addgt sp, sp, #0x10 - bxgt lr - mov r10, #0x0 - mov r9, #0x20 - add r0, sp, #0x8 - add r3, sp, #0xc - strb r10, [sp, #0x8] - strh r9, [sp, #0xa] - bl __num2dec_internal2 - ldr r0, [sp, #0x68] - ldr r1, [sp, #0x6c] - bl fabs - mov r2, r0 - mov r0, r10 - mov r3, r1 - mov r1, r0 - bl _deq - bne _020E0188 - ldr r3, _020E0570 ; =0x02106DA0 - sub r0, r8, #0x6 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - add sp, sp, #0x44 - strb r2, [r8, #-0x6] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r2, [r3, #0x4] - ldrb r1, [r3, #0x5] - strb r2, [r0, #0x4] - strb r1, [r0, #0x5] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0188: - ldrb r0, [sp, #0x11] - cmp r0, #0x49 - bne _020E0298 - ldrsb r0, [sp, #0xc] - cmp r0, #0x0 - beq _020E0224 - cmp r6, #0x41 - sub r0, r8, #0x5 - bne _020E01E8 - ldr r3, _020E0574 ; =0x02106DA8 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E01E8: - ldr r3, _020E0578 ; =0x02106DB0 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0224: - cmp r6, #0x41 - sub r0, r8, #0x4 - bne _020E0264 - ldr r3, _020E057C ; =0x02106DB8 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0264: - ldr r3, _020E0580 ; =0x02106DBC - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0298: - cmp r0, #0x4e - bne _020E03A4 - ldrsb r0, [sp, #0xc] - cmp r0, #0x0 - beq _020E0330 - cmp r6, #0x41 - sub r0, r8, #0x5 - bne _020E02F4 - ldr r3, _020E0584 ; =0x02106DC0 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E02F4: - ldr r3, _020E0588 ; =0x02106DC8 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0330: - cmp r6, #0x41 - sub r0, r8, #0x4 - bne _020E0370 - ldr r3, _020E058C ; =0x02106DD0 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E0370: - ldr r3, _020E0590 ; =0x02106DD4 - add sp, sp, #0x44 - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E03A4: - mov r3, r10 - mov r1, #0x1 - mov r0, #0x64 - add r9, sp, #0x68 - strb r1, [sp, #0x34] - strb r1, [sp, #0x35] - strb r3, [sp, #0x36] - strb r3, [sp, #0x37] - strb r3, [sp, #0x38] - str r3, [sp, #0x3c] - str r1, [sp, #0x40] - strb r0, [sp, #0x39] -_020E03D4: - rsb r1, r3, #0x7 - ldrsb r2, [r9, r3] - ldrsb r0, [r9, r1] - strb r0, [r9, r3] - add r3, r3, #0x1 - strb r2, [r9, r1] - cmp r3, #0x4 - blt _020E03D4 - ldrb r0, [sp, #0x69] - ldrb r1, [sp, #0x68] - ldr sb, _020E0594 ; =0x000007FF - mov r0, r0, lsl #0x11 - orr r1, r0, r1, lsl #0x19 - add r0, sp, #0x34 - and lr, r9, r1, lsr #0x15 - sub r12, sp, #0x8 - ldmia r0, {r0-r3} - stmia r12, {r0-r3} - rsb r0, r9, #0x400 - mov r1, r8 - add r0, lr, r0 - ldmia r12, {r2-r3} - bl long2str - cmp r6, #0x61 - moveq r1, #0x70 - movne r1, #0x50 - strb r1, [r0, #-0x1]! - mov r1, r7, lsl #0x2 - mov lr, r7 - cmp r7, #0x1 - add r8, r1, #0xb - add r12, sp, #0x68 - blt _020E04E4 - mov r9, #0x30 -_020E045C: - cmp r8, #0x40 - bge _020E04CC - ldrb r1, [r12, r8, asr #0x3] - and r2, r8, #0x7 - rsb r3, r2, #0x7 - mov r2, r1, asr r3 - sub r10, r8, #0x4 - bic r1, r8, #0x7 - bic r10, r10, #0x7 - cmp r1, r10 - add r10, r12, r8, asr #0x3 - and r1, r2, #0xff - beq _020E04A0 - ldrb r2, [r10, #-0x1] - mov r2, r2, lsl #0x8 - orr r1, r1, r2, asr r3 - and r1, r1, #0xff -_020E04A0: - and r1, r1, #0xf - cmp r1, #0xa - addcc r1, r1, #0x30 - andcc r1, r1, #0xff - blo _020E04D0 - cmp r6, #0x61 - addeq r1, r1, #0x57 - andeq r1, r1, #0xff - addne r1, r1, #0x37 - andne r1, r1, #0xff - b _020E04D0 -_020E04CC: - mov r1, r9 -_020E04D0: - sub lr, lr, #0x1 - cmp lr, #0x1 - strb r1, [r0, #-0x1]! - sub r8, r8, #0x4 - bge _020E045C -_020E04E4: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r1, #0x2e - strneb r1, [r0, #-0x1]! - mov r1, #0x31 - strb r1, [r0, #-0x1] - cmp r6, #0x61 - moveq r1, #0x78 - movne r1, #0x58 - strb r1, [r0, #-0x2]! - mov r1, #0x30 - strb r1, [r0, #-0x1]! - ldrsb r1, [sp, #0xc] - cmp r1, #0x0 - movne r1, #0x2d - strneb r1, [r0, #-0x1]! - addne sp, sp, #0x44 - ldmneia sp!, {r3-r10,lr} - addne sp, sp, #0x10 - bxne lr - cmp r4, #0x1 - moveq r1, #0x2b - streqb r1, [r0, #-0x1]! - addeq sp, sp, #0x44 - ldmeqia sp!, {r3-r10,lr} - addeq sp, sp, #0x10 - bxeq lr - cmp r4, #0x2 - moveq r1, #0x20 - streqb r1, [r0, #-0x1]! - add sp, sp, #0x44 - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E056C: .word 0x000001FD -_020E0570: .word 0x02106DA0 -_020E0574: .word 0x02106DA8 -_020E0578: .word 0x02106DB0 -_020E057C: .word 0x02106DB8 -_020E0580: .word 0x02106DBC -_020E0584: .word 0x02106DC0 -_020E0588: .word 0x02106DC8 -_020E058C: .word 0x02106DD0 -_020E0590: .word 0x02106DD4 -_020E0594: .word 0x000007FF - - arm_func_start round_decimal -round_decimal: ; 0x020E0598 - stmdb sp!, {r4,lr} - cmp r1, #0x0 - bge _020E05C0 -_020E05A4: - mov r1, #0x0 - strh r1, [r0, #0x2] - mov r1, #0x1 - strb r1, [r0, #0x4] - mov r1, #0x30 - strb r1, [r0, #0x5] - ldmia sp!, {r4,pc} -_020E05C0: - ldrb lr, [r0, #0x4] - cmp r1, lr - ldmgeia sp!, {r4,pc} -_020E05CC: ; 0x020E05CC - add r12, r0, #0x5 - add r2, r12, r1 - add r2, r2, #0x1 - ldrsb r3, [r2, #-0x1]! - sub r3, r3, #0x30 - mov r3, r3, lsl #0x18 - mov r3, r3, asr #0x18 - cmp r3, #0x5 - bne _020E0620 - add r12, r12, lr -_020E05F4: - sub r12, r12, #0x1 - cmp r12, r2 - bls _020E060C - ldrsb r3, [r12, #0x0] - cmp r3, #0x30 - beq _020E05F4 -_020E060C: - cmp r12, r2 - ldreqsb r3, [r2, #-0x1] - andeq r4, r3, #0x1 - movne r4, #0x1 - b _020E0628 -_020E0620: - movgt r4, #0x1 - movle r4, #0x0 -_020E0628: - cmp r1, #0x0 - beq _020E0684 - mov r12, #0x0 - mov lr, #0x1 -_020E0638: - ldrsb r3, [r2, #-0x1]! - sub r3, r3, #0x30 - add r3, r3, r4 - mov r3, r3, lsl #0x18 - mov r3, r3, asr #0x18 - cmp r3, #0x9 - movgt r4, lr - movle r4, r12 - cmp r4, #0x0 - bne _020E0668 - cmp r3, #0x0 - bne _020E0670 -_020E0668: - sub r1, r1, #0x1 - b _020E067C -_020E0670: - add r3, r3, #0x30 - strb r3, [r2, #0x0] - b _020E0684 -_020E067C: - cmp r1, #0x0 - bne _020E0638 -_020E0684: - cmp r4, #0x0 - beq _020E06AC - ldrsh r3, [r0, #0x2] - mov r2, #0x1 - mov r1, #0x31 - add r3, r3, #0x1 - strh r3, [r0, #0x2] - strb r2, [r0, #0x4] - strb r1, [r0, #0x5] - ldmia sp!, {r4,pc} -_020E06AC: - cmp r1, #0x0 - beq _020E05A4 - strb r1, [r0, #0x4] - ldmia sp!, {r4,pc} - - arm_func_start float2str -float2str: ; 0x020E06BC - stmdb sp!, {r0-r3} - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x2c - ldr r7, [sp, #0x68] - ldr r3, _020E0DF4 ; =0x000001FD - ldrb r6, [sp, #0x61] - ldrb r5, [sp, #0x5f] - ldrb r4, [sp, #0x5d] - cmp r7, r3 - mov r10, r0 - mov r8, r1 - mov r9, r2 - addgt sp, sp, #0x2c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - mov r12, #0x0 - mov r11, #0x20 - add r0, sp, #0x0 - add r3, sp, #0x4 - mov r1, r10 - mov r2, r8 - strb r12, [sp, #0x0] - strh r11, [sp, #0x2] - bl __num2dec_internal2 - ldrb r0, [sp, #0x8] - add r1, sp, #0x9 - add r0, r1, r0 - b _020E074C -_020E0734: - ldrb r2, [sp, #0x8] - ldrsh r1, [sp, #0x6] - sub r2, r2, #0x1 - add r1, r1, #0x1 - strb r2, [sp, #0x8] - strh r1, [sp, #0x6] -_020E074C: - ldrb r1, [sp, #0x8] - cmp r1, #0x1 - bls _020E0764 - ldrsb r1, [r0, #-0x1]! - cmp r1, #0x30 - beq _020E0734 -_020E0764: - ldrb r0, [sp, #0x9] - cmp r0, #0x30 - beq _020E0784 - cmp r0, #0x49 - beq _020E0790 - cmp r0, #0x4e - beq _020E08F0 - b _020E0A44 -_020E0784: - mov r0, #0x0 - strh r0, [sp, #0x6] - b _020E0A44 -_020E0790: - mov r2, #0x0 - mov r0, r10 - mov r1, r8 - mov r3, r2 - bl _dls - bhs _020E0854 - cmp r6, #0x0 - sub r0, r9, #0x5 - blt _020E07BC - cmp r6, #0x80 - blt _020E07C4 -_020E07BC: - mov r1, #0x0 - b _020E07D4 -_020E07C4: - ldr r1, _020E0DF8 ; =0x0210430C - mov r2, r6, lsl #0x1 - ldrh r1, [r1, r2] - and r1, r1, #0x200 -_020E07D4: - cmp r1, #0x0 - beq _020E0818 - ldr r3, _020E0DFC ; =0x02106DA8 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E0818: - ldr r3, _020E0E00 ; =0x02106DB0 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E0854: - cmp r6, #0x0 - sub r0, r9, #0x4 - blt _020E0868 - cmp r6, #0x80 - blt _020E0870 -_020E0868: - mov r1, #0x0 - b _020E0880 -_020E0870: - ldr r1, _020E0DF8 ; =0x0210430C - mov r2, r6, lsl #0x1 - ldrh r1, [r1, r2] - and r1, r1, #0x200 -_020E0880: - cmp r1, #0x0 - beq _020E08BC - ldr r3, _020E0E04 ; =0x02106DB8 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E08BC: - ldr r3, _020E0E08 ; =0x02106DBC - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E08F0: - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - beq _020E09A8 - cmp r6, #0x0 - sub r0, r9, #0x5 - blt _020E0910 - cmp r6, #0x80 - blt _020E0918 -_020E0910: - mov r1, #0x0 - b _020E0928 -_020E0918: - ldr r1, _020E0DF8 ; =0x0210430C - mov r2, r6, lsl #0x1 - ldrh r1, [r1, r2] - and r1, r1, #0x200 -_020E0928: - cmp r1, #0x0 - beq _020E096C - ldr r3, _020E0E0C ; =0x02106DC0 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E096C: - ldr r3, _020E0E10 ; =0x02106DC8 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldrb r1, [r3, #0x4] - strb r1, [r0, #0x4] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E09A8: - cmp r6, #0x0 - sub r0, r9, #0x4 - blt _020E09BC - cmp r6, #0x80 - blt _020E09C4 -_020E09BC: - mov r1, #0x0 - b _020E09D4 -_020E09C4: - ldr r1, _020E0DF8 ; =0x0210430C - mov r2, r6, lsl #0x1 - ldrh r1, [r1, r2] - and r1, r1, #0x200 -_020E09D4: - cmp r1, #0x0 - beq _020E0A10 - ldr r3, _020E0E14 ; =0x02106DD0 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E0A10: - ldr r3, _020E0E18 ; =0x02106DD4 - add sp, sp, #0x2c - ldrb r2, [r3, #0x0] - ldrb r1, [r3, #0x1] - strb r2, [r0, #0x0] - strb r1, [r0, #0x1] - ldrb r2, [r3, #0x2] - ldrb r1, [r3, #0x3] - strb r2, [r0, #0x2] - strb r1, [r0, #0x3] - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E0A44: - ldrb r0, [sp, #0x8] - ldrsh r1, [sp, #0x6] - sub r8, r9, #0x1 - sub r0, r0, #0x1 - add r0, r1, r0 - strh r0, [sp, #0x6] - mov r0, #0x0 - strb r0, [r8, #0x0] - cmp r6, #0x65 - bgt _020E0A98 - bge _020E0B24 - cmp r6, #0x47 - bgt _020E0DE0 - cmp r6, #0x45 - blt _020E0DE0 - beq _020E0B24 - cmp r6, #0x46 - beq _020E0C6C - cmp r6, #0x47 - beq _020E0AB0 - b _020E0DE0 -_020E0A98: - cmp r6, #0x66 - bgt _020E0AA8 - beq _020E0C6C - b _020E0DE0 -_020E0AA8: - cmp r6, #0x67 - bne _020E0DE0 -_020E0AB0: - ldrb r0, [sp, #0x8] - cmp r0, r7 - ble _020E0AC8 - add r0, sp, #0x4 - mov r1, r7 - bl round_decimal -_020E0AC8: - ldrsh r2, [sp, #0x6] - mvn r0, #0x3 - cmp r2, r0 - blt _020E0AE0 - cmp r2, r7 - blt _020E0B00 -_020E0AE0: - cmp r5, #0x0 - ldreqb r0, [sp, #0x8] - subne r7, r7, #0x1 - subeq r7, r0, #0x1 - cmp r6, #0x67 - moveq r6, #0x65 - movne r6, #0x45 - b _020E0B24 -_020E0B00: - cmp r5, #0x0 - addne r0, r2, #0x1 - subne r7, r7, r0 - bne _020E0C6C - ldrb r1, [sp, #0x8] - add r0, r2, #0x1 - subs r7, r1, r0 - movmi r7, #0x0 - b _020E0C6C -_020E0B24: - ldrb r0, [sp, #0x8] - add r1, r7, #0x1 - cmp r0, r1 - ble _020E0B3C - add r0, sp, #0x4 - bl round_decimal -_020E0B3C: - ldrsh lr, [sp, #0x6] - mov r11, #0x2b - mov r10, #0x0 - cmp lr, #0x0 - rsblt lr, lr, #0x0 - movlt r11, #0x2d - ldr r3, _020E0E1C ; =0x66666667 - mov r0, #0xa - b _020E0B90 -_020E0B60: - mov r1, lr, lsr #0x1f - smull r2, r12, r3, lr - add r12, r1, r12, asr #0x2 - smull r1, r2, r0, r12 - sub r12, lr, r1 - add r1, r12, #0x30 - strb r1, [r8, #-0x1]! - mov r2, lr - smull r1, lr, r3, r2 - mov r1, r2, lsr #0x1f - add lr, r1, lr, asr #0x2 - add r10, r10, #0x1 -_020E0B90: - cmp lr, #0x0 - bne _020E0B60 - cmp r10, #0x2 - blt _020E0B60 - strb r11, [r8, #-0x1] - strb r6, [r8, #-0x2]! - sub r1, r9, r8 - ldr r0, _020E0DF4 ; =0x000001FD - add r1, r7, r1 - cmp r1, r0 - addgt sp, sp, #0x2c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - ldrb r1, [sp, #0x8] - add r0, r7, #0x1 - cmp r1, r0 - bge _020E0BFC - add r0, r7, #0x2 - sub r0, r0, r1 - subs r1, r0, #0x1 - beq _020E0BFC - mov r0, #0x30 -_020E0BF0: - strb r0, [r8, #-0x1]! - subs r1, r1, #0x1 - bne _020E0BF0 -_020E0BFC: - ldrb r1, [sp, #0x8] - add r0, sp, #0x9 - add r2, r0, r1 - subs r1, r1, #0x1 - beq _020E0C20 -_020E0C10: - ldrsb r0, [r2, #-0x1]! - subs r1, r1, #0x1 - strb r0, [r8, #-0x1]! - bne _020E0C10 -_020E0C20: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r0, #0x2e - strneb r0, [r8, #-0x1]! - ldrb r0, [sp, #0x9] - strb r0, [r8, #-0x1]! - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r8, #-0x1]! - bne _020E0DE0 - cmp r4, #0x1 - moveq r0, #0x2b - streqb r0, [r8, #-0x1]! - beq _020E0DE0 - cmp r4, #0x2 - moveq r0, #0x20 - streqb r0, [r8, #-0x1]! - b _020E0DE0 -_020E0C6C: - ldrsh r3, [sp, #0x6] - ldrb r2, [sp, #0x8] - sub r0, r2, r3 - subs r1, r0, #0x1 - movmi r1, #0x0 - cmp r1, r7 - ble _020E0CAC - sub r1, r1, r7 - add r0, sp, #0x4 - sub r1, r2, r1 - bl round_decimal - ldrsh r3, [sp, #0x6] - ldrb r2, [sp, #0x8] - sub r0, r2, r3 - subs r1, r0, #0x1 - movmi r1, #0x0 -_020E0CAC: - adds r0, r3, #0x1 - movmi r0, #0x0 - ldr r3, _020E0DF4 ; =0x000001FD - add r6, r0, r1 - cmp r6, r3 - addgt sp, sp, #0x2c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - add r3, sp, #0x9 - sub r6, r7, r1 - cmp r6, #0x0 - add r2, r3, r2 - mov r9, #0x0 - ble _020E0D00 - mov r3, #0x30 -_020E0CF0: - add r9, r9, #0x1 - cmp r9, r6 - strb r3, [r8, #-0x1]! - blt _020E0CF0 -_020E0D00: - mov r6, #0x0 - b _020E0D14 -_020E0D08: - ldrsb r3, [r2, #-0x1]! - add r6, r6, #0x1 - strb r3, [r8, #-0x1]! -_020E0D14: - cmp r6, r1 - ldrltb r3, [sp, #0x8] - cmplt r6, r3 - blt _020E0D08 - cmp r6, r1 - bge _020E0D40 - mov r3, #0x30 -_020E0D30: - add r6, r6, #0x1 - cmp r6, r1 - strb r3, [r8, #-0x1]! - blt _020E0D30 -_020E0D40: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r1, #0x2e - strneb r1, [r8, #-0x1]! - cmp r0, #0x0 - beq _020E0DA8 - ldrb r1, [sp, #0x8] - mov r5, #0x0 - sub r1, r0, r1 - cmp r1, #0x0 - ble _020E0D88 - mov r3, #0x30 -_020E0D70: - strb r3, [r8, #-0x1]! - ldrb r1, [sp, #0x8] - add r5, r5, #0x1 - sub r1, r0, r1 - cmp r5, r1 - blt _020E0D70 -_020E0D88: - cmp r5, r0 - bge _020E0DB0 -_020E0D90: - ldrsb r1, [r2, #-0x1]! - add r5, r5, #0x1 - cmp r5, r0 - strb r1, [r8, #-0x1]! - blt _020E0D90 - b _020E0DB0 -_020E0DA8: - mov r0, #0x30 - strb r0, [r8, #-0x1]! -_020E0DB0: - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r8, #-0x1]! - bne _020E0DE0 - cmp r4, #0x1 - moveq r0, #0x2b - streqb r0, [r8, #-0x1]! - beq _020E0DE0 - cmp r4, #0x2 - moveq r0, #0x20 - streqb r0, [r8, #-0x1]! -_020E0DE0: - mov r0, r8 - add sp, sp, #0x2c - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E0DF4: .word 0x000001FD -_020E0DF8: .word 0x0210430C -_020E0DFC: .word 0x02106DA8 -_020E0E00: .word 0x02106DB0 -_020E0E04: .word 0x02106DB8 -_020E0E08: .word 0x02106DBC -_020E0E0C: .word 0x02106DC0 -_020E0E10: .word 0x02106DC8 -_020E0E14: .word 0x02106DD0 -_020E0E18: .word 0x02106DD4 -_020E0E1C: .word 0x66666667 - - arm_func_start __pformatter -__pformatter: - stmdb sp!, {r0-r3} - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x22c - mov r3, #0x20 - mov r11, r2 - strb r3, [sp, #0x19] - ldrsb r2, [r11, #0x0] - mov r9, r0 - mov r8, r1 - cmp r2, #0x0 - mov r10, #0x0 - beq _020E1628 -_020E0E50: - mov r0, r11 - mov r1, #0x25 - bl strchr - str r0, [sp, #0xc] - cmp r0, #0x0 - bne _020E0EA4 - mov r0, r11 - bl strlen - movs r2, r0 - add r10, r10, r2 - beq _020E1628 - mov r0, r8 - mov r1, r11 - blx r9 - cmp r0, #0x0 - bne _020E1628 - add sp, sp, #0x22c - mvn r0, #0x0 - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E0EA4: - subs r2, r0, r11 - add r10, r10, r2 - beq _020E0ED4 - mov r0, r8 - mov r1, r11 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E0ED4: - ldr r0, [sp, #0xc] - add r1, sp, #0x25c - add r2, sp, #0x1c - bl parse_format_printf - ldrb r1, [sp, #0x21] - mov r11, r0 - cmp r1, #0x61 - bgt _020E0F40 - bge _020E12A4 - cmp r1, #0x47 - bgt _020E0F34 - subs r0, r1, #0x41 - addpl pc, pc, r0, lsl #0x2 - b _020E0F28 -_020E0F0C: ; 0x020E0F0C - b _020E12A4 -_020E0F10: ; 0x020E0F10 - b _020E148C -_020E0F14: ; 0x020E0F14 - b _020E148C -_020E0F18: ; 0x020E0F18 - b _020E148C -_020E0F1C: ; 0x020E0F1C - b _020E123C -_020E0F20: ; 0x020E0F20 - b _020E123C -_020E0F24: ; 0x020E0F24 - b _020E123C -_020E0F28: - cmp r1, #0x25 - beq _020E1478 - b _020E148C -_020E0F34: - cmp r1, #0x58 - beq _020E1100 - b _020E148C -_020E0F40: - cmp r1, #0x75 - bgt _020E0FA8 - subs r0, r1, #0x64 - addpl pc, pc, r0, lsl #0x2 - b _020E0F9C -_020E0F54: ; 0x020E0F54 - b _020E0FC0 -_020E0F58: ; 0x020E0F58 - b _020E123C -_020E0F5C: ; 0x020E0F5C - b _020E123C -_020E0F60: ; 0x020E0F60 - b _020E123C -_020E0F64: ; 0x020E0F64 - b _020E148C -_020E0F68: ; 0x020E0F68 - b _020E0FC0 -_020E0F6C: ; 0x020E0F6C - b _020E148C -_020E0F70: ; 0x020E0F70 - b _020E148C -_020E0F74: ; 0x020E0F74 - b _020E148C -_020E0F78: ; 0x020E0F78 - b _020E148C -_020E0F7C: ; 0x020E0F7C - b _020E13CC -_020E0F80: ; 0x020E0F80 - b _020E1100 -_020E0F84: ; 0x020E0F84 - b _020E148C -_020E0F88: ; 0x020E0F88 - b _020E148C -_020E0F8C: ; 0x020E0F8C - b _020E148C -_020E0F90: ; 0x020E0F90 - b _020E130C -_020E0F94: ; 0x020E0F94 - b _020E148C -_020E0F98: ; 0x020E0F98 - b _020E1100 -_020E0F9C: - cmp r1, #0x63 - beq _020E1458 - b _020E148C -_020E0FA8: - cmp r1, #0x78 - bgt _020E0FB8 - beq _020E1100 - b _020E148C -_020E0FB8: - cmp r1, #0xff - b _020E148C -_020E0FC0: - ldrb r0, [sp, #0x20] - cmp r0, #0x3 - bne _020E0FE0 - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E1078 -_020E0FE0: - cmp r0, #0x4 - bne _020E1008 - ldr r1, [sp, #0x25c] - add r2, r1, #0x8 - str r2, [sp, #0x25c] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E1078 -_020E1008: - cmp r0, #0x6 - bne _020E1030 - ldr r1, [sp, #0x25c] - add r2, r1, #0x8 - str r2, [sp, #0x25c] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E1078 -_020E1030: - cmp r0, #0x7 - bne _020E104C - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E1078 -_020E104C: - cmp r0, #0x8 - bne _020E1068 - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E1078 -_020E1068: - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] -_020E1078: - cmp r0, #0x2 - moveq r1, r5, lsl #0x10 - moveq r5, r1, asr #0x10 - cmp r0, #0x1 - moveq r1, r5, lsl #0x18 - moveq r5, r1, asr #0x18 - cmp r0, #0x4 - cmpne r0, #0x6 - add r0, sp, #0x1c - bne _020E10CC - sub r4, sp, #0x4 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - ldr r3, [r4, #0x0] - ldr r0, [sp, #0x10] - ldr r1, [sp, #0x14] - add r2, sp, #0x22c - bl longlong2str - movs r7, r0 - beq _020E148C - b _020E10F0 -_020E10CC: - sub r4, sp, #0x8 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - add r1, sp, #0x22c - mov r0, r5 - ldmia r4, {r2-r3} - bl long2str - movs r7, r0 - beq _020E148C -_020E10F0: - add r0, sp, #0x200 - add r0, r0, #0x2b - sub r6, r0, r7 - b _020E14D8 -_020E1100: - ldrb r0, [sp, #0x20] - cmp r0, #0x3 - bne _020E1120 - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E11B8 -_020E1120: - cmp r0, #0x4 - bne _020E1148 - ldr r1, [sp, #0x25c] - add r2, r1, #0x8 - str r2, [sp, #0x25c] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E11B8 -_020E1148: - cmp r0, #0x6 - bne _020E1170 - ldr r1, [sp, #0x25c] - add r2, r1, #0x8 - str r2, [sp, #0x25c] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E11B8 -_020E1170: - cmp r0, #0x7 - bne _020E118C - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E11B8 -_020E118C: - cmp r0, #0x8 - bne _020E11A8 - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] - b _020E11B8 -_020E11A8: - ldr r1, [sp, #0x25c] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r5, [r1, #-0x4] -_020E11B8: - cmp r0, #0x2 - moveq r1, r5, lsl #0x10 - moveq r5, r1, lsr #0x10 - cmp r0, #0x1 - andeq r5, r5, #0xff - cmp r0, #0x4 - cmpne r0, #0x6 - add r0, sp, #0x1c - bne _020E1208 - sub r4, sp, #0x4 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - ldr r3, [r4, #0x0] - ldr r0, [sp, #0x10] - ldr r1, [sp, #0x14] - add r2, sp, #0x22c - bl longlong2str - movs r7, r0 - beq _020E148C - b _020E122C -_020E1208: - sub r4, sp, #0x8 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - add r1, sp, #0x22c - mov r0, r5 - ldmia r4, {r2-r3} - bl long2str - movs r7, r0 - beq _020E148C -_020E122C: - add r0, sp, #0x200 - add r0, r0, #0x2b - sub r6, r0, r7 - b _020E14D8 -_020E123C: - ldrb r0, [sp, #0x20] - cmp r0, #0x9 - ldrne r0, [sp, #0x25c] - addne r0, r0, #0x8 - strne r0, [sp, #0x25c] - bne _020E1260 - ldr r0, [sp, #0x25c] - add r0, r0, #0x8 - str r0, [sp, #0x25c] -_020E1260: - ldr r7, [r0, #-0x8] - ldr r6, [r0, #-0x4] - add r0, sp, #0x1c - sub r4, sp, #0x4 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - ldr r3, [r4, #0x0] - mov r0, r7 - mov r1, r6 - add r2, sp, #0x22c - bl float2str - movs r7, r0 - beq _020E148C - add r0, sp, #0x200 - add r0, r0, #0x2b - sub r6, r0, r7 - b _020E14D8 -_020E12A4: - ldrb r0, [sp, #0x20] - cmp r0, #0x9 - ldrne r0, [sp, #0x25c] - addne r0, r0, #0x8 - strne r0, [sp, #0x25c] - bne _020E12C8 - ldr r0, [sp, #0x25c] - add r0, r0, #0x8 - str r0, [sp, #0x25c] -_020E12C8: - ldr r7, [r0, #-0x8] - ldr r6, [r0, #-0x4] - add r0, sp, #0x1c - sub r4, sp, #0x4 - ldmia r0, {r0-r3} - stmia r4, {r0-r3} - ldr r3, [r4, #0x0] - mov r0, r7 - mov r1, r6 - add r2, sp, #0x22c - bl double2hex - movs r7, r0 - beq _020E148C - add r0, sp, #0x200 - add r0, r0, #0x2b - sub r6, r0, r7 - b _020E14D8 -_020E130C: - ldrb r0, [sp, #0x20] - cmp r0, #0x5 - bne _020E134C - ldr r0, [sp, #0x25c] - mov r2, #0x200 - add r0, r0, #0x4 - str r0, [sp, #0x25c] - ldr r1, [r0, #-0x4] - add r0, sp, #0x2c - cmp r1, #0x0 - ldreq r1, _020E163C ; =0x02106DD8 - bl wcstombs -_020E133C: ; 0x020E133C - cmp r0, #0x0 - blt _020E148C - add r7, sp, #0x2c - b _020E135C -_020E134C: - ldr r0, [sp, #0x25c] - add r0, r0, #0x4 - str r0, [sp, #0x25c] - ldr r7, [r0, #-0x4] -_020E135C: - ldrb r0, [sp, #0x1f] - cmp r7, #0x0 - ldreq r7, _020E1640 ; =0x02106DDC - cmp r0, #0x0 - beq _020E1390 - ldrb r0, [sp, #0x1e] - ldrb r6, [r7], #0x1 - cmp r0, #0x0 - beq _020E14D8 - ldr r0, [sp, #0x28] - cmp r6, r0 - movgt r6, r0 - b _020E14D8 -_020E1390: - ldrb r0, [sp, #0x1e] - cmp r0, #0x0 - beq _020E13BC - ldr r6, [sp, #0x28] - mov r0, r7 - mov r2, r6 - mov r1, #0x0 - bl memchr -_020E13B0: ; 0x020E13B0 - cmp r0, #0x0 - subne r6, r0, r7 - b _020E14D8 -_020E13BC: - mov r0, r7 - bl strlen - mov r6, r0 - b _020E14D8 -_020E13CC: - ldr r1, [sp, #0x25c] - ldrb r0, [sp, #0x20] - add r1, r1, #0x4 - str r1, [sp, #0x25c] - ldr r1, [r1, #-0x4] - cmp r0, #0x8 - addls pc, pc, r0, lsl #0x2 - b _020E161C -_020E13EC: - b _020E1410 -_020E13F0: - b _020E161C -_020E13F4: - b _020E1418 -_020E13F8: - b _020E1420 -_020E13FC: - b _020E1448 -_020E1400: - b _020E161C -_020E1404: - b _020E1428 -_020E1408: - b _020E1438 -_020E140C: - b _020E1440 -_020E1410: - str r10, [r1, #0x0] - b _020E161C -_020E1418: - strh r10, [r1, #0x0] - b _020E161C -_020E1420: - str r10, [r1, #0x0] - b _020E161C -_020E1428: - str r10, [r1, #0x0] - mov r0, r10, asr #0x1f - str r0, [r1, #0x4] - b _020E161C -_020E1438: - str r10, [r1, #0x0] - b _020E161C -_020E1440: - str r10, [r1, #0x0] - b _020E161C -_020E1448: - str r10, [r1, #0x0] - mov r0, r10, asr #0x1f - str r0, [r1, #0x4] - b _020E161C -_020E1458: - ldr r0, [sp, #0x25c] - add r7, sp, #0x2c - add r0, r0, #0x4 - str r0, [sp, #0x25c] - ldr r0, [r0, #-0x4] - mov r6, #0x1 - strb r0, [sp, #0x2c] - b _020E14D8 -_020E1478: - mov r0, #0x25 - strb r0, [sp, #0x2c] - add r7, sp, #0x2c - mov r6, #0x1 - b _020E14D8 -_020E148C: - ldr r0, [sp, #0xc] - bl strlen - movs r4, r0 - beq _020E14C4 - ldr r1, [sp, #0xc] - mov r0, r8 - mov r2, r4 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E14C4: - add sp, sp, #0x22c - add r0, r10, r4 - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E14D8: - ldrb r0, [sp, #0x1c] - mov r4, r6 - cmp r0, #0x0 - beq _020E158C - cmp r0, #0x2 - moveq r0, #0x30 - movne r0, #0x20 - strb r0, [sp, #0x19] - ldrsb r0, [r7, #0x0] - cmp r0, #0x2b - cmpne r0, #0x2d - cmpne r0, #0x20 - bne _020E1548 - ldrsb r0, [sp, #0x19] - cmp r0, #0x30 - bne _020E1548 - mov r0, r8 - mov r1, r7 - mov r2, #0x1 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - add r7, r7, #0x1 - sub r6, r6, #0x1 -_020E1548: - ldr r0, [sp, #0x24] - cmp r4, r0 - bge _020E158C -_020E1554: - mov r0, r8 - add r1, sp, #0x19 - mov r2, #0x1 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r0, [sp, #0x24] - add r4, r4, #0x1 - cmp r4, r0 - blt _020E1554 -_020E158C: - cmp r6, #0x0 - beq _020E15BC - mov r0, r8 - mov r1, r7 - mov r2, r6 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E15BC: - ldrb r0, [sp, #0x1c] - cmp r0, #0x0 - bne _020E1618 - ldr r0, [sp, #0x24] - cmp r4, r0 - bge _020E1618 - mov r6, #0x20 - add r7, sp, #0x18 -_020E15DC: - mov r0, r8 - mov r1, r7 - mov r2, #0x1 - strb r6, [sp, #0x18] - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x22c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r0, [sp, #0x24] - add r4, r4, #0x1 - cmp r4, r0 - blt _020E15DC -_020E1618: - add r10, r10, r4 -_020E161C: - ldrsb r0, [r11, #0x0] - cmp r0, #0x0 - bne _020E0E50 -_020E1628: - mov r0, r10 - add sp, sp, #0x22c - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E163C: .word 0x02106DD8 -_020E1640: .word 0x02106DDC - - arm_func_start __FileWrite -__FileWrite: ; 0x020E1644 - stmdb sp!, {r3-r5,lr} - mov r5, r0 - mov r0, r1 - mov r3, r5 - mov r1, #0x1 - mov r4, r2 - bl __fwrite -_020E1660: ; 0x020E1660 - cmp r4, r0 - movne r5, #0x0 - mov r0, r5 - ldmia sp!, {r3-r5,pc} - - arm_func_start __StringWrite -__StringWrite: ; 0x020E1670 - stmdb sp!, {r3-r5,lr} - mov r4, r0 - ldr r3, [r4, #0x8] - mov r5, r2 - ldr r2, [r4, #0x4] - add r0, r3, r5 - cmp r0, r2 - ldr r0, [r4, #0x0] - subhi r5, r2, r3 - mov r2, r5 - add r0, r0, r3 - bl memcpy - ldr r1, [r4, #0x8] - mov r0, #0x1 - add r1, r1, r5 - str r1, [r4, #0x8] - ldmia sp!, {r3-r5,pc} - - arm_func_start printf -printf: ; 0x020E16B4 - stmdb sp!, {r0-r3} - stmdb sp!, {r4,lr} - ldr r0, _020E17B4 ; =0x02106AA4 - mvn r1, #0x0 - bl fwide -_020E16C8: ; 0x020E16C8 - cmp r0, #0x0 - mvnge r0, #0x0 - ldmgeia sp!, {r4,lr} - addge sp, sp, #0x10 - bxge lr - ldr r0, _020E17B8 ; =0x021D7118 - bl OS_TryLockMutex -_020E16E4: ; 0x020E16E4 - cmp r0, #0x0 - bne _020E1710 - ldr r0, _020E17BC ; =0x021D3498 - ldr r1, _020E17C0 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020E17C4 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0xc] - str r2, [r0, #0xc] - b _020E1768 -_020E1710: - ldr r0, _020E17BC ; =0x021D3498 - ldr r1, _020E17C0 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, #0xc] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020E1740 - ldr r0, _020E17C4 ; =0x021D70AC - ldr r1, [r0, #0xc] - add r1, r1, #0x1 - str r1, [r0, #0xc] - b _020E1768 -_020E1740: - ldr r0, _020E17B8 ; =0x021D7118 - bl OS_LockMutex - ldr r0, _020E17BC ; =0x021D3498 - ldr r1, _020E17C0 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020E17C4 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0xc] - str r2, [r0, #0xc] -_020E1768: - add r0, sp, #0x8 - bic r3, r0, #0x3 - ldr r2, [sp, #0x8] - ldr r0, _020E17C8 ; =__FileWrite - ldr r1, _020E17B4 ; =0x02106AA4 - add r3, r3, #0x4 - bl __pformatter - ldr r1, _020E17C4 ; =0x021D70AC - mov r4, r0 - ldr r0, [r1, #0xc] - subs r0, r0, #0x1 - str r0, [r1, #0xc] - bne _020E17A4 - ldr r0, _020E17B8 ; =0x021D7118 - bl OS_UnlockMutex -_020E17A4: - mov r0, r4 - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E17B4: .word 0x02106AA4 -_020E17B8: .word 0x021D7118 -_020E17BC: .word 0x021D3498 -_020E17C0: .word 0x021D7088 -_020E17C4: .word 0x021D70AC -_020E17C8: .word __FileWrite - - arm_func_start vsnprintf -vsnprintf: ; 0x020E17CC - stmdb sp!, {r4-r5,lr} - sub sp, sp, #0xc - mov r5, r0 - mov r4, r1 - mov r12, #0x0 - ldr r0, _020E1830 ; =__StringWrite - add r1, sp, #0x0 - str r5, [sp, #0x0] - str r4, [sp, #0x4] - str r12, [sp, #0x8] - bl __pformatter -_020E17F8: ; 0x020E17F8 - cmp r5, #0x0 - addeq sp, sp, #0xc - ldmeqia sp!, {r4-r5,pc} -_020E1804: ; 0x020E1804 - cmp r0, r4 - movcc r1, #0x0 - addcc sp, sp, #0xc - strccb r1, [r5, r0] - ldmccia sp!, {r4-r5,pc} -_020E1818: ; 0x020E1818 - cmp r4, #0x0 - addne r1, r5, r4 - movne r2, #0x0 - strneb r2, [r1, #-0x1] - add sp, sp, #0xc - ldmia sp!, {r4-r5,pc} - .balign 4 -_020E1830: .word __StringWrite - - arm_func_start snprintf -snprintf: ; 0x020E1834 - stmdb sp!, {r0-r3} - stmdb sp!, {r3,lr} - add r3, sp, #0x10 - bic r3, r3, #0x3 - ldr r2, [sp, #0x10] - add r3, r3, #0x4 - bl vsnprintf - ldmia sp!, {r3,lr} - add sp, sp, #0x10 - bx lr - - arm_func_start sprintf -sprintf: ; 0x020E185C - stmdb sp!, {r0-r3} - stmdb sp!, {r3,lr} - add r1, sp, #0xc - bic r1, r1, #0x3 - add r3, r1, #0x4 - ldr r2, [sp, #0xc] - mvn r1, #0x0 - bl vsnprintf - ldmia sp!, {r3,lr} - add sp, sp, #0x10 - bx lr - - arm_func_start qsort -qsort: ; 0x020E1888 - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x10 - mov r9, r1 - cmp r9, #0x2 - mov r10, r0 - mov r8, r2 - mov r7, r3 - addcc sp, sp, #0x10 - ldmccia sp!, {r3-r11,pc} -_020E18AC: ; 0x020E18AC - mov r0, r9, lsr #0x1 - add r11, r0, #0x1 - sub r0, r11, #0x1 - mla r0, r8, r0, r10 - sub r2, r9, #0x1 - str r0, [sp, #0xc] - mla r0, r8, r2, r10 - str r0, [sp, #0x8] - mul r0, r11, r8 - mvn r1, #0x0 - str r0, [sp, #0x4] - mul r0, r8, r1 - str r0, [sp, #0x0] -_020E18E0: - cmp r11, #0x1 - bls _020E1908 - ldr r0, [sp, #0x4] - sub r11, r11, #0x1 - sub r0, r0, r8 - str r0, [sp, #0x4] - ldr r0, [sp, #0xc] - sub r0, r0, r8 - str r0, [sp, #0xc] - b _020E1950 -_020E1908: - mov r2, r8 - ldr r4, [sp, #0x8] - ldr r3, [sp, #0xc] - cmp r8, #0x0 - beq _020E1934 -_020E191C: - ldrsb r0, [r4, #0x0] - ldrsb r1, [r3, #0x0] - subs r2, r2, #0x1 - strb r0, [r3], #0x1 - strb r1, [r4], #0x1 - bne _020E191C -_020E1934: - sub r9, r9, #0x1 - cmp r9, #0x1 - addeq sp, sp, #0x10 - ldmeqia sp!, {r3-r11,pc} -_020E1944: ; 0x020E1944 - ldr r0, [sp, #0x8] - sub r0, r0, r8 - str r0, [sp, #0x8] -_020E1950: - ldr r1, [sp, #0x4] - ldr r0, [sp, #0x0] - mov r4, r11 - add r0, r1, r0 - cmp r9, r11, lsl #0x1 - add r5, r10, r0 - blo _020E18E0 -_020E196C: - mov r4, r4, lsl #0x1 - sub r0, r4, #0x1 - mov r6, r5 - mla r5, r8, r0, r10 - cmp r9, r4 - bls _020E199C - mov r0, r5 - add r1, r5, r8 - blx r7 - cmp r0, #0x0 - addlt r4, r4, #0x1 - addlt r5, r5, r8 -_020E199C: - mov r0, r6 - mov r1, r5 - blx r7 - cmp r0, #0x0 - bge _020E18E0 - mov r2, r8 - mov r3, r5 - cmp r8, #0x0 - beq _020E19D8 -_020E19C0: - ldrsb r1, [r6, #0x0] - ldrsb r0, [r3, #0x0] - subs r2, r2, #0x1 - strb r0, [r6], #0x1 - strb r1, [r3], #0x1 - bne _020E19C0 -_020E19D8: - cmp r9, r4, lsl #0x1 - bhs _020E196C - b _020E18E0 -_020E19E4: ; 0x020E19E4 - add sp, sp, #0x10 - ldmia sp!, {r3-r11,pc} - - arm_func_start rand -rand: ; 0x020E19EC - ldr r2, _020E1A14 ; =0x02106DE0 - ldr r0, _020E1A18 ; =0x41C64E6D - ldr r3, [r2, #0x0] - ldr r1, _020E1A1C ; =0x00007FFF - mul r0, r3, r0 - add r0, r0, #0x39 - add r0, r0, #0x3000 - str r0, [r2, #0x0] - and r0, r1, r0, lsr #0x10 - bx lr - .balign 4 -_020E1A14: .word 0x02106DE0 -_020E1A18: .word 0x41C64E6D -_020E1A1C: .word 0x00007FFF - - arm_func_start srand -srand: ; 0x020E1A20 - ldr r1, _020E1A2C ; =0x02106DE0 - str r0, [r1, #0x0] - bx lr - .balign 4 -_020E1A2C: .word 0x02106DE0 - - arm_func_start parse_format_scanf -parse_format_scanf: ; 0x020E1A30 - stmdb sp!, {r3-r7,lr} - sub sp, sp, #0x28 - ldr r6, _020E1F20 ; =0x0210440C - add r5, sp, #0x0 - mov r7, r0 - mov lr, r1 - mov r4, r5 - ldmia r6!, {r0-r3} - stmia r5!, {r0-r3} - ldmia r6!, {r0-r3} - stmia r5!, {r0-r3} - ldmia r6, {r0-r1} - stmia r5, {r0-r1} - ldrsb r0, [r7, #0x1] - add r12, r7, #0x1 - cmp r0, #0x25 - bne _020E1A9C - strb r0, [sp, #0x3] - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4, {r0-r1} - stmia lr, {r0-r1} - add sp, sp, #0x28 - add r0, r12, #0x1 - ldmia sp!, {r3-r7,pc} -_020E1A9C: - cmp r0, #0x2a - moveq r0, #0x1 - streqb r0, [sp, #0x0] - ldreqsb r0, [r12, #0x1]! - cmp r0, #0x0 - blt _020E1ABC - cmp r0, #0x80 - blt _020E1AC4 -_020E1ABC: - mov r1, #0x0 - b _020E1AD4 -_020E1AC4: - ldr r1, _020E1F24 ; =0x0210430C - mov r2, r0, lsl #0x1 - ldrh r1, [r1, r2] - and r1, r1, #0x8 -_020E1AD4: - cmp r1, #0x0 - beq _020E1B74 - mov r1, #0x0 - ldr r3, _020E1F24 ; =0x0210430C - str r1, [sp, #0x4] - mov r4, r1 - mov r1, #0xa -_020E1AF0: - ldr r2, [sp, #0x4] - sub r0, r0, #0x30 - mla r0, r2, r1, r0 - str r0, [sp, #0x4] - ldrsb r0, [r12, #0x1]! - cmp r0, #0x0 - blt _020E1B14 - cmp r0, #0x80 - blt _020E1B1C -_020E1B14: - mov r2, r4 - b _020E1B28 -_020E1B1C: - mov r2, r0, lsl #0x1 - ldrh r2, [r3, r2] - and r2, r2, #0x8 -_020E1B28: - cmp r2, #0x0 - bne _020E1AF0 - ldr r1, [sp, #0x4] - cmp r1, #0x0 - bne _020E1B6C - mov r0, #0xff - add r4, sp, #0x0 - strb r0, [sp, #0x3] - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4, {r0-r1} - stmia lr, {r0-r1} - add sp, sp, #0x28 - add r0, r12, #0x1 - ldmia sp!, {r3-r7,pc} -_020E1B6C: - mov r1, #0x1 - strb r1, [sp, #0x1] -_020E1B74: - cmp r0, #0x6c - mov r1, #0x1 - bgt _020E1BAC - cmp r0, #0x68 - blt _020E1BA0 - beq _020E1BC8 - cmp r0, #0x6a - beq _020E1C14 - cmp r0, #0x6c - beq _020E1BE4 - b _020E1C38 -_020E1BA0: - cmp r0, #0x4c - beq _020E1C08 - b _020E1C38 -_020E1BAC: - cmp r0, #0x74 - bgt _020E1BBC - beq _020E1C2C - b _020E1C38 -_020E1BBC: - cmp r0, #0x7a - beq _020E1C20 - b _020E1C38 -_020E1BC8: - mov r2, #0x2 - strb r2, [sp, #0x2] - ldrsb r2, [r12, #0x1] - cmp r2, #0x68 - streqb r1, [sp, #0x2] - ldreqsb r0, [r12, #0x1]! - b _020E1C3C -_020E1BE4: - mov r2, #0x3 - strb r2, [sp, #0x2] - ldrsb r2, [r12, #0x1] - cmp r2, #0x6c - bne _020E1C3C - mov r0, #0x7 - strb r0, [sp, #0x2] - ldrsb r0, [r12, #0x1]! - b _020E1C3C -_020E1C08: - mov r2, #0x9 - strb r2, [sp, #0x2] - b _020E1C3C -_020E1C14: - mov r2, #0x4 - strb r2, [sp, #0x2] - b _020E1C3C -_020E1C20: - mov r2, #0x5 - strb r2, [sp, #0x2] - b _020E1C3C -_020E1C2C: - mov r2, #0x6 - strb r2, [sp, #0x2] - b _020E1C3C -_020E1C38: - mov r1, #0x0 -_020E1C3C: - cmp r1, #0x0 - ldrnesb r0, [r12, #0x1]! - strb r0, [sp, #0x3] - cmp r0, #0x5b - bgt _020E1C90 - bge _020E1DE0 - cmp r0, #0x47 - bgt _020E1C84 - subs r1, r0, #0x41 - addpl pc, pc, r1, lsl #0x2 - b _020E1EF0 -_020E1C68: ; 0x020E1C68 - b _020E1D1C -_020E1C6C: ; 0x020E1C6C - b _020E1EF0 -_020E1C70: ; 0x020E1C70 - b _020E1EF0 -_020E1C74: ; 0x020E1C74 - b _020E1EF0 -_020E1C78: ; 0x020E1C78 - b _020E1D1C -_020E1C7C: ; 0x020E1C7C - b _020E1D1C -_020E1C80: ; 0x020E1C80 - b _020E1D1C -_020E1C84: - cmp r0, #0x58 - beq _020E1D08 - b _020E1EF0 -_020E1C90: - cmp r0, #0x61 - bgt _020E1CA0 - beq _020E1D1C - b _020E1EF0 -_020E1CA0: - sub r0, r0, #0x63 - cmp r0, #0x15 - addls pc, pc, r0, lsl #0x2 - b _020E1EF0 -_020E1CB0: - b _020E1D6C -_020E1CB4: - b _020E1D08 -_020E1CB8: - b _020E1D1C -_020E1CBC: - b _020E1D1C -_020E1CC0: - b _020E1D1C -_020E1CC4: - b _020E1EF0 -_020E1CC8: - b _020E1D08 -_020E1CCC: - b _020E1EF0 -_020E1CD0: - b _020E1EF0 -_020E1CD4: - b _020E1EF0 -_020E1CD8: - b _020E1EF0 -_020E1CDC: - b _020E1EF8 -_020E1CE0: - b _020E1D08 -_020E1CE4: - b _020E1D58 -_020E1CE8: - b _020E1EF0 -_020E1CEC: - b _020E1EF0 -_020E1CF0: - b _020E1D90 -_020E1CF4: - b _020E1EF0 -_020E1CF8: - b _020E1D08 -_020E1CFC: - b _020E1EF0 -_020E1D00: - b _020E1EF0 -_020E1D04: - b _020E1D08 -_020E1D08: - ldrb r0, [sp, #0x2] - cmp r0, #0x9 - moveq r0, #0xff - streqb r0, [sp, #0x3] - b _020E1EF8 -_020E1D1C: - ldrb r1, [sp, #0x2] - cmp r1, #0x1 - cmpne r1, #0x2 - beq _020E1D3C - add r0, r1, #0xfc - and r0, r0, #0xff - cmp r0, #0x3 - bhi _020E1D48 -_020E1D3C: - mov r0, #0xff - strb r0, [sp, #0x3] - b _020E1EF8 -_020E1D48: - cmp r1, #0x3 - moveq r0, #0x8 - streqb r0, [sp, #0x2] - b _020E1EF8 -_020E1D58: - mov r1, #0x3 - mov r0, #0x78 - strb r1, [sp, #0x2] - strb r0, [sp, #0x3] - b _020E1EF8 -_020E1D6C: - ldrb r0, [sp, #0x2] - cmp r0, #0x3 - moveq r0, #0xa - streqb r0, [sp, #0x2] - beq _020E1EF8 - cmp r0, #0x0 - movne r0, #0xff - strneb r0, [sp, #0x3] - b _020E1EF8 -_020E1D90: - ldrb r0, [sp, #0x2] - cmp r0, #0x3 - moveq r0, #0xa - streqb r0, [sp, #0x2] - beq _020E1DB0 - cmp r0, #0x0 - movne r0, #0xff - strneb r0, [sp, #0x3] -_020E1DB0: - add r2, sp, #0x8 - mov r1, #0x20 - mov r0, #0xff -_020E1DBC: - sub r1, r1, #0x1 - cmp r1, #0x0 - strb r0, [r2], #0x1 - bgt _020E1DBC - mov r1, #0xc1 - mov r0, #0xfe - strb r1, [sp, #0x9] - strb r0, [sp, #0xc] - b _020E1EF8 -_020E1DE0: - ldrb r0, [sp, #0x2] - cmp r0, #0x3 - moveq r0, #0xa - streqb r0, [sp, #0x2] - beq _020E1E00 - cmp r0, #0x0 - movne r0, #0xff - strneb r0, [sp, #0x3] -_020E1E00: - ldrsb r2, [r12, #0x1]! - mov r1, #0x0 - cmp r2, #0x5e - ldreqsb r2, [r12, #0x1]! - moveq r1, #0x1 - cmp r2, #0x5d - bne _020E1EA8 - ldrb r0, [sp, #0x13] - orr r0, r0, #0x20 - strb r0, [sp, #0x13] - ldrsb r2, [r12, #0x1]! - b _020E1EA8 -_020E1E30: - add r0, sp, #0x0 - and r3, r2, #0xff - add r6, r0, r3, asr #0x3 - ldrb r5, [r6, #0x8] - and r3, r2, #0x7 - mov r4, #0x1 - orr r3, r5, r4, lsl r3 - strb r3, [r6, #0x8] - ldrsb r3, [r12, #0x1] - cmp r3, #0x2d - bne _020E1EA4 - ldrsb r7, [r12, #0x2] - cmp r7, #0x0 - cmpne r7, #0x5d - beq _020E1EA4 - add r2, r2, #0x1 - cmp r2, r7 - bgt _020E1E9C -_020E1E78: - and r3, r2, #0xff - add r6, r0, r3, asr #0x3 - ldrb r5, [r6, #0x8] - and r3, r2, #0x7 - add r2, r2, #0x1 - orr r3, r5, r4, lsl r3 - strb r3, [r6, #0x8] - cmp r2, r7 - ble _020E1E78 -_020E1E9C: - ldrsb r2, [r12, #0x3]! - b _020E1EA8 -_020E1EA4: - ldrsb r2, [r12, #0x1]! -_020E1EA8: - cmp r2, #0x0 - cmpne r2, #0x5d - bne _020E1E30 - cmp r2, #0x0 - moveq r0, #0xff - streqb r0, [sp, #0x3] - beq _020E1EF8 - cmp r1, #0x0 - beq _020E1EF8 - add r2, sp, #0x8 - mov r1, #0x20 -_020E1ED4: - ldrb r0, [r2, #0x0] - sub r1, r1, #0x1 - cmp r1, #0x0 - mvn r0, r0 - strb r0, [r2], #0x1 - bgt _020E1ED4 - b _020E1EF8 -_020E1EF0: - mov r0, #0xff - strb r0, [sp, #0x3] -_020E1EF8: - add r4, sp, #0x0 - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4!, {r0-r3} - stmia lr!, {r0-r3} - ldmia r4, {r0-r1} - stmia lr, {r0-r1} - add r0, r12, #0x1 - add sp, sp, #0x28 - ldmia sp!, {r3-r7,pc} - .balign 4 -_020E1F20: .word 0x0210440C -_020E1F24: .word 0x0210430C - - arm_func_start __sformatter -__sformatter: ; 0x020E1F28 - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x88 - ldrsb r5, [r2, #0x0] - str r2, [sp, #0xc] - mov r2, #0x0 - mov r9, r0 - mov r0, r2 - str r2, [sp, #0x20] - mov r8, r1 - str r3, [sp, #0x10] - str r0, [sp, #0x24] - cmp r5, #0x0 - ldr r10, [sp, #0xb0] - str r0, [sp, #0x30] - mov r4, r2 - str r0, [sp, #0x44] - str r0, [sp, #0x40] - beq _020E2C3C -_020E1F70: - cmp r5, #0x0 - mov r0, #0x1 - blt _020E1F84 - cmp r5, #0x80 - movlt r0, #0x0 -_020E1F84: - cmp r0, #0x0 - movne r0, #0x0 - bne _020E1FA0 - mov r1, r5, lsl #0x1 - ldr r0, _020E2C74 ; =0x0210430C - ldrh r0, [r0, r1] - and r0, r0, #0x100 -_020E1FA0: - cmp r0, #0x0 - beq _020E2060 - mov r2, #0x0 - ldr r1, _020E2C74 ; =0x0210430C - mov r12, r2 - mov r3, #0x1 -_020E1FB8: - ldr r0, [sp, #0xc] - ldrsb r5, [r0, #0x1]! - str r0, [sp, #0xc] - mov r0, r3 - cmp r5, #0x0 - blt _020E1FD8 - cmp r5, #0x80 - movlt r0, r2 -_020E1FD8: - cmp r0, #0x0 - movne r0, r12 - moveq r0, r5, lsl #0x1 - ldreqh r0, [r1, r0] - andeq r0, r0, #0x100 - cmp r0, #0x0 - bne _020E1FB8 - ldr r0, [sp, #0x30] - cmp r0, #0x0 - bne _020E2C2C - ldr r5, _020E2C74 ; =0x0210430C - b _020E200C -_020E2008: - add r4, r4, #0x1 -_020E200C: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - strb r0, [sp, #0x50] - ldrsb r1, [sp, #0x50] - cmp r1, #0x0 - blt _020E2034 - cmp r1, #0x80 - blt _020E203C -_020E2034: - mov r0, #0x0 - b _020E2048 -_020E203C: - mov r0, r1, lsl #0x1 - ldrh r0, [r5, r0] - and r0, r0, #0x100 -_020E2048: - cmp r0, #0x0 - bne _020E2008 - mov r0, r8 - mov r2, #0x1 - blx r9 - b _020E2C2C -_020E2060: - cmp r5, #0x25 - beq _020E20D8 - ldr r0, [sp, #0x30] - cmp r0, #0x0 - bne _020E20D8 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - strb r0, [sp, #0x50] - and r0, r5, #0xff - ldrsb r1, [sp, #0x50] - cmp r0, r1 - beq _020E20C4 - mov r0, r8 - mov r2, #0x1 - blx r9 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] - ldr r0, [sp, #0xc] - add r0, r0, #0x1 - str r0, [sp, #0xc] - b _020E2C2C -_020E20C4: - ldr r0, [sp, #0xc] - add r4, r4, #0x1 - add r0, r0, #0x1 - str r0, [sp, #0xc] - b _020E2C2C -_020E20D8: - ldr r0, [sp, #0xc] - add r1, sp, #0x60 - bl parse_format_scanf - str r0, [sp, #0xc] - ldrb r0, [sp, #0x60] - cmp r0, #0x0 - bne _020E2114 - ldrb r0, [sp, #0x63] - cmp r0, #0x25 - beq _020E2114 - ldr r0, [sp, #0x10] - add r0, r0, #0x4 - str r0, [sp, #0x10] - ldr r5, [r0, #-0x4] - b _020E2118 -_020E2114: - mov r5, #0x0 -_020E2118: - ldrb r0, [sp, #0x63] - cmp r0, #0x6e - beq _020E2158 - ldr r0, [sp, #0x30] - cmp r0, #0x0 - bne _020E2158 - mov r0, r8 - mov r1, #0x0 - mov r2, #0x2 - blx r9 - cmp r0, #0x0 - beq _020E2158 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] -_020E2158: - ldrb r1, [sp, #0x63] - cmp r1, #0x5b - bgt _020E21B0 - bge _020E2984 - cmp r1, #0x47 - bgt _020E21A4 - subs r0, r1, #0x41 - addpl pc, pc, r0, lsl #0x2 - b _020E2198 -_020E217C: ; 0x020E217C - b _020E2600 -_020E2180: ; 0x020E2180 - b _020E2C3C -_020E2184: ; 0x020E2184 - b _020E2C3C -_020E2188: ; 0x020E2188 - b _020E2C3C -_020E218C: ; 0x020E218C - b _020E2600 -_020E2190: ; 0x020E2190 - b _020E2600 -_020E2194: ; 0x020E2194 - b _020E2600 -_020E2198: - cmp r1, #0x25 - beq _020E287C - b _020E2C3C -_020E21A4: - cmp r1, #0x58 - beq _020E243C - b _020E2C3C -_020E21B0: - cmp r1, #0x78 - bgt _020E2228 - subs r0, r1, #0x63 - addpl pc, pc, r0, lsl #0x2 - b _020E221C -_020E21C4: ; 0x020E21C4 - b _020E26C4 -_020E21C8: ; 0x020E21C8 - b _020E2230 -_020E21CC: ; 0x020E21CC - b _020E2600 -_020E21D0: ; 0x020E21D0 - b _020E2600 -_020E21D4: ; 0x020E21D4 - b _020E2600 -_020E21D8: ; 0x020E21D8 - b _020E2C3C -_020E21DC: ; 0x020E21DC - b _020E2238 -_020E21E0: ; 0x020E21E0 - b _020E2C3C -_020E21E4: ; 0x020E21E4 - b _020E2C3C -_020E21E8: ; 0x020E21E8 - b _020E2C3C -_020E21EC: ; 0x020E21EC - b _020E2C3C -_020E21F0: ; 0x020E21F0 - b _020E2BC8 -_020E21F4: ; 0x020E21F4 - b _020E242C -_020E21F8: ; 0x020E21F8 - b _020E2C3C -_020E21FC: ; 0x020E21FC - b _020E2C3C -_020E2200: ; 0x020E2200 - b _020E2C3C -_020E2204: ; 0x020E2204 - b _020E2908 -_020E2208: ; 0x020E2208 - b _020E2C3C -_020E220C: ; 0x020E220C - b _020E2434 -_020E2210: ; 0x020E2210 - b _020E2C3C -_020E2214: ; 0x020E2214 - b _020E2C3C -_020E2218: ; 0x020E2218 - b _020E243C -_020E221C: - cmp r1, #0x61 - beq _020E2600 - b _020E2C3C -_020E2228: - cmp r1, #0xff - b _020E2C3C -_020E2230: - mov r0, #0xa - b _020E223C -_020E2238: - mov r0, #0x0 -_020E223C: - ldr r1, [sp, #0x30] - cmp r1, #0x0 - beq _020E225C - mov r0, #0x0 - str r0, [sp, #0x1c] - str r0, [sp, #0x20] - str r0, [sp, #0x24] - b _020E2364 -_020E225C: - ldrb r1, [sp, #0x62] - add r2, sp, #0x5c - cmp r1, #0x7 - cmpne r1, #0x4 - add r1, sp, #0x58 - bne _020E22A0 - str r2, [sp, #0x0] - str r1, [sp, #0x4] - add r1, sp, #0x54 - str r1, [sp, #0x8] - ldr r1, [sp, #0x64] - mov r2, r9 - mov r3, r8 - bl __strtoull - str r0, [sp, #0x34] - str r1, [sp, #0x18] - b _020E22C4 -_020E22A0: - str r2, [sp, #0x0] - str r1, [sp, #0x4] - add r1, sp, #0x54 - str r1, [sp, #0x8] - ldr r1, [sp, #0x64] - mov r2, r9 - mov r3, r8 - bl __strtoul - str r0, [sp, #0x3c] -_020E22C4: - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - bne _020E22F4 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] - mov r0, #0x0 - str r0, [sp, #0x1c] - str r0, [sp, #0x20] - str r0, [sp, #0x24] - b _020E2364 -_020E22F4: - add r4, r4, r0 - ldrb r0, [sp, #0x62] - cmp r0, #0x7 - cmpne r0, #0x4 - bne _020E2344 - ldr r0, [sp, #0x58] - cmp r0, #0x0 - beq _020E2330 - ldr r0, [sp, #0x34] - rsbs r0, r0, #0x0 - str r0, [sp, #0x20] - ldr r0, [sp, #0x18] - rsc r0, r0, #0x0 - str r0, [sp, #0x24] - b _020E2364 -_020E2330: - ldr r0, [sp, #0x34] - str r0, [sp, #0x20] - ldr r0, [sp, #0x18] - str r0, [sp, #0x24] - b _020E2364 -_020E2344: - ldr r0, [sp, #0x58] - cmp r0, #0x0 - ldreq r0, [sp, #0x3c] - streq r0, [sp, #0x1c] - beq _020E2364 - ldr r0, [sp, #0x3c] - rsb r0, r0, #0x0 - str r0, [sp, #0x1c] -_020E2364: - cmp r5, #0x0 - beq _020E241C - ldrb r0, [sp, #0x62] - cmp r0, #0x7 - addls pc, pc, r0, lsl #0x2 - b _020E2408 -_020E237C: - b _020E239C -_020E2380: - b _020E23A8 -_020E2384: - b _020E23B4 -_020E2388: - b _020E23C0 -_020E238C: - b _020E23CC -_020E2390: - b _020E23E0 -_020E2394: - b _020E23EC -_020E2398: - b _020E23F8 -_020E239C: - ldr r0, [sp, #0x1c] - str r0, [r5, #0x0] - b _020E2408 -_020E23A8: - ldr r0, [sp, #0x1c] - strb r0, [r5, #0x0] - b _020E2408 -_020E23B4: - ldr r0, [sp, #0x1c] - strh r0, [r5, #0x0] - b _020E2408 -_020E23C0: - ldr r0, [sp, #0x1c] - str r0, [r5, #0x0] - b _020E2408 -_020E23CC: - ldr r0, [sp, #0x20] - str r0, [r5, #0x0] - ldr r0, [sp, #0x24] - str r0, [r5, #0x4] - b _020E2408 -_020E23E0: - ldr r0, [sp, #0x1c] - str r0, [r5, #0x0] - b _020E2408 -_020E23EC: - ldr r0, [sp, #0x1c] - str r0, [r5, #0x0] - b _020E2408 -_020E23F8: - ldr r0, [sp, #0x20] - str r0, [r5, #0x0] - ldr r0, [sp, #0x24] - str r0, [r5, #0x4] -_020E2408: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - ldreq r0, [sp, #0x44] - addeq r0, r0, #0x1 - streq r0, [sp, #0x44] -_020E241C: - ldr r0, [sp, #0x40] - add r0, r0, #0x1 - str r0, [sp, #0x40] - b _020E2C2C -_020E242C: - mov r0, #0x8 - b _020E2440 -_020E2434: - mov r0, #0xa - b _020E2440 -_020E243C: - mov r0, #0x10 -_020E2440: - ldr r1, [sp, #0x30] - cmp r1, #0x0 - beq _020E2460 - mov r0, #0x0 - str r0, [sp, #0x3c] - str r0, [sp, #0x34] - str r0, [sp, #0x18] - b _020E2538 -_020E2460: - ldrb r1, [sp, #0x62] - add r2, sp, #0x5c - cmp r1, #0x7 - cmpne r1, #0x4 - add r1, sp, #0x58 - bne _020E24A4 - str r2, [sp, #0x0] - str r1, [sp, #0x4] - add r1, sp, #0x54 - str r1, [sp, #0x8] - ldr r1, [sp, #0x64] - mov r2, r9 - mov r3, r8 - bl __strtoull - str r0, [sp, #0x34] - str r1, [sp, #0x18] - b _020E24C8 -_020E24A4: - str r2, [sp, #0x0] - str r1, [sp, #0x4] - add r1, sp, #0x54 - str r1, [sp, #0x8] - ldr r1, [sp, #0x64] - mov r2, r9 - mov r3, r8 - bl __strtoul - str r0, [sp, #0x3c] -_020E24C8: - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - bne _020E24F8 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] - mov r0, #0x0 - str r0, [sp, #0x3c] - str r0, [sp, #0x34] - str r0, [sp, #0x18] - b _020E2538 -_020E24F8: - add r4, r4, r0 - ldr r0, [sp, #0x58] - cmp r0, #0x0 - beq _020E2538 - ldrb r0, [sp, #0x62] - cmp r0, #0x7 - ldrne r0, [sp, #0x3c] - rsbne r0, r0, #0x0 - strne r0, [sp, #0x3c] - bne _020E2538 - ldr r0, [sp, #0x34] - rsbs r0, r0, #0x0 - str r0, [sp, #0x34] - ldr r0, [sp, #0x18] - rsc r0, r0, #0x0 - str r0, [sp, #0x18] -_020E2538: - cmp r5, #0x0 - beq _020E25F0 - ldrb r0, [sp, #0x62] - cmp r0, #0x7 - addls pc, pc, r0, lsl #0x2 - b _020E25DC -_020E2550: - b _020E2570 -_020E2554: - b _020E257C -_020E2558: - b _020E2588 -_020E255C: - b _020E2594 -_020E2560: - b _020E25A0 -_020E2564: - b _020E25B4 -_020E2568: - b _020E25C0 -_020E256C: - b _020E25CC -_020E2570: - ldr r0, [sp, #0x3c] - str r0, [r5, #0x0] - b _020E25DC -_020E257C: - ldr r0, [sp, #0x3c] - strb r0, [r5, #0x0] - b _020E25DC -_020E2588: - ldr r0, [sp, #0x3c] - strh r0, [r5, #0x0] - b _020E25DC -_020E2594: - ldr r0, [sp, #0x3c] - str r0, [r5, #0x0] - b _020E25DC -_020E25A0: - ldr r0, [sp, #0x34] - str r0, [r5, #0x0] - ldr r0, [sp, #0x18] - str r0, [r5, #0x4] - b _020E25DC -_020E25B4: - ldr r0, [sp, #0x3c] - str r0, [r5, #0x0] - b _020E25DC -_020E25C0: - ldr r0, [sp, #0x3c] - str r0, [r5, #0x0] - b _020E25DC -_020E25CC: - ldr r0, [sp, #0x34] - str r0, [r5, #0x0] - ldr r0, [sp, #0x18] - str r0, [r5, #0x4] -_020E25DC: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - ldreq r0, [sp, #0x44] - addeq r0, r0, #0x1 - streq r0, [sp, #0x44] -_020E25F0: - ldr r0, [sp, #0x40] - add r0, r0, #0x1 - str r0, [sp, #0x40] - b _020E2C2C -_020E2600: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - beq _020E261C - ldr r0, _020E2C78 ; =0x02106B78 - ldr r0, [r0, #0x0] - bl _f2d - b _020E2668 -_020E261C: - add r0, sp, #0x54 - str r0, [sp, #0x0] - ldr r0, [sp, #0x64] - mov r1, r9 - mov r2, r8 - add r3, sp, #0x5c - bl __strtold - ldr r2, [sp, #0x5c] - cmp r2, #0x0 - bne _020E2664 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] - ldr r0, _020E2C78 ; =0x02106B78 - ldr r0, [r0, #0x0] - bl _f2d -_020E2660: ; 0x020E2660 - b _020E2668 -_020E2664: - add r4, r4, r2 -_020E2668: - cmp r5, #0x0 - beq _020E26B4 - ldrb r2, [sp, #0x62] - cmp r2, #0x0 - beq _020E2690 - cmp r2, #0x8 - beq _020E269C - cmp r2, #0x9 - stmeqia r5, {r0-r1} - b _020E26A0 -_020E2690: - bl _d2f -_020E2694: ; 0x020E2694 - str r0, [r5, #0x0] - b _020E26A0 -_020E269C: - stmia r5, {r0-r1} -_020E26A0: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - ldreq r0, [sp, #0x44] - addeq r0, r0, #0x1 - streq r0, [sp, #0x44] -_020E26B4: - ldr r0, [sp, #0x40] - add r0, r0, #0x1 - str r0, [sp, #0x40] - b _020E2C2C -_020E26C4: - ldrb r0, [sp, #0x61] - cmp r0, #0x0 - moveq r0, #0x1 - streq r0, [sp, #0x64] - cmp r5, #0x0 - beq _020E280C - cmp r10, #0x0 - beq _020E26F8 - ldr r0, [sp, #0x10] - mov r7, #0x1 - add r0, r0, #0x4 - ldr r11, [r0, #-0x4] - str r0, [sp, #0x10] -_020E26F8: - ldr r0, [sp, #0x30] - mov r1, #0x0 - cmp r0, #0x0 - str r1, [sp, #0x5c] - beq _020E2718 - cmp r11, #0x0 - strneb r1, [r5, #0x0] - b _020E2C2C -_020E2718: - mvn r0, #0x0 - str r5, [sp, #0x2c] - str r0, [sp, #0x48] - b _020E2760 -_020E2728: - ldrb r0, [sp, #0x62] - strb r6, [sp, #0x50] - cmp r0, #0xa - ldrnesb r0, [sp, #0x50] - strneb r0, [r5], #0x1 - bne _020E2754 - mov r0, r5 - add r1, sp, #0x50 - mov r2, #0x1 - bl mbtowc - add r5, r5, #0x1 -_020E2754: - ldr r0, [sp, #0x5c] - add r1, r0, #0x1 - str r1, [sp, #0x5c] -_020E2760: - ldr r0, [sp, #0x64] - cmp r0, #0x0 - sub r0, r0, #0x1 - str r0, [sp, #0x64] - beq _020E27B0 - cmp r10, #0x0 - beq _020E2790 - cmp r11, r1 - movhi r7, #0x1 - movls r7, #0x0 - cmp r7, #0x0 - beq _020E27B0 -_020E2790: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r6, r0 - ldr r0, [sp, #0x48] - cmp r6, r0 - bne _020E2728 -_020E27B0: - strb r6, [sp, #0x50] - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - beq _020E27D0 - cmp r10, #0x0 - beq _020E27F8 - cmp r7, #0x0 - bne _020E27F8 -_020E27D0: - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - cmp r11, #0x0 - str r0, [sp, #0x30] - beq _020E2C2C - ldr r0, [sp, #0x2c] - mov r1, #0x0 - strb r1, [r0, #0x0] - b _020E2C2C -_020E27F8: - add r4, r4, r0 - ldr r0, [sp, #0x44] - add r0, r0, #0x1 - str r0, [sp, #0x44] - b _020E286C -_020E280C: - mov r0, #0x0 - str r0, [sp, #0x5c] - mvn r5, #0x0 - b _020E282C -_020E281C: - strb r6, [sp, #0x50] - ldr r0, [sp, #0x5c] - add r0, r0, #0x1 - str r0, [sp, #0x5c] -_020E282C: - ldr r0, [sp, #0x64] - cmp r0, #0x0 - sub r0, r0, #0x1 - str r0, [sp, #0x64] - beq _020E285C - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r6, r0 - cmp r6, r5 - bne _020E281C -_020E285C: - strb r6, [sp, #0x50] - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - beq _020E2C3C -_020E286C: - ldr r0, [sp, #0x40] - add r0, r0, #0x1 - str r0, [sp, #0x40] - b _020E2C2C -_020E287C: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - bne _020E2C2C - ldr r5, _020E2C74 ; =0x0210430C - b _020E2894 -_020E2890: - add r4, r4, #0x1 -_020E2894: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - strb r0, [sp, #0x50] - ldrsb r1, [sp, #0x50] - cmp r1, #0x0 - blt _020E28BC - cmp r1, #0x80 - blt _020E28C4 -_020E28BC: - mov r0, #0x0 - b _020E28D0 -_020E28C4: - mov r0, r1, lsl #0x1 - ldrh r0, [r5, r0] - and r0, r0, #0x100 -_020E28D0: - cmp r0, #0x0 - bne _020E2890 - cmp r1, #0x25 - beq _020E2900 - mov r0, r8 - mov r2, #0x1 - blx r9 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - str r0, [sp, #0x30] - b _020E2C2C -_020E2900: - add r4, r4, #0x1 - b _020E2C2C -_020E2908: - ldr r0, [sp, #0x30] - cmp r0, #0x0 - bne _020E2984 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - strb r0, [sp, #0x50] - b _020E2944 -_020E292C: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - strb r0, [sp, #0x50] -_020E2944: - ldrsb r1, [sp, #0x50] - cmp r1, #0x0 - blt _020E2958 - cmp r1, #0x80 - blt _020E2960 -_020E2958: - mov r0, #0x0 - b _020E2970 -_020E2960: - ldr r0, _020E2C74 ; =0x0210430C - mov r2, r1, lsl #0x1 - ldrh r0, [r0, r2] - and r0, r0, #0x100 -_020E2970: - cmp r0, #0x0 - bne _020E292C - mov r0, r8 - mov r2, #0x1 - blx r9 -_020E2984: - cmp r5, #0x0 - beq _020E2B00 - cmp r10, #0x0 - beq _020E29AC - ldr r0, [sp, #0x10] - mov r7, #0x1 - add r0, r0, #0x4 - str r0, [sp, #0x10] - ldr r0, [r0, #-0x4] - sub r11, r0, #0x1 -_020E29AC: - ldr r0, [sp, #0x30] - mov r1, #0x0 - cmp r0, #0x0 - str r1, [sp, #0x5c] - beq _020E29CC - cmp r11, #0x0 - strneb r1, [r5, #0x0] - b _020E2C2C -_020E29CC: - mvn r0, #0x0 - str r5, [sp, #0x28] - str r0, [sp, #0x4c] - b _020E2A30 -_020E29DC: - strb r6, [sp, #0x50] - ldrsb r1, [sp, #0x50] - add r2, sp, #0x60 - and r3, r1, #0xff - add r2, r2, r3, asr #0x3 - ldrb r3, [r2, #0x8] - and r0, r1, #0x7 - mov r2, #0x1 - tst r3, r2, lsl r0 - beq _020E2A80 - ldrb r0, [sp, #0x62] - cmp r0, #0xa - strneb r1, [r5], #0x1 - bne _020E2A24 - mov r0, r5 - add r1, sp, #0x50 - bl mbtowc - add r5, r5, #0x2 -_020E2A24: - ldr r0, [sp, #0x5c] - add r1, r0, #0x1 - str r1, [sp, #0x5c] -_020E2A30: - ldr r0, [sp, #0x64] - cmp r0, #0x0 - sub r0, r0, #0x1 - str r0, [sp, #0x64] - beq _020E2A80 - cmp r10, #0x0 - beq _020E2A60 - cmp r11, r1 - movcs r7, #0x1 - movcc r7, #0x0 - cmp r7, #0x0 - beq _020E2A80 -_020E2A60: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r6, r0 - ldr r0, [sp, #0x4c] - cmp r6, r0 - bne _020E29DC -_020E2A80: - strb r6, [sp, #0x50] - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - beq _020E2AA0 - cmp r10, #0x0 - beq _020E2AD8 - cmp r7, #0x0 - bne _020E2AD8 -_020E2AA0: - mov r0, r8 - ldrsb r1, [sp, #0x50] - mov r2, #0x1 - blx r9 - cmp r10, #0x0 - beq _020E2C3C - mov r0, #0x1 - cmp r11, #0x0 - str r0, [sp, #0x30] - beq _020E2C2C - ldr r0, [sp, #0x28] - mov r1, #0x0 - strb r1, [r0, #0x0] - b _020E2C2C -_020E2AD8: - add r4, r4, r0 - ldrb r0, [sp, #0x62] - cmp r0, #0xa - mov r0, #0x0 - streqh r0, [r5, #0x0] - strneb r0, [r5, #0x0] - ldr r0, [sp, #0x44] - add r0, r0, #0x1 - str r0, [sp, #0x44] - b _020E2B9C -_020E2B00: - mov r0, #0x0 - str r0, [sp, #0x5c] - mvn r5, #0x0 - b _020E2B44 -_020E2B10: - strb r6, [sp, #0x50] - ldrsb r1, [sp, #0x50] - and r0, r1, #0x7 - and r2, r1, #0xff - add r1, sp, #0x60 - add r1, r1, r2, asr #0x3 - ldrb r2, [r1, #0x8] - mov r1, #0x1 - tst r2, r1, lsl r0 - beq _020E2B74 - ldr r0, [sp, #0x5c] - add r0, r0, #0x1 - str r0, [sp, #0x5c] -_020E2B44: - ldr r0, [sp, #0x64] - cmp r0, #0x0 - sub r0, r0, #0x1 - str r0, [sp, #0x64] - beq _020E2B74 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r6, r0 - cmp r6, r5 - bne _020E2B10 -_020E2B74: - strb r6, [sp, #0x50] - ldr r0, [sp, #0x5c] - cmp r0, #0x0 - bne _020E2B98 - mov r0, r8 - ldrsb r1, [sp, #0x50] - mov r2, #0x1 - blx r9 - b _020E2C2C -_020E2B98: - add r4, r4, r0 -_020E2B9C: - ldr r0, [sp, #0x64] - cmp r0, #0x0 - blt _020E2BB8 - mov r0, r8 - ldrsb r1, [sp, #0x50] - mov r2, #0x1 - blx r9 -_020E2BB8: - ldr r0, [sp, #0x40] - add r0, r0, #0x1 - str r0, [sp, #0x40] - b _020E2C2C -_020E2BC8: - cmp r5, #0x0 - beq _020E2C2C - ldrb r0, [sp, #0x62] - cmp r0, #0x7 - addls pc, pc, r0, lsl #0x2 - b _020E2C2C -_020E2BE0: - b _020E2C00 -_020E2BE4: - b _020E2C18 -_020E2BE8: - b _020E2C08 -_020E2BEC: - b _020E2C10 -_020E2BF0: - b _020E2C2C -_020E2BF4: - b _020E2C2C -_020E2BF8: - b _020E2C2C -_020E2BFC: - b _020E2C20 -_020E2C00: - str r4, [r5, #0x0] - b _020E2C2C -_020E2C08: - strh r4, [r5, #0x0] - b _020E2C2C -_020E2C10: - str r4, [r5, #0x0] - b _020E2C2C -_020E2C18: - strb r4, [r5, #0x0] - b _020E2C2C -_020E2C20: - str r4, [r5, #0x0] - mov r0, r4, asr #0x1f - str r0, [r5, #0x4] -_020E2C2C: - ldr r0, [sp, #0xc] - ldrsb r5, [r0, #0x0] - cmp r5, #0x0 - bne _020E1F70 -_020E2C3C: - mov r0, r8 - mov r1, #0x0 - mov r2, #0x2 - blx r9 - cmp r0, #0x0 - beq _020E2C68 - ldr r0, [sp, #0x40] - cmp r0, #0x0 - addeq sp, sp, #0x88 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,pc} -_020E2C68: - ldr r0, [sp, #0x44] - add sp, sp, #0x88 - ldmia sp!, {r3-r11,pc} - .balign 4 -_020E2C74: .word 0x0210430C -_020E2C78: .word 0x02106B78 - - arm_func_start __StringRead -__StringRead: ; 0x020E2C7C - cmp r2, #0x0 - beq _020E2C98 - cmp r2, #0x1 - beq _020E2CC8 - cmp r2, #0x2 - beq _020E2CF0 - b _020E2CF8 -_020E2C98: - ldr r1, [r0, #0x0] - ldrsb r2, [r1, #0x0] - cmp r2, #0x0 - bne _020E2CB8 - mov r1, #0x1 - str r1, [r0, #0x4] - sub r0, r1, #0x2 - bx lr -_020E2CB8: - add r1, r1, #0x1 - str r1, [r0, #0x0] - and r0, r2, #0xff - bx lr -_020E2CC8: - ldr r2, [r0, #0x4] - cmp r2, #0x0 - movne r2, #0x0 - strne r2, [r0, #0x4] - bne _020E2CE8 - ldr r2, [r0, #0x0] - sub r2, r2, #0x1 - str r2, [r0, #0x0] -_020E2CE8: - mov r0, r1 - bx lr -_020E2CF0: - ldr r0, [r0, #0x4] - bx lr -_020E2CF8: - mov r0, #0x0 - bx lr - - arm_func_start vsscanf -vsscanf: ; 0x020E2D00 - stmdb sp!, {lr} - sub sp, sp, #0xc - str r0, [sp, #0x4] - cmp r0, #0x0 - ldrnesb r0, [r0, #0x0] - mov lr, r1 - mov r3, r2 - cmpne r0, #0x0 - addeq sp, sp, #0xc - mvneq r0, #0x0 - ldmeqia sp!, {pc} - mov r12, #0x0 - str r12, [sp, #0x8] - ldr r0, _020E2D50 ; =__StringRead - add r1, sp, #0x4 - mov r2, lr - str r12, [sp, #0x0] - bl __sformatter - add sp, sp, #0xc - ldmia sp!, {pc} - .balign 4 -_020E2D50: .word __StringRead - - arm_func_start sscanf -sscanf: ; 0x020E2D54 - stmdb sp!, {r0-r3} - stmdb sp!, {r3,lr} - add r2, sp, #0xc - bic r2, r2, #0x3 - ldr r1, [sp, #0xc] - add r2, r2, #0x4 - bl vsscanf - ldmia sp!, {r3,lr} - add sp, sp, #0x10 - bx lr - - arm_func_start raise -raise: ; 0x020E2D7C - stmdb sp!, {r3-r5,lr} - mov r5, r0 - cmp r5, #0x1 - blt _020E2D94 - cmp r5, #0x7 - ble _020E2D9C -_020E2D94: - mvn r0, #0x0 - ldmia sp!, {r3-r5,pc} -_020E2D9C: - ldr r0, _020E2E98 ; =0x021D7178 - bl OS_TryLockMutex -_020E2DA4: ; 0x020E2DA4 - cmp r0, #0x0 - bne _020E2DD0 - ldr r0, _020E2E9C ; =0x021D3498 - ldr r1, _020E2EA0 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020E2EA4 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0x1c] - str r2, [r0, #0x1c] - b _020E2E28 -_020E2DD0: - ldr r0, _020E2E9C ; =0x021D3498 - ldr r1, _020E2EA0 ; =0x021D7088 - ldr r0, [r0, #0x4] - ldr r1, [r1, #0x1c] - ldr r0, [r0, #0x6c] - cmp r1, r0 - bne _020E2E00 - ldr r0, _020E2EA4 ; =0x021D70AC - ldr r1, [r0, #0x1c] - add r1, r1, #0x1 - str r1, [r0, #0x1c] - b _020E2E28 -_020E2E00: - ldr r0, _020E2E98 ; =0x021D7178 - bl OS_LockMutex - ldr r0, _020E2E9C ; =0x021D3498 - ldr r1, _020E2EA0 ; =0x021D7088 - ldr r2, [r0, #0x4] - ldr r0, _020E2EA4 ; =0x021D70AC - ldr r3, [r2, #0x6c] - mov r2, #0x1 - str r3, [r1, #0x1c] - str r2, [r0, #0x1c] -_020E2E28: - ldr r1, _020E2EA8 ; =0x021D74AC - sub r2, r5, #0x1 - ldr r4, [r1, r2, lsl #0x2] - cmp r4, #0x1 - movne r0, #0x0 - strne r0, [r1, r2, lsl #0x2] - ldr r0, _020E2EA4 ; =0x021D70AC - ldr r1, [r0, #0x1c] - subs r1, r1, #0x1 - str r1, [r0, #0x1c] - bne _020E2E5C - ldr r0, _020E2E98 ; =0x021D7178 - bl OS_UnlockMutex -_020E2E5C: - cmp r4, #0x1 - beq _020E2E70 - cmp r4, #0x0 - cmpeq r5, #0x1 - bne _020E2E78 -_020E2E70: - mov r0, #0x0 - ldmia sp!, {r3-r5,pc} -_020E2E78: - cmp r4, #0x0 - bne _020E2E88 - mov r0, #0x0 - bl exit -_020E2E88: - mov r0, r5 - blx r4 - mov r0, #0x0 - ldmia sp!, {r3-r5,pc} - .balign 4 -_020E2E98: .word 0x021D7178 -_020E2E9C: .word 0x021D3498 -_020E2EA0: .word 0x021D7088 -_020E2EA4: .word 0x021D70AC -_020E2EA8: .word 0x021D74AC - - arm_func_start strlen -strlen: ; 0x020E2EAC - mvn r2, #0x0 -_020E2EB0: - ldrsb r1, [r0], #0x1 - add r2, r2, #0x1 - cmp r1, #0x0 - bne _020E2EB0 - mov r0, r2 - bx lr - - arm_func_start strcpy -strcpy: ; 0x020E2EC8 - stmdb sp!, {r3-r5,lr} - and r4, r1, #0x3 - and r3, r0, #0x3 - mov r2, r0 - cmp r3, r4 - bne _020E2F64 - cmp r4, #0x0 - beq _020E2F20 - ldrb r3, [r1, #0x0] - strb r3, [r0, #0x0] - cmp r3, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020E2EF8: ; 0x020E2EF8 - rsbs r4, r4, #0x3 - beq _020E2F18 -_020E2F00: - ldrb r3, [r1, #0x1]! - cmp r3, #0x0 - strb r3, [r2, #0x1]! - ldmeqia sp!, {r3-r5,pc} -_020E2F10: ; 0x020E2F10 - subs r4, r4, #0x1 - bne _020E2F00 -_020E2F18: - add r2, r2, #0x1 - add r1, r1, #0x1 -_020E2F20: - ldr r5, [r1, #0x0] - ldr r3, _020E2F88 ; =0xFEFEFEFF - mvn r4, r5 - add lr, r5, r3 - ldr ip, _020E2F8C ; =0x80808080 - and r4, lr, r4 - tst r4, r12 - bne _020E2F64 - sub r2, r2, #0x4 -_020E2F44: - str r5, [r2, #0x4]! - ldr r5, [r1, #0x4]! - add r4, r5, r3 - mvn lr, r5 - and lr, r4, lr - tst lr, r12 - beq _020E2F44 - add r2, r2, #0x4 -_020E2F64: - ldrb r3, [r1, #0x0] - strb r3, [r2, #0x0] - cmp r3, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020E2F74: - ldrb r3, [r1, #0x1]! - cmp r3, #0x0 - strb r3, [r2, #0x1]! - bne _020E2F74 - ldmia sp!, {r3-r5,pc} - .balign 4 -_020E2F88: .word 0xFEFEFEFF -_020E2F8C: .word 0x80808080 - - arm_func_start strncpy -strncpy: ; 0x020E2F90 - stmdb sp!, {r3,lr} - mov lr, r0 - cmp r2, #0x0 - ldmeqia sp!, {r3,pc} -_020E2FA0: - ldrsb r3, [r1], #0x1 - mov r12, lr - strb r3, [lr], #0x1 - ldrsb r3, [r12, #0x0] - cmp r3, #0x0 - bne _020E2FD4 - subs r2, r2, #0x1 - ldmeqia sp!, {r3,pc} -_020E2FC0: ; 0x020E2FC0 - mov r1, #0x0 -_020E2FC4: - strb r1, [lr], #0x1 - subs r2, r2, #0x1 - bne _020E2FC4 - ldmia sp!, {r3,pc} -_020E2FD4: - subs r2, r2, #0x1 - bne _020E2FA0 - ldmia sp!, {r3,pc} - - arm_func_start strcat -strcat: ; 0x020E2FE0 - mov r3, r0 -_020E2FE4: - ldrsb r2, [r3], #0x1 - cmp r2, #0x0 - bne _020E2FE4 - sub r3, r3, #0x1 -_020E2FF4: - ldrsb r2, [r1], #0x1 - mov r12, r3 - strb r2, [r3], #0x1 - ldrsb r2, [r12, #0x0] - cmp r2, #0x0 - bne _020E2FF4 - bx lr - - arm_func_start strncat -strncat: ; 0x020E3010 - stmdb sp!, {r3,lr} - mov r12, r0 -_020E3018: - ldrsb r3, [r12], #0x1 - cmp r3, #0x0 - bne _020E3018 - cmp r2, #0x0 - sub r12, r12, #0x1 - beq _020E3054 -_020E3030: - ldrsb r3, [r1], #0x1 - mov lr, r12 - strb r3, [r12], #0x1 - ldrsb r3, [lr, #0x0] - cmp r3, #0x0 - subeq r12, r12, #0x1 - beq _020E3054 - subs r2, r2, #0x1 - bne _020E3030 -_020E3054: - mov r1, #0x0 - strb r1, [r12, #0x0] - ldmia sp!, {r3,pc} - - arm_func_start strcmp -strcmp: ; 0x020E3060 - stmdb sp!, {r4,lr} - ldrb r2, [r0, #0x0] - ldrb r3, [r1, #0x0] - subs r3, r2, r3 - movne r0, r3 - ldmneia sp!, {r4,pc} -_020E3078: ; 0x020E3078 - and r4, r0, #0x3 - and r3, r1, #0x3 - cmp r3, r4 - bne _020E313C - cmp r4, #0x0 - beq _020E30D4 - cmp r2, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r4,pc} -_020E309C: ; 0x020E309C - rsbs r4, r4, #0x3 - beq _020E30CC -_020E30A4: - ldrb r3, [r0, #0x1]! - ldrb r2, [r1, #0x1]! - subs r2, r3, r2 - movne r0, r2 - ldmneia sp!, {r4,pc} -_020E30B8: ; 0x020E30B8 - cmp r3, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r4,pc} -_020E30C4: ; 0x020E30C4 - subs r4, r4, #0x1 - bne _020E30A4 -_020E30CC: - add r0, r0, #0x1 - add r1, r1, #0x1 -_020E30D4: - ldr r2, [r0, #0x0] - ldr r3, _020E316C ; =0xFEFEFEFF - mvn r4, r2 - add lr, r2, r3 - ldr ip, _020E3170 ; =0x80808080 - and r4, lr, r4 - tst r4, r12 - ldr r4, [r1, #0x0] - bne _020E3128 - cmp r2, r4 - bne _020E311C -_020E3100: - ldr r2, [r0, #0x4]! - ldr r4, [r1, #0x4]! - add lr, r2, r3 - tst lr, r12 - bne _020E3128 - cmp r2, r4 - beq _020E3100 -_020E311C: - sub r0, r0, #0x1 - sub r1, r1, #0x1 - b _020E313C -_020E3128: - ldrb r2, [r0, #0x0] - ldrb r3, [r1, #0x0] - subs r3, r2, r3 - movne r0, r3 - ldmneia sp!, {r4,pc} -_020E313C: - cmp r2, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r4,pc} -_020E3148: - ldrb r3, [r0, #0x1]! - ldrb r2, [r1, #0x1]! - subs r2, r3, r2 - movne r0, r2 - ldmneia sp!, {r4,pc} -_020E315C: ; 0x020E315C - cmp r3, #0x0 - bne _020E3148 - mov r0, #0x0 - ldmia sp!, {r4,pc} - .balign 4 -_020E316C: .word 0xFEFEFEFF -_020E3170: .word 0x80808080 - - arm_func_start strncmp -strncmp: ; 0x020E3174 - cmp r2, #0x0 - beq _020E31A0 -_020E317C: - ldrb r12, [r1], #0x1 - ldrb r3, [r0], #0x1 - cmp r3, r12 - subne r0, r3, r12 - bxne lr - cmp r3, #0x0 - beq _020E31A0 - subs r2, r2, #0x1 - bne _020E317C -_020E31A0: - mov r0, #0x0 - bx lr - - arm_func_start strchr -strchr: ; 0x020E31A8 - ldrsb r2, [r0], #0x1 - mov r1, r1, lsl #0x18 - mov r1, r1, asr #0x18 - cmp r2, #0x0 - beq _020E31D4 -_020E31BC: - cmp r2, r1 - subeq r0, r0, #0x1 - bxeq lr - ldrsb r2, [r0], #0x1 - cmp r2, #0x0 - bne _020E31BC -_020E31D4: - cmp r1, #0x0 - movne r0, #0x0 - subeq r0, r0, #0x1 - bx lr - - arm_func_start strspn -strspn: ; 0x020E31E4 - stmdb sp!, {r4,lr} - sub sp, sp, #0x20 - add r12, sp, #0x0 - mov r3, #0x8 - mov r2, #0x0 -_020E31F8: - strb r2, [r12, #0x0] - strb r2, [r12, #0x1] - strb r2, [r12, #0x2] - strb r2, [r12, #0x3] - add r12, r12, #0x4 - subs r3, r3, #0x1 - bne _020E31F8 - ldrb r3, [r1, #0x0] - add r4, r1, #0x1 - cmp r3, #0x0 - beq _020E3254 - add lr, sp, #0x0 - mov r2, #0x1 -_020E322C: - and r12, r3, #0xff - and r1, r3, #0x7 - mov r1, r2, lsl r1 - ldrb r3, [lr, r12, asr #0x3] - and r1, r1, #0xff - orr r1, r3, r1 - strb r1, [lr, r12, asr #0x3] - ldrb r3, [r4], #0x1 - cmp r3, #0x0 - bne _020E322C -_020E3254: - ldrb r1, [r0, #0x0] - add r4, r0, #0x1 - cmp r1, #0x0 - beq _020E3294 - add r12, sp, #0x0 - mov r2, #0x1 -_020E326C: - and r3, r1, #0xff - and r1, r1, #0x7 - mov r1, r2, lsl r1 - ldrb r3, [r12, r3, asr #0x3] - and r1, r1, #0xff - tst r3, r1 - bne _020E3294 - ldrb r1, [r4], #0x1 - cmp r1, #0x0 - bne _020E326C -_020E3294: - sub r0, r4, r0 - sub r0, r0, #0x1 - add sp, sp, #0x20 - ldmia sp!, {r4,pc} - - arm_func_start strstr -strstr: ; 0x020E32A4 - stmdb sp!, {r4,lr} - cmp r1, #0x0 - ldrneb r2, [r1, #0x0] - cmpne r2, #0x0 - ldmeqia sp!, {r4,pc} -_020E32B8: ; 0x020E32B8 - ldrb r3, [r0, #0x0] - add r4, r0, #0x1 - cmp r3, #0x0 - beq _020E3308 -_020E32C8: - cmp r3, r2 - bne _020E32FC - mov lr, r4 - add r12, r1, #0x1 -_020E32D8: - ldrb r3, [r12], #0x1 - ldrb r0, [lr], #0x1 - cmp r0, r3 - bne _020E32F0 - cmp r0, #0x0 - bne _020E32D8 -_020E32F0: - cmp r3, #0x0 - subeq r0, r4, #0x1 - ldmeqia sp!, {r4,pc} -_020E32FC: - ldrb r3, [r4], #0x1 - cmp r3, #0x0 - bne _020E32C8 -_020E3308: - mov r0, #0x0 - ldmia sp!, {r4,pc} - - arm_func_start __strtold -__strtold: ; 0x020E3310 - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0xa8 - ldr r4, [sp, #0xd0] - mov r10, #0x0 - str r4, [sp, #0xd0] - str r0, [sp, #0x0] - add r6, sp, #0x80 - mov r9, r1 - mov r8, r2 - str r3, [sp, #0x4] - mov r4, r10 - str r10, [sp, #0x2c] - mov r5, #0x1 - mov r0, #0x4 -_020E3348: - strh r10, [r6, #0x0] - strh r10, [r6, #0x2] - strh r10, [r6, #0x4] - strh r10, [r6, #0x6] - add r6, r6, #0x8 - subs r0, r0, #0x1 - bne _020E3348 - mov r0, #0x0 - str r0, [sp, #0x28] - strh r10, [r6, #0x0] - strh r10, [r6, #0x2] - ldr r2, [sp, #0x28] - ldr r1, [sp, #0xd0] - strh r10, [r6, #0x4] - str r2, [r1, #0x0] - mov r1, r2 - mov r0, r8 - str r1, [sp, #0x24] - str r1, [sp, #0x20] - str r1, [sp, #0x1c] - str r1, [sp, #0x18] - str r1, [sp, #0x10] - str r1, [sp, #0xc] - str r1, [sp, #0x8] - add r4, r4, #0x1 - blx r9 - mov r1, r0 - ldr r7, _020E42F0 ; =0x02104439 - add r0, sp, #0x4d - mov r6, #0x4 -_020E33C0: - ldrb r3, [r7, #0x0] - ldrb r2, [r7, #0x1] - add r7, r7, #0x2 - strb r3, [r0, #0x0] - strb r2, [r0, #0x1] - add r0, r0, #0x2 - subs r6, r6, #0x1 - bne _020E33C0 - ldrb r3, [r7, #0x0] - ldr r2, _020E42F4 ; =0x02104434 - strb r3, [r0, #0x0] - ldrb r3, [r2, #0x1] - ldrb r0, [r2, #0x2] - ldrb r6, [r2, #0x0] - strb r3, [sp, #0x31] - strb r0, [sp, #0x32] - ldrb r3, [r2, #0x3] - ldrb r0, [r2, #0x4] - strb r6, [sp, #0x30] - strb r3, [sp, #0x33] - strb r0, [sp, #0x34] - b _020E4104 -_020E3418: - cmp r5, #0x100 - bgt _020E3490 - bge _020E3B98 - cmp r5, #0x20 - bgt _020E3474 - bge _020E3A6C - cmp r5, #0x8 - bgt _020E3468 - cmp r5, #0x0 - addge pc, pc, r5, lsl #0x2 - b _020E4104 -_020E3444: ; 0x020E3444 - b _020E4104 -_020E3448: ; 0x020E3448 - b _020E34D4 -_020E344C: ; 0x020E344C - b _020E38B8 -_020E3450: ; 0x020E3450 - b _020E4104 -_020E3454: ; 0x020E3454 - b _020E3968 -_020E3458: ; 0x020E3458 - b _020E4104 -_020E345C: ; 0x020E345C - b _020E4104 -_020E3460: ; 0x020E3460 - b _020E4104 -_020E3464: ; 0x020E3464 - b _020E3990 -_020E3468: - cmp r5, #0x10 - beq _020E3A34 - b _020E4104 -_020E3474: - cmp r5, #0x40 - bgt _020E3484 - beq _020E3AF8 - b _020E4104 -_020E3484: - cmp r5, #0x80 - beq _020E3B44 - b _020E4104 -_020E3490: - cmp r5, #0x2000 - bgt _020E34B8 - bge _020E36EC - cmp r5, #0x200 - bgt _020E34AC - beq _020E3BF8 - b _020E4104 -_020E34AC: - cmp r5, #0x400 - beq _020E3C20 - b _020E4104 -_020E34B8: - cmp r5, #0x4000 - bgt _020E34C8 - beq _020E35F4 - b _020E4104 -_020E34C8: - cmp r5, #0x8000 - beq _020E3C98 - b _020E4104 -_020E34D4: - cmp r1, #0x0 - blt _020E34E4 - cmp r1, #0x80 - blt _020E34EC -_020E34E4: - mov r0, #0x0 - b _020E34FC -_020E34EC: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x100 -_020E34FC: - cmp r0, #0x0 - beq _020E3528 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r1, r0 - ldr r0, [sp, #0x2c] - add r0, r0, #0x1 - str r0, [sp, #0x2c] - b _020E4104 -_020E3528: - cmp r1, #0x0 - blt _020E3538 - cmp r1, #0x80 - blt _020E3540 -_020E3538: - mov r0, r1 - b _020E3548 -_020E3540: - ldr r0, _020E42FC ; =0x0210428C - ldrb r0, [r0, r1] -_020E3548: - cmp r0, #0x49 - bgt _020E3574 - bge _020E35AC - cmp r0, #0x2d - bgt _020E35EC - cmp r0, #0x2b - blt _020E35EC - beq _020E3588 - cmp r0, #0x2d - beq _020E3580 - b _020E35EC -_020E3574: - cmp r0, #0x4e - beq _020E35CC - b _020E35EC -_020E3580: - mov r0, #0x1 - str r0, [sp, #0x28] -_020E3588: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - mov r0, #0x1 - str r0, [sp, #0x18] - b _020E4104 -_020E35AC: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - mov r5, #0x4000 - b _020E4104 -_020E35CC: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - mov r5, #0x2000 - b _020E4104 -_020E35EC: - mov r5, #0x2 - b _020E4104 -_020E35F4: - mov r5, #0x1 - add r7, sp, #0x4d - add r0, sp, #0x76 - mov r6, #0x4 -_020E3604: - ldrb r3, [r7, #0x0] - ldrb r2, [r7, #0x1] - add r7, r7, #0x2 - strb r3, [r0, #0x0] - strb r2, [r0, #0x1] - add r0, r0, #0x2 - subs r6, r6, #0x1 - bne _020E3604 - ldrb r2, [r7, #0x0] - add r6, sp, #0x77 - ldr r7, _020E42FC ; =0x0210428C - strb r2, [r0, #0x0] - b _020E3658 -_020E3638: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r6, r6, #0x1 - add r5, r5, #0x1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 -_020E3658: - cmp r5, #0x8 - bge _020E3688 - cmp r1, #0x0 - blt _020E3670 - cmp r1, #0x80 - blt _020E3678 -_020E3670: - mov r2, r1 - b _020E367C -_020E3678: - ldrb r2, [r7, r1] -_020E367C: - ldrsb r0, [r6, #0x0] - cmp r0, r2 - beq _020E3638 -_020E3688: - cmp r5, #0x3 - cmpne r5, #0x8 - bne _020E36E4 - ldr r0, [sp, #0x28] - cmp r0, #0x0 - beq _020E36B8 - ldr r1, _020E4300 ; =0x02106B74 - mov r0, #0x0 - ldr r1, [r1, #0x0] - bl _fsub - bl _f2d - b _020E36C4 -_020E36B8: - ldr r0, _020E4300 ; =0x02106B74 - ldr r0, [r0, #0x0] - bl _f2d -_020E36C4: - ldr r2, [sp, #0x2c] - add r3, r2, r5 - ldr r2, [sp, #0x18] - add r3, r2, r3 - ldr r2, [sp, #0x4] - add sp, sp, #0xa8 - str r3, [r2, #0x0] - ldmia sp!, {r3-r11,pc} -_020E36E4: - mov r5, #0x1000 - b _020E4104 -_020E36EC: - ldrb r3, [sp, #0x30] - ldrb r0, [sp, #0x32] - ldrb r2, [sp, #0x31] - strb r3, [sp, #0x40] - strb r0, [sp, #0x42] - ldrb r3, [sp, #0x33] - ldrb r0, [sp, #0x34] - strb r2, [sp, #0x41] - mov r5, #0x1 - strb r0, [sp, #0x44] - mov r6, #0x0 - add r2, sp, #0x56 - strb r3, [sp, #0x43] - mov r0, #0x8 -_020E3724: - strb r6, [r2, #0x0] - strb r6, [r2, #0x1] - strb r6, [r2, #0x2] - strb r6, [r2, #0x3] - add r2, r2, #0x4 - subs r0, r0, #0x1 - bne _020E3724 - add r7, sp, #0x41 - b _020E3768 -_020E3748: - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r7, r7, #0x1 - add r5, r5, #0x1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 -_020E3768: - cmp r5, #0x4 - bge _020E379C - cmp r1, #0x0 - blt _020E3780 - cmp r1, #0x80 - blt _020E3788 -_020E3780: - mov r2, r1 - b _020E3790 -_020E3788: - ldr r0, _020E42FC ; =0x0210428C - ldrb r2, [r0, r1] -_020E3790: - ldrsb r0, [r7, #0x0] - cmp r0, r2 - beq _020E3748 -_020E379C: - sub r0, r5, #0x3 - cmp r0, #0x1 - bhi _020E38B0 - cmp r5, #0x4 - bne _020E3854 - ldr r7, _020E42F8 ; =0x0210430C - b _020E37DC -_020E37B8: - add r0, sp, #0x56 - strb r1, [r0, r6] - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r6, r6, #0x1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 -_020E37DC: - cmp r6, #0x20 - bge _020E3844 - cmp r1, #0x0 - blt _020E37F4 - cmp r1, #0x80 - blt _020E37FC -_020E37F4: - mov r0, #0x0 - b _020E3808 -_020E37FC: - mov r0, r1, lsl #0x1 - ldrh r0, [r7, r0] - and r0, r0, #0x8 -_020E3808: - cmp r0, #0x0 - bne _020E37B8 - cmp r1, #0x0 - blt _020E3820 - cmp r1, #0x80 - blt _020E3828 -_020E3820: - mov r0, #0x0 - b _020E3834 -_020E3828: - mov r0, r1, lsl #0x1 - ldrh r0, [r7, r0] - and r0, r0, #0x1 -_020E3834: - cmp r0, #0x0 - bne _020E37B8 - cmp r1, #0x2e - beq _020E37B8 -_020E3844: - cmp r1, #0x29 - movne r5, #0x1000 - bne _020E4104 - add r6, r6, #0x1 -_020E3854: - add r0, sp, #0x56 - mov r1, #0x0 - strb r1, [r0, r6] - ldr r1, [sp, #0x28] - cmp r1, #0x0 - beq _020E3888 - bl nan - mov r2, r0 - mov r0, #0x0 - mov r3, r1 - mov r1, r0 - bl _dsub -_020E3884: ; 0x020E3884 - b _020E388C -_020E3888: - bl nan -_020E388C: - ldr r2, [sp, #0x2c] - add r2, r2, r5 - add r3, r6, r2 - ldr r2, [sp, #0x18] - add r3, r2, r3 - ldr r2, [sp, #0x4] - add sp, sp, #0xa8 - str r3, [r2, #0x0] - ldmia sp!, {r3-r11,pc} -_020E38B0: - mov r5, #0x1000 - b _020E4104 -_020E38B8: - cmp r1, #0x2e - bne _020E38E0 - mov r5, #0x10 - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E38E0: - cmp r1, #0x0 - blt _020E38F0 - cmp r1, #0x80 - blt _020E38F8 -_020E38F0: - mov r0, #0x0 - b _020E3908 -_020E38F8: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E3908: - cmp r0, #0x0 - moveq r5, #0x1000 - beq _020E4104 - cmp r1, #0x30 - bne _020E3960 - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - cmp r0, #0x0 - mov r1, r0 - blt _020E394C - cmp r0, #0x80 - bge _020E394C - ldr r2, _020E42FC ; =0x0210428C - ldrb r0, [r2, r0] -_020E394C: - cmp r0, #0x58 - moveq r5, #0x8000 - moveq r10, #0x1 - movne r5, #0x4 - b _020E4104 -_020E3960: - mov r5, #0x8 - b _020E4104 -_020E3968: - cmp r1, #0x30 - movne r5, #0x8 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3990: - cmp r1, #0x0 - blt _020E39A0 - cmp r1, #0x80 - blt _020E39A8 -_020E39A0: - mov r0, #0x0 - b _020E39B8 -_020E39A8: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E39B8: - cmp r0, #0x0 - bne _020E39EC - cmp r1, #0x2e - movne r5, #0x40 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r5, #0x20 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E39EC: - ldrb r2, [sp, #0x84] - cmp r2, #0x14 - ldrcs r0, [sp, #0x1c] - addcs r0, r0, #0x1 - strcs r0, [sp, #0x1c] - bhs _020E3A18 - add r0, r2, #0x1 - strb r0, [sp, #0x84] - add r0, sp, #0x80 - add r0, r0, r2 - strb r1, [r0, #0x5] -_020E3A18: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3A34: - cmp r1, #0x0 - blt _020E3A44 - cmp r1, #0x80 - blt _020E3A4C -_020E3A44: - mov r0, #0x0 - b _020E3A5C -_020E3A4C: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E3A5C: - cmp r0, #0x0 - moveq r5, #0x1000 - movne r5, #0x20 - b _020E4104 -_020E3A6C: - cmp r1, #0x0 - blt _020E3A7C - cmp r1, #0x80 - blt _020E3A84 -_020E3A7C: - mov r0, #0x0 - b _020E3A94 -_020E3A84: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E3A94: - cmp r0, #0x0 - moveq r5, #0x40 - beq _020E4104 - ldrb r3, [sp, #0x84] - cmp r3, #0x14 - bhs _020E3ADC - cmp r1, #0x30 - cmpeq r3, #0x0 - beq _020E3AD0 - ldrb r2, [sp, #0x84] - add r0, sp, #0x80 - add r0, r0, r3 - add r2, r2, #0x1 - strb r2, [sp, #0x84] - strb r1, [r0, #0x5] -_020E3AD0: - ldr r0, [sp, #0x1c] - sub r0, r0, #0x1 - str r0, [sp, #0x1c] -_020E3ADC: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3AF8: - cmp r1, #0x0 - blt _020E3B08 - cmp r1, #0x80 - blt _020E3B10 -_020E3B08: - mov r0, r1 - b _020E3B18 -_020E3B10: - ldr r0, _020E42FC ; =0x0210428C - ldrb r0, [r0, r1] -_020E3B18: - cmp r0, #0x45 - movne r5, #0x800 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r5, #0x80 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3B44: - cmp r1, #0x2b - bne _020E3B68 - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E3B90 -_020E3B68: - cmp r1, #0x2d - bne _020E3B90 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - mov r0, #0x1 - str r0, [sp, #0x24] -_020E3B90: - mov r5, #0x100 - b _020E4104 -_020E3B98: - cmp r1, #0x0 - blt _020E3BA8 - cmp r1, #0x80 - blt _020E3BB0 -_020E3BA8: - mov r0, #0x0 - b _020E3BC0 -_020E3BB0: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E3BC0: - cmp r0, #0x0 - moveq r5, #0x1000 - beq _020E4104 - cmp r1, #0x30 - movne r5, #0x400 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r5, #0x200 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3BF8: - cmp r1, #0x30 - movne r5, #0x400 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3C20: - cmp r1, #0x0 - blt _020E3C30 - cmp r1, #0x80 - blt _020E3C38 -_020E3C30: - mov r0, #0x0 - b _020E3C48 -_020E3C38: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E3C48: - cmp r0, #0x0 - moveq r5, #0x800 - beq _020E4104 - ldr r0, [sp, #0x20] - sub r2, r1, #0x30 - mov r1, #0xa - mla r0, r1, r0, r2 - ldr r1, _020E4304 ; =0x00007FFF - str r0, [sp, #0x20] - cmp r0, r1 - ldrgt r0, [sp, #0xd0] - movgt r1, #0x1 - strgt r1, [r0, #0x0] - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3C98: - cmp r10, #0x20 - bgt _020E3CE8 - bge _020E3FBC - cmp r10, #0x8 - bgt _020E3CDC - cmp r10, #0x0 - addge pc, pc, r10, lsl #0x2 - b _020E4104 -_020E3CB8: ; 0x020E3CB8 - b _020E4104 -_020E3CBC: ; 0x020E3CBC - b _020E3D0C -_020E3CC0: ; 0x020E3CC0 - b _020E3D5C -_020E3CC4: ; 0x020E3CC4 - b _020E4104 -_020E3CC8: ; 0x020E3CC8 - b _020E3D84 -_020E3CCC: ; 0x020E3CCC - b _020E4104 -_020E3CD0: ; 0x020E3CD0 - b _020E4104 -_020E3CD4: ; 0x020E3CD4 - b _020E4104 -_020E3CD8: ; 0x020E3CD8 - b _020E3E94 -_020E3CDC: - cmp r10, #0x10 - beq _020E3F70 - b _020E4104 -_020E3CE8: - cmp r10, #0x80 - bgt _020E3D00 - bge _020E4064 - cmp r10, #0x40 - beq _020E4004 - b _020E4104 -_020E3D00: - cmp r10, #0x100 - beq _020E408C - b _020E4104 -_020E3D0C: - mov r1, #0x0 - add r0, sp, #0x45 - str r0, [sp, #0x14] - strb r1, [r0, #0x0] - strb r1, [r0, #0x1] - strb r1, [r0, #0x2] - strb r1, [r0, #0x3] - strb r1, [r0, #0x4] - strb r1, [r0, #0x5] - strb r1, [r0, #0x6] - strb r1, [r0, #0x7] - mov r0, r8 - mov r2, r1 - str r1, [sp, #0x8] - mov r11, r1 - mov r10, #0x2 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3D5C: - cmp r1, #0x30 - movne r10, #0x4 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3D84: - cmp r1, #0x0 - blt _020E3D94 - cmp r1, #0x80 - blt _020E3D9C -_020E3D94: - mov r0, #0x0 - b _020E3DAC -_020E3D9C: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x400 -_020E3DAC: - cmp r0, #0x0 - bne _020E3DE0 - cmp r1, #0x2e - movne r10, #0x10 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r10, #0x8 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3DE0: - ldr r2, [sp, #0x8] - mov r0, #0xe - cmp r2, r0 - bhs _020E3E78 - mov r0, r2 - add r0, r0, #0x1 - str r0, [sp, #0x8] - ldr r0, [sp, #0x14] - add r2, r11, r11, lsr #0x1f - cmp r1, #0x0 - ldrb r0, [r0, r2, asr #0x1] - blt _020E3E20 - cmp r1, #0x80 - bge _020E3E20 - ldr r2, _020E42FC ; =0x0210428C - ldrb r1, [r2, r1] -_020E3E20: - cmp r1, #0x41 - subge r1, r1, #0x37 - sublt r1, r1, #0x30 - mov r2, r11, lsr #0x1f - and r3, r1, #0xff - rsb r1, r2, r11, lsl #0x1f - adds r1, r2, r1, ror #0x1f - moveq r1, r3, lsl #0x4 - add r2, r11, r11, lsr #0x1f - orrne r0, r0, r3 - andeq r1, r1, #0xff - orreq r0, r0, r1 - ldr r1, [sp, #0x14] - add r11, r11, #0x1 - strb r0, [r1, r2, asr #0x1] - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3E78: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3E94: - cmp r1, #0x0 - blt _020E3EA4 - cmp r1, #0x80 - blt _020E3EAC -_020E3EA4: - mov r0, #0x0 - b _020E3EBC -_020E3EAC: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x400 -_020E3EBC: - cmp r0, #0x0 - moveq r10, #0x10 - beq _020E4104 - ldr r2, [sp, #0x8] - mov r0, #0xe - cmp r2, r0 - bhs _020E3F54 - ldr r0, [sp, #0x14] - add r2, r11, r11, lsr #0x1f - cmp r1, #0x0 - ldrb r0, [r0, r2, asr #0x1] - blt _020E3EFC - cmp r1, #0x80 - bge _020E3EFC - ldr r2, _020E42FC ; =0x0210428C - ldrb r1, [r2, r1] -_020E3EFC: - cmp r1, #0x41 - subge r1, r1, #0x37 - sublt r1, r1, #0x30 - mov r2, r11, lsr #0x1f - and r3, r1, #0xff - rsb r1, r2, r11, lsl #0x1f - adds r1, r2, r1, ror #0x1f - moveq r1, r3, lsl #0x4 - add r2, r11, r11, lsr #0x1f - orrne r0, r0, r3 - andeq r1, r1, #0xff - orreq r0, r0, r1 - ldr r1, [sp, #0x14] - add r11, r11, #0x1 - strb r0, [r1, r2, asr #0x1] - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3F54: - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3F70: - cmp r1, #0x0 - blt _020E3F80 - cmp r1, #0x80 - blt _020E3F88 -_020E3F80: - mov r0, r1 - b _020E3F90 -_020E3F88: - ldr r0, _020E42FC ; =0x0210428C - ldrb r0, [r0, r1] -_020E3F90: - cmp r0, #0x50 - movne r5, #0x800 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r10, #0x20 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E3FBC: - cmp r1, #0x2d - moveq r0, #0x1 - streq r0, [sp, #0xc] - beq _020E3FE4 - cmp r1, #0x2b - beq _020E3FE4 - mov r0, r8 - mov r2, #0x1 - blx r9 - sub r4, r4, #0x1 -_020E3FE4: - mov r10, #0x40 - add r4, r4, #0x1 - mov r0, r8 - mov r1, #0x0 - mov r2, r1 - blx r9 - mov r1, r0 - b _020E4104 -_020E4004: - cmp r1, #0x0 - blt _020E4014 - cmp r1, #0x80 - blt _020E401C -_020E4014: - mov r0, #0x0 - b _020E402C -_020E401C: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E402C: - cmp r0, #0x0 - moveq r5, #0x1000 - beq _020E4104 - cmp r1, #0x30 - movne r10, #0x100 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - mov r10, #0x80 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E4064: - cmp r1, #0x30 - movne r10, #0x100 - bne _020E4104 - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - add r4, r4, #0x1 - blx r9 - mov r1, r0 - b _020E4104 -_020E408C: - cmp r1, #0x0 - blt _020E409C - cmp r1, #0x80 - blt _020E40A4 -_020E409C: - mov r0, #0x0 - b _020E40B4 -_020E40A4: - mov r2, r1, lsl #0x1 - ldr r0, _020E42F8 ; =0x0210430C - ldrh r0, [r0, r2] - and r0, r0, #0x8 -_020E40B4: - cmp r0, #0x0 - moveq r5, #0x800 - beq _020E4104 - ldr r0, [sp, #0x10] - sub r2, r1, #0x30 - mov r1, #0xa - mla r0, r1, r0, r2 - str r0, [sp, #0x10] - ldr r1, _020E4304 ; =0x00007FFF - ldr r0, [sp, #0x20] - add r4, r4, #0x1 - cmp r0, r1 - ldrgt r0, [sp, #0xd0] - movgt r1, #0x1 - strgt r1, [r0, #0x0] - mov r1, #0x0 - mov r0, r8 - mov r2, r1 - blx r9 - mov r1, r0 -_020E4104: - ldr r0, [sp, #0x0] - cmp r4, r0 - bgt _020E4124 - mvn r0, #0x0 - cmp r1, r0 - beq _020E4124 - tst r5, #0x1800 - beq _020E3418 -_020E4124: - cmp r5, #0x8000 - beq _020E4140 - ldr r0, _020E4308 ; =0x00000E2C - tst r5, r0 - moveq r0, #0x1 - movne r0, #0x0 - b _020E4164 -_020E4140: - sub r0, r4, #0x1 - cmp r0, #0x2 - ble _020E4158 - ldr r0, _020E430C ; =0x0000018E - tst r10, r0 - bne _020E4160 -_020E4158: - mov r0, #0x1 - b _020E4164 -_020E4160: - mov r0, #0x0 -_020E4164: - cmp r0, #0x0 - movne r2, #0x0 - ldrne r0, [sp, #0x4] - bne _020E4184 - ldr r0, [sp, #0x2c] - sub r2, r4, #0x1 - add r2, r2, r0 - ldr r0, [sp, #0x4] -_020E4184: - str r2, [r0, #0x0] - mov r0, r8 - mov r2, #0x1 - blx r9 - cmp r10, #0x0 - bne _020E4388 - ldr r0, [sp, #0x24] - ldrb r2, [sp, #0x84] - cmp r0, #0x0 - ldrne r0, [sp, #0x20] - rsbne r0, r0, #0x0 - strne r0, [sp, #0x20] - add r0, sp, #0x85 - add r1, r0, r2 - b _020E41CC -_020E41C0: - ldr r0, [sp, #0x1c] - add r0, r0, #0x1 - str r0, [sp, #0x1c] -_020E41CC: - cmp r2, #0x0 - sub r2, r2, #0x1 - beq _020E41E4 - ldrb r0, [r1, #-0x1]! - cmp r0, #0x30 - beq _020E41C0 -_020E41E4: - add r0, r2, #0x1 - strb r0, [sp, #0x84] - ands r2, r0, #0xff - bne _020E4208 - add r1, r2, #0x1 - strb r1, [sp, #0x84] - add r0, sp, #0x85 - mov r1, #0x30 - strb r1, [r0, r2] -_020E4208: - ldr r1, [sp, #0x20] - ldr r0, [sp, #0x1c] - mov r2, #0x8000 - add r0, r1, r0 - rsb r2, r2, #0x0 - str r0, [sp, #0x20] - cmp r0, r2 - blt _020E4230 - cmp r0, r2, lsr #0x11 - ble _020E423C -_020E4230: - ldr r0, [sp, #0xd0] - mov r1, #0x1 - str r1, [r0, #0x0] -_020E423C: - ldr r0, [sp, #0xd0] - ldr r0, [r0, #0x0] - cmp r0, #0x0 - beq _020E4298 - ldr r0, [sp, #0x24] - cmp r0, #0x0 - movne r0, #0x0 - addne sp, sp, #0xa8 - movne r1, r0 - ldmneia sp!, {r3-r11,pc} -_020E4264: ; 0x020E4264 - ldr r0, [sp, #0x28] - cmp r0, #0x0 - ldreq r1, _020E4310 ; =0x02106B7C - addeq sp, sp, #0xa8 - ldmeqia r1, {r0-r1} - ldmeqia sp!, {r3-r11,pc} -_020E427C: ; 0x020E427C - ldr r1, _020E4310 ; =0x02106B7C - mov r0, #0x0 - ldmia r1, {r2-r3} - mov r1, r0 - bl _dsub - add sp, sp, #0xa8 - ldmia sp!, {r3-r11,pc} -_020E4298: - ldr r1, [sp, #0x20] - add r0, sp, #0x80 - strh r1, [sp, #0x82] - bl __dec2num - mov r4, r0 - mov r6, r1 - mov r0, #0x0 - mov r1, r0 - mov r2, r4 - mov r3, r6 - bl _dneq - beq _020E4318 - mov r0, r4 - mov r1, r6 - mov r2, #0x0 - mov r3, #0x100000 - bl _dls - bhs _020E4318 - ldr r0, [sp, #0xd0] - mov r1, #0x1 - str r1, [r0, #0x0] - b _020E4344 - .balign 4 -_020E42F0: .word 0x02104439 -_020E42F4: .word 0x02104434 -_020E42F8: .word 0x0210430C -_020E42FC: .word 0x0210428C -_020E4300: .word 0x02106B74 -_020E4304: .word 0x00007FFF -_020E4308: .word 0x00000E2C -_020E430C: .word 0x0000018E -_020E4310: .word 0x02106B7C -_020E4314: .word 0x7FEFFFFF -_020E4318: - ldr r3, _020E4314 ; =0x7FEFFFFF - mov r0, r4 - mov r1, r6 - mvn r2, #0x0 - bl _dgr - bls _020E4344 - ldr r0, [sp, #0xd0] - mov r2, #0x1 - ldr r1, _020E4310 ; =0x02106B7C - str r2, [r0, #0x0] - ldmia r1, {r4,r6} -_020E4344: - ldr r0, [sp, #0x28] - cmp r0, #0x0 - beq _020E4378 - ldr r0, _020E4308 ; =0x00000E2C - tst r5, r0 - beq _020E4378 - mov r0, #0x0 - mov r1, r0 - mov r2, r4 - mov r3, r6 - bl _dsub - mov r4, r0 - mov r6, r1 -_020E4378: - add sp, sp, #0xa8 - mov r0, r4 - mov r1, r6 - ldmia sp!, {r3-r11,pc} -_020E4388: - ldr r0, [sp, #0xc] - add r4, sp, #0x38 - cmp r0, #0x0 - ldrne r0, [sp, #0x10] - ldrb r3, [sp, #0x45] - rsbne r0, r0, #0x0 - strne r0, [sp, #0x10] - ldr r1, [sp, #0x10] - ldr r0, [sp, #0x8] - mov r2, #0x0 - add r0, r1, r0, lsl #0x2 - str r0, [sp, #0x10] - mov r1, #0x80 - b _020E43D0 -_020E43C0: - ldr r0, [sp, #0x10] - add r2, r2, #0x1 - sub r0, r0, #0x1 - str r0, [sp, #0x10] -_020E43D0: - cmp r2, #0x4 - bhs _020E43E0 - tst r3, r1, asr r2 - beq _020E43C0 -_020E43E0: - adds r5, r2, #0x1 - beq _020E442C - add r0, sp, #0x4c - add r3, sp, #0x45 - str r0, [sp, #0x14] - mov r1, #0x0 - cmp r0, r3 - blo _020E442C - rsb r6, r5, #0x8 -_020E4404: - ldr r0, [sp, #0x14] - ldrb r0, [r0, #0x0] - orr r2, r1, r0, lsl r5 - mov r1, r0, asr r6 - ldr r0, [sp, #0x14] - and r1, r1, #0xff - strb r2, [r0], #-0x1 - str r0, [sp, #0x14] - cmp r0, r3 - bhs _020E4404 -_020E442C: - mov r2, #0x0 - mov r6, r2 - strb r2, [r4, #0x0] - strb r2, [r4, #0x1] - strb r2, [r4, #0x2] - strb r2, [r4, #0x3] - strb r2, [r4, #0x4] - strb r2, [r4, #0x5] - strb r2, [r4, #0x6] - strb r2, [r4, #0x7] - mov r3, #0xc - mov r7, #0x1 - mov r0, #0xff - add r1, sp, #0x45 -_020E4464: - add r5, r2, #0x8 - cmp r5, #0x34 - ldrb r5, [r1, r6] - rsbhi r8, r2, #0x34 - and r11, r3, #0x7 - andhi r5, r5, r0, lsl r8 - andhi r5, r5, #0xff - mov r8, r5, asr r11 - and r9, r8, #0xff - ldrb r10, [r4, r7] - rsb r8, r11, #0x8 - mov r5, r5, lsl r8 - orr r9, r10, r9 - strb r9, [r4, r7] - add r7, r7, #0x1 - add r2, r2, #0x8 - ldrb r8, [r4, r7] - and r5, r5, #0xff - cmp r2, #0x34 - orr r5, r8, r5 - strb r5, [r4, r7] - add r3, r3, #0x8 - add r6, r6, #0x1 - blo _020E4464 - ldr r0, [sp, #0x10] - mov r1, #0x800 - add r0, r0, #0xfe - add r2, r0, #0x300 - rsb r1, r1, #0x0 - tst r2, r1 - beq _020E44FC - ldr r2, [sp, #0xd0] - mov r3, #0x1 - mov r0, #0x0 - add sp, sp, #0xa8 - mov r1, r0 - str r3, [r2, #0x0] - ldmia sp!, {r3-r11,pc} -_020E44FC: - ldrb r0, [r4, #0x1] - mov r2, r2, lsl #0x15 - ldrb r1, [r4, #0x0] - orr r0, r0, r2, lsr #0x11 - strb r0, [r4, #0x1] - ldr r0, [sp, #0x28] - orr r1, r1, r2, lsr #0x19 - cmp r0, #0x0 - andne r0, r1, #0xff - strb r1, [r4, #0x0] - orrne r0, r0, #0x80 - strneb r0, [r4, #0x0] - mov r3, #0x0 -_020E4530: - rsb r1, r3, #0x7 - ldrb r2, [r4, r3] - ldrb r0, [r4, r1] - strb r0, [r4, r3] - add r3, r3, #0x1 - strb r2, [r4, r1] - cmp r3, #0x4 - blt _020E4530 - ldmia r4, {r0-r1} - add sp, sp, #0xa8 - ldmia sp!, {r3-r11,pc} - - arm_func_start strtold -strtold: ; 0x020E455C - stmdb sp!, {r4-r7,lr} - sub sp, sp, #0x14 - mov r7, r0 - mov r0, #0x0 - mov r6, r1 - str r0, [sp, #0x8] - add r4, sp, #0xc - str r7, [sp, #0x4] - ldr r1, _020E4630 ; =__StringRead - add r2, sp, #0x4 - add r3, sp, #0x10 - sub r0, r0, #0x80000001 - str r4, [sp, #0x0] - bl __strtold - mov r5, r1 - mov r4, r0 - cmp r6, #0x0 - ldrne r0, [sp, #0x10] - mov r1, r5 - addne r0, r7, r0 - strne r0, [r6, #0x0] - mov r0, r4 - bl fabs - ldr r2, [sp, #0xc] - mov r6, r0 - mov r7, r1 - cmp r2, #0x0 - bne _020E4614 - mov r0, #0x0 - mov r1, r0 - mov r2, r4 - mov r3, r5 - bl _dneq - beq _020E4620 - mov r0, r6 - mov r1, r7 - mov r2, #0x0 - mov r3, #0x100000 - bl _dls - blo _020E4614 - ldr r3, _020E4634 ; =0x7FEFFFFF - mov r0, r6 - mov r1, r7 - mvn r2, #0x0 - bl _dgr - bls _020E4620 -_020E4614: - ldr r0, _020E4638 ; =0x021D74A8 - mov r1, #0x22 - str r1, [r0, #0x0] -_020E4620: - mov r0, r4 - mov r1, r5 - add sp, sp, #0x14 - ldmia sp!, {r4-r7,pc} - .balign 4 -_020E4630: .word __StringRead -_020E4634: .word 0x7FEFFFFF -_020E4638: .word 0x021D74A8 - - arm_func_start atod -atod: ; 0x020E463C - ldr ip, _020E4648 ; =strtold - mov r1, #0x0 - bx r12 - .balign 4 -_020E4648: .word strtold - - arm_func_start __strtoul -__strtoul: - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0xc - ldr r4, [sp, #0x38] - movs r9, r0 - ldr r0, [sp, #0x34] - str r4, [sp, #0x38] - mov r4, #0x0 - str r0, [sp, #0x34] - ldr r0, [sp, #0x38] - str r1, [sp, #0x0] - str r4, [r0, #0x0] - mov r0, r4 - str r0, [sp, #0x4] - ldr r0, [sp, #0x34] - mov r1, r4 - str r1, [r0, #0x0] - ldr r0, [sp, #0x30] - str r4, [sp, #0x8] - mov r8, r2 - mov r7, r3 - mov r5, r4 - mov r10, r4 - str r0, [sp, #0x30] - mov r4, #0x1 - bmi _020E46CC - cmp r9, #0x1 - beq _020E46CC - cmp r9, #0x24 - bgt _020E46CC - ldr r0, [sp, #0x0] - cmp r0, #0x1 - bge _020E46D4 -_020E46CC: - mov r4, #0x40 - b _020E46F0 -_020E46D4: - ldr r1, [sp, #0x8] - mov r0, r7 - mov r3, r1 - mov r2, r1 - add r5, r3, #0x1 - blx r8 - mov r6, r0 -_020E46F0: - cmp r9, #0x0 - beq _020E4708 - mov r1, r9 - mvn r0, #0x0 - bl _u32_div_f - str r0, [sp, #0x4] -_020E4708: - mvn r11, #0x0 - b _020E49C8 -_020E4710: - cmp r4, #0x8 - bgt _020E4748 - cmp r4, #0x0 - addge pc, pc, r4, lsl #0x2 - b _020E49C8 -_020E4724: ; 0x020E4724 - b _020E49C8 -_020E4728: ; 0x020E4728 - b _020E4754 -_020E472C: ; 0x020E472C - b _020E4800 -_020E4730: ; 0x020E4730 - b _020E49C8 -_020E4734: ; 0x020E4734 - b _020E483C -_020E4738: ; 0x020E4738 - b _020E49C8 -_020E473C: ; 0x020E473C - b _020E49C8 -_020E4740: ; 0x020E4740 - b _020E49C8 -_020E4744: ; 0x020E4744 - b _020E487C -_020E4748: - cmp r4, #0x10 - beq _020E487C - b _020E49C8 -_020E4754: - cmp r6, #0x0 - blt _020E4764 - cmp r6, #0x80 - blt _020E476C -_020E4764: - mov r0, #0x0 - b _020E477C -_020E476C: - ldr r0, _020E4A2C ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x100 -_020E477C: - cmp r0, #0x0 - beq _020E47A8 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - blx r8 - mov r6, r0 - ldr r0, [sp, #0x8] - add r0, r0, #0x1 - str r0, [sp, #0x8] - b _020E49C8 -_020E47A8: - cmp r6, #0x2b - bne _020E47CC - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E47F8 -_020E47CC: - cmp r6, #0x2d - bne _020E47F8 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - ldr r0, [sp, #0x34] - mov r1, #0x1 - str r1, [r0, #0x0] -_020E47F8: - mov r4, #0x2 - b _020E49C8 -_020E4800: - cmp r9, #0x0 - cmpne r9, #0x10 - bne _020E4834 - cmp r6, #0x30 - bne _020E4834 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - mov r4, #0x4 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E49C8 -_020E4834: - mov r4, #0x8 - b _020E49C8 -_020E483C: - cmp r6, #0x58 - cmpne r6, #0x78 - bne _020E486C - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - mov r9, #0x10 - mov r4, #0x8 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E49C8 -_020E486C: - cmp r9, #0x0 - moveq r9, #0x8 - mov r4, #0x10 - b _020E49C8 -_020E487C: - ldr r0, [sp, #0x4] - cmp r9, #0x0 - moveq r9, #0xa - cmp r0, #0x0 - bne _020E48A0 - mov r0, r11 - mov r1, r9 - bl _u32_div_f - str r0, [sp, #0x4] -_020E48A0: - cmp r6, #0x0 - blt _020E48B0 - cmp r6, #0x80 - blt _020E48B8 -_020E48B0: - mov r0, #0x0 - b _020E48C8 -_020E48B8: - ldr r0, _020E4A2C ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x8 -_020E48C8: - cmp r0, #0x0 - beq _020E48F0 - sub r6, r6, #0x30 - cmp r6, r9 - blt _020E4978 - cmp r4, #0x10 - moveq r4, #0x20 - movne r4, #0x40 - add r6, r6, #0x30 - b _020E49C8 -_020E48F0: - cmp r6, #0x0 - blt _020E4900 - cmp r6, #0x80 - blt _020E4908 -_020E4900: - mov r0, #0x0 - b _020E4918 -_020E4908: - ldr r0, _020E4A2C ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x1 -_020E4918: - cmp r0, #0x0 - beq _020E494C - cmp r6, #0x0 - blt _020E4930 - cmp r6, #0x80 - blt _020E4938 -_020E4930: - mov r0, r6 - b _020E4940 -_020E4938: - ldr r0, _020E4A30 ; =0x0210428C - ldrb r0, [r0, r6] -_020E4940: - sub r0, r0, #0x37 - cmp r0, r9 - blt _020E495C -_020E494C: - cmp r4, #0x10 - moveq r4, #0x20 - movne r4, #0x40 - b _020E49C8 -_020E495C: - cmp r6, #0x0 - blt _020E4974 - cmp r6, #0x80 - bge _020E4974 - ldr r0, _020E4A30 ; =0x0210428C - ldrb r6, [r0, r6] -_020E4974: - sub r6, r6, #0x37 -_020E4978: - ldr r0, [sp, #0x4] - mov r4, #0x10 - cmp r10, r0 - ldrhi r0, [sp, #0x38] - movhi r1, #0x1 - strhi r1, [r0, #0x0] - mul r0, r10, r9 - mov r10, r0 - sub r0, r11, r0 - cmp r6, r0 - ldrhi r0, [sp, #0x38] - movhi r1, #0x1 - strhi r1, [r0, #0x0] - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - add r10, r10, r6 - add r5, r5, #0x1 - blx r8 - mov r6, r0 -_020E49C8: - ldr r0, [sp, #0x0] - cmp r5, r0 - bgt _020E49E4 - cmp r6, r11 - beq _020E49E4 - tst r4, #0x60 - beq _020E4710 -_020E49E4: - tst r4, #0x34 - bne _020E49FC - ldr r0, [sp, #0x30] - mov r10, #0x0 - str r10, [r0, #0x0] - b _020E4A10 -_020E49FC: - ldr r0, [sp, #0x8] - sub r1, r5, #0x1 - add r1, r1, r0 - ldr r0, [sp, #0x30] - str r1, [r0, #0x0] -_020E4A10: - mov r0, r7 - mov r1, r6 - mov r2, #0x1 - blx r8 - mov r0, r10 - add sp, sp, #0xc - ldmia sp!, {r4-r11,pc} - .balign 4 -_020E4A2C: .word 0x0210430C -_020E4A30: .word 0x0210428C - - arm_func_start __strtoull -__strtoull: ; 0x020E4A34 - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x1c - ldr r4, [sp, #0x48] - movs r9, r0 - ldr r0, [sp, #0x44] - str r4, [sp, #0x48] - mov r4, #0x0 - str r0, [sp, #0x44] - ldr r0, [sp, #0x48] - str r1, [sp, #0x0] - str r4, [r0, #0x0] - mov r0, r4 - str r0, [sp, #0xc] - str r0, [sp, #0x8] - ldr r0, [sp, #0x44] - mov r1, r4 - str r1, [r0, #0x0] - ldr r0, [sp, #0x40] - str r4, [sp, #0x14] - mov r8, r2 - mov r7, r3 - mov r5, r4 - mov r10, r4 - mov r11, r4 - str r0, [sp, #0x40] - mov r4, #0x1 - bmi _020E4ABC - cmp r9, #0x1 - beq _020E4ABC - cmp r9, #0x24 - bgt _020E4ABC - ldr r0, [sp, #0x0] - cmp r0, #0x1 - bge _020E4AC4 -_020E4ABC: - mov r4, #0x40 - b _020E4ADC -_020E4AC4: - ldr r1, [sp, #0x14] - mov r0, r7 - mov r2, r1 - add r5, r1, #0x1 - blx r8 - mov r6, r0 -_020E4ADC: - cmp r9, #0x0 - beq _020E4B00 - mvn r0, #0x0 - mov r1, r0 - mov r3, r9, asr #0x1f - mov r2, r9 - bl _ll_udiv - str r0, [sp, #0xc] - str r1, [sp, #0x8] -_020E4B00: - mvn r0, #0x0 - str r0, [sp, #0x18] - b _020E4E08 -_020E4B0C: - cmp r4, #0x8 - bgt _020E4B44 - cmp r4, #0x0 - addge pc, pc, r4, lsl #0x2 - b _020E4E08 -_020E4B20: ; 0x020E4B20 - b _020E4E08 -_020E4B24: ; 0x020E4B24 - b _020E4B50 -_020E4B28: ; 0x020E4B28 - b _020E4BFC -_020E4B2C: ; 0x020E4B2C - b _020E4E08 -_020E4B30: ; 0x020E4B30 - b _020E4C38 -_020E4B34: ; 0x020E4B34 - b _020E4E08 -_020E4B38: ; 0x020E4B38 - b _020E4E08 -_020E4B3C: ; 0x020E4B3C - b _020E4E08 -_020E4B40: ; 0x020E4B40 - b _020E4C78 -_020E4B44: - cmp r4, #0x10 - beq _020E4C78 - b _020E4E08 -_020E4B50: - cmp r6, #0x0 - blt _020E4B60 - cmp r6, #0x80 - blt _020E4B68 -_020E4B60: - mov r0, #0x0 - b _020E4B78 -_020E4B68: - ldr r0, _020E4E78 ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x100 -_020E4B78: - cmp r0, #0x0 - beq _020E4BA4 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - blx r8 - mov r6, r0 - ldr r0, [sp, #0x14] - add r0, r0, #0x1 - str r0, [sp, #0x14] - b _020E4E08 -_020E4BA4: - cmp r6, #0x2b - bne _020E4BC8 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E4BF4 -_020E4BC8: - cmp r6, #0x2d - bne _020E4BF4 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - ldr r0, [sp, #0x44] - mov r1, #0x1 - str r1, [r0, #0x0] -_020E4BF4: - mov r4, #0x2 - b _020E4E08 -_020E4BFC: - cmp r9, #0x0 - cmpne r9, #0x10 - bne _020E4C30 - cmp r6, #0x30 - bne _020E4C30 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - mov r4, #0x4 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E4E08 -_020E4C30: - mov r4, #0x8 - b _020E4E08 -_020E4C38: - cmp r6, #0x58 - cmpne r6, #0x78 - bne _020E4C68 - mov r1, #0x0 - mov r0, r7 - mov r2, r1 - mov r9, #0x10 - mov r4, #0x8 - add r5, r5, #0x1 - blx r8 - mov r6, r0 - b _020E4E08 -_020E4C68: - cmp r9, #0x0 - moveq r9, #0x8 - mov r4, #0x10 - b _020E4E08 -_020E4C78: - ldr r1, [sp, #0x8] - mov r0, #0x0 - cmp r9, #0x0 - moveq r9, #0xa - cmp r1, r0 - ldr r1, [sp, #0xc] - cmpeq r1, r0 - bne _020E4CB4 - ldr r0, [sp, #0x18] - mov r3, r9, asr #0x1f - mov r1, r0 - mov r2, r9 - bl _ll_udiv - str r0, [sp, #0xc] - str r1, [sp, #0x8] -_020E4CB4: - cmp r6, #0x0 - blt _020E4CC4 - cmp r6, #0x80 - blt _020E4CCC -_020E4CC4: - mov r0, #0x0 - b _020E4CDC -_020E4CCC: - ldr r0, _020E4E78 ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x8 -_020E4CDC: - cmp r0, #0x0 - beq _020E4D04 - sub r6, r6, #0x30 - cmp r6, r9 - blt _020E4D8C - cmp r4, #0x10 - moveq r4, #0x20 - movne r4, #0x40 - add r6, r6, #0x30 - b _020E4E08 -_020E4D04: - cmp r6, #0x0 - blt _020E4D14 - cmp r6, #0x80 - blt _020E4D1C -_020E4D14: - mov r0, #0x0 - b _020E4D2C -_020E4D1C: - ldr r0, _020E4E78 ; =0x0210430C - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x1 -_020E4D2C: - cmp r0, #0x0 - beq _020E4D60 - cmp r6, #0x0 - blt _020E4D44 - cmp r6, #0x80 - blt _020E4D4C -_020E4D44: - mov r0, r6 - b _020E4D54 -_020E4D4C: - ldr r0, _020E4E7C ; =0x0210428C - ldrb r0, [r0, r6] -_020E4D54: - sub r0, r0, #0x37 - cmp r0, r9 - blt _020E4D70 -_020E4D60: - cmp r4, #0x10 - moveq r4, #0x20 - movne r4, #0x40 - b _020E4E08 -_020E4D70: - cmp r6, #0x0 - blt _020E4D88 - cmp r6, #0x80 - bge _020E4D88 - ldr r0, _020E4E7C ; =0x0210428C - ldrb r6, [r0, r6] -_020E4D88: - sub r6, r6, #0x37 -_020E4D8C: - ldr r0, [sp, #0x8] - umull r2, r3, r10, r9 - cmp r11, r0 - ldr r0, [sp, #0xc] - mov r4, #0x10 - cmpeq r10, r0 - ldrhi r0, [sp, #0x48] - movhi r1, #0x1 - strhi r1, [r0, #0x0] - mov r1, r9, asr #0x1f - mla r3, r10, r1, r3 - mla r3, r11, r9, r3 - ldr r1, [sp, #0x18] - mov r10, r2 - subs r2, r1, r2 - mov r0, r6, asr #0x1f - sbc r1, r1, r3 - cmp r0, r1 - cmpeq r6, r2 - ldrhi r1, [sp, #0x48] - movhi r2, #0x1 - strhi r2, [r1, #0x0] - mov r1, #0x0 - mov r11, r3 - adds r10, r10, r6 - adc r11, r11, r0 - mov r0, r7 - mov r2, r1 - add r5, r5, #0x1 - blx r8 - mov r6, r0 -_020E4E08: - ldr r0, [sp, #0x0] - cmp r5, r0 - bgt _020E4E28 - ldr r0, [sp, #0x18] - cmp r6, r0 - beq _020E4E28 - tst r4, #0x60 - beq _020E4B0C -_020E4E28: - tst r4, #0x34 - bne _020E4E44 - ldr r0, [sp, #0x40] - mov r10, #0x0 - mov r11, r10 - str r10, [r0, #0x0] - b _020E4E58 -_020E4E44: - ldr r0, [sp, #0x14] - sub r1, r5, #0x1 - add r1, r1, r0 - ldr r0, [sp, #0x40] - str r1, [r0, #0x0] -_020E4E58: - mov r0, r7 - mov r1, r6 - mov r2, #0x1 - blx r8 - mov r0, r10 - mov r1, r11 - add sp, sp, #0x1c - ldmia sp!, {r4-r11,pc} - .balign 4 -_020E4E78: .word 0x0210430C -_020E4E7C: .word 0x0210428C - - arm_func_start strtoul -strtoul: ; 0x020E4E80 - stmdb sp!, {r3-r5,lr} - sub sp, sp, #0x20 - mov r5, r0 - mov lr, #0x0 - mov r0, r2 - mov r4, r1 - add r2, sp, #0x1c - str r5, [sp, #0xc] - str lr, [sp, #0x10] - str r2, [sp, #0x0] - add r1, sp, #0x18 - str r1, [sp, #0x4] - add r12, sp, #0x14 - ldr r2, _020E4F10 ; =__StringRead - add r3, sp, #0xc - sub r1, lr, #0x80000001 - str r12, [sp, #0x8] - bl __strtoul -_020E4EC8: ; 0x020E4EC8 - cmp r4, #0x0 - ldrne r1, [sp, #0x1c] - addne r1, r5, r1 - strne r1, [r4, #0x0] - ldr r1, [sp, #0x14] - cmp r1, #0x0 - beq _020E4EFC - ldr r0, _020E4F14 ; =0x021D74A8 - mov r1, #0x22 - str r1, [r0, #0x0] - add sp, sp, #0x20 - mvn r0, #0x0 - ldmia sp!, {r3-r5,pc} -_020E4EFC: - ldr r1, [sp, #0x18] - cmp r1, #0x0 - rsbne r0, r0, #0x0 - add sp, sp, #0x20 - ldmia sp!, {r3-r5,pc} - .balign 4 -_020E4F10: .word __StringRead -_020E4F14: .word 0x021D74A8 - - arm_func_start strtold2 -strtold2: ; 0x020E4F18 - stmdb sp!, {r3-r5,lr} - sub sp, sp, #0x20 - mov r5, r0 - mov lr, #0x0 - mov r0, r2 - mov r4, r1 - add r2, sp, #0x1c - str r5, [sp, #0xc] - str lr, [sp, #0x10] - str r2, [sp, #0x0] - add r1, sp, #0x18 - str r1, [sp, #0x4] - add r12, sp, #0x14 - ldr r2, _020E4FD8 ; =__StringRead - add r3, sp, #0xc - sub r1, lr, #0x80000001 - str r12, [sp, #0x8] - bl __strtoul -_020E4F60: ; 0x020E4F60 - cmp r4, #0x0 - ldrne r1, [sp, #0x1c] - addne r1, r5, r1 - strne r1, [r4, #0x0] - ldr r1, [sp, #0x14] - cmp r1, #0x0 - bne _020E4FA4 - ldr r2, [sp, #0x18] - cmp r2, #0x0 - bne _020E4F94 - mvn r1, #0x80000000 - cmp r0, r1 - bhi _020E4FA4 -_020E4F94: - cmp r2, #0x0 - beq _020E4FC8 - cmp r0, #0x80000000 - bls _020E4FC8 -_020E4FA4: - ldr r0, [sp, #0x18] - ldr r1, _020E4FDC ; =0x021D74A8 - mov r2, #0x22 - cmp r0, #0x0 - movne r0, #0x80000000 - str r2, [r1, #0x0] - add sp, sp, #0x20 - mvneq r0, #0x80000000 - ldmia sp!, {r3-r5,pc} -_020E4FC8: - cmp r2, #0x0 - rsbne r0, r0, #0x0 - add sp, sp, #0x20 - ldmia sp!, {r3-r5,pc} - .balign 4 -_020E4FD8: .word __StringRead -_020E4FDC: .word 0x021D74A8 - - arm_func_start atol -atol: ; 0x020E4FE0 - ldr ip, _020E4FF0 ; =strtold - mov r1, #0x0 - mov r2, #0xa - bx r12 - .balign 4 -_020E4FF0: .word strtold2 - - arm_func_start fwide -fwide: - cmp r0, #0x0 - beq _020E500C - ldr r3, [r0, #0x4] - mov r2, r3, lsl #0x16 - movs r2, r2, lsr #0x1d - bne _020E5014 -_020E500C: - mov r0, #0x0 - bx lr -_020E5014: - mov r2, r3, lsl #0x14 - movs r2, r2, lsr #0x1e - beq _020E5034 - cmp r2, #0x1 - beq _020E505C - cmp r2, #0x2 - moveq r1, #0x1 - b _020E5060 -_020E5034: - cmp r1, #0x0 - ble _020E504C - bic r2, r3, #0xc00 - orr r2, r2, #0x800 - str r2, [r0, #0x4] - b _020E5060 -_020E504C: - biclt r2, r3, #0xc00 - orrlt r2, r2, #0x400 - strlt r2, [r0, #0x4] - b _020E5060 -_020E505C: - mvn r1, #0x0 -_020E5060: - mov r0, r1 - bx lr - - arm_func_start wmemcpy -wmemcpy: ; 0x020E5068 - ldr ip, _020E5074 ; =memcpy - mov r2, r2, lsl #0x1 - bx r12 - .balign 4 -_020E5074: .word memcpy - - arm_func_start wmemchr -wmemchr: - cmp r2, #0x0 - beq _020E5098 -_020E5080: - ldrh r3, [r0, #0x0] - cmp r3, r1 - bxeq lr - add r0, r0, #0x2 - subs r2, r2, #0x1 - bne _020E5080 -_020E5098: - mov r0, #0x0 - bx lr - - arm_func_start parse_format_wprintf -parse_format_wprintf: ; 0x020E50A0 - stmdb sp!, {r4-r8,lr} - sub sp, sp, #0x10 - ldrh r3, [r0, #0x2] - mov r4, #0x0 - mov r5, #0x1 - mov lr, r2 - strb r5, [sp, #0x0] - strb r4, [sp, #0x1] - strb r4, [sp, #0x2] - strb r4, [sp, #0x3] - strb r4, [sp, #0x4] - str r4, [sp, #0x8] - str r4, [sp, #0xc] - cmp r3, #0x25 - add r12, r0, #0x2 - bne _020E50FC - add r0, sp, #0x0 - strh r3, [sp, #0x6] - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add sp, sp, #0x10 - add r0, r12, #0x2 - ldmia sp!, {r4-r8,pc} -_020E50FC: - mov r2, #0x2 - mov r0, r4 - mov r5, r2 - mov r6, r4 - mov r7, #0x1 -_020E5110: - mov r8, r7 - cmp r3, #0x2b - bgt _020E5140 - bge _020E5168 - cmp r3, #0x23 - bgt _020E5198 - cmp r3, #0x20 - blt _020E5198 - beq _020E5170 - cmp r3, #0x23 - beq _020E5180 - b _020E5198 -_020E5140: - cmp r3, #0x30 - bgt _020E5198 - cmp r3, #0x2d - blt _020E5198 - beq _020E5160 - cmp r3, #0x30 - beq _020E5188 - b _020E5198 -_020E5160: - strb r6, [sp, #0x0] - b _020E519C -_020E5168: - strb r7, [sp, #0x1] - b _020E519C -_020E5170: - ldrb r4, [sp, #0x1] - cmp r4, #0x1 - strneb r5, [sp, #0x1] - b _020E519C -_020E5180: - strb r7, [sp, #0x3] - b _020E519C -_020E5188: - ldrb r4, [sp, #0x0] - cmp r4, #0x0 - strneb r2, [sp, #0x0] - b _020E519C -_020E5198: - mov r8, r0 -_020E519C: - cmp r8, #0x0 - ldrneh r3, [r12, #0x2]! - bne _020E5110 - cmp r3, #0x2a - bne _020E51E4 - ldr r0, [r1, #0x0] - add r0, r0, #0x4 - str r0, [r1, #0x0] - ldr r0, [r0, #-0x4] - str r0, [sp, #0x8] - cmp r0, #0x0 - bge _020E51DC - rsb r0, r0, #0x0 - mov r2, #0x0 - strb r2, [sp, #0x0] - str r0, [sp, #0x8] -_020E51DC: - ldrh r3, [r12, #0x2]! - b _020E5228 -_020E51E4: - mov r2, #0x0 - ldr r5, _020E560C ; =0x02104544 - mov r0, #0xa - b _020E5208 -_020E51F4: - ldr r4, [sp, #0x8] - sub r3, r3, #0x30 - mla r6, r4, r0, r3 - ldrh r3, [r12, #0x2]! - str r6, [sp, #0x8] -_020E5208: - cmp r3, #0x80 - movcs r4, r2 - bhs _020E5220 - mov r4, r3, lsl #0x1 - ldrh r4, [r5, r4] - and r4, r4, #0x8 -_020E5220: - cmp r4, #0x0 - bne _020E51F4 -_020E5228: - ldr r2, [sp, #0x8] - ldr r0, _020E5610 ; =0x000001FD - cmp r2, r0 - ble _020E5258 - ldr r1, _020E5614 ; =0x0000FFFF - add r0, sp, #0x0 - strh r1, [sp, #0x6] - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add sp, sp, #0x10 - add r0, r12, #0x2 - ldmia sp!, {r4-r8,pc} -_020E5258: - cmp r3, #0x2e - bne _020E52E0 - ldrh r3, [r12, #0x2]! - mov r0, #0x1 - strb r0, [sp, #0x2] - cmp r3, #0x2a - bne _020E529C - ldr r0, [r1, #0x0] - add r0, r0, #0x4 - str r0, [r1, #0x0] - ldr r0, [r0, #-0x4] - ldrh r3, [r12, #0x2]! - str r0, [sp, #0xc] - cmp r0, #0x0 - movlt r0, #0x0 - strltb r0, [sp, #0x2] - b _020E52E0 -_020E529C: - mov r1, #0x0 - ldr r4, _020E560C ; =0x02104544 - mov r0, #0xa - b _020E52C0 -_020E52AC: - ldr r2, [sp, #0xc] - sub r3, r3, #0x30 - mla r5, r2, r0, r3 - ldrh r3, [r12, #0x2]! - str r5, [sp, #0xc] -_020E52C0: - cmp r3, #0x80 - movcs r2, r1 - bhs _020E52D8 - mov r2, r3, lsl #0x1 - ldrh r2, [r4, r2] - and r2, r2, #0x8 -_020E52D8: - cmp r2, #0x0 - bne _020E52AC -_020E52E0: - cmp r3, #0x6c - mov r0, #0x1 - bgt _020E5318 - cmp r3, #0x68 - blt _020E530C - beq _020E5334 - cmp r3, #0x6a - beq _020E5380 - cmp r3, #0x6c - beq _020E5350 - b _020E53A4 -_020E530C: - cmp r3, #0x4c - beq _020E5374 - b _020E53A4 -_020E5318: - cmp r3, #0x74 - bgt _020E5328 - beq _020E538C - b _020E53A4 -_020E5328: - cmp r3, #0x7a - beq _020E5398 - b _020E53A4 -_020E5334: - ldrh r1, [r12, #0x2] - mov r2, #0x2 - strb r2, [sp, #0x4] - cmp r1, #0x68 - streqb r0, [sp, #0x4] - ldreqh r3, [r12, #0x2]! - b _020E53A8 -_020E5350: - ldrh r1, [r12, #0x2] - mov r2, #0x3 - strb r2, [sp, #0x4] - cmp r1, #0x6c - bne _020E53A8 - mov r1, #0x4 - strb r1, [sp, #0x4] - ldrh r3, [r12, #0x2]! - b _020E53A8 -_020E5374: - mov r1, #0x9 - strb r1, [sp, #0x4] - b _020E53A8 -_020E5380: - mov r1, #0x6 - strb r1, [sp, #0x4] - b _020E53A8 -_020E538C: - mov r1, #0x8 - strb r1, [sp, #0x4] - b _020E53A8 -_020E5398: - mov r1, #0x7 - strb r1, [sp, #0x4] - b _020E53A8 -_020E53A4: - mov r0, #0x0 -_020E53A8: - cmp r0, #0x0 - ldrneh r3, [r12, #0x2]! - strh r3, [sp, #0x6] - cmp r3, #0x61 - bgt _020E53FC - bge _020E54E0 - cmp r3, #0x47 - bgt _020E53F0 - subs r0, r3, #0x41 - addpl pc, pc, r0, lsl #0x2 - b _020E55EC -_020E53D4: ; 0x020E53D4 - b _020E54E0 -_020E53D8: ; 0x020E53D8 - b _020E55EC -_020E53DC: ; 0x020E53DC - b _020E55EC -_020E53E0: ; 0x020E53E0 - b _020E55EC -_020E53E4: ; 0x020E53E4 - b _020E5528 -_020E53E8: ; 0x020E53E8 - b _020E54A8 -_020E53EC: ; 0x020E53EC - b _020E5518 -_020E53F0: - cmp r3, #0x58 - beq _020E5470 - b _020E55EC -_020E53FC: - cmp r3, #0x63 - bgt _020E540C - beq _020E5588 - b _020E55EC -_020E540C: - sub r0, r3, #0x64 - cmp r0, #0x14 - addls pc, pc, r0, lsl #0x2 - b _020E55EC -_020E541C: - b _020E5470 -_020E5420: - b _020E5528 -_020E5424: - b _020E54A8 -_020E5428: - b _020E5518 -_020E542C: - b _020E55EC -_020E5430: - b _020E5470 -_020E5434: - b _020E55EC -_020E5438: - b _020E55EC -_020E543C: - b _020E55EC -_020E5440: - b _020E55EC -_020E5444: - b _020E55D8 -_020E5448: - b _020E5470 -_020E544C: - b _020E5564 -_020E5450: - b _020E55EC -_020E5454: - b _020E55EC -_020E5458: - b _020E55B4 -_020E545C: - b _020E55EC -_020E5460: - b _020E5470 -_020E5464: - b _020E55EC -_020E5468: - b _020E55EC -_020E546C: - b _020E5470 -_020E5470: - ldrb r0, [sp, #0x4] - cmp r0, #0x9 - moveq r0, #0x4 - streqb r0, [sp, #0x4] - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x1 - streq r0, [sp, #0xc] - beq _020E55F4 - ldrb r0, [sp, #0x0] - cmp r0, #0x2 - moveq r0, #0x1 - streqb r0, [sp, #0x0] - b _020E55F4 -_020E54A8: - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - ldreq r0, _020E5614 ; =0x0000FFFF - streqh r0, [sp, #0x6] - beq _020E55F4 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x6 - streq r0, [sp, #0xc] - b _020E55F4 -_020E54E0: - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0xd - streq r0, [sp, #0xc] - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - cmpne r0, #0x1 - ldreq r0, _020E5614 ; =0x0000FFFF - streqh r0, [sp, #0x6] - b _020E55F4 -_020E5518: - ldr r0, [sp, #0xc] - cmp r0, #0x0 - moveq r0, #0x1 - streq r0, [sp, #0xc] -_020E5528: - ldrb r0, [sp, #0x4] - cmp r0, #0x2 - cmpne r0, #0x6 - cmpne r0, #0x7 - cmpne r0, #0x8 - cmpne r0, #0x4 - cmpne r0, #0x1 - ldreq r0, _020E5614 ; =0x0000FFFF - streqh r0, [sp, #0x6] - beq _020E55F4 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - moveq r0, #0x6 - streq r0, [sp, #0xc] - b _020E55F4 -_020E5564: - mov r3, #0x3 - mov r2, #0x1 - mov r1, #0x78 - mov r0, #0x8 - strb r3, [sp, #0x4] - strb r2, [sp, #0x3] - strh r1, [sp, #0x6] - str r0, [sp, #0xc] - b _020E55F4 -_020E5588: - ldrb r1, [sp, #0x4] - cmp r1, #0x3 - moveq r0, #0x5 - streqb r0, [sp, #0x4] - beq _020E55F4 - ldrb r0, [sp, #0x2] - cmp r0, #0x0 - cmpeq r1, #0x0 - ldrne r0, _020E5614 ; =0x0000FFFF - strneh r0, [sp, #0x6] - b _020E55F4 -_020E55B4: - ldrb r0, [sp, #0x4] - cmp r0, #0x3 - moveq r0, #0x5 - streqb r0, [sp, #0x4] - beq _020E55F4 - cmp r0, #0x0 - ldrne r0, _020E5614 ; =0x0000FFFF - strneh r0, [sp, #0x6] - b _020E55F4 -_020E55D8: - ldrb r0, [sp, #0x4] - cmp r0, #0x9 - moveq r0, #0x4 - streqb r0, [sp, #0x4] - b _020E55F4 -_020E55EC: - ldr r0, _020E5614 ; =0x0000FFFF - strh r0, [sp, #0x6] -_020E55F4: - add r0, sp, #0x0 - ldmia r0, {r0-r3} - stmia lr, {r0-r3} - add r0, r12, #0x2 - add sp, sp, #0x10 - ldmia sp!, {r4-r8,pc} - .balign 4 -_020E560C: .word 0x02104544 -_020E5610: .word 0x000001FD -_020E5614: .word 0x0000FFFF - - arm_func_start long2str_wide -long2str_wide: ; 0x020E5618 - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x10 - movs r10, r0 - mov r0, #0x0 - mov r5, r1 - str r0, [sp, #0xc] - ldr r7, [sp, #0x4c] - mov r6, r0 - strh r0, [r5, #-0x2]! - ldrb r0, [sp, #0x43] - str r1, [sp, #0x0] - ldrh r8, [sp, #0x46] - str r0, [sp, #0x4] - ldr r0, [sp, #0x48] - ldrb r11, [sp, #0x41] - str r0, [sp, #0x8] - cmpeq r7, #0x0 - bne _020E568C - ldr r0, [sp, #0x4] - cmp r0, #0x0 - beq _020E5678 - cmp r8, #0x6f - beq _020E568C -_020E5678: - add sp, sp, #0x10 - mov r0, r5 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E568C: - cmp r8, #0x69 - bgt _020E56B4 - bge _020E56E8 - cmp r8, #0x58 - bgt _020E56A8 - beq _020E5714 - b _020E571C -_020E56A8: - cmp r8, #0x64 - beq _020E56E8 - b _020E571C -_020E56B4: - cmp r8, #0x6f - bgt _020E56C8 - moveq r4, #0x8 - moveq r11, #0x0 - b _020E571C -_020E56C8: - cmp r8, #0x78 - bgt _020E571C - cmp r8, #0x75 - blt _020E571C - beq _020E5708 - cmp r8, #0x78 - beq _020E5714 - b _020E571C -_020E56E8: - cmp r10, #0x0 - mov r4, #0xa - bge _020E571C - mov r0, #0x1 - cmp r10, #0x80000000 - rsbne r10, r10, #0x0 - str r0, [sp, #0xc] - b _020E571C -_020E5708: - mov r4, #0xa - mov r11, #0x0 - b _020E571C -_020E5714: - mov r4, #0x10 - mov r11, #0x0 -_020E571C: - mov r0, r10 - mov r1, r4 - bl _u32_div_f - mov r9, r1 - mov r0, r10 - mov r1, r4 - bl _u32_div_f - cmp r9, #0xa - mov r10, r0 - addlt r9, r9, #0x30 - blt _020E5754 - cmp r8, #0x78 - addeq r9, r9, #0x57 - addne r9, r9, #0x37 -_020E5754: - cmp r10, #0x0 - strh r9, [r5, #-0x2]! - add r6, r6, #0x1 - bne _020E571C - cmp r4, #0x8 - bne _020E5788 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrneh r0, [r5, #0x0] - cmpne r0, #0x30 - movne r0, #0x30 - strneh r0, [r5, #-0x2]! - addne r6, r6, #0x1 -_020E5788: - ldrb r0, [sp, #0x40] - cmp r0, #0x2 - bne _020E57BC - ldr r0, [sp, #0xc] - ldr r7, [sp, #0x8] - cmp r0, #0x0 - cmpeq r11, #0x0 - subne r7, r7, #0x1 - cmp r4, #0x10 - bne _020E57BC - ldr r0, [sp, #0x4] - cmp r0, #0x0 - subne r7, r7, #0x2 -_020E57BC: - ldr r0, [sp, #0x0] - ldr r1, _020E5864 ; =0x000001FD - sub r0, r0, r5 - add r0, r0, r0, lsr #0x1f - add r0, r7, r0, asr #0x1 - cmp r0, r1 - addgt sp, sp, #0x10 - movgt r0, #0x0 - ldmgtia sp!, {r3-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - cmp r6, r7 - bge _020E5804 - mov r0, #0x30 -_020E57F4: - add r6, r6, #0x1 - cmp r6, r7 - strh r0, [r5, #-0x2]! - blt _020E57F4 -_020E5804: - cmp r4, #0x10 - bne _020E5820 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x30 - strneh r8, [r5, #-0x2] - strneh r0, [r5, #-0x4]! -_020E5820: - ldr r0, [sp, #0xc] - cmp r0, #0x0 - movne r0, #0x2d - strneh r0, [r5, #-0x2]! - bne _020E5850 - cmp r11, #0x1 - moveq r0, #0x2b - streqh r0, [r5, #-0x2]! - beq _020E5850 - cmp r11, #0x2 - moveq r0, #0x20 - streqh r0, [r5, #-0x2]! -_020E5850: - mov r0, r5 - add sp, sp, #0x10 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E5864: .word 0x000001FD - - arm_func_start longlong2str_wide -longlong2str_wide: ; 0x020E5868 - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x18 - mov r9, r1 - mov r1, #0x0 - mov r10, r0 - mov r6, r2 - mov r0, r1 - strh r0, [r6, #-0x2]! - ldr r0, [sp, #0x58] - cmp r9, #0x0 - str r0, [sp, #0x10] - ldrb r0, [sp, #0x4f] - cmpeq r10, #0x0 - str r2, [sp, #0x0] - str r0, [sp, #0x4] - ldr r0, [sp, #0x54] - str r1, [sp, #0x14] - str r0, [sp, #0x8] - ldrb r0, [sp, #0x4d] - mov r7, r1 - ldrh r8, [sp, #0x52] - str r0, [sp, #0xc] - ldreq r0, [sp, #0x10] - cmpeq r0, #0x0 - bne _020E58F8 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - beq _020E58E4 - cmp r8, #0x6f - beq _020E58F8 -_020E58E4: - add sp, sp, #0x18 - mov r0, r6 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E58F8: - cmp r8, #0x69 - bgt _020E5920 - bge _020E5950 - cmp r8, #0x58 - bgt _020E5914 - beq _020E59A4 - b _020E59B0 -_020E5914: - cmp r8, #0x64 - beq _020E5950 - b _020E59B0 -_020E5920: - cmp r8, #0x6f - bgt _020E5930 - beq _020E5984 - b _020E59B0 -_020E5930: - cmp r8, #0x78 - bgt _020E59B0 - cmp r8, #0x75 - blt _020E59B0 - beq _020E5994 - cmp r8, #0x78 - beq _020E59A4 - b _020E59B0 -_020E5950: - subs r0, r10, #0x0 - sbcs r0, r9, #0x0 - mov r11, #0xa - mov r5, #0x0 - bge _020E59B0 - cmp r9, #0x80000000 - cmpeq r10, r5 - beq _020E5978 - rsbs r10, r10, #0x0 - rsc r9, r9, #0x0 -_020E5978: - mov r0, #0x1 - str r0, [sp, #0x14] - b _020E59B0 -_020E5984: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0x8 - b _020E59B0 -_020E5994: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0xa - b _020E59B0 -_020E59A4: - mov r5, #0x0 - str r5, [sp, #0xc] - mov r11, #0x10 -_020E59B0: - mov r0, r10 - mov r1, r9 - mov r2, r11 - mov r3, r5 - bl _ull_mod - mov r4, r0 - mov r0, r10 - mov r1, r9 - mov r2, r11 - mov r3, r5 - bl _ll_udiv - mov r10, r0 - cmp r4, #0xa - mov r9, r1 - addlt r0, r4, #0x30 - blt _020E59FC - cmp r8, #0x78 - addeq r0, r4, #0x57 - addne r0, r4, #0x37 -_020E59FC: - strh r0, [r6, #-0x2]! - mov r0, #0x0 - cmp r9, r0 - cmpeq r10, r0 - add r7, r7, #0x1 - bne _020E59B0 - cmp r5, #0x0 - cmpeq r11, #0x8 - bne _020E5A3C - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrneh r0, [r6, #0x0] - cmpne r0, #0x30 - movne r0, #0x30 - strneh r0, [r6, #-0x2]! - addne r7, r7, #0x1 -_020E5A3C: - ldrb r0, [sp, #0x4c] - cmp r0, #0x2 - bne _020E5A8C - ldr r0, [sp, #0x8] - str r0, [sp, #0x10] - ldr r0, [sp, #0x14] - cmp r0, #0x0 - ldreq r0, [sp, #0xc] - cmpeq r0, #0x0 - ldrne r0, [sp, #0x10] - subne r0, r0, #0x1 - strne r0, [sp, #0x10] - cmp r5, #0x0 - cmpeq r11, #0x10 - bne _020E5A8C - ldr r0, [sp, #0x4] - cmp r0, #0x0 - ldrne r0, [sp, #0x10] - subne r0, r0, #0x2 - strne r0, [sp, #0x10] -_020E5A8C: - ldr r0, [sp, #0x0] - ldr r2, _020E5B48 ; =0x000001FD - sub r0, r0, r6 - add r1, r0, r0, lsr #0x1f - ldr r0, [sp, #0x10] - add r0, r0, r1, asr #0x1 - cmp r0, r2 - addgt sp, sp, #0x18 - movgt r0, #0x0 - ldmgtia sp!, {r3-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - ldr r0, [sp, #0x10] - cmp r7, r0 - bge _020E5AE0 - mov r1, #0x30 -_020E5ACC: - ldr r0, [sp, #0x10] - add r7, r7, #0x1 - cmp r7, r0 - strh r1, [r6, #-0x2]! - blt _020E5ACC -_020E5AE0: - cmp r5, #0x0 - cmpeq r11, #0x10 - bne _020E5B00 - ldr r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x30 - strneh r8, [r6, #-0x2] - strneh r0, [r6, #-0x4]! -_020E5B00: - ldr r0, [sp, #0x14] - cmp r0, #0x0 - movne r0, #0x2d - strneh r0, [r6, #-0x2]! - bne _020E5B34 - ldr r0, [sp, #0xc] - cmp r0, #0x1 - moveq r0, #0x2b - streqh r0, [r6, #-0x2]! - beq _020E5B34 - cmp r0, #0x2 - moveq r0, #0x20 - streqh r0, [r6, #-0x2]! -_020E5B34: - mov r0, r6 - add sp, sp, #0x18 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E5B48: .word 0x000001FD - - arm_func_start double2hex_wide -double2hex_wide: ; 0x020E5B4C - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r10,lr} - sub sp, sp, #0x44 - ldr r7, [sp, #0x80] - ldr r0, _020E5EB8 ; =0x000001FD - mov r8, r2 - cmp r7, r0 - ldrh r6, [sp, #0x7a] - ldrb r5, [sp, #0x77] - ldrb r4, [sp, #0x75] - ldr r1, [sp, #0x68] - ldr r2, [sp, #0x6c] - addgt sp, sp, #0x44 - movgt r0, #0x0 - ldmgtia sp!, {r3-r10,lr} - addgt sp, sp, #0x10 - bxgt lr - mov r10, #0x0 - mov r9, #0x20 - add r0, sp, #0x8 - add r3, sp, #0xc - strb r10, [sp, #0x8] - strh r9, [sp, #0xa] - bl __num2dec_internal2 - ldr r0, [sp, #0x68] - ldr r1, [sp, #0x6c] - bl fabs - mov r2, r0 - mov r0, r10 - mov r3, r1 - mov r1, r0 - bl _deq - bne _020E5BF4 - sub r4, r8, #0xc - ldr r1, _020E5EBC ; =0x02106DE4 - mov r0, r4 - bl wcscpy - add sp, sp, #0x44 - mov r0, r4 - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E5BF4: - ldrb r0, [sp, #0x11] - cmp r0, #0x49 - bne _020E5C74 - ldrsb r0, [sp, #0xc] - cmp r0, #0x0 - beq _020E5C38 - cmp r6, #0x41 - sub r4, r8, #0xa - bne _020E5C28 - ldr r1, _020E5EC0 ; =0x02106DF0 - mov r0, r4 - bl wcscpy - b _020E5C60 -_020E5C28: - ldr r1, _020E5EC4 ; =0x02106DFC - mov r0, r4 - bl wcscpy - b _020E5C60 -_020E5C38: - cmp r6, #0x41 - sub r4, r8, #0x8 - bne _020E5C54 - ldr r1, _020E5EC8 ; =0x02106E08 - mov r0, r4 - bl wcscpy - b _020E5C60 -_020E5C54: - ldr r1, _020E5ECC ; =0x02106E10 - mov r0, r4 - bl wcscpy -_020E5C60: - add sp, sp, #0x44 - mov r0, r4 - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E5C74: - cmp r0, #0x4e - bne _020E5CF0 - ldrsb r0, [sp, #0xc] - cmp r0, #0x0 - beq _020E5CB4 - cmp r6, #0x41 - sub r4, r8, #0xa - bne _020E5CA4 - ldr r1, _020E5ED0 ; =0x02106E18 - mov r0, r4 - bl wcscpy - b _020E5CDC -_020E5CA4: - ldr r1, _020E5ED4 ; =0x02106E24 - mov r0, r4 - bl wcscpy - b _020E5CDC -_020E5CB4: - cmp r6, #0x41 - sub r4, r8, #0x8 - bne _020E5CD0 - ldr r1, _020E5ED8 ; =0x02106E30 - mov r0, r4 - bl wcscpy - b _020E5CDC -_020E5CD0: - ldr r1, _020E5EDC ; =0x02106E38 - mov r0, r4 - bl wcscpy -_020E5CDC: - add sp, sp, #0x44 - mov r0, r4 - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr -_020E5CF0: - mov r3, r10 - mov r1, #0x1 - mov r0, #0x64 - add r9, sp, #0x68 - strb r1, [sp, #0x34] - strb r1, [sp, #0x35] - strb r3, [sp, #0x36] - strb r3, [sp, #0x37] - strb r3, [sp, #0x38] - str r3, [sp, #0x3c] - str r1, [sp, #0x40] - strh r0, [sp, #0x3a] -_020E5D20: - rsb r1, r3, #0x7 - ldrsb r2, [r9, r3] - ldrsb r0, [r9, r1] - strb r0, [r9, r3] - add r3, r3, #0x1 - strb r2, [r9, r1] - cmp r3, #0x4 - blt _020E5D20 - ldrb r0, [sp, #0x69] - ldrb r1, [sp, #0x68] - ldr sb, _020E5EE0 ; =0x000007FF - mov r0, r0, lsl #0x11 - orr r1, r0, r1, lsl #0x19 - add r0, sp, #0x34 - and lr, r9, r1, lsr #0x15 - sub r12, sp, #0x8 - ldmia r0, {r0-r3} - stmia r12, {r0-r3} - rsb r0, r9, #0x400 - mov r1, r8 - add r0, lr, r0 - ldmia r12, {r2-r3} - bl long2str_wide - cmp r6, #0x61 - moveq r1, #0x70 - movne r1, #0x50 - strh r1, [r0, #-0x2]! - mov r1, r7, lsl #0x2 - mov lr, r7 - cmp r7, #0x1 - add r8, r1, #0xb - add r12, sp, #0x68 - blt _020E5E30 - mov r9, #0x30 -_020E5DA8: - cmp r8, #0x40 - bge _020E5E18 - ldrb r1, [r12, r8, asr #0x3] - and r2, r8, #0x7 - rsb r3, r2, #0x7 - mov r2, r1, asr r3 - sub r10, r8, #0x4 - bic r1, r8, #0x7 - bic r10, r10, #0x7 - cmp r1, r10 - add r10, r12, r8, asr #0x3 - and r1, r2, #0xff - beq _020E5DEC - ldrb r2, [r10, #-0x1] - mov r2, r2, lsl #0x8 - orr r1, r1, r2, asr r3 - and r1, r1, #0xff -_020E5DEC: - and r1, r1, #0xf - cmp r1, #0xa - addcc r1, r1, #0x30 - andcc r1, r1, #0xff - blo _020E5E1C - cmp r6, #0x61 - addeq r1, r1, #0x57 - andeq r1, r1, #0xff - addne r1, r1, #0x37 - andne r1, r1, #0xff - b _020E5E1C -_020E5E18: - mov r1, r9 -_020E5E1C: - sub lr, lr, #0x1 - cmp lr, #0x1 - strh r1, [r0, #-0x2]! - sub r8, r8, #0x4 - bge _020E5DA8 -_020E5E30: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r1, #0x2e - strneh r1, [r0, #-0x2]! - mov r1, #0x31 - strh r1, [r0, #-0x2] - cmp r6, #0x61 - moveq r1, #0x78 - movne r1, #0x58 - strh r1, [r0, #-0x4]! - mov r1, #0x30 - strh r1, [r0, #-0x2]! - ldrsb r1, [sp, #0xc] - cmp r1, #0x0 - movne r1, #0x2d - strneh r1, [r0, #-0x2]! - addne sp, sp, #0x44 - ldmneia sp!, {r3-r10,lr} - addne sp, sp, #0x10 - bxne lr - cmp r4, #0x1 - moveq r1, #0x2b - streqh r1, [r0, #-0x2]! - addeq sp, sp, #0x44 - ldmeqia sp!, {r3-r10,lr} - addeq sp, sp, #0x10 - bxeq lr - cmp r4, #0x2 - moveq r1, #0x20 - streqh r1, [r0, #-0x2]! - add sp, sp, #0x44 - ldmia sp!, {r3-r10,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E5EB8: .word 0x000001FD -_020E5EBC: .word 0x02106DE4 -_020E5EC0: .word 0x02106DF0 -_020E5EC4: .word 0x02106DFC -_020E5EC8: .word 0x02106E08 -_020E5ECC: .word 0x02106E10 -_020E5ED0: .word 0x02106E18 -_020E5ED4: .word 0x02106E24 -_020E5ED8: .word 0x02106E30 -_020E5EDC: .word 0x02106E38 -_020E5EE0: .word 0x000007FF - - arm_func_start round_decimal_wide -round_decimal_wide: ; 0x020E5EE4 - stmdb sp!, {r4,lr} - cmp r1, #0x0 - bge _020E5F0C -_020E5EF0: - mov r1, #0x0 - strh r1, [r0, #0x2] - mov r1, #0x1 - strb r1, [r0, #0x4] - mov r1, #0x30 - strb r1, [r0, #0x5] - ldmia sp!, {r4,pc} -_020E5F0C: - ldrb lr, [r0, #0x4] - cmp r1, lr - ldmgeia sp!, {r4,pc} -_020E5F18: ; 0x020E5F18 - add r12, r0, #0x5 - add r2, r12, r1 - add r2, r2, #0x1 - ldrsb r3, [r2, #-0x1]! - sub r3, r3, #0x30 - mov r3, r3, lsl #0x18 - mov r3, r3, asr #0x18 - cmp r3, #0x5 - bne _020E5F6C - add r12, r12, lr -_020E5F40: - sub r12, r12, #0x1 - cmp r12, r2 - bls _020E5F58 - ldrsb r3, [r12, #0x0] - cmp r3, #0x30 - beq _020E5F40 -_020E5F58: - cmp r12, r2 - ldreqsb r3, [r2, #-0x1] - andeq r4, r3, #0x1 - movne r4, #0x1 - b _020E5F74 -_020E5F6C: - movgt r4, #0x1 - movle r4, #0x0 -_020E5F74: - cmp r1, #0x0 - beq _020E5FD0 - mov r12, #0x0 - mov lr, #0x1 -_020E5F84: - ldrsb r3, [r2, #-0x1]! - sub r3, r3, #0x30 - add r3, r3, r4 - mov r3, r3, lsl #0x18 - mov r3, r3, asr #0x18 - cmp r3, #0x9 - movgt r4, lr - movle r4, r12 - cmp r4, #0x0 - bne _020E5FB4 - cmp r3, #0x0 - bne _020E5FBC -_020E5FB4: - sub r1, r1, #0x1 - b _020E5FC8 -_020E5FBC: - add r3, r3, #0x30 - strb r3, [r2, #0x0] - b _020E5FD0 -_020E5FC8: - cmp r1, #0x0 - bne _020E5F84 -_020E5FD0: - cmp r4, #0x0 - beq _020E5FF8 - ldrsh r3, [r0, #0x2] - mov r2, #0x1 - mov r1, #0x31 - add r3, r3, #0x1 - strh r3, [r0, #0x2] - strb r2, [r0, #0x4] - strb r1, [r0, #0x5] - ldmia sp!, {r4,pc} -_020E5FF8: - cmp r1, #0x0 - beq _020E5EF0 - strb r1, [r0, #0x4] - ldmia sp!, {r4,pc} - - arm_func_start float2str_wide -float2str_wide: ; 0x020E6008 - stmdb sp!, {r0-r3} - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x22c - mov r10, r0 - add r0, sp, #0x250 - ldr r7, [sp, #0x268] - ldr r3, _020E6628 ; =0x000001FD - ldrh r6, [r0, #0x12] - cmp r7, r3 - ldrb r5, [sp, #0x25f] - ldrb r4, [sp, #0x25d] - mov r8, r1 - mov r9, r2 - addgt sp, sp, #0x22c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - mov r12, #0x0 - mov r11, #0x20 - add r0, sp, #0x0 - add r3, sp, #0x4 - mov r1, r10 - mov r2, r8 - strb r12, [sp, #0x0] - strh r11, [sp, #0x2] - bl __num2dec_internal2 - ldrb r0, [sp, #0x8] - add r1, sp, #0x9 - add r0, r1, r0 - b _020E609C -_020E6084: - ldrb r2, [sp, #0x8] - ldrsh r1, [sp, #0x6] - sub r2, r2, #0x1 - add r1, r1, #0x1 - strb r2, [sp, #0x8] - strh r1, [sp, #0x6] -_020E609C: - ldrb r1, [sp, #0x8] - cmp r1, #0x1 - bls _020E60B4 - ldrsb r1, [r0, #-0x1]! - cmp r1, #0x30 - beq _020E6084 -_020E60B4: - ldrb r0, [sp, #0x9] - cmp r0, #0x30 - beq _020E60D4 - cmp r0, #0x49 - beq _020E60E0 - cmp r0, #0x4e - beq _020E6198 - b _020E6244 -_020E60D4: - mov r0, #0x0 - strh r0, [sp, #0x6] - b _020E6244 -_020E60E0: - mov r2, #0x0 - mov r0, r10 - mov r1, r8 - mov r3, r2 - bl _dls - bhs _020E6140 - cmp r6, #0x80 - sub r4, r9, #0xa - movcs r0, #0x0 - bhs _020E6118 - ldr r0, _020E662C ; =0x02104544 - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x200 -_020E6118: - cmp r0, #0x0 - beq _020E6130 - ldr r1, _020E6630 ; =0x02106DF0 - mov r0, r4 - bl wcscpy - b _020E6184 -_020E6130: - ldr r1, _020E6634 ; =0x02106DFC - mov r0, r4 - bl wcscpy - b _020E6184 -_020E6140: - cmp r6, #0x80 - sub r4, r9, #0x8 - movcs r0, #0x0 - bhs _020E6160 - ldr r0, _020E662C ; =0x02104544 - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x200 -_020E6160: - cmp r0, #0x0 - beq _020E6178 - ldr r1, _020E6638 ; =0x02106E08 - mov r0, r4 - bl wcscpy - b _020E6184 -_020E6178: - ldr r1, _020E663C ; =0x02106E10 - mov r0, r4 - bl wcscpy -_020E6184: - add sp, sp, #0x22c - mov r0, r4 - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E6198: - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - beq _020E61EC - cmp r6, #0x80 - sub r4, r9, #0xa - movcs r0, #0x0 - bhs _020E61C4 - ldr r0, _020E662C ; =0x02104544 - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x200 -_020E61C4: - cmp r0, #0x0 - beq _020E61DC - ldr r1, _020E6640 ; =0x02106E18 - mov r0, r4 - bl wcscpy - b _020E6230 -_020E61DC: - ldr r1, _020E6644 ; =0x02106E24 - mov r0, r4 - bl wcscpy - b _020E6230 -_020E61EC: - cmp r6, #0x80 - sub r4, r9, #0x8 - movcs r0, #0x0 - bhs _020E620C - ldr r0, _020E662C ; =0x02104544 - mov r1, r6, lsl #0x1 - ldrh r0, [r0, r1] - and r0, r0, #0x200 -_020E620C: - cmp r0, #0x0 - beq _020E6224 - ldr r1, _020E6648 ; =0x02106E30 - mov r0, r4 - bl wcscpy - b _020E6230 -_020E6224: - ldr r1, _020E664C ; =0x02106E38 - mov r0, r4 - bl wcscpy -_020E6230: - add sp, sp, #0x22c - mov r0, r4 - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr -_020E6244: - ldrb r1, [sp, #0x8] - ldrsh r2, [sp, #0x6] - add r0, sp, #0x200 - sub r1, r1, #0x1 - add r0, r0, #0x2a - add r1, r2, r1 - sub r8, r0, #0x1 - strh r1, [sp, #0x6] - mov r0, #0x0 - strb r0, [r8, #0x0] - cmp r6, #0x65 - bgt _020E62A0 - bge _020E632C - cmp r6, #0x47 - bgt _020E65EC - cmp r6, #0x45 - blt _020E65EC - beq _020E632C - cmp r6, #0x46 - beq _020E6478 - cmp r6, #0x47 - beq _020E62B8 - b _020E65EC -_020E62A0: - cmp r6, #0x66 - bgt _020E62B0 - beq _020E6478 - b _020E65EC -_020E62B0: - cmp r6, #0x67 - bne _020E65EC -_020E62B8: - ldrb r0, [sp, #0x8] - cmp r0, r7 - ble _020E62D0 - add r0, sp, #0x4 - mov r1, r7 - bl round_decimal_wide -_020E62D0: - ldrsh r2, [sp, #0x6] - mvn r0, #0x3 - cmp r2, r0 - blt _020E62E8 - cmp r2, r7 - blt _020E6308 -_020E62E8: - cmp r5, #0x0 - ldreqb r0, [sp, #0x8] - subne r7, r7, #0x1 - subeq r7, r0, #0x1 - cmp r6, #0x67 - moveq r6, #0x65 - movne r6, #0x45 - b _020E632C -_020E6308: - cmp r5, #0x0 - addne r0, r2, #0x1 - subne r7, r7, r0 - bne _020E6478 - ldrb r1, [sp, #0x8] - add r0, r2, #0x1 - subs r7, r1, r0 - movmi r7, #0x0 - b _020E6478 -_020E632C: - ldrb r0, [sp, #0x8] - add r1, r7, #0x1 - cmp r0, r1 - ble _020E6344 - add r0, sp, #0x4 - bl round_decimal_wide -_020E6344: - ldrsh lr, [sp, #0x6] - mov r11, #0x2b - mov r10, #0x0 - cmp lr, #0x0 - rsblt lr, lr, #0x0 - movlt r11, #0x2d - ldr r3, _020E6650 ; =0x66666667 - mov r0, #0xa - b _020E6398 -_020E6368: - mov r1, lr, lsr #0x1f - smull r2, r12, r3, lr - add r12, r1, r12, asr #0x2 - smull r1, r2, r0, r12 - sub r12, lr, r1 - add r1, r12, #0x30 - strb r1, [r8, #-0x1]! - mov r2, lr - smull r1, lr, r3, r2 - mov r1, r2, lsr #0x1f - add lr, r1, lr, asr #0x2 - add r10, r10, #0x1 -_020E6398: - cmp lr, #0x0 - bne _020E6368 - cmp r10, #0x2 - blt _020E6368 - add r0, sp, #0x2a - strb r11, [r8, #-0x1] - strb r6, [r8, #-0x2]! - sub r1, r0, r8 - ldr r0, _020E6628 ; =0x000001FD - add r1, r1, r7 - cmp r1, r0 - addgt sp, sp, #0x22c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - ldrb r1, [sp, #0x8] - add r0, r7, #0x1 - cmp r1, r0 - bge _020E6408 - add r0, r7, #0x2 - sub r0, r0, r1 - subs r1, r0, #0x1 - beq _020E6408 - mov r0, #0x30 -_020E63FC: - strb r0, [r8, #-0x1]! - subs r1, r1, #0x1 - bne _020E63FC -_020E6408: - ldrb r1, [sp, #0x8] - add r0, sp, #0x9 - add r2, r0, r1 - subs r1, r1, #0x1 - beq _020E642C -_020E641C: - ldrsb r0, [r2, #-0x1]! - subs r1, r1, #0x1 - strb r0, [r8, #-0x1]! - bne _020E641C -_020E642C: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r0, #0x2e - strneb r0, [r8, #-0x1]! - ldrb r0, [sp, #0x9] - strb r0, [r8, #-0x1]! - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r8, #-0x1]! - bne _020E65EC - cmp r4, #0x1 - moveq r0, #0x2b - streqb r0, [r8, #-0x1]! - beq _020E65EC - cmp r4, #0x2 - moveq r0, #0x20 - streqb r0, [r8, #-0x1]! - b _020E65EC -_020E6478: - ldrsh r3, [sp, #0x6] - ldrb r2, [sp, #0x8] - sub r0, r2, r3 - subs r1, r0, #0x1 - movmi r1, #0x0 - cmp r1, r7 - ble _020E64B8 - sub r1, r1, r7 - add r0, sp, #0x4 - sub r1, r2, r1 - bl round_decimal_wide - ldrsh r3, [sp, #0x6] - ldrb r2, [sp, #0x8] - sub r0, r2, r3 - subs r1, r0, #0x1 - movmi r1, #0x0 -_020E64B8: - adds r0, r3, #0x1 - movmi r0, #0x0 - ldr r3, _020E6628 ; =0x000001FD - add r6, r0, r1 - cmp r6, r3 - addgt sp, sp, #0x22c - movgt r0, #0x0 - ldmgtia sp!, {r4-r11,lr} - addgt sp, sp, #0x10 - bxgt lr - add r3, sp, #0x9 - sub r6, r7, r1 - cmp r6, #0x0 - add r2, r3, r2 - mov r10, #0x0 - ble _020E650C - mov r3, #0x30 -_020E64FC: - add r10, r10, #0x1 - cmp r10, r6 - strb r3, [r8, #-0x1]! - blt _020E64FC -_020E650C: - mov r6, #0x0 - b _020E6520 -_020E6514: - ldrsb r3, [r2, #-0x1]! - add r6, r6, #0x1 - strb r3, [r8, #-0x1]! -_020E6520: - cmp r6, r1 - ldrltb r3, [sp, #0x8] - cmplt r6, r3 - blt _020E6514 - cmp r6, r1 - bge _020E654C - mov r3, #0x30 -_020E653C: - add r6, r6, #0x1 - cmp r6, r1 - strb r3, [r8, #-0x1]! - blt _020E653C -_020E654C: - cmp r7, #0x0 - cmpeq r5, #0x0 - movne r1, #0x2e - strneb r1, [r8, #-0x1]! - cmp r0, #0x0 - beq _020E65B4 - ldrb r1, [sp, #0x8] - mov r5, #0x0 - sub r1, r0, r1 - cmp r1, #0x0 - ble _020E6594 - mov r3, #0x30 -_020E657C: - strb r3, [r8, #-0x1]! - ldrb r1, [sp, #0x8] - add r5, r5, #0x1 - sub r1, r0, r1 - cmp r5, r1 - blt _020E657C -_020E6594: - cmp r5, r0 - bge _020E65BC -_020E659C: - ldrsb r1, [r2, #-0x1]! - add r5, r5, #0x1 - cmp r5, r0 - strb r1, [r8, #-0x1]! - blt _020E659C - b _020E65BC -_020E65B4: - mov r0, #0x30 - strb r0, [r8, #-0x1]! -_020E65BC: - ldrsb r0, [sp, #0x4] - cmp r0, #0x0 - movne r0, #0x2d - strneb r0, [r8, #-0x1]! - bne _020E65EC - cmp r4, #0x1 - moveq r0, #0x2b - streqb r0, [r8, #-0x1]! - beq _020E65EC - cmp r4, #0x2 - moveq r0, #0x20 - streqb r0, [r8, #-0x1]! -_020E65EC: - mov r0, r8 - bl strlen - sub r1, r9, r0, lsl #0x1 - mov r0, r8 - sub r4, r1, #0x2 - bl strlen - mov r2, r0 - mov r0, r4 - mov r1, r8 - bl mbstowcs - mov r0, r4 - add sp, sp, #0x22c - ldmia sp!, {r4-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E6628: .word 0x000001FD -_020E662C: .word 0x02104544 -_020E6630: .word 0x02106DF0 -_020E6634: .word 0x02106DFC -_020E6638: .word 0x02106E08 -_020E663C: .word 0x02106E10 -_020E6640: .word 0x02106E18 -_020E6644: .word 0x02106E24 -_020E6648: .word 0x02106E30 -_020E664C: .word 0x02106E38 -_020E6650: .word 0x66666667 - - arm_func_start __wpformatter -__wpformatter: - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x430 - mov r3, #0x20 - mov r11, r2 - strh r3, [sp, #0x1c] - ldrh r2, [r11, #0x0] - mov r9, r0 - mov r8, r1 - cmp r2, #0x0 - mov r4, #0x0 - beq _020E6F24 -_020E6684: - mov r0, r11 - mov r1, #0x25 - bl wcschr - str r0, [sp, #0xc] - cmp r0, #0x0 - bne _020E66D8 - mov r0, r11 - bl wcslen - movs r2, r0 - add r4, r4, r2 - beq _020E6F24 - mov r0, r8 - mov r1, r11 - blx r9 - cmp r0, #0x0 - bne _020E6F24 - add sp, sp, #0x430 - mvn r0, #0x0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E66D8: - sub r0, r0, r11 - add r0, r0, r0, lsr #0x1f - movs r2, r0, asr #0x1 - add r4, r4, r2 - beq _020E6710 - mov r0, r8 - mov r1, r11 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E6710: - add r1, sp, #0x400 - ldr r0, [sp, #0xc] - add r1, r1, #0x64 - add r2, sp, #0x20 - bl parse_format_wprintf - ldrh r1, [sp, #0x26] - mov r11, r0 - cmp r1, #0x61 - bgt _020E6780 - bge _020E6AEC - cmp r1, #0x47 - bgt _020E6774 - subs r0, r1, #0x41 - addpl pc, pc, r0, lsl #0x2 - b _020E6768 -_020E674C: ; 0x020E674C - b _020E6AEC -_020E6750: ; 0x020E6750 - b _020E6D90 -_020E6754: ; 0x020E6754 - b _020E6D90 -_020E6758: ; 0x020E6758 - b _020E6D90 -_020E675C: ; 0x020E675C - b _020E6A7C -_020E6760: ; 0x020E6760 - b _020E6A7C -_020E6764: ; 0x020E6764 - b _020E6A7C -_020E6768: - cmp r1, #0x25 - beq _020E6D7C - b _020E6D90 -_020E6774: - cmp r1, #0x58 - beq _020E6940 - b _020E6D90 -_020E6780: - cmp r1, #0x75 - bgt _020E67E8 - subs r0, r1, #0x64 - addpl pc, pc, r0, lsl #0x2 - b _020E67DC -_020E6794: ; 0x020E6794 - b _020E6804 -_020E6798: ; 0x020E6798 - b _020E6A7C -_020E679C: ; 0x020E679C - b _020E6A7C -_020E67A0: ; 0x020E67A0 - b _020E6A7C -_020E67A4: ; 0x020E67A4 - b _020E6D90 -_020E67A8: ; 0x020E67A8 - b _020E6804 -_020E67AC: ; 0x020E67AC - b _020E6D90 -_020E67B0: ; 0x020E67B0 - b _020E6D90 -_020E67B4: ; 0x020E67B4 - b _020E6D90 -_020E67B8: ; 0x020E67B8 - b _020E6D90 -_020E67BC: ; 0x020E67BC - b _020E6C98 -_020E67C0: ; 0x020E67C0 - b _020E6940 -_020E67C4: ; 0x020E67C4 - b _020E6D90 -_020E67C8: ; 0x020E67C8 - b _020E6D90 -_020E67CC: ; 0x020E67CC - b _020E6D90 -_020E67D0: ; 0x020E67D0 - b _020E6B5C -_020E67D4: ; 0x020E67D4 - b _020E6D90 -_020E67D8: ; 0x020E67D8 - b _020E6940 -_020E67DC: - cmp r1, #0x63 - beq _020E6D24 - b _020E6D90 -_020E67E8: - cmp r1, #0x78 - bgt _020E67F8 - beq _020E6940 - b _020E6D90 -_020E67F8: - ldr r0, _020E6F38 ; =0x0000FFFF - cmp r1, r0 - b _020E6D90 -_020E6804: - ldrb r0, [sp, #0x24] - cmp r0, #0x3 - bne _020E6824 - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E68BC -_020E6824: - cmp r0, #0x4 - bne _020E684C - ldr r1, [sp, #0x464] - add r2, r1, #0x8 - str r2, [sp, #0x464] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E68BC -_020E684C: - cmp r0, #0x6 - bne _020E6874 - ldr r1, [sp, #0x464] - add r2, r1, #0x8 - str r2, [sp, #0x464] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E68BC -_020E6874: - cmp r0, #0x7 - bne _020E6890 - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E68BC -_020E6890: - cmp r0, #0x8 - bne _020E68AC - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E68BC -_020E68AC: - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] -_020E68BC: - cmp r0, #0x2 - moveq r1, r10, lsl #0x10 - moveq r10, r1, asr #0x10 - cmp r0, #0x4 - cmpne r0, #0x6 - add r0, sp, #0x20 - bne _020E6904 - sub r5, sp, #0x4 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - ldr r3, [r5, #0x0] - ldr r0, [sp, #0x10] - ldr r1, [sp, #0x14] - add r2, sp, #0x430 - bl longlong2str_wide - movs r6, r0 - beq _020E6D90 - b _020E6928 -_020E6904: - sub r5, sp, #0x8 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - add r1, sp, #0x430 - mov r0, r10 - ldmia r5, {r2-r3} - bl long2str_wide - movs r6, r0 - beq _020E6D90 -_020E6928: - add r0, sp, #0x400 - add r0, r0, #0x2e - sub r0, r0, r6 - add r0, r0, r0, lsr #0x1f - mov r7, r0, asr #0x1 - b _020E6DDC -_020E6940: - ldrb r0, [sp, #0x24] - cmp r0, #0x3 - bne _020E6960 - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E69F8 -_020E6960: - cmp r0, #0x4 - bne _020E6988 - ldr r1, [sp, #0x464] - add r2, r1, #0x8 - str r2, [sp, #0x464] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E69F8 -_020E6988: - cmp r0, #0x6 - bne _020E69B0 - ldr r1, [sp, #0x464] - add r2, r1, #0x8 - str r2, [sp, #0x464] - ldr r1, [r2, #-0x8] - str r1, [sp, #0x10] - ldr r1, [r2, #-0x4] - str r1, [sp, #0x14] - b _020E69F8 -_020E69B0: - cmp r0, #0x7 - bne _020E69CC - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E69F8 -_020E69CC: - cmp r0, #0x8 - bne _020E69E8 - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] - b _020E69F8 -_020E69E8: - ldr r1, [sp, #0x464] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r10, [r1, #-0x4] -_020E69F8: - cmp r0, #0x2 - moveq r1, r10, lsl #0x10 - moveq r10, r1, lsr #0x10 - cmp r0, #0x4 - cmpne r0, #0x6 - add r0, sp, #0x20 - bne _020E6A40 - sub r5, sp, #0x4 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - ldr r3, [r5, #0x0] - ldr r0, [sp, #0x10] - ldr r1, [sp, #0x14] - add r2, sp, #0x430 - bl longlong2str_wide - movs r6, r0 - beq _020E6D90 - b _020E6A64 -_020E6A40: - sub r5, sp, #0x8 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - add r1, sp, #0x430 - mov r0, r10 - ldmia r5, {r2-r3} - bl long2str_wide - movs r6, r0 - beq _020E6D90 -_020E6A64: - add r0, sp, #0x400 - add r0, r0, #0x2e - sub r0, r0, r6 - add r0, r0, r0, lsr #0x1f - mov r7, r0, asr #0x1 - b _020E6DDC -_020E6A7C: - ldrb r0, [sp, #0x24] - cmp r0, #0x9 - ldrne r0, [sp, #0x464] - addne r0, r0, #0x8 - strne r0, [sp, #0x464] - bne _020E6AA0 - ldr r0, [sp, #0x464] - add r0, r0, #0x8 - str r0, [sp, #0x464] -_020E6AA0: - ldr r7, [r0, #-0x8] - ldr r6, [r0, #-0x4] - add r0, sp, #0x20 - sub r5, sp, #0x4 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - ldr r3, [r5, #0x0] - mov r0, r7 - mov r1, r6 - add r2, sp, #0x430 - bl float2str_wide - movs r6, r0 - beq _020E6D90 - add r0, sp, #0x400 - add r0, r0, #0x2e - sub r0, r0, r6 - add r0, r0, r0, lsr #0x1f - mov r7, r0, asr #0x1 - b _020E6DDC -_020E6AEC: - ldrb r0, [sp, #0x24] - cmp r0, #0x9 - ldrne r0, [sp, #0x464] - addne r0, r0, #0x8 - strne r0, [sp, #0x464] - bne _020E6B10 - ldr r0, [sp, #0x464] - add r0, r0, #0x8 - str r0, [sp, #0x464] -_020E6B10: - ldr r7, [r0, #-0x8] - ldr r6, [r0, #-0x4] - add r0, sp, #0x20 - sub r5, sp, #0x4 - ldmia r0, {r0-r3} - stmia r5, {r0-r3} - ldr r3, [r5, #0x0] - mov r0, r7 - mov r1, r6 - add r2, sp, #0x430 - bl double2hex_wide - movs r6, r0 - beq _020E6D90 - add r0, sp, #0x400 - add r0, r0, #0x2e - sub r0, r0, r6 - add r0, r0, r0, lsr #0x1f - mov r7, r0, asr #0x1 - b _020E6DDC -_020E6B5C: - ldrb r0, [sp, #0x24] - cmp r0, #0x5 - bne _020E6BF8 - ldr r0, [sp, #0x464] - add r0, r0, #0x4 - str r0, [sp, #0x464] - ldr r6, [r0, #-0x4] - ldrb r0, [sp, #0x23] - cmp r6, #0x0 - ldreq r6, _020E6F3C ; =0x02106E40 - cmp r0, #0x0 - beq _020E6BB0 - ldrh r1, [r6], #0x2 - ldrb r0, [sp, #0x22] - and r7, r1, #0xff - cmp r0, #0x0 - beq _020E6DDC - ldr r0, [sp, #0x2c] - cmp r7, r0 - movgt r7, r0 - b _020E6DDC -_020E6BB0: - ldrb r0, [sp, #0x22] - cmp r0, #0x0 - beq _020E6BE8 - ldr r7, [sp, #0x2c] - mov r0, r6 - mov r2, r7 - mov r1, #0x0 - bl wmemchr -_020E6BD0: ; 0x020E6BD0 - cmp r0, #0x0 - beq _020E6DDC - sub r0, r0, r6 - add r0, r0, r0, lsr #0x1f - mov r7, r0, asr #0x1 - b _020E6DDC -_020E6BE8: - mov r0, r6 - bl wcslen - mov r7, r0 - b _020E6DDC -_020E6BF8: - ldr r0, [sp, #0x464] - add r0, r0, #0x4 - str r0, [sp, #0x464] - ldr r5, [r0, #-0x4] - ldrb r0, [sp, #0x23] - cmp r5, #0x0 - ldreq r5, _020E6F40 ; =0x02106E44 - cmp r0, #0x0 - beq _020E6C40 - ldrh r1, [r6, #0x0] - ldrb r0, [sp, #0x22] - and r6, r1, #0xff - cmp r0, #0x0 - beq _020E6C78 - ldr r0, [sp, #0x2c] - cmp r6, r0 - movgt r6, r0 - b _020E6C78 -_020E6C40: - ldrb r0, [sp, #0x22] - cmp r0, #0x0 - beq _020E6C6C - ldr r6, [sp, #0x2c] - mov r0, r5 - mov r2, r6 - mov r1, #0x0 - bl memchr -_020E6C60: ; 0x020E6C60 - cmp r0, #0x0 - subne r6, r0, r5 - b _020E6C78 -_020E6C6C: - mov r0, r5 - bl strlen - mov r6, r0 -_020E6C78: - add r0, sp, #0x30 - mov r1, r5 - mov r2, r6 - bl mbstowcs - movs r7, r0 - bmi _020E6D90 - add r6, sp, #0x30 - b _020E6DDC -_020E6C98: - ldr r1, [sp, #0x464] - ldrb r0, [sp, #0x24] - add r1, r1, #0x4 - str r1, [sp, #0x464] - ldr r6, [r1, #-0x4] - cmp r0, #0x8 - addls pc, pc, r0, lsl #0x2 - b _020E6F18 -_020E6CB8: - b _020E6CDC -_020E6CBC: - b _020E6F18 -_020E6CC0: - b _020E6CE4 -_020E6CC4: - b _020E6CEC -_020E6CC8: - b _020E6D14 -_020E6CCC: - b _020E6F18 -_020E6CD0: - b _020E6CF4 -_020E6CD4: - b _020E6D04 -_020E6CD8: - b _020E6D0C -_020E6CDC: - str r4, [r6, #0x0] - b _020E6F18 -_020E6CE4: - strh r4, [r6, #0x0] - b _020E6F18 -_020E6CEC: - str r4, [r6, #0x0] - b _020E6F18 -_020E6CF4: - str r4, [r6, #0x0] - mov r0, r4, asr #0x1f - str r0, [r6, #0x4] - b _020E6F18 -_020E6D04: - str r4, [r6, #0x0] - b _020E6F18 -_020E6D0C: - str r4, [r6, #0x0] - b _020E6F18 -_020E6D14: - str r4, [r6, #0x0] - mov r0, r4, asr #0x1f - str r0, [r6, #0x4] - b _020E6F18 -_020E6D24: - ldrb r0, [sp, #0x24] - add r6, sp, #0x30 - cmp r0, #0x5 - bne _020E6D50 - ldr r0, [sp, #0x464] - mov r7, #0x1 - add r0, r0, #0x4 - str r0, [sp, #0x464] - ldr r0, [r0, #-0x4] - strh r0, [r6, #0x0] - b _020E6DDC -_020E6D50: - ldr r0, [sp, #0x464] - add r1, sp, #0x18 - add r0, r0, #0x4 - str r0, [sp, #0x464] - ldr r3, [r0, #-0x4] - mov r0, r6 - mov r2, #0x1 - strb r3, [sp, #0x18] - bl mbtowc - mov r7, r0 - b _020E6DDC -_020E6D7C: - mov r0, #0x25 - strh r0, [sp, #0x30] - add r6, sp, #0x30 - mov r7, #0x1 - b _020E6DDC -_020E6D90: - ldr r0, [sp, #0xc] - bl wcslen - movs r5, r0 - beq _020E6DC8 - ldr r1, [sp, #0xc] - mov r0, r8 - mov r2, r5 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E6DC8: - add sp, sp, #0x430 - add r0, r4, r5 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E6DDC: - ldrb r0, [sp, #0x20] - mov r5, r7 - cmp r0, #0x0 - beq _020E6E8C - cmp r0, #0x2 - moveq r1, #0x30 - movne r1, #0x20 - strh r1, [sp, #0x1c] - ldrh r0, [r6, #0x0] - cmp r0, #0x2b - cmpne r0, #0x2d - cmpne r0, #0x20 - bne _020E6E48 - cmp r1, #0x30 - bne _020E6E48 - mov r0, r8 - mov r1, r6 - mov r2, #0x1 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - add r6, r6, #0x2 - sub r7, r7, #0x1 -_020E6E48: - ldr r0, [sp, #0x28] - cmp r5, r0 - bge _020E6E8C -_020E6E54: - mov r0, r8 - add r1, sp, #0x1c - mov r2, #0x1 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r0, [sp, #0x28] - add r5, r5, #0x1 - cmp r5, r0 - blt _020E6E54 -_020E6E8C: - cmp r7, #0x0 - beq _020E6EBC - mov r0, r8 - mov r1, r6 - mov r2, r7 - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr -_020E6EBC: - ldrb r0, [sp, #0x20] - cmp r0, #0x0 - bne _020E6F14 - ldr r0, [sp, #0x28] - cmp r5, r0 - bge _020E6F14 - mov r7, #0x20 -_020E6ED8: - mov r0, r8 - add r1, sp, #0x1a - mov r2, #0x1 - strh r7, [sp, #0x1a] - blx r9 - cmp r0, #0x0 - addeq sp, sp, #0x430 - mvneq r0, #0x0 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r0, [sp, #0x28] - add r5, r5, #0x1 - cmp r5, r0 - blt _020E6ED8 -_020E6F14: - add r4, r4, r5 -_020E6F18: - ldrh r0, [r11, #0x0] - cmp r0, #0x0 - bne _020E6684 -_020E6F24: - mov r0, r4 - add sp, sp, #0x430 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E6F38: .word 0x0000FFFF -_020E6F3C: .word 0x02106E40 -_020E6F40: .word 0x02106E44 - - arm_func_start __wStringWrite -__wStringWrite: ; 0x020E6F44 - stmdb sp!, {r3-r5,lr} - mov r4, r0 - ldr r3, [r4, #0x8] - mov r5, r2 - ldr r2, [r4, #0x4] - add r0, r3, r5 - cmp r0, r2 - ldr r0, [r4, #0x0] - subhi r5, r2, r3 - mov r2, r5 - add r0, r0, r3, lsl #0x1 - bl wmemcpy - ldr r1, [r4, #0x8] - add r1, r1, r5 - str r1, [r4, #0x8] - ldmia sp!, {r3-r5,pc} - - arm_func_start swprintf -swprintf: ; 0x020E6F84 - stmdb sp!, {r0-r3} - stmdb sp!, {r3,lr} - add r3, sp, #0x10 - bic r3, r3, #0x3 - ldr r2, [sp, #0x10] - add r3, r3, #0x4 - bl vswprintf - ldmia sp!, {r3,lr} - add sp, sp, #0x10 - bx lr - - arm_func_start vswprintf -vswprintf: ; 0x020E6FAC - stmdb sp!, {r4-r5,lr} - sub sp, sp, #0xc - mov r5, r0 - mov r4, r1 - mov r12, #0x0 - ldr r0, _020E7018 ; =__wStringWrite - add r1, sp, #0x0 - str r5, [sp, #0x0] - str r4, [sp, #0x4] - str r12, [sp, #0x8] - bl __wpformatter -_020E6FD8: ; 0x020E6FD8 - cmp r0, #0x0 - addlt sp, sp, #0xc - ldmltia sp!, {r4-r5,pc} -_020E6FE4: ; 0x020E6FE4 - cmp r0, r4 - bhs _020E7000 - mov r1, r0, lsl #0x1 - mov r2, #0x0 - add sp, sp, #0xc - strh r2, [r5, r1] - ldmia sp!, {r4-r5,pc} -_020E7000: - mov r1, #0x0 - add r0, r5, r4, lsl #0x1 - strh r1, [r0, #-0x2] - sub r0, r1, #0x1 - add sp, sp, #0xc - ldmia sp!, {r4-r5,pc} - .balign 4 -_020E7018: .word __wStringWrite - - arm_func_start wcslen -wcslen: ; 0x020E701C - mvn r2, #0x0 -_020E7020: - ldrh r1, [r0], #0x2 - add r2, r2, #0x1 - cmp r1, #0x0 - bne _020E7020 - mov r0, r2 - bx lr - - arm_func_start wcscpy -wcscpy: ; 0x020E7038 - mov r3, r0 -_020E703C: - ldrh r2, [r1], #0x2 - mov r12, r3 - strh r2, [r3], #0x2 - ldrh r2, [r12, #0x0] - cmp r2, #0x0 - bne _020E703C - bx lr - - arm_func_start wcschr -wcschr: ; 0x020E7058 - ldrh r2, [r0], #0x2 - cmp r2, #0x0 - beq _020E707C -_020E7064: - cmp r2, r1 - subeq r0, r0, #0x2 - bxeq lr - ldrh r2, [r0], #0x2 - cmp r2, #0x0 - bne _020E7064 -_020E707C: - cmp r1, #0x0 - movne r0, #0x0 - subeq r0, r0, #0x2 - bx lr - - arm_func_start __ieee754_pow -__ieee754_pow: ; 0x020E708C - stmdb sp!, {r0-r3} - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x80 - ldr r8, [sp, #0xb4] - ldr r6, [sp, #0xac] - ldr r0, [sp, #0xb0] - bic r9, r8, #0x80000000 - orrs r1, r9, r0 - ldr r7, [sp, #0xa8] - bic r4, r6, #0x80000000 - addeq sp, sp, #0x80 - moveq r0, #0x0 - ldreq r1, _020E7638 ; =0x3FF00000 - ldmeqia sp!, {r3-r11,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r1, _020E763C ; =0x7FF00000 - cmp r4, r1 - bgt _020E70FC - bne _020E70E4 - cmp r7, #0x0 - bne _020E70FC -_020E70E4: - ldr r1, _020E763C ; =0x7FF00000 - cmp r9, r1 - bgt _020E70FC - bne _020E7120 - cmp r0, #0x0 - beq _020E7120 -_020E70FC: - ldr r0, [sp, #0xa8] - ldr r1, [sp, #0xac] - ldr r2, [sp, #0xb0] - ldr r3, [sp, #0xb4] - bl _dadd - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7120: - cmp r6, #0x0 - mov r5, #0x0 - bge _020E7188 - ldr r1, _020E7640 ; =0x43400000 - cmp r9, r1 - movge r5, #0x2 - bge _020E7188 - sub r1, r1, #0x3500000 - cmp r9, r1 - blt _020E7188 - ldr r1, _020E7644 ; =0xFFFFFC01 - add r1, r1, r9, asr #0x14 - cmp r1, #0x14 - ble _020E7170 - rsb r2, r1, #0x34 - mov r1, r0, lsr r2 - cmp r0, r1, lsl r2 - andeq r1, r1, #0x1 - rsbeq r5, r1, #0x2 - b _020E7188 -_020E7170: - cmp r0, #0x0 - rsbeq r2, r1, #0x14 - moveq r1, r9, asr r2 - cmpeq r9, r1, lsl r2 - andeq r1, r1, #0x1 - rsbeq r5, r1, #0x2 -_020E7188: - cmp r0, #0x0 - bne _020E72E4 - ldr r1, _020E763C ; =0x7FF00000 - cmp r9, r1 - bne _020E723C - add r0, r4, #0x100000 - add r0, r0, #0xc0000000 - orrs r0, r0, r7 - bne _020E71D0 - ldr r0, [sp, #0xb0] - ldr r1, [sp, #0xb4] - mov r2, r0 - mov r3, r1 - bl _dsub - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E71D0: - sub r0, r1, #0x40000000 - cmp r4, r0 - blt _020E7200 - cmp r8, #0x0 - ldrge r0, [sp, #0xb0] - ldrge r1, [sp, #0xb4] - movlt r0, #0x0 - add sp, sp, #0x80 - movlt r1, r0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7200: - cmp r8, #0x0 - mov r0, #0x0 - addge sp, sp, #0x80 - movge r1, r0 - ldmgeia sp!, {r3-r11,lr} - addge sp, sp, #0x10 - bxge lr - ldr r2, [sp, #0xb0] - ldr r3, [sp, #0xb4] - mov r1, r0 - bl _dsub - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E723C: - sub r0, r1, #0x40000000 - cmp r9, r0 - bne _020E7288 - cmp r8, #0x0 - ldrge r0, [sp, #0xa8] - ldrge r1, [sp, #0xac] - addge sp, sp, #0x80 - ldmgeia sp!, {r3-r11,lr} - addge sp, sp, #0x10 - bxge lr - ldr r2, [sp, #0xa8] - ldr r3, [sp, #0xac] - sub r1, r1, #0x40000000 - mov r0, #0x0 - bl _ddiv - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7288: - cmp r8, #0x40000000 - bne _020E72B4 - ldr r0, [sp, #0xa8] - ldr r1, [sp, #0xac] - mov r2, r0 - mov r3, r1 - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E72B4: - ldr r0, _020E7648 ; =0x3FE00000 - cmp r8, r0 - bne _020E72E4 - cmp r6, #0x0 - blt _020E72E4 - ldr r0, [sp, #0xa8] - ldr r1, [sp, #0xac] - bl _dsqrt - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E72E4: - ldr r0, [sp, #0xa8] - ldr r1, [sp, #0xac] - bl fabs - str r0, [sp, #0x70] - str r1, [sp, #0x74] - cmp r7, #0x0 - bne _020E73E8 - ldr r0, _020E763C ; =0x7FF00000 - cmp r4, r0 - cmpne r4, #0x0 - subne r0, r0, #0x40000000 - cmpne r4, r0 - bne _020E73E8 - ldr r2, [sp, #0x70] - ldr r3, [sp, #0x74] - str r2, [sp, #0x78] - str r3, [sp, #0x7c] - cmp r8, #0x0 - bge _020E7344 - ldr r1, _020E7638 ; =0x3FF00000 - mov r0, #0x0 - bl _ddiv - str r0, [sp, #0x78] - str r1, [sp, #0x7c] -_020E7344: - cmp r6, #0x0 - bge _020E73D0 - add r0, r4, #0x100000 - add r0, r0, #0xc0000000 - orrs r0, r0, r5 - bne _020E73AC - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - mov r2, r0 - mov r3, r1 - bl _dsub - mov r4, r0 - mov r5, r1 - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - mov r2, r0 - mov r3, r1 - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r5 - bl _ddiv - str r0, [sp, #0x78] - str r1, [sp, #0x7c] - b _020E73D0 -_020E73AC: - cmp r5, #0x1 - bne _020E73D0 - mov r0, #0x0 - ldr r2, [sp, #0x78] - ldr r3, [sp, #0x7c] - mov r1, r0 - bl _dsub - str r0, [sp, #0x78] - str r1, [sp, #0x7c] -_020E73D0: - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E73E8: - mov r0, r6, asr #0x1f - add r7, r0, #0x1 - orrs r0, r7, r5 - bne _020E7420 - ldr r0, _020E764C ; =0x02106B78 - ldr r1, _020E7650 ; =0x021D74A8 - ldr r0, [r0, #0x0] - mov r2, #0x21 - str r2, [r1, #0x0] - bl _f2d - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7420: - ldr r3, _020E7654 ; =0x41E00000 - cmp r9, r3 - ble _020E7724 - add r0, r3, #0x2100000 - cmp r9, r0 - ble _020E7490 - ldr r1, _020E7658 ; =0x3FEFFFFF - cmp r4, r1 - bgt _020E7464 - cmp r8, #0x0 - mov r0, #0x0 - addlt r1, r1, #0x40000001 - add sp, sp, #0x80 - movge r1, r0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7464: - add r0, r1, #0x1 - cmp r4, r0 - blt _020E7490 - cmp r8, #0x0 - mov r0, #0x0 - addgt r1, r1, #0x40000001 - add sp, sp, #0x80 - movle r1, r0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7490: - ldr r2, _020E7658 ; =0x3FEFFFFF - cmp r4, r2 - bge _020E74BC - cmp r8, #0x0 - mov r0, #0x0 - addlt r1, r2, #0x40000001 - add sp, sp, #0x80 - movge r1, r0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E74BC: - add r0, r2, #0x1 - cmp r4, r0 - ble _020E74E8 - cmp r8, #0x0 - mov r0, #0x0 - addgt r1, r2, #0x40000001 - add sp, sp, #0x80 - movle r1, r0 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E74E8: - ldr r0, [sp, #0xa8] - ldr r1, [sp, #0xac] - add r3, r2, #0x1 - mov r2, #0x0 - bl _dsub - mov r2, r0 - mov r3, r1 - str r0, [sp, #0x50] - str r1, [sp, #0x54] - bl _dmul - mov r6, r1 - mov r4, r0 - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - ldr r1, _020E765C ; =0x3FD00000 - mov r0, #0x0 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7660 ; =0x55555555 - sub r1, r0, #0x15800000 - bl _dsub - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, #0x0 - ldr r1, _020E7648 ; =0x3FE00000 - bl _dsub - mov r2, r0 - mov r0, r4 - mov r3, r1 - mov r1, r6 - bl _dmul - mov r6, r0 - mov r8, r1 - mov r0, #0x60000000 - ldr r1, _020E7664 ; =0x3FF71547 - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - bl _dmul - mov r4, r0 - mov r9, r1 - ldr r0, _020E7668 ; =0xF85DDF44 - ldr r1, _020E766C ; =0x3E54AE0B - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - bl _dmul - mov r11, r0 - mov r10, r1 - ldr r0, _020E7670 ; =0x652B82FE - ldr r1, _020E7664 ; =0x3FF71547 - mov r2, r6 - mov r3, r8 - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r11 - mov r1, r10 - bl _dsub - mov r6, r0 - mov r8, r1 - mov r0, r4 - mov r1, r9 - mov r2, r6 - mov r3, r8 - bl _dadd - mov r2, r4 - mov r3, r9 - str r1, [sp, #0x5c] - mov r0, #0x0 - str r0, [sp, #0x58] - bl _dsub - mov r2, r0 - mov r0, r6 - mov r3, r1 - mov r1, r8 - bl _dsub - mov r4, r0 - mov r8, r1 - b _020E7C80 - .balign 4 -_020E7638: .word 0x3FF00000 -_020E763C: .word 0x7FF00000 -_020E7640: .word 0x43400000 -_020E7644: .word 0xFFFFFC01 -_020E7648: .word 0x3FE00000 -_020E764C: .word 0x02106B78 -_020E7650: .word 0x021D74A8 -_020E7654: .word 0x41E00000 -_020E7658: .word 0x3FEFFFFF -_020E765C: .word 0x3FD00000 -_020E7660: .word 0x55555555 -_020E7664: .word 0x3FF71547 -_020E7668: .word 0xF85DDF44 -_020E766C: .word 0x3E54AE0B -_020E7670: .word 0x652B82FE -_020E7674: .word 0x0003988E -_020E7678: .word 0x000BB67A -_020E767C: .word 0x02104754 -_020E7680: .word 0x4A454EEF -_020E7684: .word 0x3FCA7E28 -_020E7688: .word 0x93C9DB65 -_020E768C: .word 0x3FCD864A -_020E7690: .word 0xA91D4101 -_020E7694: .word 0x3FD17460 -_020E7698: .word 0x518F264D -_020E769C: .word 0x3FD55555 -_020E76A0: .word 0xDB6FABFF -_020E76A4: .word 0x3FDB6DB6 -_020E76A8: .word 0x33333303 -_020E76AC: .word 0x3FE33333 -_020E76B0: .word 0x40080000 -_020E76B4: .word 0x3FEEC709 -_020E76B8: .word 0x145B01F5 -_020E76BC: .word 0xBE3E2FE0 -_020E76C0: .word 0xDC3A03FD -_020E76C4: .word 0x02104764 -_020E76C8: .word 0x02104744 -_020E76CC: .word 0x40900000 -_020E76D0: .word 0x8800759C -_020E76D4: .word 0x7E37E43C -_020E76D8: .word 0x3C971547 -_020E76DC: .word 0x3F6F3400 -_020E76E0: .word 0xC2F8F359 -_020E76E4: .word 0x01A56E1F -_020E76E8: .word 0x3FE62E43 -_020E76EC: .word 0xFEFA39EF -_020E76F0: .word 0x3FE62E42 -_020E76F4: .word 0x0CA86C39 -_020E76F8: .word 0xBE205C61 -_020E76FC: .word 0x72BEA4D0 -_020E7700: .word 0x3E663769 -_020E7704: .word 0xC5D26BF1 -_020E7708: .word 0xBEBBBD41 -_020E770C: .word 0xAF25DE2C -_020E7710: .word 0x3F11566A -_020E7714: .word 0x16BEBD93 -_020E7718: .word 0xBF66C16C -_020E771C: .word 0x5555553E -_020E7720: .word 0x3FC55555 -_020E7724: - cmp r4, #0x100000 - mov r6, #0x0 - bge _020E7754 - ldr r0, [sp, #0x70] - ldr r1, [sp, #0x74] - mov r2, r6 - add r3, r3, #0x1600000 - bl _dmul - mov r4, r1 - str r0, [sp, #0x70] - str r4, [sp, #0x74] - sub r6, r6, #0x35 -_020E7754: - ldr r0, _020E7644 ; =0xFFFFFC01 - ldr r1, _020E7674 ; =0x0003988E - and r2, r4, r0, lsr #0xc - add r0, r0, r4, asr #0x14 - orr r9, r2, #0xff00000 - cmp r2, r1 - add r6, r6, r0 - orr r9, r9, #0x30000000 - movle r8, #0x0 - ble _020E7794 - ldr r0, _020E7678 ; =0x000BB67A - cmp r2, r0 - movlt r8, #0x1 - addge r6, r6, #0x1 - subge r9, r9, #0x100000 - movge r8, #0x0 -_020E7794: - ldr r2, _020E767C ; =0x02104754 - ldr r0, [sp, #0x70] - add r1, r2, r8, lsl #0x3 - ldr r3, [r1, #0x4] - ldr r2, [r2, r8, lsl #0x3] - mov r1, r9 - str r9, [sp, #0x74] - bl _dsub - ldr r2, _020E767C ; =0x02104754 - mov r10, r0 - add r3, r2, r8, lsl #0x3 - mov r4, r1 - ldr r0, [sp, #0x70] - ldr r2, [r2, r8, lsl #0x3] - ldr r3, [r3, #0x4] - mov r1, r9 - bl _dadd - mov r3, r1 - mov r2, r0 - ldr r1, _020E7638 ; =0x3FF00000 - mov r0, #0x0 - bl _ddiv - str r1, [sp, #0x24] - mov r11, r0 - ldr r3, [sp, #0x24] - mov r0, r10 - mov r1, r4 - mov r2, r11 - bl _dmul - mov r2, r9, asr #0x1 - orr r2, r2, #0x20000000 - mov r9, r1 - add r2, r2, #0x80000 - add r1, r2, r8, lsl #0x12 - ldr r2, _020E767C ; =0x02104754 - str r0, [sp, #0x28] - add r3, r2, r8, lsl #0x3 - mov r0, #0x0 - ldr r2, [r2, r8, lsl #0x3] - ldr r3, [r3, #0x4] - str r9, [sp, #0x4c] - str r1, [sp, #0x44] - str r0, [sp, #0x48] - str r0, [sp, #0x40] - bl _dsub - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x70] - ldr r1, [sp, #0x74] - bl _dsub - str r0, [sp, #0x2c] - str r1, [sp, #0x1c] - ldr r0, [sp, #0x48] - ldr r2, [sp, #0x40] - ldr r3, [sp, #0x44] - mov r1, r9 - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r10 - mov r1, r4 - bl _dsub - mov r10, r0 - mov r4, r1 - ldr r2, [sp, #0x2c] - ldr r3, [sp, #0x1c] - ldr r0, [sp, #0x48] - mov r1, r9 - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r10 - mov r1, r4 - bl _dsub - mov r3, r1 - mov r2, r0 - ldr r1, [sp, #0x24] - mov r0, r11 - bl _dmul - str r0, [sp, #0x30] - ldr r0, [sp, #0x28] - str r1, [sp, #0x14] - mov r1, r9 - mov r2, r0 - mov r3, r9 - bl _dmul - mov r4, r0 - mov r10, r1 - mov r2, r4 - mov r3, r10 - bl _dmul - str r0, [sp, #0x34] - mov r11, r1 - ldr r0, _020E7680 ; =0x4A454EEF - ldr r1, _020E7684 ; =0x3FCA7E28 - mov r2, r4 - mov r3, r10 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7688 ; =0x93C9DB65 - ldr r1, _020E768C ; =0x3FCD864A - bl _dadd - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7690 ; =0xA91D4101 - ldr r1, _020E7694 ; =0x3FD17460 - bl _dadd - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7698 ; =0x518F264D - ldr r1, _020E769C ; =0x3FD55555 - bl _dadd - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76A0 ; =0xDB6FABFF - ldr r1, _020E76A4 ; =0x3FDB6DB6 - bl _dadd - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76A8 ; =0x33333303 - ldr r1, _020E76AC ; =0x3FE33333 - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x34] - mov r1, r11 - bl _dmul - mov r4, r0 - mov r10, r1 - ldr r0, [sp, #0x48] - ldr r2, [sp, #0x28] - mov r1, r9 - mov r3, r9 - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x30] - ldr r1, [sp, #0x14] - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dadd - mov r4, r0 - ldr r0, [sp, #0x48] - mov r10, r1 - mov r1, r9 - mov r2, r0 - mov r3, r1 - bl _dmul - str r1, [sp, #0xc] - mov r11, r0 - ldr r1, _020E76B0 ; =0x40080000 - ldr r3, [sp, #0xc] - mov r0, #0x0 - mov r2, r11 - bl _dadd - mov r2, r4 - mov r3, r10 - bl _dadd -_020E7A6C: ; 0x020E7A6C - mov r0, #0x0 - ldr r3, _020E76B0 ; =0x40080000 - mov r2, r0 - str r1, [sp, #0x44] - str r0, [sp, #0x40] - bl _dsub - ldr r3, [sp, #0xc] - mov r2, r11 - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dsub - str r0, [sp, #0x38] - str r1, [sp, #0x4] - ldr r0, [sp, #0x48] - ldr r2, [sp, #0x40] - ldr r3, [sp, #0x44] - mov r1, r9 - bl _dmul - mov r4, r0 - mov r10, r1 - ldr r0, [sp, #0x30] - ldr r1, [sp, #0x14] - ldr r2, [sp, #0x40] - ldr r3, [sp, #0x44] - bl _dmul - str r0, [sp, #0x3c] - mov r11, r1 - ldr r0, [sp, #0x38] - ldr r1, [sp, #0x4] - ldr r2, [sp, #0x28] - mov r3, r9 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x3c] - mov r1, r11 - bl _dadd - mov r9, r0 - mov r11, r1 - mov r0, r4 - mov r1, r10 - mov r2, r9 - mov r3, r11 - bl _dadd -_020E7B28: ; 0x020E7B28 - mov r0, #0x0 - mov r2, r4 - mov r3, r10 - str r1, [sp, #0x6c] - str r0, [sp, #0x68] - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r9 - mov r1, r11 - bl _dsub - mov r10, r1 - mov r11, r0 - ldr r1, _020E76B4 ; =0x3FEEC709 - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - mov r0, #0xe0000000 - bl _dmul - mov r4, r0 - mov r9, r1 - ldr r0, _020E76B8 ; =0x145B01F5 - ldr r1, _020E76BC ; =0xBE3E2FE0 - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - bl _dmul - mov r2, r11 - mov r3, r10 - mov r11, r0 - mov r10, r1 - ldr r0, _020E76C0 ; =0xDC3A03FD - ldr r1, _020E76B4 ; =0x3FEEC709 - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r11 - mov r1, r10 - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, _020E76C4 ; =0x02104764 - add r1, r0, r8, lsl #0x3 - ldr r0, [r0, r8, lsl #0x3] - ldr r1, [r1, #0x4] - bl _dadd - mov r11, r0 - mov r10, r1 - mov r0, r6 - bl _dflt - str r0, [sp, #0x50] - str r1, [sp, #0x54] - mov r0, r4 - mov r1, r9 - mov r2, r11 - mov r3, r10 - bl _dadd - ldr r2, _020E76C8 ; =0x02104744 - add r3, r2, r8, lsl #0x3 - ldr r2, [r2, r8, lsl #0x3] - ldr r3, [r3, #0x4] - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dadd - str r1, [sp, #0x5c] - mov r0, #0x0 - str r0, [sp, #0x58] - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - bl _dsub - ldr r2, _020E76C8 ; =0x02104744 - add r3, r2, r8, lsl #0x3 - ldr r2, [r2, r8, lsl #0x3] - ldr r3, [r3, #0x4] - bl _dsub - mov r2, r4 - mov r3, r9 - bl _dsub - mov r2, r0 - mov r0, r11 - mov r3, r1 - mov r1, r10 - bl _dsub - mov r4, r0 - mov r8, r1 -_020E7C80: - sub r0, r5, #0x1 - ldr r1, [sp, #0xb4] - orrs r0, r7, r0 - ldr r5, _020E7638 ; =0x3FF00000 - mov r2, #0x0 - ldr r0, [sp, #0xb0] - mov r3, r1 - mov r6, #0x0 - subeq r5, r5, #0x80000000 - str r1, [sp, #0x64] - str r2, [sp, #0x60] - bl _dsub - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x58] - ldr r1, [sp, #0x5c] - bl _dmul - mov r7, r0 - mov r9, r1 - ldr r0, [sp, #0xb0] - ldr r1, [sp, #0xb4] - mov r2, r4 - mov r3, r8 - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r7 - mov r1, r9 - bl _dadd - mov r7, r0 - mov r8, r1 - ldr r0, [sp, #0x60] - ldr r1, [sp, #0x64] - ldr r2, [sp, #0x58] - ldr r3, [sp, #0x5c] - bl _dmul - mov r2, r0 - mov r3, r1 - mov r0, r7 - mov r1, r8 - str r2, [sp, #0x68] - str r3, [sp, #0x6c] - bl _dadd - mov r9, r1 - ldr r2, _020E76CC ; =0x40900000 - str r0, [sp, #0x78] - str r9, [sp, #0x7c] - cmp r9, r2 - blt _020E7E0C - add r1, r9, #0xf700000 - add r1, r1, #0xb0000000 - orrs r0, r1, r0 - beq _020E7D8C - ldr r0, _020E76D0 ; =0x8800759C - ldr r1, _020E76D4 ; =0x7E37E43C - mov r2, r6 - mov r3, r5 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76D0 ; =0x8800759C - ldr r1, _020E76D4 ; =0x7E37E43C - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7D8C: - ldr r0, _020E7670 ; =0x652B82FE - ldr r1, _020E76D8 ; =0x3C971547 - mov r2, r7 - mov r3, r8 - bl _dadd - mov r4, r0 - mov r10, r1 - ldr r0, [sp, #0x78] - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - mov r1, r9 - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r10 - bl _dgr - bls _020E7EC0 - ldr r0, _020E76D0 ; =0x8800759C - ldr r1, _020E76D4 ; =0x7E37E43C - mov r2, r6 - mov r3, r5 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76D0 ; =0x8800759C - ldr r1, _020E76D4 ; =0x7E37E43C - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7E0C: - bic r3, r9, #0x80000000 - add r2, r2, #0xcc00 - cmp r3, r2 - blt _020E7EC0 - ldr r2, _020E76DC ; =0x3F6F3400 - add r2, r9, r2 - orrs r2, r2, r0 - beq _020E7E64 - ldr r0, _020E76E0 ; =0xC2F8F359 - ldr r1, _020E76E4 ; =0x01A56E1F - mov r2, r6 - mov r3, r5 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76E0 ; =0xC2F8F359 - ldr r1, _020E76E4 ; =0x01A56E1F - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7E64: - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r7 - mov r1, r8 - bl _dleq - bhi _020E7EC0 - ldr r0, _020E76E0 ; =0xC2F8F359 - ldr r1, _020E76E4 ; =0x01A56E1F - mov r2, r6 - mov r3, r5 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E76E0 ; =0xC2F8F359 - ldr r1, _020E76E4 ; =0x01A56E1F - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr -_020E7EC0: - ldr r0, _020E7644 ; =0xFFFFFC01 - bic r3, r9, #0x80000000 - ldr r1, _020E7648 ; =0x3FE00000 - add r2, r0, r3, asr #0x14 - cmp r3, r1 - mov r4, #0x0 - ble _020E7F3C - mov r1, #0x100000 - add r2, r2, #0x1 - add r2, r9, r1, asr r2 - bic r3, r2, #0x80000000 - add r0, r0, r3, asr #0x14 - sub r3, r1, #0x1 - mvn r3, r3, asr r0 - sub r1, r1, #0x1 - and r1, r2, r1 - and r2, r2, r3 - str r2, [sp, #0x54] - str r4, [sp, #0x50] - orr r1, r1, #0x100000 - rsb r0, r0, #0x14 - mov r4, r1, asr r0 - cmp r9, #0x0 - ldr r0, [sp, #0x68] - ldr r1, [sp, #0x6c] - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - rsblt r4, r4, #0x0 - bl _dsub - str r0, [sp, #0x68] - str r1, [sp, #0x6c] -_020E7F3C: - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - mov r0, r7 - mov r1, r8 - bl _dadd - mov r3, r1 - mov r0, #0x0 - ldr r1, _020E76E8 ; =0x3FE62E43 - mov r2, r0 - str r3, [sp, #0x54] - str r0, [sp, #0x50] - bl _dmul - mov r9, r0 - mov r10, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - ldr r2, [sp, #0x68] - ldr r3, [sp, #0x6c] - bl _dsub - mov r2, r0 - mov r0, r7 - mov r3, r1 - mov r1, r8 - bl _dsub - mov r2, r0 - mov r3, r1 - ldr r0, _020E76EC ; =0xFEFA39EF - ldr r1, _020E76F0 ; =0x3FE62E42 - bl _dmul - mov r7, r0 - mov r8, r1 - ldr r0, _020E76F4 ; =0x0CA86C39 - ldr r1, _020E76F8 ; =0xBE205C61 - ldr r2, [sp, #0x50] - ldr r3, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r0, r7 - mov r3, r1 - mov r1, r8 - bl _dadd - mov r7, r0 - mov r8, r1 - mov r0, r9 - mov r1, r10 - mov r2, r7 - mov r3, r8 - bl _dadd - mov r2, r9 - mov r3, r10 - str r0, [sp, #0x78] - str r1, [sp, #0x7c] - bl _dsub - mov r2, r0 - mov r3, r1 - mov r0, r7 - mov r1, r8 - bl _dsub - mov r8, r0 - mov r9, r1 - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - mov r2, r0 - mov r3, r1 - bl _dmul - mov r2, r0 - str r2, [sp, #0x50] - mov r3, r1 - str r3, [sp, #0x54] - ldr r0, _020E76FC ; =0x72BEA4D0 - ldr r1, _020E7700 ; =0x3E663769 - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7704 ; =0xC5D26BF1 - ldr r1, _020E7708 ; =0xBEBBBD41 - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E770C ; =0xAF25DE2C - ldr r1, _020E7710 ; =0x3F11566A - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E7714 ; =0x16BEBD93 - ldr r1, _020E7718 ; =0xBF66C16C - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, _020E771C ; =0x5555553E - ldr r1, _020E7720 ; =0x3FC55555 - bl _dadd - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x50] - ldr r1, [sp, #0x54] - bl _dmul - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - bl _dsub - mov r2, r0 - str r2, [sp, #0x58] - mov r3, r1 - str r3, [sp, #0x5c] - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - bl _dmul - mov r7, r0 - mov r10, r1 - ldr r0, [sp, #0x58] - ldr r1, [sp, #0x5c] - mov r2, #0x0 - mov r3, #0x40000000 - bl _dsub - mov r2, r0 - mov r0, r7 - mov r3, r1 - mov r1, r10 - bl _ddiv - mov r7, r0 - mov r10, r1 - ldr r0, [sp, #0x78] - ldr r1, [sp, #0x7c] - mov r2, r8 - mov r3, r9 - bl _dmul - mov r2, r0 - mov r0, r8 - mov r3, r1 - mov r1, r9 - bl _dadd - mov r2, r0 - mov r0, r7 - mov r3, r1 - mov r1, r10 - bl _dsub - ldr r2, [sp, #0x78] - ldr r3, [sp, #0x7c] - bl _dsub - mov r3, r1 - mov r2, r0 - ldr r1, _020E7638 ; =0x3FF00000 - mov r0, #0x0 - bl _dsub - add r3, r1, r4, lsl #0x14 - mov r2, r3, asr #0x14 - str r0, [sp, #0x78] - cmp r2, #0x0 - str r1, [sp, #0x7c] - addgt r0, sp, #0x78 - strgt r3, [r0, #0x4] - bgt _020E81F0 - mov r2, r4 - bl scalbn - str r0, [sp, #0x78] - str r1, [sp, #0x7c] -_020E81F0: - ldr r2, [sp, #0x78] - ldr r3, [sp, #0x7c] - mov r0, r6 - mov r1, r5 - bl _dmul - add sp, sp, #0x80 - ldmia sp!, {r3-r11,lr} - add sp, sp, #0x10 - bx lr - - arm_func_start copysign -copysign: ; 0x020E8214 - stmdb sp!, {r0-r3} - ldr r1, [sp, #0x4] - ldr r0, [sp, #0xc] - bic r1, r1, #0x80000000 - and r0, r0, #0x80000000 - orr r1, r1, r0 - ldr r0, [sp, #0x0] - str r1, [sp, #0x4] - add sp, sp, #0x10 - bx lr - - arm_func_start fabs -fabs: ; 0x020E823C - stmdb sp!, {r0-r3} - add r2, sp, #0x0 - ldr r1, [r2, #0x4] - ldr r0, [sp, #0x0] - bic r1, r1, #0x80000000 - str r1, [r2, #0x4] - add sp, sp, #0x10 - bx lr - - arm_func_start frexp -frexp: ; 0x020E825C - stmdb sp!, {r0-r3} - stmdb sp!, {r4,lr} - ldr r1, [sp, #0xc] - ldr r0, _020E8308 ; =0x7FF00000 - mov r4, r2 - bic r3, r1, #0x80000000 - mov r2, #0x0 - str r2, [r4, #0x0] - cmp r3, r0 - ldr r0, [sp, #0x8] - bge _020E8290 - orrs r0, r3, r0 - bne _020E82A4 -_020E8290: - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E82A4: - cmp r3, #0x100000 - bge _020E82D0 - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - ldr r3, _020E830C ; =0x43500000 - bl _dmul - mvn r2, #0x35 - str r0, [sp, #0x8] - str r1, [sp, #0xc] - str r2, [r4, #0x0] - bic r3, r1, #0x80000000 -_020E82D0: - ldr r2, _020E8310 ; =0x800FFFFF - ldr r0, _020E8314 ; =0xFFFFFC02 - and r1, r1, r2 - orr r1, r1, #0xfe00000 - orr r1, r1, #0x30000000 - ldr r2, [r4, #0x0] - add r0, r0, r3, asr #0x14 - add r2, r2, r0 - ldr r0, [sp, #0x8] - str r2, [r4, #0x0] - str r1, [sp, #0xc] - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E8308: .word 0x7FF00000 -_020E830C: .word 0x43500000 -_020E8310: .word 0x800FFFFF -_020E8314: .word 0xFFFFFC02 - - arm_func_start ldexp -ldexp: ; 0x020E8318 - stmdb sp!, {r0-r3} - stmdb sp!, {r4,lr} - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - mov r4, r2 - bl __fpclassifyf - cmp r0, #0x2 - ble _020E8350 - mov r0, #0x0 - ldr r2, [sp, #0x8] - ldr r3, [sp, #0xc] - mov r1, r0 - bl _deq - bne _020E8364 -_020E8350: - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E8364: - ldr r3, [sp, #0xc] - ldr r0, _020E8538 ; =0x7FF00000 - ldr r1, [sp, #0x8] - and r0, r3, r0 - movs r12, r0, asr #0x14 - bne _020E83F0 - bic r0, r3, #0x80000000 - orrs r0, r1, r0 - ldreq r0, [sp, #0x8] - ldreq r1, [sp, #0xc] - ldmeqia sp!, {r4,lr} - addeq sp, sp, #0x10 - bxeq lr - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - ldr r3, _020E853C ; =0x43500000 - mov r2, #0x0 - bl _dmul - mov r3, r1 - ldr r1, _020E8538 ; =0x7FF00000 - ldr ip, _020E8540 ; =0xFFFF3CB0 - and r1, r3, r1 - mov r2, r0 - mov r0, r1, asr #0x14 - str r2, [sp, #0x8] - str r3, [sp, #0xc] - cmp r4, r12 - sub r12, r0, #0x36 - bge _020E83F0 - ldr r0, _020E8544 ; =0xC2F8F359 - ldr r1, _020E8548 ; =0x01A56E1F - bl _dmul - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E83F0: - ldr r0, _020E854C ; =0x000007FF - cmp r12, r0 - bne _020E841C - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - mov r2, r0 - mov r3, r1 - bl _dadd - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E841C: - add r2, r12, r4 - sub r0, r0, #0x1 - cmp r2, r0 - ble _020E8460 - ldr r2, [sp, #0x8] - ldr r3, [sp, #0xc] - ldr r0, _020E8550 ; =0x8800759C - ldr r1, _020E8554 ; =0x7E37E43C - bl copysign - mov r2, r0 - mov r3, r1 - ldr r0, _020E8550 ; =0x8800759C - ldr r1, _020E8554 ; =0x7E37E43C - bl _dmul - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E8460: - cmp r2, #0x0 - ble _020E8488 - ldr r1, _020E8558 ; =0x800FFFFF - ldr r0, [sp, #0x8] - and r1, r3, r1 - orr r1, r1, r2, lsl #0x14 - str r1, [sp, #0xc] - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E8488: - mvn r0, #0x35 - cmp r2, r0 - bgt _020E8508 - ldr r0, _020E855C ; =0x0000C350 - cmp r4, r0 - ble _020E84D4 - ldr r2, [sp, #0x8] - ldr r3, [sp, #0xc] - ldr r0, _020E8550 ; =0x8800759C - ldr r1, _020E8554 ; =0x7E37E43C - bl copysign - mov r2, r0 - mov r3, r1 - ldr r0, _020E8550 ; =0x8800759C - ldr r1, _020E8554 ; =0x7E37E43C - bl _dmul - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E84D4: - ldr r2, [sp, #0x8] - ldr r3, [sp, #0xc] - ldr r0, _020E8544 ; =0xC2F8F359 - ldr r1, _020E8548 ; =0x01A56E1F - bl copysign - mov r2, r0 - mov r3, r1 - ldr r0, _020E8544 ; =0xC2F8F359 - ldr r1, _020E8548 ; =0x01A56E1F - bl _dmul - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr -_020E8508: - ldr r0, _020E8558 ; =0x800FFFFF - add r1, r2, #0x36 - and r0, r3, r0 - orr r3, r0, r1, lsl #0x14 - ldr r2, [sp, #0x8] - ldr r1, _020E8560 ; =0x3C900000 - mov r0, #0x0 - str r3, [sp, #0xc] - bl _dmul - ldmia sp!, {r4,lr} - add sp, sp, #0x10 - bx lr - .balign 4 -_020E8538: .word 0x7FF00000 -_020E853C: .word 0x43500000 -_020E8540: .word 0xFFFF3CB0 -_020E8544: .word 0xC2F8F359 -_020E8548: .word 0x01A56E1F -_020E854C: .word 0x000007FF -_020E8550: .word 0x8800759C -_020E8554: .word 0x7E37E43C -_020E8558: .word 0x800FFFFF -_020E855C: .word 0x0000C350 -_020E8560: .word 0x3C900000 - - arm_func_start pow -pow: ; 0x020E8564 - ldr ip, _020E856C ; =__ieee754_pow - bx r12 - .balign 4 -_020E856C: .word __ieee754_pow - - arm_func_start __must_round -__must_round: ; 0x020E8570 - add r3, r0, #0x5 - ldrb r2, [r3, r1] - add r12, r3, r1 - cmp r2, #0x5 - movhi r0, #0x1 - bxhi lr - mvncc r0, #0x0 - bxcc lr - ldrb r2, [r0, #0x4] - add r12, r12, #0x1 - add r3, r3, r2 - cmp r12, r3 - bhs _020E85C0 -_020E85A4: - ldrb r2, [r12, #0x0] - cmp r2, #0x0 - movne r0, #0x1 - bxne lr - add r12, r12, #0x1 - cmp r12, r3 - blo _020E85A4 -_020E85C0: - sub r1, r1, #0x1 - add r0, r0, r1 - ldrb r0, [r0, #0x5] - tst r0, #0x1 - movne r0, #0x1 - mvneq r0, #0x0 - bx lr - - arm_func_start __dorounddecup -__dorounddecup: ; 0x020E85DC - add r3, r0, #0x5 - add r1, r3, r1 - sub r12, r1, #0x1 - mov r1, #0x0 -_020E85EC: - ldrb r2, [r12, #0x0] - cmp r2, #0x9 - addcc r0, r2, #0x1 - strccb r0, [r12, #0x0] - bxcc lr - cmp r12, r3 - bne _020E8620 - mov r1, #0x1 - strb r1, [r12, #0x0] - ldrsh r1, [r0, #0x2] - add r1, r1, #0x1 - strh r1, [r0, #0x2] - bx lr -_020E8620: - strb r1, [r12], #-0x1 - b _020E85EC -_020E8628: ; 0x020E8628 - bx lr - - arm_func_start __rounddec -__rounddec: ; 0x020E862C - stmdb sp!, {r3-r5,lr} - mov r4, r1 - mov r5, r0 - cmp r4, #0x0 - ldmleia sp!, {r3-r5,pc} -_020E8640: ; 0x020E8640 - ldrb r2, [r5, #0x4] - cmp r4, r2 - ldmgeia sp!, {r3-r5,pc} -_020E864C: ; 0x020E864C - bl __must_round - strb r4, [r5, #0x4] - cmp r0, #0x0 - ldmltia sp!, {r3-r5,pc} -_020E865C: ; 0x020E865C - mov r0, r5 - mov r1, r4 - bl __dorounddecup - ldmia sp!, {r3-r5,pc} - - arm_func_start __ull2dec -__ull2dec: ; 0x020E866C - stmdb sp!, {r3-r11,lr} - mov r10, r0 - mov r0, #0x0 - mov r8, r2 - strb r0, [r10, #0x0] - mov r9, r1 - cmp r8, #0x0 - strb r0, [r10, #0x4] - cmpeq r9, #0x0 - beq _020E86F8 - mov r6, #0xa - mov r11, r0 - mov r5, r0 - mov r4, r0 -_020E86A4: - ldrb r1, [r10, #0x4] - mov r0, r9 - mov r2, r6 - add r3, r1, #0x1 - mov r7, r1 - strb r3, [r10, #0x4] - mov r1, r8 - mov r3, r11 - bl _ull_mod - add r1, r10, r7 - strb r0, [r1, #0x5] - mov r0, r9 - mov r1, r8 - mov r2, #0xa - mov r3, #0x0 - bl _ll_udiv - mov r8, r1 - mov r9, r0 - cmp r8, r5 - cmpeq r9, r4 - bne _020E86A4 -_020E86F8: - ldrb r0, [r10, #0x4] - add r2, r10, #0x5 - add r0, r2, r0 - sub r3, r0, #0x1 - cmp r2, r3 - bhs _020E8728 -_020E8710: - ldrb r0, [r3, #0x0] - ldrb r1, [r2, #0x0] - strb r0, [r2], #0x1 - strb r1, [r3], #-0x1 - cmp r2, r3 - blo _020E8710 -_020E8728: - ldrb r0, [r10, #0x4] - sub r0, r0, #0x1 - strh r0, [r10, #0x2] - ldmia sp!, {r3-r11,pc} - - arm_func_start __timesdec -__timesdec: ; 0x020E8738 - stmdb sp!, {r3-r11,lr} - sub sp, sp, #0x40 - ldrb r6, [r1, #0x4] - ldrb r5, [r2, #0x4] - mov r4, #0x0 - add r3, sp, #0x0 - add r5, r6, r5 - sub r5, r5, #0x1 - add r3, r3, r5 - add r6, r3, #0x1 - mov r7, r6 - strb r4, [r0, #0x0] - cmp r5, #0x0 - ble _020E8800 - add lr, r1, #0x5 - add r11, r2, #0x5 -_020E8778: - ldrb r3, [r2, #0x4] - sub r10, r3, #0x1 - sub r3, r5, r10 - subs r9, r3, #0x1 - ldrb r3, [r1, #0x4] - movmi r9, #0x0 - submi r10, r5, #0x1 - add r8, r10, #0x1 - sub r3, r3, r9 - cmp r8, r3 - movgt r8, r3 - add r10, r11, r10 - add r9, lr, r9 - cmp r8, #0x0 - ble _020E87CC -_020E87B4: - ldrb r12, [r9], #0x1 - ldrb r3, [r10], #-0x1 - sub r8, r8, #0x1 - cmp r8, #0x0 - mla r4, r12, r3, r4 - bgt _020E87B4 -_020E87CC: - ldr r3, _020E88B8 ; =0xCCCCCCCD - sub r5, r5, #0x1 - umull r8, r9, r4, r3 - mov r9, r9, lsr #0x3 - cmp r5, #0x0 - mov r10, #0xa - umull r8, r9, r10, r9 - sub r9, r4, r8 - strb r9, [r6, #-0x1]! - mov r8, r4 - umull r3, r4, r8, r3 - mov r4, r4, lsr #0x3 - bgt _020E8778 -_020E8800: - ldrsh r3, [r1, #0x2] - ldrsh r1, [r2, #0x2] - cmp r4, #0x0 - add r1, r3, r1 - strh r1, [r0, #0x2] - beq _020E8828 - strb r4, [r6, #-0x1]! - ldrsh r1, [r0, #0x2] - add r1, r1, #0x1 - strh r1, [r0, #0x2] -_020E8828: - mov r3, #0x0 - b _020E8840 -_020E8830: - ldrb r2, [r6], #0x1 - add r1, r0, r3 - add r3, r3, #0x1 - strb r2, [r1, #0x5] -_020E8840: - cmp r3, #0x20 - bge _020E8850 - cmp r6, r7 - blo _020E8830 -_020E8850: - cmp r6, r7 - addcs sp, sp, #0x40 - strb r3, [r0, #0x4] - ldmcsia sp!, {r3-r11,pc} -_020E8860: ; 0x020E8860 - ldrb r1, [r6, #0x0] - cmp r1, #0x5 - addcc sp, sp, #0x40 - ldmccia sp!, {r3-r11,pc} -_020E8870: ; 0x020E8870 - bne _020E88A8 - add r2, r6, #0x1 - cmp r2, r7 - bhs _020E8898 -_020E8880: - ldrb r1, [r2, #0x0] - cmp r1, #0x0 - bne _020E88A8 - add r2, r2, #0x1 - cmp r2, r7 - blo _020E8880 -_020E8898: - ldrb r1, [r6, #-0x1] - tst r1, #0x1 - addeq sp, sp, #0x40 - ldmeqia sp!, {r3-r11,pc} -_020E88A8: - ldrb r1, [r0, #0x4] - bl __dorounddecup - add sp, sp, #0x40 - ldmia sp!, {r3-r11,pc} - .balign 4 -_020E88B8: .word 0xCCCCCCCD - - arm_func_start __str2dec -__str2dec: ; 0x020E88BC - stmdb sp!, {r3,lr} - strh r2, [r0, #0x2] - mov r12, #0x0 - strb r12, [r0, #0x0] - b _020E88E4 -_020E88D0: - ldrsb r3, [r1], #0x1 - add r2, r0, r12 - add r12, r12, #0x1 - sub r3, r3, #0x30 - strb r3, [r2, #0x5] -_020E88E4: - cmp r12, #0x20 - bge _020E88F8 - ldrsb r2, [r1, #0x0] - cmp r2, #0x0 - bne _020E88D0 -_020E88F8: - strb r12, [r0, #0x4] - ldrsb r2, [r1, #0x0] - cmp r2, #0x0 - ldmeqia sp!, {r3,pc} -_020E8908: ; 0x020E8908 - cmp r2, #0x5 - ldmltia sp!, {r3,pc} -_020E8910: ; 0x020E8910 - bgt _020E894C - ldrsb r2, [r1, #0x1] - add r1, r1, #0x1 - cmp r2, #0x0 - beq _020E8938 -_020E8924: - cmp r2, #0x30 - bne _020E894C - ldrsb r2, [r1, #0x1]! - cmp r2, #0x0 - bne _020E8924 -_020E8938: - sub r1, r12, #0x1 - add r1, r0, r1 - ldrb r1, [r1, #0x5] - tst r1, #0x1 - ldmeqia sp!, {r3,pc} -_020E894C: - ldrb r1, [r0, #0x4] - bl __dorounddecup - ldmia sp!, {r3,pc} - - arm_func_start __two_exp -__two_exp: ; 0x020E8958 - stmdb sp!, {r4-r5,lr} - sub sp, sp, #0x4c - mov r4, r1 - mvn r2, #0x34 - mov r5, r0 - cmp r4, r2 - bgt _020E8988 - bge _020E8A54 - sub r0, r2, #0xb - cmp r4, r0 - beq _020E8A3C - b _020E8BE4 -_020E8988: - add r1, r4, #0x20 - cmp r1, #0x28 - addls pc, pc, r1, lsl #0x2 - b _020E8BE4 -_020E8998: - b _020E8A68 -_020E899C: - b _020E8BE4 -_020E89A0: - b _020E8BE4 -_020E89A4: - b _020E8BE4 -_020E89A8: - b _020E8BE4 -_020E89AC: - b _020E8BE4 -_020E89B0: - b _020E8BE4 -_020E89B4: - b _020E8BE4 -_020E89B8: - b _020E8BE4 -_020E89BC: - b _020E8BE4 -_020E89C0: - b _020E8BE4 -_020E89C4: - b _020E8BE4 -_020E89C8: - b _020E8BE4 -_020E89CC: - b _020E8BE4 -_020E89D0: - b _020E8BE4 -_020E89D4: - b _020E8BE4 -_020E89D8: - b _020E8A7C -_020E89DC: - b _020E8BE4 -_020E89E0: - b _020E8BE4 -_020E89E4: - b _020E8BE4 -_020E89E8: - b _020E8BE4 -_020E89EC: - b _020E8BE4 -_020E89F0: - b _020E8BE4 -_020E89F4: - b _020E8BE4 -_020E89F8: - b _020E8A90 -_020E89FC: - b _020E8AA4 -_020E8A00: - b _020E8AB8 -_020E8A04: - b _020E8ACC -_020E8A08: - b _020E8AE0 -_020E8A0C: - b _020E8AF4 -_020E8A10: - b _020E8B08 -_020E8A14: - b _020E8B1C -_020E8A18: - b _020E8B30 -_020E8A1C: - b _020E8B44 -_020E8A20: - b _020E8B58 -_020E8A24: - b _020E8B6C -_020E8A28: - b _020E8B80 -_020E8A2C: - b _020E8B94 -_020E8A30: - b _020E8BA8 -_020E8A34: - b _020E8BBC -_020E8A38: - b _020E8BD0 -_020E8A3C: - ldr r1, _020E8C88 ; =0x02106E88 - mov r0, r5 - mvn r2, #0x13 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8A54: - ldr r1, _020E8C8C ; =0x02106EB8 - add r2, r2, #0x25 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8A68: - ldr r1, _020E8C90 ; =0x02106EE0 - add r2, r2, #0x2b - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8A7C: - ldr r1, _020E8C94 ; =0x02106EF8 - add r2, r2, #0x30 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8A90: - ldr r1, _020E8C98 ; =0x02106F08 - add r2, r2, #0x32 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8AA4: - ldr r1, _020E8C9C ; =0x02106F10 - add r2, r2, #0x32 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8AB8: - ldr r1, _020E8CA0 ; =0x02106F18 - add r2, r2, #0x33 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8ACC: - ldr r1, _020E8CA4 ; =0x02106F20 - add r2, r2, #0x33 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8AE0: - ldr r1, _020E8CA8 ; =0x02106F28 - add r2, r2, #0x33 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8AF4: - ldr r1, _020E8CAC ; =0x02106F2C - add r2, r2, #0x34 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B08: - ldr r1, _020E8CB0 ; =0x02106F30 - add r2, r2, #0x34 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B1C: - ldr r1, _020E8CB4 ; =0x02106F34 - add r2, r2, #0x34 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B30: - ldr r1, _020E8CB8 ; =0x02106F38 - mov r2, #0x0 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B44: - ldr r1, _020E8CBC ; =0x02106F3C - mov r2, #0x0 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B58: - ldr r1, _020E8CC0 ; =0x02106F40 - mov r2, #0x0 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B6C: - ldr r1, _020E8CC4 ; =0x02106F44 - mov r2, #0x0 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B80: - ldr r1, _020E8CC8 ; =0x02106F48 - mov r2, #0x1 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8B94: - ldr r1, _020E8CCC ; =0x02106F4C - mov r2, #0x1 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8BA8: - ldr r1, _020E8CD0 ; =0x02106F50 - mov r2, #0x1 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8BBC: - ldr r1, _020E8CD4 ; =0x02106F54 - mov r2, #0x2 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8BD0: - ldr r1, _020E8CD8 ; =0x02106F58 - mov r2, #0x2 - bl __str2dec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} -_020E8BE4: - and r0, r4, #0x80000000 - add r1, r4, r0, lsr #0x1f - add r0, sp, #0x26 - mov r1, r1, asr #0x1 - bl __two_exp - add r1, sp, #0x26 - mov r0, r5 - mov r2, r1 - bl __timesdec - tst r4, #0x1 - addeq sp, sp, #0x4c - ldmeqia sp!, {r4-r5,pc} -_020E8C14: ; 0x020E8C14 - add r3, sp, #0x0 - mov r12, r5 - mov r2, #0x9 -_020E8C20: - ldrh r1, [r12, #0x0] - ldrh r0, [r12, #0x2] - add r12, r12, #0x4 - subs r2, r2, #0x1 - strh r1, [r3, #0x0] - strh r0, [r3, #0x2] - add r3, r3, #0x4 - bne _020E8C20 - ldrh r0, [r12, #0x0] - cmp r4, #0x0 - strh r0, [r3, #0x0] - add r0, sp, #0x26 - ble _020E8C64 - ldr r1, _020E8CBC ; =0x02106F3C - mov r2, #0x0 - bl __str2dec - b _020E8C70 -_020E8C64: - ldr r1, _020E8CB4 ; =0x02106F34 - mvn r2, #0x0 - bl __str2dec -_020E8C70: - add r1, sp, #0x0 - add r2, sp, #0x26 - mov r0, r5 - bl __timesdec - add sp, sp, #0x4c - ldmia sp!, {r4-r5,pc} - .balign 4 -_020E8C88: .word 0x02106E88 -_020E8C8C: .word 0x02106EB8 -_020E8C90: .word 0x02106EE0 -_020E8C94: .word 0x02106EF8 -_020E8C98: .word 0x02106F08 -_020E8C9C: .word 0x02106F10 -_020E8CA0: .word 0x02106F18 -_020E8CA4: .word 0x02106F20 -_020E8CA8: .word 0x02106F28 -_020E8CAC: .word 0x02106F2C -_020E8CB0: .word 0x02106F30 -_020E8CB4: .word 0x02106F34 -_020E8CB8: .word 0x02106F38 -_020E8CBC: .word 0x02106F3C -_020E8CC0: .word 0x02106F40 -_020E8CC4: .word 0x02106F44 -_020E8CC8: .word 0x02106F48 -_020E8CCC: .word 0x02106F4C -_020E8CD0: .word 0x02106F50 -_020E8CD4: .word 0x02106F54 -_020E8CD8: .word 0x02106F58 - - arm_func_start __equals_dec -__equals_dec: - stmdb sp!, {r4,lr} - ldrb r3, [r0, #0x5] - cmp r3, #0x0 - bne _020E8D00 - ldrb r0, [r1, #0x5] - cmp r0, #0x0 - moveq r0, #0x1 - movne r0, #0x0 - ldmia sp!, {r4,pc} -_020E8D00: - ldrb r2, [r1, #0x5] - cmp r2, #0x0 - bne _020E8D1C - cmp r3, #0x0 - moveq r0, #0x1 - movne r0, #0x0 - ldmia sp!, {r4,pc} -_020E8D1C: - ldrsh r3, [r0, #0x2] - ldrsh r2, [r1, #0x2] - cmp r3, r2 - bne _020E8DB4 - ldrb r4, [r0, #0x4] - ldrb r2, [r1, #0x4] - mov r12, #0x0 - mov lr, r4 - cmp r4, r2 - movgt lr, r2 - cmp lr, #0x0 - ble _020E8D74 -_020E8D4C: - add r3, r0, r12 - add r2, r1, r12 - ldrb r3, [r3, #0x5] - ldrb r2, [r2, #0x5] - cmp r3, r2 - movne r0, #0x0 - ldmneia sp!, {r4,pc} -_020E8D68: ; 0x020E8D68 - add r12, r12, #0x1 - cmp r12, lr - blt _020E8D4C -_020E8D74: - cmp lr, r4 - moveq r0, r1 - ldrb r1, [r0, #0x4] - cmp r12, r1 - bge _020E8DAC -_020E8D88: - add r1, r0, r12 - ldrb r1, [r1, #0x5] - cmp r1, #0x0 - movne r0, #0x0 - ldmneia sp!, {r4,pc} -_020E8D9C: ; 0x020E8D9C - ldrb r1, [r0, #0x4] - add r12, r12, #0x1 - cmp r12, r1 - blt _020E8D88 -_020E8DAC: - mov r0, #0x1 - ldmia sp!, {r4,pc} -_020E8DB4: - mov r0, #0x0 - ldmia sp!, {r4,pc} - - arm_func_start __less_dec -__less_dec: - stmdb sp!, {r3-r5,lr} - ldrb r2, [r0, #0x5] - cmp r2, #0x0 - bne _020E8DE0 - ldrb r0, [r1, #0x5] - cmp r0, #0x0 - movne r0, #0x1 - moveq r0, #0x0 - ldmia sp!, {r3-r5,pc} -_020E8DE0: - ldrb r2, [r1, #0x5] - cmp r2, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020E8DF0: ; 0x020E8DF0 - ldrsh r3, [r1, #0x2] - ldrsh r2, [r0, #0x2] - cmp r2, r3 - bne _020E8E90 - ldrb r5, [r0, #0x4] - ldrb r4, [r1, #0x4] - mov r12, #0x0 - mov lr, r5 - cmp r5, r4 - movgt lr, r4 - cmp lr, #0x0 - ble _020E8E54 -_020E8E20: - add r3, r1, r12 - add r2, r0, r12 - ldrb r3, [r3, #0x5] - ldrb r2, [r2, #0x5] - cmp r2, r3 - movcc r0, #0x1 - ldmccia sp!, {r3-r5,pc} -_020E8E3C: ; 0x020E8E3C - cmp r3, r2 - movcc r0, #0x0 - ldmccia sp!, {r3-r5,pc} -_020E8E48: ; 0x020E8E48 - add r12, r12, #0x1 - cmp r12, lr - blt _020E8E20 -_020E8E54: - cmp lr, r5 - bne _020E8E88 - cmp r12, r4 - bge _020E8E88 -_020E8E64: - add r0, r1, r12 - ldrb r0, [r0, #0x5] - cmp r0, #0x0 - movne r0, #0x1 - ldmneia sp!, {r3-r5,pc} -_020E8E78: ; 0x020E8E78 - ldrb r0, [r1, #0x4] - add r12, r12, #0x1 - cmp r12, r0 - blt _020E8E64 -_020E8E88: - mov r0, #0x0 - ldmia sp!, {r3-r5,pc} -_020E8E90: - movlt r0, #0x1 - movge r0, #0x0 - ldmia sp!, {r3-r5,pc} - - arm_func_start __minus_dec -__minus_dec: ; 0x020E8E9C - stmdb sp!, {r3-r7,lr} - mov r6, r0 - mov r5, #0x9 -_020E8EA8: - ldrh r4, [r1, #0x0] - ldrh r3, [r1, #0x2] - add r1, r1, #0x4 - subs r5, r5, #0x1 - strh r4, [r6, #0x0] - strh r3, [r6, #0x2] - add r6, r6, #0x4 - bne _020E8EA8 - ldrh r1, [r1, #0x0] - strh r1, [r6, #0x0] - ldrb r1, [r2, #0x5] - cmp r1, #0x0 - ldmeqia sp!, {r3-r7,pc} -_020E8EDC: ; 0x020E8EDC - ldrb r7, [r0, #0x4] - ldrb r3, [r2, #0x4] - ldrsh r4, [r0, #0x2] - mov r1, r7 - cmp r7, r3 - movlt r1, r3 - ldrsh r3, [r2, #0x2] - sub r6, r4, r3 - add r1, r1, r6 - cmp r1, #0x20 - movgt r1, #0x20 - cmp r7, r1 - bge _020E8F34 - mov r4, #0x0 -_020E8F14: - ldrb r5, [r0, #0x4] - add r3, r0, r7 - add r5, r5, #0x1 - strb r5, [r0, #0x4] - strb r4, [r3, #0x5] - ldrb r7, [r0, #0x4] - cmp r7, r1 - blt _020E8F14 -_020E8F34: - ldrb r4, [r2, #0x4] - add r3, r0, #0x5 - add r12, r3, r1 - add r4, r4, r6 - cmp r4, r1 - addlt r12, r3, r4 - sub r4, r12, r3 - add r1, r2, #0x5 - sub r4, r4, r6 - add lr, r1, r4 - mov r4, lr - b _020E8FC8 -_020E8F64: - ldrb r7, [r12, #-0x1]! - ldrb r5, [lr, #-0x1]! - cmp r7, r5 - bhs _020E8FB8 - ldrb r7, [r12, #-0x1] - sub r5, r12, #0x1 - cmp r7, #0x0 - bne _020E8F90 -_020E8F84: - ldrb r7, [r5, #-0x1]! - cmp r7, #0x0 - beq _020E8F84 -_020E8F90: - cmp r5, r12 - beq _020E8FB8 -_020E8F98: - ldrb r7, [r5, #0x0] - sub r7, r7, #0x1 - strb r7, [r5, #0x0] - ldrb r7, [r5, #0x1]! - cmp r5, r12 - add r7, r7, #0xa - strb r7, [r5, #0x0] - bne _020E8F98 -_020E8FB8: - ldrb r7, [r12, #0x0] - ldrb r5, [lr, #0x0] - sub r5, r7, r5 - strb r5, [r12, #0x0] -_020E8FC8: - cmp r12, r3 - cmphi lr, r1 - bhi _020E8F64 - ldrb r5, [r2, #0x4] - sub lr, r4, r1 - cmp lr, r5 - bge _020E90A4 - ldrb r1, [r4, #0x0] - mov r7, #0x0 - cmp r1, #0x5 - movcc r7, #0x1 - blo _020E9040 - bne _020E9040 - add r1, r2, #0x5 - add r2, r1, r5 - add r4, r4, #0x1 - cmp r4, r2 - bhs _020E9028 -_020E9010: - ldrb r1, [r4, #0x0] - cmp r1, #0x0 - bne _020E90A4 - add r4, r4, #0x1 - cmp r4, r2 - blo _020E9010 -_020E9028: - add r1, r3, lr - add r2, r1, r6 - ldrb r1, [r2, #-0x1] - sub r12, r2, #0x1 - tst r1, #0x1 - movne r7, #0x1 -_020E9040: - cmp r7, #0x0 - beq _020E90A4 - ldrb r1, [r12, #0x0] - cmp r1, #0x1 - bhs _020E9098 - ldrb r1, [r12, #-0x1] - sub r2, r12, #0x1 - cmp r1, #0x0 - bne _020E9070 -_020E9064: - ldrb r1, [r2, #-0x1]! - cmp r1, #0x0 - beq _020E9064 -_020E9070: - cmp r2, r12 - beq _020E9098 -_020E9078: - ldrb r1, [r2, #0x0] - sub r1, r1, #0x1 - strb r1, [r2, #0x0] - ldrb r1, [r2, #0x1]! - cmp r2, r12 - add r1, r1, #0xa - strb r1, [r2, #0x0] - bne _020E9078 -_020E9098: - ldrb r1, [r12, #0x0] - sub r1, r1, #0x1 - strb r1, [r12, #0x0] -_020E90A4: - ldrb r1, [r3, #0x0] - mov r5, r3 - cmp r1, #0x0 - bne _020E90C0 -_020E90B4: - ldrb r1, [r5, #0x1]! - cmp r1, #0x0 - beq _020E90B4 -_020E90C0: - cmp r5, r3 - bls _020E9108 - ldrsh r1, [r0, #0x2] - sub r2, r5, r3 - and r4, r2, #0xff - sub r1, r1, r4 - strh r1, [r0, #0x2] - ldrb r1, [r0, #0x4] - add r2, r3, r1 - cmp r5, r2 - bhs _020E90FC -_020E90EC: - ldrb r1, [r5], #0x1 - cmp r5, r2 - strb r1, [r3], #0x1 - blo _020E90EC -_020E90FC: - ldrb r1, [r0, #0x4] - sub r1, r1, r4 - strb r1, [r0, #0x4] -_020E9108: - ldrb r1, [r0, #0x4] - add r2, r0, #0x5 - add r3, r2, r1 - cmp r3, r2 - bls _020E9130 -_020E911C: - ldrb r1, [r3, #-0x1]! - cmp r1, #0x0 - bne _020E9130 - cmp r3, r2 - bhi _020E911C -_020E9130: - sub r1, r3, r2 - add r1, r1, #0x1 - strb r1, [r0, #0x4] - ldmia sp!, {r3-r7,pc} - - arm_func_start __num2dec_internal -__num2dec_internal: - stmdb sp!, {r4-r8,lr} - sub sp, sp, #0x58 - mov r8, r1 - mov r6, r2 - mov r7, r0 - mov r0, r8 - mov r1, r6 - bl __signbitf -_020E9160: ; 0x020E9160 - cmp r0, #0x0 - movne r1, #0x1 - moveq r1, #0x0 - mov r4, r1, lsl #0x18 - mov r0, #0x0 - mov r1, r0 - mov r2, r8 - mov r3, r6 - mov r5, r4, asr #0x18 - bl _deq - bne _020E91AC - strb r5, [r7, #0x0] - mov r1, #0x0 - strh r1, [r7, #0x2] - mov r0, #0x1 - strb r0, [r7, #0x4] - add sp, sp, #0x58 - strb r1, [r7, #0x5] - ldmia sp!, {r4-r8,pc} -_020E91AC: - mov r0, r8 - mov r1, r6 - bl __fpclassifyf - cmp r0, #0x2 - bgt _020E91F8 - strb r5, [r7, #0x0] - mov r2, #0x0 - strh r2, [r7, #0x2] - mov r2, #0x1 - mov r0, r8 - mov r1, r6 - strb r2, [r7, #0x4] - bl __fpclassifyf - cmp r0, #0x1 - moveq r0, #0x4e - movne r0, #0x49 - add sp, sp, #0x58 - strb r0, [r7, #0x5] - ldmia sp!, {r4-r8,pc} -_020E91F8: - cmp r5, #0x0 - beq _020E921C - mov r0, #0x0 - mov r1, r0 - mov r2, r8 - mov r3, r6 - bl _dsub - mov r8, r0 - mov r6, r1 -_020E921C: - add r2, sp, #0x8 - mov r0, r8 - mov r1, r6 - bl frexp - mov r4, r0 - mov r6, r1 - orr r12, r4, #0x0 - rsbs r2, r12, #0x0 - orr r3, r6, #0x100000 - rsc r1, r3, #0x0 - mov r0, #0x0 - and r3, r3, r1 - sub r1, r0, #0x1 - and r12, r12, r2 - mov r2, r1 - adds r0, r12, r1 - adc r1, r3, r2 - str r4, [sp, #0x0] - str r6, [sp, #0x4] - bl __msl_generic_count_bits64 - rsb r8, r0, #0x35 - ldr r1, [sp, #0x8] - add r0, sp, #0xc - sub r1, r1, r8 - bl __two_exp - mov r0, r4 - mov r1, r6 - mov r2, r8 - bl ldexp - bl _ll_ufrom_d - mov r2, r1 - mov r1, r0 - add r0, sp, #0x32 - bl __ull2dec - mov r0, r7 - add r1, sp, #0x32 - add r2, sp, #0xc - bl __timesdec - strb r5, [r7, #0x0] - add sp, sp, #0x58 - ldmia sp!, {r4-r8,pc} - - arm_func_start __num2dec_internal2 -__num2dec_internal2: ; 0x020E92C0 - stmdb sp!, {r3-r5,lr} - mov r4, r3 - ldrsh r5, [r0, #0x2] - mov r0, r4 - bl __num2dec_internal - ldrb r0, [r4, #0x5] - cmp r0, #0x9 - ldmhiia sp!, {r3-r5,pc} -_020E92E0: ; 0x020E92E0 - cmp r5, #0x20 - movgt r5, #0x20 - mov r0, r4 - mov r1, r5 - bl __rounddec - ldrb r0, [r4, #0x4] - cmp r0, r5 - bge _020E9324 - mov r1, #0x0 -_020E9304: - ldrb r2, [r4, #0x4] - add r0, r4, r0 - add r2, r2, #0x1 - strb r2, [r4, #0x4] - strb r1, [r0, #0x5] - ldrb r0, [r4, #0x4] - cmp r0, r5 - blt _020E9304 -_020E9324: - ldrsh r1, [r4, #0x2] - sub r0, r0, #0x1 - mov r2, #0x0 - sub r0, r1, r0 - strh r0, [r4, #0x2] - ldrb r0, [r4, #0x4] - cmp r0, #0x0 - ldmleia sp!, {r3-r5,pc} -_020E9344: - add r1, r4, r2 - ldrb r0, [r1, #0x5] - add r2, r2, #0x1 - add r0, r0, #0x30 - strb r0, [r1, #0x5] - ldrb r0, [r4, #0x4] - cmp r2, r0 - blt _020E9344 - ldmia sp!, {r3-r5,pc} - - arm_func_start __dec2num -__dec2num: ; 0x020E9368 - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0xfc - mov r4, r0 - ldrb r0, [r4, #0x4] - cmp r0, #0x0 - bne _020E93A8 - ldrsb r0, [r4, #0x0] - mov r2, #0x0 - cmp r0, #0x0 - ldreq r3, _020E996C ; =0x3FF00000 - mov r0, #0x0 - ldrne r3, _020E9970 ; =0xBFF00000 - mov r1, r0 - bl copysign - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} -_020E93A8: - ldrb r0, [r4, #0x5] - cmp r0, #0x30 - beq _020E93C8 - cmp r0, #0x49 - beq _020E93F0 - cmp r0, #0x4e - beq _020E9424 - b _020E946C -_020E93C8: - ldrsb r0, [r4, #0x0] - mov r2, #0x0 - cmp r0, #0x0 - ldreq r3, _020E996C ; =0x3FF00000 - mov r0, #0x0 - ldrne r3, _020E9970 ; =0xBFF00000 - mov r1, r0 - bl copysign - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} -_020E93F0: - ldrsb r0, [r4, #0x0] - mov r5, #0x0 - cmp r0, #0x0 - ldreq r4, _020E996C ; =0x3FF00000 - ldr r0, _020E9974 ; =0x02106B74 - ldrne r4, _020E9970 ; =0xBFF00000 - ldr r0, [r0, #0x0] - bl _f2d - mov r2, r5 - mov r3, r4 - bl copysign - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} -_020E9424: - ldr r1, _020E9978 ; =0x7FF00000 - add r3, sp, #0x10 - mov r2, #0x0 - str r2, [r3, #0x0] - str r1, [r3, #0x4] - ldrsb r0, [r4, #0x0] - cmp r0, #0x0 - beq _020E9454 - orr r0, r1, #0x80000000 - orr r1, r2, r2 - str r1, [r3, #0x0] - str r0, [r3, #0x4] -_020E9454: - ldmia r3, {r0-r1} - orr r0, r0, #0x0 - orr r1, r1, #0x80000 - stmia r3, {r0-r1} - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} -_020E946C: - add r3, sp, #0xd6 - mov r5, r4 - mov r2, #0x9 -_020E9478: - ldrh r1, [r5, #0x0] - ldrh r0, [r5, #0x2] - add r5, r5, #0x4 - subs r2, r2, #0x1 - strh r1, [r3, #0x0] - strh r0, [r3, #0x2] - add r3, r3, #0x4 - bne _020E9478 - ldrh r0, [r5, #0x0] - add r1, sp, #0xdb - strh r0, [r3, #0x0] - ldrb r0, [sp, #0xda] - add r5, r1, r0 - cmp r1, r5 - bhs _020E94C8 -_020E94B4: - ldrb r0, [r1, #0x0] - sub r0, r0, #0x30 - strb r0, [r1], #0x1 - cmp r1, r5 - blo _020E94B4 -_020E94C8: - ldrb r1, [sp, #0xda] - ldrsh r2, [sp, #0xd8] - add r0, sp, #0xb0 - sub r1, r1, #0x1 - add r1, r2, r1 - strh r1, [sp, #0xd8] - ldr r1, _020E997C ; =0x02106F5C - mov r2, #0x134 - ldrsh r11, [sp, #0xd8] - bl __str2dec - add r0, sp, #0xb0 - add r1, sp, #0xd6 - bl __less_dec -_020E94FC: ; 0x020E94FC - cmp r0, #0x0 - beq _020E9538 - ldrsb r0, [r4, #0x0] - mov r5, #0x0 - cmp r0, #0x0 - ldreq r4, _020E996C ; =0x3FF00000 - ldr r0, _020E9974 ; =0x02106B74 - ldrne r4, _020E9970 ; =0xBFF00000 - ldr r0, [r0, #0x0] - bl _f2d - mov r2, r5 - mov r3, r4 - bl copysign - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} -_020E9538: - add r1, sp, #0xdb - ldrb r0, [r1, #0x0] - add r8, r1, #0x1 - bl _dfltu - str r0, [sp, #0x8] - str r1, [sp, #0xc] - cmp r8, r5 - bhs _020E9610 -_020E9558: - sub r0, r5, r8 - mov r1, r0, lsr #0x1f - rsb r0, r1, r0, lsl #0x1d - adds r7, r1, r0, ror #0x1d - moveq r7, #0x8 - mov r6, #0x0 - mov r2, #0x0 - cmp r7, #0x0 - ble _020E9594 - mov r0, #0xa -_020E9580: - ldrb r1, [r8], #0x1 - add r2, r2, #0x1 - cmp r2, r7 - mla r6, r0, r6, r1 - blt _020E9580 -_020E9594: - ldr r0, _020E9980 ; =0x02106E48 - ldr r1, [sp, #0xc] - add r3, r0, r7, lsl #0x3 - ldr r2, [r3, #-0x8] - ldr r0, [sp, #0x8] - ldr r3, [r3, #-0x4] - bl _dmul - mov r4, r0 - mov r9, r1 - mov r0, r6 - bl _dfltu - mov r2, r0 - mov r3, r1 - mov r0, r4 - mov r1, r9 - bl _dadd -_020E95D4: ; 0x020E95D4 - cmp r6, #0x0 - mov r6, r0 - mov r10, r1 - beq _020E95FC - mov r0, r4 - mov r1, r9 - mov r2, r6 - mov r3, r10 - bl _deq - beq _020E9610 -_020E95FC: - str r6, [sp, #0x8] - str r10, [sp, #0xc] - cmp r8, r5 - sub r11, r11, r7 - blo _020E9558 -_020E9610: - cmp r11, #0x0 - bge _020E9654 - rsb r0, r11, #0x0 - bl _dflt - mov r3, r1 - mov r2, r0 - ldr r1, _020E9984 ; =0x40140000 - mov r0, #0x0 - bl pow - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - bl _ddiv - str r0, [sp, #0x8] - str r1, [sp, #0xc] - b _020E968C -_020E9654: - mov r0, r11 - bl _dflt - mov r3, r1 - mov r2, r0 - ldr r1, _020E9984 ; =0x40140000 - mov r0, #0x0 - bl pow - mov r2, r0 - mov r3, r1 - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - bl _dmul - str r0, [sp, #0x8] - str r1, [sp, #0xc] -_020E968C: - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - mov r2, r11 - bl ldexp - str r0, [sp, #0x8] - str r1, [sp, #0xc] - bl __fpclassifyf - cmp r0, #0x2 - bne _020E96C0 - ldr r0, _020E9988 ; =0x7FEFFFFF - mvn r1, #0x0 - str r1, [sp, #0x8] - str r0, [sp, #0xc] -_020E96C0: - ldr r1, [sp, #0x8] - ldr r2, [sp, #0xc] - add r0, sp, #0x8a - add r4, sp, #0x0 - mov r5, #0x0 - bl __num2dec_internal - add r0, sp, #0x8a - add r1, sp, #0xd6 - bl __equals_dec -_020E96E4: ; 0x020E96E4 - cmp r0, #0x0 - bne _020E9934 - add r0, sp, #0x8a - add r1, sp, #0xd6 - bl __less_dec -_020E96F8: ; 0x020E96F8 - cmp r0, #0x0 - movne r5, #0x1 - ldr r1, [sp, #0x8] - ldr r0, [sp, #0xc] - cmp r5, #0x0 - moveq r6, #0x1 - str r1, [sp, #0x0] - str r0, [sp, #0x4] - movne r6, #0x0 -_020E971C: - cmp r6, #0x0 - bne _020E9744 - ldmia r4, {r0-r1} - adds r0, r0, #0x1 - adc r1, r1, #0x0 - stmia r4, {r0-r1} - bl __fpclassifyf - cmp r0, #0x2 - beq _020E9934 - b _020E975C -_020E9744: - ldr r1, [r4, #0x0] - ldr r0, [r4, #0x4] - subs r1, r1, #0x1 - sbc r0, r0, #0x0 - str r1, [r4, #0x0] - str r0, [r4, #0x4] -_020E975C: - ldr r1, [sp, #0x0] - ldr r2, [sp, #0x4] - add r0, sp, #0x64 - bl __num2dec_internal -_020E976C: ; 0x020E976C - cmp r5, #0x0 - beq _020E9788 - add r0, sp, #0x64 - add r1, sp, #0xd6 - bl __less_dec -_020E9780: ; 0x020E9780 - cmp r0, #0x0 - beq _020E98AC -_020E9788: - cmp r5, #0x0 - bne _020E9864 - add r0, sp, #0xd6 - add r1, sp, #0x64 - bl __less_dec -_020E979C: ; 0x020E979C - cmp r0, #0x0 - bne _020E9864 - add r3, sp, #0x8a - add r5, sp, #0x3e - mov r2, #0x9 -_020E97B0: - ldrh r1, [r3, #0x0] - ldrh r0, [r3, #0x2] - add r3, r3, #0x4 - strh r1, [r5, #0x0] - strh r0, [r5, #0x2] - add r5, r5, #0x4 - subs r2, r2, #0x1 - bne _020E97B0 - ldrh r0, [r3, #0x0] - add r3, sp, #0x64 - add r4, sp, #0x8a - strh r0, [r5, #0x0] - mov r2, #0x9 -_020E97E4: - ldrh r1, [r3, #0x0] - ldrh r0, [r3, #0x2] - add r3, r3, #0x4 - strh r1, [r4, #0x0] - strh r0, [r4, #0x2] - add r4, r4, #0x4 - subs r2, r2, #0x1 - bne _020E97E4 - ldrh r0, [r3, #0x0] - add r3, sp, #0x3e - add r5, sp, #0x64 - strh r0, [r4, #0x0] - mov r2, #0x9 -_020E9818: - ldrh r1, [r3, #0x0] - ldrh r0, [r3, #0x2] - add r3, r3, #0x4 - strh r1, [r5, #0x0] - strh r0, [r5, #0x2] - add r5, r5, #0x4 - subs r2, r2, #0x1 - bne _020E9818 - ldrh r4, [r3, #0x0] - ldr r3, [sp, #0x8] - ldr r1, [sp, #0x0] - ldr r2, [sp, #0xc] - ldr r0, [sp, #0x4] - strh r4, [r5, #0x0] - str r1, [sp, #0x8] - str r0, [sp, #0xc] - str r3, [sp, #0x0] - str r2, [sp, #0x4] - b _020E98AC -_020E9864: - add r7, sp, #0x64 - add r3, sp, #0x8a - mov r2, #0x9 -_020E9870: - ldrh r1, [r7, #0x0] - ldrh r0, [r7, #0x2] - add r7, r7, #0x4 - strh r1, [r3, #0x0] - strh r0, [r3, #0x2] - add r3, r3, #0x4 - subs r2, r2, #0x1 - bne _020E9870 - ldrh r2, [r7, #0x0] - ldr r1, [sp, #0x0] - ldr r0, [sp, #0x4] - strh r2, [r3, #0x0] - str r1, [sp, #0x8] - str r0, [sp, #0xc] - b _020E971C -_020E98AC: - add r0, sp, #0x3e - add r1, sp, #0xd6 - add r2, sp, #0x8a - bl __minus_dec - add r0, sp, #0x18 - add r1, sp, #0x64 - add r2, sp, #0xd6 - bl __minus_dec - add r0, sp, #0x3e - add r1, sp, #0x18 - bl __equals_dec -_020E98D8: ; 0x020E98D8 - cmp r0, #0x0 - beq _020E9910 - ldr r1, [sp, #0x8] - ldr r0, [sp, #0xc] - and r1, r1, #0x1 - and r0, r0, #0x0 - cmp r0, #0x0 - cmpeq r1, #0x0 - beq _020E9934 - ldr r1, [sp, #0x0] - ldr r0, [sp, #0x4] - str r1, [sp, #0x8] - str r0, [sp, #0xc] - b _020E9934 -_020E9910: - add r0, sp, #0x3e - add r1, sp, #0x18 - bl __less_dec -_020E991C: ; 0x020E991C - cmp r0, #0x0 - bne _020E9934 - ldr r1, [sp, #0x0] - ldr r0, [sp, #0x4] - str r1, [sp, #0x8] - str r0, [sp, #0xc] -_020E9934: - ldrsb r0, [sp, #0xd6] - cmp r0, #0x0 - beq _020E995C - mov r0, #0x0 - ldr r2, [sp, #0x8] - ldr r3, [sp, #0xc] - mov r1, r0 - bl _dsub - str r0, [sp, #0x8] - str r1, [sp, #0xc] -_020E995C: - ldr r0, [sp, #0x8] - ldr r1, [sp, #0xc] - add sp, sp, #0xfc - ldmia sp!, {r4-r11,pc} - .balign 4 -_020E996C: .word 0x3FF00000 -_020E9970: .word 0xBFF00000 -_020E9974: .word 0x02106B74 -_020E9978: .word 0x7FF00000 -_020E997C: .word 0x02106F5C -_020E9980: .word 0x02106E48 -_020E9984: .word 0x40140000 -_020E9988: .word 0x7FEFFFFF - - arm_func_start __msl_generic_count_bits64 -__msl_generic_count_bits64: ; 0x020E998C - mov r3, r0, lsr #0x1 - ldr r2, _020E9A14 ; =0x55555555 - orr r3, r3, r1, lsl #0x1f - and r3, r3, r2 - subs r12, r0, r3 - and r2, r2, r1, lsr #0x1 - ldr r0, _020E9A18 ; =0x33333333 - sbc r3, r1, r2 - mov r1, r12, lsr #0x2 - orr r1, r1, r3, lsl #0x1e - and r2, r12, r0 - and r1, r1, r0 - adds r2, r2, r1 - and r1, r3, r0 - and r0, r0, r3, lsr #0x2 - adc r1, r1, r0 - mov r0, r2, lsr #0x4 - orr r0, r0, r1, lsl #0x1c - adds r2, r2, r0 - ldr r0, _020E9A1C ; =0x0F0F0F0F - adc r1, r1, r1, lsr #0x4 - and r3, r2, r0 - and r2, r1, r0 - mov r0, r3, lsr #0x8 - orr r0, r0, r2, lsl #0x18 - adds r1, r3, r0 - adc r2, r2, r2, lsr #0x8 - mov r0, r1, lsr #0x10 - orr r0, r0, r2, lsl #0x10 - adds r1, r1, r0 - adc r0, r2, r2, lsr #0x10 - adds r0, r1, r0 - and r0, r0, #0xff - bx lr - .balign 4 -_020E9A14: .word 0x55555555 -_020E9A18: .word 0x33333333 -_020E9A1C: .word 0x0F0F0F0F - - arm_func_start __signbitf -__signbitf: - stmdb sp!, {r0-r3} - ldr r0, [sp, #0x4] - and r0, r0, #0x80000000 - add sp, sp, #0x10 - bx lr - - arm_func_start __fpclassifyf -__fpclassifyf: ; 0x020E9A34 - stmdb sp!, {r0-r3} - ldr r2, [sp, #0x4] - ldr r0, _020E9A9C ; =0x7FF00000 - ands r1, r2, r0 - beq _020E9A70 - cmp r1, r0 - bne _020E9A90 - ldr r0, _020E9AA0 ; =0x000FFFFF - tst r2, r0 - ldreq r0, [sp, #0x0] - add sp, sp, #0x10 - cmpeq r0, #0x0 - movne r0, #0x1 - moveq r0, #0x2 - bx lr -_020E9A70: - ldr r0, _020E9AA0 ; =0x000FFFFF - tst r2, r0 - ldreq r0, [sp, #0x0] - add sp, sp, #0x10 - cmpeq r0, #0x0 - movne r0, #0x5 - moveq r0, #0x3 - bx lr -_020E9A90: - mov r0, #0x4 - add sp, sp, #0x10 - bx lr - .balign 4 -_020E9A9C: .word 0x7FF00000 -_020E9AA0: .word 0x000FFFFF - - arm_func_start scalbn -scalbn: ; 0x020E9AA4 - stmdb sp!, {r3-r4,lr} - sub sp, sp, #0x4 - mov r4, r2 - add r2, sp, #0x0 - bl frexp - ldr r2, [sp, #0x0] - add r2, r2, r4 - str r2, [sp, #0x0] - bl ldexp - add sp, sp, #0x4 - ldmia sp!, {r3-r4,pc} - - arm_func_start stricmp -stricmp: ; 0x020E9AD0 - stmdb sp!, {r3,lr} - ldr r3, _020E9B34 ; =0x0210420C -_020E9AD8: - ldrb r2, [r0], #0x1 - cmp r2, #0x0 - blt _020E9AF0 - cmp r2, #0x80 - bge _020E9AF0 - ldrb r2, [r3, r2] -_020E9AF0: - ldrb lr, [r1], #0x1 - and r12, r2, #0xff - cmp lr, #0x0 - blt _020E9B0C - cmp lr, #0x80 - bge _020E9B0C - ldrb lr, [r3, lr] -_020E9B0C: - and r2, lr, #0xff - cmp r12, r2 - mvncc r0, #0x0 - ldmccia sp!, {r3,pc} -_020E9B1C: ; 0x020E9B1C - movhi r0, #0x1 - ldmhiia sp!, {r3,pc} -_020E9B24: ; 0x020E9B24 - cmp r12, #0x0 - bne _020E9AD8 - mov r0, #0x0 - ldmia sp!, {r3,pc} - .balign 4 -_020E9B34: .word 0x0210420C - - arm_func_start strnicmp -strnicmp: ; 0x020E9B38 - ldr ip, _020E9B40 ; =stricmp - bx r12 - .balign 4 -_020E9B40: .word stricmp - - arm_func_start _dadd -_dadd: - stmdb sp!, {r4,lr} - eors r12, r1, r3 - eormi r3, r3, #0x80000000 - bmi _020EA5DC -_020E9B54: - subs r12, r0, r2 - sbcs lr, r1, r3 - bhs _020E9B70 - adds r2, r2, r12 - adc r3, r3, lr - subs r0, r0, r12 - sbc r1, r1, lr -_020E9B70: - mov lr, #0x80000000 - mov r12, r1, lsr #0x14 - orr r1, lr, r1, lsl #0xb - orr r1, r1, r0, lsr #0x15 - mov r0, r0, lsl #0xb - movs r4, r12, lsl #0x15 - cmnne r4, #0x200000 - beq _020E9C6C - mov r4, r3, lsr #0x14 - orr r3, lr, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs lr, r4, lsl #0x15 - beq _020E9CB4 -_020E9BA8: - subs r4, r12, r4 - beq _020E9C00 - cmp r4, #0x20 - ble _020E9BE4 - cmp r4, #0x38 - movge r4, #0x3f - sub r4, r4, #0x20 - rsb lr, r4, #0x20 - orrs lr, r2, r3, lsl lr - mov r2, r3, lsr r4 - orrne r2, r2, #0x1 - adds r0, r0, r2 - adcs r1, r1, #0x0 - blo _020E9C28 - b _020E9C0C -_020E9BE4: - rsb lr, r4, #0x20 - movs lr, r2, lsl lr - rsb lr, r4, #0x20 - mov r2, r2, lsr r4 - orr r2, r2, r3, lsl lr - mov r3, r3, lsr r4 - orrne r2, r2, #0x1 -_020E9C00: - adds r0, r0, r2 - adcs r1, r1, r3 - blo _020E9C28 -_020E9C0C: - add r12, r12, #0x1 - and r4, r0, #0x1 - movs r1, r1, rrx - orr r0, r4, r0, rrx - mov lr, r12, lsl #0x15 - cmn lr, #0x200000 - beq _020E9E38 -_020E9C28: - movs r2, r0, lsl #0x15 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - mov r1, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - tst r2, #0x80000000 - ldmeqia sp!, {r4,lr} - bxeq lr - movs r2, r2, lsl #0x1 - andeqs r2, r0, #0x1 - ldmeqia sp!, {r4,lr} - bxeq lr - adds r0, r0, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4,lr} - bx lr -_020E9C6C: - cmp r12, #0x800 - movge lr, #0x80000000 - movlt lr, #0x0 - bics r12, r12, #0x800 - beq _020E9CD8 - orrs r4, r0, r1, lsl #0x1 - bne _020E9E14 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r4, r4, lsl #0x15 - beq _020E9E00 - cmn r4, #0x200000 - bne _020E9E00 - orrs r4, r2, r3, lsl #0x1 - beq _020E9E00 - b _020E9E14 -_020E9CB4: - cmp r4, #0x800 - movge lr, #0x80000000 - movlt lr, #0x0 - bic r12, r12, #0x800 - bics r4, r4, #0x800 - beq _020E9D44 - orrs r4, r2, r3, lsl #0x1 - bne _020E9E14 - b _020E9E00 -_020E9CD8: - orrs r4, r0, r1, lsl #0x1 - beq _020E9D18 - mov r12, #0x1 - bic r1, r1, #0x80000000 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r4, r4, lsl #0x15 - cmnne r4, #0x200000 - mov r4, r4, lsr #0x15 - orr r4, r4, lr, lsr #0x14 - beq _020E9CB4 - orr r3, r3, #0x80000000 - orr r12, r12, lr, lsr #0x14 - b _020E9BA8 -_020E9D18: - mov r12, r3, lsr #0x14 - mov r1, r3, lsl #0xb - orr r1, r1, r2, lsr #0x15 - mov r0, r2, lsl #0xb - movs r4, r12, lsl #0x15 - beq _020E9DCC - cmn r4, #0x200000 - bne _020E9DCC - orrs r4, r0, r1, lsl #0x1 - beq _020E9E00 - b _020E9E18 -_020E9D44: - orrs r4, r2, r3, lsl #0x1 - beq _020E9DDC - mov r4, #0x1 - bic r3, r3, #0x80000000 - cmp r1, #0x0 - bpl _020E9D68 - orr r12, r12, lr, lsr #0x14 - orr r4, r4, lr, lsr #0x14 - b _020E9BA8 -_020E9D68: - adds r0, r0, r2 - adcs r1, r1, r3 - blo _020E9D88 - add r12, r12, #0x1 - and r4, r0, #0x1 - movs r1, r1, rrx - mov r0, r0, rrx - orr r0, r0, r4 -_020E9D88: - cmp r1, #0x0 - subges r12, r12, #0x1 - movs r2, r0, lsl #0x15 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, lr, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - ldmeqia sp!, {r4,lr} - bxeq lr - tst r2, #0x80000000 - ldmeqia sp!, {r4,lr} - bxeq lr - movs r2, r2, lsl #0x1 - andeqs r2, r0, #0x1 - ldmeqia sp!, {r4,lr} - bxeq lr -_020E9DCC: - mov r1, r3 - mov r0, r2 - ldmia sp!, {r4,lr} - bx lr -_020E9DDC: - cmp r1, #0x0 - subges r12, r12, #0x1 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, lr, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - ldmia sp!, {r4,lr} - bx lr -_020E9E00: - ldr r1, _020E9E58 ; =0x7FF00000 - orr r1, lr, r1 - mov r0, #0x0 - ldmia sp!, {r4,lr} - bx lr -_020E9E14: - mov r1, r3 -_020E9E18: - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4,lr} - bx lr -_020E9E28: ; 0x020E9E28 - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4,lr} - bx lr -_020E9E38: - cmp r12, #0x800 - movge lr, #0x80000000 - movlt lr, #0x0 - ldr r1, _020E9E58 ; =0x7FF00000 - orr r1, lr, r1 - mov r0, #0x0 - ldmia sp!, {r4,lr} - bx lr - .balign 4 -_020E9E58: .word 0x7FF00000 - - arm_func_start _d2f -_d2f: - and r2, r1, #0x80000000 - mov r12, r1, lsr #0x14 - bics r12, r12, #0x800 - beq _020E9ED4 - mov r3, r12, lsl #0x15 - cmn r3, #0x200000 - bhs _020E9EB8 - subs r12, r12, #0x380 - bls _020E9EE4 - cmp r12, #0xff - bge _020E9F54 - mov r1, r1, lsl #0xc - orr r3, r2, r1, lsr #0x9 - orr r3, r3, r0, lsr #0x1d - movs r1, r0, lsl #0x3 - orr r0, r3, r12, lsl #0x17 - bxeq lr - tst r1, #0x80000000 - bxeq lr - movs r1, r1, lsl #0x1 - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020E9EB8: - orrs r3, r0, r1, lsl #0xc - bne _020E9ECC - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020E9ECC: - mvn r0, #0x80000000 - bx lr -_020E9ED4: - orrs r3, r0, r1, lsl #0xc - bne _020E9F4C - mov r0, r2 - bx lr -_020E9EE4: - cmn r12, #0x17 - beq _020E9F38 - bmi _020E9F4C - mov r1, r1, lsl #0xb - orr r1, r1, #0x80000000 - mov r3, r1, lsr #0x8 - orr r3, r3, r0, lsr #0x1d - rsb r12, r12, #0x1 - movs r1, r0, lsl #0x3 - orr r0, r2, r3, lsr r12 - rsb r12, r12, #0x20 - mov r3, r3, lsl r12 - orrne r3, r3, #0x1 - movs r1, r3 - bxeq lr - tst r1, #0x80000000 - bxeq lr - movs r1, r1, lsl #0x1 - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020E9F38: - orr r0, r0, r1, lsl #0xc - movs r1, r0 - mov r0, r2 - addne r0, r0, #0x1 - bx lr -_020E9F4C: - mov r0, r2 - bx lr -_020E9F54: - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr - - arm_func_start _dfix -_dfix: ; 0x020E9F60 - bic r3, r1, #0x80000000 - ldr r2, _020E9FA8 ; =0x0000041E - subs r2, r2, r3, lsr #0x14 - ble _020E9F9C - cmp r2, #0x20 - bge _020E9F94 - mov r3, r1, lsl #0xb - orr r3, r3, #0x80000000 - orr r3, r3, r0, lsr #0x15 - cmp r1, #0x0 - mov r0, r3, lsr r2 - rsbmi r0, r0, #0x0 - bx lr -_020E9F94: - mov r0, #0x0 - bx lr -_020E9F9C: - mvn r0, r1, asr #0x1f - add r0, r0, #0x80000000 - bx lr - .balign 4 -_020E9FA8: .word 0x0000041E - - arm_func_start _ll_ufrom_d -_ll_ufrom_d: ; 0x020E9FAC - tst r1, #0x80000000 - bne _020EA010 - ldr r2, _020EA034 ; =0x0000043E - subs r2, r2, r1, lsr #0x14 - blt _020EA028 - cmp r2, #0x40 - bge _020EA004 - mov r12, r1, lsl #0xb - orr r12, r12, #0x80000000 - orr r12, r12, r0, lsr #0x15 - cmp r2, #0x20 - ble _020E9FEC - sub r2, r2, #0x20 - mov r1, #0x0 - mov r0, r12, lsr r2 - bx lr -_020E9FEC: - mov r3, r0, lsl #0xb - mov r1, r12, lsr r2 - mov r0, r3, lsr r2 - rsb r2, r2, #0x20 - orr r0, r0, r12, lsl r2 - bx lr -_020EA004: - mov r1, #0x0 - mov r0, #0x0 - bx lr -_020EA010: - cmn r1, #0x100000 - cmpeq r0, #0x0 - bhi _020EA028 - mov r1, #0x0 - mov r0, #0x0 - bx lr -_020EA028: - mvn r1, #0x0 - mvn r0, #0x0 - bx lr - .balign 4 -_020EA034: .word 0x0000043E - - arm_func_start _dflt -_dflt: ; 0x020EA038 - ands r2, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r0, #0x0 - mov r1, #0x0 - bxeq lr - mov r3, #0x400 - add r3, r3, #0x1e - clz r12, r0 - movs r0, r0, lsl r12 - sub r3, r3, r12 - movs r1, r0 - mov r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, r2, r1, lsr #0xc - orr r1, r1, r3, lsl #0x14 - bx lr - - arm_func_start _dfltu -_dfltu: ; 0x020EA078 - cmp r0, #0x0 - mov r1, #0x0 - bxeq lr - mov r3, #0x400 - add r3, r3, #0x1e - bmi _020EA09C - clz r12, r0 - movs r0, r0, lsl r12 - sub r3, r3, r12 -_020EA09C: - mov r1, r0 - mov r0, r1, lsl #0x15 - add r1, r1, r1 - mov r1, r1, lsr #0xc - orr r1, r1, r3, lsl #0x14 - bx lr - - arm_func_start _dmul -_dmul: ; 0x020EA0B4 - stmdb sp!, {r4-r7,lr} - eor lr, r1, r3 - and lr, lr, #0x80000000 - mov r12, r1, lsr #0x14 - mov r1, r1, lsl #0xb - orr r1, r1, r0, lsr #0x15 - mov r0, r0, lsl #0xb - movs r6, r12, lsl #0x15 - cmnne r6, #0x200000 - beq _020EA1BC - orr r1, r1, #0x80000000 - bic r12, r12, #0x800 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r5, r4, lsl #0x15 - cmnne r5, #0x200000 - beq _020EA204 - orr r3, r3, #0x80000000 - bic r4, r4, #0x800 -_020EA108: - add r12, r4, r12 - umull r5, r4, r0, r2 - umull r7, r6, r0, r3 - adds r4, r7, r4 - adc r6, r6, #0x0 - umull r7, r0, r1, r2 - adds r4, r7, r4 - adcs r0, r0, r6 - umull r7, r2, r1, r3 - adc r1, r2, #0x0 - adds r0, r0, r7 - adc r1, r1, #0x0 - orrs r4, r4, r5 - orrne r0, r0, #0x1 - cmp r1, #0x0 - blt _020EA154 - sub r12, r12, #0x1 - adds r0, r0, r0 - adc r1, r1, r1 -_020EA154: - add r12, r12, #0x2 - subs r12, r12, #0x400 - bmi _020EA2F0 - beq _020EA2F0 - mov r6, r12, lsl #0x14 - cmn r6, #0x100000 - bmi _020EA3F0 - movs r2, r0, lsl #0x15 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, lr, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - tst r2, #0x80000000 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - movs r2, r2, lsl #0x1 - andeqs r2, r0, #0x1 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - adds r0, r0, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA1BC: - bics r12, r12, #0x800 - beq _020EA218 - orrs r6, r0, r1, lsl #0x1 - bne _020EA3A4 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r5, r4, lsl #0x15 - beq _020EA1F8 - cmn r5, #0x200000 - bne _020EA390 - orrs r5, r2, r3, lsl #0x1 - beq _020EA390 - b _020EA3A4 -_020EA1F8: - orrs r5, r3, r2 - beq _020EA3B8 - b _020EA390 -_020EA204: - bics r4, r4, #0x800 - beq _020EA2AC - orrs r6, r2, r3, lsl #0x1 - bne _020EA3A4 - b _020EA390 -_020EA218: - orrs r6, r0, r1, lsl #0x1 - beq _020EA280 - mov r12, #0x1 - cmp r1, #0x0 - bne _020EA23C - sub r12, r12, #0x20 - movs r1, r0 - mov r0, #0x0 - bmi _020EA258 -_020EA23C: - clz r6, r1 - movs r1, r1, lsl r6 - rsb r6, r6, #0x20 - orr r1, r1, r0, lsr r6 - rsb r6, r6, #0x20 - mov r0, r0, lsl r6 - sub r12, r12, r6 -_020EA258: - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r5, r4, lsl #0x15 - cmnne r5, #0x200000 - beq _020EA204 - orr r3, r3, #0x80000000 - bic r4, r4, #0x800 - b _020EA108 -_020EA280: - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r5, r4, lsl #0x15 - beq _020EA404 - cmn r5, #0x200000 - bne _020EA404 - orrs r6, r2, r3, lsl #0x1 - beq _020EA3B8 - b _020EA3A4 -_020EA2AC: - orrs r5, r2, r3, lsl #0x1 - beq _020EA404 - mov r4, #0x1 - cmp r3, #0x0 - bne _020EA2D0 - sub r4, r4, #0x20 - movs r3, r2 - mov r2, #0x0 - bmi _020EA108 -_020EA2D0: - clz r6, r3 - movs r3, r3, lsl r6 - rsb r6, r6, #0x20 - orr r3, r3, r2, lsr r6 - rsb r6, r6, #0x20 - mov r2, r2, lsl r6 - sub r4, r4, r6 - b _020EA108 -_020EA2F0: - cmn r12, #0x34 - beq _020EA388 - bmi _020EA3E0 - mov r2, r1 - mov r3, r0 - add r4, r12, #0x34 - cmp r4, #0x20 - movge r2, r3 - movge r3, #0x0 - subge r4, r4, #0x20 - rsb r5, r4, #0x20 - mov r2, r2, lsl r4 - orr r2, r2, r3, lsr r5 - movs r3, r3, lsl r4 - orrne r2, r2, #0x1 - rsb r12, r12, #0xc - cmp r12, #0x20 - movge r0, r1 - movge r1, #0x0 - subge r12, r12, #0x20 - rsb r4, r12, #0x20 - mov r0, r0, lsr r12 - orr r0, r0, r1, lsl r4 - orr r1, lr, r1, lsr r12 - cmp r2, #0x0 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - tst r2, #0x80000000 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - movs r2, r2, lsl #0x1 - andeqs r2, r0, #0x1 - ldmeqia sp!, {r4-r7,lr} - bxeq lr - adds r0, r0, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA388: - orr r0, r0, r1, lsl #0x1 - b _020EA3C8 -_020EA390: - ldr r1, _020EA414 ; =0x7FF00000 - orr r1, lr, r1 - mov r0, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA3A4: - mov r1, r3 - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA3B8: - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA3C8: - movs r2, r0 - mov r1, lr - mov r0, #0x0 - addne r0, r0, #0x1 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA3E0: - mov r1, lr - mov r0, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA3F0: - ldr r1, _020EA414 ; =0x7FF00000 - orr r1, lr, r1 - mov r0, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr -_020EA404: - mov r1, lr - mov r0, #0x0 - ldmia sp!, {r4-r7,lr} - bx lr - .balign 4 -_020EA414: .word 0x7FF00000 - - arm_func_start _dsqrt -_dsqrt: ; 0x020EA418 - stmdb sp!, {r4-r6,lr} - ldr r2, _020EA5A8 ; =0x7FF00000 - cmp r1, r2 - bhs _020EA564 - movs r12, r1, lsr #0x14 - beq _020EA510 - bic r1, r1, r2 - orr r1, r1, #0x100000 -_020EA438: - movs r12, r12, asr #0x1 - bhs _020EA44C - sub r12, r12, #0x1 - movs r0, r0, lsl #0x1 - adc r1, r1, r1 -_020EA44C: - movs r3, r0, lsl #0x1 - adc r1, r1, r1 - mov r2, #0x0 - mov r4, #0x0 - mov lr, #0x200000 -_020EA460: - add r6, r4, lr - cmp r6, r1 - addle r4, r6, lr - suble r1, r1, r6 - addle r2, r2, lr - movs r3, r3, lsl #0x1 - adc r1, r1, r1 - movs lr, lr, lsr #0x1 - bne _020EA460 - mov r0, #0x0 - mov r5, #0x0 - cmp r1, r4 - cmpeq r3, #0x80000000 - blo _020EA4A8 - subs r3, r3, #0x80000000 - sbc r1, r1, r4 - add r4, r4, #0x1 - mov r0, #0x80000000 -_020EA4A8: - movs r3, r3, lsl #0x1 - adc r1, r1, r1 - mov lr, #0x40000000 -_020EA4B4: - add r6, r5, lr - cmp r4, r1 - cmpeq r6, r3 - bhi _020EA4D4 - add r5, r6, lr - subs r3, r3, r6 - sbc r1, r1, r4 - add r0, r0, lr -_020EA4D4: - movs r3, r3, lsl #0x1 - adc r1, r1, r1 - movs lr, lr, lsr #0x1 - bne _020EA4B4 - orrs r1, r1, r3 - biceq r0, r0, #0x1 - movs r1, r2, lsr #0x1 - movs r0, r0, rrx - adcs r0, r0, #0x0 - adc r1, r1, #0x0 - add r1, r1, #0x20000000 - sub r1, r1, #0x100000 - add r1, r1, r12, lsl #0x14 - ldmia sp!, {r4-r6,lr} - bx lr -_020EA510: - cmp r1, #0x0 - bne _020EA540 - cmp r0, #0x0 - ldmeqia sp!, {r4-r6,lr} - bxeq lr - mvn r12, #0x13 - clz r5, r0 - movs r0, r0, lsl r5 - sub r12, r12, r5 - mov r1, r0, lsr #0xb - mov r0, r0, lsl #0x15 - b _020EA438 -_020EA540: - clz r2, r1 - movs r1, r1, lsl r2 - rsb r2, r2, #0x2b - mov r1, r1, lsr #0xb - orr r1, r1, r0, lsr r2 - rsb r2, r2, #0x20 - mov r0, r0, lsl r2 - rsb r12, r2, #0x1 - b _020EA438 -_020EA564: - tst r1, #0x80000000 - beq _020EA580 - bics r3, r1, #0x80000000 - cmpeq r0, #0x0 - ldmeqia sp!, {r4-r6,lr} - bxeq lr - b _020EA58C -_020EA580: - orrs r2, r0, r1, lsl #0xc - ldmeqia sp!, {r4-r6,lr} - bxeq lr -_020EA58C: - ldr r2, _020EA5AC ; =0x7FF80000 - orr r1, r1, r2 - ldr r3, _020EA5B0 ; =0x021D74A8 - mov r4, #0x21 - str r4, [r3, #0x0] - ldmia sp!, {r4-r6,lr} - bx lr - .balign 4 -_020EA5A8: .word 0x7FF00000 -_020EA5AC: .word 0x7FF80000 -_020EA5B0: .word 0x021D74A8 - - arm_func_start _drsb -_drsb: ; 0x020EA5B4 - eor r1, r1, r3 - eor r3, r1, r3 - eor r1, r1, r3 - eor r0, r0, r2 - eor r2, r0, r2 - eor r0, r0, r2 - - arm_func_start _dsub -_dsub: - stmdb sp!, {r4,lr} - eors r12, r1, r3 - eormi r3, r3, #0x80000000 - bmi _020E9B54 -_020EA5DC: - subs r12, r0, r2 - sbcs lr, r1, r3 - bhs _020EA5FC - eor lr, lr, #0x80000000 - adds r2, r2, r12 - adc r3, r3, lr - subs r0, r0, r12 - sbc r1, r1, lr -_020EA5FC: - mov lr, #0x80000000 - mov r12, r1, lsr #0x14 - orr r1, lr, r1, lsl #0xb - orr r1, r1, r0, lsr #0x15 - mov r0, r0, lsl #0xb - movs r4, r12, lsl #0x15 - cmnne r4, #0x200000 - beq _020EA800 - mov r4, r3, lsr #0x14 - orr r3, lr, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs lr, r4, lsl #0x15 - beq _020EA848 -_020EA634: - subs r4, r12, r4 - beq _020EA6DC - cmp r4, #0x20 - ble _020EA670 - cmp r4, #0x38 - movge r4, #0x3f - sub r4, r4, #0x20 - rsb lr, r4, #0x20 - orrs lr, r2, r3, lsl lr - mov r2, r3, lsr r4 - orrne r2, r2, #0x1 - subs r0, r0, r2 - sbcs r1, r1, #0x0 - bmi _020EA698 - b _020EA788 -_020EA670: - rsb lr, r4, #0x20 - movs lr, r2, lsl lr - rsb lr, r4, #0x20 - mov r2, r2, lsr r4 - orr r2, r2, r3, lsl lr - mov r3, r3, lsr r4 - orrne r2, r2, #0x1 - subs r0, r0, r2 - sbcs r1, r1, r3 - bpl _020EA788 -_020EA698: - movs r2, r0, lsl #0x15 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - mov r1, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - tst r2, #0x80000000 - ldmeqia sp!, {r4,lr} - bxeq lr - movs r2, r2, lsl #0x1 - andeqs r2, r0, #0x1 - ldmeqia sp!, {r4,lr} - bxeq lr - adds r0, r0, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4,lr} - bx lr -_020EA6DC: - subs r0, r0, r2 - sbc r1, r1, r3 - orrs lr, r1, r0 - beq _020EA96C - mov lr, r12, lsl #0x14 - and lr, lr, #0x80000000 - bic r12, r12, #0x800 - cmp r1, #0x0 - bmi _020EA764 - bne _020EA714 - sub r12, r12, #0x20 - movs r1, r0 - mov r0, #0x0 - bmi _020EA730 -_020EA714: - clz r4, r1 - movs r1, r1, lsl r4 - rsb r4, r4, #0x20 - orr r1, r1, r0, lsr r4 - rsb r4, r4, #0x20 - mov r0, r0, lsl r4 - sub r12, r12, r4 -_020EA730: - cmp r12, #0x0 - bgt _020EA76C - rsb r12, r12, #0xc - cmp r12, #0x20 - movge r0, r1 - movge r1, #0x0 - subge r12, r12, #0x20 - rsb r4, r12, #0x20 - mov r0, r0, lsr r12 - orr r0, r0, r1, lsl r4 - orr r1, lr, r1, lsr r12 - ldmia sp!, {r4,lr} - bx lr -_020EA764: - cmp r1, #0x0 - subges r12, r12, #0x1 -_020EA76C: - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, lr, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - ldmia sp!, {r4,lr} - bx lr -_020EA788: - mov lr, r12, lsl #0x14 - and lr, lr, #0x80000000 - bic r12, r12, #0x800 - cmp r1, #0x0 - bne _020EA7AC - sub r12, r12, #0x20 - movs r1, r0 - mov r0, #0x0 - bmi _020EA7C8 -_020EA7AC: - clz r4, r1 - movs r1, r1, lsl r4 - rsb r4, r4, #0x20 - orr r1, r1, r0, lsr r4 - rsb r4, r4, #0x20 - mov r0, r0, lsl r4 - sub r12, r12, r4 -_020EA7C8: - cmp r12, #0x0 - orrgt r12, r12, lr, lsr #0x14 - bgt _020EA698 - rsb r12, r12, #0xc - cmp r12, #0x20 - movge r0, r1 - movge r1, #0x0 - subge r12, r12, #0x20 - rsb r4, r12, #0x20 - mov r0, r0, lsr r12 - orr r0, r0, r1, lsl r4 - orr r1, lr, r1, lsr r12 - ldmia sp!, {r4,lr} - bx lr -_020EA800: - cmp r12, #0x800 - movge lr, #0x80000000 - movlt lr, #0x0 - bics r12, r12, #0x800 - beq _020EA86C - orrs r4, r0, r1, lsl #0x1 - bne _020EA948 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r4, r4, lsl #0x15 - beq _020EA934 - cmn r4, #0x200000 - bne _020EA934 - orrs r4, r2, r3, lsl #0x1 - beq _020EA95C - b _020EA948 -_020EA848: - cmp r4, #0x800 - movge lr, #0x80000000 - movlt lr, #0x0 - bic r12, r12, #0x800 - bics r4, r4, #0x800 - beq _020EA8E4 - orrs r4, r2, r3, lsl #0x1 - bne _020EA948 - b _020EA934 -_020EA86C: - orrs r4, r0, r1, lsl #0x1 - beq _020EA8AC - mov r12, #0x1 - bic r1, r1, #0x80000000 - mov r4, r3, lsr #0x14 - mov r3, r3, lsl #0xb - orr r3, r3, r2, lsr #0x15 - mov r2, r2, lsl #0xb - movs r4, r4, lsl #0x15 - cmnne r4, #0x200000 - mov r4, r4, lsr #0x15 - orr r4, r4, lr, lsr #0x14 - beq _020EA848 - orr r3, r3, #0x80000000 - orr r12, r12, lr, lsr #0x14 - b _020EA634 -_020EA8AC: - mov r12, r3, lsr #0x14 - mov r1, r3, lsl #0xb - orr r1, r1, r2, lsr #0x15 - mov r0, r2, lsl #0xb - movs r4, r12, lsl #0x15 - beq _020EA8D8 - cmn r4, #0x200000 - bne _020EA900 - orrs r4, r0, r1, lsl #0x1 - bne _020EA94C - b _020EA934 -_020EA8D8: - orrs r4, r0, r1, lsl #0x1 - beq _020EA96C - b _020EA900 -_020EA8E4: - orrs r4, r2, r3, lsl #0x1 - beq _020EA910 - mov r4, #0x1 - bic r3, r3, #0x80000000 - orr r12, r12, lr, lsr #0x14 - orr r4, r4, lr, lsr #0x14 - b _020EA634 -_020EA900: - mov r1, r3 - mov r0, r2 - ldmia sp!, {r4,lr} - bx lr -_020EA910: - cmp r1, #0x0 - subges r12, r12, #0x1 - mov r0, r0, lsr #0xb - orr r0, r0, r1, lsl #0x15 - add r1, r1, r1 - orr r1, lr, r1, lsr #0xc - orr r1, r1, r12, lsl #0x14 - ldmia sp!, {r4,lr} - bx lr -_020EA934: - ldr r1, _020EA97C ; =0x7FF00000 - orr r1, lr, r1 - mov r0, #0x0 - ldmia sp!, {r4,lr} - bx lr -_020EA948: - mov r1, r3 -_020EA94C: - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4,lr} - bx lr -_020EA95C: - mvn r0, #0x0 - bic r1, r0, #0x80000000 - ldmia sp!, {r4,lr} - bx lr -_020EA96C: - mov r1, #0x0 - mov r0, #0x0 - ldmia sp!, {r4,lr} - bx lr - .balign 4 -_020EA97C: .word 0x7FF00000 - - arm_func_start _fadd -_fadd: ; 0x020EA980 - eors r2, r0, r1 - eormi r1, r1, #0x80000000 - bmi _020EB7BC -_020EA98C: - subs r12, r0, r1 - subcc r0, r0, r12 - addcc r1, r1, r12 - mov r2, #0x80000000 - mov r3, r0, lsr #0x17 - orr r0, r2, r0, lsl #0x8 - ands r12, r3, #0xff - cmpne r12, #0xff - beq _020EAA20 - mov r12, r1, lsr #0x17 - orr r1, r2, r1, lsl #0x8 - ands r2, r12, #0xff - beq _020EAA60 -_020EA9C0: - subs r12, r3, r12 - beq _020EA9D8 - rsb r2, r12, #0x20 - movs r2, r1, lsl r2 - mov r1, r1, lsr r12 - orrne r1, r1, #0x1 -_020EA9D8: - adds r0, r0, r1 - blo _020EA9F8 - and r1, r0, #0x1 - orr r0, r1, r0, rrx - add r3, r3, #0x1 - and r2, r3, #0xff - cmp r2, #0xff - beq _020EAB68 -_020EA9F8: - ands r1, r0, #0xff - add r0, r0, r0 - mov r0, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - tst r1, #0x80 - bxeq lr - ands r1, r1, #0x7f - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EAA20: - cmp r3, #0x100 - movge r2, #0x80000000 - movlt r2, #0x0 - ands r3, r3, #0xff - beq _020EAA84 - movs r0, r0, lsl #0x1 - bne _020EAB94 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EAB88 - cmp r12, #0xff - blt _020EAB88 - cmp r1, #0x0 - beq _020EAB88 - b _020EAB94 -_020EAA60: - cmp r3, #0x100 - movge r2, #0x80000000 - movlt r2, #0x0 - and r3, r3, #0xff - ands r12, r12, #0xff - beq _020EAAE0 -_020EAA78: - movs r1, r1, lsl #0x1 - bne _020EAB94 - b _020EAB88 -_020EAA84: - movs r0, r0, lsl #0x1 - beq _020EAABC - mov r3, #0x1 - mov r0, r0, lsr #0x1 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x8 - ands r12, r12, #0xff - beq _020EAAE0 - cmp r12, #0xff - beq _020EAA78 - orr r1, r1, #0x80000000 - orr r3, r3, r2, lsr #0x17 - orr r12, r12, r2, lsr #0x17 - b _020EA9C0 -_020EAABC: - mov r3, r1, lsr #0x17 - mov r0, r1, lsl #0x9 - ands r3, r3, #0xff - beq _020EAB48 - cmp r3, #0xff - blt _020EAB48 - cmp r0, #0x0 - beq _020EAB88 - b _020EAB80 -_020EAAE0: - movs r1, r1, lsl #0x1 - beq _020EAB50 - mov r1, r1, lsr #0x1 - mov r12, #0x1 - orr r3, r3, r2, lsr #0x17 - orr r12, r12, r2, lsr #0x17 - cmp r0, #0x0 - bmi _020EA9C0 - adds r0, r0, r1 - blo _020EAB14 - and r1, r0, #0x1 - orr r0, r1, r0, rrx - add r12, r12, #0x1 -_020EAB14: - cmp r0, #0x0 - subge r12, r12, #0x1 - ands r1, r0, #0xff - add r0, r0, r0 - mov r0, r0, lsr #0x9 - orr r0, r0, r12, lsl #0x17 - bxeq lr - tst r1, #0x80 - bxeq lr - ands r1, r1, #0x7f - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EAB48: - mov r0, r1 - bx lr -_020EAB50: - cmp r0, #0x0 - subges r3, r3, #0x1 - add r0, r0, r0 - orr r0, r2, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bx lr -_020EAB68: - cmp r3, #0x100 - movge r2, #0x80000000 - movlt r2, #0x0 - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020EAB80: - mvn r0, #0x80000000 - bx lr -_020EAB88: - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020EAB94: - mvn r0, #0x80000000 - bx lr -_020EAB9C: ; 0x020EAB9C - mvn r0, #0x80000000 - bx lr - - arm_func_start _dgr -_dgr: ; 0x020EABA4 - mov r12, #0x200000 - cmn r12, r1, lsl #0x1 - bhs _020EAC18 - cmn r12, r3, lsl #0x1 - bhs _020EAC2C -_020EABB8: - orrs r12, r3, r1 - bmi _020EABE8 - cmp r1, r3 - cmpeq r0, r2 - movhi r0, #0x1 - movls r0, #0x0 - bx lr -_020EABD4: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EABE8: - orr r12, r0, r12, lsl #0x1 - orrs r12, r12, r2 - moveq r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x20000000 - msr cpsr_f, r12 - bxeq lr - cmp r3, r1 - cmpeq r2, r0 - movhi r0, #0x1 - movls r0, #0x0 - bx lr -_020EAC18: - bne _020EABD4 - cmp r0, #0x0 - bhi _020EABD4 - cmn r12, r3, lsl #0x1 - blo _020EABB8 -_020EAC2C: - bne _020EABD4 - cmp r2, #0x0 - bhi _020EABD4 - b _020EABB8 - - arm_func_start _dleq -_dleq: ; 0x020EAC3C - mov r12, #0x200000 - cmn r12, r1, lsl #0x1 - bhs _020EACBC - cmn r12, r3, lsl #0x1 - bhs _020EACD0 -_020EAC50: - orrs r12, r3, r1 - bmi _020EAC84 - cmp r1, r3 - cmpeq r0, r2 - movls r0, #0x1 - movhi r0, #0x0 - bx lr -_020EAC6C: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x40000000 - orr r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EAC84: - orr r12, r0, r12, lsl #0x1 - orrs r12, r12, r2 - moveq r0, #0x1 - bne _020EACA8 - mrs r12, cpsr - bic r12, r12, #0x20000000 - orr r12, r12, #0x40000000 - msr cpsr_f, r12 - bxeq lr -_020EACA8: - cmp r3, r1 - cmpeq r2, r0 - movls r0, #0x1 - movhi r0, #0x0 - bx lr -_020EACBC: - bne _020EAC6C - cmp r0, #0x0 - bhi _020EAC6C - cmn r12, r3, lsl #0x1 - blo _020EAC50 -_020EACD0: - bne _020EAC6C - cmp r2, #0x0 - bhi _020EAC6C - b _020EAC50 - - arm_func_start _dls -_dls: ; 0x020EACE0 - mov r12, #0x200000 - cmn r12, r1, lsl #0x1 - bhs _020EAD58 - cmn r12, r3, lsl #0x1 - bhs _020EAD6C -_020EACF4: - orrs r12, r3, r1 - bmi _020EAD24 - cmp r1, r3 - cmpeq r0, r2 - movcc r0, #0x1 - movcs r0, #0x0 - bx lr -_020EAD10: - mov r0, #0x0 - mrs r12, cpsr - orr r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EAD24: - orr r12, r0, r12, lsl #0x1 - orrs r12, r12, r2 - moveq r0, #0x0 - bne _020EAD44 - mrs r12, cpsr - orr r12, r12, #0x20000000 - msr cpsr_f, r12 - bxeq lr -_020EAD44: - cmp r3, r1 - cmpeq r2, r0 - movcc r0, #0x1 - movcs r0, #0x0 - bx lr -_020EAD58: - bne _020EAD10 - cmp r0, #0x0 - bhi _020EAD10 - cmn r12, r3, lsl #0x1 - blo _020EACF4 -_020EAD6C: - bne _020EAD10 - cmp r2, #0x0 - bhi _020EAD10 - b _020EACF4 - - arm_func_start _deq -_deq: ; 0x020EAD7C - mov r12, #0x200000 - cmn r12, r1, lsl #0x1 - bhs _020EADE4 - cmn r12, r3, lsl #0x1 - bhs _020EADF8 -_020EAD90: - orrs r12, r3, r1 - bmi _020EADC0 - cmp r1, r3 - cmpeq r0, r2 - moveq r0, #0x1 - movne r0, #0x0 - bx lr -_020EADAC: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr -_020EADC0: - orr r12, r0, r12, lsl #0x1 - orrs r12, r12, r2 - moveq r0, #0x1 - bxeq lr - cmp r3, r1 - cmpeq r2, r0 - moveq r0, #0x1 - movne r0, #0x0 - bx lr -_020EADE4: - bne _020EADAC - cmp r0, #0x0 - bhi _020EADAC - cmn r12, r3, lsl #0x1 - blo _020EAD90 -_020EADF8: - bne _020EADAC - cmp r2, #0x0 - bhi _020EADAC - b _020EAD90 - - arm_func_start _dneq -_dneq: ; 0x020EAE08 - mov r12, #0x200000 - cmn r12, r1, lsl #0x1 - bhs _020EAE70 - cmn r12, r3, lsl #0x1 - bhs _020EAE84 -_020EAE1C: - orrs r12, r3, r1 - bmi _020EAE4C - cmp r1, r3 - cmpeq r0, r2 - movne r0, #0x1 - moveq r0, #0x0 - bx lr -_020EAE38: - mov r0, #0x1 - mrs r12, cpsr - bic r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr -_020EAE4C: - orr r12, r0, r12, lsl #0x1 - orrs r12, r12, r2 - moveq r0, #0x0 - bxeq lr - cmp r3, r1 - cmpeq r2, r0 - movne r0, #0x1 - moveq r0, #0x0 - bx lr -_020EAE70: - bne _020EAE38 - cmp r0, #0x0 - bhi _020EAE38 - cmn r12, r3, lsl #0x1 - blo _020EAE1C -_020EAE84: - bne _020EAE38 - cmp r2, #0x0 - bhi _020EAE38 - b _020EAE1C - - arm_func_start _fgeq -_fgeq: ; 0x020EAE94 - mov r3, #0xff000000 - cmp r3, r0, lsl #0x1 - cmpcs r3, r1, lsl #0x1 - blo _020EAEDC - cmp r0, #0x0 - bicmi r0, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r1, #0x0 - bicmi r1, r1, #0x80000000 - rsbmi r1, r1, #0x0 - cmp r0, r1 - movge r0, #0x1 - movlt r0, #0x0 - mrs r12, cpsr - biclt r12, r12, #0x20000000 - orrge r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EAEDC: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr - - arm_func_start _fgr -_fgr: ; 0x020EAEF0 - mov r3, #0xff000000 - cmp r3, r0, lsl #0x1 - cmpcs r3, r1, lsl #0x1 - blo _020EAF38 - cmp r0, #0x0 - bicmi r0, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r1, #0x0 - bicmi r1, r1, #0x80000000 - rsbmi r1, r1, #0x0 - cmp r0, r1 - movgt r0, #0x1 - movle r0, #0x0 - mrs r12, cpsr - bicle r12, r12, #0x20000000 - orrgt r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EAF38: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr - - arm_func_start _fleq -_fleq: ; 0x020EAF4C - mov r3, #0xff000000 - cmp r3, r0, lsl #0x1 - cmpcs r3, r1, lsl #0x1 - blo _020EAF9C - cmp r0, #0x0 - bicmi r0, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r1, #0x0 - bicmi r1, r1, #0x80000000 - rsbmi r1, r1, #0x0 - cmp r0, r1 - movle r0, #0x1 - movgt r0, #0x0 - mrs r12, cpsr - orrgt r12, r12, #0x20000000 - bicgt r12, r12, #0x40000000 - bicle r12, r12, #0x20000000 - orrle r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr -_020EAF9C: - mov r0, #0x0 - mrs r12, cpsr - bic r12, r12, #0x40000000 - orr r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr - - arm_func_start _fls -_fls: ; 0x020EAFB4 - mov r3, #0xff000000 - cmp r3, r0, lsl #0x1 - cmpcs r3, r1, lsl #0x1 - blo _020EAFFC - cmp r0, #0x0 - bicmi r0, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r1, #0x0 - bicmi r1, r1, #0x80000000 - rsbmi r1, r1, #0x0 - cmp r0, r1 - movlt r0, #0x1 - movge r0, #0x0 - mrs r12, cpsr - orrge r12, r12, #0x20000000 - biclt r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr -_020EAFFC: - mov r0, #0x0 - mrs r12, cpsr - orr r12, r12, #0x20000000 - msr cpsr_f, r12 - bx lr - - arm_func_start _feq -_feq: ; 0x020EB010 - mov r3, #0xff000000 - cmp r3, r0, lsl #0x1 - blo _020EB064 - cmp r3, r1, lsl #0x1 - blo _020EB064 - orr r3, r0, r1 - movs r3, r3, lsl #0x1 - moveq r0, #0x0 - bne _020EB044 - mrs r12, cpsr - orr r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr -_020EB044: - cmp r0, r1 - movne r0, #0x1 - moveq r0, #0x0 - mrs r12, cpsr - bicne r12, r12, #0x40000000 - orreq r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr -_020EB064: - mov r0, #0x1 - mrs r12, cpsr - bic r12, r12, #0x40000000 - msr cpsr_f, r12 - bx lr - - arm_func_start _frdiv -_frdiv: ; 0x020EB078 - eor r0, r0, r1 - eor r1, r0, r1 - eor r0, r0, r1 - - arm_func_start _fdiv -_fdiv: ; 0x020EB084 - stmdb sp!, {lr} - mov r12, #0xff - ands r3, r12, r0, lsr #0x17 - cmpne r3, #0xff - beq _020EB258 - ands r12, r12, r1, lsr #0x17 - cmpne r12, #0xff - beq _020EB294 - orr r1, r1, #0x800000 - orr r0, r0, #0x800000 - bic r2, r0, #0xff000000 - bic lr, r1, #0xff000000 -_020EB0B4: - cmp r2, lr - movcc r2, r2, lsl #0x1 - subcc r3, r3, #0x1 - teq r0, r1 - sub r0, pc, #0x94 - ldrb r1, [r0, lr, lsr #0xf] - rsb lr, lr, #0x0 - mov r0, lr, asr #0x1 - mul r0, r1, r0 - add r0, r0, #0x80000000 - mov r0, r0, lsr #0x6 - mul r0, r1, r0 - mov r0, r0, lsr #0xe - mul r1, lr, r0 - sub r12, r3, r12 - mov r1, r1, lsr #0xc - mul r1, r0, r1 - mov r0, r0, lsl #0xe - add r0, r0, r1, lsr #0xf - umull r1, r0, r2, r0 - mov r3, r0 - orrmi r0, r0, #0x80000000 - adds r12, r12, #0x7e - bmi _020EB35C - cmp r12, #0xfe - bge _020EB410 - add r0, r0, r12, lsl #0x17 - mov r12, r1, lsr #0x1c - cmp r12, #0x7 - beq _020EB238 - add r0, r0, r1, lsr #0x1f - ldmia sp!, {lr} - bx lr -_020EB138: ; not code - .byte 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0xFB, 0xFA, 0xF9 - .byte 0xF8, 0xF7, 0xF6, 0xF5, 0xF4, 0xF3, 0xF2, 0xF1, 0xF0, 0xF0, 0xEF, 0xEE, 0xED, 0xEC, 0xEB, 0xEA - .byte 0xEA, 0xE9, 0xE8, 0xE7, 0xE6, 0xE6, 0xE5, 0xE4, 0xE3, 0xE2, 0xE2, 0xE1, 0xE0, 0xDF, 0xDF, 0xDE - .byte 0xDD, 0xDC, 0xDC, 0xDB, 0xDA, 0xD9, 0xD9, 0xD8, 0xD7, 0xD7, 0xD6, 0xD5, 0xD4, 0xD4, 0xD3, 0xD2 - .byte 0xD2, 0xD1, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, 0xCD, 0xCC, 0xCC, 0xCB, 0xCB, 0xCA, 0xC9, 0xC9, 0xC8 - .byte 0xC8, 0xC7, 0xC6, 0xC6, 0xC5, 0xC5, 0xC4, 0xC3, 0xC3, 0xC2, 0xC2, 0xC1, 0xC0, 0xC0, 0xBF, 0xBF - .byte 0xBE, 0xBE, 0xBD, 0xBD, 0xBC, 0xBC, 0xBB, 0xBA, 0xBA, 0xB9, 0xB9, 0xB8, 0xB8, 0xB7, 0xB7, 0xB6 - .byte 0xB6, 0xB5, 0xB5, 0xB4, 0xB4, 0xB3, 0xB3, 0xB2, 0xB2, 0xB1, 0xB1, 0xB0, 0xB0, 0xAF, 0xAF, 0xAF - .byte 0xAE, 0xAE, 0xAD, 0xAD, 0xAC, 0xAC, 0xAB, 0xAB, 0xAA, 0xAA, 0xAA, 0xA9, 0xA9, 0xA8, 0xA8, 0xA7 - .byte 0xA7, 0xA7, 0xA6, 0xA6, 0xA5, 0xA5, 0xA4, 0xA4, 0xA4, 0xA3, 0xA3, 0xA2, 0xA2, 0xA2, 0xA1, 0xA1 - .byte 0xA0, 0xA0, 0xA0, 0x9F, 0x9F, 0x9E, 0x9E, 0x9E, 0x9D, 0x9D, 0x9D, 0x9C, 0x9C, 0x9B, 0x9B, 0x9B - .byte 0x9A, 0x9A, 0x9A, 0x99, 0x99, 0x99, 0x98, 0x98, 0x98, 0x97, 0x97, 0x96, 0x96, 0x96, 0x95, 0x95 - .byte 0x95, 0x94, 0x94, 0x94, 0x93, 0x93, 0x93, 0x92, 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, 0x90, 0x90 - .byte 0x90, 0x8F, 0x8F, 0x8F, 0x8E, 0x8E, 0x8E, 0x8D, 0x8D, 0x8D, 0x8C, 0x8C, 0x8C, 0x8C, 0x8B, 0x8B - .byte 0x8B, 0x8A, 0x8A, 0x8A, 0x8A, 0x89, 0x89, 0x89, 0x88, 0x88, 0x88, 0x88, 0x87, 0x87, 0x87, 0x86 - .byte 0x86, 0x86, 0x86, 0x85, 0x85, 0x85, 0x85, 0x84, 0x84, 0x84, 0x83, 0x83, 0x83, 0x83, 0x82, 0x82 - .byte 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x80, 0x80 -_020EB238: - mov r1, r3, lsl #0x1 - add r1, r1, #0x1 - rsb lr, lr, #0x0 - mul r1, lr, r1 - cmp r1, r2, lsl #0x18 - addmi r0, r0, #0x1 - ldmia sp!, {lr} - bx lr -_020EB258: - eor lr, r0, r1 - and lr, lr, #0x80000000 - cmp r3, #0x0 - beq _020EB2B0 - movs r0, r0, lsl #0x9 - bne _020EB3F8 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EB3E8 - cmp r12, #0xff - blt _020EB3E8 - cmp r1, #0x0 - beq _020EB404 - b _020EB3E0 -_020EB294: - eor lr, r0, r1 - and lr, lr, #0x80000000 - cmp r12, #0x0 - beq _020EB314 -_020EB2A4: - movs r1, r1, lsl #0x9 - bne _020EB3E0 - b _020EB430 -_020EB2B0: - movs r2, r0, lsl #0x9 - beq _020EB2E4 - clz r3, r2 - movs r2, r2, lsl r3 - rsb r3, r3, #0x0 - mov r2, r2, lsr #0x8 - ands r12, r12, r1, lsr #0x17 - beq _020EB33C - cmp r12, #0xff - beq _020EB2A4 - orr r1, r1, #0x800000 - bic lr, r1, #0xff000000 - b _020EB0B4 -_020EB2E4: - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EB308 - cmp r12, #0xff - blt _020EB430 - cmp r1, #0x0 - beq _020EB430 - b _020EB3E0 -_020EB308: - cmp r1, #0x0 - beq _020EB404 - b _020EB430 -_020EB314: - movs r12, r1, lsl #0x9 - beq _020EB3E8 - mov lr, r12 - clz r12, lr - movs lr, lr, lsl r12 - rsb r12, r12, #0x0 - mov lr, lr, lsr #0x8 - orr r0, r0, #0x800000 - bic r2, r0, #0xff000000 - b _020EB0B4 -_020EB33C: - movs r12, r1, lsl #0x9 - beq _020EB3E8 - mov lr, r12 - clz r12, lr - movs lr, lr, lsl r12 - rsb r12, r12, #0x0 - mov lr, lr, lsr #0x8 - b _020EB0B4 -_020EB35C: - and r0, r0, #0x80000000 - cmn r12, #0x18 - beq _020EB3D0 - bmi _020EB428 - add r1, r12, #0x17 - mov r2, r2, lsl r1 - rsb r12, r12, #0x0 - mov r3, r3, lsr r12 - orr r0, r0, r3 - rsb lr, lr, #0x0 - mul r1, lr, r3 - cmp r1, r2 - ldmeqia sp!, {lr} - bxeq lr - add r1, r1, lr - cmp r1, r2 - beq _020EB3C4 - addmi r0, r0, #0x1 - subpl r1, r1, lr - add r1, lr, r1, lsl #0x1 - cmp r1, r2, lsl #0x1 - and r3, r0, #0x1 - addmi r0, r0, #0x1 - addeq r0, r0, r3 - ldmia sp!, {lr} - bx lr -_020EB3C4: - add r0, r0, #0x1 - ldmia sp!, {lr} - bx lr -_020EB3D0: - cmn r2, lr - addne r0, r0, #0x1 - ldmia sp!, {lr} - bx lr -_020EB3E0: - mov r0, r1 - b _020EB3F8 -_020EB3E8: - mov r0, #0xff000000 - orr r0, lr, r0, lsr #0x1 - ldmia sp!, {lr} - bx lr -_020EB3F8: - mvn r0, #0x80000000 - ldmia sp!, {lr} - bx lr -_020EB404: - mvn r0, #0x80000000 - ldmia sp!, {lr} - bx lr -_020EB410: - tst r0, #0x80000000 - mov r0, #0xff000000 - movne r0, r0, asr #0x1 - moveq r0, r0, lsr #0x1 - ldmia sp!, {lr} - bx lr -_020EB428: - ldmia sp!, {lr} - bx lr -_020EB430: - mov r0, lr - ldmia sp!, {lr} - bx lr - - arm_func_start _f2d -_f2d: - and r2, r0, #0x80000000 - mov r12, r0, lsr #0x17 - mov r3, r0, lsl #0x9 - ands r12, r12, #0xff - beq _020EB46C - cmp r12, #0xff - beq _020EB498 -_020EB458: - add r12, r12, #0x380 - mov r0, r3, lsl #0x14 - orr r1, r2, r3, lsr #0xc - orr r1, r1, r12, lsl #0x14 - bx lr -_020EB46C: - cmp r3, #0x0 - bne _020EB480 - mov r1, r2 - mov r0, #0x0 - bx lr -_020EB480: - mov r3, r3, lsr #0x1 - clz r12, r3 - movs r3, r3, lsl r12 - rsb r12, r12, #0x1 - add r3, r3, r3 - b _020EB458 -_020EB498: - cmp r3, #0x0 - bhi _020EB4B0 - ldr r1, _020EB4BC ; =0x7FF00000 - orr r1, r1, r2 - mov r0, #0x0 - bx lr -_020EB4B0: - mvn r0, #0x0 - bic r1, r0, #0x80000000 - bx lr - .balign 4 -_020EB4BC: .word 0x7FF00000 - - arm_func_start _ffix -_ffix: ; 0x020EB4C0 - bic r1, r0, #0x80000000 - mov r2, #0x9e - subs r2, r2, r1, lsr #0x17 - ble _020EB4E8 - mov r1, r1, lsl #0x8 - orr r1, r1, #0x80000000 - cmp r0, #0x0 - mov r0, r1, lsr r2 - rsbmi r0, r0, #0x0 - bx lr -_020EB4E8: - mvn r0, r0, asr #0x1f - add r0, r0, #0x80000000 - bx lr - - arm_func_start _ffixu -_ffixu: ; 0x020EB4F4 - tst r0, #0x80000000 - bne _020EB518 - mov r1, #0x9e - subs r1, r1, r0, lsr #0x17 - blt _020EB52C - mov r2, r0, lsl #0x8 - orr r0, r2, #0x80000000 - mov r0, r0, lsr r1 - bx lr -_020EB518: - mov r2, #0xff000000 - cmp r2, r0, lsl #0x1 - movcs r0, #0x0 - mvncc r0, #0x0 - bx lr -_020EB52C: - mvn r0, #0x0 - bx lr - - arm_func_start _fflt -_fflt: ; 0x020EB534 - ands r2, r0, #0x80000000 - rsbmi r0, r0, #0x0 - cmp r0, #0x0 - bxeq lr - clz r3, r0 - movs r0, r0, lsl r3 - rsb r3, r3, #0x9e - ands r1, r0, #0xff - add r0, r0, r0 - orr r0, r2, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bxeq lr - tst r1, #0x80 - bxeq lr - ands r3, r1, #0x7f - andeqs r3, r0, #0x1 - addne r0, r0, #0x1 - bx lr - - arm_func_start _ffltu -_ffltu: ; 0x020EB57C - cmp r0, #0x0 - bxeq lr - mov r3, #0x9e - bmi _020EB598 - clz r12, r0 - movs r0, r0, lsl r12 - sub r3, r3, r12 -_020EB598: - ands r2, r0, #0xff - add r0, r0, r0 - mov r0, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bxeq lr - tst r2, #0x80 - bxeq lr - ands r1, r2, #0x7f - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr - - arm_func_start _fmul -_fmul: ; 0x020EB5C4 - eor r2, r0, r1 - and r2, r2, #0x80000000 - mov r12, #0xff - ands r3, r12, r0, lsr #0x17 - mov r0, r0, lsl #0x8 - cmpne r3, #0xff - beq _020EB640 - orr r0, r0, #0x80000000 - ands r12, r12, r1, lsr #0x17 - mov r1, r1, lsl #0x8 - cmpne r12, #0xff - beq _020EB680 - orr r1, r1, #0x80000000 -_020EB5F8: - add r12, r3, r12 - umull r1, r3, r0, r1 - movs r0, r3 - addpl r0, r0, r0 - subpl r12, r12, #0x1 - subs r12, r12, #0x7f - bmi _020EB70C - cmp r12, #0xfe - bge _020EB778 - ands r3, r0, #0xff - orr r0, r2, r0, lsr #0x8 - add r0, r0, r12, lsl #0x17 - tst r3, #0x80 - bxeq lr - orrs r1, r1, r3, lsl #0x19 - andeqs r3, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EB640: - cmp r3, #0x0 - beq _020EB694 - movs r0, r0, lsl #0x1 - bne _020EB768 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EB674 - cmp r12, #0xff - blt _020EB75C - cmp r1, #0x0 - beq _020EB75C - b _020EB768 -_020EB674: - cmp r1, #0x0 - beq _020EB770 - b _020EB75C -_020EB680: - cmp r12, #0x0 - beq _020EB6F0 -_020EB688: - movs r1, r1, lsl #0x1 - bne _020EB768 - b _020EB75C -_020EB694: - movs r0, r0, lsl #0x1 - beq _020EB6CC - mov r0, r0, lsr #0x1 - clz r3, r0 - movs r0, r0, lsl r3 - rsb r3, r3, #0x1 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x8 - ands r12, r12, #0xff - beq _020EB6F0 - cmp r12, #0xff - beq _020EB688 - orr r1, r1, #0x80000000 - b _020EB5F8 -_020EB6CC: - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EB79C - cmp r12, #0xff - blt _020EB79C - cmp r1, #0x0 - beq _020EB770 - b _020EB768 -_020EB6F0: - movs r1, r1, lsl #0x1 - beq _020EB79C - mov r1, r1, lsr #0x1 - clz r12, r1 - movs r1, r1, lsl r12 - rsb r12, r12, #0x1 - b _020EB5F8 -_020EB70C: - cmn r12, #0x18 - beq _020EB754 - bmi _020EB794 - cmp r1, #0x0 - orrne r0, r0, #0x1 - mov r3, r0 - mov r0, r0, lsr #0x8 - rsb r12, r12, #0x0 - orr r0, r2, r0, lsr r12 - rsb r12, r12, #0x18 - movs r1, r3, lsl r12 - bxeq lr - tst r1, #0x80000000 - bxeq lr - movs r1, r1, lsl #0x1 - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EB754: - mov r0, r0, lsl #0x1 - b _020EB784 -_020EB75C: - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020EB768: - mvn r0, #0x80000000 - bx lr -_020EB770: - mvn r0, #0x80000000 - bx lr -_020EB778: - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020EB784: - movs r1, r0 - mov r0, r2 - addne r0, r0, #0x1 - bx lr -_020EB794: - mov r0, r2 - bx lr -_020EB79C: - mov r0, r2 - bx lr - - arm_func_start _frsb -_frsb: ; 0x020EB7A4 - eor r0, r0, r1 - eor r1, r0, r1 - eor r0, r0, r1 - - arm_func_start _fsub -_fsub: ; 0x020EB7B0 - eors r2, r0, r1 - eormi r1, r1, #0x80000000 - bmi _020EA98C -_020EB7BC: - subs r12, r0, r1 - eorcc r12, r12, #0x80000000 - subcc r0, r0, r12 - addcc r1, r1, r12 - mov r2, #0x80000000 - mov r3, r0, lsr #0x17 - orr r0, r2, r0, lsl #0x8 - ands r12, r3, #0xff - cmpne r12, #0xff - beq _020EB8D8 - mov r12, r1, lsr #0x17 - orr r1, r2, r1, lsl #0x8 - ands r2, r12, #0xff - beq _020EB918 -_020EB7F4: - subs r12, r3, r12 - beq _020EB83C - rsb r2, r12, #0x20 - movs r2, r1, lsl r2 - mov r1, r1, lsr r12 - orrne r1, r1, #0x1 - subs r0, r0, r1 - bpl _020EB880 - ands r1, r0, #0xff - add r0, r0, r0 - mov r0, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - tst r1, #0x80 - bxeq lr - ands r1, r1, #0x7f - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EB83C: - subs r0, r0, r1 - beq _020EB9E4 - mov r2, r3, lsl #0x17 - and r2, r2, #0x80000000 - bic r3, r3, #0x100 - clz r12, r0 - movs r0, r0, lsl r12 - sub r3, r3, r12 - cmp r3, #0x0 - bgt _020EB870 - rsb r3, r3, #0x9 - orr r0, r2, r0, lsr r3 - bx lr -_020EB870: - add r0, r0, r0 - orr r0, r2, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bx lr -_020EB880: - mov r2, r3, lsl #0x17 - and r2, r2, #0x80000000 - bic r3, r3, #0x100 - clz r12, r0 - movs r0, r0, lsl r12 - sub r3, r3, r12 - cmp r3, #0x0 - bgt _020EB8AC - rsb r3, r3, #0x9 - orr r0, r2, r0, lsr r3 - bx lr -_020EB8AC: - ands r1, r0, #0xff - add r0, r0, r0 - orr r0, r2, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bxeq lr - tst r1, #0x80 - bxeq lr - ands r1, r1, #0x7f - andeqs r1, r0, #0x1 - addne r0, r0, #0x1 - bx lr -_020EB8D8: - cmp r3, #0x100 - movge r2, #0x80000000 - movlt r2, #0x0 - ands r3, r3, #0xff - beq _020EB940 - movs r0, r0, lsl #0x1 - bne _020EBA18 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x9 - ands r12, r12, #0xff - beq _020EBA0C - cmp r12, #0xff - blt _020EBA0C - cmp r1, #0x0 - beq _020EBA20 - b _020EBA18 -_020EB918: - cmp r12, #0x100 - movge r2, #0x80000000 - movlt r2, #0x0 - and r3, r3, #0xff - ands r12, r12, #0xff - beq _020EB9A8 -_020EB930: - eor r2, r2, #0x80000000 - movs r1, r1, lsl #0x1 - bne _020EBA18 - b _020EBA0C -_020EB940: - movs r0, r0, lsl #0x1 - beq _020EB978 - mov r0, r0, lsr #0x1 - mov r3, #0x1 - mov r12, r1, lsr #0x17 - mov r1, r1, lsl #0x8 - ands r12, r12, #0xff - beq _020EB9A8 - cmp r12, #0xff - beq _020EB930 - orr r1, r1, #0x80000000 - orr r3, r3, r2, lsr #0x17 - orr r12, r12, r2, lsr #0x17 - b _020EB7F4 -_020EB978: - mov r3, r1, lsr #0x17 - mov r0, r1, lsl #0x9 - ands r2, r3, #0xff - beq _020EB99C - cmp r2, #0xff - blt _020EB9C4 - cmp r0, #0x0 - bne _020EBA04 - b _020EBA0C -_020EB99C: - cmp r0, #0x0 - beq _020EB9E4 - b _020EB9C4 -_020EB9A8: - movs r1, r1, lsl #0x1 - beq _020EB9CC - mov r1, r1, lsr #0x1 - mov r12, #0x1 - orr r12, r12, r2, lsr #0x17 - orr r3, r3, r2, lsr #0x17 - b _020EB7F4 -_020EB9C4: - mov r0, r1 - bx lr -_020EB9CC: - cmp r0, #0x0 - subges r3, r3, #0x1 - add r0, r0, r0 - orr r0, r2, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bx lr -_020EB9E4: - mov r0, #0x0 - bx lr -_020EB9EC: ; 0x020EB9EC - cmp r0, #0x0 - subges r3, r3, #0x1 - add r0, r0, r0 - mov r0, r0, lsr #0x9 - orr r0, r0, r3, lsl #0x17 - bx lr -_020EBA04: - mvn r0, #0x80000000 - bx lr -_020EBA0C: - mov r0, #0xff000000 - orr r0, r2, r0, lsr #0x1 - bx lr -_020EBA18: - mvn r0, #0x80000000 - bx lr -_020EBA20: - mvn r0, #0x80000000 - bx lr - - arm_func_start _ll_mod -_ll_mod: ; 0x020EBA28 - stmdb sp!, {r4-r7,r11-r12,lr} - mov r4, r1 - orr r4, r4, #0x1 - b _020EBA48 - - arm_func_start _ll_sdiv -_ll_sdiv: ; 0x020EBA38 - stmdb sp!, {r4-r7,r11-r12,lr} - eor r4, r1, r3 - mov r4, r4, asr #0x1 - mov r4, r4, lsl #0x1 -_020EBA48: - orrs r5, r3, r2 - bne _020EBA58 - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr -_020EBA58: - mov r5, r0, lsr #0x1f - add r5, r5, r1 - mov r6, r2, lsr #0x1f - add r6, r6, r3 - orrs r6, r5, r6 - bne _020EBA8C - mov r1, r2 - bl _s32_div_f - ands r4, r4, #0x1 - movne r0, r1 - mov r1, r0, asr #0x1f - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr -_020EBA8C: - cmp r1, #0x0 - bge _020EBA9C - rsbs r0, r0, #0x0 - rsc r1, r1, #0x0 -_020EBA9C: - cmp r3, #0x0 - bge _020EBAAC - rsbs r2, r2, #0x0 - rsc r3, r3, #0x0 -_020EBAAC: - orrs r5, r1, r0 - beq _020EBBD0 - mov r5, #0x0 - mov r6, #0x1 - cmp r3, #0x0 - bmi _020EBAD8 -_020EBAC4: - add r5, r5, #0x1 - adds r2, r2, r2 - adcs r3, r3, r3 - bpl _020EBAC4 - add r6, r6, r5 -_020EBAD8: - cmp r1, #0x0 - blt _020EBAF8 -_020EBAE0: - cmp r6, #0x1 - beq _020EBAF8 - sub r6, r6, #0x1 - adds r0, r0, r0 - adcs r1, r1, r1 - bpl _020EBAE0 -_020EBAF8: - mov r7, #0x0 - mov r12, #0x0 - mov r11, #0x0 - b _020EBB20 -_020EBB08: - orr r12, r12, #0x1 - subs r6, r6, #0x1 - beq _020EBB78 - adds r0, r0, r0 - adcs r1, r1, r1 - adcs r7, r7, r7 -_020EBB20: - subs r0, r0, r2 - sbcs r1, r1, r3 - sbcs r7, r7, #0x0 - adds r12, r12, r12 - adc r11, r11, r11 - cmp r7, #0x0 - bge _020EBB08 -_020EBB3C: - subs r6, r6, #0x1 - beq _020EBB70 - adds r0, r0, r0 - adcs r1, r1, r1 - adc r7, r7, r7 - adds r0, r0, r2 - adcs r1, r1, r3 - adc r7, r7, #0x0 - adds r12, r12, r12 - adc r11, r11, r11 - cmp r7, #0x0 - bge _020EBB08 - b _020EBB3C -_020EBB70: - adds r0, r0, r2 - adc r1, r1, r3 -_020EBB78: - ands r7, r4, #0x1 - moveq r0, r12 - moveq r1, r11 - beq _020EBBB0 - subs r7, r5, #0x20 - movge r0, r1, lsr r7 - bge _020EBBD4 - rsb r7, r5, #0x20 - mov r0, r0, lsr r5 - orr r0, r0, r1, lsl r7 - mov r1, r1, lsr r5 - b _020EBBB0 -_020EBBA8: ; 0x020EBBA8 - mov r0, r1, lsr r7 - mov r1, #0x0 -_020EBBB0: - cmp r4, #0x0 - blt _020EBBC0 - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr -_020EBBC0: - rsbs r0, r0, #0x0 - rsc r1, r1, #0x0 - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr -_020EBBD0: - mov r0, #0x0 -_020EBBD4: - mov r1, #0x0 - cmp r4, #0x0 - blt _020EBBC0 - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr - - arm_func_start _ll_udiv -_ll_udiv: ; 0x020EBBE8 - stmdb sp!, {r4-r7,r11-r12,lr} - mov r4, #0x0 - b _020EBBFC - - arm_func_start _ull_mod -_ull_mod: ; 0x020EBBF4 - stmdb sp!, {r4-r7,r11-r12,lr} - mov r4, #0x1 -_020EBBFC: - orrs r5, r3, r2 - bne _020EBC0C - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr -_020EBC0C: - orrs r5, r1, r3 - bne _020EBAAC - mov r1, r2 - bl _u32_div_not_0_f -_020EBC1C: ; 0x020EBC1C - cmp r4, #0x0 - movne r0, r1 - mov r1, #0x0 - ldmia sp!, {r4-r7,r11-r12,lr} - bx lr - - arm_func_start _ll_mul -_ll_mul: ; 0x020EBC30 - stmdb sp!, {r4-r5,lr} - umull r5, r4, r0, r2 - mla r4, r0, r3, r4 - mla r4, r2, r1, r4 - mov r1, r4 - mov r0, r5 - ldmia sp!, {r4-r5,lr} - bx lr - - arm_func_start _ll_shl -_ll_shl: ; 0x020EBC50 - ands r2, r2, #0x3f - bxeq lr - subs r3, r2, #0x20 - bge _020EBC74 - rsb r3, r2, #0x20 - mov r1, r1, lsl r2 - orr r1, r1, r0, lsr r3 - mov r0, r0, lsl r2 - bx lr -_020EBC74: - mov r1, r0, lsl r3 - mov r0, #0x0 - bx lr - - arm_func_start _s32_div_f -_s32_div_f: ; 0x020EBC80 - eor r12, r0, r1 - and r12, r12, #0x80000000 - cmp r0, #0x0 - rsblt r0, r0, #0x0 - addlt r12, r12, #0x1 - cmp r1, #0x0 - rsblt r1, r1, #0x0 - beq _020EBE78 - cmp r0, r1 - movcc r1, r0 - movcc r0, #0x0 - blo _020EBE78 - mov r2, #0x1c - mov r3, r0, lsr #0x4 - cmp r1, r3, lsr #0xc - suble r2, r2, #0x10 - movle r3, r3, lsr #0x10 - cmp r1, r3, lsr #0x4 - suble r2, r2, #0x8 - movle r3, r3, lsr #0x8 - cmp r1, r3 - suble r2, r2, #0x4 - movle r3, r3, lsr #0x4 - mov r0, r0, lsl r2 - rsb r1, r1, #0x0 - adds r0, r0, r0 - add r2, r2, r2, lsl #0x1 - add pc, pc, r2, lsl #0x2 - mov r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - mov r1, r3 -_020EBE78: - ands r3, r12, #0x80000000 - rsbne r0, r0, #0x0 - ands r3, r12, #0x1 - rsbne r1, r1, #0x0 - bx lr - - arm_func_start _u32_div_f -_u32_div_f: ; 0x020EBE8C - cmp r1, #0x0 - bxeq lr - - arm_func_start _u32_div_not_0_f -_u32_div_not_0_f: - cmp r0, r1 - movcc r1, r0 - movcc r0, #0x0 - bxcc lr - mov r2, #0x1c - mov r3, r0, lsr #0x4 - cmp r1, r3, lsr #0xc - suble r2, r2, #0x10 - movle r3, r3, lsr #0x10 - cmp r1, r3, lsr #0x4 - suble r2, r2, #0x8 - movle r3, r3, lsr #0x8 - cmp r1, r3 - suble r2, r2, #0x4 - movle r3, r3, lsr #0x4 - mov r0, r0, lsl r2 - rsb r1, r1, #0x0 - adds r0, r0, r0 - add r2, r2, r2, lsl #0x1 - add pc, pc, r2, lsl #0x2 - mov r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - adcs r3, r1, r3, lsl #0x1 - subcc r3, r3, r1 - adcs r0, r0, r0 - mov r1, r3 - bx lr - - arm_func_start _drdiv -_drdiv: ; 0x020EC070 - eor r1, r1, r3 - eor r3, r1, r3 - eor r1, r1, r3 - eor r0, r0, r2 - eor r2, r0, r2 - eor r0, r0, r2 - - arm_func_start _ddiv -_ddiv: ; 0x020EC088 - stmdb sp!, {r4-r6,lr} - ldr lr, _020EC5C8 ; =0x00000FFE - eor r4, r1, r3 - ands r12, lr, r1, lsr #0x13 - cmpne r12, lr - beq _020EC434 - bic r1, r1, lr, lsl #0x14 - orr r1, r1, #0x100000 - add r12, r12, r4, lsr #0x1f -_020EC0AC: - ands r4, lr, r3, lsr #0x13 - cmpne r4, lr - beq _020EC4CC - bic r3, r3, lr, lsl #0x14 - orr r3, r3, #0x100000 -_020EC0C0: - sub r12, r12, r4 - cmp r1, r3 - cmpeq r0, r2 - bhs _020EC0DC - adds r0, r0, r0 - adc r1, r1, r1 - sub r12, r12, #0x2 -_020EC0DC: - sub r4, pc, #0x24 - ldrb lr, [r4, r3, lsr #0xc] - rsbs r2, r2, #0x0 - rsc r3, r3, #0x0 - mov r4, #0x20000000 - mla r5, lr, r3, r4 - mov r6, r3, lsl #0xa - mov r5, r5, lsr #0x7 - mul lr, r5, lr - orr r6, r6, r2, lsr #0x16 - mov lr, lr, lsr #0xd - mul r5, lr, r6 - mov r6, r1, lsl #0xa - orr r6, r6, r0, lsr #0x16 - mov r5, r5, lsr #0x10 - mul r5, lr, r5 - mov lr, lr, lsl #0xe - add lr, lr, r5, lsr #0x10 - umull r5, r6, lr, r6 - umull r4, r5, r6, r2 - mla r5, r3, r6, r5 - mov r4, r4, lsr #0x1a - orr r4, r4, r5, lsl #0x6 - add r4, r4, r0, lsl #0x2 - umull lr, r5, r4, lr - mov r4, #0x0 - adds r5, r5, r6, lsl #0x18 - adc r4, r4, r6, lsr #0x8 - cmp r12, #0x800 - bge _020EC2C0 - add r12, r12, #0x7f0 - adds r12, r12, #0xc - bmi _020EC2D8 - orr r1, r4, r12, lsl #0x1f - bic r12, r12, #0x1 - add r1, r1, r12, lsl #0x13 - tst lr, #0x80000000 - bne _020EC1B0 - rsbs r2, r2, #0x0 - mov r4, r4, lsl #0x1 - add r4, r4, r5, lsr #0x1f - mul lr, r2, r4 - mov r6, #0x0 - mov r4, r5, lsl #0x1 - orr r4, r4, #0x1 - umlal r6, lr, r4, r2 - rsc r3, r3, #0x0 - mla lr, r4, r3, lr - cmp lr, r0, lsl #0x15 - bmi _020EC1B0 - mov r0, r5 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC1B0: - adds r0, r5, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC1C0: ; not code - .byte 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0xFB, 0xFA, 0xF9, 0xF8, 0xF7, 0xF6, 0xF5, 0xF4, 0xF3, 0xF2, 0xF1 - .byte 0xF0, 0xF0, 0xEF, 0xEE, 0xED, 0xEC, 0xEB, 0xEA, 0xEA, 0xE9, 0xE8, 0xE7, 0xE6, 0xE6, 0xE5, 0xE4 - .byte 0xE3, 0xE2, 0xE2, 0xE1, 0xE0, 0xDF, 0xDF, 0xDE, 0xDD, 0xDC, 0xDC, 0xDB, 0xDA, 0xD9, 0xD9, 0xD8 - .byte 0xD7, 0xD7, 0xD6, 0xD5, 0xD4, 0xD4, 0xD3, 0xD2, 0xD2, 0xD1, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, 0xCD - .byte 0xCC, 0xCC, 0xCB, 0xCB, 0xCA, 0xC9, 0xC9, 0xC8, 0xC8, 0xC7, 0xC6, 0xC6, 0xC5, 0xC5, 0xC4, 0xC3 - .byte 0xC3, 0xC2, 0xC2, 0xC1, 0xC0, 0xC0, 0xBF, 0xBF, 0xBE, 0xBE, 0xBD, 0xBD, 0xBC, 0xBC, 0xBB, 0xBA - .byte 0xBA, 0xB9, 0xB9, 0xB8, 0xB8, 0xB7, 0xB7, 0xB6, 0xB6, 0xB5, 0xB5, 0xB4, 0xB4, 0xB3, 0xB3, 0xB2 - .byte 0xB2, 0xB1, 0xB1, 0xB0, 0xB0, 0xAF, 0xAF, 0xAF, 0xAE, 0xAE, 0xAD, 0xAD, 0xAC, 0xAC, 0xAB, 0xAB - .byte 0xAA, 0xAA, 0xAA, 0xA9, 0xA9, 0xA8, 0xA8, 0xA7, 0xA7, 0xA7, 0xA6, 0xA6, 0xA5, 0xA5, 0xA4, 0xA4 - .byte 0xA4, 0xA3, 0xA3, 0xA2, 0xA2, 0xA2, 0xA1, 0xA1, 0xA0, 0xA0, 0xA0, 0x9F, 0x9F, 0x9E, 0x9E, 0x9E - .byte 0x9D, 0x9D, 0x9D, 0x9C, 0x9C, 0x9B, 0x9B, 0x9B, 0x9A, 0x9A, 0x9A, 0x99, 0x99, 0x99, 0x98, 0x98 - .byte 0x98, 0x97, 0x97, 0x96, 0x96, 0x96, 0x95, 0x95, 0x95, 0x94, 0x94, 0x94, 0x93, 0x93, 0x93, 0x92 - .byte 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, 0x90, 0x90, 0x90, 0x8F, 0x8F, 0x8F, 0x8E, 0x8E, 0x8E, 0x8D - .byte 0x8D, 0x8D, 0x8C, 0x8C, 0x8C, 0x8C, 0x8B, 0x8B, 0x8B, 0x8A, 0x8A, 0x8A, 0x8A, 0x89, 0x89, 0x89 - .byte 0x88, 0x88, 0x88, 0x88, 0x87, 0x87, 0x87, 0x86, 0x86, 0x86, 0x86, 0x85, 0x85, 0x85, 0x85, 0x84 - .byte 0x84, 0x84, 0x83, 0x83, 0x83, 0x83, 0x82, 0x82, 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x80, 0x80 -_020EC2C0: - movs r1, r12, lsl #0x1f - orr r1, r1, #0x7f000000 - orr r1, r1, #0xf00000 - mov r0, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC2D8: - mvn r6, r12, asr #0x1 - cmp r6, #0x34 - bgt _020EC424 - beq _020EC400 - cmp r6, #0x14 - bge _020EC320 - rsb r6, r6, #0x13 - mov lr, r0, lsl r6 - rsb r6, r6, #0x14 - mov r0, r5, lsr r6 - rsb r6, r6, #0x20 - orr r0, r0, r4, lsl r6 - rsb r6, r6, #0x20 - mov r4, r4, lsr r6 - orr r1, r4, r12, lsl #0x1f - mov r12, lr - mov lr, #0x0 - b _020EC350 -_020EC320: - rsb r6, r6, #0x33 - mov lr, r1, lsl r6 - mov r1, r12, lsl #0x1f - rsb r6, r6, #0x20 - orr r12, lr, r0, lsr r6 - rsb r6, r6, #0x20 - mov lr, r0, lsl r6 - mov r5, r5, lsr #0x15 - orr r5, r5, r4, lsl #0xb - rsb r6, r6, #0x1f - mov r0, r5, lsr r6 - mov r4, #0x0 -_020EC350: - rsbs r2, r2, #0x0 - mul r4, r2, r4 - mov r5, #0x0 - umlal r5, r4, r2, r0 - rsc r3, r3, #0x0 - mla r4, r0, r3, r4 - cmp r4, r12 - cmpeq r5, lr - ldmeqia sp!, {r4-r6,lr} - bxeq lr - adds r5, r5, r2 - adc r4, r4, r3 - cmp r4, r12 - bmi _020EC3F4 - bne _020EC398 - cmp r5, lr - beq _020EC3E4 - blo _020EC3F4 -_020EC398: - subs r5, r5, r2 - sbc r4, r4, r3 -_020EC3A0: - adds r5, r5, r5 - adc r4, r4, r4 - adds r5, r5, r2 - adc r4, r4, r3 - adds lr, lr, lr - adc r12, r12, r12 - cmp r4, r12 - bmi _020EC3E4 - ldmneia sp!, {r4-r6,lr} - bxne lr - cmp r5, lr - blo _020EC3E4 - ldmneia sp!, {r4-r6,lr} - bxne lr - tst r0, #0x1 - ldmeqia sp!, {r4-r6,lr} - bxeq lr -_020EC3E4: - adds r0, r0, #0x1 - adc r1, r1, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC3F4: - adds r0, r0, #0x1 - adc r1, r1, #0x0 - b _020EC3A0 -_020EC400: - rsbs r2, r2, #0x0 - rsc r3, r3, #0x0 - cmp r1, r3 - cmpeq r0, r2 - mov r1, r12, lsl #0x1f - mov r0, #0x0 - movne r0, #0x1 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC424: - mov r1, r12, lsl #0x1f - mov r0, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC434: - orrs r5, r0, r1, lsl #0x1 - beq _020EC558 - cmp r12, lr - beq _020EC49C - movs r1, r1, lsl #0xc - beq _020EC478 - clz r5, r1 - movs r1, r1, lsl r5 - sub r12, r12, r5 - add r5, r12, #0x1f - mov r1, r1, lsr #0xb - orr r1, r1, r0, lsr r5 - rsb r5, r5, #0x20 - mov r0, r0, lsl r5 - mov r12, r12, lsl #0x1 - orr r12, r12, r4, lsr #0x1f - b _020EC0AC -_020EC478: - mvn r12, #0x13 - clz r5, r0 - movs r0, r0, lsl r5 - sub r12, r12, r5 - mov r1, r0, lsr #0xb - mov r0, r0, lsl #0x15 - mov r12, r12, lsl #0x1 - orr r12, r12, r4, lsr #0x1f - b _020EC0AC -_020EC49C: - orrs r5, r0, r1, lsl #0xc - bne _020EC580 - bic r5, r3, #0x80000000 - cmp r5, lr, lsl #0x13 - bhs _020EC4C0 - and r5, r3, #0x80000000 - eor r1, r5, r1 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC4C0: - orrs r5, r2, r3, lsl #0xc - bne _020EC5A0 - b _020EC5B8 -_020EC4CC: - orrs r5, r2, r3, lsl #0x1 - beq _020EC544 - cmp r4, lr - beq _020EC52C - movs r3, r3, lsl #0xc - beq _020EC50C - clz r5, r3 - movs r3, r3, lsl r5 - sub r4, r4, r5 - add r5, r4, #0x1f - mov r3, r3, lsr #0xb - orr r3, r3, r2, lsr r5 - rsb r5, r5, #0x20 - mov r2, r2, lsl r5 - mov r4, r4, lsl #0x1 - b _020EC0C0 -_020EC50C: - mvn r4, #0x13 - clz r5, r2 - movs r2, r2, lsl r5 - sub r4, r4, r5 - mov r3, r2, lsr #0xb - mov r2, r2, lsl #0x15 - mov r4, r4, lsl #0x1 - b _020EC0C0 -_020EC52C: - orrs r5, r2, r3, lsl #0xc - bne _020EC5A0 - mov r1, r12, lsl #0x1f - mov r0, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC544: - mov r1, r12, lsl #0x1f - orr r1, r1, lr, lsl #0x13 - mov r0, #0x0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC558: - orrs r5, r2, r3, lsl #0x1 - beq _020EC5B8 - bic r5, r3, #0x80000000 - cmp r5, lr, lsl #0x13 - cmpeq r2, #0x0 - bhi _020EC5A0 - eor r1, r1, r3 - and r1, r1, #0x80000000 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC580: - tst r1, #0x80000 - beq _020EC5B8 - bic r5, r3, #0x80000000 - cmp r5, lr, lsl #0x13 - cmpeq r2, #0x0 - bhi _020EC5A0 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC5A0: - tst r3, #0x80000 - beq _020EC5B8 - mov r1, r3 - mov r0, r2 - ldmia sp!, {r4-r6,lr} - bx lr -_020EC5B8: - orr r1, r1, #0x7f000000 - orr r1, r1, #0xf80000 - ldmia sp!, {r4-r6,lr} - bx lr - .balign 4 -_020EC5C8: .word 0x00000FFE - - arm_func_start _fp_init -_fp_init: ; 0x020EC5CC - bx lr - - arm_func_start sys_writec -sys_writec: ; 0x020EC5D0 - str lr, [sp, #-0x4]! - mov r1, r0 - mov r0, #0x3 - swi 0x123456 - ldr pc, [sp], #0x4 - - arm_func_start sys_readc -sys_readc: ; 0x020EC5E4 - str lr, [sp, #-0x4]! - mov r1, #0x0 - mov r0, #0x7 - swi 0x123456 - ldr pc, [sp], #0x4 - - arm_func_start sys_exit -sys_exit: ; 0x020EC5F8 - mov r1, #0x0 - mov r0, #0x18 - swi 0x123456 - mov pc, lr - - arm_func_start __read_console -__read_console: ; 0x020EC608 - stmdb sp!, {r3-r7,lr} - mov r6, r2 - ldr r5, [r6, #0x0] - mov r7, r1 - cmp r5, #0x0 - mov r4, #0x0 - bls _020EC650 -_020EC624: - bl sys_readc - and r1, r0, #0xff - cmp r1, #0xd - strb r0, [r7, r4] - cmpne r1, #0xa - addeq r0, r4, #0x1 - streq r0, [r6, #0x0] - beq _020EC650 - add r4, r4, #0x1 - cmp r4, r5 - blo _020EC624 -_020EC650: - mov r0, #0x0 - ldmia sp!, {r3-r7,pc} - - arm_func_start __write_console -__write_console: ; 0x020EC658 - stmdb sp!, {r4-r6,lr} - ldr r5, [r2, #0x0] - mov r6, r1 - cmp r5, #0x0 - mov r4, #0x0 - bls _020EC684 -_020EC670: - add r0, r6, r4 - bl sys_writec - add r4, r4, #0x1 - cmp r4, r5 - blo _020EC670 -_020EC684: - mov r0, #0x0 - ldmia sp!, {r4-r6,pc} - - arm_func_start __close_console -__close_console: ; 0x020EC68C - mov r0, #0x0 - bx lr - - arm_func_start __call_static_initializers -__call_static_initializers: ; 0x020EC694 - stmdb sp!, {r4,lr} - ldr r4, _020EC6BC ; =0x02104774 - b _020EC6A8 -_020EC6A0: - blx r0 - add r4, r4, #0x4 -_020EC6A8: - cmp r4, #0x0 - ldrne r0, [r4, #0x0] - cmpne r0, #0x0 - bne _020EC6A0 - ldmia sp!, {r4,pc} - .balign 4 -_020EC6BC: .word 0x02104774 - - arm_func_start __destroy_global_chain -__destroy_global_chain: ; 0x020EC6C0 - stmdb sp!, {r3-r5,lr} - ldr r4, _020EC700 ; =0x021D74C8 - ldr r2, [r4, #0x0] - cmp r2, #0x0 - ldmeqia sp!, {r3-r5,pc} -_020EC6D4: ; 0x020EC6D4 - mvn r5, #0x0 -_020EC6D8: - ldr r0, [r2, #0x0] - mov r1, r5 - str r0, [r4, #0x0] - ldr r0, [r2, #0x8] - ldr r2, [r2, #0x4] - blx r2 - ldr r2, [r4, #0x0] - cmp r2, #0x0 - bne _020EC6D8 - ldmia sp!, {r3-r5,pc} - .balign 4 -_020EC700: .word 0x021D74C8 - - arm_func_start _ExitProcess -_ExitProcess: ; 0x020EC704 - ldr ip, _020EC70C ; =sys_exit - bx r12 - .balign 4 -_020EC70C: .word sys_exit diff --git a/arm9/asm/libc.s b/arm9/asm/libc.s new file mode 100644 index 00000000..0627aa20 --- /dev/null +++ b/arm9/asm/libc.s @@ -0,0 +1,13882 @@ + .include "asm/macros.inc" + .include "global.inc" + .section .text + .balign 4, 0 + + arm_func_start abort +abort: ; 0x020DE14C + stmdb sp!, {r3,lr} + mov r0, #0x1 + bl raise + ldr r1, _020DE16C ; =0x021D6F78 + mov r0, #0x1 + str r0, [r1, #0xc] + bl exit + ldmia sp!, {r3,pc} + .balign 4 +_020DE16C: .word 0x021D6F78 + + arm_func_start exit +exit: ; 0x020DE170 + stmdb sp!, {r4,lr} + ldr r1, _020DE1B8 ; =0x021D6F78 + mov r4, r0 + ldr r0, [r1, #0xc] + cmp r0, #0x0 + bne _020DE1AC + bl __destroy_global_chain + ldr r0, _020DE1B8 ; =0x021D6F78 + ldr r0, [r0, #0x4] + cmp r0, #0x0 + beq _020DE1AC + blx r0 + ldr r0, _020DE1B8 ; =0x021D6F78 + mov r1, #0x0 + str r1, [r0, #0x4] +_020DE1AC: + mov r0, r4 + bl __exit + ldmia sp!, {r4,pc} + .balign 4 +_020DE1B8: .word 0x021D6F78 + + arm_func_start __exit +__exit: ; 0x020DE1BC + stmdb sp!, {r3-r5,lr} + ldr r0, _020DE2CC ; =0x021D70D0 + bl OS_TryLockMutex +_020DE1C8: ; 0x020DE1C8 + cmp r0, #0x0 + bne _020DE1F4 + ldr r0, _020DE2D0 ; =0x021D3498 + ldr r1, _020DE2D4 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020DE2D8 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0x0] + str r2, [r0, #0x0] + b _020DE24C +_020DE1F4: + ldr r0, _020DE2D0 ; =0x021D3498 + ldr r1, _020DE2D4 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, #0x0] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020DE224 + ldr r0, _020DE2D8 ; =0x021D70AC + ldr r1, [r0, #0x0] + add r1, r1, #0x1 + str r1, [r0, #0x0] + b _020DE24C +_020DE224: + ldr r0, _020DE2CC ; =0x021D70D0 + bl OS_LockMutex + ldr r0, _020DE2D0 ; =0x021D3498 + ldr r1, _020DE2D4 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020DE2D8 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0x0] + str r2, [r0, #0x0] +_020DE24C: + ldr r4, _020DE2DC ; =0x021D6F78 + ldr r0, [r4, #0x8] + cmp r0, #0x0 + ble _020DE280 + ldr r5, _020DE2E0 ; =0x021D6F88 +_020DE260: + ldr r0, [r4, #0x8] + sub r1, r0, #0x1 + ldr r0, [r5, r1, lsl #0x2] + str r1, [r4, #0x8] + blx r0 + ldr r0, [r4, #0x8] + cmp r0, #0x0 + bgt _020DE260 +_020DE280: + ldr r0, _020DE2D8 ; =0x021D70AC + ldr r1, [r0, #0x0] + subs r1, r1, #0x1 + str r1, [r0, #0x0] + bne _020DE29C + ldr r0, _020DE2CC ; =0x021D70D0 + bl OS_UnlockMutex +_020DE29C: + ldr r0, _020DE2DC ; =0x021D6F78 + ldr r0, [r0, #0x0] + cmp r0, #0x0 + beq _020DE2BC + blx r0 + ldr r0, _020DE2DC ; =0x021D6F78 + mov r1, #0x0 + str r1, [r0, #0x0] +_020DE2BC: + mov r0, #0x0 + bl fflush + bl _ExitProcess + ldmia sp!, {r3-r5,pc} + .balign 4 +_020DE2CC: .word 0x021D70D0 +_020DE2D0: .word 0x021D3498 +_020DE2D4: .word 0x021D7088 +_020DE2D8: .word 0x021D70AC +_020DE2DC: .word 0x021D6F78 +_020DE2E0: .word 0x021D6F88 + + arm_func_start nan +nan: ; 0x020DE2E4 + ldr r0, _020DE2F4 ; =0x02106B78 + ldr ip, _020DE2F8 ; =_f2d + ldr r0, [r0, #0x0] + bx r12 + .balign 4 +_020DE2F4: .word 0x02106B78 +_020DE2F8: .word _f2d + + arm_func_start __flush_line_buffered_output_files +__flush_line_buffered_output_files: + stmdb sp!, {r3-r9,lr} + ldr r0, _020DE384 ; =0x02106A58 + mov r4, #0x0 + mov r5, #0x1 + mov r8, r0 + mvn r9, #0x0 + mov r7, r4 + mov r6, #0x4c +_020DE31C: + ldr r1, [r0, #0x4] + mov r2, r1, lsl #0x16 + movs r2, r2, lsr #0x1d + beq _020DE35C + mov r1, r1, lsl #0x19 + mov r1, r1, lsr #0x1e + tst r1, #0x1 + beq _020DE35C + ldr r1, [r0, #0x8] + mov r1, r1, lsl #0x1d + mov r1, r1, lsr #0x1d + cmp r1, #0x1 + bne _020DE35C + bl fflush +_020DE354: ; 0x020DE354 + cmp r0, #0x0 + movne r4, r9 +_020DE35C: + cmp r5, #0x3 + movge r0, r7 + bge _020DE374 + mul r0, r5, r6 + add r5, r5, #0x1 + add r0, r8, r0 +_020DE374: + cmp r0, #0x0 + bne _020DE31C + mov r0, r4 + ldmia sp!, {r3-r9,pc} + .balign 4 +_020DE384: .word 0x02106A58 + + arm_func_start __flush_all +__flush_all: ; 0x020DE388 + stmdb sp!, {r3-r9,lr} + ldr r0, _020DE3EC ; =0x02106A58 + mov r4, #0x0 + mov r5, #0x1 + mov r8, r0 + mvn r9, #0x0 + mov r7, r4 + mov r6, #0x4c +_020DE3A8: + ldr r1, [r0, #0x4] + mov r1, r1, lsl #0x16 + movs r1, r1, lsr #0x1d + beq _020DE3C4 + bl fflush +_020DE3BC: ; 0x020DE3BC + cmp r0, #0x0 + movne r4, r9 +_020DE3C4: + cmp r5, #0x3 + movge r0, r7 + bge _020DE3DC + mul r0, r5, r6 + add r5, r5, #0x1 + add r0, r8, r0 +_020DE3DC: + cmp r0, #0x0 + bne _020DE3A8 + mov r0, r4 + ldmia sp!, {r3-r9,pc} + .balign 4 +_020DE3EC: .word 0x02106A58 + + arm_func_start abs +abs: ; 0x020DE3F0 + cmp r0, #0x0 + rsblt r0, r0, #0x0 + bx lr + + arm_func_start __msl_assertion_failed +__msl_assertion_failed: ; 0x020DE3FC + stmdb sp!, {r3-r4,lr} + sub sp, sp, #0x4 + mov r4, r0 + mov lr, r1 + mov r12, r2 + str r3, [sp, #0x0] + ldr r0, _020DE434 ; =0x02106B3C + mov r1, r4 + mov r2, lr + mov r3, r12 + bl printf + bl abort + add sp, sp, #0x4 + ldmia sp!, {r3-r4,pc} + .balign 4 +_020DE434: .word 0x02106B3C + + arm_func_start __convert_from_newlines +__convert_from_newlines: + bx lr + + arm_func_start __convert_to_newlines +__convert_to_newlines: + bx lr + + arm_func_start __prep_buffer +__prep_buffer: + ldr r1, [r0, #0x1c] + str r1, [r0, #0x24] + ldr r3, [r0, #0x20] + str r3, [r0, #0x28] + ldr r2, [r0, #0x18] + ldr r1, [r0, #0x2c] + and r1, r2, r1 + sub r1, r3, r1 + str r1, [r0, #0x28] + ldr r1, [r0, #0x18] + str r1, [r0, #0x34] + bx lr + + arm_func_start __load_buffer +__load_buffer: + stmdb sp!, {r4-r6,lr} + mov r5, r2 + mov r4, r0 + mov r6, r1 + bl __prep_buffer + cmp r5, #0x1 + ldreq r0, [r4, #0x20] + add r2, r4, #0x28 + streq r0, [r4, #0x28] + ldr r0, [r4, #0x0] + ldr r1, [r4, #0x1c] + ldr r3, [r4, #0x48] + ldr r12, [r4, #0x3c] + blx r12 + cmp r0, #0x2 + moveq r1, #0x0 + streq r1, [r4, #0x28] + cmp r6, #0x0 + ldrne r1, [r4, #0x28] + strne r1, [r6, #0x0] + cmp r0, #0x0 + ldmneia sp!, {r4-r6,pc} +_020DE4C8: ; 0x020DE4C8 + ldr r1, [r4, #0x18] + ldr r0, [r4, #0x28] + add r0, r1, r0 + str r0, [r4, #0x18] + ldr r0, [r4, #0x4] + mov r0, r0, lsl #0x13 + movs r0, r0, lsr #0x1f + bne _020DE4F4 + ldr r0, [r4, #0x1c] + add r1, r4, #0x28 + bl __convert_to_newlines +_020DE4F4: + mov r0, #0x0 + ldmia sp!, {r4-r6,pc} + + arm_func_start __flush_buffer +__flush_buffer: + stmdb sp!, {r3-r5,lr} + mov r5, r0 + ldr r2, [r5, #0x24] + ldr r0, [r5, #0x1c] + mov r4, r1 + subs r0, r2, r0 + beq _020DE574 + str r0, [r5, #0x28] + ldr r0, [r5, #0x4] + mov r0, r0, lsl #0x13 + movs r0, r0, lsr #0x1f + bne _020DE538 + ldr r0, [r5, #0x1c] + add r1, r5, #0x28 + bl __convert_from_newlines +_020DE538: + ldr r0, [r5, #0x0] + ldr r1, [r5, #0x1c] + ldr r3, [r5, #0x48] + ldr r12, [r5, #0x40] + add r2, r5, #0x28 + blx r12 + cmp r4, #0x0 + ldrne r1, [r5, #0x28] + strne r1, [r4, #0x0] + cmp r0, #0x0 + ldmneia sp!, {r3-r5,pc} +_020DE564: ; 0x020DE564 + ldr r1, [r5, #0x18] + ldr r0, [r5, #0x28] + add r0, r1, r0 + str r0, [r5, #0x18] +_020DE574: + mov r0, r5 + bl __prep_buffer +_020DE57C: ; 0x020DE57C + mov r0, #0x0 + ldmia sp!, {r3-r5,pc} + + arm_func_start fread +fread: ; 0x020DE584 + stmdb sp!, {r4-r10,lr} + ldr r4, _020DE67C ; =0x02106A58 + mov r7, r3 + cmp r7, r4 + moveq r6, #0x2 + mov r10, r0 + movne r6, #0x5 + mov r0, #0x18 + mul r4, r6, r0 + ldr r5, _020DE680 ; =0x021D70D0 + mov r9, r1 + add r0, r5, r4 + mov r8, r2 + bl OS_TryLockMutex +_020DE5BC: ; 0x020DE5BC + cmp r0, #0x0 + bne _020DE5E8 + ldr r0, _020DE684 ; =0x021D3498 + ldr r2, _020DE688 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DE68C ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] + b _020DE640 +_020DE5E8: + ldr r0, _020DE684 ; =0x021D3498 + ldr r1, _020DE688 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, r6, lsl #0x2] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020DE618 + ldr r1, _020DE68C ; =0x021D70AC + ldr r0, [r1, r6, lsl #0x2] + add r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + b _020DE640 +_020DE618: + add r0, r5, r4 + bl OS_LockMutex + ldr r0, _020DE684 ; =0x021D3498 + ldr r2, _020DE688 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DE68C ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] +_020DE640: + mov r0, r10 + mov r1, r9 + mov r2, r8 + mov r3, r7 + bl __fread + ldr r1, _020DE68C ; =0x021D70AC + mov r7, r0 + ldr r0, [r1, r6, lsl #0x2] + subs r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + bne _020DE674 + add r0, r5, r4 + bl OS_UnlockMutex +_020DE674: + mov r0, r7 + ldmia sp!, {r4-r10,pc} + .balign 4 +_020DE67C: .word 0x02106A58 +_020DE680: .word 0x021D70D0 +_020DE684: .word 0x021D3498 +_020DE688: .word 0x021D7088 +_020DE68C: .word 0x021D70AC + + arm_func_start __fread +__fread: ; 0x020DE690 + stmdb sp!, {r3-r10,lr} + sub sp, sp, #0x4 + mov r7, r3 + mov r9, r0 + mov r8, r1 + mov r0, r7 + mov r1, #0x0 + mov r4, r2 + bl fwide +_020DE6B4: ; 0x020DE6B4 + cmp r0, #0x0 + bne _020DE6C8 + mov r0, r7 + mvn r1, #0x0 + bl fwide +_020DE6C8: + muls r4, r8, r4 + beq _020DE6EC + ldrb r0, [r7, #0xd] + cmp r0, #0x0 + bne _020DE6EC + ldr r1, [r7, #0x4] + mov r0, r1, lsl #0x16 + movs r0, r0, lsr #0x1d + bne _020DE6F8 +_020DE6EC: + add sp, sp, #0x4 + mov r0, #0x0 + ldmia sp!, {r3-r10,pc} +_020DE6F8: + mov r0, r1, lsl #0x13 + movs r0, r0, lsr #0x1f + movne r0, r1, lsl #0x19 + movne r0, r0, lsr #0x1e + ldr r1, [r7, #0x8] + cmpne r0, #0x2 + mov r6, #0x1 + mov r0, r1, lsl #0x1d + movne r6, #0x0 + movs r0, r0, lsr #0x1d + bne _020DE74C + ldr r0, [r7, #0x4] + mov r0, r0, lsl #0x1b + mov r0, r0, lsr #0x1d + tst r0, #0x1 + beq _020DE74C + bic r0, r1, #0x7 + orr r0, r0, #0x2 + str r0, [r7, #0x8] + mov r0, #0x0 + str r0, [r7, #0x28] +_020DE74C: + ldr r0, [r7, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x2 + bhs _020DE778 + mov r0, #0x1 + strb r0, [r7, #0xd] + mov r0, #0x0 + add sp, sp, #0x4 + str r0, [r7, #0x28] + ldmia sp!, {r3-r10,pc} +_020DE778: + ldr r0, [r7, #0x4] + mov r0, r0, lsl #0x19 + mov r0, r0, lsr #0x1e + tst r0, #0x1 + beq _020DE7B0 + bl __flush_line_buffered_output_files +_020DE790: ; 0x020DE790 + cmp r0, #0x0 + beq _020DE7B0 + mov r0, #0x1 + strb r0, [r7, #0xd] + mov r0, #0x0 + add sp, sp, #0x4 + str r0, [r7, #0x28] + ldmia sp!, {r3-r10,pc} +_020DE7B0: + cmp r4, #0x0 + mov r5, #0x0 + beq _020DE874 + ldr r0, [r7, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x3 + blo _020DE874 + mov r10, r5 +_020DE7D4: + mov r0, r7 + mov r1, r10 + bl fwide + cmp r0, #0x1 + ldr r0, [r7, #0x8] + bne _020DE808 + mov r0, r0, lsl #0x1d + add r0, r7, r0, lsr #0x1c + ldrh r0, [r0, #0xe] + add r5, r5, #0x2 + sub r4, r4, #0x2 + strh r0, [r9], #0x2 + b _020DE820 +_020DE808: + mov r0, r0, lsl #0x1d + add r0, r7, r0, lsr #0x1d + ldrb r0, [r0, #0xf] + add r5, r5, #0x1 + sub r4, r4, #0x1 + strb r0, [r9], #0x1 +_020DE820: + ldr r1, [r7, #0x8] + cmp r4, #0x0 + mov r0, r1, lsl #0x1d + mov r0, r0, lsr #0x1d + sub r0, r0, #0x1 + bic r1, r1, #0x7 + and r0, r0, #0x7 + orr r0, r1, r0 + str r0, [r7, #0x8] + beq _020DE85C + ldr r0, [r7, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x3 + bhs _020DE7D4 +_020DE85C: + ldr r0, [r7, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x2 + ldreq r0, [r7, #0x30] + streq r0, [r7, #0x28] +_020DE874: + cmp r4, #0x0 + beq _020DE938 + ldr r0, [r7, #0x28] + cmp r0, #0x0 + cmpeq r6, #0x0 + beq _020DE938 + mov r10, #0x0 +_020DE890: + ldr r0, [r7, #0x28] + cmp r0, #0x0 + bne _020DE8E4 + mov r0, r7 + mov r1, r10 + mov r2, r10 + bl __load_buffer +_020DE8AC: ; 0x020DE8AC + cmp r0, #0x0 + beq _020DE8E4 + cmp r0, #0x1 + mov r0, #0x1 + streqb r0, [r7, #0xd] + beq _020DE8D4 + ldr r1, [r7, #0x8] + bic r1, r1, #0x7 + str r1, [r7, #0x8] + strb r0, [r7, #0xc] +_020DE8D4: + mov r0, #0x0 + str r0, [r7, #0x28] + mov r4, #0x0 + b _020DE938 +_020DE8E4: + ldr r0, [r7, #0x28] + str r0, [sp, #0x0] + cmp r0, r4 + strhi r4, [sp, #0x0] + ldr r1, [r7, #0x24] + ldr r2, [sp, #0x0] + mov r0, r9 + bl memcpy + ldr r2, [sp, #0x0] + ldr r0, [r7, #0x24] + subs r4, r4, r2 + add r0, r0, r2 + str r0, [r7, #0x24] + ldr r1, [r7, #0x28] + ldr r0, [sp, #0x0] + add r9, r9, r2 + sub r0, r1, r0 + add r5, r5, r2 + str r0, [r7, #0x28] + cmpne r6, #0x0 + bne _020DE890 +_020DE938: + cmp r4, #0x0 + beq _020DE9C4 + cmp r6, #0x0 + bne _020DE9C4 + ldr r6, [r7, #0x1c] + ldr r10, [r7, #0x20] + add r1, sp, #0x0 + str r9, [r7, #0x1c] + mov r0, r7 + mov r2, #0x1 + str r4, [r7, #0x20] + bl __load_buffer +_020DE968: ; 0x020DE968 + cmp r0, #0x0 + beq _020DE9A4 + cmp r0, #0x1 + mov r0, #0x1 + bne _020DE98C + strb r0, [r7, #0xd] + mov r0, #0x0 + str r0, [r7, #0x28] + b _020DE9A4 +_020DE98C: + ldr r1, [r7, #0x8] + bic r1, r1, #0x7 + str r1, [r7, #0x8] + strb r0, [r7, #0xc] + mov r0, #0x0 + str r0, [r7, #0x28] +_020DE9A4: + ldr r1, [sp, #0x0] + mov r0, r7 + str r6, [r7, #0x1c] + str r10, [r7, #0x20] + add r5, r5, r1 + bl __prep_buffer +_020DE9BC: ; 0x020DE9BC + mov r0, #0x0 + str r0, [r7, #0x28] +_020DE9C4: + mov r0, r5 + mov r1, r8 + bl _u32_div_f + add sp, sp, #0x4 + ldmia sp!, {r3-r10,pc} + + arm_func_start __fwrite +__fwrite: + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x8 + mov r9, r3 + mov r10, r0 + str r1, [sp, #0x0] + mov r0, r9 + mov r1, #0x0 + mov r4, r2 + bl fwide +_020DE9FC: ; 0x020DE9FC + cmp r0, #0x0 + bne _020DEA10 + mov r0, r9 + mvn r1, #0x0 + bl fwide +_020DEA10: + ldr r0, [sp, #0x0] + muls r5, r0, r4 + beq _020DEA38 + ldrb r0, [r9, #0xd] + cmp r0, #0x0 + bne _020DEA38 + ldr r1, [r9, #0x4] + mov r0, r1, lsl #0x16 + movs r0, r0, lsr #0x1d + bne _020DEA44 +_020DEA38: + add sp, sp, #0x8 + mov r0, #0x0 + ldmia sp!, {r3-r11,pc} +_020DEA44: + mov r0, r1, lsl #0x13 + movs r0, r0, lsr #0x1f + movne r0, r1, lsl #0x19 + movne r0, r0, lsr #0x1e + cmpne r0, #0x2 + ldr r1, [r9, #0x8] + cmpne r0, #0x1 + mov r8, #0x1 + mov r0, r1, lsl #0x1d + movne r8, #0x0 + movs r0, r0, lsr #0x1d + bne _020DEA9C + ldr r0, [r9, #0x4] + mov r0, r0, lsl #0x1b + mov r0, r0, lsr #0x1d + tst r0, #0x2 + beq _020DEA9C + bic r0, r1, #0x7 + orr r1, r0, #0x1 + mov r0, r9 + str r1, [r9, #0x8] + bl __prep_buffer +_020DEA9C: + ldr r0, [r9, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x1 + beq _020DEAC8 + mov r0, #0x1 + strb r0, [r9, #0xd] + mov r0, #0x0 + add sp, sp, #0x8 + str r0, [r9, #0x28] + ldmia sp!, {r3-r11,pc} +_020DEAC8: + cmp r5, #0x0 + mov r6, #0x0 + beq _020DEBF0 + ldr r0, [r9, #0x1c] + ldr r2, [r9, #0x24] + cmp r2, r0 + cmpeq r8, #0x0 + beq _020DEBF0 + ldr r1, [r9, #0x20] + sub r0, r2, r0 + sub r0, r1, r0 + str r0, [r9, #0x28] + mov r11, #0xa + mov r4, #0x0 +_020DEB00: + ldr r0, [r9, #0x28] + mov r7, r4 + str r0, [sp, #0x4] + cmp r0, r5 + strhi r5, [sp, #0x4] + ldr r0, [r9, #0x4] + mov r0, r0, lsl #0x19 + mov r0, r0, lsr #0x1e + cmp r0, #0x1 + bne _020DEB50 + ldr r2, [sp, #0x4] + cmp r2, #0x0 + beq _020DEB50 + mov r0, r10 + mov r1, r11 + bl __memrchr + movs r7, r0 + addne r0, r7, #0x1 + subne r0, r0, r10 + strne r0, [sp, #0x4] +_020DEB50: + ldr r2, [sp, #0x4] + cmp r2, #0x0 + beq _020DEB90 + ldr r0, [r9, #0x24] + mov r1, r10 + bl memcpy + ldr r2, [sp, #0x4] + ldr r0, [r9, #0x24] + add r10, r10, r2 + add r0, r0, r2 + str r0, [r9, #0x24] + ldr r1, [r9, #0x28] + ldr r0, [sp, #0x4] + sub r5, r5, r2 + sub r0, r1, r0 + str r0, [r9, #0x28] +_020DEB90: + ldr r0, [r9, #0x28] + cmp r0, #0x0 + beq _020DEBB4 + cmp r7, #0x0 + bne _020DEBB4 + ldr r0, [r9, #0x4] + mov r0, r0, lsl #0x19 + movs r0, r0, lsr #0x1e + bne _020DEBDC +_020DEBB4: + mov r0, r9 + mov r1, #0x0 + bl __flush_buffer +_020DEBC0: ; 0x020DEBC0 + cmp r0, #0x0 + beq _020DEBDC + mov r0, #0x1 + strb r0, [r9, #0xd] + mov r5, #0x0 + str r5, [r9, #0x28] + b _020DEBF0 +_020DEBDC: + ldr r0, [sp, #0x4] + cmp r5, #0x0 + add r6, r6, r0 + cmpne r8, #0x0 + bne _020DEB00 +_020DEBF0: + cmp r5, #0x0 + beq _020DEC5C + cmp r8, #0x0 + bne _020DEC5C + ldr r4, [r9, #0x1c] + ldr r7, [r9, #0x20] + add r2, r10, r5 + str r10, [r9, #0x1c] + str r5, [r9, #0x20] + add r1, sp, #0x4 + mov r0, r9 + str r2, [r9, #0x24] + bl __flush_buffer +_020DEC24: ; 0x020DEC24 + cmp r0, #0x0 + ldreq r0, [sp, #0x4] + addeq r6, r6, r0 + beq _020DEC44 + mov r0, #0x1 + strb r0, [r9, #0xd] + mov r0, #0x0 + str r0, [r9, #0x28] +_020DEC44: + str r4, [r9, #0x1c] + mov r0, r9 + str r7, [r9, #0x20] + bl __prep_buffer +_020DEC54: ; 0x020DEC54 + mov r0, #0x0 + str r0, [r9, #0x28] +_020DEC5C: + ldr r0, [r9, #0x4] + ldr r1, [sp, #0x0] + mov r0, r0, lsl #0x19 + mov r0, r0, lsr #0x1e + cmp r0, #0x2 + movne r0, #0x0 + strne r0, [r9, #0x28] + mov r0, r6 + bl _u32_div_f + add sp, sp, #0x8 + ldmia sp!, {r3-r11,pc} + + arm_func_start fclose +fclose: ; 0x020DEC88 + stmdb sp!, {r3-r5,lr} + movs r5, r0 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020DEC98: ; 0x020DEC98 + ldr r1, [r5, #0x4] + mov r1, r1, lsl #0x16 + movs r1, r1, lsr #0x1d + moveq r0, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020DECAC: ; 0x020DECAC + bl fflush + mov r4, r0 + ldr r0, [r5, #0x0] + ldr r1, [r5, #0x44] + blx r1 + ldr r1, [r5, #0x4] + mov r2, #0x0 + bic r1, r1, #0x380 + str r1, [r5, #0x4] + str r2, [r5, #0x0] + ldr r1, [r5, #0x8] + mov r1, r1, lsl #0x1c + movs r1, r1, lsr #0x1f + subne r0, r2, #0x1 + ldmneia sp!, {r3-r5,pc} +_020DECE8: ; 0x020DECE8 + cmp r4, #0x0 + cmpeq r0, #0x0 + movne r2, #0x1 + rsb r0, r2, #0x0 + ldmia sp!, {r3-r5,pc} + + arm_func_start fflush +fflush: + stmdb sp!, {r4,lr} + movs r4, r0 + bne _020DED10 + bl __flush_all + ldmia sp!, {r4,pc} +_020DED10: + ldrb r0, [r4, #0xd] + cmp r0, #0x0 + bne _020DED2C + ldr r0, [r4, #0x4] + mov r1, r0, lsl #0x16 + movs r1, r1, lsr #0x1d + bne _020DED34 +_020DED2C: + mvn r0, #0x0 + ldmia sp!, {r4,pc} +_020DED34: + mov r0, r0, lsl #0x1b + mov r0, r0, lsr #0x1d + cmp r0, #0x1 + moveq r0, #0x0 + ldmeqia sp!, {r4,pc} +_020DED48: ; 0x020DED48 + ldr r0, [r4, #0x8] + mov r1, r0, lsl #0x1d + mov r1, r1, lsr #0x1d + cmp r1, #0x3 + biccs r0, r0, #0x7 + orrcs r0, r0, #0x2 + strcs r0, [r4, #0x8] + ldr r0, [r4, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + cmp r0, #0x2 + moveq r0, #0x0 + streq r0, [r4, #0x28] + ldr r0, [r4, #0x8] + mov r1, r0, lsl #0x1d + mov r1, r1, lsr #0x1d + cmp r1, #0x1 + beq _020DEDA0 + bic r0, r0, #0x7 + str r0, [r4, #0x8] + mov r0, #0x0 + ldmia sp!, {r4,pc} +_020DEDA0: + mov r0, r4 + mov r1, #0x0 + bl __flush_buffer +_020DEDAC: ; 0x020DEDAC + cmp r0, #0x0 + mov r0, #0x0 + beq _020DEDCC + mov r1, #0x1 + strb r1, [r4, #0xd] + str r0, [r4, #0x28] + sub r0, r0, #0x1 + ldmia sp!, {r4,pc} +_020DEDCC: + ldr r1, [r4, #0x8] + bic r1, r1, #0x7 + str r1, [r4, #0x8] + str r0, [r4, #0x18] + str r0, [r4, #0x28] + ldmia sp!, {r4,pc} + + arm_func_start _ftell +_ftell: ; 0x020DEDE4 + ldr r1, [r0, #0x4] + mov r1, r1, lsl #0x16 + mov r1, r1, lsr #0x1d + and r1, r1, #0xff + add r1, r1, #0xff + and r1, r1, #0xff + cmp r1, #0x1 + bhi _020DEE10 + ldrb r1, [r0, #0xd] + cmp r1, #0x0 + beq _020DEE24 +_020DEE10: + ldr r0, _020DEE5C ; =0x021D74A8 + mov r1, #0x28 + str r1, [r0, #0x0] + sub r0, r1, #0x29 + bx lr +_020DEE24: + ldr r1, [r0, #0x8] + mov r1, r1, lsl #0x1d + movs r12, r1, lsr #0x1d + ldreq r0, [r0, #0x18] + bxeq lr + ldr r2, [r0, #0x24] + ldr r1, [r0, #0x1c] + ldr r3, [r0, #0x34] + sub r0, r2, r1 + cmp r12, #0x3 + add r0, r3, r0 + subcs r1, r12, #0x2 + subcs r0, r0, r1 + bx lr + .balign 4 +_020DEE5C: .word 0x021D74A8 + + arm_func_start ftell +ftell: ; 0x020DEE60 + stmdb sp!, {r3-r7,lr} + ldr r1, _020DEF60 ; =0x02106A58 + mov r7, r0 + cmp r7, r1 + moveq r6, #0x2 + beq _020DEE98 + ldr r0, _020DEF64 ; =0x02106AA4 + cmp r7, r0 + moveq r6, #0x3 + beq _020DEE98 + ldr r0, _020DEF68 ; =0x02106AF0 + cmp r7, r0 + moveq r6, #0x4 + movne r6, #0x5 +_020DEE98: + mov r0, #0x18 + mul r4, r6, r0 + ldr r5, _020DEF6C ; =0x021D70D0 + add r0, r5, r4 + bl OS_TryLockMutex +_020DEEAC: ; 0x020DEEAC + cmp r0, #0x0 + bne _020DEED8 + ldr r0, _020DEF70 ; =0x021D3498 + ldr r2, _020DEF74 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DEF78 ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] + b _020DEF30 +_020DEED8: + ldr r0, _020DEF70 ; =0x021D3498 + ldr r1, _020DEF74 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, r6, lsl #0x2] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020DEF08 + ldr r1, _020DEF78 ; =0x021D70AC + ldr r0, [r1, r6, lsl #0x2] + add r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + b _020DEF30 +_020DEF08: + add r0, r5, r4 + bl OS_LockMutex + ldr r0, _020DEF70 ; =0x021D3498 + ldr r2, _020DEF74 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DEF78 ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] +_020DEF30: + mov r0, r7 + bl _ftell + ldr r1, _020DEF78 ; =0x021D70AC + mov r7, r0 + ldr r0, [r1, r6, lsl #0x2] + subs r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + bne _020DEF58 + add r0, r5, r4 + bl OS_UnlockMutex +_020DEF58: + mov r0, r7 + ldmia sp!, {r3-r7,pc} + .balign 4 +_020DEF60: .word 0x02106A58 +_020DEF64: .word 0x02106AA4 +_020DEF68: .word 0x02106AF0 +_020DEF6C: .word 0x021D70D0 +_020DEF70: .word 0x021D3498 +_020DEF74: .word 0x021D7088 +_020DEF78: .word 0x021D70AC + + arm_func_start _fseek +_fseek: ; 0x020DEF7C + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r5,lr} + mov r5, r0 + ldr r1, [r5, #0x4] + mov r4, r2 + mov r1, r1, lsl #0x16 + mov r1, r1, lsr #0x1d + and r1, r1, #0xff + cmp r1, #0x1 + ldreqb r1, [r5, #0xd] + cmpeq r1, #0x0 + beq _020DEFC8 + ldr r0, _020DF160 ; =0x021D74A8 + mov r1, #0x28 + str r1, [r0, #0x0] + sub r0, r1, #0x29 + ldmia sp!, {r3-r5,lr} + add sp, sp, #0x10 + bx lr +_020DEFC8: + ldr r1, [r5, #0x8] + mov r1, r1, lsl #0x1d + mov r1, r1, lsr #0x1d + cmp r1, #0x1 + bne _020DF018 + mov r1, #0x0 + bl __flush_buffer +_020DEFE4: ; 0x020DEFE4 + cmp r0, #0x0 + beq _020DF018 + mov r0, #0x1 + strb r0, [r5, #0xd] + mov r2, #0x0 + ldr r0, _020DF160 ; =0x021D74A8 + mov r1, #0x28 + str r2, [r5, #0x28] + str r1, [r0, #0x0] + sub r0, r1, #0x29 + ldmia sp!, {r3-r5,lr} + add sp, sp, #0x10 + bx lr +_020DF018: + cmp r4, #0x1 + bne _020DF038 + mov r0, r5 + mov r4, #0x0 + bl _ftell + ldr r1, [sp, #0x14] + add r0, r1, r0 + str r0, [sp, #0x14] +_020DF038: + cmp r4, #0x2 + beq _020DF0CC + ldr r0, [r5, #0x4] + mov r0, r0, lsl #0x1b + mov r0, r0, lsr #0x1d + cmp r0, #0x3 + beq _020DF0CC + ldr r0, [r5, #0x8] + mov r0, r0, lsl #0x1d + mov r0, r0, lsr #0x1d + sub r0, r0, #0x2 + cmp r0, #0x1 + bhi _020DF0CC + ldr r2, [sp, #0x14] + ldr r0, [r5, #0x18] + cmp r2, r0 + bhs _020DF088 + ldr r0, [r5, #0x34] + cmp r2, r0 + bhs _020DF098 +_020DF088: + ldr r0, [r5, #0x8] + bic r0, r0, #0x7 + str r0, [r5, #0x8] + b _020DF0D8 +_020DF098: + ldr r1, [r5, #0x1c] + sub r0, r2, r0 + add r0, r1, r0 + str r0, [r5, #0x24] + ldr r1, [r5, #0x18] + ldr r0, [sp, #0x14] + sub r0, r1, r0 + str r0, [r5, #0x28] + ldr r0, [r5, #0x8] + bic r0, r0, #0x7 + orr r0, r0, #0x2 + str r0, [r5, #0x8] + b _020DF0D8 +_020DF0CC: + ldr r0, [r5, #0x8] + bic r0, r0, #0x7 + str r0, [r5, #0x8] +_020DF0D8: + ldr r0, [r5, #0x8] + mov r0, r0, lsl #0x1d + movs r0, r0, lsr #0x1d + bne _020DF150 + ldr r12, [r5, #0x38] + cmp r12, #0x0 + beq _020DF13C + ldr r0, [r5, #0x0] + ldr r3, [r5, #0x48] + add r1, sp, #0x14 + mov r2, r4 + blx r12 + cmp r0, #0x0 + beq _020DF13C + mov r0, #0x1 + strb r0, [r5, #0xd] + mov r2, #0x0 + ldr r0, _020DF160 ; =0x021D74A8 + mov r1, #0x28 + str r2, [r5, #0x28] + str r1, [r0, #0x0] + sub r0, r1, #0x29 + ldmia sp!, {r3-r5,lr} + add sp, sp, #0x10 + bx lr +_020DF13C: + mov r1, #0x0 + strb r1, [r5, #0xc] + ldr r0, [sp, #0x14] + str r0, [r5, #0x18] + str r1, [r5, #0x28] +_020DF150: + mov r0, #0x0 + ldmia sp!, {r3-r5,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020DF160: .word 0x021D74A8 + + arm_func_start fseek +fseek: + stmdb sp!, {r3-r9,lr} + ldr r3, _020DF274 ; =0x02106A58 + mov r9, r0 + cmp r9, r3 + mov r8, r1 + mov r7, r2 + moveq r6, #0x2 + beq _020DF1A4 + ldr r0, _020DF278 ; =0x02106AA4 + cmp r9, r0 + moveq r6, #0x3 + beq _020DF1A4 + ldr r0, _020DF27C ; =0x02106AF0 + cmp r9, r0 + moveq r6, #0x4 + movne r6, #0x5 +_020DF1A4: + mov r0, #0x18 + mul r4, r6, r0 + ldr r5, _020DF280 ; =0x021D70D0 + add r0, r5, r4 + bl OS_TryLockMutex +_020DF1B8: ; 0x020DF1B8 + cmp r0, #0x0 + bne _020DF1E4 + ldr r0, _020DF284 ; =0x021D3498 + ldr r2, _020DF288 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DF28C ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] + b _020DF23C +_020DF1E4: + ldr r0, _020DF284 ; =0x021D3498 + ldr r1, _020DF288 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, r6, lsl #0x2] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020DF214 + ldr r1, _020DF28C ; =0x021D70AC + ldr r0, [r1, r6, lsl #0x2] + add r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + b _020DF23C +_020DF214: + add r0, r5, r4 + bl OS_LockMutex + ldr r0, _020DF284 ; =0x021D3498 + ldr r2, _020DF288 ; =0x021D7088 + ldr r1, [r0, #0x4] + ldr r0, _020DF28C ; =0x021D70AC + ldr r3, [r1, #0x6c] + mov r1, #0x1 + str r3, [r2, r6, lsl #0x2] + str r1, [r0, r6, lsl #0x2] +_020DF23C: + mov r0, r9 + mov r1, r8 + mov r2, r7 + bl _fseek + ldr r1, _020DF28C ; =0x021D70AC + mov r7, r0 + ldr r0, [r1, r6, lsl #0x2] + subs r0, r0, #0x1 + str r0, [r1, r6, lsl #0x2] + bne _020DF26C + add r0, r5, r4 + bl OS_UnlockMutex +_020DF26C: + mov r0, r7 + ldmia sp!, {r3-r9,pc} + .balign 4 +_020DF274: .word 0x02106A58 +_020DF278: .word 0x02106AA4 +_020DF27C: .word 0x02106AF0 +_020DF280: .word 0x021D70D0 +_020DF284: .word 0x021D3498 +_020DF288: .word 0x021D7088 +_020DF28C: .word 0x021D70AC + + arm_func_start rewind +rewind: ; 0x020DF290 + stmdb sp!, {r4,lr} + mov r1, #0x0 + mov r4, r0 + mov r2, r1 + strb r1, [r4, #0xd] + bl fseek +_020DF2A8: ; 0x020DF2A8 + mov r0, #0x0 + strb r0, [r4, #0xd] + ldmia sp!, {r4,pc} + + arm_func_start mbtowc +mbtowc: + stmdb sp!, {r3,lr} + ldr r3, _020DF2CC ; =0x02106C98 + ldr r3, [r3, #0x8] + ldr r3, [r3, #0x0] + blx r3 + ldmia sp!, {r3,pc} + .balign 4 +_020DF2CC: .word 0x02106C98 + + arm_func_start __mbtowc_noconv +__mbtowc_noconv: ; 0x020DF2D0 + cmp r1, #0x0 + moveq r0, #0x0 + bxeq lr + cmp r2, #0x0 + mvneq r0, #0x0 + bxeq lr + cmp r0, #0x0 + ldrneb r2, [r1, #0x0] + strneh r2, [r0, #0x0] + ldrsb r0, [r1, #0x0] + cmp r0, #0x0 + moveq r0, #0x0 + movne r0, #0x1 + bx lr + + arm_func_start __wctomb_noconv +__wctomb_noconv: ; 0x020DF308 + cmp r0, #0x0 + moveq r0, #0x0 + strneb r1, [r0, #0x0] + movne r0, #0x1 + bx lr + + arm_func_start wctomb +wctomb: ; 0x020DF31C + stmdb sp!, {r3,lr} + ldr r2, _020DF334 ; =0x02106C98 + ldr r2, [r2, #0x8] + ldr r2, [r2, #0x4] + blx r2 + ldmia sp!, {r3,pc} + .balign 4 +_020DF334: .word 0x02106C98 + + arm_func_start mbstowcs +mbstowcs: ; 0x020DF338 + stmdb sp!, {r4-r8,lr} + mov r7, r1 + mov r8, r0 + mov r0, r7 + mov r6, r2 + bl strlen + mov r5, r0 + cmp r8, #0x0 + mov r4, #0x0 + beq _020DF3B8 + cmp r6, #0x0 + bls _020DF3B8 +_020DF368: + ldrsb r0, [r7, #0x0] + cmp r0, #0x0 + beq _020DF3A0 + mov r0, r8 + mov r1, r7 + mov r2, r5 + bl mbtowc +_020DF384: ; 0x020DF384 + cmp r0, #0x0 + add r8, r8, #0x2 + addgt r7, r7, r0 + subgt r5, r5, r0 + bgt _020DF3AC + mvn r0, #0x0 + ldmia sp!, {r4-r8,pc} +_020DF3A0: + mov r0, #0x0 + strh r0, [r8, #0x0] + b _020DF3B8 +_020DF3AC: + add r4, r4, #0x1 + cmp r4, r6 + blo _020DF368 +_020DF3B8: + mov r0, r4 + ldmia sp!, {r4-r8,pc} + + arm_func_start wcstombs +wcstombs: + stmdb sp!, {r3-r9,lr} + movs r4, r0 + mov r9, r1 + cmpne r9, #0x0 + mov r8, r2 + mov r7, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r3-r9,pc} +_020DF3E0: ; 0x020DF3E0 + add r6, sp, #0x0 +_020DF3E4: + ldrh r1, [r9, #0x0] + cmp r1, #0x0 + moveq r0, #0x0 + streqb r0, [r4, r7] + beq _020DF430 + mov r0, r6 + add r9, r9, #0x2 + bl wctomb + mov r5, r0 + add r0, r7, r5 + cmp r0, r8 + bhi _020DF430 + mov r1, r6 + mov r2, r5 + add r0, r4, r7 + bl strncpy + add r7, r7, r5 + cmp r7, r8 + bls _020DF3E4 +_020DF430: + mov r0, r7 + ldmia sp!, {r3-r9,pc} + + arm_func_start memcpy +memcpy: ; 0x020DF438 + mov r12, r0 + cmp r2, #0x0 + bxeq lr +_020DF444: + ldrsb r3, [r1], #0x1 + subs r2, r2, #0x1 + strb r3, [r12], #0x1 + bne _020DF444 + bx lr + + arm_func_start memmove +memmove: ; 0x020DF458 + cmp r1, r0 + blo _020DF480 + mov r12, r0 + cmp r2, #0x0 + bxeq lr +_020DF46C: + ldrsb r3, [r1], #0x1 + subs r2, r2, #0x1 + strb r3, [r12], #0x1 + bne _020DF46C + bx lr +_020DF480: + cmp r2, #0x0 + add r3, r1, r2 + add r12, r0, r2 + bxeq lr +_020DF490: + ldrsb r1, [r3, #-0x1]! + subs r2, r2, #0x1 + strb r1, [r12, #-0x1]! + bne _020DF490 + bx lr + + arm_func_start Call_FillMemWithValue +Call_FillMemWithValue: ; 0x020DF4A4 + stmdb sp!, {r4,lr} + mov r4, r0 + bl __fill_mem + mov r0, r4 + ldmia sp!, {r4,pc} + + arm_func_start memchr +memchr: + cmp r2, #0x0 + and r3, r1, #0xff + beq _020DF4DC +_020DF4C4: + ldrb r1, [r0], #0x1 + cmp r1, r3 + subeq r0, r0, #0x1 + bxeq lr + subs r2, r2, #0x1 + bne _020DF4C4 +_020DF4DC: + mov r0, #0x0 + bx lr + + arm_func_start __memrchr +__memrchr: ; 0x020DF4E4 + cmp r2, #0x0 + and r3, r1, #0xff + add r0, r0, r2 + beq _020DF508 +_020DF4F4: + ldrb r1, [r0, #-0x1]! + cmp r1, r3 + bxeq lr + subs r2, r2, #0x1 + bne _020DF4F4 +_020DF508: + mov r0, #0x0 + bx lr + + arm_func_start memcmp +memcmp: ; 0x020DF510 + cmp r2, #0x0 + beq _020DF548 +_020DF518: + ldrb r12, [r0], #0x1 + ldrb r3, [r1], #0x1 + cmp r12, r3 + beq _020DF540 + ldrb r2, [r0, #-0x1] + ldrb r0, [r1, #-0x1] + cmp r2, r0 + mvncc r0, #0x0 + movcs r0, #0x1 + bx lr +_020DF540: + subs r2, r2, #0x1 + bne _020DF518 +_020DF548: + mov r0, #0x0 + bx lr + + arm_func_start __fill_mem +__fill_mem: ; 0x020DF550 + cmp r2, #0x20 + and r3, r1, #0xff + blo _020DF5E4 + rsb r1, r0, #0x0 + ands r12, r1, #0x3 + beq _020DF57C + sub r2, r2, r12 + and r1, r3, #0xff +_020DF570: + strb r1, [r0], #0x1 + subs r12, r12, #0x1 + bne _020DF570 +_020DF57C: + cmp r3, #0x0 + beq _020DF594 + mov r1, r3, lsl #0x10 + orr r1, r1, r3, lsl #0x18 + orr r1, r1, r3, lsl #0x8 + orr r3, r3, r1 +_020DF594: + movs r1, r2, lsr #0x5 + beq _020DF5C8 +_020DF59C: + str r3, [r0, #0x0] + str r3, [r0, #0x4] + str r3, [r0, #0x8] + str r3, [r0, #0xc] + str r3, [r0, #0x10] + str r3, [r0, #0x14] + str r3, [r0, #0x18] + str r3, [r0, #0x1c] + add r0, r0, #0x20 + subs r1, r1, #0x1 + bne _020DF59C +_020DF5C8: + and r1, r2, #0x1f + movs r1, r1, lsr #0x2 + beq _020DF5E0 +_020DF5D4: + str r3, [r0], #0x4 + subs r1, r1, #0x1 + bne _020DF5D4 +_020DF5E0: + and r2, r2, #0x3 +_020DF5E4: + cmp r2, #0x0 + bxeq lr + and r1, r3, #0xff +_020DF5F0: + strb r1, [r0], #0x1 + subs r2, r2, #0x1 + bne _020DF5F0 + bx lr + + arm_func_start parse_format_printf +parse_format_printf: ; 0x020DF600 + stmdb sp!, {r4-r8,lr} + sub sp, sp, #0x10 + ldrsb r3, [r0, #0x1] + mov r4, #0x0 + mov r5, #0x1 + mov lr, r2 + strb r5, [sp, #0x0] + strb r4, [sp, #0x1] + strb r4, [sp, #0x2] + strb r4, [sp, #0x3] + strb r4, [sp, #0x4] + str r4, [sp, #0x8] + str r4, [sp, #0xc] + cmp r3, #0x25 + add r12, r0, #0x1 + bne _020DF65C + add r0, sp, #0x0 + strb r3, [sp, #0x5] + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add sp, sp, #0x10 + add r0, r12, #0x1 + ldmia sp!, {r4-r8,pc} +_020DF65C: + mov r2, #0x2 + mov r0, r4 + mov r5, r2 + mov r6, r4 + mov r7, #0x1 +_020DF670: + mov r8, r7 + cmp r3, #0x2b + bgt _020DF6A0 + bge _020DF6C8 + cmp r3, #0x23 + bgt _020DF6F8 + cmp r3, #0x20 + blt _020DF6F8 + beq _020DF6D0 + cmp r3, #0x23 + beq _020DF6E0 + b _020DF6F8 +_020DF6A0: + cmp r3, #0x30 + bgt _020DF6F8 + cmp r3, #0x2d + blt _020DF6F8 + beq _020DF6C0 + cmp r3, #0x30 + beq _020DF6E8 + b _020DF6F8 +_020DF6C0: + strb r6, [sp, #0x0] + b _020DF6FC +_020DF6C8: + strb r7, [sp, #0x1] + b _020DF6FC +_020DF6D0: + ldrb r4, [sp, #0x1] + cmp r4, #0x1 + strneb r5, [sp, #0x1] + b _020DF6FC +_020DF6E0: + strb r7, [sp, #0x3] + b _020DF6FC +_020DF6E8: + ldrb r4, [sp, #0x0] + cmp r4, #0x0 + strneb r2, [sp, #0x0] + b _020DF6FC +_020DF6F8: + mov r8, r0 +_020DF6FC: + cmp r8, #0x0 + ldrnesb r3, [r12, #0x1]! + bne _020DF670 + cmp r3, #0x2a + bne _020DF744 + ldr r0, [r1, #0x0] + add r0, r0, #0x4 + str r0, [r1, #0x0] + ldr r0, [r0, #-0x4] + str r0, [sp, #0x8] + cmp r0, #0x0 + bge _020DF73C + rsb r0, r0, #0x0 + mov r2, #0x0 + strb r2, [sp, #0x0] + str r0, [sp, #0x8] +_020DF73C: + ldrsb r3, [r12, #0x1]! + b _020DF794 +_020DF744: + ldr r4, _020DFB88 ; =0x0210430C + mov r5, #0x0 + mov r0, #0xa + b _020DF768 +_020DF754: + ldr r2, [sp, #0x8] + sub r3, r3, #0x30 + mla r6, r2, r0, r3 + ldrsb r3, [r12, #0x1]! + str r6, [sp, #0x8] +_020DF768: + cmp r3, #0x0 + blt _020DF778 + cmp r3, #0x80 + blt _020DF780 +_020DF778: + mov r2, r5 + b _020DF78C +_020DF780: + mov r2, r3, lsl #0x1 + ldrh r2, [r4, r2] + and r2, r2, #0x8 +_020DF78C: + cmp r2, #0x0 + bne _020DF754 +_020DF794: + ldr r2, [sp, #0x8] + ldr r0, _020DFB8C ; =0x000001FD + cmp r2, r0 + ble _020DF7C4 + mov r1, #0xff + add r0, sp, #0x0 + strb r1, [sp, #0x5] + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add sp, sp, #0x10 + add r0, r12, #0x1 + ldmia sp!, {r4-r8,pc} +_020DF7C4: + cmp r3, #0x2e + bne _020DF858 + ldrsb r3, [r12, #0x1]! + mov r0, #0x1 + strb r0, [sp, #0x2] + cmp r3, #0x2a + bne _020DF808 + ldr r0, [r1, #0x0] + add r0, r0, #0x4 + str r0, [r1, #0x0] + ldr r0, [r0, #-0x4] + ldrsb r3, [r12, #0x1]! + str r0, [sp, #0xc] + cmp r0, #0x0 + movlt r0, #0x0 + strltb r0, [sp, #0x2] + b _020DF858 +_020DF808: + ldr r2, _020DFB88 ; =0x0210430C + mov r4, #0x0 + mov r0, #0xa + b _020DF82C +_020DF818: + ldr r1, [sp, #0xc] + sub r3, r3, #0x30 + mla r5, r1, r0, r3 + ldrsb r3, [r12, #0x1]! + str r5, [sp, #0xc] +_020DF82C: + cmp r3, #0x0 + blt _020DF83C + cmp r3, #0x80 + blt _020DF844 +_020DF83C: + mov r1, r4 + b _020DF850 +_020DF844: + mov r1, r3, lsl #0x1 + ldrh r1, [r2, r1] + and r1, r1, #0x8 +_020DF850: + cmp r1, #0x0 + bne _020DF818 +_020DF858: + cmp r3, #0x6c + mov r0, #0x1 + bgt _020DF890 + cmp r3, #0x68 + blt _020DF884 + beq _020DF8AC + cmp r3, #0x6a + beq _020DF8F8 + cmp r3, #0x6c + beq _020DF8C8 + b _020DF91C +_020DF884: + cmp r3, #0x4c + beq _020DF8EC + b _020DF91C +_020DF890: + cmp r3, #0x74 + bgt _020DF8A0 + beq _020DF904 + b _020DF91C +_020DF8A0: + cmp r3, #0x7a + beq _020DF910 + b _020DF91C +_020DF8AC: + ldrsb r1, [r12, #0x1] + mov r2, #0x2 + strb r2, [sp, #0x4] + cmp r1, #0x68 + streqb r0, [sp, #0x4] + ldreqsb r3, [r12, #0x1]! + b _020DF920 +_020DF8C8: + ldrsb r1, [r12, #0x1] + mov r2, #0x3 + strb r2, [sp, #0x4] + cmp r1, #0x6c + bne _020DF920 + mov r1, #0x4 + strb r1, [sp, #0x4] + ldrsb r3, [r12, #0x1]! + b _020DF920 +_020DF8EC: + mov r1, #0x9 + strb r1, [sp, #0x4] + b _020DF920 +_020DF8F8: + mov r1, #0x6 + strb r1, [sp, #0x4] + b _020DF920 +_020DF904: + mov r1, #0x8 + strb r1, [sp, #0x4] + b _020DF920 +_020DF910: + mov r1, #0x7 + strb r1, [sp, #0x4] + b _020DF920 +_020DF91C: + mov r0, #0x0 +_020DF920: + cmp r0, #0x0 + ldrnesb r3, [r12, #0x1]! + strb r3, [sp, #0x5] + cmp r3, #0x61 + bgt _020DF974 + bge _020DFA5C + cmp r3, #0x47 + bgt _020DF968 + subs r0, r3, #0x41 + addpl pc, pc, r0, lsl #0x2 + b _020DFB68 +_020DF94C: ; 0x020DF94C + b _020DFA5C +_020DF950: ; 0x020DF950 + b _020DFB68 +_020DF954: ; 0x020DF954 + b _020DFB68 +_020DF958: ; 0x020DF958 + b _020DFB68 +_020DF95C: ; 0x020DF95C + b _020DFAA4 +_020DF960: ; 0x020DF960 + b _020DFA24 +_020DF964: ; 0x020DF964 + b _020DFA94 +_020DF968: + cmp r3, #0x58 + beq _020DF9E8 + b _020DFB68 +_020DF974: + cmp r3, #0x63 + bgt _020DF984 + beq _020DFB04 + b _020DFB68 +_020DF984: + sub r0, r3, #0x64 + cmp r0, #0x14 + addls pc, pc, r0, lsl #0x2 + b _020DFB68 +_020DF994: + b _020DF9E8 +_020DF998: + b _020DFAA4 +_020DF99C: + b _020DFA24 +_020DF9A0: + b _020DFA94 +_020DF9A4: + b _020DFB68 +_020DF9A8: + b _020DF9E8 +_020DF9AC: + b _020DFB68 +_020DF9B0: + b _020DFB68 +_020DF9B4: + b _020DFB68 +_020DF9B8: + b _020DFB68 +_020DF9BC: + b _020DFB54 +_020DF9C0: + b _020DF9E8 +_020DF9C4: + b _020DFAE0 +_020DF9C8: + b _020DFB68 +_020DF9CC: + b _020DFB68 +_020DF9D0: + b _020DFB30 +_020DF9D4: + b _020DFB68 +_020DF9D8: + b _020DF9E8 +_020DF9DC: + b _020DFB68 +_020DF9E0: + b _020DFB68 +_020DF9E4: + b _020DF9E8 +_020DF9E8: + ldrb r0, [sp, #0x4] + cmp r0, #0x9 + moveq r0, #0xff + streqb r0, [sp, #0x5] + beq _020DFB70 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x1 + streq r0, [sp, #0xc] + beq _020DFB70 + ldrb r0, [sp, #0x0] + cmp r0, #0x2 + moveq r0, #0x1 + streqb r0, [sp, #0x0] + b _020DFB70 +_020DFA24: + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + moveq r0, #0xff + streqb r0, [sp, #0x5] + beq _020DFB70 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x6 + streq r0, [sp, #0xc] + b _020DFB70 +_020DFA5C: + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0xd + streq r0, [sp, #0xc] + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + cmpne r0, #0x1 + moveq r0, #0xff + streqb r0, [sp, #0x5] + b _020DFB70 +_020DFA94: + ldr r0, [sp, #0xc] + cmp r0, #0x0 + moveq r0, #0x1 + streq r0, [sp, #0xc] +_020DFAA4: + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + cmpne r0, #0x1 + moveq r0, #0xff + streqb r0, [sp, #0x5] + beq _020DFB70 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x6 + streq r0, [sp, #0xc] + b _020DFB70 +_020DFAE0: + mov r3, #0x78 + mov r2, #0x1 + mov r1, #0x3 + mov r0, #0x8 + strb r3, [sp, #0x5] + strb r2, [sp, #0x3] + strb r1, [sp, #0x4] + str r0, [sp, #0xc] + b _020DFB70 +_020DFB04: + ldrb r1, [sp, #0x4] + cmp r1, #0x3 + moveq r0, #0x5 + streqb r0, [sp, #0x4] + beq _020DFB70 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + cmpeq r1, #0x0 + movne r0, #0xff + strneb r0, [sp, #0x5] + b _020DFB70 +_020DFB30: + ldrb r0, [sp, #0x4] + cmp r0, #0x3 + moveq r0, #0x5 + streqb r0, [sp, #0x4] + beq _020DFB70 + cmp r0, #0x0 + movne r0, #0xff + strneb r0, [sp, #0x5] + b _020DFB70 +_020DFB54: + ldrb r0, [sp, #0x4] + cmp r0, #0x9 + moveq r0, #0xff + streqb r0, [sp, #0x5] + b _020DFB70 +_020DFB68: + mov r0, #0xff + strb r0, [sp, #0x5] +_020DFB70: + add r0, sp, #0x0 + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add r0, r12, #0x1 + add sp, sp, #0x10 + ldmia sp!, {r4-r8,pc} + .balign 4 +_020DFB88: .word 0x0210430C +_020DFB8C: .word 0x000001FD + + arm_func_start long2str +long2str: ; 0x020DFB90 + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x10 + movs r10, r0 + mov r0, #0x0 + mov r5, r1 + str r0, [sp, #0xc] + ldr r7, [sp, #0x4c] + mov r6, r0 + strb r0, [r5, #-0x1]! + ldrb r0, [sp, #0x43] + str r1, [sp, #0x0] + ldrb r8, [sp, #0x45] + str r0, [sp, #0x4] + ldr r0, [sp, #0x48] + ldrb r11, [sp, #0x41] + str r0, [sp, #0x8] + cmpeq r7, #0x0 + bne _020DFC04 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + beq _020DFBF0 + cmp r8, #0x6f + beq _020DFC04 +_020DFBF0: + add sp, sp, #0x10 + mov r0, r5 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020DFC04: + cmp r8, #0x69 + bgt _020DFC2C + bge _020DFC60 + cmp r8, #0x58 + bgt _020DFC20 + beq _020DFC8C + b _020DFC94 +_020DFC20: + cmp r8, #0x64 + beq _020DFC60 + b _020DFC94 +_020DFC2C: + cmp r8, #0x6f + bgt _020DFC40 + moveq r4, #0x8 + moveq r11, #0x0 + b _020DFC94 +_020DFC40: + cmp r8, #0x78 + bgt _020DFC94 + cmp r8, #0x75 + blt _020DFC94 + beq _020DFC80 + cmp r8, #0x78 + beq _020DFC8C + b _020DFC94 +_020DFC60: + cmp r10, #0x0 + mov r4, #0xa + bge _020DFC94 + mov r0, #0x1 + cmp r10, #0x80000000 + rsbne r10, r10, #0x0 + str r0, [sp, #0xc] + b _020DFC94 +_020DFC80: + mov r4, #0xa + mov r11, #0x0 + b _020DFC94 +_020DFC8C: + mov r4, #0x10 + mov r11, #0x0 +_020DFC94: + mov r0, r10 + mov r1, r4 + bl _u32_div_f + mov r9, r1 + mov r0, r10 + mov r1, r4 + bl _u32_div_f + cmp r9, #0xa + mov r10, r0 + addlt r9, r9, #0x30 + blt _020DFCCC + cmp r8, #0x78 + addeq r9, r9, #0x57 + addne r9, r9, #0x37 +_020DFCCC: + cmp r10, #0x0 + strb r9, [r5, #-0x1]! + add r6, r6, #0x1 + bne _020DFC94 + cmp r4, #0x8 + bne _020DFD00 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrnesb r0, [r5, #0x0] + cmpne r0, #0x30 + movne r0, #0x30 + strneb r0, [r5, #-0x1]! + addne r6, r6, #0x1 +_020DFD00: + ldrb r0, [sp, #0x40] + cmp r0, #0x2 + bne _020DFD34 + ldr r0, [sp, #0xc] + ldr r7, [sp, #0x8] + cmp r0, #0x0 + cmpeq r11, #0x0 + subne r7, r7, #0x1 + cmp r4, #0x10 + bne _020DFD34 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + subne r7, r7, #0x2 +_020DFD34: + ldr r0, [sp, #0x0] + sub r1, r0, r5 + ldr r0, _020DFDD8 ; =0x000001FD + add r1, r7, r1 + cmp r1, r0 + addgt sp, sp, #0x10 + movgt r0, #0x0 + ldmgtia sp!, {r3-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + cmp r6, r7 + bge _020DFD78 + mov r0, #0x30 +_020DFD68: + add r6, r6, #0x1 + cmp r6, r7 + strb r0, [r5, #-0x1]! + blt _020DFD68 +_020DFD78: + cmp r4, #0x10 + bne _020DFD94 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x30 + strneb r8, [r5, #-0x1] + strneb r0, [r5, #-0x2]! +_020DFD94: + ldr r0, [sp, #0xc] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r5, #-0x1]! + bne _020DFDC4 + cmp r11, #0x1 + moveq r0, #0x2b + streqb r0, [r5, #-0x1]! + beq _020DFDC4 + cmp r11, #0x2 + moveq r0, #0x20 + streqb r0, [r5, #-0x1]! +_020DFDC4: + mov r0, r5 + add sp, sp, #0x10 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020DFDD8: .word 0x000001FD + + arm_func_start longlong2str +longlong2str: ; 0x020DFDDC + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x18 + mov r9, r1 + mov r1, #0x0 + mov r10, r0 + mov r6, r2 + mov r0, r1 + strb r0, [r6, #-0x1]! + ldr r0, [sp, #0x58] + cmp r9, #0x0 + str r0, [sp, #0x10] + ldrb r0, [sp, #0x4f] + cmpeq r10, #0x0 + str r2, [sp, #0x0] + str r0, [sp, #0x4] + ldr r0, [sp, #0x54] + str r1, [sp, #0x14] + str r0, [sp, #0x8] + ldrb r0, [sp, #0x4d] + mov r7, r1 + ldrb r8, [sp, #0x51] + str r0, [sp, #0xc] + ldreq r0, [sp, #0x10] + cmpeq r0, #0x0 + bne _020DFE6C + ldr r0, [sp, #0x4] + cmp r0, #0x0 + beq _020DFE58 + cmp r8, #0x6f + beq _020DFE6C +_020DFE58: + add sp, sp, #0x18 + mov r0, r6 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020DFE6C: + cmp r8, #0x69 + bgt _020DFE94 + bge _020DFEC4 + cmp r8, #0x58 + bgt _020DFE88 + beq _020DFF18 + b _020DFF24 +_020DFE88: + cmp r8, #0x64 + beq _020DFEC4 + b _020DFF24 +_020DFE94: + cmp r8, #0x6f + bgt _020DFEA4 + beq _020DFEF8 + b _020DFF24 +_020DFEA4: + cmp r8, #0x78 + bgt _020DFF24 + cmp r8, #0x75 + blt _020DFF24 + beq _020DFF08 + cmp r8, #0x78 + beq _020DFF18 + b _020DFF24 +_020DFEC4: + subs r0, r10, #0x0 + sbcs r0, r9, #0x0 + mov r11, #0xa + mov r5, #0x0 + bge _020DFF24 + cmp r9, #0x80000000 + cmpeq r10, r5 + beq _020DFEEC + rsbs r10, r10, #0x0 + rsc r9, r9, #0x0 +_020DFEEC: + mov r0, #0x1 + str r0, [sp, #0x14] + b _020DFF24 +_020DFEF8: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0x8 + b _020DFF24 +_020DFF08: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0xa + b _020DFF24 +_020DFF18: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0x10 +_020DFF24: + mov r0, r10 + mov r1, r9 + mov r2, r11 + mov r3, r5 + bl _ull_mod + mov r4, r0 + mov r0, r10 + mov r1, r9 + mov r2, r11 + mov r3, r5 + bl _ll_udiv + mov r10, r0 + cmp r4, #0xa + mov r9, r1 + addlt r0, r4, #0x30 + blt _020DFF70 + cmp r8, #0x78 + addeq r0, r4, #0x57 + addne r0, r4, #0x37 +_020DFF70: + strb r0, [r6, #-0x1]! + mov r0, #0x0 + cmp r9, r0 + cmpeq r10, r0 + add r7, r7, #0x1 + bne _020DFF24 + cmp r5, #0x0 + cmpeq r11, #0x8 + bne _020DFFB0 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrnesb r0, [r6, #0x0] + cmpne r0, #0x30 + movne r0, #0x30 + strneb r0, [r6, #-0x1]! + addne r7, r7, #0x1 +_020DFFB0: + ldrb r0, [sp, #0x4c] + cmp r0, #0x2 + bne _020E0000 + ldr r0, [sp, #0x8] + str r0, [sp, #0x10] + ldr r0, [sp, #0x14] + cmp r0, #0x0 + ldreq r0, [sp, #0xc] + cmpeq r0, #0x0 + ldrne r0, [sp, #0x10] + subne r0, r0, #0x1 + strne r0, [sp, #0x10] + cmp r5, #0x0 + cmpeq r11, #0x10 + bne _020E0000 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrne r0, [sp, #0x10] + subne r0, r0, #0x2 + strne r0, [sp, #0x10] +_020E0000: + ldr r0, [sp, #0x0] + ldr r1, _020E00B8 ; =0x000001FD + sub r2, r0, r6 + ldr r0, [sp, #0x10] + add r0, r0, r2 + cmp r0, r1 + addgt sp, sp, #0x18 + movgt r0, #0x0 + ldmgtia sp!, {r3-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + ldr r0, [sp, #0x10] + cmp r7, r0 + bge _020E0050 + mov r1, #0x30 +_020E003C: + ldr r0, [sp, #0x10] + add r7, r7, #0x1 + cmp r7, r0 + strb r1, [r6, #-0x1]! + blt _020E003C +_020E0050: + cmp r5, #0x0 + cmpeq r11, #0x10 + bne _020E0070 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x30 + strneb r8, [r6, #-0x1] + strneb r0, [r6, #-0x2]! +_020E0070: + ldr r0, [sp, #0x14] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r6, #-0x1]! + bne _020E00A4 + ldr r0, [sp, #0xc] + cmp r0, #0x1 + moveq r0, #0x2b + streqb r0, [r6, #-0x1]! + beq _020E00A4 + cmp r0, #0x2 + moveq r0, #0x20 + streqb r0, [r6, #-0x1]! +_020E00A4: + mov r0, r6 + add sp, sp, #0x18 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E00B8: .word 0x000001FD + + arm_func_start double2hex +double2hex: ; 0x020E00BC + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r10,lr} + sub sp, sp, #0x44 + ldr r7, [sp, #0x80] + ldr r0, _020E056C ; =0x000001FD + mov r8, r2 + cmp r7, r0 + ldrb r6, [sp, #0x79] + ldrb r5, [sp, #0x77] + ldrb r4, [sp, #0x75] + ldr r1, [sp, #0x68] + ldr r2, [sp, #0x6c] + addgt sp, sp, #0x44 + movgt r0, #0x0 + ldmgtia sp!, {r3-r10,lr} + addgt sp, sp, #0x10 + bxgt lr + mov r10, #0x0 + mov r9, #0x20 + add r0, sp, #0x8 + add r3, sp, #0xc + strb r10, [sp, #0x8] + strh r9, [sp, #0xa] + bl __num2dec_internal2 + ldr r0, [sp, #0x68] + ldr r1, [sp, #0x6c] + bl fabs + mov r2, r0 + mov r0, r10 + mov r3, r1 + mov r1, r0 + bl _deq + bne _020E0188 + ldr r3, _020E0570 ; =0x02106DA0 + sub r0, r8, #0x6 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + add sp, sp, #0x44 + strb r2, [r8, #-0x6] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r2, [r3, #0x4] + ldrb r1, [r3, #0x5] + strb r2, [r0, #0x4] + strb r1, [r0, #0x5] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0188: + ldrb r0, [sp, #0x11] + cmp r0, #0x49 + bne _020E0298 + ldrsb r0, [sp, #0xc] + cmp r0, #0x0 + beq _020E0224 + cmp r6, #0x41 + sub r0, r8, #0x5 + bne _020E01E8 + ldr r3, _020E0574 ; =0x02106DA8 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E01E8: + ldr r3, _020E0578 ; =0x02106DB0 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0224: + cmp r6, #0x41 + sub r0, r8, #0x4 + bne _020E0264 + ldr r3, _020E057C ; =0x02106DB8 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0264: + ldr r3, _020E0580 ; =0x02106DBC + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0298: + cmp r0, #0x4e + bne _020E03A4 + ldrsb r0, [sp, #0xc] + cmp r0, #0x0 + beq _020E0330 + cmp r6, #0x41 + sub r0, r8, #0x5 + bne _020E02F4 + ldr r3, _020E0584 ; =0x02106DC0 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E02F4: + ldr r3, _020E0588 ; =0x02106DC8 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0330: + cmp r6, #0x41 + sub r0, r8, #0x4 + bne _020E0370 + ldr r3, _020E058C ; =0x02106DD0 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E0370: + ldr r3, _020E0590 ; =0x02106DD4 + add sp, sp, #0x44 + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E03A4: + mov r3, r10 + mov r1, #0x1 + mov r0, #0x64 + add r9, sp, #0x68 + strb r1, [sp, #0x34] + strb r1, [sp, #0x35] + strb r3, [sp, #0x36] + strb r3, [sp, #0x37] + strb r3, [sp, #0x38] + str r3, [sp, #0x3c] + str r1, [sp, #0x40] + strb r0, [sp, #0x39] +_020E03D4: + rsb r1, r3, #0x7 + ldrsb r2, [r9, r3] + ldrsb r0, [r9, r1] + strb r0, [r9, r3] + add r3, r3, #0x1 + strb r2, [r9, r1] + cmp r3, #0x4 + blt _020E03D4 + ldrb r0, [sp, #0x69] + ldrb r1, [sp, #0x68] + ldr sb, _020E0594 ; =0x000007FF + mov r0, r0, lsl #0x11 + orr r1, r0, r1, lsl #0x19 + add r0, sp, #0x34 + and lr, r9, r1, lsr #0x15 + sub r12, sp, #0x8 + ldmia r0, {r0-r3} + stmia r12, {r0-r3} + rsb r0, r9, #0x400 + mov r1, r8 + add r0, lr, r0 + ldmia r12, {r2-r3} + bl long2str + cmp r6, #0x61 + moveq r1, #0x70 + movne r1, #0x50 + strb r1, [r0, #-0x1]! + mov r1, r7, lsl #0x2 + mov lr, r7 + cmp r7, #0x1 + add r8, r1, #0xb + add r12, sp, #0x68 + blt _020E04E4 + mov r9, #0x30 +_020E045C: + cmp r8, #0x40 + bge _020E04CC + ldrb r1, [r12, r8, asr #0x3] + and r2, r8, #0x7 + rsb r3, r2, #0x7 + mov r2, r1, asr r3 + sub r10, r8, #0x4 + bic r1, r8, #0x7 + bic r10, r10, #0x7 + cmp r1, r10 + add r10, r12, r8, asr #0x3 + and r1, r2, #0xff + beq _020E04A0 + ldrb r2, [r10, #-0x1] + mov r2, r2, lsl #0x8 + orr r1, r1, r2, asr r3 + and r1, r1, #0xff +_020E04A0: + and r1, r1, #0xf + cmp r1, #0xa + addcc r1, r1, #0x30 + andcc r1, r1, #0xff + blo _020E04D0 + cmp r6, #0x61 + addeq r1, r1, #0x57 + andeq r1, r1, #0xff + addne r1, r1, #0x37 + andne r1, r1, #0xff + b _020E04D0 +_020E04CC: + mov r1, r9 +_020E04D0: + sub lr, lr, #0x1 + cmp lr, #0x1 + strb r1, [r0, #-0x1]! + sub r8, r8, #0x4 + bge _020E045C +_020E04E4: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r1, #0x2e + strneb r1, [r0, #-0x1]! + mov r1, #0x31 + strb r1, [r0, #-0x1] + cmp r6, #0x61 + moveq r1, #0x78 + movne r1, #0x58 + strb r1, [r0, #-0x2]! + mov r1, #0x30 + strb r1, [r0, #-0x1]! + ldrsb r1, [sp, #0xc] + cmp r1, #0x0 + movne r1, #0x2d + strneb r1, [r0, #-0x1]! + addne sp, sp, #0x44 + ldmneia sp!, {r3-r10,lr} + addne sp, sp, #0x10 + bxne lr + cmp r4, #0x1 + moveq r1, #0x2b + streqb r1, [r0, #-0x1]! + addeq sp, sp, #0x44 + ldmeqia sp!, {r3-r10,lr} + addeq sp, sp, #0x10 + bxeq lr + cmp r4, #0x2 + moveq r1, #0x20 + streqb r1, [r0, #-0x1]! + add sp, sp, #0x44 + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E056C: .word 0x000001FD +_020E0570: .word 0x02106DA0 +_020E0574: .word 0x02106DA8 +_020E0578: .word 0x02106DB0 +_020E057C: .word 0x02106DB8 +_020E0580: .word 0x02106DBC +_020E0584: .word 0x02106DC0 +_020E0588: .word 0x02106DC8 +_020E058C: .word 0x02106DD0 +_020E0590: .word 0x02106DD4 +_020E0594: .word 0x000007FF + + arm_func_start round_decimal +round_decimal: ; 0x020E0598 + stmdb sp!, {r4,lr} + cmp r1, #0x0 + bge _020E05C0 +_020E05A4: + mov r1, #0x0 + strh r1, [r0, #0x2] + mov r1, #0x1 + strb r1, [r0, #0x4] + mov r1, #0x30 + strb r1, [r0, #0x5] + ldmia sp!, {r4,pc} +_020E05C0: + ldrb lr, [r0, #0x4] + cmp r1, lr + ldmgeia sp!, {r4,pc} +_020E05CC: ; 0x020E05CC + add r12, r0, #0x5 + add r2, r12, r1 + add r2, r2, #0x1 + ldrsb r3, [r2, #-0x1]! + sub r3, r3, #0x30 + mov r3, r3, lsl #0x18 + mov r3, r3, asr #0x18 + cmp r3, #0x5 + bne _020E0620 + add r12, r12, lr +_020E05F4: + sub r12, r12, #0x1 + cmp r12, r2 + bls _020E060C + ldrsb r3, [r12, #0x0] + cmp r3, #0x30 + beq _020E05F4 +_020E060C: + cmp r12, r2 + ldreqsb r3, [r2, #-0x1] + andeq r4, r3, #0x1 + movne r4, #0x1 + b _020E0628 +_020E0620: + movgt r4, #0x1 + movle r4, #0x0 +_020E0628: + cmp r1, #0x0 + beq _020E0684 + mov r12, #0x0 + mov lr, #0x1 +_020E0638: + ldrsb r3, [r2, #-0x1]! + sub r3, r3, #0x30 + add r3, r3, r4 + mov r3, r3, lsl #0x18 + mov r3, r3, asr #0x18 + cmp r3, #0x9 + movgt r4, lr + movle r4, r12 + cmp r4, #0x0 + bne _020E0668 + cmp r3, #0x0 + bne _020E0670 +_020E0668: + sub r1, r1, #0x1 + b _020E067C +_020E0670: + add r3, r3, #0x30 + strb r3, [r2, #0x0] + b _020E0684 +_020E067C: + cmp r1, #0x0 + bne _020E0638 +_020E0684: + cmp r4, #0x0 + beq _020E06AC + ldrsh r3, [r0, #0x2] + mov r2, #0x1 + mov r1, #0x31 + add r3, r3, #0x1 + strh r3, [r0, #0x2] + strb r2, [r0, #0x4] + strb r1, [r0, #0x5] + ldmia sp!, {r4,pc} +_020E06AC: + cmp r1, #0x0 + beq _020E05A4 + strb r1, [r0, #0x4] + ldmia sp!, {r4,pc} + + arm_func_start float2str +float2str: ; 0x020E06BC + stmdb sp!, {r0-r3} + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x2c + ldr r7, [sp, #0x68] + ldr r3, _020E0DF4 ; =0x000001FD + ldrb r6, [sp, #0x61] + ldrb r5, [sp, #0x5f] + ldrb r4, [sp, #0x5d] + cmp r7, r3 + mov r10, r0 + mov r8, r1 + mov r9, r2 + addgt sp, sp, #0x2c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + mov r12, #0x0 + mov r11, #0x20 + add r0, sp, #0x0 + add r3, sp, #0x4 + mov r1, r10 + mov r2, r8 + strb r12, [sp, #0x0] + strh r11, [sp, #0x2] + bl __num2dec_internal2 + ldrb r0, [sp, #0x8] + add r1, sp, #0x9 + add r0, r1, r0 + b _020E074C +_020E0734: + ldrb r2, [sp, #0x8] + ldrsh r1, [sp, #0x6] + sub r2, r2, #0x1 + add r1, r1, #0x1 + strb r2, [sp, #0x8] + strh r1, [sp, #0x6] +_020E074C: + ldrb r1, [sp, #0x8] + cmp r1, #0x1 + bls _020E0764 + ldrsb r1, [r0, #-0x1]! + cmp r1, #0x30 + beq _020E0734 +_020E0764: + ldrb r0, [sp, #0x9] + cmp r0, #0x30 + beq _020E0784 + cmp r0, #0x49 + beq _020E0790 + cmp r0, #0x4e + beq _020E08F0 + b _020E0A44 +_020E0784: + mov r0, #0x0 + strh r0, [sp, #0x6] + b _020E0A44 +_020E0790: + mov r2, #0x0 + mov r0, r10 + mov r1, r8 + mov r3, r2 + bl _dls + bhs _020E0854 + cmp r6, #0x0 + sub r0, r9, #0x5 + blt _020E07BC + cmp r6, #0x80 + blt _020E07C4 +_020E07BC: + mov r1, #0x0 + b _020E07D4 +_020E07C4: + ldr r1, _020E0DF8 ; =0x0210430C + mov r2, r6, lsl #0x1 + ldrh r1, [r1, r2] + and r1, r1, #0x200 +_020E07D4: + cmp r1, #0x0 + beq _020E0818 + ldr r3, _020E0DFC ; =0x02106DA8 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E0818: + ldr r3, _020E0E00 ; =0x02106DB0 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E0854: + cmp r6, #0x0 + sub r0, r9, #0x4 + blt _020E0868 + cmp r6, #0x80 + blt _020E0870 +_020E0868: + mov r1, #0x0 + b _020E0880 +_020E0870: + ldr r1, _020E0DF8 ; =0x0210430C + mov r2, r6, lsl #0x1 + ldrh r1, [r1, r2] + and r1, r1, #0x200 +_020E0880: + cmp r1, #0x0 + beq _020E08BC + ldr r3, _020E0E04 ; =0x02106DB8 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E08BC: + ldr r3, _020E0E08 ; =0x02106DBC + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E08F0: + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + beq _020E09A8 + cmp r6, #0x0 + sub r0, r9, #0x5 + blt _020E0910 + cmp r6, #0x80 + blt _020E0918 +_020E0910: + mov r1, #0x0 + b _020E0928 +_020E0918: + ldr r1, _020E0DF8 ; =0x0210430C + mov r2, r6, lsl #0x1 + ldrh r1, [r1, r2] + and r1, r1, #0x200 +_020E0928: + cmp r1, #0x0 + beq _020E096C + ldr r3, _020E0E0C ; =0x02106DC0 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E096C: + ldr r3, _020E0E10 ; =0x02106DC8 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldrb r1, [r3, #0x4] + strb r1, [r0, #0x4] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E09A8: + cmp r6, #0x0 + sub r0, r9, #0x4 + blt _020E09BC + cmp r6, #0x80 + blt _020E09C4 +_020E09BC: + mov r1, #0x0 + b _020E09D4 +_020E09C4: + ldr r1, _020E0DF8 ; =0x0210430C + mov r2, r6, lsl #0x1 + ldrh r1, [r1, r2] + and r1, r1, #0x200 +_020E09D4: + cmp r1, #0x0 + beq _020E0A10 + ldr r3, _020E0E14 ; =0x02106DD0 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E0A10: + ldr r3, _020E0E18 ; =0x02106DD4 + add sp, sp, #0x2c + ldrb r2, [r3, #0x0] + ldrb r1, [r3, #0x1] + strb r2, [r0, #0x0] + strb r1, [r0, #0x1] + ldrb r2, [r3, #0x2] + ldrb r1, [r3, #0x3] + strb r2, [r0, #0x2] + strb r1, [r0, #0x3] + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E0A44: + ldrb r0, [sp, #0x8] + ldrsh r1, [sp, #0x6] + sub r8, r9, #0x1 + sub r0, r0, #0x1 + add r0, r1, r0 + strh r0, [sp, #0x6] + mov r0, #0x0 + strb r0, [r8, #0x0] + cmp r6, #0x65 + bgt _020E0A98 + bge _020E0B24 + cmp r6, #0x47 + bgt _020E0DE0 + cmp r6, #0x45 + blt _020E0DE0 + beq _020E0B24 + cmp r6, #0x46 + beq _020E0C6C + cmp r6, #0x47 + beq _020E0AB0 + b _020E0DE0 +_020E0A98: + cmp r6, #0x66 + bgt _020E0AA8 + beq _020E0C6C + b _020E0DE0 +_020E0AA8: + cmp r6, #0x67 + bne _020E0DE0 +_020E0AB0: + ldrb r0, [sp, #0x8] + cmp r0, r7 + ble _020E0AC8 + add r0, sp, #0x4 + mov r1, r7 + bl round_decimal +_020E0AC8: + ldrsh r2, [sp, #0x6] + mvn r0, #0x3 + cmp r2, r0 + blt _020E0AE0 + cmp r2, r7 + blt _020E0B00 +_020E0AE0: + cmp r5, #0x0 + ldreqb r0, [sp, #0x8] + subne r7, r7, #0x1 + subeq r7, r0, #0x1 + cmp r6, #0x67 + moveq r6, #0x65 + movne r6, #0x45 + b _020E0B24 +_020E0B00: + cmp r5, #0x0 + addne r0, r2, #0x1 + subne r7, r7, r0 + bne _020E0C6C + ldrb r1, [sp, #0x8] + add r0, r2, #0x1 + subs r7, r1, r0 + movmi r7, #0x0 + b _020E0C6C +_020E0B24: + ldrb r0, [sp, #0x8] + add r1, r7, #0x1 + cmp r0, r1 + ble _020E0B3C + add r0, sp, #0x4 + bl round_decimal +_020E0B3C: + ldrsh lr, [sp, #0x6] + mov r11, #0x2b + mov r10, #0x0 + cmp lr, #0x0 + rsblt lr, lr, #0x0 + movlt r11, #0x2d + ldr r3, _020E0E1C ; =0x66666667 + mov r0, #0xa + b _020E0B90 +_020E0B60: + mov r1, lr, lsr #0x1f + smull r2, r12, r3, lr + add r12, r1, r12, asr #0x2 + smull r1, r2, r0, r12 + sub r12, lr, r1 + add r1, r12, #0x30 + strb r1, [r8, #-0x1]! + mov r2, lr + smull r1, lr, r3, r2 + mov r1, r2, lsr #0x1f + add lr, r1, lr, asr #0x2 + add r10, r10, #0x1 +_020E0B90: + cmp lr, #0x0 + bne _020E0B60 + cmp r10, #0x2 + blt _020E0B60 + strb r11, [r8, #-0x1] + strb r6, [r8, #-0x2]! + sub r1, r9, r8 + ldr r0, _020E0DF4 ; =0x000001FD + add r1, r7, r1 + cmp r1, r0 + addgt sp, sp, #0x2c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + ldrb r1, [sp, #0x8] + add r0, r7, #0x1 + cmp r1, r0 + bge _020E0BFC + add r0, r7, #0x2 + sub r0, r0, r1 + subs r1, r0, #0x1 + beq _020E0BFC + mov r0, #0x30 +_020E0BF0: + strb r0, [r8, #-0x1]! + subs r1, r1, #0x1 + bne _020E0BF0 +_020E0BFC: + ldrb r1, [sp, #0x8] + add r0, sp, #0x9 + add r2, r0, r1 + subs r1, r1, #0x1 + beq _020E0C20 +_020E0C10: + ldrsb r0, [r2, #-0x1]! + subs r1, r1, #0x1 + strb r0, [r8, #-0x1]! + bne _020E0C10 +_020E0C20: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r0, #0x2e + strneb r0, [r8, #-0x1]! + ldrb r0, [sp, #0x9] + strb r0, [r8, #-0x1]! + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r8, #-0x1]! + bne _020E0DE0 + cmp r4, #0x1 + moveq r0, #0x2b + streqb r0, [r8, #-0x1]! + beq _020E0DE0 + cmp r4, #0x2 + moveq r0, #0x20 + streqb r0, [r8, #-0x1]! + b _020E0DE0 +_020E0C6C: + ldrsh r3, [sp, #0x6] + ldrb r2, [sp, #0x8] + sub r0, r2, r3 + subs r1, r0, #0x1 + movmi r1, #0x0 + cmp r1, r7 + ble _020E0CAC + sub r1, r1, r7 + add r0, sp, #0x4 + sub r1, r2, r1 + bl round_decimal + ldrsh r3, [sp, #0x6] + ldrb r2, [sp, #0x8] + sub r0, r2, r3 + subs r1, r0, #0x1 + movmi r1, #0x0 +_020E0CAC: + adds r0, r3, #0x1 + movmi r0, #0x0 + ldr r3, _020E0DF4 ; =0x000001FD + add r6, r0, r1 + cmp r6, r3 + addgt sp, sp, #0x2c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + add r3, sp, #0x9 + sub r6, r7, r1 + cmp r6, #0x0 + add r2, r3, r2 + mov r9, #0x0 + ble _020E0D00 + mov r3, #0x30 +_020E0CF0: + add r9, r9, #0x1 + cmp r9, r6 + strb r3, [r8, #-0x1]! + blt _020E0CF0 +_020E0D00: + mov r6, #0x0 + b _020E0D14 +_020E0D08: + ldrsb r3, [r2, #-0x1]! + add r6, r6, #0x1 + strb r3, [r8, #-0x1]! +_020E0D14: + cmp r6, r1 + ldrltb r3, [sp, #0x8] + cmplt r6, r3 + blt _020E0D08 + cmp r6, r1 + bge _020E0D40 + mov r3, #0x30 +_020E0D30: + add r6, r6, #0x1 + cmp r6, r1 + strb r3, [r8, #-0x1]! + blt _020E0D30 +_020E0D40: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r1, #0x2e + strneb r1, [r8, #-0x1]! + cmp r0, #0x0 + beq _020E0DA8 + ldrb r1, [sp, #0x8] + mov r5, #0x0 + sub r1, r0, r1 + cmp r1, #0x0 + ble _020E0D88 + mov r3, #0x30 +_020E0D70: + strb r3, [r8, #-0x1]! + ldrb r1, [sp, #0x8] + add r5, r5, #0x1 + sub r1, r0, r1 + cmp r5, r1 + blt _020E0D70 +_020E0D88: + cmp r5, r0 + bge _020E0DB0 +_020E0D90: + ldrsb r1, [r2, #-0x1]! + add r5, r5, #0x1 + cmp r5, r0 + strb r1, [r8, #-0x1]! + blt _020E0D90 + b _020E0DB0 +_020E0DA8: + mov r0, #0x30 + strb r0, [r8, #-0x1]! +_020E0DB0: + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r8, #-0x1]! + bne _020E0DE0 + cmp r4, #0x1 + moveq r0, #0x2b + streqb r0, [r8, #-0x1]! + beq _020E0DE0 + cmp r4, #0x2 + moveq r0, #0x20 + streqb r0, [r8, #-0x1]! +_020E0DE0: + mov r0, r8 + add sp, sp, #0x2c + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E0DF4: .word 0x000001FD +_020E0DF8: .word 0x0210430C +_020E0DFC: .word 0x02106DA8 +_020E0E00: .word 0x02106DB0 +_020E0E04: .word 0x02106DB8 +_020E0E08: .word 0x02106DBC +_020E0E0C: .word 0x02106DC0 +_020E0E10: .word 0x02106DC8 +_020E0E14: .word 0x02106DD0 +_020E0E18: .word 0x02106DD4 +_020E0E1C: .word 0x66666667 + + arm_func_start __pformatter +__pformatter: + stmdb sp!, {r0-r3} + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x22c + mov r3, #0x20 + mov r11, r2 + strb r3, [sp, #0x19] + ldrsb r2, [r11, #0x0] + mov r9, r0 + mov r8, r1 + cmp r2, #0x0 + mov r10, #0x0 + beq _020E1628 +_020E0E50: + mov r0, r11 + mov r1, #0x25 + bl strchr + str r0, [sp, #0xc] + cmp r0, #0x0 + bne _020E0EA4 + mov r0, r11 + bl strlen + movs r2, r0 + add r10, r10, r2 + beq _020E1628 + mov r0, r8 + mov r1, r11 + blx r9 + cmp r0, #0x0 + bne _020E1628 + add sp, sp, #0x22c + mvn r0, #0x0 + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E0EA4: + subs r2, r0, r11 + add r10, r10, r2 + beq _020E0ED4 + mov r0, r8 + mov r1, r11 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E0ED4: + ldr r0, [sp, #0xc] + add r1, sp, #0x25c + add r2, sp, #0x1c + bl parse_format_printf + ldrb r1, [sp, #0x21] + mov r11, r0 + cmp r1, #0x61 + bgt _020E0F40 + bge _020E12A4 + cmp r1, #0x47 + bgt _020E0F34 + subs r0, r1, #0x41 + addpl pc, pc, r0, lsl #0x2 + b _020E0F28 +_020E0F0C: ; 0x020E0F0C + b _020E12A4 +_020E0F10: ; 0x020E0F10 + b _020E148C +_020E0F14: ; 0x020E0F14 + b _020E148C +_020E0F18: ; 0x020E0F18 + b _020E148C +_020E0F1C: ; 0x020E0F1C + b _020E123C +_020E0F20: ; 0x020E0F20 + b _020E123C +_020E0F24: ; 0x020E0F24 + b _020E123C +_020E0F28: + cmp r1, #0x25 + beq _020E1478 + b _020E148C +_020E0F34: + cmp r1, #0x58 + beq _020E1100 + b _020E148C +_020E0F40: + cmp r1, #0x75 + bgt _020E0FA8 + subs r0, r1, #0x64 + addpl pc, pc, r0, lsl #0x2 + b _020E0F9C +_020E0F54: ; 0x020E0F54 + b _020E0FC0 +_020E0F58: ; 0x020E0F58 + b _020E123C +_020E0F5C: ; 0x020E0F5C + b _020E123C +_020E0F60: ; 0x020E0F60 + b _020E123C +_020E0F64: ; 0x020E0F64 + b _020E148C +_020E0F68: ; 0x020E0F68 + b _020E0FC0 +_020E0F6C: ; 0x020E0F6C + b _020E148C +_020E0F70: ; 0x020E0F70 + b _020E148C +_020E0F74: ; 0x020E0F74 + b _020E148C +_020E0F78: ; 0x020E0F78 + b _020E148C +_020E0F7C: ; 0x020E0F7C + b _020E13CC +_020E0F80: ; 0x020E0F80 + b _020E1100 +_020E0F84: ; 0x020E0F84 + b _020E148C +_020E0F88: ; 0x020E0F88 + b _020E148C +_020E0F8C: ; 0x020E0F8C + b _020E148C +_020E0F90: ; 0x020E0F90 + b _020E130C +_020E0F94: ; 0x020E0F94 + b _020E148C +_020E0F98: ; 0x020E0F98 + b _020E1100 +_020E0F9C: + cmp r1, #0x63 + beq _020E1458 + b _020E148C +_020E0FA8: + cmp r1, #0x78 + bgt _020E0FB8 + beq _020E1100 + b _020E148C +_020E0FB8: + cmp r1, #0xff + b _020E148C +_020E0FC0: + ldrb r0, [sp, #0x20] + cmp r0, #0x3 + bne _020E0FE0 + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E1078 +_020E0FE0: + cmp r0, #0x4 + bne _020E1008 + ldr r1, [sp, #0x25c] + add r2, r1, #0x8 + str r2, [sp, #0x25c] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E1078 +_020E1008: + cmp r0, #0x6 + bne _020E1030 + ldr r1, [sp, #0x25c] + add r2, r1, #0x8 + str r2, [sp, #0x25c] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E1078 +_020E1030: + cmp r0, #0x7 + bne _020E104C + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E1078 +_020E104C: + cmp r0, #0x8 + bne _020E1068 + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E1078 +_020E1068: + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] +_020E1078: + cmp r0, #0x2 + moveq r1, r5, lsl #0x10 + moveq r5, r1, asr #0x10 + cmp r0, #0x1 + moveq r1, r5, lsl #0x18 + moveq r5, r1, asr #0x18 + cmp r0, #0x4 + cmpne r0, #0x6 + add r0, sp, #0x1c + bne _020E10CC + sub r4, sp, #0x4 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + ldr r3, [r4, #0x0] + ldr r0, [sp, #0x10] + ldr r1, [sp, #0x14] + add r2, sp, #0x22c + bl longlong2str + movs r7, r0 + beq _020E148C + b _020E10F0 +_020E10CC: + sub r4, sp, #0x8 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + add r1, sp, #0x22c + mov r0, r5 + ldmia r4, {r2-r3} + bl long2str + movs r7, r0 + beq _020E148C +_020E10F0: + add r0, sp, #0x200 + add r0, r0, #0x2b + sub r6, r0, r7 + b _020E14D8 +_020E1100: + ldrb r0, [sp, #0x20] + cmp r0, #0x3 + bne _020E1120 + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E11B8 +_020E1120: + cmp r0, #0x4 + bne _020E1148 + ldr r1, [sp, #0x25c] + add r2, r1, #0x8 + str r2, [sp, #0x25c] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E11B8 +_020E1148: + cmp r0, #0x6 + bne _020E1170 + ldr r1, [sp, #0x25c] + add r2, r1, #0x8 + str r2, [sp, #0x25c] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E11B8 +_020E1170: + cmp r0, #0x7 + bne _020E118C + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E11B8 +_020E118C: + cmp r0, #0x8 + bne _020E11A8 + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] + b _020E11B8 +_020E11A8: + ldr r1, [sp, #0x25c] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r5, [r1, #-0x4] +_020E11B8: + cmp r0, #0x2 + moveq r1, r5, lsl #0x10 + moveq r5, r1, lsr #0x10 + cmp r0, #0x1 + andeq r5, r5, #0xff + cmp r0, #0x4 + cmpne r0, #0x6 + add r0, sp, #0x1c + bne _020E1208 + sub r4, sp, #0x4 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + ldr r3, [r4, #0x0] + ldr r0, [sp, #0x10] + ldr r1, [sp, #0x14] + add r2, sp, #0x22c + bl longlong2str + movs r7, r0 + beq _020E148C + b _020E122C +_020E1208: + sub r4, sp, #0x8 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + add r1, sp, #0x22c + mov r0, r5 + ldmia r4, {r2-r3} + bl long2str + movs r7, r0 + beq _020E148C +_020E122C: + add r0, sp, #0x200 + add r0, r0, #0x2b + sub r6, r0, r7 + b _020E14D8 +_020E123C: + ldrb r0, [sp, #0x20] + cmp r0, #0x9 + ldrne r0, [sp, #0x25c] + addne r0, r0, #0x8 + strne r0, [sp, #0x25c] + bne _020E1260 + ldr r0, [sp, #0x25c] + add r0, r0, #0x8 + str r0, [sp, #0x25c] +_020E1260: + ldr r7, [r0, #-0x8] + ldr r6, [r0, #-0x4] + add r0, sp, #0x1c + sub r4, sp, #0x4 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + ldr r3, [r4, #0x0] + mov r0, r7 + mov r1, r6 + add r2, sp, #0x22c + bl float2str + movs r7, r0 + beq _020E148C + add r0, sp, #0x200 + add r0, r0, #0x2b + sub r6, r0, r7 + b _020E14D8 +_020E12A4: + ldrb r0, [sp, #0x20] + cmp r0, #0x9 + ldrne r0, [sp, #0x25c] + addne r0, r0, #0x8 + strne r0, [sp, #0x25c] + bne _020E12C8 + ldr r0, [sp, #0x25c] + add r0, r0, #0x8 + str r0, [sp, #0x25c] +_020E12C8: + ldr r7, [r0, #-0x8] + ldr r6, [r0, #-0x4] + add r0, sp, #0x1c + sub r4, sp, #0x4 + ldmia r0, {r0-r3} + stmia r4, {r0-r3} + ldr r3, [r4, #0x0] + mov r0, r7 + mov r1, r6 + add r2, sp, #0x22c + bl double2hex + movs r7, r0 + beq _020E148C + add r0, sp, #0x200 + add r0, r0, #0x2b + sub r6, r0, r7 + b _020E14D8 +_020E130C: + ldrb r0, [sp, #0x20] + cmp r0, #0x5 + bne _020E134C + ldr r0, [sp, #0x25c] + mov r2, #0x200 + add r0, r0, #0x4 + str r0, [sp, #0x25c] + ldr r1, [r0, #-0x4] + add r0, sp, #0x2c + cmp r1, #0x0 + ldreq r1, _020E163C ; =0x02106DD8 + bl wcstombs +_020E133C: ; 0x020E133C + cmp r0, #0x0 + blt _020E148C + add r7, sp, #0x2c + b _020E135C +_020E134C: + ldr r0, [sp, #0x25c] + add r0, r0, #0x4 + str r0, [sp, #0x25c] + ldr r7, [r0, #-0x4] +_020E135C: + ldrb r0, [sp, #0x1f] + cmp r7, #0x0 + ldreq r7, _020E1640 ; =0x02106DDC + cmp r0, #0x0 + beq _020E1390 + ldrb r0, [sp, #0x1e] + ldrb r6, [r7], #0x1 + cmp r0, #0x0 + beq _020E14D8 + ldr r0, [sp, #0x28] + cmp r6, r0 + movgt r6, r0 + b _020E14D8 +_020E1390: + ldrb r0, [sp, #0x1e] + cmp r0, #0x0 + beq _020E13BC + ldr r6, [sp, #0x28] + mov r0, r7 + mov r2, r6 + mov r1, #0x0 + bl memchr +_020E13B0: ; 0x020E13B0 + cmp r0, #0x0 + subne r6, r0, r7 + b _020E14D8 +_020E13BC: + mov r0, r7 + bl strlen + mov r6, r0 + b _020E14D8 +_020E13CC: + ldr r1, [sp, #0x25c] + ldrb r0, [sp, #0x20] + add r1, r1, #0x4 + str r1, [sp, #0x25c] + ldr r1, [r1, #-0x4] + cmp r0, #0x8 + addls pc, pc, r0, lsl #0x2 + b _020E161C +_020E13EC: + b _020E1410 +_020E13F0: + b _020E161C +_020E13F4: + b _020E1418 +_020E13F8: + b _020E1420 +_020E13FC: + b _020E1448 +_020E1400: + b _020E161C +_020E1404: + b _020E1428 +_020E1408: + b _020E1438 +_020E140C: + b _020E1440 +_020E1410: + str r10, [r1, #0x0] + b _020E161C +_020E1418: + strh r10, [r1, #0x0] + b _020E161C +_020E1420: + str r10, [r1, #0x0] + b _020E161C +_020E1428: + str r10, [r1, #0x0] + mov r0, r10, asr #0x1f + str r0, [r1, #0x4] + b _020E161C +_020E1438: + str r10, [r1, #0x0] + b _020E161C +_020E1440: + str r10, [r1, #0x0] + b _020E161C +_020E1448: + str r10, [r1, #0x0] + mov r0, r10, asr #0x1f + str r0, [r1, #0x4] + b _020E161C +_020E1458: + ldr r0, [sp, #0x25c] + add r7, sp, #0x2c + add r0, r0, #0x4 + str r0, [sp, #0x25c] + ldr r0, [r0, #-0x4] + mov r6, #0x1 + strb r0, [sp, #0x2c] + b _020E14D8 +_020E1478: + mov r0, #0x25 + strb r0, [sp, #0x2c] + add r7, sp, #0x2c + mov r6, #0x1 + b _020E14D8 +_020E148C: + ldr r0, [sp, #0xc] + bl strlen + movs r4, r0 + beq _020E14C4 + ldr r1, [sp, #0xc] + mov r0, r8 + mov r2, r4 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E14C4: + add sp, sp, #0x22c + add r0, r10, r4 + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E14D8: + ldrb r0, [sp, #0x1c] + mov r4, r6 + cmp r0, #0x0 + beq _020E158C + cmp r0, #0x2 + moveq r0, #0x30 + movne r0, #0x20 + strb r0, [sp, #0x19] + ldrsb r0, [r7, #0x0] + cmp r0, #0x2b + cmpne r0, #0x2d + cmpne r0, #0x20 + bne _020E1548 + ldrsb r0, [sp, #0x19] + cmp r0, #0x30 + bne _020E1548 + mov r0, r8 + mov r1, r7 + mov r2, #0x1 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + add r7, r7, #0x1 + sub r6, r6, #0x1 +_020E1548: + ldr r0, [sp, #0x24] + cmp r4, r0 + bge _020E158C +_020E1554: + mov r0, r8 + add r1, sp, #0x19 + mov r2, #0x1 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r0, [sp, #0x24] + add r4, r4, #0x1 + cmp r4, r0 + blt _020E1554 +_020E158C: + cmp r6, #0x0 + beq _020E15BC + mov r0, r8 + mov r1, r7 + mov r2, r6 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E15BC: + ldrb r0, [sp, #0x1c] + cmp r0, #0x0 + bne _020E1618 + ldr r0, [sp, #0x24] + cmp r4, r0 + bge _020E1618 + mov r6, #0x20 + add r7, sp, #0x18 +_020E15DC: + mov r0, r8 + mov r1, r7 + mov r2, #0x1 + strb r6, [sp, #0x18] + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x22c + mvneq r0, #0x0 + ldmeqia sp!, {r4-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r0, [sp, #0x24] + add r4, r4, #0x1 + cmp r4, r0 + blt _020E15DC +_020E1618: + add r10, r10, r4 +_020E161C: + ldrsb r0, [r11, #0x0] + cmp r0, #0x0 + bne _020E0E50 +_020E1628: + mov r0, r10 + add sp, sp, #0x22c + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E163C: .word 0x02106DD8 +_020E1640: .word 0x02106DDC + + arm_func_start __FileWrite +__FileWrite: ; 0x020E1644 + stmdb sp!, {r3-r5,lr} + mov r5, r0 + mov r0, r1 + mov r3, r5 + mov r1, #0x1 + mov r4, r2 + bl __fwrite +_020E1660: ; 0x020E1660 + cmp r4, r0 + movne r5, #0x0 + mov r0, r5 + ldmia sp!, {r3-r5,pc} + + arm_func_start __StringWrite +__StringWrite: ; 0x020E1670 + stmdb sp!, {r3-r5,lr} + mov r4, r0 + ldr r3, [r4, #0x8] + mov r5, r2 + ldr r2, [r4, #0x4] + add r0, r3, r5 + cmp r0, r2 + ldr r0, [r4, #0x0] + subhi r5, r2, r3 + mov r2, r5 + add r0, r0, r3 + bl memcpy + ldr r1, [r4, #0x8] + mov r0, #0x1 + add r1, r1, r5 + str r1, [r4, #0x8] + ldmia sp!, {r3-r5,pc} + + arm_func_start printf +printf: ; 0x020E16B4 + stmdb sp!, {r0-r3} + stmdb sp!, {r4,lr} + ldr r0, _020E17B4 ; =0x02106AA4 + mvn r1, #0x0 + bl fwide +_020E16C8: ; 0x020E16C8 + cmp r0, #0x0 + mvnge r0, #0x0 + ldmgeia sp!, {r4,lr} + addge sp, sp, #0x10 + bxge lr + ldr r0, _020E17B8 ; =0x021D7118 + bl OS_TryLockMutex +_020E16E4: ; 0x020E16E4 + cmp r0, #0x0 + bne _020E1710 + ldr r0, _020E17BC ; =0x021D3498 + ldr r1, _020E17C0 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020E17C4 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0xc] + str r2, [r0, #0xc] + b _020E1768 +_020E1710: + ldr r0, _020E17BC ; =0x021D3498 + ldr r1, _020E17C0 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, #0xc] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020E1740 + ldr r0, _020E17C4 ; =0x021D70AC + ldr r1, [r0, #0xc] + add r1, r1, #0x1 + str r1, [r0, #0xc] + b _020E1768 +_020E1740: + ldr r0, _020E17B8 ; =0x021D7118 + bl OS_LockMutex + ldr r0, _020E17BC ; =0x021D3498 + ldr r1, _020E17C0 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020E17C4 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0xc] + str r2, [r0, #0xc] +_020E1768: + add r0, sp, #0x8 + bic r3, r0, #0x3 + ldr r2, [sp, #0x8] + ldr r0, _020E17C8 ; =__FileWrite + ldr r1, _020E17B4 ; =0x02106AA4 + add r3, r3, #0x4 + bl __pformatter + ldr r1, _020E17C4 ; =0x021D70AC + mov r4, r0 + ldr r0, [r1, #0xc] + subs r0, r0, #0x1 + str r0, [r1, #0xc] + bne _020E17A4 + ldr r0, _020E17B8 ; =0x021D7118 + bl OS_UnlockMutex +_020E17A4: + mov r0, r4 + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E17B4: .word 0x02106AA4 +_020E17B8: .word 0x021D7118 +_020E17BC: .word 0x021D3498 +_020E17C0: .word 0x021D7088 +_020E17C4: .word 0x021D70AC +_020E17C8: .word __FileWrite + + arm_func_start vsnprintf +vsnprintf: ; 0x020E17CC + stmdb sp!, {r4-r5,lr} + sub sp, sp, #0xc + mov r5, r0 + mov r4, r1 + mov r12, #0x0 + ldr r0, _020E1830 ; =__StringWrite + add r1, sp, #0x0 + str r5, [sp, #0x0] + str r4, [sp, #0x4] + str r12, [sp, #0x8] + bl __pformatter +_020E17F8: ; 0x020E17F8 + cmp r5, #0x0 + addeq sp, sp, #0xc + ldmeqia sp!, {r4-r5,pc} +_020E1804: ; 0x020E1804 + cmp r0, r4 + movcc r1, #0x0 + addcc sp, sp, #0xc + strccb r1, [r5, r0] + ldmccia sp!, {r4-r5,pc} +_020E1818: ; 0x020E1818 + cmp r4, #0x0 + addne r1, r5, r4 + movne r2, #0x0 + strneb r2, [r1, #-0x1] + add sp, sp, #0xc + ldmia sp!, {r4-r5,pc} + .balign 4 +_020E1830: .word __StringWrite + + arm_func_start snprintf +snprintf: ; 0x020E1834 + stmdb sp!, {r0-r3} + stmdb sp!, {r3,lr} + add r3, sp, #0x10 + bic r3, r3, #0x3 + ldr r2, [sp, #0x10] + add r3, r3, #0x4 + bl vsnprintf + ldmia sp!, {r3,lr} + add sp, sp, #0x10 + bx lr + + arm_func_start sprintf +sprintf: ; 0x020E185C + stmdb sp!, {r0-r3} + stmdb sp!, {r3,lr} + add r1, sp, #0xc + bic r1, r1, #0x3 + add r3, r1, #0x4 + ldr r2, [sp, #0xc] + mvn r1, #0x0 + bl vsnprintf + ldmia sp!, {r3,lr} + add sp, sp, #0x10 + bx lr + + arm_func_start qsort +qsort: ; 0x020E1888 + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x10 + mov r9, r1 + cmp r9, #0x2 + mov r10, r0 + mov r8, r2 + mov r7, r3 + addcc sp, sp, #0x10 + ldmccia sp!, {r3-r11,pc} +_020E18AC: ; 0x020E18AC + mov r0, r9, lsr #0x1 + add r11, r0, #0x1 + sub r0, r11, #0x1 + mla r0, r8, r0, r10 + sub r2, r9, #0x1 + str r0, [sp, #0xc] + mla r0, r8, r2, r10 + str r0, [sp, #0x8] + mul r0, r11, r8 + mvn r1, #0x0 + str r0, [sp, #0x4] + mul r0, r8, r1 + str r0, [sp, #0x0] +_020E18E0: + cmp r11, #0x1 + bls _020E1908 + ldr r0, [sp, #0x4] + sub r11, r11, #0x1 + sub r0, r0, r8 + str r0, [sp, #0x4] + ldr r0, [sp, #0xc] + sub r0, r0, r8 + str r0, [sp, #0xc] + b _020E1950 +_020E1908: + mov r2, r8 + ldr r4, [sp, #0x8] + ldr r3, [sp, #0xc] + cmp r8, #0x0 + beq _020E1934 +_020E191C: + ldrsb r0, [r4, #0x0] + ldrsb r1, [r3, #0x0] + subs r2, r2, #0x1 + strb r0, [r3], #0x1 + strb r1, [r4], #0x1 + bne _020E191C +_020E1934: + sub r9, r9, #0x1 + cmp r9, #0x1 + addeq sp, sp, #0x10 + ldmeqia sp!, {r3-r11,pc} +_020E1944: ; 0x020E1944 + ldr r0, [sp, #0x8] + sub r0, r0, r8 + str r0, [sp, #0x8] +_020E1950: + ldr r1, [sp, #0x4] + ldr r0, [sp, #0x0] + mov r4, r11 + add r0, r1, r0 + cmp r9, r11, lsl #0x1 + add r5, r10, r0 + blo _020E18E0 +_020E196C: + mov r4, r4, lsl #0x1 + sub r0, r4, #0x1 + mov r6, r5 + mla r5, r8, r0, r10 + cmp r9, r4 + bls _020E199C + mov r0, r5 + add r1, r5, r8 + blx r7 + cmp r0, #0x0 + addlt r4, r4, #0x1 + addlt r5, r5, r8 +_020E199C: + mov r0, r6 + mov r1, r5 + blx r7 + cmp r0, #0x0 + bge _020E18E0 + mov r2, r8 + mov r3, r5 + cmp r8, #0x0 + beq _020E19D8 +_020E19C0: + ldrsb r1, [r6, #0x0] + ldrsb r0, [r3, #0x0] + subs r2, r2, #0x1 + strb r0, [r6], #0x1 + strb r1, [r3], #0x1 + bne _020E19C0 +_020E19D8: + cmp r9, r4, lsl #0x1 + bhs _020E196C + b _020E18E0 +_020E19E4: ; 0x020E19E4 + add sp, sp, #0x10 + ldmia sp!, {r3-r11,pc} + + arm_func_start rand +rand: ; 0x020E19EC + ldr r2, _020E1A14 ; =0x02106DE0 + ldr r0, _020E1A18 ; =0x41C64E6D + ldr r3, [r2, #0x0] + ldr r1, _020E1A1C ; =0x00007FFF + mul r0, r3, r0 + add r0, r0, #0x39 + add r0, r0, #0x3000 + str r0, [r2, #0x0] + and r0, r1, r0, lsr #0x10 + bx lr + .balign 4 +_020E1A14: .word 0x02106DE0 +_020E1A18: .word 0x41C64E6D +_020E1A1C: .word 0x00007FFF + + arm_func_start srand +srand: ; 0x020E1A20 + ldr r1, _020E1A2C ; =0x02106DE0 + str r0, [r1, #0x0] + bx lr + .balign 4 +_020E1A2C: .word 0x02106DE0 + + arm_func_start parse_format_scanf +parse_format_scanf: ; 0x020E1A30 + stmdb sp!, {r3-r7,lr} + sub sp, sp, #0x28 + ldr r6, _020E1F20 ; =0x0210440C + add r5, sp, #0x0 + mov r7, r0 + mov lr, r1 + mov r4, r5 + ldmia r6!, {r0-r3} + stmia r5!, {r0-r3} + ldmia r6!, {r0-r3} + stmia r5!, {r0-r3} + ldmia r6, {r0-r1} + stmia r5, {r0-r1} + ldrsb r0, [r7, #0x1] + add r12, r7, #0x1 + cmp r0, #0x25 + bne _020E1A9C + strb r0, [sp, #0x3] + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4, {r0-r1} + stmia lr, {r0-r1} + add sp, sp, #0x28 + add r0, r12, #0x1 + ldmia sp!, {r3-r7,pc} +_020E1A9C: + cmp r0, #0x2a + moveq r0, #0x1 + streqb r0, [sp, #0x0] + ldreqsb r0, [r12, #0x1]! + cmp r0, #0x0 + blt _020E1ABC + cmp r0, #0x80 + blt _020E1AC4 +_020E1ABC: + mov r1, #0x0 + b _020E1AD4 +_020E1AC4: + ldr r1, _020E1F24 ; =0x0210430C + mov r2, r0, lsl #0x1 + ldrh r1, [r1, r2] + and r1, r1, #0x8 +_020E1AD4: + cmp r1, #0x0 + beq _020E1B74 + mov r1, #0x0 + ldr r3, _020E1F24 ; =0x0210430C + str r1, [sp, #0x4] + mov r4, r1 + mov r1, #0xa +_020E1AF0: + ldr r2, [sp, #0x4] + sub r0, r0, #0x30 + mla r0, r2, r1, r0 + str r0, [sp, #0x4] + ldrsb r0, [r12, #0x1]! + cmp r0, #0x0 + blt _020E1B14 + cmp r0, #0x80 + blt _020E1B1C +_020E1B14: + mov r2, r4 + b _020E1B28 +_020E1B1C: + mov r2, r0, lsl #0x1 + ldrh r2, [r3, r2] + and r2, r2, #0x8 +_020E1B28: + cmp r2, #0x0 + bne _020E1AF0 + ldr r1, [sp, #0x4] + cmp r1, #0x0 + bne _020E1B6C + mov r0, #0xff + add r4, sp, #0x0 + strb r0, [sp, #0x3] + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4, {r0-r1} + stmia lr, {r0-r1} + add sp, sp, #0x28 + add r0, r12, #0x1 + ldmia sp!, {r3-r7,pc} +_020E1B6C: + mov r1, #0x1 + strb r1, [sp, #0x1] +_020E1B74: + cmp r0, #0x6c + mov r1, #0x1 + bgt _020E1BAC + cmp r0, #0x68 + blt _020E1BA0 + beq _020E1BC8 + cmp r0, #0x6a + beq _020E1C14 + cmp r0, #0x6c + beq _020E1BE4 + b _020E1C38 +_020E1BA0: + cmp r0, #0x4c + beq _020E1C08 + b _020E1C38 +_020E1BAC: + cmp r0, #0x74 + bgt _020E1BBC + beq _020E1C2C + b _020E1C38 +_020E1BBC: + cmp r0, #0x7a + beq _020E1C20 + b _020E1C38 +_020E1BC8: + mov r2, #0x2 + strb r2, [sp, #0x2] + ldrsb r2, [r12, #0x1] + cmp r2, #0x68 + streqb r1, [sp, #0x2] + ldreqsb r0, [r12, #0x1]! + b _020E1C3C +_020E1BE4: + mov r2, #0x3 + strb r2, [sp, #0x2] + ldrsb r2, [r12, #0x1] + cmp r2, #0x6c + bne _020E1C3C + mov r0, #0x7 + strb r0, [sp, #0x2] + ldrsb r0, [r12, #0x1]! + b _020E1C3C +_020E1C08: + mov r2, #0x9 + strb r2, [sp, #0x2] + b _020E1C3C +_020E1C14: + mov r2, #0x4 + strb r2, [sp, #0x2] + b _020E1C3C +_020E1C20: + mov r2, #0x5 + strb r2, [sp, #0x2] + b _020E1C3C +_020E1C2C: + mov r2, #0x6 + strb r2, [sp, #0x2] + b _020E1C3C +_020E1C38: + mov r1, #0x0 +_020E1C3C: + cmp r1, #0x0 + ldrnesb r0, [r12, #0x1]! + strb r0, [sp, #0x3] + cmp r0, #0x5b + bgt _020E1C90 + bge _020E1DE0 + cmp r0, #0x47 + bgt _020E1C84 + subs r1, r0, #0x41 + addpl pc, pc, r1, lsl #0x2 + b _020E1EF0 +_020E1C68: ; 0x020E1C68 + b _020E1D1C +_020E1C6C: ; 0x020E1C6C + b _020E1EF0 +_020E1C70: ; 0x020E1C70 + b _020E1EF0 +_020E1C74: ; 0x020E1C74 + b _020E1EF0 +_020E1C78: ; 0x020E1C78 + b _020E1D1C +_020E1C7C: ; 0x020E1C7C + b _020E1D1C +_020E1C80: ; 0x020E1C80 + b _020E1D1C +_020E1C84: + cmp r0, #0x58 + beq _020E1D08 + b _020E1EF0 +_020E1C90: + cmp r0, #0x61 + bgt _020E1CA0 + beq _020E1D1C + b _020E1EF0 +_020E1CA0: + sub r0, r0, #0x63 + cmp r0, #0x15 + addls pc, pc, r0, lsl #0x2 + b _020E1EF0 +_020E1CB0: + b _020E1D6C +_020E1CB4: + b _020E1D08 +_020E1CB8: + b _020E1D1C +_020E1CBC: + b _020E1D1C +_020E1CC0: + b _020E1D1C +_020E1CC4: + b _020E1EF0 +_020E1CC8: + b _020E1D08 +_020E1CCC: + b _020E1EF0 +_020E1CD0: + b _020E1EF0 +_020E1CD4: + b _020E1EF0 +_020E1CD8: + b _020E1EF0 +_020E1CDC: + b _020E1EF8 +_020E1CE0: + b _020E1D08 +_020E1CE4: + b _020E1D58 +_020E1CE8: + b _020E1EF0 +_020E1CEC: + b _020E1EF0 +_020E1CF0: + b _020E1D90 +_020E1CF4: + b _020E1EF0 +_020E1CF8: + b _020E1D08 +_020E1CFC: + b _020E1EF0 +_020E1D00: + b _020E1EF0 +_020E1D04: + b _020E1D08 +_020E1D08: + ldrb r0, [sp, #0x2] + cmp r0, #0x9 + moveq r0, #0xff + streqb r0, [sp, #0x3] + b _020E1EF8 +_020E1D1C: + ldrb r1, [sp, #0x2] + cmp r1, #0x1 + cmpne r1, #0x2 + beq _020E1D3C + add r0, r1, #0xfc + and r0, r0, #0xff + cmp r0, #0x3 + bhi _020E1D48 +_020E1D3C: + mov r0, #0xff + strb r0, [sp, #0x3] + b _020E1EF8 +_020E1D48: + cmp r1, #0x3 + moveq r0, #0x8 + streqb r0, [sp, #0x2] + b _020E1EF8 +_020E1D58: + mov r1, #0x3 + mov r0, #0x78 + strb r1, [sp, #0x2] + strb r0, [sp, #0x3] + b _020E1EF8 +_020E1D6C: + ldrb r0, [sp, #0x2] + cmp r0, #0x3 + moveq r0, #0xa + streqb r0, [sp, #0x2] + beq _020E1EF8 + cmp r0, #0x0 + movne r0, #0xff + strneb r0, [sp, #0x3] + b _020E1EF8 +_020E1D90: + ldrb r0, [sp, #0x2] + cmp r0, #0x3 + moveq r0, #0xa + streqb r0, [sp, #0x2] + beq _020E1DB0 + cmp r0, #0x0 + movne r0, #0xff + strneb r0, [sp, #0x3] +_020E1DB0: + add r2, sp, #0x8 + mov r1, #0x20 + mov r0, #0xff +_020E1DBC: + sub r1, r1, #0x1 + cmp r1, #0x0 + strb r0, [r2], #0x1 + bgt _020E1DBC + mov r1, #0xc1 + mov r0, #0xfe + strb r1, [sp, #0x9] + strb r0, [sp, #0xc] + b _020E1EF8 +_020E1DE0: + ldrb r0, [sp, #0x2] + cmp r0, #0x3 + moveq r0, #0xa + streqb r0, [sp, #0x2] + beq _020E1E00 + cmp r0, #0x0 + movne r0, #0xff + strneb r0, [sp, #0x3] +_020E1E00: + ldrsb r2, [r12, #0x1]! + mov r1, #0x0 + cmp r2, #0x5e + ldreqsb r2, [r12, #0x1]! + moveq r1, #0x1 + cmp r2, #0x5d + bne _020E1EA8 + ldrb r0, [sp, #0x13] + orr r0, r0, #0x20 + strb r0, [sp, #0x13] + ldrsb r2, [r12, #0x1]! + b _020E1EA8 +_020E1E30: + add r0, sp, #0x0 + and r3, r2, #0xff + add r6, r0, r3, asr #0x3 + ldrb r5, [r6, #0x8] + and r3, r2, #0x7 + mov r4, #0x1 + orr r3, r5, r4, lsl r3 + strb r3, [r6, #0x8] + ldrsb r3, [r12, #0x1] + cmp r3, #0x2d + bne _020E1EA4 + ldrsb r7, [r12, #0x2] + cmp r7, #0x0 + cmpne r7, #0x5d + beq _020E1EA4 + add r2, r2, #0x1 + cmp r2, r7 + bgt _020E1E9C +_020E1E78: + and r3, r2, #0xff + add r6, r0, r3, asr #0x3 + ldrb r5, [r6, #0x8] + and r3, r2, #0x7 + add r2, r2, #0x1 + orr r3, r5, r4, lsl r3 + strb r3, [r6, #0x8] + cmp r2, r7 + ble _020E1E78 +_020E1E9C: + ldrsb r2, [r12, #0x3]! + b _020E1EA8 +_020E1EA4: + ldrsb r2, [r12, #0x1]! +_020E1EA8: + cmp r2, #0x0 + cmpne r2, #0x5d + bne _020E1E30 + cmp r2, #0x0 + moveq r0, #0xff + streqb r0, [sp, #0x3] + beq _020E1EF8 + cmp r1, #0x0 + beq _020E1EF8 + add r2, sp, #0x8 + mov r1, #0x20 +_020E1ED4: + ldrb r0, [r2, #0x0] + sub r1, r1, #0x1 + cmp r1, #0x0 + mvn r0, r0 + strb r0, [r2], #0x1 + bgt _020E1ED4 + b _020E1EF8 +_020E1EF0: + mov r0, #0xff + strb r0, [sp, #0x3] +_020E1EF8: + add r4, sp, #0x0 + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4!, {r0-r3} + stmia lr!, {r0-r3} + ldmia r4, {r0-r1} + stmia lr, {r0-r1} + add r0, r12, #0x1 + add sp, sp, #0x28 + ldmia sp!, {r3-r7,pc} + .balign 4 +_020E1F20: .word 0x0210440C +_020E1F24: .word 0x0210430C + + arm_func_start __sformatter +__sformatter: ; 0x020E1F28 + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x88 + ldrsb r5, [r2, #0x0] + str r2, [sp, #0xc] + mov r2, #0x0 + mov r9, r0 + mov r0, r2 + str r2, [sp, #0x20] + mov r8, r1 + str r3, [sp, #0x10] + str r0, [sp, #0x24] + cmp r5, #0x0 + ldr r10, [sp, #0xb0] + str r0, [sp, #0x30] + mov r4, r2 + str r0, [sp, #0x44] + str r0, [sp, #0x40] + beq _020E2C3C +_020E1F70: + cmp r5, #0x0 + mov r0, #0x1 + blt _020E1F84 + cmp r5, #0x80 + movlt r0, #0x0 +_020E1F84: + cmp r0, #0x0 + movne r0, #0x0 + bne _020E1FA0 + mov r1, r5, lsl #0x1 + ldr r0, _020E2C74 ; =0x0210430C + ldrh r0, [r0, r1] + and r0, r0, #0x100 +_020E1FA0: + cmp r0, #0x0 + beq _020E2060 + mov r2, #0x0 + ldr r1, _020E2C74 ; =0x0210430C + mov r12, r2 + mov r3, #0x1 +_020E1FB8: + ldr r0, [sp, #0xc] + ldrsb r5, [r0, #0x1]! + str r0, [sp, #0xc] + mov r0, r3 + cmp r5, #0x0 + blt _020E1FD8 + cmp r5, #0x80 + movlt r0, r2 +_020E1FD8: + cmp r0, #0x0 + movne r0, r12 + moveq r0, r5, lsl #0x1 + ldreqh r0, [r1, r0] + andeq r0, r0, #0x100 + cmp r0, #0x0 + bne _020E1FB8 + ldr r0, [sp, #0x30] + cmp r0, #0x0 + bne _020E2C2C + ldr r5, _020E2C74 ; =0x0210430C + b _020E200C +_020E2008: + add r4, r4, #0x1 +_020E200C: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + strb r0, [sp, #0x50] + ldrsb r1, [sp, #0x50] + cmp r1, #0x0 + blt _020E2034 + cmp r1, #0x80 + blt _020E203C +_020E2034: + mov r0, #0x0 + b _020E2048 +_020E203C: + mov r0, r1, lsl #0x1 + ldrh r0, [r5, r0] + and r0, r0, #0x100 +_020E2048: + cmp r0, #0x0 + bne _020E2008 + mov r0, r8 + mov r2, #0x1 + blx r9 + b _020E2C2C +_020E2060: + cmp r5, #0x25 + beq _020E20D8 + ldr r0, [sp, #0x30] + cmp r0, #0x0 + bne _020E20D8 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + strb r0, [sp, #0x50] + and r0, r5, #0xff + ldrsb r1, [sp, #0x50] + cmp r0, r1 + beq _020E20C4 + mov r0, r8 + mov r2, #0x1 + blx r9 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] + ldr r0, [sp, #0xc] + add r0, r0, #0x1 + str r0, [sp, #0xc] + b _020E2C2C +_020E20C4: + ldr r0, [sp, #0xc] + add r4, r4, #0x1 + add r0, r0, #0x1 + str r0, [sp, #0xc] + b _020E2C2C +_020E20D8: + ldr r0, [sp, #0xc] + add r1, sp, #0x60 + bl parse_format_scanf + str r0, [sp, #0xc] + ldrb r0, [sp, #0x60] + cmp r0, #0x0 + bne _020E2114 + ldrb r0, [sp, #0x63] + cmp r0, #0x25 + beq _020E2114 + ldr r0, [sp, #0x10] + add r0, r0, #0x4 + str r0, [sp, #0x10] + ldr r5, [r0, #-0x4] + b _020E2118 +_020E2114: + mov r5, #0x0 +_020E2118: + ldrb r0, [sp, #0x63] + cmp r0, #0x6e + beq _020E2158 + ldr r0, [sp, #0x30] + cmp r0, #0x0 + bne _020E2158 + mov r0, r8 + mov r1, #0x0 + mov r2, #0x2 + blx r9 + cmp r0, #0x0 + beq _020E2158 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] +_020E2158: + ldrb r1, [sp, #0x63] + cmp r1, #0x5b + bgt _020E21B0 + bge _020E2984 + cmp r1, #0x47 + bgt _020E21A4 + subs r0, r1, #0x41 + addpl pc, pc, r0, lsl #0x2 + b _020E2198 +_020E217C: ; 0x020E217C + b _020E2600 +_020E2180: ; 0x020E2180 + b _020E2C3C +_020E2184: ; 0x020E2184 + b _020E2C3C +_020E2188: ; 0x020E2188 + b _020E2C3C +_020E218C: ; 0x020E218C + b _020E2600 +_020E2190: ; 0x020E2190 + b _020E2600 +_020E2194: ; 0x020E2194 + b _020E2600 +_020E2198: + cmp r1, #0x25 + beq _020E287C + b _020E2C3C +_020E21A4: + cmp r1, #0x58 + beq _020E243C + b _020E2C3C +_020E21B0: + cmp r1, #0x78 + bgt _020E2228 + subs r0, r1, #0x63 + addpl pc, pc, r0, lsl #0x2 + b _020E221C +_020E21C4: ; 0x020E21C4 + b _020E26C4 +_020E21C8: ; 0x020E21C8 + b _020E2230 +_020E21CC: ; 0x020E21CC + b _020E2600 +_020E21D0: ; 0x020E21D0 + b _020E2600 +_020E21D4: ; 0x020E21D4 + b _020E2600 +_020E21D8: ; 0x020E21D8 + b _020E2C3C +_020E21DC: ; 0x020E21DC + b _020E2238 +_020E21E0: ; 0x020E21E0 + b _020E2C3C +_020E21E4: ; 0x020E21E4 + b _020E2C3C +_020E21E8: ; 0x020E21E8 + b _020E2C3C +_020E21EC: ; 0x020E21EC + b _020E2C3C +_020E21F0: ; 0x020E21F0 + b _020E2BC8 +_020E21F4: ; 0x020E21F4 + b _020E242C +_020E21F8: ; 0x020E21F8 + b _020E2C3C +_020E21FC: ; 0x020E21FC + b _020E2C3C +_020E2200: ; 0x020E2200 + b _020E2C3C +_020E2204: ; 0x020E2204 + b _020E2908 +_020E2208: ; 0x020E2208 + b _020E2C3C +_020E220C: ; 0x020E220C + b _020E2434 +_020E2210: ; 0x020E2210 + b _020E2C3C +_020E2214: ; 0x020E2214 + b _020E2C3C +_020E2218: ; 0x020E2218 + b _020E243C +_020E221C: + cmp r1, #0x61 + beq _020E2600 + b _020E2C3C +_020E2228: + cmp r1, #0xff + b _020E2C3C +_020E2230: + mov r0, #0xa + b _020E223C +_020E2238: + mov r0, #0x0 +_020E223C: + ldr r1, [sp, #0x30] + cmp r1, #0x0 + beq _020E225C + mov r0, #0x0 + str r0, [sp, #0x1c] + str r0, [sp, #0x20] + str r0, [sp, #0x24] + b _020E2364 +_020E225C: + ldrb r1, [sp, #0x62] + add r2, sp, #0x5c + cmp r1, #0x7 + cmpne r1, #0x4 + add r1, sp, #0x58 + bne _020E22A0 + str r2, [sp, #0x0] + str r1, [sp, #0x4] + add r1, sp, #0x54 + str r1, [sp, #0x8] + ldr r1, [sp, #0x64] + mov r2, r9 + mov r3, r8 + bl __strtoull + str r0, [sp, #0x34] + str r1, [sp, #0x18] + b _020E22C4 +_020E22A0: + str r2, [sp, #0x0] + str r1, [sp, #0x4] + add r1, sp, #0x54 + str r1, [sp, #0x8] + ldr r1, [sp, #0x64] + mov r2, r9 + mov r3, r8 + bl __strtoul + str r0, [sp, #0x3c] +_020E22C4: + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + bne _020E22F4 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] + mov r0, #0x0 + str r0, [sp, #0x1c] + str r0, [sp, #0x20] + str r0, [sp, #0x24] + b _020E2364 +_020E22F4: + add r4, r4, r0 + ldrb r0, [sp, #0x62] + cmp r0, #0x7 + cmpne r0, #0x4 + bne _020E2344 + ldr r0, [sp, #0x58] + cmp r0, #0x0 + beq _020E2330 + ldr r0, [sp, #0x34] + rsbs r0, r0, #0x0 + str r0, [sp, #0x20] + ldr r0, [sp, #0x18] + rsc r0, r0, #0x0 + str r0, [sp, #0x24] + b _020E2364 +_020E2330: + ldr r0, [sp, #0x34] + str r0, [sp, #0x20] + ldr r0, [sp, #0x18] + str r0, [sp, #0x24] + b _020E2364 +_020E2344: + ldr r0, [sp, #0x58] + cmp r0, #0x0 + ldreq r0, [sp, #0x3c] + streq r0, [sp, #0x1c] + beq _020E2364 + ldr r0, [sp, #0x3c] + rsb r0, r0, #0x0 + str r0, [sp, #0x1c] +_020E2364: + cmp r5, #0x0 + beq _020E241C + ldrb r0, [sp, #0x62] + cmp r0, #0x7 + addls pc, pc, r0, lsl #0x2 + b _020E2408 +_020E237C: + b _020E239C +_020E2380: + b _020E23A8 +_020E2384: + b _020E23B4 +_020E2388: + b _020E23C0 +_020E238C: + b _020E23CC +_020E2390: + b _020E23E0 +_020E2394: + b _020E23EC +_020E2398: + b _020E23F8 +_020E239C: + ldr r0, [sp, #0x1c] + str r0, [r5, #0x0] + b _020E2408 +_020E23A8: + ldr r0, [sp, #0x1c] + strb r0, [r5, #0x0] + b _020E2408 +_020E23B4: + ldr r0, [sp, #0x1c] + strh r0, [r5, #0x0] + b _020E2408 +_020E23C0: + ldr r0, [sp, #0x1c] + str r0, [r5, #0x0] + b _020E2408 +_020E23CC: + ldr r0, [sp, #0x20] + str r0, [r5, #0x0] + ldr r0, [sp, #0x24] + str r0, [r5, #0x4] + b _020E2408 +_020E23E0: + ldr r0, [sp, #0x1c] + str r0, [r5, #0x0] + b _020E2408 +_020E23EC: + ldr r0, [sp, #0x1c] + str r0, [r5, #0x0] + b _020E2408 +_020E23F8: + ldr r0, [sp, #0x20] + str r0, [r5, #0x0] + ldr r0, [sp, #0x24] + str r0, [r5, #0x4] +_020E2408: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + ldreq r0, [sp, #0x44] + addeq r0, r0, #0x1 + streq r0, [sp, #0x44] +_020E241C: + ldr r0, [sp, #0x40] + add r0, r0, #0x1 + str r0, [sp, #0x40] + b _020E2C2C +_020E242C: + mov r0, #0x8 + b _020E2440 +_020E2434: + mov r0, #0xa + b _020E2440 +_020E243C: + mov r0, #0x10 +_020E2440: + ldr r1, [sp, #0x30] + cmp r1, #0x0 + beq _020E2460 + mov r0, #0x0 + str r0, [sp, #0x3c] + str r0, [sp, #0x34] + str r0, [sp, #0x18] + b _020E2538 +_020E2460: + ldrb r1, [sp, #0x62] + add r2, sp, #0x5c + cmp r1, #0x7 + cmpne r1, #0x4 + add r1, sp, #0x58 + bne _020E24A4 + str r2, [sp, #0x0] + str r1, [sp, #0x4] + add r1, sp, #0x54 + str r1, [sp, #0x8] + ldr r1, [sp, #0x64] + mov r2, r9 + mov r3, r8 + bl __strtoull + str r0, [sp, #0x34] + str r1, [sp, #0x18] + b _020E24C8 +_020E24A4: + str r2, [sp, #0x0] + str r1, [sp, #0x4] + add r1, sp, #0x54 + str r1, [sp, #0x8] + ldr r1, [sp, #0x64] + mov r2, r9 + mov r3, r8 + bl __strtoul + str r0, [sp, #0x3c] +_020E24C8: + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + bne _020E24F8 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] + mov r0, #0x0 + str r0, [sp, #0x3c] + str r0, [sp, #0x34] + str r0, [sp, #0x18] + b _020E2538 +_020E24F8: + add r4, r4, r0 + ldr r0, [sp, #0x58] + cmp r0, #0x0 + beq _020E2538 + ldrb r0, [sp, #0x62] + cmp r0, #0x7 + ldrne r0, [sp, #0x3c] + rsbne r0, r0, #0x0 + strne r0, [sp, #0x3c] + bne _020E2538 + ldr r0, [sp, #0x34] + rsbs r0, r0, #0x0 + str r0, [sp, #0x34] + ldr r0, [sp, #0x18] + rsc r0, r0, #0x0 + str r0, [sp, #0x18] +_020E2538: + cmp r5, #0x0 + beq _020E25F0 + ldrb r0, [sp, #0x62] + cmp r0, #0x7 + addls pc, pc, r0, lsl #0x2 + b _020E25DC +_020E2550: + b _020E2570 +_020E2554: + b _020E257C +_020E2558: + b _020E2588 +_020E255C: + b _020E2594 +_020E2560: + b _020E25A0 +_020E2564: + b _020E25B4 +_020E2568: + b _020E25C0 +_020E256C: + b _020E25CC +_020E2570: + ldr r0, [sp, #0x3c] + str r0, [r5, #0x0] + b _020E25DC +_020E257C: + ldr r0, [sp, #0x3c] + strb r0, [r5, #0x0] + b _020E25DC +_020E2588: + ldr r0, [sp, #0x3c] + strh r0, [r5, #0x0] + b _020E25DC +_020E2594: + ldr r0, [sp, #0x3c] + str r0, [r5, #0x0] + b _020E25DC +_020E25A0: + ldr r0, [sp, #0x34] + str r0, [r5, #0x0] + ldr r0, [sp, #0x18] + str r0, [r5, #0x4] + b _020E25DC +_020E25B4: + ldr r0, [sp, #0x3c] + str r0, [r5, #0x0] + b _020E25DC +_020E25C0: + ldr r0, [sp, #0x3c] + str r0, [r5, #0x0] + b _020E25DC +_020E25CC: + ldr r0, [sp, #0x34] + str r0, [r5, #0x0] + ldr r0, [sp, #0x18] + str r0, [r5, #0x4] +_020E25DC: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + ldreq r0, [sp, #0x44] + addeq r0, r0, #0x1 + streq r0, [sp, #0x44] +_020E25F0: + ldr r0, [sp, #0x40] + add r0, r0, #0x1 + str r0, [sp, #0x40] + b _020E2C2C +_020E2600: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + beq _020E261C + ldr r0, _020E2C78 ; =0x02106B78 + ldr r0, [r0, #0x0] + bl _f2d + b _020E2668 +_020E261C: + add r0, sp, #0x54 + str r0, [sp, #0x0] + ldr r0, [sp, #0x64] + mov r1, r9 + mov r2, r8 + add r3, sp, #0x5c + bl __strtold + ldr r2, [sp, #0x5c] + cmp r2, #0x0 + bne _020E2664 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] + ldr r0, _020E2C78 ; =0x02106B78 + ldr r0, [r0, #0x0] + bl _f2d +_020E2660: ; 0x020E2660 + b _020E2668 +_020E2664: + add r4, r4, r2 +_020E2668: + cmp r5, #0x0 + beq _020E26B4 + ldrb r2, [sp, #0x62] + cmp r2, #0x0 + beq _020E2690 + cmp r2, #0x8 + beq _020E269C + cmp r2, #0x9 + stmeqia r5, {r0-r1} + b _020E26A0 +_020E2690: + bl _d2f +_020E2694: ; 0x020E2694 + str r0, [r5, #0x0] + b _020E26A0 +_020E269C: + stmia r5, {r0-r1} +_020E26A0: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + ldreq r0, [sp, #0x44] + addeq r0, r0, #0x1 + streq r0, [sp, #0x44] +_020E26B4: + ldr r0, [sp, #0x40] + add r0, r0, #0x1 + str r0, [sp, #0x40] + b _020E2C2C +_020E26C4: + ldrb r0, [sp, #0x61] + cmp r0, #0x0 + moveq r0, #0x1 + streq r0, [sp, #0x64] + cmp r5, #0x0 + beq _020E280C + cmp r10, #0x0 + beq _020E26F8 + ldr r0, [sp, #0x10] + mov r7, #0x1 + add r0, r0, #0x4 + ldr r11, [r0, #-0x4] + str r0, [sp, #0x10] +_020E26F8: + ldr r0, [sp, #0x30] + mov r1, #0x0 + cmp r0, #0x0 + str r1, [sp, #0x5c] + beq _020E2718 + cmp r11, #0x0 + strneb r1, [r5, #0x0] + b _020E2C2C +_020E2718: + mvn r0, #0x0 + str r5, [sp, #0x2c] + str r0, [sp, #0x48] + b _020E2760 +_020E2728: + ldrb r0, [sp, #0x62] + strb r6, [sp, #0x50] + cmp r0, #0xa + ldrnesb r0, [sp, #0x50] + strneb r0, [r5], #0x1 + bne _020E2754 + mov r0, r5 + add r1, sp, #0x50 + mov r2, #0x1 + bl mbtowc + add r5, r5, #0x1 +_020E2754: + ldr r0, [sp, #0x5c] + add r1, r0, #0x1 + str r1, [sp, #0x5c] +_020E2760: + ldr r0, [sp, #0x64] + cmp r0, #0x0 + sub r0, r0, #0x1 + str r0, [sp, #0x64] + beq _020E27B0 + cmp r10, #0x0 + beq _020E2790 + cmp r11, r1 + movhi r7, #0x1 + movls r7, #0x0 + cmp r7, #0x0 + beq _020E27B0 +_020E2790: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r6, r0 + ldr r0, [sp, #0x48] + cmp r6, r0 + bne _020E2728 +_020E27B0: + strb r6, [sp, #0x50] + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + beq _020E27D0 + cmp r10, #0x0 + beq _020E27F8 + cmp r7, #0x0 + bne _020E27F8 +_020E27D0: + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + cmp r11, #0x0 + str r0, [sp, #0x30] + beq _020E2C2C + ldr r0, [sp, #0x2c] + mov r1, #0x0 + strb r1, [r0, #0x0] + b _020E2C2C +_020E27F8: + add r4, r4, r0 + ldr r0, [sp, #0x44] + add r0, r0, #0x1 + str r0, [sp, #0x44] + b _020E286C +_020E280C: + mov r0, #0x0 + str r0, [sp, #0x5c] + mvn r5, #0x0 + b _020E282C +_020E281C: + strb r6, [sp, #0x50] + ldr r0, [sp, #0x5c] + add r0, r0, #0x1 + str r0, [sp, #0x5c] +_020E282C: + ldr r0, [sp, #0x64] + cmp r0, #0x0 + sub r0, r0, #0x1 + str r0, [sp, #0x64] + beq _020E285C + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r6, r0 + cmp r6, r5 + bne _020E281C +_020E285C: + strb r6, [sp, #0x50] + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + beq _020E2C3C +_020E286C: + ldr r0, [sp, #0x40] + add r0, r0, #0x1 + str r0, [sp, #0x40] + b _020E2C2C +_020E287C: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + bne _020E2C2C + ldr r5, _020E2C74 ; =0x0210430C + b _020E2894 +_020E2890: + add r4, r4, #0x1 +_020E2894: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + strb r0, [sp, #0x50] + ldrsb r1, [sp, #0x50] + cmp r1, #0x0 + blt _020E28BC + cmp r1, #0x80 + blt _020E28C4 +_020E28BC: + mov r0, #0x0 + b _020E28D0 +_020E28C4: + mov r0, r1, lsl #0x1 + ldrh r0, [r5, r0] + and r0, r0, #0x100 +_020E28D0: + cmp r0, #0x0 + bne _020E2890 + cmp r1, #0x25 + beq _020E2900 + mov r0, r8 + mov r2, #0x1 + blx r9 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + str r0, [sp, #0x30] + b _020E2C2C +_020E2900: + add r4, r4, #0x1 + b _020E2C2C +_020E2908: + ldr r0, [sp, #0x30] + cmp r0, #0x0 + bne _020E2984 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + strb r0, [sp, #0x50] + b _020E2944 +_020E292C: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + strb r0, [sp, #0x50] +_020E2944: + ldrsb r1, [sp, #0x50] + cmp r1, #0x0 + blt _020E2958 + cmp r1, #0x80 + blt _020E2960 +_020E2958: + mov r0, #0x0 + b _020E2970 +_020E2960: + ldr r0, _020E2C74 ; =0x0210430C + mov r2, r1, lsl #0x1 + ldrh r0, [r0, r2] + and r0, r0, #0x100 +_020E2970: + cmp r0, #0x0 + bne _020E292C + mov r0, r8 + mov r2, #0x1 + blx r9 +_020E2984: + cmp r5, #0x0 + beq _020E2B00 + cmp r10, #0x0 + beq _020E29AC + ldr r0, [sp, #0x10] + mov r7, #0x1 + add r0, r0, #0x4 + str r0, [sp, #0x10] + ldr r0, [r0, #-0x4] + sub r11, r0, #0x1 +_020E29AC: + ldr r0, [sp, #0x30] + mov r1, #0x0 + cmp r0, #0x0 + str r1, [sp, #0x5c] + beq _020E29CC + cmp r11, #0x0 + strneb r1, [r5, #0x0] + b _020E2C2C +_020E29CC: + mvn r0, #0x0 + str r5, [sp, #0x28] + str r0, [sp, #0x4c] + b _020E2A30 +_020E29DC: + strb r6, [sp, #0x50] + ldrsb r1, [sp, #0x50] + add r2, sp, #0x60 + and r3, r1, #0xff + add r2, r2, r3, asr #0x3 + ldrb r3, [r2, #0x8] + and r0, r1, #0x7 + mov r2, #0x1 + tst r3, r2, lsl r0 + beq _020E2A80 + ldrb r0, [sp, #0x62] + cmp r0, #0xa + strneb r1, [r5], #0x1 + bne _020E2A24 + mov r0, r5 + add r1, sp, #0x50 + bl mbtowc + add r5, r5, #0x2 +_020E2A24: + ldr r0, [sp, #0x5c] + add r1, r0, #0x1 + str r1, [sp, #0x5c] +_020E2A30: + ldr r0, [sp, #0x64] + cmp r0, #0x0 + sub r0, r0, #0x1 + str r0, [sp, #0x64] + beq _020E2A80 + cmp r10, #0x0 + beq _020E2A60 + cmp r11, r1 + movcs r7, #0x1 + movcc r7, #0x0 + cmp r7, #0x0 + beq _020E2A80 +_020E2A60: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r6, r0 + ldr r0, [sp, #0x4c] + cmp r6, r0 + bne _020E29DC +_020E2A80: + strb r6, [sp, #0x50] + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + beq _020E2AA0 + cmp r10, #0x0 + beq _020E2AD8 + cmp r7, #0x0 + bne _020E2AD8 +_020E2AA0: + mov r0, r8 + ldrsb r1, [sp, #0x50] + mov r2, #0x1 + blx r9 + cmp r10, #0x0 + beq _020E2C3C + mov r0, #0x1 + cmp r11, #0x0 + str r0, [sp, #0x30] + beq _020E2C2C + ldr r0, [sp, #0x28] + mov r1, #0x0 + strb r1, [r0, #0x0] + b _020E2C2C +_020E2AD8: + add r4, r4, r0 + ldrb r0, [sp, #0x62] + cmp r0, #0xa + mov r0, #0x0 + streqh r0, [r5, #0x0] + strneb r0, [r5, #0x0] + ldr r0, [sp, #0x44] + add r0, r0, #0x1 + str r0, [sp, #0x44] + b _020E2B9C +_020E2B00: + mov r0, #0x0 + str r0, [sp, #0x5c] + mvn r5, #0x0 + b _020E2B44 +_020E2B10: + strb r6, [sp, #0x50] + ldrsb r1, [sp, #0x50] + and r0, r1, #0x7 + and r2, r1, #0xff + add r1, sp, #0x60 + add r1, r1, r2, asr #0x3 + ldrb r2, [r1, #0x8] + mov r1, #0x1 + tst r2, r1, lsl r0 + beq _020E2B74 + ldr r0, [sp, #0x5c] + add r0, r0, #0x1 + str r0, [sp, #0x5c] +_020E2B44: + ldr r0, [sp, #0x64] + cmp r0, #0x0 + sub r0, r0, #0x1 + str r0, [sp, #0x64] + beq _020E2B74 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r6, r0 + cmp r6, r5 + bne _020E2B10 +_020E2B74: + strb r6, [sp, #0x50] + ldr r0, [sp, #0x5c] + cmp r0, #0x0 + bne _020E2B98 + mov r0, r8 + ldrsb r1, [sp, #0x50] + mov r2, #0x1 + blx r9 + b _020E2C2C +_020E2B98: + add r4, r4, r0 +_020E2B9C: + ldr r0, [sp, #0x64] + cmp r0, #0x0 + blt _020E2BB8 + mov r0, r8 + ldrsb r1, [sp, #0x50] + mov r2, #0x1 + blx r9 +_020E2BB8: + ldr r0, [sp, #0x40] + add r0, r0, #0x1 + str r0, [sp, #0x40] + b _020E2C2C +_020E2BC8: + cmp r5, #0x0 + beq _020E2C2C + ldrb r0, [sp, #0x62] + cmp r0, #0x7 + addls pc, pc, r0, lsl #0x2 + b _020E2C2C +_020E2BE0: + b _020E2C00 +_020E2BE4: + b _020E2C18 +_020E2BE8: + b _020E2C08 +_020E2BEC: + b _020E2C10 +_020E2BF0: + b _020E2C2C +_020E2BF4: + b _020E2C2C +_020E2BF8: + b _020E2C2C +_020E2BFC: + b _020E2C20 +_020E2C00: + str r4, [r5, #0x0] + b _020E2C2C +_020E2C08: + strh r4, [r5, #0x0] + b _020E2C2C +_020E2C10: + str r4, [r5, #0x0] + b _020E2C2C +_020E2C18: + strb r4, [r5, #0x0] + b _020E2C2C +_020E2C20: + str r4, [r5, #0x0] + mov r0, r4, asr #0x1f + str r0, [r5, #0x4] +_020E2C2C: + ldr r0, [sp, #0xc] + ldrsb r5, [r0, #0x0] + cmp r5, #0x0 + bne _020E1F70 +_020E2C3C: + mov r0, r8 + mov r1, #0x0 + mov r2, #0x2 + blx r9 + cmp r0, #0x0 + beq _020E2C68 + ldr r0, [sp, #0x40] + cmp r0, #0x0 + addeq sp, sp, #0x88 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,pc} +_020E2C68: + ldr r0, [sp, #0x44] + add sp, sp, #0x88 + ldmia sp!, {r3-r11,pc} + .balign 4 +_020E2C74: .word 0x0210430C +_020E2C78: .word 0x02106B78 + + arm_func_start __StringRead +__StringRead: ; 0x020E2C7C + cmp r2, #0x0 + beq _020E2C98 + cmp r2, #0x1 + beq _020E2CC8 + cmp r2, #0x2 + beq _020E2CF0 + b _020E2CF8 +_020E2C98: + ldr r1, [r0, #0x0] + ldrsb r2, [r1, #0x0] + cmp r2, #0x0 + bne _020E2CB8 + mov r1, #0x1 + str r1, [r0, #0x4] + sub r0, r1, #0x2 + bx lr +_020E2CB8: + add r1, r1, #0x1 + str r1, [r0, #0x0] + and r0, r2, #0xff + bx lr +_020E2CC8: + ldr r2, [r0, #0x4] + cmp r2, #0x0 + movne r2, #0x0 + strne r2, [r0, #0x4] + bne _020E2CE8 + ldr r2, [r0, #0x0] + sub r2, r2, #0x1 + str r2, [r0, #0x0] +_020E2CE8: + mov r0, r1 + bx lr +_020E2CF0: + ldr r0, [r0, #0x4] + bx lr +_020E2CF8: + mov r0, #0x0 + bx lr + + arm_func_start vsscanf +vsscanf: ; 0x020E2D00 + stmdb sp!, {lr} + sub sp, sp, #0xc + str r0, [sp, #0x4] + cmp r0, #0x0 + ldrnesb r0, [r0, #0x0] + mov lr, r1 + mov r3, r2 + cmpne r0, #0x0 + addeq sp, sp, #0xc + mvneq r0, #0x0 + ldmeqia sp!, {pc} + mov r12, #0x0 + str r12, [sp, #0x8] + ldr r0, _020E2D50 ; =__StringRead + add r1, sp, #0x4 + mov r2, lr + str r12, [sp, #0x0] + bl __sformatter + add sp, sp, #0xc + ldmia sp!, {pc} + .balign 4 +_020E2D50: .word __StringRead + + arm_func_start sscanf +sscanf: ; 0x020E2D54 + stmdb sp!, {r0-r3} + stmdb sp!, {r3,lr} + add r2, sp, #0xc + bic r2, r2, #0x3 + ldr r1, [sp, #0xc] + add r2, r2, #0x4 + bl vsscanf + ldmia sp!, {r3,lr} + add sp, sp, #0x10 + bx lr + + arm_func_start raise +raise: ; 0x020E2D7C + stmdb sp!, {r3-r5,lr} + mov r5, r0 + cmp r5, #0x1 + blt _020E2D94 + cmp r5, #0x7 + ble _020E2D9C +_020E2D94: + mvn r0, #0x0 + ldmia sp!, {r3-r5,pc} +_020E2D9C: + ldr r0, _020E2E98 ; =0x021D7178 + bl OS_TryLockMutex +_020E2DA4: ; 0x020E2DA4 + cmp r0, #0x0 + bne _020E2DD0 + ldr r0, _020E2E9C ; =0x021D3498 + ldr r1, _020E2EA0 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020E2EA4 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0x1c] + str r2, [r0, #0x1c] + b _020E2E28 +_020E2DD0: + ldr r0, _020E2E9C ; =0x021D3498 + ldr r1, _020E2EA0 ; =0x021D7088 + ldr r0, [r0, #0x4] + ldr r1, [r1, #0x1c] + ldr r0, [r0, #0x6c] + cmp r1, r0 + bne _020E2E00 + ldr r0, _020E2EA4 ; =0x021D70AC + ldr r1, [r0, #0x1c] + add r1, r1, #0x1 + str r1, [r0, #0x1c] + b _020E2E28 +_020E2E00: + ldr r0, _020E2E98 ; =0x021D7178 + bl OS_LockMutex + ldr r0, _020E2E9C ; =0x021D3498 + ldr r1, _020E2EA0 ; =0x021D7088 + ldr r2, [r0, #0x4] + ldr r0, _020E2EA4 ; =0x021D70AC + ldr r3, [r2, #0x6c] + mov r2, #0x1 + str r3, [r1, #0x1c] + str r2, [r0, #0x1c] +_020E2E28: + ldr r1, _020E2EA8 ; =0x021D74AC + sub r2, r5, #0x1 + ldr r4, [r1, r2, lsl #0x2] + cmp r4, #0x1 + movne r0, #0x0 + strne r0, [r1, r2, lsl #0x2] + ldr r0, _020E2EA4 ; =0x021D70AC + ldr r1, [r0, #0x1c] + subs r1, r1, #0x1 + str r1, [r0, #0x1c] + bne _020E2E5C + ldr r0, _020E2E98 ; =0x021D7178 + bl OS_UnlockMutex +_020E2E5C: + cmp r4, #0x1 + beq _020E2E70 + cmp r4, #0x0 + cmpeq r5, #0x1 + bne _020E2E78 +_020E2E70: + mov r0, #0x0 + ldmia sp!, {r3-r5,pc} +_020E2E78: + cmp r4, #0x0 + bne _020E2E88 + mov r0, #0x0 + bl exit +_020E2E88: + mov r0, r5 + blx r4 + mov r0, #0x0 + ldmia sp!, {r3-r5,pc} + .balign 4 +_020E2E98: .word 0x021D7178 +_020E2E9C: .word 0x021D3498 +_020E2EA0: .word 0x021D7088 +_020E2EA4: .word 0x021D70AC +_020E2EA8: .word 0x021D74AC + + arm_func_start strlen +strlen: ; 0x020E2EAC + mvn r2, #0x0 +_020E2EB0: + ldrsb r1, [r0], #0x1 + add r2, r2, #0x1 + cmp r1, #0x0 + bne _020E2EB0 + mov r0, r2 + bx lr + + arm_func_start strcpy +strcpy: ; 0x020E2EC8 + stmdb sp!, {r3-r5,lr} + and r4, r1, #0x3 + and r3, r0, #0x3 + mov r2, r0 + cmp r3, r4 + bne _020E2F64 + cmp r4, #0x0 + beq _020E2F20 + ldrb r3, [r1, #0x0] + strb r3, [r0, #0x0] + cmp r3, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020E2EF8: ; 0x020E2EF8 + rsbs r4, r4, #0x3 + beq _020E2F18 +_020E2F00: + ldrb r3, [r1, #0x1]! + cmp r3, #0x0 + strb r3, [r2, #0x1]! + ldmeqia sp!, {r3-r5,pc} +_020E2F10: ; 0x020E2F10 + subs r4, r4, #0x1 + bne _020E2F00 +_020E2F18: + add r2, r2, #0x1 + add r1, r1, #0x1 +_020E2F20: + ldr r5, [r1, #0x0] + ldr r3, _020E2F88 ; =0xFEFEFEFF + mvn r4, r5 + add lr, r5, r3 + ldr ip, _020E2F8C ; =0x80808080 + and r4, lr, r4 + tst r4, r12 + bne _020E2F64 + sub r2, r2, #0x4 +_020E2F44: + str r5, [r2, #0x4]! + ldr r5, [r1, #0x4]! + add r4, r5, r3 + mvn lr, r5 + and lr, r4, lr + tst lr, r12 + beq _020E2F44 + add r2, r2, #0x4 +_020E2F64: + ldrb r3, [r1, #0x0] + strb r3, [r2, #0x0] + cmp r3, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020E2F74: + ldrb r3, [r1, #0x1]! + cmp r3, #0x0 + strb r3, [r2, #0x1]! + bne _020E2F74 + ldmia sp!, {r3-r5,pc} + .balign 4 +_020E2F88: .word 0xFEFEFEFF +_020E2F8C: .word 0x80808080 + + arm_func_start strncpy +strncpy: ; 0x020E2F90 + stmdb sp!, {r3,lr} + mov lr, r0 + cmp r2, #0x0 + ldmeqia sp!, {r3,pc} +_020E2FA0: + ldrsb r3, [r1], #0x1 + mov r12, lr + strb r3, [lr], #0x1 + ldrsb r3, [r12, #0x0] + cmp r3, #0x0 + bne _020E2FD4 + subs r2, r2, #0x1 + ldmeqia sp!, {r3,pc} +_020E2FC0: ; 0x020E2FC0 + mov r1, #0x0 +_020E2FC4: + strb r1, [lr], #0x1 + subs r2, r2, #0x1 + bne _020E2FC4 + ldmia sp!, {r3,pc} +_020E2FD4: + subs r2, r2, #0x1 + bne _020E2FA0 + ldmia sp!, {r3,pc} + + arm_func_start strcat +strcat: ; 0x020E2FE0 + mov r3, r0 +_020E2FE4: + ldrsb r2, [r3], #0x1 + cmp r2, #0x0 + bne _020E2FE4 + sub r3, r3, #0x1 +_020E2FF4: + ldrsb r2, [r1], #0x1 + mov r12, r3 + strb r2, [r3], #0x1 + ldrsb r2, [r12, #0x0] + cmp r2, #0x0 + bne _020E2FF4 + bx lr + + arm_func_start strncat +strncat: ; 0x020E3010 + stmdb sp!, {r3,lr} + mov r12, r0 +_020E3018: + ldrsb r3, [r12], #0x1 + cmp r3, #0x0 + bne _020E3018 + cmp r2, #0x0 + sub r12, r12, #0x1 + beq _020E3054 +_020E3030: + ldrsb r3, [r1], #0x1 + mov lr, r12 + strb r3, [r12], #0x1 + ldrsb r3, [lr, #0x0] + cmp r3, #0x0 + subeq r12, r12, #0x1 + beq _020E3054 + subs r2, r2, #0x1 + bne _020E3030 +_020E3054: + mov r1, #0x0 + strb r1, [r12, #0x0] + ldmia sp!, {r3,pc} + + arm_func_start strcmp +strcmp: ; 0x020E3060 + stmdb sp!, {r4,lr} + ldrb r2, [r0, #0x0] + ldrb r3, [r1, #0x0] + subs r3, r2, r3 + movne r0, r3 + ldmneia sp!, {r4,pc} +_020E3078: ; 0x020E3078 + and r4, r0, #0x3 + and r3, r1, #0x3 + cmp r3, r4 + bne _020E313C + cmp r4, #0x0 + beq _020E30D4 + cmp r2, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r4,pc} +_020E309C: ; 0x020E309C + rsbs r4, r4, #0x3 + beq _020E30CC +_020E30A4: + ldrb r3, [r0, #0x1]! + ldrb r2, [r1, #0x1]! + subs r2, r3, r2 + movne r0, r2 + ldmneia sp!, {r4,pc} +_020E30B8: ; 0x020E30B8 + cmp r3, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r4,pc} +_020E30C4: ; 0x020E30C4 + subs r4, r4, #0x1 + bne _020E30A4 +_020E30CC: + add r0, r0, #0x1 + add r1, r1, #0x1 +_020E30D4: + ldr r2, [r0, #0x0] + ldr r3, _020E316C ; =0xFEFEFEFF + mvn r4, r2 + add lr, r2, r3 + ldr ip, _020E3170 ; =0x80808080 + and r4, lr, r4 + tst r4, r12 + ldr r4, [r1, #0x0] + bne _020E3128 + cmp r2, r4 + bne _020E311C +_020E3100: + ldr r2, [r0, #0x4]! + ldr r4, [r1, #0x4]! + add lr, r2, r3 + tst lr, r12 + bne _020E3128 + cmp r2, r4 + beq _020E3100 +_020E311C: + sub r0, r0, #0x1 + sub r1, r1, #0x1 + b _020E313C +_020E3128: + ldrb r2, [r0, #0x0] + ldrb r3, [r1, #0x0] + subs r3, r2, r3 + movne r0, r3 + ldmneia sp!, {r4,pc} +_020E313C: + cmp r2, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r4,pc} +_020E3148: + ldrb r3, [r0, #0x1]! + ldrb r2, [r1, #0x1]! + subs r2, r3, r2 + movne r0, r2 + ldmneia sp!, {r4,pc} +_020E315C: ; 0x020E315C + cmp r3, #0x0 + bne _020E3148 + mov r0, #0x0 + ldmia sp!, {r4,pc} + .balign 4 +_020E316C: .word 0xFEFEFEFF +_020E3170: .word 0x80808080 + + arm_func_start strncmp +strncmp: ; 0x020E3174 + cmp r2, #0x0 + beq _020E31A0 +_020E317C: + ldrb r12, [r1], #0x1 + ldrb r3, [r0], #0x1 + cmp r3, r12 + subne r0, r3, r12 + bxne lr + cmp r3, #0x0 + beq _020E31A0 + subs r2, r2, #0x1 + bne _020E317C +_020E31A0: + mov r0, #0x0 + bx lr + + arm_func_start strchr +strchr: ; 0x020E31A8 + ldrsb r2, [r0], #0x1 + mov r1, r1, lsl #0x18 + mov r1, r1, asr #0x18 + cmp r2, #0x0 + beq _020E31D4 +_020E31BC: + cmp r2, r1 + subeq r0, r0, #0x1 + bxeq lr + ldrsb r2, [r0], #0x1 + cmp r2, #0x0 + bne _020E31BC +_020E31D4: + cmp r1, #0x0 + movne r0, #0x0 + subeq r0, r0, #0x1 + bx lr + + arm_func_start strspn +strspn: ; 0x020E31E4 + stmdb sp!, {r4,lr} + sub sp, sp, #0x20 + add r12, sp, #0x0 + mov r3, #0x8 + mov r2, #0x0 +_020E31F8: + strb r2, [r12, #0x0] + strb r2, [r12, #0x1] + strb r2, [r12, #0x2] + strb r2, [r12, #0x3] + add r12, r12, #0x4 + subs r3, r3, #0x1 + bne _020E31F8 + ldrb r3, [r1, #0x0] + add r4, r1, #0x1 + cmp r3, #0x0 + beq _020E3254 + add lr, sp, #0x0 + mov r2, #0x1 +_020E322C: + and r12, r3, #0xff + and r1, r3, #0x7 + mov r1, r2, lsl r1 + ldrb r3, [lr, r12, asr #0x3] + and r1, r1, #0xff + orr r1, r3, r1 + strb r1, [lr, r12, asr #0x3] + ldrb r3, [r4], #0x1 + cmp r3, #0x0 + bne _020E322C +_020E3254: + ldrb r1, [r0, #0x0] + add r4, r0, #0x1 + cmp r1, #0x0 + beq _020E3294 + add r12, sp, #0x0 + mov r2, #0x1 +_020E326C: + and r3, r1, #0xff + and r1, r1, #0x7 + mov r1, r2, lsl r1 + ldrb r3, [r12, r3, asr #0x3] + and r1, r1, #0xff + tst r3, r1 + bne _020E3294 + ldrb r1, [r4], #0x1 + cmp r1, #0x0 + bne _020E326C +_020E3294: + sub r0, r4, r0 + sub r0, r0, #0x1 + add sp, sp, #0x20 + ldmia sp!, {r4,pc} + + arm_func_start strstr +strstr: ; 0x020E32A4 + stmdb sp!, {r4,lr} + cmp r1, #0x0 + ldrneb r2, [r1, #0x0] + cmpne r2, #0x0 + ldmeqia sp!, {r4,pc} +_020E32B8: ; 0x020E32B8 + ldrb r3, [r0, #0x0] + add r4, r0, #0x1 + cmp r3, #0x0 + beq _020E3308 +_020E32C8: + cmp r3, r2 + bne _020E32FC + mov lr, r4 + add r12, r1, #0x1 +_020E32D8: + ldrb r3, [r12], #0x1 + ldrb r0, [lr], #0x1 + cmp r0, r3 + bne _020E32F0 + cmp r0, #0x0 + bne _020E32D8 +_020E32F0: + cmp r3, #0x0 + subeq r0, r4, #0x1 + ldmeqia sp!, {r4,pc} +_020E32FC: + ldrb r3, [r4], #0x1 + cmp r3, #0x0 + bne _020E32C8 +_020E3308: + mov r0, #0x0 + ldmia sp!, {r4,pc} + + arm_func_start __strtold +__strtold: ; 0x020E3310 + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0xa8 + ldr r4, [sp, #0xd0] + mov r10, #0x0 + str r4, [sp, #0xd0] + str r0, [sp, #0x0] + add r6, sp, #0x80 + mov r9, r1 + mov r8, r2 + str r3, [sp, #0x4] + mov r4, r10 + str r10, [sp, #0x2c] + mov r5, #0x1 + mov r0, #0x4 +_020E3348: + strh r10, [r6, #0x0] + strh r10, [r6, #0x2] + strh r10, [r6, #0x4] + strh r10, [r6, #0x6] + add r6, r6, #0x8 + subs r0, r0, #0x1 + bne _020E3348 + mov r0, #0x0 + str r0, [sp, #0x28] + strh r10, [r6, #0x0] + strh r10, [r6, #0x2] + ldr r2, [sp, #0x28] + ldr r1, [sp, #0xd0] + strh r10, [r6, #0x4] + str r2, [r1, #0x0] + mov r1, r2 + mov r0, r8 + str r1, [sp, #0x24] + str r1, [sp, #0x20] + str r1, [sp, #0x1c] + str r1, [sp, #0x18] + str r1, [sp, #0x10] + str r1, [sp, #0xc] + str r1, [sp, #0x8] + add r4, r4, #0x1 + blx r9 + mov r1, r0 + ldr r7, _020E42F0 ; =0x02104439 + add r0, sp, #0x4d + mov r6, #0x4 +_020E33C0: + ldrb r3, [r7, #0x0] + ldrb r2, [r7, #0x1] + add r7, r7, #0x2 + strb r3, [r0, #0x0] + strb r2, [r0, #0x1] + add r0, r0, #0x2 + subs r6, r6, #0x1 + bne _020E33C0 + ldrb r3, [r7, #0x0] + ldr r2, _020E42F4 ; =0x02104434 + strb r3, [r0, #0x0] + ldrb r3, [r2, #0x1] + ldrb r0, [r2, #0x2] + ldrb r6, [r2, #0x0] + strb r3, [sp, #0x31] + strb r0, [sp, #0x32] + ldrb r3, [r2, #0x3] + ldrb r0, [r2, #0x4] + strb r6, [sp, #0x30] + strb r3, [sp, #0x33] + strb r0, [sp, #0x34] + b _020E4104 +_020E3418: + cmp r5, #0x100 + bgt _020E3490 + bge _020E3B98 + cmp r5, #0x20 + bgt _020E3474 + bge _020E3A6C + cmp r5, #0x8 + bgt _020E3468 + cmp r5, #0x0 + addge pc, pc, r5, lsl #0x2 + b _020E4104 +_020E3444: ; 0x020E3444 + b _020E4104 +_020E3448: ; 0x020E3448 + b _020E34D4 +_020E344C: ; 0x020E344C + b _020E38B8 +_020E3450: ; 0x020E3450 + b _020E4104 +_020E3454: ; 0x020E3454 + b _020E3968 +_020E3458: ; 0x020E3458 + b _020E4104 +_020E345C: ; 0x020E345C + b _020E4104 +_020E3460: ; 0x020E3460 + b _020E4104 +_020E3464: ; 0x020E3464 + b _020E3990 +_020E3468: + cmp r5, #0x10 + beq _020E3A34 + b _020E4104 +_020E3474: + cmp r5, #0x40 + bgt _020E3484 + beq _020E3AF8 + b _020E4104 +_020E3484: + cmp r5, #0x80 + beq _020E3B44 + b _020E4104 +_020E3490: + cmp r5, #0x2000 + bgt _020E34B8 + bge _020E36EC + cmp r5, #0x200 + bgt _020E34AC + beq _020E3BF8 + b _020E4104 +_020E34AC: + cmp r5, #0x400 + beq _020E3C20 + b _020E4104 +_020E34B8: + cmp r5, #0x4000 + bgt _020E34C8 + beq _020E35F4 + b _020E4104 +_020E34C8: + cmp r5, #0x8000 + beq _020E3C98 + b _020E4104 +_020E34D4: + cmp r1, #0x0 + blt _020E34E4 + cmp r1, #0x80 + blt _020E34EC +_020E34E4: + mov r0, #0x0 + b _020E34FC +_020E34EC: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x100 +_020E34FC: + cmp r0, #0x0 + beq _020E3528 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r1, r0 + ldr r0, [sp, #0x2c] + add r0, r0, #0x1 + str r0, [sp, #0x2c] + b _020E4104 +_020E3528: + cmp r1, #0x0 + blt _020E3538 + cmp r1, #0x80 + blt _020E3540 +_020E3538: + mov r0, r1 + b _020E3548 +_020E3540: + ldr r0, _020E42FC ; =0x0210428C + ldrb r0, [r0, r1] +_020E3548: + cmp r0, #0x49 + bgt _020E3574 + bge _020E35AC + cmp r0, #0x2d + bgt _020E35EC + cmp r0, #0x2b + blt _020E35EC + beq _020E3588 + cmp r0, #0x2d + beq _020E3580 + b _020E35EC +_020E3574: + cmp r0, #0x4e + beq _020E35CC + b _020E35EC +_020E3580: + mov r0, #0x1 + str r0, [sp, #0x28] +_020E3588: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + mov r0, #0x1 + str r0, [sp, #0x18] + b _020E4104 +_020E35AC: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + mov r5, #0x4000 + b _020E4104 +_020E35CC: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + mov r5, #0x2000 + b _020E4104 +_020E35EC: + mov r5, #0x2 + b _020E4104 +_020E35F4: + mov r5, #0x1 + add r7, sp, #0x4d + add r0, sp, #0x76 + mov r6, #0x4 +_020E3604: + ldrb r3, [r7, #0x0] + ldrb r2, [r7, #0x1] + add r7, r7, #0x2 + strb r3, [r0, #0x0] + strb r2, [r0, #0x1] + add r0, r0, #0x2 + subs r6, r6, #0x1 + bne _020E3604 + ldrb r2, [r7, #0x0] + add r6, sp, #0x77 + ldr r7, _020E42FC ; =0x0210428C + strb r2, [r0, #0x0] + b _020E3658 +_020E3638: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r6, r6, #0x1 + add r5, r5, #0x1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 +_020E3658: + cmp r5, #0x8 + bge _020E3688 + cmp r1, #0x0 + blt _020E3670 + cmp r1, #0x80 + blt _020E3678 +_020E3670: + mov r2, r1 + b _020E367C +_020E3678: + ldrb r2, [r7, r1] +_020E367C: + ldrsb r0, [r6, #0x0] + cmp r0, r2 + beq _020E3638 +_020E3688: + cmp r5, #0x3 + cmpne r5, #0x8 + bne _020E36E4 + ldr r0, [sp, #0x28] + cmp r0, #0x0 + beq _020E36B8 + ldr r1, _020E4300 ; =0x02106B74 + mov r0, #0x0 + ldr r1, [r1, #0x0] + bl _fsub + bl _f2d + b _020E36C4 +_020E36B8: + ldr r0, _020E4300 ; =0x02106B74 + ldr r0, [r0, #0x0] + bl _f2d +_020E36C4: + ldr r2, [sp, #0x2c] + add r3, r2, r5 + ldr r2, [sp, #0x18] + add r3, r2, r3 + ldr r2, [sp, #0x4] + add sp, sp, #0xa8 + str r3, [r2, #0x0] + ldmia sp!, {r3-r11,pc} +_020E36E4: + mov r5, #0x1000 + b _020E4104 +_020E36EC: + ldrb r3, [sp, #0x30] + ldrb r0, [sp, #0x32] + ldrb r2, [sp, #0x31] + strb r3, [sp, #0x40] + strb r0, [sp, #0x42] + ldrb r3, [sp, #0x33] + ldrb r0, [sp, #0x34] + strb r2, [sp, #0x41] + mov r5, #0x1 + strb r0, [sp, #0x44] + mov r6, #0x0 + add r2, sp, #0x56 + strb r3, [sp, #0x43] + mov r0, #0x8 +_020E3724: + strb r6, [r2, #0x0] + strb r6, [r2, #0x1] + strb r6, [r2, #0x2] + strb r6, [r2, #0x3] + add r2, r2, #0x4 + subs r0, r0, #0x1 + bne _020E3724 + add r7, sp, #0x41 + b _020E3768 +_020E3748: + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r7, r7, #0x1 + add r5, r5, #0x1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 +_020E3768: + cmp r5, #0x4 + bge _020E379C + cmp r1, #0x0 + blt _020E3780 + cmp r1, #0x80 + blt _020E3788 +_020E3780: + mov r2, r1 + b _020E3790 +_020E3788: + ldr r0, _020E42FC ; =0x0210428C + ldrb r2, [r0, r1] +_020E3790: + ldrsb r0, [r7, #0x0] + cmp r0, r2 + beq _020E3748 +_020E379C: + sub r0, r5, #0x3 + cmp r0, #0x1 + bhi _020E38B0 + cmp r5, #0x4 + bne _020E3854 + ldr r7, _020E42F8 ; =0x0210430C + b _020E37DC +_020E37B8: + add r0, sp, #0x56 + strb r1, [r0, r6] + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r6, r6, #0x1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 +_020E37DC: + cmp r6, #0x20 + bge _020E3844 + cmp r1, #0x0 + blt _020E37F4 + cmp r1, #0x80 + blt _020E37FC +_020E37F4: + mov r0, #0x0 + b _020E3808 +_020E37FC: + mov r0, r1, lsl #0x1 + ldrh r0, [r7, r0] + and r0, r0, #0x8 +_020E3808: + cmp r0, #0x0 + bne _020E37B8 + cmp r1, #0x0 + blt _020E3820 + cmp r1, #0x80 + blt _020E3828 +_020E3820: + mov r0, #0x0 + b _020E3834 +_020E3828: + mov r0, r1, lsl #0x1 + ldrh r0, [r7, r0] + and r0, r0, #0x1 +_020E3834: + cmp r0, #0x0 + bne _020E37B8 + cmp r1, #0x2e + beq _020E37B8 +_020E3844: + cmp r1, #0x29 + movne r5, #0x1000 + bne _020E4104 + add r6, r6, #0x1 +_020E3854: + add r0, sp, #0x56 + mov r1, #0x0 + strb r1, [r0, r6] + ldr r1, [sp, #0x28] + cmp r1, #0x0 + beq _020E3888 + bl nan + mov r2, r0 + mov r0, #0x0 + mov r3, r1 + mov r1, r0 + bl _dsub +_020E3884: ; 0x020E3884 + b _020E388C +_020E3888: + bl nan +_020E388C: + ldr r2, [sp, #0x2c] + add r2, r2, r5 + add r3, r6, r2 + ldr r2, [sp, #0x18] + add r3, r2, r3 + ldr r2, [sp, #0x4] + add sp, sp, #0xa8 + str r3, [r2, #0x0] + ldmia sp!, {r3-r11,pc} +_020E38B0: + mov r5, #0x1000 + b _020E4104 +_020E38B8: + cmp r1, #0x2e + bne _020E38E0 + mov r5, #0x10 + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E38E0: + cmp r1, #0x0 + blt _020E38F0 + cmp r1, #0x80 + blt _020E38F8 +_020E38F0: + mov r0, #0x0 + b _020E3908 +_020E38F8: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E3908: + cmp r0, #0x0 + moveq r5, #0x1000 + beq _020E4104 + cmp r1, #0x30 + bne _020E3960 + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + cmp r0, #0x0 + mov r1, r0 + blt _020E394C + cmp r0, #0x80 + bge _020E394C + ldr r2, _020E42FC ; =0x0210428C + ldrb r0, [r2, r0] +_020E394C: + cmp r0, #0x58 + moveq r5, #0x8000 + moveq r10, #0x1 + movne r5, #0x4 + b _020E4104 +_020E3960: + mov r5, #0x8 + b _020E4104 +_020E3968: + cmp r1, #0x30 + movne r5, #0x8 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3990: + cmp r1, #0x0 + blt _020E39A0 + cmp r1, #0x80 + blt _020E39A8 +_020E39A0: + mov r0, #0x0 + b _020E39B8 +_020E39A8: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E39B8: + cmp r0, #0x0 + bne _020E39EC + cmp r1, #0x2e + movne r5, #0x40 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r5, #0x20 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E39EC: + ldrb r2, [sp, #0x84] + cmp r2, #0x14 + ldrcs r0, [sp, #0x1c] + addcs r0, r0, #0x1 + strcs r0, [sp, #0x1c] + bhs _020E3A18 + add r0, r2, #0x1 + strb r0, [sp, #0x84] + add r0, sp, #0x80 + add r0, r0, r2 + strb r1, [r0, #0x5] +_020E3A18: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3A34: + cmp r1, #0x0 + blt _020E3A44 + cmp r1, #0x80 + blt _020E3A4C +_020E3A44: + mov r0, #0x0 + b _020E3A5C +_020E3A4C: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E3A5C: + cmp r0, #0x0 + moveq r5, #0x1000 + movne r5, #0x20 + b _020E4104 +_020E3A6C: + cmp r1, #0x0 + blt _020E3A7C + cmp r1, #0x80 + blt _020E3A84 +_020E3A7C: + mov r0, #0x0 + b _020E3A94 +_020E3A84: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E3A94: + cmp r0, #0x0 + moveq r5, #0x40 + beq _020E4104 + ldrb r3, [sp, #0x84] + cmp r3, #0x14 + bhs _020E3ADC + cmp r1, #0x30 + cmpeq r3, #0x0 + beq _020E3AD0 + ldrb r2, [sp, #0x84] + add r0, sp, #0x80 + add r0, r0, r3 + add r2, r2, #0x1 + strb r2, [sp, #0x84] + strb r1, [r0, #0x5] +_020E3AD0: + ldr r0, [sp, #0x1c] + sub r0, r0, #0x1 + str r0, [sp, #0x1c] +_020E3ADC: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3AF8: + cmp r1, #0x0 + blt _020E3B08 + cmp r1, #0x80 + blt _020E3B10 +_020E3B08: + mov r0, r1 + b _020E3B18 +_020E3B10: + ldr r0, _020E42FC ; =0x0210428C + ldrb r0, [r0, r1] +_020E3B18: + cmp r0, #0x45 + movne r5, #0x800 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r5, #0x80 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3B44: + cmp r1, #0x2b + bne _020E3B68 + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E3B90 +_020E3B68: + cmp r1, #0x2d + bne _020E3B90 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + mov r0, #0x1 + str r0, [sp, #0x24] +_020E3B90: + mov r5, #0x100 + b _020E4104 +_020E3B98: + cmp r1, #0x0 + blt _020E3BA8 + cmp r1, #0x80 + blt _020E3BB0 +_020E3BA8: + mov r0, #0x0 + b _020E3BC0 +_020E3BB0: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E3BC0: + cmp r0, #0x0 + moveq r5, #0x1000 + beq _020E4104 + cmp r1, #0x30 + movne r5, #0x400 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r5, #0x200 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3BF8: + cmp r1, #0x30 + movne r5, #0x400 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3C20: + cmp r1, #0x0 + blt _020E3C30 + cmp r1, #0x80 + blt _020E3C38 +_020E3C30: + mov r0, #0x0 + b _020E3C48 +_020E3C38: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E3C48: + cmp r0, #0x0 + moveq r5, #0x800 + beq _020E4104 + ldr r0, [sp, #0x20] + sub r2, r1, #0x30 + mov r1, #0xa + mla r0, r1, r0, r2 + ldr r1, _020E4304 ; =0x00007FFF + str r0, [sp, #0x20] + cmp r0, r1 + ldrgt r0, [sp, #0xd0] + movgt r1, #0x1 + strgt r1, [r0, #0x0] + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3C98: + cmp r10, #0x20 + bgt _020E3CE8 + bge _020E3FBC + cmp r10, #0x8 + bgt _020E3CDC + cmp r10, #0x0 + addge pc, pc, r10, lsl #0x2 + b _020E4104 +_020E3CB8: ; 0x020E3CB8 + b _020E4104 +_020E3CBC: ; 0x020E3CBC + b _020E3D0C +_020E3CC0: ; 0x020E3CC0 + b _020E3D5C +_020E3CC4: ; 0x020E3CC4 + b _020E4104 +_020E3CC8: ; 0x020E3CC8 + b _020E3D84 +_020E3CCC: ; 0x020E3CCC + b _020E4104 +_020E3CD0: ; 0x020E3CD0 + b _020E4104 +_020E3CD4: ; 0x020E3CD4 + b _020E4104 +_020E3CD8: ; 0x020E3CD8 + b _020E3E94 +_020E3CDC: + cmp r10, #0x10 + beq _020E3F70 + b _020E4104 +_020E3CE8: + cmp r10, #0x80 + bgt _020E3D00 + bge _020E4064 + cmp r10, #0x40 + beq _020E4004 + b _020E4104 +_020E3D00: + cmp r10, #0x100 + beq _020E408C + b _020E4104 +_020E3D0C: + mov r1, #0x0 + add r0, sp, #0x45 + str r0, [sp, #0x14] + strb r1, [r0, #0x0] + strb r1, [r0, #0x1] + strb r1, [r0, #0x2] + strb r1, [r0, #0x3] + strb r1, [r0, #0x4] + strb r1, [r0, #0x5] + strb r1, [r0, #0x6] + strb r1, [r0, #0x7] + mov r0, r8 + mov r2, r1 + str r1, [sp, #0x8] + mov r11, r1 + mov r10, #0x2 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3D5C: + cmp r1, #0x30 + movne r10, #0x4 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3D84: + cmp r1, #0x0 + blt _020E3D94 + cmp r1, #0x80 + blt _020E3D9C +_020E3D94: + mov r0, #0x0 + b _020E3DAC +_020E3D9C: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x400 +_020E3DAC: + cmp r0, #0x0 + bne _020E3DE0 + cmp r1, #0x2e + movne r10, #0x10 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r10, #0x8 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3DE0: + ldr r2, [sp, #0x8] + mov r0, #0xe + cmp r2, r0 + bhs _020E3E78 + mov r0, r2 + add r0, r0, #0x1 + str r0, [sp, #0x8] + ldr r0, [sp, #0x14] + add r2, r11, r11, lsr #0x1f + cmp r1, #0x0 + ldrb r0, [r0, r2, asr #0x1] + blt _020E3E20 + cmp r1, #0x80 + bge _020E3E20 + ldr r2, _020E42FC ; =0x0210428C + ldrb r1, [r2, r1] +_020E3E20: + cmp r1, #0x41 + subge r1, r1, #0x37 + sublt r1, r1, #0x30 + mov r2, r11, lsr #0x1f + and r3, r1, #0xff + rsb r1, r2, r11, lsl #0x1f + adds r1, r2, r1, ror #0x1f + moveq r1, r3, lsl #0x4 + add r2, r11, r11, lsr #0x1f + orrne r0, r0, r3 + andeq r1, r1, #0xff + orreq r0, r0, r1 + ldr r1, [sp, #0x14] + add r11, r11, #0x1 + strb r0, [r1, r2, asr #0x1] + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3E78: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3E94: + cmp r1, #0x0 + blt _020E3EA4 + cmp r1, #0x80 + blt _020E3EAC +_020E3EA4: + mov r0, #0x0 + b _020E3EBC +_020E3EAC: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x400 +_020E3EBC: + cmp r0, #0x0 + moveq r10, #0x10 + beq _020E4104 + ldr r2, [sp, #0x8] + mov r0, #0xe + cmp r2, r0 + bhs _020E3F54 + ldr r0, [sp, #0x14] + add r2, r11, r11, lsr #0x1f + cmp r1, #0x0 + ldrb r0, [r0, r2, asr #0x1] + blt _020E3EFC + cmp r1, #0x80 + bge _020E3EFC + ldr r2, _020E42FC ; =0x0210428C + ldrb r1, [r2, r1] +_020E3EFC: + cmp r1, #0x41 + subge r1, r1, #0x37 + sublt r1, r1, #0x30 + mov r2, r11, lsr #0x1f + and r3, r1, #0xff + rsb r1, r2, r11, lsl #0x1f + adds r1, r2, r1, ror #0x1f + moveq r1, r3, lsl #0x4 + add r2, r11, r11, lsr #0x1f + orrne r0, r0, r3 + andeq r1, r1, #0xff + orreq r0, r0, r1 + ldr r1, [sp, #0x14] + add r11, r11, #0x1 + strb r0, [r1, r2, asr #0x1] + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3F54: + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3F70: + cmp r1, #0x0 + blt _020E3F80 + cmp r1, #0x80 + blt _020E3F88 +_020E3F80: + mov r0, r1 + b _020E3F90 +_020E3F88: + ldr r0, _020E42FC ; =0x0210428C + ldrb r0, [r0, r1] +_020E3F90: + cmp r0, #0x50 + movne r5, #0x800 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r10, #0x20 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E3FBC: + cmp r1, #0x2d + moveq r0, #0x1 + streq r0, [sp, #0xc] + beq _020E3FE4 + cmp r1, #0x2b + beq _020E3FE4 + mov r0, r8 + mov r2, #0x1 + blx r9 + sub r4, r4, #0x1 +_020E3FE4: + mov r10, #0x40 + add r4, r4, #0x1 + mov r0, r8 + mov r1, #0x0 + mov r2, r1 + blx r9 + mov r1, r0 + b _020E4104 +_020E4004: + cmp r1, #0x0 + blt _020E4014 + cmp r1, #0x80 + blt _020E401C +_020E4014: + mov r0, #0x0 + b _020E402C +_020E401C: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E402C: + cmp r0, #0x0 + moveq r5, #0x1000 + beq _020E4104 + cmp r1, #0x30 + movne r10, #0x100 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + mov r10, #0x80 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E4064: + cmp r1, #0x30 + movne r10, #0x100 + bne _020E4104 + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + add r4, r4, #0x1 + blx r9 + mov r1, r0 + b _020E4104 +_020E408C: + cmp r1, #0x0 + blt _020E409C + cmp r1, #0x80 + blt _020E40A4 +_020E409C: + mov r0, #0x0 + b _020E40B4 +_020E40A4: + mov r2, r1, lsl #0x1 + ldr r0, _020E42F8 ; =0x0210430C + ldrh r0, [r0, r2] + and r0, r0, #0x8 +_020E40B4: + cmp r0, #0x0 + moveq r5, #0x800 + beq _020E4104 + ldr r0, [sp, #0x10] + sub r2, r1, #0x30 + mov r1, #0xa + mla r0, r1, r0, r2 + str r0, [sp, #0x10] + ldr r1, _020E4304 ; =0x00007FFF + ldr r0, [sp, #0x20] + add r4, r4, #0x1 + cmp r0, r1 + ldrgt r0, [sp, #0xd0] + movgt r1, #0x1 + strgt r1, [r0, #0x0] + mov r1, #0x0 + mov r0, r8 + mov r2, r1 + blx r9 + mov r1, r0 +_020E4104: + ldr r0, [sp, #0x0] + cmp r4, r0 + bgt _020E4124 + mvn r0, #0x0 + cmp r1, r0 + beq _020E4124 + tst r5, #0x1800 + beq _020E3418 +_020E4124: + cmp r5, #0x8000 + beq _020E4140 + ldr r0, _020E4308 ; =0x00000E2C + tst r5, r0 + moveq r0, #0x1 + movne r0, #0x0 + b _020E4164 +_020E4140: + sub r0, r4, #0x1 + cmp r0, #0x2 + ble _020E4158 + ldr r0, _020E430C ; =0x0000018E + tst r10, r0 + bne _020E4160 +_020E4158: + mov r0, #0x1 + b _020E4164 +_020E4160: + mov r0, #0x0 +_020E4164: + cmp r0, #0x0 + movne r2, #0x0 + ldrne r0, [sp, #0x4] + bne _020E4184 + ldr r0, [sp, #0x2c] + sub r2, r4, #0x1 + add r2, r2, r0 + ldr r0, [sp, #0x4] +_020E4184: + str r2, [r0, #0x0] + mov r0, r8 + mov r2, #0x1 + blx r9 + cmp r10, #0x0 + bne _020E4388 + ldr r0, [sp, #0x24] + ldrb r2, [sp, #0x84] + cmp r0, #0x0 + ldrne r0, [sp, #0x20] + rsbne r0, r0, #0x0 + strne r0, [sp, #0x20] + add r0, sp, #0x85 + add r1, r0, r2 + b _020E41CC +_020E41C0: + ldr r0, [sp, #0x1c] + add r0, r0, #0x1 + str r0, [sp, #0x1c] +_020E41CC: + cmp r2, #0x0 + sub r2, r2, #0x1 + beq _020E41E4 + ldrb r0, [r1, #-0x1]! + cmp r0, #0x30 + beq _020E41C0 +_020E41E4: + add r0, r2, #0x1 + strb r0, [sp, #0x84] + ands r2, r0, #0xff + bne _020E4208 + add r1, r2, #0x1 + strb r1, [sp, #0x84] + add r0, sp, #0x85 + mov r1, #0x30 + strb r1, [r0, r2] +_020E4208: + ldr r1, [sp, #0x20] + ldr r0, [sp, #0x1c] + mov r2, #0x8000 + add r0, r1, r0 + rsb r2, r2, #0x0 + str r0, [sp, #0x20] + cmp r0, r2 + blt _020E4230 + cmp r0, r2, lsr #0x11 + ble _020E423C +_020E4230: + ldr r0, [sp, #0xd0] + mov r1, #0x1 + str r1, [r0, #0x0] +_020E423C: + ldr r0, [sp, #0xd0] + ldr r0, [r0, #0x0] + cmp r0, #0x0 + beq _020E4298 + ldr r0, [sp, #0x24] + cmp r0, #0x0 + movne r0, #0x0 + addne sp, sp, #0xa8 + movne r1, r0 + ldmneia sp!, {r3-r11,pc} +_020E4264: ; 0x020E4264 + ldr r0, [sp, #0x28] + cmp r0, #0x0 + ldreq r1, _020E4310 ; =0x02106B7C + addeq sp, sp, #0xa8 + ldmeqia r1, {r0-r1} + ldmeqia sp!, {r3-r11,pc} +_020E427C: ; 0x020E427C + ldr r1, _020E4310 ; =0x02106B7C + mov r0, #0x0 + ldmia r1, {r2-r3} + mov r1, r0 + bl _dsub + add sp, sp, #0xa8 + ldmia sp!, {r3-r11,pc} +_020E4298: + ldr r1, [sp, #0x20] + add r0, sp, #0x80 + strh r1, [sp, #0x82] + bl __dec2num + mov r4, r0 + mov r6, r1 + mov r0, #0x0 + mov r1, r0 + mov r2, r4 + mov r3, r6 + bl _dneq + beq _020E4318 + mov r0, r4 + mov r1, r6 + mov r2, #0x0 + mov r3, #0x100000 + bl _dls + bhs _020E4318 + ldr r0, [sp, #0xd0] + mov r1, #0x1 + str r1, [r0, #0x0] + b _020E4344 + .balign 4 +_020E42F0: .word 0x02104439 +_020E42F4: .word 0x02104434 +_020E42F8: .word 0x0210430C +_020E42FC: .word 0x0210428C +_020E4300: .word 0x02106B74 +_020E4304: .word 0x00007FFF +_020E4308: .word 0x00000E2C +_020E430C: .word 0x0000018E +_020E4310: .word 0x02106B7C +_020E4314: .word 0x7FEFFFFF +_020E4318: + ldr r3, _020E4314 ; =0x7FEFFFFF + mov r0, r4 + mov r1, r6 + mvn r2, #0x0 + bl _dgr + bls _020E4344 + ldr r0, [sp, #0xd0] + mov r2, #0x1 + ldr r1, _020E4310 ; =0x02106B7C + str r2, [r0, #0x0] + ldmia r1, {r4,r6} +_020E4344: + ldr r0, [sp, #0x28] + cmp r0, #0x0 + beq _020E4378 + ldr r0, _020E4308 ; =0x00000E2C + tst r5, r0 + beq _020E4378 + mov r0, #0x0 + mov r1, r0 + mov r2, r4 + mov r3, r6 + bl _dsub + mov r4, r0 + mov r6, r1 +_020E4378: + add sp, sp, #0xa8 + mov r0, r4 + mov r1, r6 + ldmia sp!, {r3-r11,pc} +_020E4388: + ldr r0, [sp, #0xc] + add r4, sp, #0x38 + cmp r0, #0x0 + ldrne r0, [sp, #0x10] + ldrb r3, [sp, #0x45] + rsbne r0, r0, #0x0 + strne r0, [sp, #0x10] + ldr r1, [sp, #0x10] + ldr r0, [sp, #0x8] + mov r2, #0x0 + add r0, r1, r0, lsl #0x2 + str r0, [sp, #0x10] + mov r1, #0x80 + b _020E43D0 +_020E43C0: + ldr r0, [sp, #0x10] + add r2, r2, #0x1 + sub r0, r0, #0x1 + str r0, [sp, #0x10] +_020E43D0: + cmp r2, #0x4 + bhs _020E43E0 + tst r3, r1, asr r2 + beq _020E43C0 +_020E43E0: + adds r5, r2, #0x1 + beq _020E442C + add r0, sp, #0x4c + add r3, sp, #0x45 + str r0, [sp, #0x14] + mov r1, #0x0 + cmp r0, r3 + blo _020E442C + rsb r6, r5, #0x8 +_020E4404: + ldr r0, [sp, #0x14] + ldrb r0, [r0, #0x0] + orr r2, r1, r0, lsl r5 + mov r1, r0, asr r6 + ldr r0, [sp, #0x14] + and r1, r1, #0xff + strb r2, [r0], #-0x1 + str r0, [sp, #0x14] + cmp r0, r3 + bhs _020E4404 +_020E442C: + mov r2, #0x0 + mov r6, r2 + strb r2, [r4, #0x0] + strb r2, [r4, #0x1] + strb r2, [r4, #0x2] + strb r2, [r4, #0x3] + strb r2, [r4, #0x4] + strb r2, [r4, #0x5] + strb r2, [r4, #0x6] + strb r2, [r4, #0x7] + mov r3, #0xc + mov r7, #0x1 + mov r0, #0xff + add r1, sp, #0x45 +_020E4464: + add r5, r2, #0x8 + cmp r5, #0x34 + ldrb r5, [r1, r6] + rsbhi r8, r2, #0x34 + and r11, r3, #0x7 + andhi r5, r5, r0, lsl r8 + andhi r5, r5, #0xff + mov r8, r5, asr r11 + and r9, r8, #0xff + ldrb r10, [r4, r7] + rsb r8, r11, #0x8 + mov r5, r5, lsl r8 + orr r9, r10, r9 + strb r9, [r4, r7] + add r7, r7, #0x1 + add r2, r2, #0x8 + ldrb r8, [r4, r7] + and r5, r5, #0xff + cmp r2, #0x34 + orr r5, r8, r5 + strb r5, [r4, r7] + add r3, r3, #0x8 + add r6, r6, #0x1 + blo _020E4464 + ldr r0, [sp, #0x10] + mov r1, #0x800 + add r0, r0, #0xfe + add r2, r0, #0x300 + rsb r1, r1, #0x0 + tst r2, r1 + beq _020E44FC + ldr r2, [sp, #0xd0] + mov r3, #0x1 + mov r0, #0x0 + add sp, sp, #0xa8 + mov r1, r0 + str r3, [r2, #0x0] + ldmia sp!, {r3-r11,pc} +_020E44FC: + ldrb r0, [r4, #0x1] + mov r2, r2, lsl #0x15 + ldrb r1, [r4, #0x0] + orr r0, r0, r2, lsr #0x11 + strb r0, [r4, #0x1] + ldr r0, [sp, #0x28] + orr r1, r1, r2, lsr #0x19 + cmp r0, #0x0 + andne r0, r1, #0xff + strb r1, [r4, #0x0] + orrne r0, r0, #0x80 + strneb r0, [r4, #0x0] + mov r3, #0x0 +_020E4530: + rsb r1, r3, #0x7 + ldrb r2, [r4, r3] + ldrb r0, [r4, r1] + strb r0, [r4, r3] + add r3, r3, #0x1 + strb r2, [r4, r1] + cmp r3, #0x4 + blt _020E4530 + ldmia r4, {r0-r1} + add sp, sp, #0xa8 + ldmia sp!, {r3-r11,pc} + + arm_func_start strtold +strtold: ; 0x020E455C + stmdb sp!, {r4-r7,lr} + sub sp, sp, #0x14 + mov r7, r0 + mov r0, #0x0 + mov r6, r1 + str r0, [sp, #0x8] + add r4, sp, #0xc + str r7, [sp, #0x4] + ldr r1, _020E4630 ; =__StringRead + add r2, sp, #0x4 + add r3, sp, #0x10 + sub r0, r0, #0x80000001 + str r4, [sp, #0x0] + bl __strtold + mov r5, r1 + mov r4, r0 + cmp r6, #0x0 + ldrne r0, [sp, #0x10] + mov r1, r5 + addne r0, r7, r0 + strne r0, [r6, #0x0] + mov r0, r4 + bl fabs + ldr r2, [sp, #0xc] + mov r6, r0 + mov r7, r1 + cmp r2, #0x0 + bne _020E4614 + mov r0, #0x0 + mov r1, r0 + mov r2, r4 + mov r3, r5 + bl _dneq + beq _020E4620 + mov r0, r6 + mov r1, r7 + mov r2, #0x0 + mov r3, #0x100000 + bl _dls + blo _020E4614 + ldr r3, _020E4634 ; =0x7FEFFFFF + mov r0, r6 + mov r1, r7 + mvn r2, #0x0 + bl _dgr + bls _020E4620 +_020E4614: + ldr r0, _020E4638 ; =0x021D74A8 + mov r1, #0x22 + str r1, [r0, #0x0] +_020E4620: + mov r0, r4 + mov r1, r5 + add sp, sp, #0x14 + ldmia sp!, {r4-r7,pc} + .balign 4 +_020E4630: .word __StringRead +_020E4634: .word 0x7FEFFFFF +_020E4638: .word 0x021D74A8 + + arm_func_start atod +atod: ; 0x020E463C + ldr ip, _020E4648 ; =strtold + mov r1, #0x0 + bx r12 + .balign 4 +_020E4648: .word strtold + + arm_func_start __strtoul +__strtoul: + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0xc + ldr r4, [sp, #0x38] + movs r9, r0 + ldr r0, [sp, #0x34] + str r4, [sp, #0x38] + mov r4, #0x0 + str r0, [sp, #0x34] + ldr r0, [sp, #0x38] + str r1, [sp, #0x0] + str r4, [r0, #0x0] + mov r0, r4 + str r0, [sp, #0x4] + ldr r0, [sp, #0x34] + mov r1, r4 + str r1, [r0, #0x0] + ldr r0, [sp, #0x30] + str r4, [sp, #0x8] + mov r8, r2 + mov r7, r3 + mov r5, r4 + mov r10, r4 + str r0, [sp, #0x30] + mov r4, #0x1 + bmi _020E46CC + cmp r9, #0x1 + beq _020E46CC + cmp r9, #0x24 + bgt _020E46CC + ldr r0, [sp, #0x0] + cmp r0, #0x1 + bge _020E46D4 +_020E46CC: + mov r4, #0x40 + b _020E46F0 +_020E46D4: + ldr r1, [sp, #0x8] + mov r0, r7 + mov r3, r1 + mov r2, r1 + add r5, r3, #0x1 + blx r8 + mov r6, r0 +_020E46F0: + cmp r9, #0x0 + beq _020E4708 + mov r1, r9 + mvn r0, #0x0 + bl _u32_div_f + str r0, [sp, #0x4] +_020E4708: + mvn r11, #0x0 + b _020E49C8 +_020E4710: + cmp r4, #0x8 + bgt _020E4748 + cmp r4, #0x0 + addge pc, pc, r4, lsl #0x2 + b _020E49C8 +_020E4724: ; 0x020E4724 + b _020E49C8 +_020E4728: ; 0x020E4728 + b _020E4754 +_020E472C: ; 0x020E472C + b _020E4800 +_020E4730: ; 0x020E4730 + b _020E49C8 +_020E4734: ; 0x020E4734 + b _020E483C +_020E4738: ; 0x020E4738 + b _020E49C8 +_020E473C: ; 0x020E473C + b _020E49C8 +_020E4740: ; 0x020E4740 + b _020E49C8 +_020E4744: ; 0x020E4744 + b _020E487C +_020E4748: + cmp r4, #0x10 + beq _020E487C + b _020E49C8 +_020E4754: + cmp r6, #0x0 + blt _020E4764 + cmp r6, #0x80 + blt _020E476C +_020E4764: + mov r0, #0x0 + b _020E477C +_020E476C: + ldr r0, _020E4A2C ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x100 +_020E477C: + cmp r0, #0x0 + beq _020E47A8 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + blx r8 + mov r6, r0 + ldr r0, [sp, #0x8] + add r0, r0, #0x1 + str r0, [sp, #0x8] + b _020E49C8 +_020E47A8: + cmp r6, #0x2b + bne _020E47CC + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E47F8 +_020E47CC: + cmp r6, #0x2d + bne _020E47F8 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + ldr r0, [sp, #0x34] + mov r1, #0x1 + str r1, [r0, #0x0] +_020E47F8: + mov r4, #0x2 + b _020E49C8 +_020E4800: + cmp r9, #0x0 + cmpne r9, #0x10 + bne _020E4834 + cmp r6, #0x30 + bne _020E4834 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + mov r4, #0x4 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E49C8 +_020E4834: + mov r4, #0x8 + b _020E49C8 +_020E483C: + cmp r6, #0x58 + cmpne r6, #0x78 + bne _020E486C + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + mov r9, #0x10 + mov r4, #0x8 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E49C8 +_020E486C: + cmp r9, #0x0 + moveq r9, #0x8 + mov r4, #0x10 + b _020E49C8 +_020E487C: + ldr r0, [sp, #0x4] + cmp r9, #0x0 + moveq r9, #0xa + cmp r0, #0x0 + bne _020E48A0 + mov r0, r11 + mov r1, r9 + bl _u32_div_f + str r0, [sp, #0x4] +_020E48A0: + cmp r6, #0x0 + blt _020E48B0 + cmp r6, #0x80 + blt _020E48B8 +_020E48B0: + mov r0, #0x0 + b _020E48C8 +_020E48B8: + ldr r0, _020E4A2C ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x8 +_020E48C8: + cmp r0, #0x0 + beq _020E48F0 + sub r6, r6, #0x30 + cmp r6, r9 + blt _020E4978 + cmp r4, #0x10 + moveq r4, #0x20 + movne r4, #0x40 + add r6, r6, #0x30 + b _020E49C8 +_020E48F0: + cmp r6, #0x0 + blt _020E4900 + cmp r6, #0x80 + blt _020E4908 +_020E4900: + mov r0, #0x0 + b _020E4918 +_020E4908: + ldr r0, _020E4A2C ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x1 +_020E4918: + cmp r0, #0x0 + beq _020E494C + cmp r6, #0x0 + blt _020E4930 + cmp r6, #0x80 + blt _020E4938 +_020E4930: + mov r0, r6 + b _020E4940 +_020E4938: + ldr r0, _020E4A30 ; =0x0210428C + ldrb r0, [r0, r6] +_020E4940: + sub r0, r0, #0x37 + cmp r0, r9 + blt _020E495C +_020E494C: + cmp r4, #0x10 + moveq r4, #0x20 + movne r4, #0x40 + b _020E49C8 +_020E495C: + cmp r6, #0x0 + blt _020E4974 + cmp r6, #0x80 + bge _020E4974 + ldr r0, _020E4A30 ; =0x0210428C + ldrb r6, [r0, r6] +_020E4974: + sub r6, r6, #0x37 +_020E4978: + ldr r0, [sp, #0x4] + mov r4, #0x10 + cmp r10, r0 + ldrhi r0, [sp, #0x38] + movhi r1, #0x1 + strhi r1, [r0, #0x0] + mul r0, r10, r9 + mov r10, r0 + sub r0, r11, r0 + cmp r6, r0 + ldrhi r0, [sp, #0x38] + movhi r1, #0x1 + strhi r1, [r0, #0x0] + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + add r10, r10, r6 + add r5, r5, #0x1 + blx r8 + mov r6, r0 +_020E49C8: + ldr r0, [sp, #0x0] + cmp r5, r0 + bgt _020E49E4 + cmp r6, r11 + beq _020E49E4 + tst r4, #0x60 + beq _020E4710 +_020E49E4: + tst r4, #0x34 + bne _020E49FC + ldr r0, [sp, #0x30] + mov r10, #0x0 + str r10, [r0, #0x0] + b _020E4A10 +_020E49FC: + ldr r0, [sp, #0x8] + sub r1, r5, #0x1 + add r1, r1, r0 + ldr r0, [sp, #0x30] + str r1, [r0, #0x0] +_020E4A10: + mov r0, r7 + mov r1, r6 + mov r2, #0x1 + blx r8 + mov r0, r10 + add sp, sp, #0xc + ldmia sp!, {r4-r11,pc} + .balign 4 +_020E4A2C: .word 0x0210430C +_020E4A30: .word 0x0210428C + + arm_func_start __strtoull +__strtoull: ; 0x020E4A34 + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x1c + ldr r4, [sp, #0x48] + movs r9, r0 + ldr r0, [sp, #0x44] + str r4, [sp, #0x48] + mov r4, #0x0 + str r0, [sp, #0x44] + ldr r0, [sp, #0x48] + str r1, [sp, #0x0] + str r4, [r0, #0x0] + mov r0, r4 + str r0, [sp, #0xc] + str r0, [sp, #0x8] + ldr r0, [sp, #0x44] + mov r1, r4 + str r1, [r0, #0x0] + ldr r0, [sp, #0x40] + str r4, [sp, #0x14] + mov r8, r2 + mov r7, r3 + mov r5, r4 + mov r10, r4 + mov r11, r4 + str r0, [sp, #0x40] + mov r4, #0x1 + bmi _020E4ABC + cmp r9, #0x1 + beq _020E4ABC + cmp r9, #0x24 + bgt _020E4ABC + ldr r0, [sp, #0x0] + cmp r0, #0x1 + bge _020E4AC4 +_020E4ABC: + mov r4, #0x40 + b _020E4ADC +_020E4AC4: + ldr r1, [sp, #0x14] + mov r0, r7 + mov r2, r1 + add r5, r1, #0x1 + blx r8 + mov r6, r0 +_020E4ADC: + cmp r9, #0x0 + beq _020E4B00 + mvn r0, #0x0 + mov r1, r0 + mov r3, r9, asr #0x1f + mov r2, r9 + bl _ll_udiv + str r0, [sp, #0xc] + str r1, [sp, #0x8] +_020E4B00: + mvn r0, #0x0 + str r0, [sp, #0x18] + b _020E4E08 +_020E4B0C: + cmp r4, #0x8 + bgt _020E4B44 + cmp r4, #0x0 + addge pc, pc, r4, lsl #0x2 + b _020E4E08 +_020E4B20: ; 0x020E4B20 + b _020E4E08 +_020E4B24: ; 0x020E4B24 + b _020E4B50 +_020E4B28: ; 0x020E4B28 + b _020E4BFC +_020E4B2C: ; 0x020E4B2C + b _020E4E08 +_020E4B30: ; 0x020E4B30 + b _020E4C38 +_020E4B34: ; 0x020E4B34 + b _020E4E08 +_020E4B38: ; 0x020E4B38 + b _020E4E08 +_020E4B3C: ; 0x020E4B3C + b _020E4E08 +_020E4B40: ; 0x020E4B40 + b _020E4C78 +_020E4B44: + cmp r4, #0x10 + beq _020E4C78 + b _020E4E08 +_020E4B50: + cmp r6, #0x0 + blt _020E4B60 + cmp r6, #0x80 + blt _020E4B68 +_020E4B60: + mov r0, #0x0 + b _020E4B78 +_020E4B68: + ldr r0, _020E4E78 ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x100 +_020E4B78: + cmp r0, #0x0 + beq _020E4BA4 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + blx r8 + mov r6, r0 + ldr r0, [sp, #0x14] + add r0, r0, #0x1 + str r0, [sp, #0x14] + b _020E4E08 +_020E4BA4: + cmp r6, #0x2b + bne _020E4BC8 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E4BF4 +_020E4BC8: + cmp r6, #0x2d + bne _020E4BF4 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + ldr r0, [sp, #0x44] + mov r1, #0x1 + str r1, [r0, #0x0] +_020E4BF4: + mov r4, #0x2 + b _020E4E08 +_020E4BFC: + cmp r9, #0x0 + cmpne r9, #0x10 + bne _020E4C30 + cmp r6, #0x30 + bne _020E4C30 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + mov r4, #0x4 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E4E08 +_020E4C30: + mov r4, #0x8 + b _020E4E08 +_020E4C38: + cmp r6, #0x58 + cmpne r6, #0x78 + bne _020E4C68 + mov r1, #0x0 + mov r0, r7 + mov r2, r1 + mov r9, #0x10 + mov r4, #0x8 + add r5, r5, #0x1 + blx r8 + mov r6, r0 + b _020E4E08 +_020E4C68: + cmp r9, #0x0 + moveq r9, #0x8 + mov r4, #0x10 + b _020E4E08 +_020E4C78: + ldr r1, [sp, #0x8] + mov r0, #0x0 + cmp r9, #0x0 + moveq r9, #0xa + cmp r1, r0 + ldr r1, [sp, #0xc] + cmpeq r1, r0 + bne _020E4CB4 + ldr r0, [sp, #0x18] + mov r3, r9, asr #0x1f + mov r1, r0 + mov r2, r9 + bl _ll_udiv + str r0, [sp, #0xc] + str r1, [sp, #0x8] +_020E4CB4: + cmp r6, #0x0 + blt _020E4CC4 + cmp r6, #0x80 + blt _020E4CCC +_020E4CC4: + mov r0, #0x0 + b _020E4CDC +_020E4CCC: + ldr r0, _020E4E78 ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x8 +_020E4CDC: + cmp r0, #0x0 + beq _020E4D04 + sub r6, r6, #0x30 + cmp r6, r9 + blt _020E4D8C + cmp r4, #0x10 + moveq r4, #0x20 + movne r4, #0x40 + add r6, r6, #0x30 + b _020E4E08 +_020E4D04: + cmp r6, #0x0 + blt _020E4D14 + cmp r6, #0x80 + blt _020E4D1C +_020E4D14: + mov r0, #0x0 + b _020E4D2C +_020E4D1C: + ldr r0, _020E4E78 ; =0x0210430C + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x1 +_020E4D2C: + cmp r0, #0x0 + beq _020E4D60 + cmp r6, #0x0 + blt _020E4D44 + cmp r6, #0x80 + blt _020E4D4C +_020E4D44: + mov r0, r6 + b _020E4D54 +_020E4D4C: + ldr r0, _020E4E7C ; =0x0210428C + ldrb r0, [r0, r6] +_020E4D54: + sub r0, r0, #0x37 + cmp r0, r9 + blt _020E4D70 +_020E4D60: + cmp r4, #0x10 + moveq r4, #0x20 + movne r4, #0x40 + b _020E4E08 +_020E4D70: + cmp r6, #0x0 + blt _020E4D88 + cmp r6, #0x80 + bge _020E4D88 + ldr r0, _020E4E7C ; =0x0210428C + ldrb r6, [r0, r6] +_020E4D88: + sub r6, r6, #0x37 +_020E4D8C: + ldr r0, [sp, #0x8] + umull r2, r3, r10, r9 + cmp r11, r0 + ldr r0, [sp, #0xc] + mov r4, #0x10 + cmpeq r10, r0 + ldrhi r0, [sp, #0x48] + movhi r1, #0x1 + strhi r1, [r0, #0x0] + mov r1, r9, asr #0x1f + mla r3, r10, r1, r3 + mla r3, r11, r9, r3 + ldr r1, [sp, #0x18] + mov r10, r2 + subs r2, r1, r2 + mov r0, r6, asr #0x1f + sbc r1, r1, r3 + cmp r0, r1 + cmpeq r6, r2 + ldrhi r1, [sp, #0x48] + movhi r2, #0x1 + strhi r2, [r1, #0x0] + mov r1, #0x0 + mov r11, r3 + adds r10, r10, r6 + adc r11, r11, r0 + mov r0, r7 + mov r2, r1 + add r5, r5, #0x1 + blx r8 + mov r6, r0 +_020E4E08: + ldr r0, [sp, #0x0] + cmp r5, r0 + bgt _020E4E28 + ldr r0, [sp, #0x18] + cmp r6, r0 + beq _020E4E28 + tst r4, #0x60 + beq _020E4B0C +_020E4E28: + tst r4, #0x34 + bne _020E4E44 + ldr r0, [sp, #0x40] + mov r10, #0x0 + mov r11, r10 + str r10, [r0, #0x0] + b _020E4E58 +_020E4E44: + ldr r0, [sp, #0x14] + sub r1, r5, #0x1 + add r1, r1, r0 + ldr r0, [sp, #0x40] + str r1, [r0, #0x0] +_020E4E58: + mov r0, r7 + mov r1, r6 + mov r2, #0x1 + blx r8 + mov r0, r10 + mov r1, r11 + add sp, sp, #0x1c + ldmia sp!, {r4-r11,pc} + .balign 4 +_020E4E78: .word 0x0210430C +_020E4E7C: .word 0x0210428C + + arm_func_start strtoul +strtoul: ; 0x020E4E80 + stmdb sp!, {r3-r5,lr} + sub sp, sp, #0x20 + mov r5, r0 + mov lr, #0x0 + mov r0, r2 + mov r4, r1 + add r2, sp, #0x1c + str r5, [sp, #0xc] + str lr, [sp, #0x10] + str r2, [sp, #0x0] + add r1, sp, #0x18 + str r1, [sp, #0x4] + add r12, sp, #0x14 + ldr r2, _020E4F10 ; =__StringRead + add r3, sp, #0xc + sub r1, lr, #0x80000001 + str r12, [sp, #0x8] + bl __strtoul +_020E4EC8: ; 0x020E4EC8 + cmp r4, #0x0 + ldrne r1, [sp, #0x1c] + addne r1, r5, r1 + strne r1, [r4, #0x0] + ldr r1, [sp, #0x14] + cmp r1, #0x0 + beq _020E4EFC + ldr r0, _020E4F14 ; =0x021D74A8 + mov r1, #0x22 + str r1, [r0, #0x0] + add sp, sp, #0x20 + mvn r0, #0x0 + ldmia sp!, {r3-r5,pc} +_020E4EFC: + ldr r1, [sp, #0x18] + cmp r1, #0x0 + rsbne r0, r0, #0x0 + add sp, sp, #0x20 + ldmia sp!, {r3-r5,pc} + .balign 4 +_020E4F10: .word __StringRead +_020E4F14: .word 0x021D74A8 + + arm_func_start strtold2 +strtold2: ; 0x020E4F18 + stmdb sp!, {r3-r5,lr} + sub sp, sp, #0x20 + mov r5, r0 + mov lr, #0x0 + mov r0, r2 + mov r4, r1 + add r2, sp, #0x1c + str r5, [sp, #0xc] + str lr, [sp, #0x10] + str r2, [sp, #0x0] + add r1, sp, #0x18 + str r1, [sp, #0x4] + add r12, sp, #0x14 + ldr r2, _020E4FD8 ; =__StringRead + add r3, sp, #0xc + sub r1, lr, #0x80000001 + str r12, [sp, #0x8] + bl __strtoul +_020E4F60: ; 0x020E4F60 + cmp r4, #0x0 + ldrne r1, [sp, #0x1c] + addne r1, r5, r1 + strne r1, [r4, #0x0] + ldr r1, [sp, #0x14] + cmp r1, #0x0 + bne _020E4FA4 + ldr r2, [sp, #0x18] + cmp r2, #0x0 + bne _020E4F94 + mvn r1, #0x80000000 + cmp r0, r1 + bhi _020E4FA4 +_020E4F94: + cmp r2, #0x0 + beq _020E4FC8 + cmp r0, #0x80000000 + bls _020E4FC8 +_020E4FA4: + ldr r0, [sp, #0x18] + ldr r1, _020E4FDC ; =0x021D74A8 + mov r2, #0x22 + cmp r0, #0x0 + movne r0, #0x80000000 + str r2, [r1, #0x0] + add sp, sp, #0x20 + mvneq r0, #0x80000000 + ldmia sp!, {r3-r5,pc} +_020E4FC8: + cmp r2, #0x0 + rsbne r0, r0, #0x0 + add sp, sp, #0x20 + ldmia sp!, {r3-r5,pc} + .balign 4 +_020E4FD8: .word __StringRead +_020E4FDC: .word 0x021D74A8 + + arm_func_start atol +atol: ; 0x020E4FE0 + ldr ip, _020E4FF0 ; =strtold + mov r1, #0x0 + mov r2, #0xa + bx r12 + .balign 4 +_020E4FF0: .word strtold2 + + arm_func_start fwide +fwide: + cmp r0, #0x0 + beq _020E500C + ldr r3, [r0, #0x4] + mov r2, r3, lsl #0x16 + movs r2, r2, lsr #0x1d + bne _020E5014 +_020E500C: + mov r0, #0x0 + bx lr +_020E5014: + mov r2, r3, lsl #0x14 + movs r2, r2, lsr #0x1e + beq _020E5034 + cmp r2, #0x1 + beq _020E505C + cmp r2, #0x2 + moveq r1, #0x1 + b _020E5060 +_020E5034: + cmp r1, #0x0 + ble _020E504C + bic r2, r3, #0xc00 + orr r2, r2, #0x800 + str r2, [r0, #0x4] + b _020E5060 +_020E504C: + biclt r2, r3, #0xc00 + orrlt r2, r2, #0x400 + strlt r2, [r0, #0x4] + b _020E5060 +_020E505C: + mvn r1, #0x0 +_020E5060: + mov r0, r1 + bx lr + + arm_func_start wmemcpy +wmemcpy: ; 0x020E5068 + ldr ip, _020E5074 ; =memcpy + mov r2, r2, lsl #0x1 + bx r12 + .balign 4 +_020E5074: .word memcpy + + arm_func_start wmemchr +wmemchr: + cmp r2, #0x0 + beq _020E5098 +_020E5080: + ldrh r3, [r0, #0x0] + cmp r3, r1 + bxeq lr + add r0, r0, #0x2 + subs r2, r2, #0x1 + bne _020E5080 +_020E5098: + mov r0, #0x0 + bx lr + + arm_func_start parse_format_wprintf +parse_format_wprintf: ; 0x020E50A0 + stmdb sp!, {r4-r8,lr} + sub sp, sp, #0x10 + ldrh r3, [r0, #0x2] + mov r4, #0x0 + mov r5, #0x1 + mov lr, r2 + strb r5, [sp, #0x0] + strb r4, [sp, #0x1] + strb r4, [sp, #0x2] + strb r4, [sp, #0x3] + strb r4, [sp, #0x4] + str r4, [sp, #0x8] + str r4, [sp, #0xc] + cmp r3, #0x25 + add r12, r0, #0x2 + bne _020E50FC + add r0, sp, #0x0 + strh r3, [sp, #0x6] + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add sp, sp, #0x10 + add r0, r12, #0x2 + ldmia sp!, {r4-r8,pc} +_020E50FC: + mov r2, #0x2 + mov r0, r4 + mov r5, r2 + mov r6, r4 + mov r7, #0x1 +_020E5110: + mov r8, r7 + cmp r3, #0x2b + bgt _020E5140 + bge _020E5168 + cmp r3, #0x23 + bgt _020E5198 + cmp r3, #0x20 + blt _020E5198 + beq _020E5170 + cmp r3, #0x23 + beq _020E5180 + b _020E5198 +_020E5140: + cmp r3, #0x30 + bgt _020E5198 + cmp r3, #0x2d + blt _020E5198 + beq _020E5160 + cmp r3, #0x30 + beq _020E5188 + b _020E5198 +_020E5160: + strb r6, [sp, #0x0] + b _020E519C +_020E5168: + strb r7, [sp, #0x1] + b _020E519C +_020E5170: + ldrb r4, [sp, #0x1] + cmp r4, #0x1 + strneb r5, [sp, #0x1] + b _020E519C +_020E5180: + strb r7, [sp, #0x3] + b _020E519C +_020E5188: + ldrb r4, [sp, #0x0] + cmp r4, #0x0 + strneb r2, [sp, #0x0] + b _020E519C +_020E5198: + mov r8, r0 +_020E519C: + cmp r8, #0x0 + ldrneh r3, [r12, #0x2]! + bne _020E5110 + cmp r3, #0x2a + bne _020E51E4 + ldr r0, [r1, #0x0] + add r0, r0, #0x4 + str r0, [r1, #0x0] + ldr r0, [r0, #-0x4] + str r0, [sp, #0x8] + cmp r0, #0x0 + bge _020E51DC + rsb r0, r0, #0x0 + mov r2, #0x0 + strb r2, [sp, #0x0] + str r0, [sp, #0x8] +_020E51DC: + ldrh r3, [r12, #0x2]! + b _020E5228 +_020E51E4: + mov r2, #0x0 + ldr r5, _020E560C ; =0x02104544 + mov r0, #0xa + b _020E5208 +_020E51F4: + ldr r4, [sp, #0x8] + sub r3, r3, #0x30 + mla r6, r4, r0, r3 + ldrh r3, [r12, #0x2]! + str r6, [sp, #0x8] +_020E5208: + cmp r3, #0x80 + movcs r4, r2 + bhs _020E5220 + mov r4, r3, lsl #0x1 + ldrh r4, [r5, r4] + and r4, r4, #0x8 +_020E5220: + cmp r4, #0x0 + bne _020E51F4 +_020E5228: + ldr r2, [sp, #0x8] + ldr r0, _020E5610 ; =0x000001FD + cmp r2, r0 + ble _020E5258 + ldr r1, _020E5614 ; =0x0000FFFF + add r0, sp, #0x0 + strh r1, [sp, #0x6] + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add sp, sp, #0x10 + add r0, r12, #0x2 + ldmia sp!, {r4-r8,pc} +_020E5258: + cmp r3, #0x2e + bne _020E52E0 + ldrh r3, [r12, #0x2]! + mov r0, #0x1 + strb r0, [sp, #0x2] + cmp r3, #0x2a + bne _020E529C + ldr r0, [r1, #0x0] + add r0, r0, #0x4 + str r0, [r1, #0x0] + ldr r0, [r0, #-0x4] + ldrh r3, [r12, #0x2]! + str r0, [sp, #0xc] + cmp r0, #0x0 + movlt r0, #0x0 + strltb r0, [sp, #0x2] + b _020E52E0 +_020E529C: + mov r1, #0x0 + ldr r4, _020E560C ; =0x02104544 + mov r0, #0xa + b _020E52C0 +_020E52AC: + ldr r2, [sp, #0xc] + sub r3, r3, #0x30 + mla r5, r2, r0, r3 + ldrh r3, [r12, #0x2]! + str r5, [sp, #0xc] +_020E52C0: + cmp r3, #0x80 + movcs r2, r1 + bhs _020E52D8 + mov r2, r3, lsl #0x1 + ldrh r2, [r4, r2] + and r2, r2, #0x8 +_020E52D8: + cmp r2, #0x0 + bne _020E52AC +_020E52E0: + cmp r3, #0x6c + mov r0, #0x1 + bgt _020E5318 + cmp r3, #0x68 + blt _020E530C + beq _020E5334 + cmp r3, #0x6a + beq _020E5380 + cmp r3, #0x6c + beq _020E5350 + b _020E53A4 +_020E530C: + cmp r3, #0x4c + beq _020E5374 + b _020E53A4 +_020E5318: + cmp r3, #0x74 + bgt _020E5328 + beq _020E538C + b _020E53A4 +_020E5328: + cmp r3, #0x7a + beq _020E5398 + b _020E53A4 +_020E5334: + ldrh r1, [r12, #0x2] + mov r2, #0x2 + strb r2, [sp, #0x4] + cmp r1, #0x68 + streqb r0, [sp, #0x4] + ldreqh r3, [r12, #0x2]! + b _020E53A8 +_020E5350: + ldrh r1, [r12, #0x2] + mov r2, #0x3 + strb r2, [sp, #0x4] + cmp r1, #0x6c + bne _020E53A8 + mov r1, #0x4 + strb r1, [sp, #0x4] + ldrh r3, [r12, #0x2]! + b _020E53A8 +_020E5374: + mov r1, #0x9 + strb r1, [sp, #0x4] + b _020E53A8 +_020E5380: + mov r1, #0x6 + strb r1, [sp, #0x4] + b _020E53A8 +_020E538C: + mov r1, #0x8 + strb r1, [sp, #0x4] + b _020E53A8 +_020E5398: + mov r1, #0x7 + strb r1, [sp, #0x4] + b _020E53A8 +_020E53A4: + mov r0, #0x0 +_020E53A8: + cmp r0, #0x0 + ldrneh r3, [r12, #0x2]! + strh r3, [sp, #0x6] + cmp r3, #0x61 + bgt _020E53FC + bge _020E54E0 + cmp r3, #0x47 + bgt _020E53F0 + subs r0, r3, #0x41 + addpl pc, pc, r0, lsl #0x2 + b _020E55EC +_020E53D4: ; 0x020E53D4 + b _020E54E0 +_020E53D8: ; 0x020E53D8 + b _020E55EC +_020E53DC: ; 0x020E53DC + b _020E55EC +_020E53E0: ; 0x020E53E0 + b _020E55EC +_020E53E4: ; 0x020E53E4 + b _020E5528 +_020E53E8: ; 0x020E53E8 + b _020E54A8 +_020E53EC: ; 0x020E53EC + b _020E5518 +_020E53F0: + cmp r3, #0x58 + beq _020E5470 + b _020E55EC +_020E53FC: + cmp r3, #0x63 + bgt _020E540C + beq _020E5588 + b _020E55EC +_020E540C: + sub r0, r3, #0x64 + cmp r0, #0x14 + addls pc, pc, r0, lsl #0x2 + b _020E55EC +_020E541C: + b _020E5470 +_020E5420: + b _020E5528 +_020E5424: + b _020E54A8 +_020E5428: + b _020E5518 +_020E542C: + b _020E55EC +_020E5430: + b _020E5470 +_020E5434: + b _020E55EC +_020E5438: + b _020E55EC +_020E543C: + b _020E55EC +_020E5440: + b _020E55EC +_020E5444: + b _020E55D8 +_020E5448: + b _020E5470 +_020E544C: + b _020E5564 +_020E5450: + b _020E55EC +_020E5454: + b _020E55EC +_020E5458: + b _020E55B4 +_020E545C: + b _020E55EC +_020E5460: + b _020E5470 +_020E5464: + b _020E55EC +_020E5468: + b _020E55EC +_020E546C: + b _020E5470 +_020E5470: + ldrb r0, [sp, #0x4] + cmp r0, #0x9 + moveq r0, #0x4 + streqb r0, [sp, #0x4] + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x1 + streq r0, [sp, #0xc] + beq _020E55F4 + ldrb r0, [sp, #0x0] + cmp r0, #0x2 + moveq r0, #0x1 + streqb r0, [sp, #0x0] + b _020E55F4 +_020E54A8: + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + ldreq r0, _020E5614 ; =0x0000FFFF + streqh r0, [sp, #0x6] + beq _020E55F4 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x6 + streq r0, [sp, #0xc] + b _020E55F4 +_020E54E0: + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0xd + streq r0, [sp, #0xc] + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + cmpne r0, #0x1 + ldreq r0, _020E5614 ; =0x0000FFFF + streqh r0, [sp, #0x6] + b _020E55F4 +_020E5518: + ldr r0, [sp, #0xc] + cmp r0, #0x0 + moveq r0, #0x1 + streq r0, [sp, #0xc] +_020E5528: + ldrb r0, [sp, #0x4] + cmp r0, #0x2 + cmpne r0, #0x6 + cmpne r0, #0x7 + cmpne r0, #0x8 + cmpne r0, #0x4 + cmpne r0, #0x1 + ldreq r0, _020E5614 ; =0x0000FFFF + streqh r0, [sp, #0x6] + beq _020E55F4 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + moveq r0, #0x6 + streq r0, [sp, #0xc] + b _020E55F4 +_020E5564: + mov r3, #0x3 + mov r2, #0x1 + mov r1, #0x78 + mov r0, #0x8 + strb r3, [sp, #0x4] + strb r2, [sp, #0x3] + strh r1, [sp, #0x6] + str r0, [sp, #0xc] + b _020E55F4 +_020E5588: + ldrb r1, [sp, #0x4] + cmp r1, #0x3 + moveq r0, #0x5 + streqb r0, [sp, #0x4] + beq _020E55F4 + ldrb r0, [sp, #0x2] + cmp r0, #0x0 + cmpeq r1, #0x0 + ldrne r0, _020E5614 ; =0x0000FFFF + strneh r0, [sp, #0x6] + b _020E55F4 +_020E55B4: + ldrb r0, [sp, #0x4] + cmp r0, #0x3 + moveq r0, #0x5 + streqb r0, [sp, #0x4] + beq _020E55F4 + cmp r0, #0x0 + ldrne r0, _020E5614 ; =0x0000FFFF + strneh r0, [sp, #0x6] + b _020E55F4 +_020E55D8: + ldrb r0, [sp, #0x4] + cmp r0, #0x9 + moveq r0, #0x4 + streqb r0, [sp, #0x4] + b _020E55F4 +_020E55EC: + ldr r0, _020E5614 ; =0x0000FFFF + strh r0, [sp, #0x6] +_020E55F4: + add r0, sp, #0x0 + ldmia r0, {r0-r3} + stmia lr, {r0-r3} + add r0, r12, #0x2 + add sp, sp, #0x10 + ldmia sp!, {r4-r8,pc} + .balign 4 +_020E560C: .word 0x02104544 +_020E5610: .word 0x000001FD +_020E5614: .word 0x0000FFFF + + arm_func_start long2str_wide +long2str_wide: ; 0x020E5618 + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x10 + movs r10, r0 + mov r0, #0x0 + mov r5, r1 + str r0, [sp, #0xc] + ldr r7, [sp, #0x4c] + mov r6, r0 + strh r0, [r5, #-0x2]! + ldrb r0, [sp, #0x43] + str r1, [sp, #0x0] + ldrh r8, [sp, #0x46] + str r0, [sp, #0x4] + ldr r0, [sp, #0x48] + ldrb r11, [sp, #0x41] + str r0, [sp, #0x8] + cmpeq r7, #0x0 + bne _020E568C + ldr r0, [sp, #0x4] + cmp r0, #0x0 + beq _020E5678 + cmp r8, #0x6f + beq _020E568C +_020E5678: + add sp, sp, #0x10 + mov r0, r5 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E568C: + cmp r8, #0x69 + bgt _020E56B4 + bge _020E56E8 + cmp r8, #0x58 + bgt _020E56A8 + beq _020E5714 + b _020E571C +_020E56A8: + cmp r8, #0x64 + beq _020E56E8 + b _020E571C +_020E56B4: + cmp r8, #0x6f + bgt _020E56C8 + moveq r4, #0x8 + moveq r11, #0x0 + b _020E571C +_020E56C8: + cmp r8, #0x78 + bgt _020E571C + cmp r8, #0x75 + blt _020E571C + beq _020E5708 + cmp r8, #0x78 + beq _020E5714 + b _020E571C +_020E56E8: + cmp r10, #0x0 + mov r4, #0xa + bge _020E571C + mov r0, #0x1 + cmp r10, #0x80000000 + rsbne r10, r10, #0x0 + str r0, [sp, #0xc] + b _020E571C +_020E5708: + mov r4, #0xa + mov r11, #0x0 + b _020E571C +_020E5714: + mov r4, #0x10 + mov r11, #0x0 +_020E571C: + mov r0, r10 + mov r1, r4 + bl _u32_div_f + mov r9, r1 + mov r0, r10 + mov r1, r4 + bl _u32_div_f + cmp r9, #0xa + mov r10, r0 + addlt r9, r9, #0x30 + blt _020E5754 + cmp r8, #0x78 + addeq r9, r9, #0x57 + addne r9, r9, #0x37 +_020E5754: + cmp r10, #0x0 + strh r9, [r5, #-0x2]! + add r6, r6, #0x1 + bne _020E571C + cmp r4, #0x8 + bne _020E5788 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrneh r0, [r5, #0x0] + cmpne r0, #0x30 + movne r0, #0x30 + strneh r0, [r5, #-0x2]! + addne r6, r6, #0x1 +_020E5788: + ldrb r0, [sp, #0x40] + cmp r0, #0x2 + bne _020E57BC + ldr r0, [sp, #0xc] + ldr r7, [sp, #0x8] + cmp r0, #0x0 + cmpeq r11, #0x0 + subne r7, r7, #0x1 + cmp r4, #0x10 + bne _020E57BC + ldr r0, [sp, #0x4] + cmp r0, #0x0 + subne r7, r7, #0x2 +_020E57BC: + ldr r0, [sp, #0x0] + ldr r1, _020E5864 ; =0x000001FD + sub r0, r0, r5 + add r0, r0, r0, lsr #0x1f + add r0, r7, r0, asr #0x1 + cmp r0, r1 + addgt sp, sp, #0x10 + movgt r0, #0x0 + ldmgtia sp!, {r3-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + cmp r6, r7 + bge _020E5804 + mov r0, #0x30 +_020E57F4: + add r6, r6, #0x1 + cmp r6, r7 + strh r0, [r5, #-0x2]! + blt _020E57F4 +_020E5804: + cmp r4, #0x10 + bne _020E5820 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x30 + strneh r8, [r5, #-0x2] + strneh r0, [r5, #-0x4]! +_020E5820: + ldr r0, [sp, #0xc] + cmp r0, #0x0 + movne r0, #0x2d + strneh r0, [r5, #-0x2]! + bne _020E5850 + cmp r11, #0x1 + moveq r0, #0x2b + streqh r0, [r5, #-0x2]! + beq _020E5850 + cmp r11, #0x2 + moveq r0, #0x20 + streqh r0, [r5, #-0x2]! +_020E5850: + mov r0, r5 + add sp, sp, #0x10 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E5864: .word 0x000001FD + + arm_func_start longlong2str_wide +longlong2str_wide: ; 0x020E5868 + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x18 + mov r9, r1 + mov r1, #0x0 + mov r10, r0 + mov r6, r2 + mov r0, r1 + strh r0, [r6, #-0x2]! + ldr r0, [sp, #0x58] + cmp r9, #0x0 + str r0, [sp, #0x10] + ldrb r0, [sp, #0x4f] + cmpeq r10, #0x0 + str r2, [sp, #0x0] + str r0, [sp, #0x4] + ldr r0, [sp, #0x54] + str r1, [sp, #0x14] + str r0, [sp, #0x8] + ldrb r0, [sp, #0x4d] + mov r7, r1 + ldrh r8, [sp, #0x52] + str r0, [sp, #0xc] + ldreq r0, [sp, #0x10] + cmpeq r0, #0x0 + bne _020E58F8 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + beq _020E58E4 + cmp r8, #0x6f + beq _020E58F8 +_020E58E4: + add sp, sp, #0x18 + mov r0, r6 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E58F8: + cmp r8, #0x69 + bgt _020E5920 + bge _020E5950 + cmp r8, #0x58 + bgt _020E5914 + beq _020E59A4 + b _020E59B0 +_020E5914: + cmp r8, #0x64 + beq _020E5950 + b _020E59B0 +_020E5920: + cmp r8, #0x6f + bgt _020E5930 + beq _020E5984 + b _020E59B0 +_020E5930: + cmp r8, #0x78 + bgt _020E59B0 + cmp r8, #0x75 + blt _020E59B0 + beq _020E5994 + cmp r8, #0x78 + beq _020E59A4 + b _020E59B0 +_020E5950: + subs r0, r10, #0x0 + sbcs r0, r9, #0x0 + mov r11, #0xa + mov r5, #0x0 + bge _020E59B0 + cmp r9, #0x80000000 + cmpeq r10, r5 + beq _020E5978 + rsbs r10, r10, #0x0 + rsc r9, r9, #0x0 +_020E5978: + mov r0, #0x1 + str r0, [sp, #0x14] + b _020E59B0 +_020E5984: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0x8 + b _020E59B0 +_020E5994: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0xa + b _020E59B0 +_020E59A4: + mov r5, #0x0 + str r5, [sp, #0xc] + mov r11, #0x10 +_020E59B0: + mov r0, r10 + mov r1, r9 + mov r2, r11 + mov r3, r5 + bl _ull_mod + mov r4, r0 + mov r0, r10 + mov r1, r9 + mov r2, r11 + mov r3, r5 + bl _ll_udiv + mov r10, r0 + cmp r4, #0xa + mov r9, r1 + addlt r0, r4, #0x30 + blt _020E59FC + cmp r8, #0x78 + addeq r0, r4, #0x57 + addne r0, r4, #0x37 +_020E59FC: + strh r0, [r6, #-0x2]! + mov r0, #0x0 + cmp r9, r0 + cmpeq r10, r0 + add r7, r7, #0x1 + bne _020E59B0 + cmp r5, #0x0 + cmpeq r11, #0x8 + bne _020E5A3C + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrneh r0, [r6, #0x0] + cmpne r0, #0x30 + movne r0, #0x30 + strneh r0, [r6, #-0x2]! + addne r7, r7, #0x1 +_020E5A3C: + ldrb r0, [sp, #0x4c] + cmp r0, #0x2 + bne _020E5A8C + ldr r0, [sp, #0x8] + str r0, [sp, #0x10] + ldr r0, [sp, #0x14] + cmp r0, #0x0 + ldreq r0, [sp, #0xc] + cmpeq r0, #0x0 + ldrne r0, [sp, #0x10] + subne r0, r0, #0x1 + strne r0, [sp, #0x10] + cmp r5, #0x0 + cmpeq r11, #0x10 + bne _020E5A8C + ldr r0, [sp, #0x4] + cmp r0, #0x0 + ldrne r0, [sp, #0x10] + subne r0, r0, #0x2 + strne r0, [sp, #0x10] +_020E5A8C: + ldr r0, [sp, #0x0] + ldr r2, _020E5B48 ; =0x000001FD + sub r0, r0, r6 + add r1, r0, r0, lsr #0x1f + ldr r0, [sp, #0x10] + add r0, r0, r1, asr #0x1 + cmp r0, r2 + addgt sp, sp, #0x18 + movgt r0, #0x0 + ldmgtia sp!, {r3-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + ldr r0, [sp, #0x10] + cmp r7, r0 + bge _020E5AE0 + mov r1, #0x30 +_020E5ACC: + ldr r0, [sp, #0x10] + add r7, r7, #0x1 + cmp r7, r0 + strh r1, [r6, #-0x2]! + blt _020E5ACC +_020E5AE0: + cmp r5, #0x0 + cmpeq r11, #0x10 + bne _020E5B00 + ldr r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x30 + strneh r8, [r6, #-0x2] + strneh r0, [r6, #-0x4]! +_020E5B00: + ldr r0, [sp, #0x14] + cmp r0, #0x0 + movne r0, #0x2d + strneh r0, [r6, #-0x2]! + bne _020E5B34 + ldr r0, [sp, #0xc] + cmp r0, #0x1 + moveq r0, #0x2b + streqh r0, [r6, #-0x2]! + beq _020E5B34 + cmp r0, #0x2 + moveq r0, #0x20 + streqh r0, [r6, #-0x2]! +_020E5B34: + mov r0, r6 + add sp, sp, #0x18 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E5B48: .word 0x000001FD + + arm_func_start double2hex_wide +double2hex_wide: ; 0x020E5B4C + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r10,lr} + sub sp, sp, #0x44 + ldr r7, [sp, #0x80] + ldr r0, _020E5EB8 ; =0x000001FD + mov r8, r2 + cmp r7, r0 + ldrh r6, [sp, #0x7a] + ldrb r5, [sp, #0x77] + ldrb r4, [sp, #0x75] + ldr r1, [sp, #0x68] + ldr r2, [sp, #0x6c] + addgt sp, sp, #0x44 + movgt r0, #0x0 + ldmgtia sp!, {r3-r10,lr} + addgt sp, sp, #0x10 + bxgt lr + mov r10, #0x0 + mov r9, #0x20 + add r0, sp, #0x8 + add r3, sp, #0xc + strb r10, [sp, #0x8] + strh r9, [sp, #0xa] + bl __num2dec_internal2 + ldr r0, [sp, #0x68] + ldr r1, [sp, #0x6c] + bl fabs + mov r2, r0 + mov r0, r10 + mov r3, r1 + mov r1, r0 + bl _deq + bne _020E5BF4 + sub r4, r8, #0xc + ldr r1, _020E5EBC ; =0x02106DE4 + mov r0, r4 + bl wcscpy + add sp, sp, #0x44 + mov r0, r4 + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E5BF4: + ldrb r0, [sp, #0x11] + cmp r0, #0x49 + bne _020E5C74 + ldrsb r0, [sp, #0xc] + cmp r0, #0x0 + beq _020E5C38 + cmp r6, #0x41 + sub r4, r8, #0xa + bne _020E5C28 + ldr r1, _020E5EC0 ; =0x02106DF0 + mov r0, r4 + bl wcscpy + b _020E5C60 +_020E5C28: + ldr r1, _020E5EC4 ; =0x02106DFC + mov r0, r4 + bl wcscpy + b _020E5C60 +_020E5C38: + cmp r6, #0x41 + sub r4, r8, #0x8 + bne _020E5C54 + ldr r1, _020E5EC8 ; =0x02106E08 + mov r0, r4 + bl wcscpy + b _020E5C60 +_020E5C54: + ldr r1, _020E5ECC ; =0x02106E10 + mov r0, r4 + bl wcscpy +_020E5C60: + add sp, sp, #0x44 + mov r0, r4 + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E5C74: + cmp r0, #0x4e + bne _020E5CF0 + ldrsb r0, [sp, #0xc] + cmp r0, #0x0 + beq _020E5CB4 + cmp r6, #0x41 + sub r4, r8, #0xa + bne _020E5CA4 + ldr r1, _020E5ED0 ; =0x02106E18 + mov r0, r4 + bl wcscpy + b _020E5CDC +_020E5CA4: + ldr r1, _020E5ED4 ; =0x02106E24 + mov r0, r4 + bl wcscpy + b _020E5CDC +_020E5CB4: + cmp r6, #0x41 + sub r4, r8, #0x8 + bne _020E5CD0 + ldr r1, _020E5ED8 ; =0x02106E30 + mov r0, r4 + bl wcscpy + b _020E5CDC +_020E5CD0: + ldr r1, _020E5EDC ; =0x02106E38 + mov r0, r4 + bl wcscpy +_020E5CDC: + add sp, sp, #0x44 + mov r0, r4 + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr +_020E5CF0: + mov r3, r10 + mov r1, #0x1 + mov r0, #0x64 + add r9, sp, #0x68 + strb r1, [sp, #0x34] + strb r1, [sp, #0x35] + strb r3, [sp, #0x36] + strb r3, [sp, #0x37] + strb r3, [sp, #0x38] + str r3, [sp, #0x3c] + str r1, [sp, #0x40] + strh r0, [sp, #0x3a] +_020E5D20: + rsb r1, r3, #0x7 + ldrsb r2, [r9, r3] + ldrsb r0, [r9, r1] + strb r0, [r9, r3] + add r3, r3, #0x1 + strb r2, [r9, r1] + cmp r3, #0x4 + blt _020E5D20 + ldrb r0, [sp, #0x69] + ldrb r1, [sp, #0x68] + ldr sb, _020E5EE0 ; =0x000007FF + mov r0, r0, lsl #0x11 + orr r1, r0, r1, lsl #0x19 + add r0, sp, #0x34 + and lr, r9, r1, lsr #0x15 + sub r12, sp, #0x8 + ldmia r0, {r0-r3} + stmia r12, {r0-r3} + rsb r0, r9, #0x400 + mov r1, r8 + add r0, lr, r0 + ldmia r12, {r2-r3} + bl long2str_wide + cmp r6, #0x61 + moveq r1, #0x70 + movne r1, #0x50 + strh r1, [r0, #-0x2]! + mov r1, r7, lsl #0x2 + mov lr, r7 + cmp r7, #0x1 + add r8, r1, #0xb + add r12, sp, #0x68 + blt _020E5E30 + mov r9, #0x30 +_020E5DA8: + cmp r8, #0x40 + bge _020E5E18 + ldrb r1, [r12, r8, asr #0x3] + and r2, r8, #0x7 + rsb r3, r2, #0x7 + mov r2, r1, asr r3 + sub r10, r8, #0x4 + bic r1, r8, #0x7 + bic r10, r10, #0x7 + cmp r1, r10 + add r10, r12, r8, asr #0x3 + and r1, r2, #0xff + beq _020E5DEC + ldrb r2, [r10, #-0x1] + mov r2, r2, lsl #0x8 + orr r1, r1, r2, asr r3 + and r1, r1, #0xff +_020E5DEC: + and r1, r1, #0xf + cmp r1, #0xa + addcc r1, r1, #0x30 + andcc r1, r1, #0xff + blo _020E5E1C + cmp r6, #0x61 + addeq r1, r1, #0x57 + andeq r1, r1, #0xff + addne r1, r1, #0x37 + andne r1, r1, #0xff + b _020E5E1C +_020E5E18: + mov r1, r9 +_020E5E1C: + sub lr, lr, #0x1 + cmp lr, #0x1 + strh r1, [r0, #-0x2]! + sub r8, r8, #0x4 + bge _020E5DA8 +_020E5E30: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r1, #0x2e + strneh r1, [r0, #-0x2]! + mov r1, #0x31 + strh r1, [r0, #-0x2] + cmp r6, #0x61 + moveq r1, #0x78 + movne r1, #0x58 + strh r1, [r0, #-0x4]! + mov r1, #0x30 + strh r1, [r0, #-0x2]! + ldrsb r1, [sp, #0xc] + cmp r1, #0x0 + movne r1, #0x2d + strneh r1, [r0, #-0x2]! + addne sp, sp, #0x44 + ldmneia sp!, {r3-r10,lr} + addne sp, sp, #0x10 + bxne lr + cmp r4, #0x1 + moveq r1, #0x2b + streqh r1, [r0, #-0x2]! + addeq sp, sp, #0x44 + ldmeqia sp!, {r3-r10,lr} + addeq sp, sp, #0x10 + bxeq lr + cmp r4, #0x2 + moveq r1, #0x20 + streqh r1, [r0, #-0x2]! + add sp, sp, #0x44 + ldmia sp!, {r3-r10,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E5EB8: .word 0x000001FD +_020E5EBC: .word 0x02106DE4 +_020E5EC0: .word 0x02106DF0 +_020E5EC4: .word 0x02106DFC +_020E5EC8: .word 0x02106E08 +_020E5ECC: .word 0x02106E10 +_020E5ED0: .word 0x02106E18 +_020E5ED4: .word 0x02106E24 +_020E5ED8: .word 0x02106E30 +_020E5EDC: .word 0x02106E38 +_020E5EE0: .word 0x000007FF + + arm_func_start round_decimal_wide +round_decimal_wide: ; 0x020E5EE4 + stmdb sp!, {r4,lr} + cmp r1, #0x0 + bge _020E5F0C +_020E5EF0: + mov r1, #0x0 + strh r1, [r0, #0x2] + mov r1, #0x1 + strb r1, [r0, #0x4] + mov r1, #0x30 + strb r1, [r0, #0x5] + ldmia sp!, {r4,pc} +_020E5F0C: + ldrb lr, [r0, #0x4] + cmp r1, lr + ldmgeia sp!, {r4,pc} +_020E5F18: ; 0x020E5F18 + add r12, r0, #0x5 + add r2, r12, r1 + add r2, r2, #0x1 + ldrsb r3, [r2, #-0x1]! + sub r3, r3, #0x30 + mov r3, r3, lsl #0x18 + mov r3, r3, asr #0x18 + cmp r3, #0x5 + bne _020E5F6C + add r12, r12, lr +_020E5F40: + sub r12, r12, #0x1 + cmp r12, r2 + bls _020E5F58 + ldrsb r3, [r12, #0x0] + cmp r3, #0x30 + beq _020E5F40 +_020E5F58: + cmp r12, r2 + ldreqsb r3, [r2, #-0x1] + andeq r4, r3, #0x1 + movne r4, #0x1 + b _020E5F74 +_020E5F6C: + movgt r4, #0x1 + movle r4, #0x0 +_020E5F74: + cmp r1, #0x0 + beq _020E5FD0 + mov r12, #0x0 + mov lr, #0x1 +_020E5F84: + ldrsb r3, [r2, #-0x1]! + sub r3, r3, #0x30 + add r3, r3, r4 + mov r3, r3, lsl #0x18 + mov r3, r3, asr #0x18 + cmp r3, #0x9 + movgt r4, lr + movle r4, r12 + cmp r4, #0x0 + bne _020E5FB4 + cmp r3, #0x0 + bne _020E5FBC +_020E5FB4: + sub r1, r1, #0x1 + b _020E5FC8 +_020E5FBC: + add r3, r3, #0x30 + strb r3, [r2, #0x0] + b _020E5FD0 +_020E5FC8: + cmp r1, #0x0 + bne _020E5F84 +_020E5FD0: + cmp r4, #0x0 + beq _020E5FF8 + ldrsh r3, [r0, #0x2] + mov r2, #0x1 + mov r1, #0x31 + add r3, r3, #0x1 + strh r3, [r0, #0x2] + strb r2, [r0, #0x4] + strb r1, [r0, #0x5] + ldmia sp!, {r4,pc} +_020E5FF8: + cmp r1, #0x0 + beq _020E5EF0 + strb r1, [r0, #0x4] + ldmia sp!, {r4,pc} + + arm_func_start float2str_wide +float2str_wide: ; 0x020E6008 + stmdb sp!, {r0-r3} + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0x22c + mov r10, r0 + add r0, sp, #0x250 + ldr r7, [sp, #0x268] + ldr r3, _020E6628 ; =0x000001FD + ldrh r6, [r0, #0x12] + cmp r7, r3 + ldrb r5, [sp, #0x25f] + ldrb r4, [sp, #0x25d] + mov r8, r1 + mov r9, r2 + addgt sp, sp, #0x22c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + mov r12, #0x0 + mov r11, #0x20 + add r0, sp, #0x0 + add r3, sp, #0x4 + mov r1, r10 + mov r2, r8 + strb r12, [sp, #0x0] + strh r11, [sp, #0x2] + bl __num2dec_internal2 + ldrb r0, [sp, #0x8] + add r1, sp, #0x9 + add r0, r1, r0 + b _020E609C +_020E6084: + ldrb r2, [sp, #0x8] + ldrsh r1, [sp, #0x6] + sub r2, r2, #0x1 + add r1, r1, #0x1 + strb r2, [sp, #0x8] + strh r1, [sp, #0x6] +_020E609C: + ldrb r1, [sp, #0x8] + cmp r1, #0x1 + bls _020E60B4 + ldrsb r1, [r0, #-0x1]! + cmp r1, #0x30 + beq _020E6084 +_020E60B4: + ldrb r0, [sp, #0x9] + cmp r0, #0x30 + beq _020E60D4 + cmp r0, #0x49 + beq _020E60E0 + cmp r0, #0x4e + beq _020E6198 + b _020E6244 +_020E60D4: + mov r0, #0x0 + strh r0, [sp, #0x6] + b _020E6244 +_020E60E0: + mov r2, #0x0 + mov r0, r10 + mov r1, r8 + mov r3, r2 + bl _dls + bhs _020E6140 + cmp r6, #0x80 + sub r4, r9, #0xa + movcs r0, #0x0 + bhs _020E6118 + ldr r0, _020E662C ; =0x02104544 + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x200 +_020E6118: + cmp r0, #0x0 + beq _020E6130 + ldr r1, _020E6630 ; =0x02106DF0 + mov r0, r4 + bl wcscpy + b _020E6184 +_020E6130: + ldr r1, _020E6634 ; =0x02106DFC + mov r0, r4 + bl wcscpy + b _020E6184 +_020E6140: + cmp r6, #0x80 + sub r4, r9, #0x8 + movcs r0, #0x0 + bhs _020E6160 + ldr r0, _020E662C ; =0x02104544 + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x200 +_020E6160: + cmp r0, #0x0 + beq _020E6178 + ldr r1, _020E6638 ; =0x02106E08 + mov r0, r4 + bl wcscpy + b _020E6184 +_020E6178: + ldr r1, _020E663C ; =0x02106E10 + mov r0, r4 + bl wcscpy +_020E6184: + add sp, sp, #0x22c + mov r0, r4 + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E6198: + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + beq _020E61EC + cmp r6, #0x80 + sub r4, r9, #0xa + movcs r0, #0x0 + bhs _020E61C4 + ldr r0, _020E662C ; =0x02104544 + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x200 +_020E61C4: + cmp r0, #0x0 + beq _020E61DC + ldr r1, _020E6640 ; =0x02106E18 + mov r0, r4 + bl wcscpy + b _020E6230 +_020E61DC: + ldr r1, _020E6644 ; =0x02106E24 + mov r0, r4 + bl wcscpy + b _020E6230 +_020E61EC: + cmp r6, #0x80 + sub r4, r9, #0x8 + movcs r0, #0x0 + bhs _020E620C + ldr r0, _020E662C ; =0x02104544 + mov r1, r6, lsl #0x1 + ldrh r0, [r0, r1] + and r0, r0, #0x200 +_020E620C: + cmp r0, #0x0 + beq _020E6224 + ldr r1, _020E6648 ; =0x02106E30 + mov r0, r4 + bl wcscpy + b _020E6230 +_020E6224: + ldr r1, _020E664C ; =0x02106E38 + mov r0, r4 + bl wcscpy +_020E6230: + add sp, sp, #0x22c + mov r0, r4 + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr +_020E6244: + ldrb r1, [sp, #0x8] + ldrsh r2, [sp, #0x6] + add r0, sp, #0x200 + sub r1, r1, #0x1 + add r0, r0, #0x2a + add r1, r2, r1 + sub r8, r0, #0x1 + strh r1, [sp, #0x6] + mov r0, #0x0 + strb r0, [r8, #0x0] + cmp r6, #0x65 + bgt _020E62A0 + bge _020E632C + cmp r6, #0x47 + bgt _020E65EC + cmp r6, #0x45 + blt _020E65EC + beq _020E632C + cmp r6, #0x46 + beq _020E6478 + cmp r6, #0x47 + beq _020E62B8 + b _020E65EC +_020E62A0: + cmp r6, #0x66 + bgt _020E62B0 + beq _020E6478 + b _020E65EC +_020E62B0: + cmp r6, #0x67 + bne _020E65EC +_020E62B8: + ldrb r0, [sp, #0x8] + cmp r0, r7 + ble _020E62D0 + add r0, sp, #0x4 + mov r1, r7 + bl round_decimal_wide +_020E62D0: + ldrsh r2, [sp, #0x6] + mvn r0, #0x3 + cmp r2, r0 + blt _020E62E8 + cmp r2, r7 + blt _020E6308 +_020E62E8: + cmp r5, #0x0 + ldreqb r0, [sp, #0x8] + subne r7, r7, #0x1 + subeq r7, r0, #0x1 + cmp r6, #0x67 + moveq r6, #0x65 + movne r6, #0x45 + b _020E632C +_020E6308: + cmp r5, #0x0 + addne r0, r2, #0x1 + subne r7, r7, r0 + bne _020E6478 + ldrb r1, [sp, #0x8] + add r0, r2, #0x1 + subs r7, r1, r0 + movmi r7, #0x0 + b _020E6478 +_020E632C: + ldrb r0, [sp, #0x8] + add r1, r7, #0x1 + cmp r0, r1 + ble _020E6344 + add r0, sp, #0x4 + bl round_decimal_wide +_020E6344: + ldrsh lr, [sp, #0x6] + mov r11, #0x2b + mov r10, #0x0 + cmp lr, #0x0 + rsblt lr, lr, #0x0 + movlt r11, #0x2d + ldr r3, _020E6650 ; =0x66666667 + mov r0, #0xa + b _020E6398 +_020E6368: + mov r1, lr, lsr #0x1f + smull r2, r12, r3, lr + add r12, r1, r12, asr #0x2 + smull r1, r2, r0, r12 + sub r12, lr, r1 + add r1, r12, #0x30 + strb r1, [r8, #-0x1]! + mov r2, lr + smull r1, lr, r3, r2 + mov r1, r2, lsr #0x1f + add lr, r1, lr, asr #0x2 + add r10, r10, #0x1 +_020E6398: + cmp lr, #0x0 + bne _020E6368 + cmp r10, #0x2 + blt _020E6368 + add r0, sp, #0x2a + strb r11, [r8, #-0x1] + strb r6, [r8, #-0x2]! + sub r1, r0, r8 + ldr r0, _020E6628 ; =0x000001FD + add r1, r1, r7 + cmp r1, r0 + addgt sp, sp, #0x22c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + ldrb r1, [sp, #0x8] + add r0, r7, #0x1 + cmp r1, r0 + bge _020E6408 + add r0, r7, #0x2 + sub r0, r0, r1 + subs r1, r0, #0x1 + beq _020E6408 + mov r0, #0x30 +_020E63FC: + strb r0, [r8, #-0x1]! + subs r1, r1, #0x1 + bne _020E63FC +_020E6408: + ldrb r1, [sp, #0x8] + add r0, sp, #0x9 + add r2, r0, r1 + subs r1, r1, #0x1 + beq _020E642C +_020E641C: + ldrsb r0, [r2, #-0x1]! + subs r1, r1, #0x1 + strb r0, [r8, #-0x1]! + bne _020E641C +_020E642C: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r0, #0x2e + strneb r0, [r8, #-0x1]! + ldrb r0, [sp, #0x9] + strb r0, [r8, #-0x1]! + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r8, #-0x1]! + bne _020E65EC + cmp r4, #0x1 + moveq r0, #0x2b + streqb r0, [r8, #-0x1]! + beq _020E65EC + cmp r4, #0x2 + moveq r0, #0x20 + streqb r0, [r8, #-0x1]! + b _020E65EC +_020E6478: + ldrsh r3, [sp, #0x6] + ldrb r2, [sp, #0x8] + sub r0, r2, r3 + subs r1, r0, #0x1 + movmi r1, #0x0 + cmp r1, r7 + ble _020E64B8 + sub r1, r1, r7 + add r0, sp, #0x4 + sub r1, r2, r1 + bl round_decimal_wide + ldrsh r3, [sp, #0x6] + ldrb r2, [sp, #0x8] + sub r0, r2, r3 + subs r1, r0, #0x1 + movmi r1, #0x0 +_020E64B8: + adds r0, r3, #0x1 + movmi r0, #0x0 + ldr r3, _020E6628 ; =0x000001FD + add r6, r0, r1 + cmp r6, r3 + addgt sp, sp, #0x22c + movgt r0, #0x0 + ldmgtia sp!, {r4-r11,lr} + addgt sp, sp, #0x10 + bxgt lr + add r3, sp, #0x9 + sub r6, r7, r1 + cmp r6, #0x0 + add r2, r3, r2 + mov r10, #0x0 + ble _020E650C + mov r3, #0x30 +_020E64FC: + add r10, r10, #0x1 + cmp r10, r6 + strb r3, [r8, #-0x1]! + blt _020E64FC +_020E650C: + mov r6, #0x0 + b _020E6520 +_020E6514: + ldrsb r3, [r2, #-0x1]! + add r6, r6, #0x1 + strb r3, [r8, #-0x1]! +_020E6520: + cmp r6, r1 + ldrltb r3, [sp, #0x8] + cmplt r6, r3 + blt _020E6514 + cmp r6, r1 + bge _020E654C + mov r3, #0x30 +_020E653C: + add r6, r6, #0x1 + cmp r6, r1 + strb r3, [r8, #-0x1]! + blt _020E653C +_020E654C: + cmp r7, #0x0 + cmpeq r5, #0x0 + movne r1, #0x2e + strneb r1, [r8, #-0x1]! + cmp r0, #0x0 + beq _020E65B4 + ldrb r1, [sp, #0x8] + mov r5, #0x0 + sub r1, r0, r1 + cmp r1, #0x0 + ble _020E6594 + mov r3, #0x30 +_020E657C: + strb r3, [r8, #-0x1]! + ldrb r1, [sp, #0x8] + add r5, r5, #0x1 + sub r1, r0, r1 + cmp r5, r1 + blt _020E657C +_020E6594: + cmp r5, r0 + bge _020E65BC +_020E659C: + ldrsb r1, [r2, #-0x1]! + add r5, r5, #0x1 + cmp r5, r0 + strb r1, [r8, #-0x1]! + blt _020E659C + b _020E65BC +_020E65B4: + mov r0, #0x30 + strb r0, [r8, #-0x1]! +_020E65BC: + ldrsb r0, [sp, #0x4] + cmp r0, #0x0 + movne r0, #0x2d + strneb r0, [r8, #-0x1]! + bne _020E65EC + cmp r4, #0x1 + moveq r0, #0x2b + streqb r0, [r8, #-0x1]! + beq _020E65EC + cmp r4, #0x2 + moveq r0, #0x20 + streqb r0, [r8, #-0x1]! +_020E65EC: + mov r0, r8 + bl strlen + sub r1, r9, r0, lsl #0x1 + mov r0, r8 + sub r4, r1, #0x2 + bl strlen + mov r2, r0 + mov r0, r4 + mov r1, r8 + bl mbstowcs + mov r0, r4 + add sp, sp, #0x22c + ldmia sp!, {r4-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E6628: .word 0x000001FD +_020E662C: .word 0x02104544 +_020E6630: .word 0x02106DF0 +_020E6634: .word 0x02106DFC +_020E6638: .word 0x02106E08 +_020E663C: .word 0x02106E10 +_020E6640: .word 0x02106E18 +_020E6644: .word 0x02106E24 +_020E6648: .word 0x02106E30 +_020E664C: .word 0x02106E38 +_020E6650: .word 0x66666667 + + arm_func_start __wpformatter +__wpformatter: + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x430 + mov r3, #0x20 + mov r11, r2 + strh r3, [sp, #0x1c] + ldrh r2, [r11, #0x0] + mov r9, r0 + mov r8, r1 + cmp r2, #0x0 + mov r4, #0x0 + beq _020E6F24 +_020E6684: + mov r0, r11 + mov r1, #0x25 + bl wcschr + str r0, [sp, #0xc] + cmp r0, #0x0 + bne _020E66D8 + mov r0, r11 + bl wcslen + movs r2, r0 + add r4, r4, r2 + beq _020E6F24 + mov r0, r8 + mov r1, r11 + blx r9 + cmp r0, #0x0 + bne _020E6F24 + add sp, sp, #0x430 + mvn r0, #0x0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E66D8: + sub r0, r0, r11 + add r0, r0, r0, lsr #0x1f + movs r2, r0, asr #0x1 + add r4, r4, r2 + beq _020E6710 + mov r0, r8 + mov r1, r11 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E6710: + add r1, sp, #0x400 + ldr r0, [sp, #0xc] + add r1, r1, #0x64 + add r2, sp, #0x20 + bl parse_format_wprintf + ldrh r1, [sp, #0x26] + mov r11, r0 + cmp r1, #0x61 + bgt _020E6780 + bge _020E6AEC + cmp r1, #0x47 + bgt _020E6774 + subs r0, r1, #0x41 + addpl pc, pc, r0, lsl #0x2 + b _020E6768 +_020E674C: ; 0x020E674C + b _020E6AEC +_020E6750: ; 0x020E6750 + b _020E6D90 +_020E6754: ; 0x020E6754 + b _020E6D90 +_020E6758: ; 0x020E6758 + b _020E6D90 +_020E675C: ; 0x020E675C + b _020E6A7C +_020E6760: ; 0x020E6760 + b _020E6A7C +_020E6764: ; 0x020E6764 + b _020E6A7C +_020E6768: + cmp r1, #0x25 + beq _020E6D7C + b _020E6D90 +_020E6774: + cmp r1, #0x58 + beq _020E6940 + b _020E6D90 +_020E6780: + cmp r1, #0x75 + bgt _020E67E8 + subs r0, r1, #0x64 + addpl pc, pc, r0, lsl #0x2 + b _020E67DC +_020E6794: ; 0x020E6794 + b _020E6804 +_020E6798: ; 0x020E6798 + b _020E6A7C +_020E679C: ; 0x020E679C + b _020E6A7C +_020E67A0: ; 0x020E67A0 + b _020E6A7C +_020E67A4: ; 0x020E67A4 + b _020E6D90 +_020E67A8: ; 0x020E67A8 + b _020E6804 +_020E67AC: ; 0x020E67AC + b _020E6D90 +_020E67B0: ; 0x020E67B0 + b _020E6D90 +_020E67B4: ; 0x020E67B4 + b _020E6D90 +_020E67B8: ; 0x020E67B8 + b _020E6D90 +_020E67BC: ; 0x020E67BC + b _020E6C98 +_020E67C0: ; 0x020E67C0 + b _020E6940 +_020E67C4: ; 0x020E67C4 + b _020E6D90 +_020E67C8: ; 0x020E67C8 + b _020E6D90 +_020E67CC: ; 0x020E67CC + b _020E6D90 +_020E67D0: ; 0x020E67D0 + b _020E6B5C +_020E67D4: ; 0x020E67D4 + b _020E6D90 +_020E67D8: ; 0x020E67D8 + b _020E6940 +_020E67DC: + cmp r1, #0x63 + beq _020E6D24 + b _020E6D90 +_020E67E8: + cmp r1, #0x78 + bgt _020E67F8 + beq _020E6940 + b _020E6D90 +_020E67F8: + ldr r0, _020E6F38 ; =0x0000FFFF + cmp r1, r0 + b _020E6D90 +_020E6804: + ldrb r0, [sp, #0x24] + cmp r0, #0x3 + bne _020E6824 + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E68BC +_020E6824: + cmp r0, #0x4 + bne _020E684C + ldr r1, [sp, #0x464] + add r2, r1, #0x8 + str r2, [sp, #0x464] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E68BC +_020E684C: + cmp r0, #0x6 + bne _020E6874 + ldr r1, [sp, #0x464] + add r2, r1, #0x8 + str r2, [sp, #0x464] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E68BC +_020E6874: + cmp r0, #0x7 + bne _020E6890 + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E68BC +_020E6890: + cmp r0, #0x8 + bne _020E68AC + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E68BC +_020E68AC: + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] +_020E68BC: + cmp r0, #0x2 + moveq r1, r10, lsl #0x10 + moveq r10, r1, asr #0x10 + cmp r0, #0x4 + cmpne r0, #0x6 + add r0, sp, #0x20 + bne _020E6904 + sub r5, sp, #0x4 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + ldr r3, [r5, #0x0] + ldr r0, [sp, #0x10] + ldr r1, [sp, #0x14] + add r2, sp, #0x430 + bl longlong2str_wide + movs r6, r0 + beq _020E6D90 + b _020E6928 +_020E6904: + sub r5, sp, #0x8 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + add r1, sp, #0x430 + mov r0, r10 + ldmia r5, {r2-r3} + bl long2str_wide + movs r6, r0 + beq _020E6D90 +_020E6928: + add r0, sp, #0x400 + add r0, r0, #0x2e + sub r0, r0, r6 + add r0, r0, r0, lsr #0x1f + mov r7, r0, asr #0x1 + b _020E6DDC +_020E6940: + ldrb r0, [sp, #0x24] + cmp r0, #0x3 + bne _020E6960 + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E69F8 +_020E6960: + cmp r0, #0x4 + bne _020E6988 + ldr r1, [sp, #0x464] + add r2, r1, #0x8 + str r2, [sp, #0x464] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E69F8 +_020E6988: + cmp r0, #0x6 + bne _020E69B0 + ldr r1, [sp, #0x464] + add r2, r1, #0x8 + str r2, [sp, #0x464] + ldr r1, [r2, #-0x8] + str r1, [sp, #0x10] + ldr r1, [r2, #-0x4] + str r1, [sp, #0x14] + b _020E69F8 +_020E69B0: + cmp r0, #0x7 + bne _020E69CC + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E69F8 +_020E69CC: + cmp r0, #0x8 + bne _020E69E8 + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] + b _020E69F8 +_020E69E8: + ldr r1, [sp, #0x464] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r10, [r1, #-0x4] +_020E69F8: + cmp r0, #0x2 + moveq r1, r10, lsl #0x10 + moveq r10, r1, lsr #0x10 + cmp r0, #0x4 + cmpne r0, #0x6 + add r0, sp, #0x20 + bne _020E6A40 + sub r5, sp, #0x4 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + ldr r3, [r5, #0x0] + ldr r0, [sp, #0x10] + ldr r1, [sp, #0x14] + add r2, sp, #0x430 + bl longlong2str_wide + movs r6, r0 + beq _020E6D90 + b _020E6A64 +_020E6A40: + sub r5, sp, #0x8 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + add r1, sp, #0x430 + mov r0, r10 + ldmia r5, {r2-r3} + bl long2str_wide + movs r6, r0 + beq _020E6D90 +_020E6A64: + add r0, sp, #0x400 + add r0, r0, #0x2e + sub r0, r0, r6 + add r0, r0, r0, lsr #0x1f + mov r7, r0, asr #0x1 + b _020E6DDC +_020E6A7C: + ldrb r0, [sp, #0x24] + cmp r0, #0x9 + ldrne r0, [sp, #0x464] + addne r0, r0, #0x8 + strne r0, [sp, #0x464] + bne _020E6AA0 + ldr r0, [sp, #0x464] + add r0, r0, #0x8 + str r0, [sp, #0x464] +_020E6AA0: + ldr r7, [r0, #-0x8] + ldr r6, [r0, #-0x4] + add r0, sp, #0x20 + sub r5, sp, #0x4 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + ldr r3, [r5, #0x0] + mov r0, r7 + mov r1, r6 + add r2, sp, #0x430 + bl float2str_wide + movs r6, r0 + beq _020E6D90 + add r0, sp, #0x400 + add r0, r0, #0x2e + sub r0, r0, r6 + add r0, r0, r0, lsr #0x1f + mov r7, r0, asr #0x1 + b _020E6DDC +_020E6AEC: + ldrb r0, [sp, #0x24] + cmp r0, #0x9 + ldrne r0, [sp, #0x464] + addne r0, r0, #0x8 + strne r0, [sp, #0x464] + bne _020E6B10 + ldr r0, [sp, #0x464] + add r0, r0, #0x8 + str r0, [sp, #0x464] +_020E6B10: + ldr r7, [r0, #-0x8] + ldr r6, [r0, #-0x4] + add r0, sp, #0x20 + sub r5, sp, #0x4 + ldmia r0, {r0-r3} + stmia r5, {r0-r3} + ldr r3, [r5, #0x0] + mov r0, r7 + mov r1, r6 + add r2, sp, #0x430 + bl double2hex_wide + movs r6, r0 + beq _020E6D90 + add r0, sp, #0x400 + add r0, r0, #0x2e + sub r0, r0, r6 + add r0, r0, r0, lsr #0x1f + mov r7, r0, asr #0x1 + b _020E6DDC +_020E6B5C: + ldrb r0, [sp, #0x24] + cmp r0, #0x5 + bne _020E6BF8 + ldr r0, [sp, #0x464] + add r0, r0, #0x4 + str r0, [sp, #0x464] + ldr r6, [r0, #-0x4] + ldrb r0, [sp, #0x23] + cmp r6, #0x0 + ldreq r6, _020E6F3C ; =0x02106E40 + cmp r0, #0x0 + beq _020E6BB0 + ldrh r1, [r6], #0x2 + ldrb r0, [sp, #0x22] + and r7, r1, #0xff + cmp r0, #0x0 + beq _020E6DDC + ldr r0, [sp, #0x2c] + cmp r7, r0 + movgt r7, r0 + b _020E6DDC +_020E6BB0: + ldrb r0, [sp, #0x22] + cmp r0, #0x0 + beq _020E6BE8 + ldr r7, [sp, #0x2c] + mov r0, r6 + mov r2, r7 + mov r1, #0x0 + bl wmemchr +_020E6BD0: ; 0x020E6BD0 + cmp r0, #0x0 + beq _020E6DDC + sub r0, r0, r6 + add r0, r0, r0, lsr #0x1f + mov r7, r0, asr #0x1 + b _020E6DDC +_020E6BE8: + mov r0, r6 + bl wcslen + mov r7, r0 + b _020E6DDC +_020E6BF8: + ldr r0, [sp, #0x464] + add r0, r0, #0x4 + str r0, [sp, #0x464] + ldr r5, [r0, #-0x4] + ldrb r0, [sp, #0x23] + cmp r5, #0x0 + ldreq r5, _020E6F40 ; =0x02106E44 + cmp r0, #0x0 + beq _020E6C40 + ldrh r1, [r6, #0x0] + ldrb r0, [sp, #0x22] + and r6, r1, #0xff + cmp r0, #0x0 + beq _020E6C78 + ldr r0, [sp, #0x2c] + cmp r6, r0 + movgt r6, r0 + b _020E6C78 +_020E6C40: + ldrb r0, [sp, #0x22] + cmp r0, #0x0 + beq _020E6C6C + ldr r6, [sp, #0x2c] + mov r0, r5 + mov r2, r6 + mov r1, #0x0 + bl memchr +_020E6C60: ; 0x020E6C60 + cmp r0, #0x0 + subne r6, r0, r5 + b _020E6C78 +_020E6C6C: + mov r0, r5 + bl strlen + mov r6, r0 +_020E6C78: + add r0, sp, #0x30 + mov r1, r5 + mov r2, r6 + bl mbstowcs + movs r7, r0 + bmi _020E6D90 + add r6, sp, #0x30 + b _020E6DDC +_020E6C98: + ldr r1, [sp, #0x464] + ldrb r0, [sp, #0x24] + add r1, r1, #0x4 + str r1, [sp, #0x464] + ldr r6, [r1, #-0x4] + cmp r0, #0x8 + addls pc, pc, r0, lsl #0x2 + b _020E6F18 +_020E6CB8: + b _020E6CDC +_020E6CBC: + b _020E6F18 +_020E6CC0: + b _020E6CE4 +_020E6CC4: + b _020E6CEC +_020E6CC8: + b _020E6D14 +_020E6CCC: + b _020E6F18 +_020E6CD0: + b _020E6CF4 +_020E6CD4: + b _020E6D04 +_020E6CD8: + b _020E6D0C +_020E6CDC: + str r4, [r6, #0x0] + b _020E6F18 +_020E6CE4: + strh r4, [r6, #0x0] + b _020E6F18 +_020E6CEC: + str r4, [r6, #0x0] + b _020E6F18 +_020E6CF4: + str r4, [r6, #0x0] + mov r0, r4, asr #0x1f + str r0, [r6, #0x4] + b _020E6F18 +_020E6D04: + str r4, [r6, #0x0] + b _020E6F18 +_020E6D0C: + str r4, [r6, #0x0] + b _020E6F18 +_020E6D14: + str r4, [r6, #0x0] + mov r0, r4, asr #0x1f + str r0, [r6, #0x4] + b _020E6F18 +_020E6D24: + ldrb r0, [sp, #0x24] + add r6, sp, #0x30 + cmp r0, #0x5 + bne _020E6D50 + ldr r0, [sp, #0x464] + mov r7, #0x1 + add r0, r0, #0x4 + str r0, [sp, #0x464] + ldr r0, [r0, #-0x4] + strh r0, [r6, #0x0] + b _020E6DDC +_020E6D50: + ldr r0, [sp, #0x464] + add r1, sp, #0x18 + add r0, r0, #0x4 + str r0, [sp, #0x464] + ldr r3, [r0, #-0x4] + mov r0, r6 + mov r2, #0x1 + strb r3, [sp, #0x18] + bl mbtowc + mov r7, r0 + b _020E6DDC +_020E6D7C: + mov r0, #0x25 + strh r0, [sp, #0x30] + add r6, sp, #0x30 + mov r7, #0x1 + b _020E6DDC +_020E6D90: + ldr r0, [sp, #0xc] + bl wcslen + movs r5, r0 + beq _020E6DC8 + ldr r1, [sp, #0xc] + mov r0, r8 + mov r2, r5 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E6DC8: + add sp, sp, #0x430 + add r0, r4, r5 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E6DDC: + ldrb r0, [sp, #0x20] + mov r5, r7 + cmp r0, #0x0 + beq _020E6E8C + cmp r0, #0x2 + moveq r1, #0x30 + movne r1, #0x20 + strh r1, [sp, #0x1c] + ldrh r0, [r6, #0x0] + cmp r0, #0x2b + cmpne r0, #0x2d + cmpne r0, #0x20 + bne _020E6E48 + cmp r1, #0x30 + bne _020E6E48 + mov r0, r8 + mov r1, r6 + mov r2, #0x1 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + add r6, r6, #0x2 + sub r7, r7, #0x1 +_020E6E48: + ldr r0, [sp, #0x28] + cmp r5, r0 + bge _020E6E8C +_020E6E54: + mov r0, r8 + add r1, sp, #0x1c + mov r2, #0x1 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r0, [sp, #0x28] + add r5, r5, #0x1 + cmp r5, r0 + blt _020E6E54 +_020E6E8C: + cmp r7, #0x0 + beq _020E6EBC + mov r0, r8 + mov r1, r6 + mov r2, r7 + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr +_020E6EBC: + ldrb r0, [sp, #0x20] + cmp r0, #0x0 + bne _020E6F14 + ldr r0, [sp, #0x28] + cmp r5, r0 + bge _020E6F14 + mov r7, #0x20 +_020E6ED8: + mov r0, r8 + add r1, sp, #0x1a + mov r2, #0x1 + strh r7, [sp, #0x1a] + blx r9 + cmp r0, #0x0 + addeq sp, sp, #0x430 + mvneq r0, #0x0 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r0, [sp, #0x28] + add r5, r5, #0x1 + cmp r5, r0 + blt _020E6ED8 +_020E6F14: + add r4, r4, r5 +_020E6F18: + ldrh r0, [r11, #0x0] + cmp r0, #0x0 + bne _020E6684 +_020E6F24: + mov r0, r4 + add sp, sp, #0x430 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E6F38: .word 0x0000FFFF +_020E6F3C: .word 0x02106E40 +_020E6F40: .word 0x02106E44 + + arm_func_start __wStringWrite +__wStringWrite: ; 0x020E6F44 + stmdb sp!, {r3-r5,lr} + mov r4, r0 + ldr r3, [r4, #0x8] + mov r5, r2 + ldr r2, [r4, #0x4] + add r0, r3, r5 + cmp r0, r2 + ldr r0, [r4, #0x0] + subhi r5, r2, r3 + mov r2, r5 + add r0, r0, r3, lsl #0x1 + bl wmemcpy + ldr r1, [r4, #0x8] + add r1, r1, r5 + str r1, [r4, #0x8] + ldmia sp!, {r3-r5,pc} + + arm_func_start swprintf +swprintf: ; 0x020E6F84 + stmdb sp!, {r0-r3} + stmdb sp!, {r3,lr} + add r3, sp, #0x10 + bic r3, r3, #0x3 + ldr r2, [sp, #0x10] + add r3, r3, #0x4 + bl vswprintf + ldmia sp!, {r3,lr} + add sp, sp, #0x10 + bx lr + + arm_func_start vswprintf +vswprintf: ; 0x020E6FAC + stmdb sp!, {r4-r5,lr} + sub sp, sp, #0xc + mov r5, r0 + mov r4, r1 + mov r12, #0x0 + ldr r0, _020E7018 ; =__wStringWrite + add r1, sp, #0x0 + str r5, [sp, #0x0] + str r4, [sp, #0x4] + str r12, [sp, #0x8] + bl __wpformatter +_020E6FD8: ; 0x020E6FD8 + cmp r0, #0x0 + addlt sp, sp, #0xc + ldmltia sp!, {r4-r5,pc} +_020E6FE4: ; 0x020E6FE4 + cmp r0, r4 + bhs _020E7000 + mov r1, r0, lsl #0x1 + mov r2, #0x0 + add sp, sp, #0xc + strh r2, [r5, r1] + ldmia sp!, {r4-r5,pc} +_020E7000: + mov r1, #0x0 + add r0, r5, r4, lsl #0x1 + strh r1, [r0, #-0x2] + sub r0, r1, #0x1 + add sp, sp, #0xc + ldmia sp!, {r4-r5,pc} + .balign 4 +_020E7018: .word __wStringWrite + + arm_func_start wcslen +wcslen: ; 0x020E701C + mvn r2, #0x0 +_020E7020: + ldrh r1, [r0], #0x2 + add r2, r2, #0x1 + cmp r1, #0x0 + bne _020E7020 + mov r0, r2 + bx lr + + arm_func_start wcscpy +wcscpy: ; 0x020E7038 + mov r3, r0 +_020E703C: + ldrh r2, [r1], #0x2 + mov r12, r3 + strh r2, [r3], #0x2 + ldrh r2, [r12, #0x0] + cmp r2, #0x0 + bne _020E703C + bx lr + + arm_func_start wcschr +wcschr: ; 0x020E7058 + ldrh r2, [r0], #0x2 + cmp r2, #0x0 + beq _020E707C +_020E7064: + cmp r2, r1 + subeq r0, r0, #0x2 + bxeq lr + ldrh r2, [r0], #0x2 + cmp r2, #0x0 + bne _020E7064 +_020E707C: + cmp r1, #0x0 + movne r0, #0x0 + subeq r0, r0, #0x2 + bx lr + + arm_func_start __ieee754_pow +__ieee754_pow: ; 0x020E708C + stmdb sp!, {r0-r3} + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x80 + ldr r8, [sp, #0xb4] + ldr r6, [sp, #0xac] + ldr r0, [sp, #0xb0] + bic r9, r8, #0x80000000 + orrs r1, r9, r0 + ldr r7, [sp, #0xa8] + bic r4, r6, #0x80000000 + addeq sp, sp, #0x80 + moveq r0, #0x0 + ldreq r1, _020E7638 ; =0x3FF00000 + ldmeqia sp!, {r3-r11,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r1, _020E763C ; =0x7FF00000 + cmp r4, r1 + bgt _020E70FC + bne _020E70E4 + cmp r7, #0x0 + bne _020E70FC +_020E70E4: + ldr r1, _020E763C ; =0x7FF00000 + cmp r9, r1 + bgt _020E70FC + bne _020E7120 + cmp r0, #0x0 + beq _020E7120 +_020E70FC: + ldr r0, [sp, #0xa8] + ldr r1, [sp, #0xac] + ldr r2, [sp, #0xb0] + ldr r3, [sp, #0xb4] + bl _dadd + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7120: + cmp r6, #0x0 + mov r5, #0x0 + bge _020E7188 + ldr r1, _020E7640 ; =0x43400000 + cmp r9, r1 + movge r5, #0x2 + bge _020E7188 + sub r1, r1, #0x3500000 + cmp r9, r1 + blt _020E7188 + ldr r1, _020E7644 ; =0xFFFFFC01 + add r1, r1, r9, asr #0x14 + cmp r1, #0x14 + ble _020E7170 + rsb r2, r1, #0x34 + mov r1, r0, lsr r2 + cmp r0, r1, lsl r2 + andeq r1, r1, #0x1 + rsbeq r5, r1, #0x2 + b _020E7188 +_020E7170: + cmp r0, #0x0 + rsbeq r2, r1, #0x14 + moveq r1, r9, asr r2 + cmpeq r9, r1, lsl r2 + andeq r1, r1, #0x1 + rsbeq r5, r1, #0x2 +_020E7188: + cmp r0, #0x0 + bne _020E72E4 + ldr r1, _020E763C ; =0x7FF00000 + cmp r9, r1 + bne _020E723C + add r0, r4, #0x100000 + add r0, r0, #0xc0000000 + orrs r0, r0, r7 + bne _020E71D0 + ldr r0, [sp, #0xb0] + ldr r1, [sp, #0xb4] + mov r2, r0 + mov r3, r1 + bl _dsub + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E71D0: + sub r0, r1, #0x40000000 + cmp r4, r0 + blt _020E7200 + cmp r8, #0x0 + ldrge r0, [sp, #0xb0] + ldrge r1, [sp, #0xb4] + movlt r0, #0x0 + add sp, sp, #0x80 + movlt r1, r0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7200: + cmp r8, #0x0 + mov r0, #0x0 + addge sp, sp, #0x80 + movge r1, r0 + ldmgeia sp!, {r3-r11,lr} + addge sp, sp, #0x10 + bxge lr + ldr r2, [sp, #0xb0] + ldr r3, [sp, #0xb4] + mov r1, r0 + bl _dsub + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E723C: + sub r0, r1, #0x40000000 + cmp r9, r0 + bne _020E7288 + cmp r8, #0x0 + ldrge r0, [sp, #0xa8] + ldrge r1, [sp, #0xac] + addge sp, sp, #0x80 + ldmgeia sp!, {r3-r11,lr} + addge sp, sp, #0x10 + bxge lr + ldr r2, [sp, #0xa8] + ldr r3, [sp, #0xac] + sub r1, r1, #0x40000000 + mov r0, #0x0 + bl _ddiv + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7288: + cmp r8, #0x40000000 + bne _020E72B4 + ldr r0, [sp, #0xa8] + ldr r1, [sp, #0xac] + mov r2, r0 + mov r3, r1 + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E72B4: + ldr r0, _020E7648 ; =0x3FE00000 + cmp r8, r0 + bne _020E72E4 + cmp r6, #0x0 + blt _020E72E4 + ldr r0, [sp, #0xa8] + ldr r1, [sp, #0xac] + bl _dsqrt + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E72E4: + ldr r0, [sp, #0xa8] + ldr r1, [sp, #0xac] + bl fabs + str r0, [sp, #0x70] + str r1, [sp, #0x74] + cmp r7, #0x0 + bne _020E73E8 + ldr r0, _020E763C ; =0x7FF00000 + cmp r4, r0 + cmpne r4, #0x0 + subne r0, r0, #0x40000000 + cmpne r4, r0 + bne _020E73E8 + ldr r2, [sp, #0x70] + ldr r3, [sp, #0x74] + str r2, [sp, #0x78] + str r3, [sp, #0x7c] + cmp r8, #0x0 + bge _020E7344 + ldr r1, _020E7638 ; =0x3FF00000 + mov r0, #0x0 + bl _ddiv + str r0, [sp, #0x78] + str r1, [sp, #0x7c] +_020E7344: + cmp r6, #0x0 + bge _020E73D0 + add r0, r4, #0x100000 + add r0, r0, #0xc0000000 + orrs r0, r0, r5 + bne _020E73AC + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + mov r2, r0 + mov r3, r1 + bl _dsub + mov r4, r0 + mov r5, r1 + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + mov r2, r0 + mov r3, r1 + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r5 + bl _ddiv + str r0, [sp, #0x78] + str r1, [sp, #0x7c] + b _020E73D0 +_020E73AC: + cmp r5, #0x1 + bne _020E73D0 + mov r0, #0x0 + ldr r2, [sp, #0x78] + ldr r3, [sp, #0x7c] + mov r1, r0 + bl _dsub + str r0, [sp, #0x78] + str r1, [sp, #0x7c] +_020E73D0: + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E73E8: + mov r0, r6, asr #0x1f + add r7, r0, #0x1 + orrs r0, r7, r5 + bne _020E7420 + ldr r0, _020E764C ; =0x02106B78 + ldr r1, _020E7650 ; =0x021D74A8 + ldr r0, [r0, #0x0] + mov r2, #0x21 + str r2, [r1, #0x0] + bl _f2d + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7420: + ldr r3, _020E7654 ; =0x41E00000 + cmp r9, r3 + ble _020E7724 + add r0, r3, #0x2100000 + cmp r9, r0 + ble _020E7490 + ldr r1, _020E7658 ; =0x3FEFFFFF + cmp r4, r1 + bgt _020E7464 + cmp r8, #0x0 + mov r0, #0x0 + addlt r1, r1, #0x40000001 + add sp, sp, #0x80 + movge r1, r0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7464: + add r0, r1, #0x1 + cmp r4, r0 + blt _020E7490 + cmp r8, #0x0 + mov r0, #0x0 + addgt r1, r1, #0x40000001 + add sp, sp, #0x80 + movle r1, r0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7490: + ldr r2, _020E7658 ; =0x3FEFFFFF + cmp r4, r2 + bge _020E74BC + cmp r8, #0x0 + mov r0, #0x0 + addlt r1, r2, #0x40000001 + add sp, sp, #0x80 + movge r1, r0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E74BC: + add r0, r2, #0x1 + cmp r4, r0 + ble _020E74E8 + cmp r8, #0x0 + mov r0, #0x0 + addgt r1, r2, #0x40000001 + add sp, sp, #0x80 + movle r1, r0 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E74E8: + ldr r0, [sp, #0xa8] + ldr r1, [sp, #0xac] + add r3, r2, #0x1 + mov r2, #0x0 + bl _dsub + mov r2, r0 + mov r3, r1 + str r0, [sp, #0x50] + str r1, [sp, #0x54] + bl _dmul + mov r6, r1 + mov r4, r0 + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + ldr r1, _020E765C ; =0x3FD00000 + mov r0, #0x0 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7660 ; =0x55555555 + sub r1, r0, #0x15800000 + bl _dsub + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, #0x0 + ldr r1, _020E7648 ; =0x3FE00000 + bl _dsub + mov r2, r0 + mov r0, r4 + mov r3, r1 + mov r1, r6 + bl _dmul + mov r6, r0 + mov r8, r1 + mov r0, #0x60000000 + ldr r1, _020E7664 ; =0x3FF71547 + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + bl _dmul + mov r4, r0 + mov r9, r1 + ldr r0, _020E7668 ; =0xF85DDF44 + ldr r1, _020E766C ; =0x3E54AE0B + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + bl _dmul + mov r11, r0 + mov r10, r1 + ldr r0, _020E7670 ; =0x652B82FE + ldr r1, _020E7664 ; =0x3FF71547 + mov r2, r6 + mov r3, r8 + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r11 + mov r1, r10 + bl _dsub + mov r6, r0 + mov r8, r1 + mov r0, r4 + mov r1, r9 + mov r2, r6 + mov r3, r8 + bl _dadd + mov r2, r4 + mov r3, r9 + str r1, [sp, #0x5c] + mov r0, #0x0 + str r0, [sp, #0x58] + bl _dsub + mov r2, r0 + mov r0, r6 + mov r3, r1 + mov r1, r8 + bl _dsub + mov r4, r0 + mov r8, r1 + b _020E7C80 + .balign 4 +_020E7638: .word 0x3FF00000 +_020E763C: .word 0x7FF00000 +_020E7640: .word 0x43400000 +_020E7644: .word 0xFFFFFC01 +_020E7648: .word 0x3FE00000 +_020E764C: .word 0x02106B78 +_020E7650: .word 0x021D74A8 +_020E7654: .word 0x41E00000 +_020E7658: .word 0x3FEFFFFF +_020E765C: .word 0x3FD00000 +_020E7660: .word 0x55555555 +_020E7664: .word 0x3FF71547 +_020E7668: .word 0xF85DDF44 +_020E766C: .word 0x3E54AE0B +_020E7670: .word 0x652B82FE +_020E7674: .word 0x0003988E +_020E7678: .word 0x000BB67A +_020E767C: .word 0x02104754 +_020E7680: .word 0x4A454EEF +_020E7684: .word 0x3FCA7E28 +_020E7688: .word 0x93C9DB65 +_020E768C: .word 0x3FCD864A +_020E7690: .word 0xA91D4101 +_020E7694: .word 0x3FD17460 +_020E7698: .word 0x518F264D +_020E769C: .word 0x3FD55555 +_020E76A0: .word 0xDB6FABFF +_020E76A4: .word 0x3FDB6DB6 +_020E76A8: .word 0x33333303 +_020E76AC: .word 0x3FE33333 +_020E76B0: .word 0x40080000 +_020E76B4: .word 0x3FEEC709 +_020E76B8: .word 0x145B01F5 +_020E76BC: .word 0xBE3E2FE0 +_020E76C0: .word 0xDC3A03FD +_020E76C4: .word 0x02104764 +_020E76C8: .word 0x02104744 +_020E76CC: .word 0x40900000 +_020E76D0: .word 0x8800759C +_020E76D4: .word 0x7E37E43C +_020E76D8: .word 0x3C971547 +_020E76DC: .word 0x3F6F3400 +_020E76E0: .word 0xC2F8F359 +_020E76E4: .word 0x01A56E1F +_020E76E8: .word 0x3FE62E43 +_020E76EC: .word 0xFEFA39EF +_020E76F0: .word 0x3FE62E42 +_020E76F4: .word 0x0CA86C39 +_020E76F8: .word 0xBE205C61 +_020E76FC: .word 0x72BEA4D0 +_020E7700: .word 0x3E663769 +_020E7704: .word 0xC5D26BF1 +_020E7708: .word 0xBEBBBD41 +_020E770C: .word 0xAF25DE2C +_020E7710: .word 0x3F11566A +_020E7714: .word 0x16BEBD93 +_020E7718: .word 0xBF66C16C +_020E771C: .word 0x5555553E +_020E7720: .word 0x3FC55555 +_020E7724: + cmp r4, #0x100000 + mov r6, #0x0 + bge _020E7754 + ldr r0, [sp, #0x70] + ldr r1, [sp, #0x74] + mov r2, r6 + add r3, r3, #0x1600000 + bl _dmul + mov r4, r1 + str r0, [sp, #0x70] + str r4, [sp, #0x74] + sub r6, r6, #0x35 +_020E7754: + ldr r0, _020E7644 ; =0xFFFFFC01 + ldr r1, _020E7674 ; =0x0003988E + and r2, r4, r0, lsr #0xc + add r0, r0, r4, asr #0x14 + orr r9, r2, #0xff00000 + cmp r2, r1 + add r6, r6, r0 + orr r9, r9, #0x30000000 + movle r8, #0x0 + ble _020E7794 + ldr r0, _020E7678 ; =0x000BB67A + cmp r2, r0 + movlt r8, #0x1 + addge r6, r6, #0x1 + subge r9, r9, #0x100000 + movge r8, #0x0 +_020E7794: + ldr r2, _020E767C ; =0x02104754 + ldr r0, [sp, #0x70] + add r1, r2, r8, lsl #0x3 + ldr r3, [r1, #0x4] + ldr r2, [r2, r8, lsl #0x3] + mov r1, r9 + str r9, [sp, #0x74] + bl _dsub + ldr r2, _020E767C ; =0x02104754 + mov r10, r0 + add r3, r2, r8, lsl #0x3 + mov r4, r1 + ldr r0, [sp, #0x70] + ldr r2, [r2, r8, lsl #0x3] + ldr r3, [r3, #0x4] + mov r1, r9 + bl _dadd + mov r3, r1 + mov r2, r0 + ldr r1, _020E7638 ; =0x3FF00000 + mov r0, #0x0 + bl _ddiv + str r1, [sp, #0x24] + mov r11, r0 + ldr r3, [sp, #0x24] + mov r0, r10 + mov r1, r4 + mov r2, r11 + bl _dmul + mov r2, r9, asr #0x1 + orr r2, r2, #0x20000000 + mov r9, r1 + add r2, r2, #0x80000 + add r1, r2, r8, lsl #0x12 + ldr r2, _020E767C ; =0x02104754 + str r0, [sp, #0x28] + add r3, r2, r8, lsl #0x3 + mov r0, #0x0 + ldr r2, [r2, r8, lsl #0x3] + ldr r3, [r3, #0x4] + str r9, [sp, #0x4c] + str r1, [sp, #0x44] + str r0, [sp, #0x48] + str r0, [sp, #0x40] + bl _dsub + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x70] + ldr r1, [sp, #0x74] + bl _dsub + str r0, [sp, #0x2c] + str r1, [sp, #0x1c] + ldr r0, [sp, #0x48] + ldr r2, [sp, #0x40] + ldr r3, [sp, #0x44] + mov r1, r9 + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r10 + mov r1, r4 + bl _dsub + mov r10, r0 + mov r4, r1 + ldr r2, [sp, #0x2c] + ldr r3, [sp, #0x1c] + ldr r0, [sp, #0x48] + mov r1, r9 + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r10 + mov r1, r4 + bl _dsub + mov r3, r1 + mov r2, r0 + ldr r1, [sp, #0x24] + mov r0, r11 + bl _dmul + str r0, [sp, #0x30] + ldr r0, [sp, #0x28] + str r1, [sp, #0x14] + mov r1, r9 + mov r2, r0 + mov r3, r9 + bl _dmul + mov r4, r0 + mov r10, r1 + mov r2, r4 + mov r3, r10 + bl _dmul + str r0, [sp, #0x34] + mov r11, r1 + ldr r0, _020E7680 ; =0x4A454EEF + ldr r1, _020E7684 ; =0x3FCA7E28 + mov r2, r4 + mov r3, r10 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7688 ; =0x93C9DB65 + ldr r1, _020E768C ; =0x3FCD864A + bl _dadd + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7690 ; =0xA91D4101 + ldr r1, _020E7694 ; =0x3FD17460 + bl _dadd + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7698 ; =0x518F264D + ldr r1, _020E769C ; =0x3FD55555 + bl _dadd + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76A0 ; =0xDB6FABFF + ldr r1, _020E76A4 ; =0x3FDB6DB6 + bl _dadd + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76A8 ; =0x33333303 + ldr r1, _020E76AC ; =0x3FE33333 + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x34] + mov r1, r11 + bl _dmul + mov r4, r0 + mov r10, r1 + ldr r0, [sp, #0x48] + ldr r2, [sp, #0x28] + mov r1, r9 + mov r3, r9 + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x30] + ldr r1, [sp, #0x14] + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dadd + mov r4, r0 + ldr r0, [sp, #0x48] + mov r10, r1 + mov r1, r9 + mov r2, r0 + mov r3, r1 + bl _dmul + str r1, [sp, #0xc] + mov r11, r0 + ldr r1, _020E76B0 ; =0x40080000 + ldr r3, [sp, #0xc] + mov r0, #0x0 + mov r2, r11 + bl _dadd + mov r2, r4 + mov r3, r10 + bl _dadd +_020E7A6C: ; 0x020E7A6C + mov r0, #0x0 + ldr r3, _020E76B0 ; =0x40080000 + mov r2, r0 + str r1, [sp, #0x44] + str r0, [sp, #0x40] + bl _dsub + ldr r3, [sp, #0xc] + mov r2, r11 + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dsub + str r0, [sp, #0x38] + str r1, [sp, #0x4] + ldr r0, [sp, #0x48] + ldr r2, [sp, #0x40] + ldr r3, [sp, #0x44] + mov r1, r9 + bl _dmul + mov r4, r0 + mov r10, r1 + ldr r0, [sp, #0x30] + ldr r1, [sp, #0x14] + ldr r2, [sp, #0x40] + ldr r3, [sp, #0x44] + bl _dmul + str r0, [sp, #0x3c] + mov r11, r1 + ldr r0, [sp, #0x38] + ldr r1, [sp, #0x4] + ldr r2, [sp, #0x28] + mov r3, r9 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x3c] + mov r1, r11 + bl _dadd + mov r9, r0 + mov r11, r1 + mov r0, r4 + mov r1, r10 + mov r2, r9 + mov r3, r11 + bl _dadd +_020E7B28: ; 0x020E7B28 + mov r0, #0x0 + mov r2, r4 + mov r3, r10 + str r1, [sp, #0x6c] + str r0, [sp, #0x68] + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r9 + mov r1, r11 + bl _dsub + mov r10, r1 + mov r11, r0 + ldr r1, _020E76B4 ; =0x3FEEC709 + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + mov r0, #0xe0000000 + bl _dmul + mov r4, r0 + mov r9, r1 + ldr r0, _020E76B8 ; =0x145B01F5 + ldr r1, _020E76BC ; =0xBE3E2FE0 + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + bl _dmul + mov r2, r11 + mov r3, r10 + mov r11, r0 + mov r10, r1 + ldr r0, _020E76C0 ; =0xDC3A03FD + ldr r1, _020E76B4 ; =0x3FEEC709 + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r11 + mov r1, r10 + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, _020E76C4 ; =0x02104764 + add r1, r0, r8, lsl #0x3 + ldr r0, [r0, r8, lsl #0x3] + ldr r1, [r1, #0x4] + bl _dadd + mov r11, r0 + mov r10, r1 + mov r0, r6 + bl _dflt + str r0, [sp, #0x50] + str r1, [sp, #0x54] + mov r0, r4 + mov r1, r9 + mov r2, r11 + mov r3, r10 + bl _dadd + ldr r2, _020E76C8 ; =0x02104744 + add r3, r2, r8, lsl #0x3 + ldr r2, [r2, r8, lsl #0x3] + ldr r3, [r3, #0x4] + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dadd + str r1, [sp, #0x5c] + mov r0, #0x0 + str r0, [sp, #0x58] + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + bl _dsub + ldr r2, _020E76C8 ; =0x02104744 + add r3, r2, r8, lsl #0x3 + ldr r2, [r2, r8, lsl #0x3] + ldr r3, [r3, #0x4] + bl _dsub + mov r2, r4 + mov r3, r9 + bl _dsub + mov r2, r0 + mov r0, r11 + mov r3, r1 + mov r1, r10 + bl _dsub + mov r4, r0 + mov r8, r1 +_020E7C80: + sub r0, r5, #0x1 + ldr r1, [sp, #0xb4] + orrs r0, r7, r0 + ldr r5, _020E7638 ; =0x3FF00000 + mov r2, #0x0 + ldr r0, [sp, #0xb0] + mov r3, r1 + mov r6, #0x0 + subeq r5, r5, #0x80000000 + str r1, [sp, #0x64] + str r2, [sp, #0x60] + bl _dsub + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x58] + ldr r1, [sp, #0x5c] + bl _dmul + mov r7, r0 + mov r9, r1 + ldr r0, [sp, #0xb0] + ldr r1, [sp, #0xb4] + mov r2, r4 + mov r3, r8 + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r7 + mov r1, r9 + bl _dadd + mov r7, r0 + mov r8, r1 + ldr r0, [sp, #0x60] + ldr r1, [sp, #0x64] + ldr r2, [sp, #0x58] + ldr r3, [sp, #0x5c] + bl _dmul + mov r2, r0 + mov r3, r1 + mov r0, r7 + mov r1, r8 + str r2, [sp, #0x68] + str r3, [sp, #0x6c] + bl _dadd + mov r9, r1 + ldr r2, _020E76CC ; =0x40900000 + str r0, [sp, #0x78] + str r9, [sp, #0x7c] + cmp r9, r2 + blt _020E7E0C + add r1, r9, #0xf700000 + add r1, r1, #0xb0000000 + orrs r0, r1, r0 + beq _020E7D8C + ldr r0, _020E76D0 ; =0x8800759C + ldr r1, _020E76D4 ; =0x7E37E43C + mov r2, r6 + mov r3, r5 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76D0 ; =0x8800759C + ldr r1, _020E76D4 ; =0x7E37E43C + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7D8C: + ldr r0, _020E7670 ; =0x652B82FE + ldr r1, _020E76D8 ; =0x3C971547 + mov r2, r7 + mov r3, r8 + bl _dadd + mov r4, r0 + mov r10, r1 + ldr r0, [sp, #0x78] + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + mov r1, r9 + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r10 + bl _dgr + bls _020E7EC0 + ldr r0, _020E76D0 ; =0x8800759C + ldr r1, _020E76D4 ; =0x7E37E43C + mov r2, r6 + mov r3, r5 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76D0 ; =0x8800759C + ldr r1, _020E76D4 ; =0x7E37E43C + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7E0C: + bic r3, r9, #0x80000000 + add r2, r2, #0xcc00 + cmp r3, r2 + blt _020E7EC0 + ldr r2, _020E76DC ; =0x3F6F3400 + add r2, r9, r2 + orrs r2, r2, r0 + beq _020E7E64 + ldr r0, _020E76E0 ; =0xC2F8F359 + ldr r1, _020E76E4 ; =0x01A56E1F + mov r2, r6 + mov r3, r5 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76E0 ; =0xC2F8F359 + ldr r1, _020E76E4 ; =0x01A56E1F + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7E64: + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r7 + mov r1, r8 + bl _dleq + bhi _020E7EC0 + ldr r0, _020E76E0 ; =0xC2F8F359 + ldr r1, _020E76E4 ; =0x01A56E1F + mov r2, r6 + mov r3, r5 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E76E0 ; =0xC2F8F359 + ldr r1, _020E76E4 ; =0x01A56E1F + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr +_020E7EC0: + ldr r0, _020E7644 ; =0xFFFFFC01 + bic r3, r9, #0x80000000 + ldr r1, _020E7648 ; =0x3FE00000 + add r2, r0, r3, asr #0x14 + cmp r3, r1 + mov r4, #0x0 + ble _020E7F3C + mov r1, #0x100000 + add r2, r2, #0x1 + add r2, r9, r1, asr r2 + bic r3, r2, #0x80000000 + add r0, r0, r3, asr #0x14 + sub r3, r1, #0x1 + mvn r3, r3, asr r0 + sub r1, r1, #0x1 + and r1, r2, r1 + and r2, r2, r3 + str r2, [sp, #0x54] + str r4, [sp, #0x50] + orr r1, r1, #0x100000 + rsb r0, r0, #0x14 + mov r4, r1, asr r0 + cmp r9, #0x0 + ldr r0, [sp, #0x68] + ldr r1, [sp, #0x6c] + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + rsblt r4, r4, #0x0 + bl _dsub + str r0, [sp, #0x68] + str r1, [sp, #0x6c] +_020E7F3C: + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + mov r0, r7 + mov r1, r8 + bl _dadd + mov r3, r1 + mov r0, #0x0 + ldr r1, _020E76E8 ; =0x3FE62E43 + mov r2, r0 + str r3, [sp, #0x54] + str r0, [sp, #0x50] + bl _dmul + mov r9, r0 + mov r10, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + ldr r2, [sp, #0x68] + ldr r3, [sp, #0x6c] + bl _dsub + mov r2, r0 + mov r0, r7 + mov r3, r1 + mov r1, r8 + bl _dsub + mov r2, r0 + mov r3, r1 + ldr r0, _020E76EC ; =0xFEFA39EF + ldr r1, _020E76F0 ; =0x3FE62E42 + bl _dmul + mov r7, r0 + mov r8, r1 + ldr r0, _020E76F4 ; =0x0CA86C39 + ldr r1, _020E76F8 ; =0xBE205C61 + ldr r2, [sp, #0x50] + ldr r3, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r0, r7 + mov r3, r1 + mov r1, r8 + bl _dadd + mov r7, r0 + mov r8, r1 + mov r0, r9 + mov r1, r10 + mov r2, r7 + mov r3, r8 + bl _dadd + mov r2, r9 + mov r3, r10 + str r0, [sp, #0x78] + str r1, [sp, #0x7c] + bl _dsub + mov r2, r0 + mov r3, r1 + mov r0, r7 + mov r1, r8 + bl _dsub + mov r8, r0 + mov r9, r1 + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + mov r2, r0 + mov r3, r1 + bl _dmul + mov r2, r0 + str r2, [sp, #0x50] + mov r3, r1 + str r3, [sp, #0x54] + ldr r0, _020E76FC ; =0x72BEA4D0 + ldr r1, _020E7700 ; =0x3E663769 + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7704 ; =0xC5D26BF1 + ldr r1, _020E7708 ; =0xBEBBBD41 + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E770C ; =0xAF25DE2C + ldr r1, _020E7710 ; =0x3F11566A + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E7714 ; =0x16BEBD93 + ldr r1, _020E7718 ; =0xBF66C16C + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, _020E771C ; =0x5555553E + ldr r1, _020E7720 ; =0x3FC55555 + bl _dadd + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x50] + ldr r1, [sp, #0x54] + bl _dmul + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + bl _dsub + mov r2, r0 + str r2, [sp, #0x58] + mov r3, r1 + str r3, [sp, #0x5c] + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + bl _dmul + mov r7, r0 + mov r10, r1 + ldr r0, [sp, #0x58] + ldr r1, [sp, #0x5c] + mov r2, #0x0 + mov r3, #0x40000000 + bl _dsub + mov r2, r0 + mov r0, r7 + mov r3, r1 + mov r1, r10 + bl _ddiv + mov r7, r0 + mov r10, r1 + ldr r0, [sp, #0x78] + ldr r1, [sp, #0x7c] + mov r2, r8 + mov r3, r9 + bl _dmul + mov r2, r0 + mov r0, r8 + mov r3, r1 + mov r1, r9 + bl _dadd + mov r2, r0 + mov r0, r7 + mov r3, r1 + mov r1, r10 + bl _dsub + ldr r2, [sp, #0x78] + ldr r3, [sp, #0x7c] + bl _dsub + mov r3, r1 + mov r2, r0 + ldr r1, _020E7638 ; =0x3FF00000 + mov r0, #0x0 + bl _dsub + add r3, r1, r4, lsl #0x14 + mov r2, r3, asr #0x14 + str r0, [sp, #0x78] + cmp r2, #0x0 + str r1, [sp, #0x7c] + addgt r0, sp, #0x78 + strgt r3, [r0, #0x4] + bgt _020E81F0 + mov r2, r4 + bl scalbn + str r0, [sp, #0x78] + str r1, [sp, #0x7c] +_020E81F0: + ldr r2, [sp, #0x78] + ldr r3, [sp, #0x7c] + mov r0, r6 + mov r1, r5 + bl _dmul + add sp, sp, #0x80 + ldmia sp!, {r3-r11,lr} + add sp, sp, #0x10 + bx lr + + arm_func_start copysign +copysign: ; 0x020E8214 + stmdb sp!, {r0-r3} + ldr r1, [sp, #0x4] + ldr r0, [sp, #0xc] + bic r1, r1, #0x80000000 + and r0, r0, #0x80000000 + orr r1, r1, r0 + ldr r0, [sp, #0x0] + str r1, [sp, #0x4] + add sp, sp, #0x10 + bx lr + + arm_func_start fabs +fabs: ; 0x020E823C + stmdb sp!, {r0-r3} + add r2, sp, #0x0 + ldr r1, [r2, #0x4] + ldr r0, [sp, #0x0] + bic r1, r1, #0x80000000 + str r1, [r2, #0x4] + add sp, sp, #0x10 + bx lr + + arm_func_start frexp +frexp: ; 0x020E825C + stmdb sp!, {r0-r3} + stmdb sp!, {r4,lr} + ldr r1, [sp, #0xc] + ldr r0, _020E8308 ; =0x7FF00000 + mov r4, r2 + bic r3, r1, #0x80000000 + mov r2, #0x0 + str r2, [r4, #0x0] + cmp r3, r0 + ldr r0, [sp, #0x8] + bge _020E8290 + orrs r0, r3, r0 + bne _020E82A4 +_020E8290: + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E82A4: + cmp r3, #0x100000 + bge _020E82D0 + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + ldr r3, _020E830C ; =0x43500000 + bl _dmul + mvn r2, #0x35 + str r0, [sp, #0x8] + str r1, [sp, #0xc] + str r2, [r4, #0x0] + bic r3, r1, #0x80000000 +_020E82D0: + ldr r2, _020E8310 ; =0x800FFFFF + ldr r0, _020E8314 ; =0xFFFFFC02 + and r1, r1, r2 + orr r1, r1, #0xfe00000 + orr r1, r1, #0x30000000 + ldr r2, [r4, #0x0] + add r0, r0, r3, asr #0x14 + add r2, r2, r0 + ldr r0, [sp, #0x8] + str r2, [r4, #0x0] + str r1, [sp, #0xc] + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E8308: .word 0x7FF00000 +_020E830C: .word 0x43500000 +_020E8310: .word 0x800FFFFF +_020E8314: .word 0xFFFFFC02 + + arm_func_start ldexp +ldexp: ; 0x020E8318 + stmdb sp!, {r0-r3} + stmdb sp!, {r4,lr} + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + mov r4, r2 + bl __fpclassifyf + cmp r0, #0x2 + ble _020E8350 + mov r0, #0x0 + ldr r2, [sp, #0x8] + ldr r3, [sp, #0xc] + mov r1, r0 + bl _deq + bne _020E8364 +_020E8350: + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E8364: + ldr r3, [sp, #0xc] + ldr r0, _020E8538 ; =0x7FF00000 + ldr r1, [sp, #0x8] + and r0, r3, r0 + movs r12, r0, asr #0x14 + bne _020E83F0 + bic r0, r3, #0x80000000 + orrs r0, r1, r0 + ldreq r0, [sp, #0x8] + ldreq r1, [sp, #0xc] + ldmeqia sp!, {r4,lr} + addeq sp, sp, #0x10 + bxeq lr + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + ldr r3, _020E853C ; =0x43500000 + mov r2, #0x0 + bl _dmul + mov r3, r1 + ldr r1, _020E8538 ; =0x7FF00000 + ldr ip, _020E8540 ; =0xFFFF3CB0 + and r1, r3, r1 + mov r2, r0 + mov r0, r1, asr #0x14 + str r2, [sp, #0x8] + str r3, [sp, #0xc] + cmp r4, r12 + sub r12, r0, #0x36 + bge _020E83F0 + ldr r0, _020E8544 ; =0xC2F8F359 + ldr r1, _020E8548 ; =0x01A56E1F + bl _dmul + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E83F0: + ldr r0, _020E854C ; =0x000007FF + cmp r12, r0 + bne _020E841C + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + mov r2, r0 + mov r3, r1 + bl _dadd + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E841C: + add r2, r12, r4 + sub r0, r0, #0x1 + cmp r2, r0 + ble _020E8460 + ldr r2, [sp, #0x8] + ldr r3, [sp, #0xc] + ldr r0, _020E8550 ; =0x8800759C + ldr r1, _020E8554 ; =0x7E37E43C + bl copysign + mov r2, r0 + mov r3, r1 + ldr r0, _020E8550 ; =0x8800759C + ldr r1, _020E8554 ; =0x7E37E43C + bl _dmul + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E8460: + cmp r2, #0x0 + ble _020E8488 + ldr r1, _020E8558 ; =0x800FFFFF + ldr r0, [sp, #0x8] + and r1, r3, r1 + orr r1, r1, r2, lsl #0x14 + str r1, [sp, #0xc] + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E8488: + mvn r0, #0x35 + cmp r2, r0 + bgt _020E8508 + ldr r0, _020E855C ; =0x0000C350 + cmp r4, r0 + ble _020E84D4 + ldr r2, [sp, #0x8] + ldr r3, [sp, #0xc] + ldr r0, _020E8550 ; =0x8800759C + ldr r1, _020E8554 ; =0x7E37E43C + bl copysign + mov r2, r0 + mov r3, r1 + ldr r0, _020E8550 ; =0x8800759C + ldr r1, _020E8554 ; =0x7E37E43C + bl _dmul + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E84D4: + ldr r2, [sp, #0x8] + ldr r3, [sp, #0xc] + ldr r0, _020E8544 ; =0xC2F8F359 + ldr r1, _020E8548 ; =0x01A56E1F + bl copysign + mov r2, r0 + mov r3, r1 + ldr r0, _020E8544 ; =0xC2F8F359 + ldr r1, _020E8548 ; =0x01A56E1F + bl _dmul + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr +_020E8508: + ldr r0, _020E8558 ; =0x800FFFFF + add r1, r2, #0x36 + and r0, r3, r0 + orr r3, r0, r1, lsl #0x14 + ldr r2, [sp, #0x8] + ldr r1, _020E8560 ; =0x3C900000 + mov r0, #0x0 + str r3, [sp, #0xc] + bl _dmul + ldmia sp!, {r4,lr} + add sp, sp, #0x10 + bx lr + .balign 4 +_020E8538: .word 0x7FF00000 +_020E853C: .word 0x43500000 +_020E8540: .word 0xFFFF3CB0 +_020E8544: .word 0xC2F8F359 +_020E8548: .word 0x01A56E1F +_020E854C: .word 0x000007FF +_020E8550: .word 0x8800759C +_020E8554: .word 0x7E37E43C +_020E8558: .word 0x800FFFFF +_020E855C: .word 0x0000C350 +_020E8560: .word 0x3C900000 + + arm_func_start pow +pow: ; 0x020E8564 + ldr ip, _020E856C ; =__ieee754_pow + bx r12 + .balign 4 +_020E856C: .word __ieee754_pow + + arm_func_start __must_round +__must_round: ; 0x020E8570 + add r3, r0, #0x5 + ldrb r2, [r3, r1] + add r12, r3, r1 + cmp r2, #0x5 + movhi r0, #0x1 + bxhi lr + mvncc r0, #0x0 + bxcc lr + ldrb r2, [r0, #0x4] + add r12, r12, #0x1 + add r3, r3, r2 + cmp r12, r3 + bhs _020E85C0 +_020E85A4: + ldrb r2, [r12, #0x0] + cmp r2, #0x0 + movne r0, #0x1 + bxne lr + add r12, r12, #0x1 + cmp r12, r3 + blo _020E85A4 +_020E85C0: + sub r1, r1, #0x1 + add r0, r0, r1 + ldrb r0, [r0, #0x5] + tst r0, #0x1 + movne r0, #0x1 + mvneq r0, #0x0 + bx lr + + arm_func_start __dorounddecup +__dorounddecup: ; 0x020E85DC + add r3, r0, #0x5 + add r1, r3, r1 + sub r12, r1, #0x1 + mov r1, #0x0 +_020E85EC: + ldrb r2, [r12, #0x0] + cmp r2, #0x9 + addcc r0, r2, #0x1 + strccb r0, [r12, #0x0] + bxcc lr + cmp r12, r3 + bne _020E8620 + mov r1, #0x1 + strb r1, [r12, #0x0] + ldrsh r1, [r0, #0x2] + add r1, r1, #0x1 + strh r1, [r0, #0x2] + bx lr +_020E8620: + strb r1, [r12], #-0x1 + b _020E85EC +_020E8628: ; 0x020E8628 + bx lr + + arm_func_start __rounddec +__rounddec: ; 0x020E862C + stmdb sp!, {r3-r5,lr} + mov r4, r1 + mov r5, r0 + cmp r4, #0x0 + ldmleia sp!, {r3-r5,pc} +_020E8640: ; 0x020E8640 + ldrb r2, [r5, #0x4] + cmp r4, r2 + ldmgeia sp!, {r3-r5,pc} +_020E864C: ; 0x020E864C + bl __must_round + strb r4, [r5, #0x4] + cmp r0, #0x0 + ldmltia sp!, {r3-r5,pc} +_020E865C: ; 0x020E865C + mov r0, r5 + mov r1, r4 + bl __dorounddecup + ldmia sp!, {r3-r5,pc} + + arm_func_start __ull2dec +__ull2dec: ; 0x020E866C + stmdb sp!, {r3-r11,lr} + mov r10, r0 + mov r0, #0x0 + mov r8, r2 + strb r0, [r10, #0x0] + mov r9, r1 + cmp r8, #0x0 + strb r0, [r10, #0x4] + cmpeq r9, #0x0 + beq _020E86F8 + mov r6, #0xa + mov r11, r0 + mov r5, r0 + mov r4, r0 +_020E86A4: + ldrb r1, [r10, #0x4] + mov r0, r9 + mov r2, r6 + add r3, r1, #0x1 + mov r7, r1 + strb r3, [r10, #0x4] + mov r1, r8 + mov r3, r11 + bl _ull_mod + add r1, r10, r7 + strb r0, [r1, #0x5] + mov r0, r9 + mov r1, r8 + mov r2, #0xa + mov r3, #0x0 + bl _ll_udiv + mov r8, r1 + mov r9, r0 + cmp r8, r5 + cmpeq r9, r4 + bne _020E86A4 +_020E86F8: + ldrb r0, [r10, #0x4] + add r2, r10, #0x5 + add r0, r2, r0 + sub r3, r0, #0x1 + cmp r2, r3 + bhs _020E8728 +_020E8710: + ldrb r0, [r3, #0x0] + ldrb r1, [r2, #0x0] + strb r0, [r2], #0x1 + strb r1, [r3], #-0x1 + cmp r2, r3 + blo _020E8710 +_020E8728: + ldrb r0, [r10, #0x4] + sub r0, r0, #0x1 + strh r0, [r10, #0x2] + ldmia sp!, {r3-r11,pc} + + arm_func_start __timesdec +__timesdec: ; 0x020E8738 + stmdb sp!, {r3-r11,lr} + sub sp, sp, #0x40 + ldrb r6, [r1, #0x4] + ldrb r5, [r2, #0x4] + mov r4, #0x0 + add r3, sp, #0x0 + add r5, r6, r5 + sub r5, r5, #0x1 + add r3, r3, r5 + add r6, r3, #0x1 + mov r7, r6 + strb r4, [r0, #0x0] + cmp r5, #0x0 + ble _020E8800 + add lr, r1, #0x5 + add r11, r2, #0x5 +_020E8778: + ldrb r3, [r2, #0x4] + sub r10, r3, #0x1 + sub r3, r5, r10 + subs r9, r3, #0x1 + ldrb r3, [r1, #0x4] + movmi r9, #0x0 + submi r10, r5, #0x1 + add r8, r10, #0x1 + sub r3, r3, r9 + cmp r8, r3 + movgt r8, r3 + add r10, r11, r10 + add r9, lr, r9 + cmp r8, #0x0 + ble _020E87CC +_020E87B4: + ldrb r12, [r9], #0x1 + ldrb r3, [r10], #-0x1 + sub r8, r8, #0x1 + cmp r8, #0x0 + mla r4, r12, r3, r4 + bgt _020E87B4 +_020E87CC: + ldr r3, _020E88B8 ; =0xCCCCCCCD + sub r5, r5, #0x1 + umull r8, r9, r4, r3 + mov r9, r9, lsr #0x3 + cmp r5, #0x0 + mov r10, #0xa + umull r8, r9, r10, r9 + sub r9, r4, r8 + strb r9, [r6, #-0x1]! + mov r8, r4 + umull r3, r4, r8, r3 + mov r4, r4, lsr #0x3 + bgt _020E8778 +_020E8800: + ldrsh r3, [r1, #0x2] + ldrsh r1, [r2, #0x2] + cmp r4, #0x0 + add r1, r3, r1 + strh r1, [r0, #0x2] + beq _020E8828 + strb r4, [r6, #-0x1]! + ldrsh r1, [r0, #0x2] + add r1, r1, #0x1 + strh r1, [r0, #0x2] +_020E8828: + mov r3, #0x0 + b _020E8840 +_020E8830: + ldrb r2, [r6], #0x1 + add r1, r0, r3 + add r3, r3, #0x1 + strb r2, [r1, #0x5] +_020E8840: + cmp r3, #0x20 + bge _020E8850 + cmp r6, r7 + blo _020E8830 +_020E8850: + cmp r6, r7 + addcs sp, sp, #0x40 + strb r3, [r0, #0x4] + ldmcsia sp!, {r3-r11,pc} +_020E8860: ; 0x020E8860 + ldrb r1, [r6, #0x0] + cmp r1, #0x5 + addcc sp, sp, #0x40 + ldmccia sp!, {r3-r11,pc} +_020E8870: ; 0x020E8870 + bne _020E88A8 + add r2, r6, #0x1 + cmp r2, r7 + bhs _020E8898 +_020E8880: + ldrb r1, [r2, #0x0] + cmp r1, #0x0 + bne _020E88A8 + add r2, r2, #0x1 + cmp r2, r7 + blo _020E8880 +_020E8898: + ldrb r1, [r6, #-0x1] + tst r1, #0x1 + addeq sp, sp, #0x40 + ldmeqia sp!, {r3-r11,pc} +_020E88A8: + ldrb r1, [r0, #0x4] + bl __dorounddecup + add sp, sp, #0x40 + ldmia sp!, {r3-r11,pc} + .balign 4 +_020E88B8: .word 0xCCCCCCCD + + arm_func_start __str2dec +__str2dec: ; 0x020E88BC + stmdb sp!, {r3,lr} + strh r2, [r0, #0x2] + mov r12, #0x0 + strb r12, [r0, #0x0] + b _020E88E4 +_020E88D0: + ldrsb r3, [r1], #0x1 + add r2, r0, r12 + add r12, r12, #0x1 + sub r3, r3, #0x30 + strb r3, [r2, #0x5] +_020E88E4: + cmp r12, #0x20 + bge _020E88F8 + ldrsb r2, [r1, #0x0] + cmp r2, #0x0 + bne _020E88D0 +_020E88F8: + strb r12, [r0, #0x4] + ldrsb r2, [r1, #0x0] + cmp r2, #0x0 + ldmeqia sp!, {r3,pc} +_020E8908: ; 0x020E8908 + cmp r2, #0x5 + ldmltia sp!, {r3,pc} +_020E8910: ; 0x020E8910 + bgt _020E894C + ldrsb r2, [r1, #0x1] + add r1, r1, #0x1 + cmp r2, #0x0 + beq _020E8938 +_020E8924: + cmp r2, #0x30 + bne _020E894C + ldrsb r2, [r1, #0x1]! + cmp r2, #0x0 + bne _020E8924 +_020E8938: + sub r1, r12, #0x1 + add r1, r0, r1 + ldrb r1, [r1, #0x5] + tst r1, #0x1 + ldmeqia sp!, {r3,pc} +_020E894C: + ldrb r1, [r0, #0x4] + bl __dorounddecup + ldmia sp!, {r3,pc} + + arm_func_start __two_exp +__two_exp: ; 0x020E8958 + stmdb sp!, {r4-r5,lr} + sub sp, sp, #0x4c + mov r4, r1 + mvn r2, #0x34 + mov r5, r0 + cmp r4, r2 + bgt _020E8988 + bge _020E8A54 + sub r0, r2, #0xb + cmp r4, r0 + beq _020E8A3C + b _020E8BE4 +_020E8988: + add r1, r4, #0x20 + cmp r1, #0x28 + addls pc, pc, r1, lsl #0x2 + b _020E8BE4 +_020E8998: + b _020E8A68 +_020E899C: + b _020E8BE4 +_020E89A0: + b _020E8BE4 +_020E89A4: + b _020E8BE4 +_020E89A8: + b _020E8BE4 +_020E89AC: + b _020E8BE4 +_020E89B0: + b _020E8BE4 +_020E89B4: + b _020E8BE4 +_020E89B8: + b _020E8BE4 +_020E89BC: + b _020E8BE4 +_020E89C0: + b _020E8BE4 +_020E89C4: + b _020E8BE4 +_020E89C8: + b _020E8BE4 +_020E89CC: + b _020E8BE4 +_020E89D0: + b _020E8BE4 +_020E89D4: + b _020E8BE4 +_020E89D8: + b _020E8A7C +_020E89DC: + b _020E8BE4 +_020E89E0: + b _020E8BE4 +_020E89E4: + b _020E8BE4 +_020E89E8: + b _020E8BE4 +_020E89EC: + b _020E8BE4 +_020E89F0: + b _020E8BE4 +_020E89F4: + b _020E8BE4 +_020E89F8: + b _020E8A90 +_020E89FC: + b _020E8AA4 +_020E8A00: + b _020E8AB8 +_020E8A04: + b _020E8ACC +_020E8A08: + b _020E8AE0 +_020E8A0C: + b _020E8AF4 +_020E8A10: + b _020E8B08 +_020E8A14: + b _020E8B1C +_020E8A18: + b _020E8B30 +_020E8A1C: + b _020E8B44 +_020E8A20: + b _020E8B58 +_020E8A24: + b _020E8B6C +_020E8A28: + b _020E8B80 +_020E8A2C: + b _020E8B94 +_020E8A30: + b _020E8BA8 +_020E8A34: + b _020E8BBC +_020E8A38: + b _020E8BD0 +_020E8A3C: + ldr r1, _020E8C88 ; =0x02106E88 + mov r0, r5 + mvn r2, #0x13 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8A54: + ldr r1, _020E8C8C ; =0x02106EB8 + add r2, r2, #0x25 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8A68: + ldr r1, _020E8C90 ; =0x02106EE0 + add r2, r2, #0x2b + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8A7C: + ldr r1, _020E8C94 ; =0x02106EF8 + add r2, r2, #0x30 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8A90: + ldr r1, _020E8C98 ; =0x02106F08 + add r2, r2, #0x32 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8AA4: + ldr r1, _020E8C9C ; =0x02106F10 + add r2, r2, #0x32 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8AB8: + ldr r1, _020E8CA0 ; =0x02106F18 + add r2, r2, #0x33 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8ACC: + ldr r1, _020E8CA4 ; =0x02106F20 + add r2, r2, #0x33 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8AE0: + ldr r1, _020E8CA8 ; =0x02106F28 + add r2, r2, #0x33 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8AF4: + ldr r1, _020E8CAC ; =0x02106F2C + add r2, r2, #0x34 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B08: + ldr r1, _020E8CB0 ; =0x02106F30 + add r2, r2, #0x34 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B1C: + ldr r1, _020E8CB4 ; =0x02106F34 + add r2, r2, #0x34 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B30: + ldr r1, _020E8CB8 ; =0x02106F38 + mov r2, #0x0 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B44: + ldr r1, _020E8CBC ; =0x02106F3C + mov r2, #0x0 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B58: + ldr r1, _020E8CC0 ; =0x02106F40 + mov r2, #0x0 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B6C: + ldr r1, _020E8CC4 ; =0x02106F44 + mov r2, #0x0 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B80: + ldr r1, _020E8CC8 ; =0x02106F48 + mov r2, #0x1 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8B94: + ldr r1, _020E8CCC ; =0x02106F4C + mov r2, #0x1 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8BA8: + ldr r1, _020E8CD0 ; =0x02106F50 + mov r2, #0x1 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8BBC: + ldr r1, _020E8CD4 ; =0x02106F54 + mov r2, #0x2 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8BD0: + ldr r1, _020E8CD8 ; =0x02106F58 + mov r2, #0x2 + bl __str2dec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} +_020E8BE4: + and r0, r4, #0x80000000 + add r1, r4, r0, lsr #0x1f + add r0, sp, #0x26 + mov r1, r1, asr #0x1 + bl __two_exp + add r1, sp, #0x26 + mov r0, r5 + mov r2, r1 + bl __timesdec + tst r4, #0x1 + addeq sp, sp, #0x4c + ldmeqia sp!, {r4-r5,pc} +_020E8C14: ; 0x020E8C14 + add r3, sp, #0x0 + mov r12, r5 + mov r2, #0x9 +_020E8C20: + ldrh r1, [r12, #0x0] + ldrh r0, [r12, #0x2] + add r12, r12, #0x4 + subs r2, r2, #0x1 + strh r1, [r3, #0x0] + strh r0, [r3, #0x2] + add r3, r3, #0x4 + bne _020E8C20 + ldrh r0, [r12, #0x0] + cmp r4, #0x0 + strh r0, [r3, #0x0] + add r0, sp, #0x26 + ble _020E8C64 + ldr r1, _020E8CBC ; =0x02106F3C + mov r2, #0x0 + bl __str2dec + b _020E8C70 +_020E8C64: + ldr r1, _020E8CB4 ; =0x02106F34 + mvn r2, #0x0 + bl __str2dec +_020E8C70: + add r1, sp, #0x0 + add r2, sp, #0x26 + mov r0, r5 + bl __timesdec + add sp, sp, #0x4c + ldmia sp!, {r4-r5,pc} + .balign 4 +_020E8C88: .word 0x02106E88 +_020E8C8C: .word 0x02106EB8 +_020E8C90: .word 0x02106EE0 +_020E8C94: .word 0x02106EF8 +_020E8C98: .word 0x02106F08 +_020E8C9C: .word 0x02106F10 +_020E8CA0: .word 0x02106F18 +_020E8CA4: .word 0x02106F20 +_020E8CA8: .word 0x02106F28 +_020E8CAC: .word 0x02106F2C +_020E8CB0: .word 0x02106F30 +_020E8CB4: .word 0x02106F34 +_020E8CB8: .word 0x02106F38 +_020E8CBC: .word 0x02106F3C +_020E8CC0: .word 0x02106F40 +_020E8CC4: .word 0x02106F44 +_020E8CC8: .word 0x02106F48 +_020E8CCC: .word 0x02106F4C +_020E8CD0: .word 0x02106F50 +_020E8CD4: .word 0x02106F54 +_020E8CD8: .word 0x02106F58 + + arm_func_start __equals_dec +__equals_dec: + stmdb sp!, {r4,lr} + ldrb r3, [r0, #0x5] + cmp r3, #0x0 + bne _020E8D00 + ldrb r0, [r1, #0x5] + cmp r0, #0x0 + moveq r0, #0x1 + movne r0, #0x0 + ldmia sp!, {r4,pc} +_020E8D00: + ldrb r2, [r1, #0x5] + cmp r2, #0x0 + bne _020E8D1C + cmp r3, #0x0 + moveq r0, #0x1 + movne r0, #0x0 + ldmia sp!, {r4,pc} +_020E8D1C: + ldrsh r3, [r0, #0x2] + ldrsh r2, [r1, #0x2] + cmp r3, r2 + bne _020E8DB4 + ldrb r4, [r0, #0x4] + ldrb r2, [r1, #0x4] + mov r12, #0x0 + mov lr, r4 + cmp r4, r2 + movgt lr, r2 + cmp lr, #0x0 + ble _020E8D74 +_020E8D4C: + add r3, r0, r12 + add r2, r1, r12 + ldrb r3, [r3, #0x5] + ldrb r2, [r2, #0x5] + cmp r3, r2 + movne r0, #0x0 + ldmneia sp!, {r4,pc} +_020E8D68: ; 0x020E8D68 + add r12, r12, #0x1 + cmp r12, lr + blt _020E8D4C +_020E8D74: + cmp lr, r4 + moveq r0, r1 + ldrb r1, [r0, #0x4] + cmp r12, r1 + bge _020E8DAC +_020E8D88: + add r1, r0, r12 + ldrb r1, [r1, #0x5] + cmp r1, #0x0 + movne r0, #0x0 + ldmneia sp!, {r4,pc} +_020E8D9C: ; 0x020E8D9C + ldrb r1, [r0, #0x4] + add r12, r12, #0x1 + cmp r12, r1 + blt _020E8D88 +_020E8DAC: + mov r0, #0x1 + ldmia sp!, {r4,pc} +_020E8DB4: + mov r0, #0x0 + ldmia sp!, {r4,pc} + + arm_func_start __less_dec +__less_dec: + stmdb sp!, {r3-r5,lr} + ldrb r2, [r0, #0x5] + cmp r2, #0x0 + bne _020E8DE0 + ldrb r0, [r1, #0x5] + cmp r0, #0x0 + movne r0, #0x1 + moveq r0, #0x0 + ldmia sp!, {r3-r5,pc} +_020E8DE0: + ldrb r2, [r1, #0x5] + cmp r2, #0x0 + moveq r0, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020E8DF0: ; 0x020E8DF0 + ldrsh r3, [r1, #0x2] + ldrsh r2, [r0, #0x2] + cmp r2, r3 + bne _020E8E90 + ldrb r5, [r0, #0x4] + ldrb r4, [r1, #0x4] + mov r12, #0x0 + mov lr, r5 + cmp r5, r4 + movgt lr, r4 + cmp lr, #0x0 + ble _020E8E54 +_020E8E20: + add r3, r1, r12 + add r2, r0, r12 + ldrb r3, [r3, #0x5] + ldrb r2, [r2, #0x5] + cmp r2, r3 + movcc r0, #0x1 + ldmccia sp!, {r3-r5,pc} +_020E8E3C: ; 0x020E8E3C + cmp r3, r2 + movcc r0, #0x0 + ldmccia sp!, {r3-r5,pc} +_020E8E48: ; 0x020E8E48 + add r12, r12, #0x1 + cmp r12, lr + blt _020E8E20 +_020E8E54: + cmp lr, r5 + bne _020E8E88 + cmp r12, r4 + bge _020E8E88 +_020E8E64: + add r0, r1, r12 + ldrb r0, [r0, #0x5] + cmp r0, #0x0 + movne r0, #0x1 + ldmneia sp!, {r3-r5,pc} +_020E8E78: ; 0x020E8E78 + ldrb r0, [r1, #0x4] + add r12, r12, #0x1 + cmp r12, r0 + blt _020E8E64 +_020E8E88: + mov r0, #0x0 + ldmia sp!, {r3-r5,pc} +_020E8E90: + movlt r0, #0x1 + movge r0, #0x0 + ldmia sp!, {r3-r5,pc} + + arm_func_start __minus_dec +__minus_dec: ; 0x020E8E9C + stmdb sp!, {r3-r7,lr} + mov r6, r0 + mov r5, #0x9 +_020E8EA8: + ldrh r4, [r1, #0x0] + ldrh r3, [r1, #0x2] + add r1, r1, #0x4 + subs r5, r5, #0x1 + strh r4, [r6, #0x0] + strh r3, [r6, #0x2] + add r6, r6, #0x4 + bne _020E8EA8 + ldrh r1, [r1, #0x0] + strh r1, [r6, #0x0] + ldrb r1, [r2, #0x5] + cmp r1, #0x0 + ldmeqia sp!, {r3-r7,pc} +_020E8EDC: ; 0x020E8EDC + ldrb r7, [r0, #0x4] + ldrb r3, [r2, #0x4] + ldrsh r4, [r0, #0x2] + mov r1, r7 + cmp r7, r3 + movlt r1, r3 + ldrsh r3, [r2, #0x2] + sub r6, r4, r3 + add r1, r1, r6 + cmp r1, #0x20 + movgt r1, #0x20 + cmp r7, r1 + bge _020E8F34 + mov r4, #0x0 +_020E8F14: + ldrb r5, [r0, #0x4] + add r3, r0, r7 + add r5, r5, #0x1 + strb r5, [r0, #0x4] + strb r4, [r3, #0x5] + ldrb r7, [r0, #0x4] + cmp r7, r1 + blt _020E8F14 +_020E8F34: + ldrb r4, [r2, #0x4] + add r3, r0, #0x5 + add r12, r3, r1 + add r4, r4, r6 + cmp r4, r1 + addlt r12, r3, r4 + sub r4, r12, r3 + add r1, r2, #0x5 + sub r4, r4, r6 + add lr, r1, r4 + mov r4, lr + b _020E8FC8 +_020E8F64: + ldrb r7, [r12, #-0x1]! + ldrb r5, [lr, #-0x1]! + cmp r7, r5 + bhs _020E8FB8 + ldrb r7, [r12, #-0x1] + sub r5, r12, #0x1 + cmp r7, #0x0 + bne _020E8F90 +_020E8F84: + ldrb r7, [r5, #-0x1]! + cmp r7, #0x0 + beq _020E8F84 +_020E8F90: + cmp r5, r12 + beq _020E8FB8 +_020E8F98: + ldrb r7, [r5, #0x0] + sub r7, r7, #0x1 + strb r7, [r5, #0x0] + ldrb r7, [r5, #0x1]! + cmp r5, r12 + add r7, r7, #0xa + strb r7, [r5, #0x0] + bne _020E8F98 +_020E8FB8: + ldrb r7, [r12, #0x0] + ldrb r5, [lr, #0x0] + sub r5, r7, r5 + strb r5, [r12, #0x0] +_020E8FC8: + cmp r12, r3 + cmphi lr, r1 + bhi _020E8F64 + ldrb r5, [r2, #0x4] + sub lr, r4, r1 + cmp lr, r5 + bge _020E90A4 + ldrb r1, [r4, #0x0] + mov r7, #0x0 + cmp r1, #0x5 + movcc r7, #0x1 + blo _020E9040 + bne _020E9040 + add r1, r2, #0x5 + add r2, r1, r5 + add r4, r4, #0x1 + cmp r4, r2 + bhs _020E9028 +_020E9010: + ldrb r1, [r4, #0x0] + cmp r1, #0x0 + bne _020E90A4 + add r4, r4, #0x1 + cmp r4, r2 + blo _020E9010 +_020E9028: + add r1, r3, lr + add r2, r1, r6 + ldrb r1, [r2, #-0x1] + sub r12, r2, #0x1 + tst r1, #0x1 + movne r7, #0x1 +_020E9040: + cmp r7, #0x0 + beq _020E90A4 + ldrb r1, [r12, #0x0] + cmp r1, #0x1 + bhs _020E9098 + ldrb r1, [r12, #-0x1] + sub r2, r12, #0x1 + cmp r1, #0x0 + bne _020E9070 +_020E9064: + ldrb r1, [r2, #-0x1]! + cmp r1, #0x0 + beq _020E9064 +_020E9070: + cmp r2, r12 + beq _020E9098 +_020E9078: + ldrb r1, [r2, #0x0] + sub r1, r1, #0x1 + strb r1, [r2, #0x0] + ldrb r1, [r2, #0x1]! + cmp r2, r12 + add r1, r1, #0xa + strb r1, [r2, #0x0] + bne _020E9078 +_020E9098: + ldrb r1, [r12, #0x0] + sub r1, r1, #0x1 + strb r1, [r12, #0x0] +_020E90A4: + ldrb r1, [r3, #0x0] + mov r5, r3 + cmp r1, #0x0 + bne _020E90C0 +_020E90B4: + ldrb r1, [r5, #0x1]! + cmp r1, #0x0 + beq _020E90B4 +_020E90C0: + cmp r5, r3 + bls _020E9108 + ldrsh r1, [r0, #0x2] + sub r2, r5, r3 + and r4, r2, #0xff + sub r1, r1, r4 + strh r1, [r0, #0x2] + ldrb r1, [r0, #0x4] + add r2, r3, r1 + cmp r5, r2 + bhs _020E90FC +_020E90EC: + ldrb r1, [r5], #0x1 + cmp r5, r2 + strb r1, [r3], #0x1 + blo _020E90EC +_020E90FC: + ldrb r1, [r0, #0x4] + sub r1, r1, r4 + strb r1, [r0, #0x4] +_020E9108: + ldrb r1, [r0, #0x4] + add r2, r0, #0x5 + add r3, r2, r1 + cmp r3, r2 + bls _020E9130 +_020E911C: + ldrb r1, [r3, #-0x1]! + cmp r1, #0x0 + bne _020E9130 + cmp r3, r2 + bhi _020E911C +_020E9130: + sub r1, r3, r2 + add r1, r1, #0x1 + strb r1, [r0, #0x4] + ldmia sp!, {r3-r7,pc} + + arm_func_start __num2dec_internal +__num2dec_internal: + stmdb sp!, {r4-r8,lr} + sub sp, sp, #0x58 + mov r8, r1 + mov r6, r2 + mov r7, r0 + mov r0, r8 + mov r1, r6 + bl __signbitf +_020E9160: ; 0x020E9160 + cmp r0, #0x0 + movne r1, #0x1 + moveq r1, #0x0 + mov r4, r1, lsl #0x18 + mov r0, #0x0 + mov r1, r0 + mov r2, r8 + mov r3, r6 + mov r5, r4, asr #0x18 + bl _deq + bne _020E91AC + strb r5, [r7, #0x0] + mov r1, #0x0 + strh r1, [r7, #0x2] + mov r0, #0x1 + strb r0, [r7, #0x4] + add sp, sp, #0x58 + strb r1, [r7, #0x5] + ldmia sp!, {r4-r8,pc} +_020E91AC: + mov r0, r8 + mov r1, r6 + bl __fpclassifyf + cmp r0, #0x2 + bgt _020E91F8 + strb r5, [r7, #0x0] + mov r2, #0x0 + strh r2, [r7, #0x2] + mov r2, #0x1 + mov r0, r8 + mov r1, r6 + strb r2, [r7, #0x4] + bl __fpclassifyf + cmp r0, #0x1 + moveq r0, #0x4e + movne r0, #0x49 + add sp, sp, #0x58 + strb r0, [r7, #0x5] + ldmia sp!, {r4-r8,pc} +_020E91F8: + cmp r5, #0x0 + beq _020E921C + mov r0, #0x0 + mov r1, r0 + mov r2, r8 + mov r3, r6 + bl _dsub + mov r8, r0 + mov r6, r1 +_020E921C: + add r2, sp, #0x8 + mov r0, r8 + mov r1, r6 + bl frexp + mov r4, r0 + mov r6, r1 + orr r12, r4, #0x0 + rsbs r2, r12, #0x0 + orr r3, r6, #0x100000 + rsc r1, r3, #0x0 + mov r0, #0x0 + and r3, r3, r1 + sub r1, r0, #0x1 + and r12, r12, r2 + mov r2, r1 + adds r0, r12, r1 + adc r1, r3, r2 + str r4, [sp, #0x0] + str r6, [sp, #0x4] + bl __msl_generic_count_bits64 + rsb r8, r0, #0x35 + ldr r1, [sp, #0x8] + add r0, sp, #0xc + sub r1, r1, r8 + bl __two_exp + mov r0, r4 + mov r1, r6 + mov r2, r8 + bl ldexp + bl _ll_ufrom_d + mov r2, r1 + mov r1, r0 + add r0, sp, #0x32 + bl __ull2dec + mov r0, r7 + add r1, sp, #0x32 + add r2, sp, #0xc + bl __timesdec + strb r5, [r7, #0x0] + add sp, sp, #0x58 + ldmia sp!, {r4-r8,pc} + + arm_func_start __num2dec_internal2 +__num2dec_internal2: ; 0x020E92C0 + stmdb sp!, {r3-r5,lr} + mov r4, r3 + ldrsh r5, [r0, #0x2] + mov r0, r4 + bl __num2dec_internal + ldrb r0, [r4, #0x5] + cmp r0, #0x9 + ldmhiia sp!, {r3-r5,pc} +_020E92E0: ; 0x020E92E0 + cmp r5, #0x20 + movgt r5, #0x20 + mov r0, r4 + mov r1, r5 + bl __rounddec + ldrb r0, [r4, #0x4] + cmp r0, r5 + bge _020E9324 + mov r1, #0x0 +_020E9304: + ldrb r2, [r4, #0x4] + add r0, r4, r0 + add r2, r2, #0x1 + strb r2, [r4, #0x4] + strb r1, [r0, #0x5] + ldrb r0, [r4, #0x4] + cmp r0, r5 + blt _020E9304 +_020E9324: + ldrsh r1, [r4, #0x2] + sub r0, r0, #0x1 + mov r2, #0x0 + sub r0, r1, r0 + strh r0, [r4, #0x2] + ldrb r0, [r4, #0x4] + cmp r0, #0x0 + ldmleia sp!, {r3-r5,pc} +_020E9344: + add r1, r4, r2 + ldrb r0, [r1, #0x5] + add r2, r2, #0x1 + add r0, r0, #0x30 + strb r0, [r1, #0x5] + ldrb r0, [r4, #0x4] + cmp r2, r0 + blt _020E9344 + ldmia sp!, {r3-r5,pc} + + arm_func_start __dec2num +__dec2num: ; 0x020E9368 + stmdb sp!, {r4-r11,lr} + sub sp, sp, #0xfc + mov r4, r0 + ldrb r0, [r4, #0x4] + cmp r0, #0x0 + bne _020E93A8 + ldrsb r0, [r4, #0x0] + mov r2, #0x0 + cmp r0, #0x0 + ldreq r3, _020E996C ; =0x3FF00000 + mov r0, #0x0 + ldrne r3, _020E9970 ; =0xBFF00000 + mov r1, r0 + bl copysign + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} +_020E93A8: + ldrb r0, [r4, #0x5] + cmp r0, #0x30 + beq _020E93C8 + cmp r0, #0x49 + beq _020E93F0 + cmp r0, #0x4e + beq _020E9424 + b _020E946C +_020E93C8: + ldrsb r0, [r4, #0x0] + mov r2, #0x0 + cmp r0, #0x0 + ldreq r3, _020E996C ; =0x3FF00000 + mov r0, #0x0 + ldrne r3, _020E9970 ; =0xBFF00000 + mov r1, r0 + bl copysign + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} +_020E93F0: + ldrsb r0, [r4, #0x0] + mov r5, #0x0 + cmp r0, #0x0 + ldreq r4, _020E996C ; =0x3FF00000 + ldr r0, _020E9974 ; =0x02106B74 + ldrne r4, _020E9970 ; =0xBFF00000 + ldr r0, [r0, #0x0] + bl _f2d + mov r2, r5 + mov r3, r4 + bl copysign + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} +_020E9424: + ldr r1, _020E9978 ; =0x7FF00000 + add r3, sp, #0x10 + mov r2, #0x0 + str r2, [r3, #0x0] + str r1, [r3, #0x4] + ldrsb r0, [r4, #0x0] + cmp r0, #0x0 + beq _020E9454 + orr r0, r1, #0x80000000 + orr r1, r2, r2 + str r1, [r3, #0x0] + str r0, [r3, #0x4] +_020E9454: + ldmia r3, {r0-r1} + orr r0, r0, #0x0 + orr r1, r1, #0x80000 + stmia r3, {r0-r1} + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} +_020E946C: + add r3, sp, #0xd6 + mov r5, r4 + mov r2, #0x9 +_020E9478: + ldrh r1, [r5, #0x0] + ldrh r0, [r5, #0x2] + add r5, r5, #0x4 + subs r2, r2, #0x1 + strh r1, [r3, #0x0] + strh r0, [r3, #0x2] + add r3, r3, #0x4 + bne _020E9478 + ldrh r0, [r5, #0x0] + add r1, sp, #0xdb + strh r0, [r3, #0x0] + ldrb r0, [sp, #0xda] + add r5, r1, r0 + cmp r1, r5 + bhs _020E94C8 +_020E94B4: + ldrb r0, [r1, #0x0] + sub r0, r0, #0x30 + strb r0, [r1], #0x1 + cmp r1, r5 + blo _020E94B4 +_020E94C8: + ldrb r1, [sp, #0xda] + ldrsh r2, [sp, #0xd8] + add r0, sp, #0xb0 + sub r1, r1, #0x1 + add r1, r2, r1 + strh r1, [sp, #0xd8] + ldr r1, _020E997C ; =0x02106F5C + mov r2, #0x134 + ldrsh r11, [sp, #0xd8] + bl __str2dec + add r0, sp, #0xb0 + add r1, sp, #0xd6 + bl __less_dec +_020E94FC: ; 0x020E94FC + cmp r0, #0x0 + beq _020E9538 + ldrsb r0, [r4, #0x0] + mov r5, #0x0 + cmp r0, #0x0 + ldreq r4, _020E996C ; =0x3FF00000 + ldr r0, _020E9974 ; =0x02106B74 + ldrne r4, _020E9970 ; =0xBFF00000 + ldr r0, [r0, #0x0] + bl _f2d + mov r2, r5 + mov r3, r4 + bl copysign + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} +_020E9538: + add r1, sp, #0xdb + ldrb r0, [r1, #0x0] + add r8, r1, #0x1 + bl _dfltu + str r0, [sp, #0x8] + str r1, [sp, #0xc] + cmp r8, r5 + bhs _020E9610 +_020E9558: + sub r0, r5, r8 + mov r1, r0, lsr #0x1f + rsb r0, r1, r0, lsl #0x1d + adds r7, r1, r0, ror #0x1d + moveq r7, #0x8 + mov r6, #0x0 + mov r2, #0x0 + cmp r7, #0x0 + ble _020E9594 + mov r0, #0xa +_020E9580: + ldrb r1, [r8], #0x1 + add r2, r2, #0x1 + cmp r2, r7 + mla r6, r0, r6, r1 + blt _020E9580 +_020E9594: + ldr r0, _020E9980 ; =0x02106E48 + ldr r1, [sp, #0xc] + add r3, r0, r7, lsl #0x3 + ldr r2, [r3, #-0x8] + ldr r0, [sp, #0x8] + ldr r3, [r3, #-0x4] + bl _dmul + mov r4, r0 + mov r9, r1 + mov r0, r6 + bl _dfltu + mov r2, r0 + mov r3, r1 + mov r0, r4 + mov r1, r9 + bl _dadd +_020E95D4: ; 0x020E95D4 + cmp r6, #0x0 + mov r6, r0 + mov r10, r1 + beq _020E95FC + mov r0, r4 + mov r1, r9 + mov r2, r6 + mov r3, r10 + bl _deq + beq _020E9610 +_020E95FC: + str r6, [sp, #0x8] + str r10, [sp, #0xc] + cmp r8, r5 + sub r11, r11, r7 + blo _020E9558 +_020E9610: + cmp r11, #0x0 + bge _020E9654 + rsb r0, r11, #0x0 + bl _dflt + mov r3, r1 + mov r2, r0 + ldr r1, _020E9984 ; =0x40140000 + mov r0, #0x0 + bl pow + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + bl _ddiv + str r0, [sp, #0x8] + str r1, [sp, #0xc] + b _020E968C +_020E9654: + mov r0, r11 + bl _dflt + mov r3, r1 + mov r2, r0 + ldr r1, _020E9984 ; =0x40140000 + mov r0, #0x0 + bl pow + mov r2, r0 + mov r3, r1 + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + bl _dmul + str r0, [sp, #0x8] + str r1, [sp, #0xc] +_020E968C: + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + mov r2, r11 + bl ldexp + str r0, [sp, #0x8] + str r1, [sp, #0xc] + bl __fpclassifyf + cmp r0, #0x2 + bne _020E96C0 + ldr r0, _020E9988 ; =0x7FEFFFFF + mvn r1, #0x0 + str r1, [sp, #0x8] + str r0, [sp, #0xc] +_020E96C0: + ldr r1, [sp, #0x8] + ldr r2, [sp, #0xc] + add r0, sp, #0x8a + add r4, sp, #0x0 + mov r5, #0x0 + bl __num2dec_internal + add r0, sp, #0x8a + add r1, sp, #0xd6 + bl __equals_dec +_020E96E4: ; 0x020E96E4 + cmp r0, #0x0 + bne _020E9934 + add r0, sp, #0x8a + add r1, sp, #0xd6 + bl __less_dec +_020E96F8: ; 0x020E96F8 + cmp r0, #0x0 + movne r5, #0x1 + ldr r1, [sp, #0x8] + ldr r0, [sp, #0xc] + cmp r5, #0x0 + moveq r6, #0x1 + str r1, [sp, #0x0] + str r0, [sp, #0x4] + movne r6, #0x0 +_020E971C: + cmp r6, #0x0 + bne _020E9744 + ldmia r4, {r0-r1} + adds r0, r0, #0x1 + adc r1, r1, #0x0 + stmia r4, {r0-r1} + bl __fpclassifyf + cmp r0, #0x2 + beq _020E9934 + b _020E975C +_020E9744: + ldr r1, [r4, #0x0] + ldr r0, [r4, #0x4] + subs r1, r1, #0x1 + sbc r0, r0, #0x0 + str r1, [r4, #0x0] + str r0, [r4, #0x4] +_020E975C: + ldr r1, [sp, #0x0] + ldr r2, [sp, #0x4] + add r0, sp, #0x64 + bl __num2dec_internal +_020E976C: ; 0x020E976C + cmp r5, #0x0 + beq _020E9788 + add r0, sp, #0x64 + add r1, sp, #0xd6 + bl __less_dec +_020E9780: ; 0x020E9780 + cmp r0, #0x0 + beq _020E98AC +_020E9788: + cmp r5, #0x0 + bne _020E9864 + add r0, sp, #0xd6 + add r1, sp, #0x64 + bl __less_dec +_020E979C: ; 0x020E979C + cmp r0, #0x0 + bne _020E9864 + add r3, sp, #0x8a + add r5, sp, #0x3e + mov r2, #0x9 +_020E97B0: + ldrh r1, [r3, #0x0] + ldrh r0, [r3, #0x2] + add r3, r3, #0x4 + strh r1, [r5, #0x0] + strh r0, [r5, #0x2] + add r5, r5, #0x4 + subs r2, r2, #0x1 + bne _020E97B0 + ldrh r0, [r3, #0x0] + add r3, sp, #0x64 + add r4, sp, #0x8a + strh r0, [r5, #0x0] + mov r2, #0x9 +_020E97E4: + ldrh r1, [r3, #0x0] + ldrh r0, [r3, #0x2] + add r3, r3, #0x4 + strh r1, [r4, #0x0] + strh r0, [r4, #0x2] + add r4, r4, #0x4 + subs r2, r2, #0x1 + bne _020E97E4 + ldrh r0, [r3, #0x0] + add r3, sp, #0x3e + add r5, sp, #0x64 + strh r0, [r4, #0x0] + mov r2, #0x9 +_020E9818: + ldrh r1, [r3, #0x0] + ldrh r0, [r3, #0x2] + add r3, r3, #0x4 + strh r1, [r5, #0x0] + strh r0, [r5, #0x2] + add r5, r5, #0x4 + subs r2, r2, #0x1 + bne _020E9818 + ldrh r4, [r3, #0x0] + ldr r3, [sp, #0x8] + ldr r1, [sp, #0x0] + ldr r2, [sp, #0xc] + ldr r0, [sp, #0x4] + strh r4, [r5, #0x0] + str r1, [sp, #0x8] + str r0, [sp, #0xc] + str r3, [sp, #0x0] + str r2, [sp, #0x4] + b _020E98AC +_020E9864: + add r7, sp, #0x64 + add r3, sp, #0x8a + mov r2, #0x9 +_020E9870: + ldrh r1, [r7, #0x0] + ldrh r0, [r7, #0x2] + add r7, r7, #0x4 + strh r1, [r3, #0x0] + strh r0, [r3, #0x2] + add r3, r3, #0x4 + subs r2, r2, #0x1 + bne _020E9870 + ldrh r2, [r7, #0x0] + ldr r1, [sp, #0x0] + ldr r0, [sp, #0x4] + strh r2, [r3, #0x0] + str r1, [sp, #0x8] + str r0, [sp, #0xc] + b _020E971C +_020E98AC: + add r0, sp, #0x3e + add r1, sp, #0xd6 + add r2, sp, #0x8a + bl __minus_dec + add r0, sp, #0x18 + add r1, sp, #0x64 + add r2, sp, #0xd6 + bl __minus_dec + add r0, sp, #0x3e + add r1, sp, #0x18 + bl __equals_dec +_020E98D8: ; 0x020E98D8 + cmp r0, #0x0 + beq _020E9910 + ldr r1, [sp, #0x8] + ldr r0, [sp, #0xc] + and r1, r1, #0x1 + and r0, r0, #0x0 + cmp r0, #0x0 + cmpeq r1, #0x0 + beq _020E9934 + ldr r1, [sp, #0x0] + ldr r0, [sp, #0x4] + str r1, [sp, #0x8] + str r0, [sp, #0xc] + b _020E9934 +_020E9910: + add r0, sp, #0x3e + add r1, sp, #0x18 + bl __less_dec +_020E991C: ; 0x020E991C + cmp r0, #0x0 + bne _020E9934 + ldr r1, [sp, #0x0] + ldr r0, [sp, #0x4] + str r1, [sp, #0x8] + str r0, [sp, #0xc] +_020E9934: + ldrsb r0, [sp, #0xd6] + cmp r0, #0x0 + beq _020E995C + mov r0, #0x0 + ldr r2, [sp, #0x8] + ldr r3, [sp, #0xc] + mov r1, r0 + bl _dsub + str r0, [sp, #0x8] + str r1, [sp, #0xc] +_020E995C: + ldr r0, [sp, #0x8] + ldr r1, [sp, #0xc] + add sp, sp, #0xfc + ldmia sp!, {r4-r11,pc} + .balign 4 +_020E996C: .word 0x3FF00000 +_020E9970: .word 0xBFF00000 +_020E9974: .word 0x02106B74 +_020E9978: .word 0x7FF00000 +_020E997C: .word 0x02106F5C +_020E9980: .word 0x02106E48 +_020E9984: .word 0x40140000 +_020E9988: .word 0x7FEFFFFF + + arm_func_start __msl_generic_count_bits64 +__msl_generic_count_bits64: ; 0x020E998C + mov r3, r0, lsr #0x1 + ldr r2, _020E9A14 ; =0x55555555 + orr r3, r3, r1, lsl #0x1f + and r3, r3, r2 + subs r12, r0, r3 + and r2, r2, r1, lsr #0x1 + ldr r0, _020E9A18 ; =0x33333333 + sbc r3, r1, r2 + mov r1, r12, lsr #0x2 + orr r1, r1, r3, lsl #0x1e + and r2, r12, r0 + and r1, r1, r0 + adds r2, r2, r1 + and r1, r3, r0 + and r0, r0, r3, lsr #0x2 + adc r1, r1, r0 + mov r0, r2, lsr #0x4 + orr r0, r0, r1, lsl #0x1c + adds r2, r2, r0 + ldr r0, _020E9A1C ; =0x0F0F0F0F + adc r1, r1, r1, lsr #0x4 + and r3, r2, r0 + and r2, r1, r0 + mov r0, r3, lsr #0x8 + orr r0, r0, r2, lsl #0x18 + adds r1, r3, r0 + adc r2, r2, r2, lsr #0x8 + mov r0, r1, lsr #0x10 + orr r0, r0, r2, lsl #0x10 + adds r1, r1, r0 + adc r0, r2, r2, lsr #0x10 + adds r0, r1, r0 + and r0, r0, #0xff + bx lr + .balign 4 +_020E9A14: .word 0x55555555 +_020E9A18: .word 0x33333333 +_020E9A1C: .word 0x0F0F0F0F + + arm_func_start __signbitf +__signbitf: + stmdb sp!, {r0-r3} + ldr r0, [sp, #0x4] + and r0, r0, #0x80000000 + add sp, sp, #0x10 + bx lr + + arm_func_start __fpclassifyf +__fpclassifyf: ; 0x020E9A34 + stmdb sp!, {r0-r3} + ldr r2, [sp, #0x4] + ldr r0, _020E9A9C ; =0x7FF00000 + ands r1, r2, r0 + beq _020E9A70 + cmp r1, r0 + bne _020E9A90 + ldr r0, _020E9AA0 ; =0x000FFFFF + tst r2, r0 + ldreq r0, [sp, #0x0] + add sp, sp, #0x10 + cmpeq r0, #0x0 + movne r0, #0x1 + moveq r0, #0x2 + bx lr +_020E9A70: + ldr r0, _020E9AA0 ; =0x000FFFFF + tst r2, r0 + ldreq r0, [sp, #0x0] + add sp, sp, #0x10 + cmpeq r0, #0x0 + movne r0, #0x5 + moveq r0, #0x3 + bx lr +_020E9A90: + mov r0, #0x4 + add sp, sp, #0x10 + bx lr + .balign 4 +_020E9A9C: .word 0x7FF00000 +_020E9AA0: .word 0x000FFFFF + + arm_func_start scalbn +scalbn: ; 0x020E9AA4 + stmdb sp!, {r3-r4,lr} + sub sp, sp, #0x4 + mov r4, r2 + add r2, sp, #0x0 + bl frexp + ldr r2, [sp, #0x0] + add r2, r2, r4 + str r2, [sp, #0x0] + bl ldexp + add sp, sp, #0x4 + ldmia sp!, {r3-r4,pc} + + arm_func_start stricmp +stricmp: ; 0x020E9AD0 + stmdb sp!, {r3,lr} + ldr r3, _020E9B34 ; =0x0210420C +_020E9AD8: + ldrb r2, [r0], #0x1 + cmp r2, #0x0 + blt _020E9AF0 + cmp r2, #0x80 + bge _020E9AF0 + ldrb r2, [r3, r2] +_020E9AF0: + ldrb lr, [r1], #0x1 + and r12, r2, #0xff + cmp lr, #0x0 + blt _020E9B0C + cmp lr, #0x80 + bge _020E9B0C + ldrb lr, [r3, lr] +_020E9B0C: + and r2, lr, #0xff + cmp r12, r2 + mvncc r0, #0x0 + ldmccia sp!, {r3,pc} +_020E9B1C: ; 0x020E9B1C + movhi r0, #0x1 + ldmhiia sp!, {r3,pc} +_020E9B24: ; 0x020E9B24 + cmp r12, #0x0 + bne _020E9AD8 + mov r0, #0x0 + ldmia sp!, {r3,pc} + .balign 4 +_020E9B34: .word 0x0210420C + + arm_func_start strnicmp +strnicmp: ; 0x020E9B38 + ldr ip, _020E9B40 ; =stricmp + bx r12 + .balign 4 +_020E9B40: .word stricmp diff --git a/arm9/asm/libmwcc.s b/arm9/asm/libmwcc.s new file mode 100644 index 00000000..707c32e3 --- /dev/null +++ b/arm9/asm/libmwcc.s @@ -0,0 +1,3149 @@ + .include "asm/macros.inc" + .include "global.inc" + .section .text + .balign 4, 0 + + arm_func_start _dadd +_dadd: + stmdb sp!, {r4,lr} + eors r12, r1, r3 + eormi r3, r3, #0x80000000 + bmi _020EA5DC +_020E9B54: + subs r12, r0, r2 + sbcs lr, r1, r3 + bhs _020E9B70 + adds r2, r2, r12 + adc r3, r3, lr + subs r0, r0, r12 + sbc r1, r1, lr +_020E9B70: + mov lr, #0x80000000 + mov r12, r1, lsr #0x14 + orr r1, lr, r1, lsl #0xb + orr r1, r1, r0, lsr #0x15 + mov r0, r0, lsl #0xb + movs r4, r12, lsl #0x15 + cmnne r4, #0x200000 + beq _020E9C6C + mov r4, r3, lsr #0x14 + orr r3, lr, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs lr, r4, lsl #0x15 + beq _020E9CB4 +_020E9BA8: + subs r4, r12, r4 + beq _020E9C00 + cmp r4, #0x20 + ble _020E9BE4 + cmp r4, #0x38 + movge r4, #0x3f + sub r4, r4, #0x20 + rsb lr, r4, #0x20 + orrs lr, r2, r3, lsl lr + mov r2, r3, lsr r4 + orrne r2, r2, #0x1 + adds r0, r0, r2 + adcs r1, r1, #0x0 + blo _020E9C28 + b _020E9C0C +_020E9BE4: + rsb lr, r4, #0x20 + movs lr, r2, lsl lr + rsb lr, r4, #0x20 + mov r2, r2, lsr r4 + orr r2, r2, r3, lsl lr + mov r3, r3, lsr r4 + orrne r2, r2, #0x1 +_020E9C00: + adds r0, r0, r2 + adcs r1, r1, r3 + blo _020E9C28 +_020E9C0C: + add r12, r12, #0x1 + and r4, r0, #0x1 + movs r1, r1, rrx + orr r0, r4, r0, rrx + mov lr, r12, lsl #0x15 + cmn lr, #0x200000 + beq _020E9E38 +_020E9C28: + movs r2, r0, lsl #0x15 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + mov r1, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + tst r2, #0x80000000 + ldmeqia sp!, {r4,lr} + bxeq lr + movs r2, r2, lsl #0x1 + andeqs r2, r0, #0x1 + ldmeqia sp!, {r4,lr} + bxeq lr + adds r0, r0, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4,lr} + bx lr +_020E9C6C: + cmp r12, #0x800 + movge lr, #0x80000000 + movlt lr, #0x0 + bics r12, r12, #0x800 + beq _020E9CD8 + orrs r4, r0, r1, lsl #0x1 + bne _020E9E14 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r4, r4, lsl #0x15 + beq _020E9E00 + cmn r4, #0x200000 + bne _020E9E00 + orrs r4, r2, r3, lsl #0x1 + beq _020E9E00 + b _020E9E14 +_020E9CB4: + cmp r4, #0x800 + movge lr, #0x80000000 + movlt lr, #0x0 + bic r12, r12, #0x800 + bics r4, r4, #0x800 + beq _020E9D44 + orrs r4, r2, r3, lsl #0x1 + bne _020E9E14 + b _020E9E00 +_020E9CD8: + orrs r4, r0, r1, lsl #0x1 + beq _020E9D18 + mov r12, #0x1 + bic r1, r1, #0x80000000 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r4, r4, lsl #0x15 + cmnne r4, #0x200000 + mov r4, r4, lsr #0x15 + orr r4, r4, lr, lsr #0x14 + beq _020E9CB4 + orr r3, r3, #0x80000000 + orr r12, r12, lr, lsr #0x14 + b _020E9BA8 +_020E9D18: + mov r12, r3, lsr #0x14 + mov r1, r3, lsl #0xb + orr r1, r1, r2, lsr #0x15 + mov r0, r2, lsl #0xb + movs r4, r12, lsl #0x15 + beq _020E9DCC + cmn r4, #0x200000 + bne _020E9DCC + orrs r4, r0, r1, lsl #0x1 + beq _020E9E00 + b _020E9E18 +_020E9D44: + orrs r4, r2, r3, lsl #0x1 + beq _020E9DDC + mov r4, #0x1 + bic r3, r3, #0x80000000 + cmp r1, #0x0 + bpl _020E9D68 + orr r12, r12, lr, lsr #0x14 + orr r4, r4, lr, lsr #0x14 + b _020E9BA8 +_020E9D68: + adds r0, r0, r2 + adcs r1, r1, r3 + blo _020E9D88 + add r12, r12, #0x1 + and r4, r0, #0x1 + movs r1, r1, rrx + mov r0, r0, rrx + orr r0, r0, r4 +_020E9D88: + cmp r1, #0x0 + subges r12, r12, #0x1 + movs r2, r0, lsl #0x15 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, lr, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + ldmeqia sp!, {r4,lr} + bxeq lr + tst r2, #0x80000000 + ldmeqia sp!, {r4,lr} + bxeq lr + movs r2, r2, lsl #0x1 + andeqs r2, r0, #0x1 + ldmeqia sp!, {r4,lr} + bxeq lr +_020E9DCC: + mov r1, r3 + mov r0, r2 + ldmia sp!, {r4,lr} + bx lr +_020E9DDC: + cmp r1, #0x0 + subges r12, r12, #0x1 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, lr, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + ldmia sp!, {r4,lr} + bx lr +_020E9E00: + ldr r1, _020E9E58 ; =0x7FF00000 + orr r1, lr, r1 + mov r0, #0x0 + ldmia sp!, {r4,lr} + bx lr +_020E9E14: + mov r1, r3 +_020E9E18: + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4,lr} + bx lr +_020E9E28: ; 0x020E9E28 + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4,lr} + bx lr +_020E9E38: + cmp r12, #0x800 + movge lr, #0x80000000 + movlt lr, #0x0 + ldr r1, _020E9E58 ; =0x7FF00000 + orr r1, lr, r1 + mov r0, #0x0 + ldmia sp!, {r4,lr} + bx lr + .balign 4 +_020E9E58: .word 0x7FF00000 + + arm_func_start _d2f +_d2f: + and r2, r1, #0x80000000 + mov r12, r1, lsr #0x14 + bics r12, r12, #0x800 + beq _020E9ED4 + mov r3, r12, lsl #0x15 + cmn r3, #0x200000 + bhs _020E9EB8 + subs r12, r12, #0x380 + bls _020E9EE4 + cmp r12, #0xff + bge _020E9F54 + mov r1, r1, lsl #0xc + orr r3, r2, r1, lsr #0x9 + orr r3, r3, r0, lsr #0x1d + movs r1, r0, lsl #0x3 + orr r0, r3, r12, lsl #0x17 + bxeq lr + tst r1, #0x80000000 + bxeq lr + movs r1, r1, lsl #0x1 + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020E9EB8: + orrs r3, r0, r1, lsl #0xc + bne _020E9ECC + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020E9ECC: + mvn r0, #0x80000000 + bx lr +_020E9ED4: + orrs r3, r0, r1, lsl #0xc + bne _020E9F4C + mov r0, r2 + bx lr +_020E9EE4: + cmn r12, #0x17 + beq _020E9F38 + bmi _020E9F4C + mov r1, r1, lsl #0xb + orr r1, r1, #0x80000000 + mov r3, r1, lsr #0x8 + orr r3, r3, r0, lsr #0x1d + rsb r12, r12, #0x1 + movs r1, r0, lsl #0x3 + orr r0, r2, r3, lsr r12 + rsb r12, r12, #0x20 + mov r3, r3, lsl r12 + orrne r3, r3, #0x1 + movs r1, r3 + bxeq lr + tst r1, #0x80000000 + bxeq lr + movs r1, r1, lsl #0x1 + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020E9F38: + orr r0, r0, r1, lsl #0xc + movs r1, r0 + mov r0, r2 + addne r0, r0, #0x1 + bx lr +_020E9F4C: + mov r0, r2 + bx lr +_020E9F54: + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr + + arm_func_start _dfix +_dfix: ; 0x020E9F60 + bic r3, r1, #0x80000000 + ldr r2, _020E9FA8 ; =0x0000041E + subs r2, r2, r3, lsr #0x14 + ble _020E9F9C + cmp r2, #0x20 + bge _020E9F94 + mov r3, r1, lsl #0xb + orr r3, r3, #0x80000000 + orr r3, r3, r0, lsr #0x15 + cmp r1, #0x0 + mov r0, r3, lsr r2 + rsbmi r0, r0, #0x0 + bx lr +_020E9F94: + mov r0, #0x0 + bx lr +_020E9F9C: + mvn r0, r1, asr #0x1f + add r0, r0, #0x80000000 + bx lr + .balign 4 +_020E9FA8: .word 0x0000041E + + arm_func_start _ll_ufrom_d +_ll_ufrom_d: ; 0x020E9FAC + tst r1, #0x80000000 + bne _020EA010 + ldr r2, _020EA034 ; =0x0000043E + subs r2, r2, r1, lsr #0x14 + blt _020EA028 + cmp r2, #0x40 + bge _020EA004 + mov r12, r1, lsl #0xb + orr r12, r12, #0x80000000 + orr r12, r12, r0, lsr #0x15 + cmp r2, #0x20 + ble _020E9FEC + sub r2, r2, #0x20 + mov r1, #0x0 + mov r0, r12, lsr r2 + bx lr +_020E9FEC: + mov r3, r0, lsl #0xb + mov r1, r12, lsr r2 + mov r0, r3, lsr r2 + rsb r2, r2, #0x20 + orr r0, r0, r12, lsl r2 + bx lr +_020EA004: + mov r1, #0x0 + mov r0, #0x0 + bx lr +_020EA010: + cmn r1, #0x100000 + cmpeq r0, #0x0 + bhi _020EA028 + mov r1, #0x0 + mov r0, #0x0 + bx lr +_020EA028: + mvn r1, #0x0 + mvn r0, #0x0 + bx lr + .balign 4 +_020EA034: .word 0x0000043E + + arm_func_start _dflt +_dflt: ; 0x020EA038 + ands r2, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r0, #0x0 + mov r1, #0x0 + bxeq lr + mov r3, #0x400 + add r3, r3, #0x1e + clz r12, r0 + movs r0, r0, lsl r12 + sub r3, r3, r12 + movs r1, r0 + mov r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, r2, r1, lsr #0xc + orr r1, r1, r3, lsl #0x14 + bx lr + + arm_func_start _dfltu +_dfltu: ; 0x020EA078 + cmp r0, #0x0 + mov r1, #0x0 + bxeq lr + mov r3, #0x400 + add r3, r3, #0x1e + bmi _020EA09C + clz r12, r0 + movs r0, r0, lsl r12 + sub r3, r3, r12 +_020EA09C: + mov r1, r0 + mov r0, r1, lsl #0x15 + add r1, r1, r1 + mov r1, r1, lsr #0xc + orr r1, r1, r3, lsl #0x14 + bx lr + + arm_func_start _dmul +_dmul: ; 0x020EA0B4 + stmdb sp!, {r4-r7,lr} + eor lr, r1, r3 + and lr, lr, #0x80000000 + mov r12, r1, lsr #0x14 + mov r1, r1, lsl #0xb + orr r1, r1, r0, lsr #0x15 + mov r0, r0, lsl #0xb + movs r6, r12, lsl #0x15 + cmnne r6, #0x200000 + beq _020EA1BC + orr r1, r1, #0x80000000 + bic r12, r12, #0x800 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r5, r4, lsl #0x15 + cmnne r5, #0x200000 + beq _020EA204 + orr r3, r3, #0x80000000 + bic r4, r4, #0x800 +_020EA108: + add r12, r4, r12 + umull r5, r4, r0, r2 + umull r7, r6, r0, r3 + adds r4, r7, r4 + adc r6, r6, #0x0 + umull r7, r0, r1, r2 + adds r4, r7, r4 + adcs r0, r0, r6 + umull r7, r2, r1, r3 + adc r1, r2, #0x0 + adds r0, r0, r7 + adc r1, r1, #0x0 + orrs r4, r4, r5 + orrne r0, r0, #0x1 + cmp r1, #0x0 + blt _020EA154 + sub r12, r12, #0x1 + adds r0, r0, r0 + adc r1, r1, r1 +_020EA154: + add r12, r12, #0x2 + subs r12, r12, #0x400 + bmi _020EA2F0 + beq _020EA2F0 + mov r6, r12, lsl #0x14 + cmn r6, #0x100000 + bmi _020EA3F0 + movs r2, r0, lsl #0x15 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, lr, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + tst r2, #0x80000000 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + movs r2, r2, lsl #0x1 + andeqs r2, r0, #0x1 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + adds r0, r0, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA1BC: + bics r12, r12, #0x800 + beq _020EA218 + orrs r6, r0, r1, lsl #0x1 + bne _020EA3A4 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r5, r4, lsl #0x15 + beq _020EA1F8 + cmn r5, #0x200000 + bne _020EA390 + orrs r5, r2, r3, lsl #0x1 + beq _020EA390 + b _020EA3A4 +_020EA1F8: + orrs r5, r3, r2 + beq _020EA3B8 + b _020EA390 +_020EA204: + bics r4, r4, #0x800 + beq _020EA2AC + orrs r6, r2, r3, lsl #0x1 + bne _020EA3A4 + b _020EA390 +_020EA218: + orrs r6, r0, r1, lsl #0x1 + beq _020EA280 + mov r12, #0x1 + cmp r1, #0x0 + bne _020EA23C + sub r12, r12, #0x20 + movs r1, r0 + mov r0, #0x0 + bmi _020EA258 +_020EA23C: + clz r6, r1 + movs r1, r1, lsl r6 + rsb r6, r6, #0x20 + orr r1, r1, r0, lsr r6 + rsb r6, r6, #0x20 + mov r0, r0, lsl r6 + sub r12, r12, r6 +_020EA258: + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r5, r4, lsl #0x15 + cmnne r5, #0x200000 + beq _020EA204 + orr r3, r3, #0x80000000 + bic r4, r4, #0x800 + b _020EA108 +_020EA280: + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r5, r4, lsl #0x15 + beq _020EA404 + cmn r5, #0x200000 + bne _020EA404 + orrs r6, r2, r3, lsl #0x1 + beq _020EA3B8 + b _020EA3A4 +_020EA2AC: + orrs r5, r2, r3, lsl #0x1 + beq _020EA404 + mov r4, #0x1 + cmp r3, #0x0 + bne _020EA2D0 + sub r4, r4, #0x20 + movs r3, r2 + mov r2, #0x0 + bmi _020EA108 +_020EA2D0: + clz r6, r3 + movs r3, r3, lsl r6 + rsb r6, r6, #0x20 + orr r3, r3, r2, lsr r6 + rsb r6, r6, #0x20 + mov r2, r2, lsl r6 + sub r4, r4, r6 + b _020EA108 +_020EA2F0: + cmn r12, #0x34 + beq _020EA388 + bmi _020EA3E0 + mov r2, r1 + mov r3, r0 + add r4, r12, #0x34 + cmp r4, #0x20 + movge r2, r3 + movge r3, #0x0 + subge r4, r4, #0x20 + rsb r5, r4, #0x20 + mov r2, r2, lsl r4 + orr r2, r2, r3, lsr r5 + movs r3, r3, lsl r4 + orrne r2, r2, #0x1 + rsb r12, r12, #0xc + cmp r12, #0x20 + movge r0, r1 + movge r1, #0x0 + subge r12, r12, #0x20 + rsb r4, r12, #0x20 + mov r0, r0, lsr r12 + orr r0, r0, r1, lsl r4 + orr r1, lr, r1, lsr r12 + cmp r2, #0x0 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + tst r2, #0x80000000 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + movs r2, r2, lsl #0x1 + andeqs r2, r0, #0x1 + ldmeqia sp!, {r4-r7,lr} + bxeq lr + adds r0, r0, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA388: + orr r0, r0, r1, lsl #0x1 + b _020EA3C8 +_020EA390: + ldr r1, _020EA414 ; =0x7FF00000 + orr r1, lr, r1 + mov r0, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA3A4: + mov r1, r3 + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA3B8: + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA3C8: + movs r2, r0 + mov r1, lr + mov r0, #0x0 + addne r0, r0, #0x1 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA3E0: + mov r1, lr + mov r0, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA3F0: + ldr r1, _020EA414 ; =0x7FF00000 + orr r1, lr, r1 + mov r0, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr +_020EA404: + mov r1, lr + mov r0, #0x0 + ldmia sp!, {r4-r7,lr} + bx lr + .balign 4 +_020EA414: .word 0x7FF00000 + + arm_func_start _dsqrt +_dsqrt: ; 0x020EA418 + stmdb sp!, {r4-r6,lr} + ldr r2, _020EA5A8 ; =0x7FF00000 + cmp r1, r2 + bhs _020EA564 + movs r12, r1, lsr #0x14 + beq _020EA510 + bic r1, r1, r2 + orr r1, r1, #0x100000 +_020EA438: + movs r12, r12, asr #0x1 + bhs _020EA44C + sub r12, r12, #0x1 + movs r0, r0, lsl #0x1 + adc r1, r1, r1 +_020EA44C: + movs r3, r0, lsl #0x1 + adc r1, r1, r1 + mov r2, #0x0 + mov r4, #0x0 + mov lr, #0x200000 +_020EA460: + add r6, r4, lr + cmp r6, r1 + addle r4, r6, lr + suble r1, r1, r6 + addle r2, r2, lr + movs r3, r3, lsl #0x1 + adc r1, r1, r1 + movs lr, lr, lsr #0x1 + bne _020EA460 + mov r0, #0x0 + mov r5, #0x0 + cmp r1, r4 + cmpeq r3, #0x80000000 + blo _020EA4A8 + subs r3, r3, #0x80000000 + sbc r1, r1, r4 + add r4, r4, #0x1 + mov r0, #0x80000000 +_020EA4A8: + movs r3, r3, lsl #0x1 + adc r1, r1, r1 + mov lr, #0x40000000 +_020EA4B4: + add r6, r5, lr + cmp r4, r1 + cmpeq r6, r3 + bhi _020EA4D4 + add r5, r6, lr + subs r3, r3, r6 + sbc r1, r1, r4 + add r0, r0, lr +_020EA4D4: + movs r3, r3, lsl #0x1 + adc r1, r1, r1 + movs lr, lr, lsr #0x1 + bne _020EA4B4 + orrs r1, r1, r3 + biceq r0, r0, #0x1 + movs r1, r2, lsr #0x1 + movs r0, r0, rrx + adcs r0, r0, #0x0 + adc r1, r1, #0x0 + add r1, r1, #0x20000000 + sub r1, r1, #0x100000 + add r1, r1, r12, lsl #0x14 + ldmia sp!, {r4-r6,lr} + bx lr +_020EA510: + cmp r1, #0x0 + bne _020EA540 + cmp r0, #0x0 + ldmeqia sp!, {r4-r6,lr} + bxeq lr + mvn r12, #0x13 + clz r5, r0 + movs r0, r0, lsl r5 + sub r12, r12, r5 + mov r1, r0, lsr #0xb + mov r0, r0, lsl #0x15 + b _020EA438 +_020EA540: + clz r2, r1 + movs r1, r1, lsl r2 + rsb r2, r2, #0x2b + mov r1, r1, lsr #0xb + orr r1, r1, r0, lsr r2 + rsb r2, r2, #0x20 + mov r0, r0, lsl r2 + rsb r12, r2, #0x1 + b _020EA438 +_020EA564: + tst r1, #0x80000000 + beq _020EA580 + bics r3, r1, #0x80000000 + cmpeq r0, #0x0 + ldmeqia sp!, {r4-r6,lr} + bxeq lr + b _020EA58C +_020EA580: + orrs r2, r0, r1, lsl #0xc + ldmeqia sp!, {r4-r6,lr} + bxeq lr +_020EA58C: + ldr r2, _020EA5AC ; =0x7FF80000 + orr r1, r1, r2 + ldr r3, _020EA5B0 ; =0x021D74A8 + mov r4, #0x21 + str r4, [r3, #0x0] + ldmia sp!, {r4-r6,lr} + bx lr + .balign 4 +_020EA5A8: .word 0x7FF00000 +_020EA5AC: .word 0x7FF80000 +_020EA5B0: .word 0x021D74A8 + + arm_func_start _drsb +_drsb: ; 0x020EA5B4 + eor r1, r1, r3 + eor r3, r1, r3 + eor r1, r1, r3 + eor r0, r0, r2 + eor r2, r0, r2 + eor r0, r0, r2 + + arm_func_start _dsub +_dsub: + stmdb sp!, {r4,lr} + eors r12, r1, r3 + eormi r3, r3, #0x80000000 + bmi _020E9B54 +_020EA5DC: + subs r12, r0, r2 + sbcs lr, r1, r3 + bhs _020EA5FC + eor lr, lr, #0x80000000 + adds r2, r2, r12 + adc r3, r3, lr + subs r0, r0, r12 + sbc r1, r1, lr +_020EA5FC: + mov lr, #0x80000000 + mov r12, r1, lsr #0x14 + orr r1, lr, r1, lsl #0xb + orr r1, r1, r0, lsr #0x15 + mov r0, r0, lsl #0xb + movs r4, r12, lsl #0x15 + cmnne r4, #0x200000 + beq _020EA800 + mov r4, r3, lsr #0x14 + orr r3, lr, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs lr, r4, lsl #0x15 + beq _020EA848 +_020EA634: + subs r4, r12, r4 + beq _020EA6DC + cmp r4, #0x20 + ble _020EA670 + cmp r4, #0x38 + movge r4, #0x3f + sub r4, r4, #0x20 + rsb lr, r4, #0x20 + orrs lr, r2, r3, lsl lr + mov r2, r3, lsr r4 + orrne r2, r2, #0x1 + subs r0, r0, r2 + sbcs r1, r1, #0x0 + bmi _020EA698 + b _020EA788 +_020EA670: + rsb lr, r4, #0x20 + movs lr, r2, lsl lr + rsb lr, r4, #0x20 + mov r2, r2, lsr r4 + orr r2, r2, r3, lsl lr + mov r3, r3, lsr r4 + orrne r2, r2, #0x1 + subs r0, r0, r2 + sbcs r1, r1, r3 + bpl _020EA788 +_020EA698: + movs r2, r0, lsl #0x15 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + mov r1, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + tst r2, #0x80000000 + ldmeqia sp!, {r4,lr} + bxeq lr + movs r2, r2, lsl #0x1 + andeqs r2, r0, #0x1 + ldmeqia sp!, {r4,lr} + bxeq lr + adds r0, r0, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4,lr} + bx lr +_020EA6DC: + subs r0, r0, r2 + sbc r1, r1, r3 + orrs lr, r1, r0 + beq _020EA96C + mov lr, r12, lsl #0x14 + and lr, lr, #0x80000000 + bic r12, r12, #0x800 + cmp r1, #0x0 + bmi _020EA764 + bne _020EA714 + sub r12, r12, #0x20 + movs r1, r0 + mov r0, #0x0 + bmi _020EA730 +_020EA714: + clz r4, r1 + movs r1, r1, lsl r4 + rsb r4, r4, #0x20 + orr r1, r1, r0, lsr r4 + rsb r4, r4, #0x20 + mov r0, r0, lsl r4 + sub r12, r12, r4 +_020EA730: + cmp r12, #0x0 + bgt _020EA76C + rsb r12, r12, #0xc + cmp r12, #0x20 + movge r0, r1 + movge r1, #0x0 + subge r12, r12, #0x20 + rsb r4, r12, #0x20 + mov r0, r0, lsr r12 + orr r0, r0, r1, lsl r4 + orr r1, lr, r1, lsr r12 + ldmia sp!, {r4,lr} + bx lr +_020EA764: + cmp r1, #0x0 + subges r12, r12, #0x1 +_020EA76C: + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, lr, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + ldmia sp!, {r4,lr} + bx lr +_020EA788: + mov lr, r12, lsl #0x14 + and lr, lr, #0x80000000 + bic r12, r12, #0x800 + cmp r1, #0x0 + bne _020EA7AC + sub r12, r12, #0x20 + movs r1, r0 + mov r0, #0x0 + bmi _020EA7C8 +_020EA7AC: + clz r4, r1 + movs r1, r1, lsl r4 + rsb r4, r4, #0x20 + orr r1, r1, r0, lsr r4 + rsb r4, r4, #0x20 + mov r0, r0, lsl r4 + sub r12, r12, r4 +_020EA7C8: + cmp r12, #0x0 + orrgt r12, r12, lr, lsr #0x14 + bgt _020EA698 + rsb r12, r12, #0xc + cmp r12, #0x20 + movge r0, r1 + movge r1, #0x0 + subge r12, r12, #0x20 + rsb r4, r12, #0x20 + mov r0, r0, lsr r12 + orr r0, r0, r1, lsl r4 + orr r1, lr, r1, lsr r12 + ldmia sp!, {r4,lr} + bx lr +_020EA800: + cmp r12, #0x800 + movge lr, #0x80000000 + movlt lr, #0x0 + bics r12, r12, #0x800 + beq _020EA86C + orrs r4, r0, r1, lsl #0x1 + bne _020EA948 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r4, r4, lsl #0x15 + beq _020EA934 + cmn r4, #0x200000 + bne _020EA934 + orrs r4, r2, r3, lsl #0x1 + beq _020EA95C + b _020EA948 +_020EA848: + cmp r4, #0x800 + movge lr, #0x80000000 + movlt lr, #0x0 + bic r12, r12, #0x800 + bics r4, r4, #0x800 + beq _020EA8E4 + orrs r4, r2, r3, lsl #0x1 + bne _020EA948 + b _020EA934 +_020EA86C: + orrs r4, r0, r1, lsl #0x1 + beq _020EA8AC + mov r12, #0x1 + bic r1, r1, #0x80000000 + mov r4, r3, lsr #0x14 + mov r3, r3, lsl #0xb + orr r3, r3, r2, lsr #0x15 + mov r2, r2, lsl #0xb + movs r4, r4, lsl #0x15 + cmnne r4, #0x200000 + mov r4, r4, lsr #0x15 + orr r4, r4, lr, lsr #0x14 + beq _020EA848 + orr r3, r3, #0x80000000 + orr r12, r12, lr, lsr #0x14 + b _020EA634 +_020EA8AC: + mov r12, r3, lsr #0x14 + mov r1, r3, lsl #0xb + orr r1, r1, r2, lsr #0x15 + mov r0, r2, lsl #0xb + movs r4, r12, lsl #0x15 + beq _020EA8D8 + cmn r4, #0x200000 + bne _020EA900 + orrs r4, r0, r1, lsl #0x1 + bne _020EA94C + b _020EA934 +_020EA8D8: + orrs r4, r0, r1, lsl #0x1 + beq _020EA96C + b _020EA900 +_020EA8E4: + orrs r4, r2, r3, lsl #0x1 + beq _020EA910 + mov r4, #0x1 + bic r3, r3, #0x80000000 + orr r12, r12, lr, lsr #0x14 + orr r4, r4, lr, lsr #0x14 + b _020EA634 +_020EA900: + mov r1, r3 + mov r0, r2 + ldmia sp!, {r4,lr} + bx lr +_020EA910: + cmp r1, #0x0 + subges r12, r12, #0x1 + mov r0, r0, lsr #0xb + orr r0, r0, r1, lsl #0x15 + add r1, r1, r1 + orr r1, lr, r1, lsr #0xc + orr r1, r1, r12, lsl #0x14 + ldmia sp!, {r4,lr} + bx lr +_020EA934: + ldr r1, _020EA97C ; =0x7FF00000 + orr r1, lr, r1 + mov r0, #0x0 + ldmia sp!, {r4,lr} + bx lr +_020EA948: + mov r1, r3 +_020EA94C: + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4,lr} + bx lr +_020EA95C: + mvn r0, #0x0 + bic r1, r0, #0x80000000 + ldmia sp!, {r4,lr} + bx lr +_020EA96C: + mov r1, #0x0 + mov r0, #0x0 + ldmia sp!, {r4,lr} + bx lr + .balign 4 +_020EA97C: .word 0x7FF00000 + + arm_func_start _fadd +_fadd: ; 0x020EA980 + eors r2, r0, r1 + eormi r1, r1, #0x80000000 + bmi _020EB7BC +_020EA98C: + subs r12, r0, r1 + subcc r0, r0, r12 + addcc r1, r1, r12 + mov r2, #0x80000000 + mov r3, r0, lsr #0x17 + orr r0, r2, r0, lsl #0x8 + ands r12, r3, #0xff + cmpne r12, #0xff + beq _020EAA20 + mov r12, r1, lsr #0x17 + orr r1, r2, r1, lsl #0x8 + ands r2, r12, #0xff + beq _020EAA60 +_020EA9C0: + subs r12, r3, r12 + beq _020EA9D8 + rsb r2, r12, #0x20 + movs r2, r1, lsl r2 + mov r1, r1, lsr r12 + orrne r1, r1, #0x1 +_020EA9D8: + adds r0, r0, r1 + blo _020EA9F8 + and r1, r0, #0x1 + orr r0, r1, r0, rrx + add r3, r3, #0x1 + and r2, r3, #0xff + cmp r2, #0xff + beq _020EAB68 +_020EA9F8: + ands r1, r0, #0xff + add r0, r0, r0 + mov r0, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + tst r1, #0x80 + bxeq lr + ands r1, r1, #0x7f + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EAA20: + cmp r3, #0x100 + movge r2, #0x80000000 + movlt r2, #0x0 + ands r3, r3, #0xff + beq _020EAA84 + movs r0, r0, lsl #0x1 + bne _020EAB94 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EAB88 + cmp r12, #0xff + blt _020EAB88 + cmp r1, #0x0 + beq _020EAB88 + b _020EAB94 +_020EAA60: + cmp r3, #0x100 + movge r2, #0x80000000 + movlt r2, #0x0 + and r3, r3, #0xff + ands r12, r12, #0xff + beq _020EAAE0 +_020EAA78: + movs r1, r1, lsl #0x1 + bne _020EAB94 + b _020EAB88 +_020EAA84: + movs r0, r0, lsl #0x1 + beq _020EAABC + mov r3, #0x1 + mov r0, r0, lsr #0x1 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x8 + ands r12, r12, #0xff + beq _020EAAE0 + cmp r12, #0xff + beq _020EAA78 + orr r1, r1, #0x80000000 + orr r3, r3, r2, lsr #0x17 + orr r12, r12, r2, lsr #0x17 + b _020EA9C0 +_020EAABC: + mov r3, r1, lsr #0x17 + mov r0, r1, lsl #0x9 + ands r3, r3, #0xff + beq _020EAB48 + cmp r3, #0xff + blt _020EAB48 + cmp r0, #0x0 + beq _020EAB88 + b _020EAB80 +_020EAAE0: + movs r1, r1, lsl #0x1 + beq _020EAB50 + mov r1, r1, lsr #0x1 + mov r12, #0x1 + orr r3, r3, r2, lsr #0x17 + orr r12, r12, r2, lsr #0x17 + cmp r0, #0x0 + bmi _020EA9C0 + adds r0, r0, r1 + blo _020EAB14 + and r1, r0, #0x1 + orr r0, r1, r0, rrx + add r12, r12, #0x1 +_020EAB14: + cmp r0, #0x0 + subge r12, r12, #0x1 + ands r1, r0, #0xff + add r0, r0, r0 + mov r0, r0, lsr #0x9 + orr r0, r0, r12, lsl #0x17 + bxeq lr + tst r1, #0x80 + bxeq lr + ands r1, r1, #0x7f + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EAB48: + mov r0, r1 + bx lr +_020EAB50: + cmp r0, #0x0 + subges r3, r3, #0x1 + add r0, r0, r0 + orr r0, r2, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bx lr +_020EAB68: + cmp r3, #0x100 + movge r2, #0x80000000 + movlt r2, #0x0 + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020EAB80: + mvn r0, #0x80000000 + bx lr +_020EAB88: + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020EAB94: + mvn r0, #0x80000000 + bx lr +_020EAB9C: ; 0x020EAB9C + mvn r0, #0x80000000 + bx lr + + arm_func_start _dgr +_dgr: ; 0x020EABA4 + mov r12, #0x200000 + cmn r12, r1, lsl #0x1 + bhs _020EAC18 + cmn r12, r3, lsl #0x1 + bhs _020EAC2C +_020EABB8: + orrs r12, r3, r1 + bmi _020EABE8 + cmp r1, r3 + cmpeq r0, r2 + movhi r0, #0x1 + movls r0, #0x0 + bx lr +_020EABD4: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EABE8: + orr r12, r0, r12, lsl #0x1 + orrs r12, r12, r2 + moveq r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x20000000 + msr cpsr_f, r12 + bxeq lr + cmp r3, r1 + cmpeq r2, r0 + movhi r0, #0x1 + movls r0, #0x0 + bx lr +_020EAC18: + bne _020EABD4 + cmp r0, #0x0 + bhi _020EABD4 + cmn r12, r3, lsl #0x1 + blo _020EABB8 +_020EAC2C: + bne _020EABD4 + cmp r2, #0x0 + bhi _020EABD4 + b _020EABB8 + + arm_func_start _dleq +_dleq: ; 0x020EAC3C + mov r12, #0x200000 + cmn r12, r1, lsl #0x1 + bhs _020EACBC + cmn r12, r3, lsl #0x1 + bhs _020EACD0 +_020EAC50: + orrs r12, r3, r1 + bmi _020EAC84 + cmp r1, r3 + cmpeq r0, r2 + movls r0, #0x1 + movhi r0, #0x0 + bx lr +_020EAC6C: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x40000000 + orr r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EAC84: + orr r12, r0, r12, lsl #0x1 + orrs r12, r12, r2 + moveq r0, #0x1 + bne _020EACA8 + mrs r12, cpsr + bic r12, r12, #0x20000000 + orr r12, r12, #0x40000000 + msr cpsr_f, r12 + bxeq lr +_020EACA8: + cmp r3, r1 + cmpeq r2, r0 + movls r0, #0x1 + movhi r0, #0x0 + bx lr +_020EACBC: + bne _020EAC6C + cmp r0, #0x0 + bhi _020EAC6C + cmn r12, r3, lsl #0x1 + blo _020EAC50 +_020EACD0: + bne _020EAC6C + cmp r2, #0x0 + bhi _020EAC6C + b _020EAC50 + + arm_func_start _dls +_dls: ; 0x020EACE0 + mov r12, #0x200000 + cmn r12, r1, lsl #0x1 + bhs _020EAD58 + cmn r12, r3, lsl #0x1 + bhs _020EAD6C +_020EACF4: + orrs r12, r3, r1 + bmi _020EAD24 + cmp r1, r3 + cmpeq r0, r2 + movcc r0, #0x1 + movcs r0, #0x0 + bx lr +_020EAD10: + mov r0, #0x0 + mrs r12, cpsr + orr r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EAD24: + orr r12, r0, r12, lsl #0x1 + orrs r12, r12, r2 + moveq r0, #0x0 + bne _020EAD44 + mrs r12, cpsr + orr r12, r12, #0x20000000 + msr cpsr_f, r12 + bxeq lr +_020EAD44: + cmp r3, r1 + cmpeq r2, r0 + movcc r0, #0x1 + movcs r0, #0x0 + bx lr +_020EAD58: + bne _020EAD10 + cmp r0, #0x0 + bhi _020EAD10 + cmn r12, r3, lsl #0x1 + blo _020EACF4 +_020EAD6C: + bne _020EAD10 + cmp r2, #0x0 + bhi _020EAD10 + b _020EACF4 + + arm_func_start _deq +_deq: ; 0x020EAD7C + mov r12, #0x200000 + cmn r12, r1, lsl #0x1 + bhs _020EADE4 + cmn r12, r3, lsl #0x1 + bhs _020EADF8 +_020EAD90: + orrs r12, r3, r1 + bmi _020EADC0 + cmp r1, r3 + cmpeq r0, r2 + moveq r0, #0x1 + movne r0, #0x0 + bx lr +_020EADAC: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr +_020EADC0: + orr r12, r0, r12, lsl #0x1 + orrs r12, r12, r2 + moveq r0, #0x1 + bxeq lr + cmp r3, r1 + cmpeq r2, r0 + moveq r0, #0x1 + movne r0, #0x0 + bx lr +_020EADE4: + bne _020EADAC + cmp r0, #0x0 + bhi _020EADAC + cmn r12, r3, lsl #0x1 + blo _020EAD90 +_020EADF8: + bne _020EADAC + cmp r2, #0x0 + bhi _020EADAC + b _020EAD90 + + arm_func_start _dneq +_dneq: ; 0x020EAE08 + mov r12, #0x200000 + cmn r12, r1, lsl #0x1 + bhs _020EAE70 + cmn r12, r3, lsl #0x1 + bhs _020EAE84 +_020EAE1C: + orrs r12, r3, r1 + bmi _020EAE4C + cmp r1, r3 + cmpeq r0, r2 + movne r0, #0x1 + moveq r0, #0x0 + bx lr +_020EAE38: + mov r0, #0x1 + mrs r12, cpsr + bic r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr +_020EAE4C: + orr r12, r0, r12, lsl #0x1 + orrs r12, r12, r2 + moveq r0, #0x0 + bxeq lr + cmp r3, r1 + cmpeq r2, r0 + movne r0, #0x1 + moveq r0, #0x0 + bx lr +_020EAE70: + bne _020EAE38 + cmp r0, #0x0 + bhi _020EAE38 + cmn r12, r3, lsl #0x1 + blo _020EAE1C +_020EAE84: + bne _020EAE38 + cmp r2, #0x0 + bhi _020EAE38 + b _020EAE1C + + arm_func_start _fgeq +_fgeq: ; 0x020EAE94 + mov r3, #0xff000000 + cmp r3, r0, lsl #0x1 + cmpcs r3, r1, lsl #0x1 + blo _020EAEDC + cmp r0, #0x0 + bicmi r0, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r1, #0x0 + bicmi r1, r1, #0x80000000 + rsbmi r1, r1, #0x0 + cmp r0, r1 + movge r0, #0x1 + movlt r0, #0x0 + mrs r12, cpsr + biclt r12, r12, #0x20000000 + orrge r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EAEDC: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr + + arm_func_start _fgr +_fgr: ; 0x020EAEF0 + mov r3, #0xff000000 + cmp r3, r0, lsl #0x1 + cmpcs r3, r1, lsl #0x1 + blo _020EAF38 + cmp r0, #0x0 + bicmi r0, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r1, #0x0 + bicmi r1, r1, #0x80000000 + rsbmi r1, r1, #0x0 + cmp r0, r1 + movgt r0, #0x1 + movle r0, #0x0 + mrs r12, cpsr + bicle r12, r12, #0x20000000 + orrgt r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EAF38: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr + + arm_func_start _fleq +_fleq: ; 0x020EAF4C + mov r3, #0xff000000 + cmp r3, r0, lsl #0x1 + cmpcs r3, r1, lsl #0x1 + blo _020EAF9C + cmp r0, #0x0 + bicmi r0, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r1, #0x0 + bicmi r1, r1, #0x80000000 + rsbmi r1, r1, #0x0 + cmp r0, r1 + movle r0, #0x1 + movgt r0, #0x0 + mrs r12, cpsr + orrgt r12, r12, #0x20000000 + bicgt r12, r12, #0x40000000 + bicle r12, r12, #0x20000000 + orrle r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr +_020EAF9C: + mov r0, #0x0 + mrs r12, cpsr + bic r12, r12, #0x40000000 + orr r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr + + arm_func_start _fls +_fls: ; 0x020EAFB4 + mov r3, #0xff000000 + cmp r3, r0, lsl #0x1 + cmpcs r3, r1, lsl #0x1 + blo _020EAFFC + cmp r0, #0x0 + bicmi r0, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r1, #0x0 + bicmi r1, r1, #0x80000000 + rsbmi r1, r1, #0x0 + cmp r0, r1 + movlt r0, #0x1 + movge r0, #0x0 + mrs r12, cpsr + orrge r12, r12, #0x20000000 + biclt r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr +_020EAFFC: + mov r0, #0x0 + mrs r12, cpsr + orr r12, r12, #0x20000000 + msr cpsr_f, r12 + bx lr + + arm_func_start _feq +_feq: ; 0x020EB010 + mov r3, #0xff000000 + cmp r3, r0, lsl #0x1 + blo _020EB064 + cmp r3, r1, lsl #0x1 + blo _020EB064 + orr r3, r0, r1 + movs r3, r3, lsl #0x1 + moveq r0, #0x0 + bne _020EB044 + mrs r12, cpsr + orr r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr +_020EB044: + cmp r0, r1 + movne r0, #0x1 + moveq r0, #0x0 + mrs r12, cpsr + bicne r12, r12, #0x40000000 + orreq r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr +_020EB064: + mov r0, #0x1 + mrs r12, cpsr + bic r12, r12, #0x40000000 + msr cpsr_f, r12 + bx lr + + arm_func_start _frdiv +_frdiv: ; 0x020EB078 + eor r0, r0, r1 + eor r1, r0, r1 + eor r0, r0, r1 + + arm_func_start _fdiv +_fdiv: ; 0x020EB084 + stmdb sp!, {lr} + mov r12, #0xff + ands r3, r12, r0, lsr #0x17 + cmpne r3, #0xff + beq _020EB258 + ands r12, r12, r1, lsr #0x17 + cmpne r12, #0xff + beq _020EB294 + orr r1, r1, #0x800000 + orr r0, r0, #0x800000 + bic r2, r0, #0xff000000 + bic lr, r1, #0xff000000 +_020EB0B4: + cmp r2, lr + movcc r2, r2, lsl #0x1 + subcc r3, r3, #0x1 + teq r0, r1 + sub r0, pc, #0x94 + ldrb r1, [r0, lr, lsr #0xf] + rsb lr, lr, #0x0 + mov r0, lr, asr #0x1 + mul r0, r1, r0 + add r0, r0, #0x80000000 + mov r0, r0, lsr #0x6 + mul r0, r1, r0 + mov r0, r0, lsr #0xe + mul r1, lr, r0 + sub r12, r3, r12 + mov r1, r1, lsr #0xc + mul r1, r0, r1 + mov r0, r0, lsl #0xe + add r0, r0, r1, lsr #0xf + umull r1, r0, r2, r0 + mov r3, r0 + orrmi r0, r0, #0x80000000 + adds r12, r12, #0x7e + bmi _020EB35C + cmp r12, #0xfe + bge _020EB410 + add r0, r0, r12, lsl #0x17 + mov r12, r1, lsr #0x1c + cmp r12, #0x7 + beq _020EB238 + add r0, r0, r1, lsr #0x1f + ldmia sp!, {lr} + bx lr +_020EB138: ; not code + .byte 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0xFB, 0xFA, 0xF9 + .byte 0xF8, 0xF7, 0xF6, 0xF5, 0xF4, 0xF3, 0xF2, 0xF1, 0xF0, 0xF0, 0xEF, 0xEE, 0xED, 0xEC, 0xEB, 0xEA + .byte 0xEA, 0xE9, 0xE8, 0xE7, 0xE6, 0xE6, 0xE5, 0xE4, 0xE3, 0xE2, 0xE2, 0xE1, 0xE0, 0xDF, 0xDF, 0xDE + .byte 0xDD, 0xDC, 0xDC, 0xDB, 0xDA, 0xD9, 0xD9, 0xD8, 0xD7, 0xD7, 0xD6, 0xD5, 0xD4, 0xD4, 0xD3, 0xD2 + .byte 0xD2, 0xD1, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, 0xCD, 0xCC, 0xCC, 0xCB, 0xCB, 0xCA, 0xC9, 0xC9, 0xC8 + .byte 0xC8, 0xC7, 0xC6, 0xC6, 0xC5, 0xC5, 0xC4, 0xC3, 0xC3, 0xC2, 0xC2, 0xC1, 0xC0, 0xC0, 0xBF, 0xBF + .byte 0xBE, 0xBE, 0xBD, 0xBD, 0xBC, 0xBC, 0xBB, 0xBA, 0xBA, 0xB9, 0xB9, 0xB8, 0xB8, 0xB7, 0xB7, 0xB6 + .byte 0xB6, 0xB5, 0xB5, 0xB4, 0xB4, 0xB3, 0xB3, 0xB2, 0xB2, 0xB1, 0xB1, 0xB0, 0xB0, 0xAF, 0xAF, 0xAF + .byte 0xAE, 0xAE, 0xAD, 0xAD, 0xAC, 0xAC, 0xAB, 0xAB, 0xAA, 0xAA, 0xAA, 0xA9, 0xA9, 0xA8, 0xA8, 0xA7 + .byte 0xA7, 0xA7, 0xA6, 0xA6, 0xA5, 0xA5, 0xA4, 0xA4, 0xA4, 0xA3, 0xA3, 0xA2, 0xA2, 0xA2, 0xA1, 0xA1 + .byte 0xA0, 0xA0, 0xA0, 0x9F, 0x9F, 0x9E, 0x9E, 0x9E, 0x9D, 0x9D, 0x9D, 0x9C, 0x9C, 0x9B, 0x9B, 0x9B + .byte 0x9A, 0x9A, 0x9A, 0x99, 0x99, 0x99, 0x98, 0x98, 0x98, 0x97, 0x97, 0x96, 0x96, 0x96, 0x95, 0x95 + .byte 0x95, 0x94, 0x94, 0x94, 0x93, 0x93, 0x93, 0x92, 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, 0x90, 0x90 + .byte 0x90, 0x8F, 0x8F, 0x8F, 0x8E, 0x8E, 0x8E, 0x8D, 0x8D, 0x8D, 0x8C, 0x8C, 0x8C, 0x8C, 0x8B, 0x8B + .byte 0x8B, 0x8A, 0x8A, 0x8A, 0x8A, 0x89, 0x89, 0x89, 0x88, 0x88, 0x88, 0x88, 0x87, 0x87, 0x87, 0x86 + .byte 0x86, 0x86, 0x86, 0x85, 0x85, 0x85, 0x85, 0x84, 0x84, 0x84, 0x83, 0x83, 0x83, 0x83, 0x82, 0x82 + .byte 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x80, 0x80 +_020EB238: + mov r1, r3, lsl #0x1 + add r1, r1, #0x1 + rsb lr, lr, #0x0 + mul r1, lr, r1 + cmp r1, r2, lsl #0x18 + addmi r0, r0, #0x1 + ldmia sp!, {lr} + bx lr +_020EB258: + eor lr, r0, r1 + and lr, lr, #0x80000000 + cmp r3, #0x0 + beq _020EB2B0 + movs r0, r0, lsl #0x9 + bne _020EB3F8 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EB3E8 + cmp r12, #0xff + blt _020EB3E8 + cmp r1, #0x0 + beq _020EB404 + b _020EB3E0 +_020EB294: + eor lr, r0, r1 + and lr, lr, #0x80000000 + cmp r12, #0x0 + beq _020EB314 +_020EB2A4: + movs r1, r1, lsl #0x9 + bne _020EB3E0 + b _020EB430 +_020EB2B0: + movs r2, r0, lsl #0x9 + beq _020EB2E4 + clz r3, r2 + movs r2, r2, lsl r3 + rsb r3, r3, #0x0 + mov r2, r2, lsr #0x8 + ands r12, r12, r1, lsr #0x17 + beq _020EB33C + cmp r12, #0xff + beq _020EB2A4 + orr r1, r1, #0x800000 + bic lr, r1, #0xff000000 + b _020EB0B4 +_020EB2E4: + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EB308 + cmp r12, #0xff + blt _020EB430 + cmp r1, #0x0 + beq _020EB430 + b _020EB3E0 +_020EB308: + cmp r1, #0x0 + beq _020EB404 + b _020EB430 +_020EB314: + movs r12, r1, lsl #0x9 + beq _020EB3E8 + mov lr, r12 + clz r12, lr + movs lr, lr, lsl r12 + rsb r12, r12, #0x0 + mov lr, lr, lsr #0x8 + orr r0, r0, #0x800000 + bic r2, r0, #0xff000000 + b _020EB0B4 +_020EB33C: + movs r12, r1, lsl #0x9 + beq _020EB3E8 + mov lr, r12 + clz r12, lr + movs lr, lr, lsl r12 + rsb r12, r12, #0x0 + mov lr, lr, lsr #0x8 + b _020EB0B4 +_020EB35C: + and r0, r0, #0x80000000 + cmn r12, #0x18 + beq _020EB3D0 + bmi _020EB428 + add r1, r12, #0x17 + mov r2, r2, lsl r1 + rsb r12, r12, #0x0 + mov r3, r3, lsr r12 + orr r0, r0, r3 + rsb lr, lr, #0x0 + mul r1, lr, r3 + cmp r1, r2 + ldmeqia sp!, {lr} + bxeq lr + add r1, r1, lr + cmp r1, r2 + beq _020EB3C4 + addmi r0, r0, #0x1 + subpl r1, r1, lr + add r1, lr, r1, lsl #0x1 + cmp r1, r2, lsl #0x1 + and r3, r0, #0x1 + addmi r0, r0, #0x1 + addeq r0, r0, r3 + ldmia sp!, {lr} + bx lr +_020EB3C4: + add r0, r0, #0x1 + ldmia sp!, {lr} + bx lr +_020EB3D0: + cmn r2, lr + addne r0, r0, #0x1 + ldmia sp!, {lr} + bx lr +_020EB3E0: + mov r0, r1 + b _020EB3F8 +_020EB3E8: + mov r0, #0xff000000 + orr r0, lr, r0, lsr #0x1 + ldmia sp!, {lr} + bx lr +_020EB3F8: + mvn r0, #0x80000000 + ldmia sp!, {lr} + bx lr +_020EB404: + mvn r0, #0x80000000 + ldmia sp!, {lr} + bx lr +_020EB410: + tst r0, #0x80000000 + mov r0, #0xff000000 + movne r0, r0, asr #0x1 + moveq r0, r0, lsr #0x1 + ldmia sp!, {lr} + bx lr +_020EB428: + ldmia sp!, {lr} + bx lr +_020EB430: + mov r0, lr + ldmia sp!, {lr} + bx lr + + arm_func_start _f2d +_f2d: + and r2, r0, #0x80000000 + mov r12, r0, lsr #0x17 + mov r3, r0, lsl #0x9 + ands r12, r12, #0xff + beq _020EB46C + cmp r12, #0xff + beq _020EB498 +_020EB458: + add r12, r12, #0x380 + mov r0, r3, lsl #0x14 + orr r1, r2, r3, lsr #0xc + orr r1, r1, r12, lsl #0x14 + bx lr +_020EB46C: + cmp r3, #0x0 + bne _020EB480 + mov r1, r2 + mov r0, #0x0 + bx lr +_020EB480: + mov r3, r3, lsr #0x1 + clz r12, r3 + movs r3, r3, lsl r12 + rsb r12, r12, #0x1 + add r3, r3, r3 + b _020EB458 +_020EB498: + cmp r3, #0x0 + bhi _020EB4B0 + ldr r1, _020EB4BC ; =0x7FF00000 + orr r1, r1, r2 + mov r0, #0x0 + bx lr +_020EB4B0: + mvn r0, #0x0 + bic r1, r0, #0x80000000 + bx lr + .balign 4 +_020EB4BC: .word 0x7FF00000 + + arm_func_start _ffix +_ffix: ; 0x020EB4C0 + bic r1, r0, #0x80000000 + mov r2, #0x9e + subs r2, r2, r1, lsr #0x17 + ble _020EB4E8 + mov r1, r1, lsl #0x8 + orr r1, r1, #0x80000000 + cmp r0, #0x0 + mov r0, r1, lsr r2 + rsbmi r0, r0, #0x0 + bx lr +_020EB4E8: + mvn r0, r0, asr #0x1f + add r0, r0, #0x80000000 + bx lr + + arm_func_start _ffixu +_ffixu: ; 0x020EB4F4 + tst r0, #0x80000000 + bne _020EB518 + mov r1, #0x9e + subs r1, r1, r0, lsr #0x17 + blt _020EB52C + mov r2, r0, lsl #0x8 + orr r0, r2, #0x80000000 + mov r0, r0, lsr r1 + bx lr +_020EB518: + mov r2, #0xff000000 + cmp r2, r0, lsl #0x1 + movcs r0, #0x0 + mvncc r0, #0x0 + bx lr +_020EB52C: + mvn r0, #0x0 + bx lr + + arm_func_start _fflt +_fflt: ; 0x020EB534 + ands r2, r0, #0x80000000 + rsbmi r0, r0, #0x0 + cmp r0, #0x0 + bxeq lr + clz r3, r0 + movs r0, r0, lsl r3 + rsb r3, r3, #0x9e + ands r1, r0, #0xff + add r0, r0, r0 + orr r0, r2, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bxeq lr + tst r1, #0x80 + bxeq lr + ands r3, r1, #0x7f + andeqs r3, r0, #0x1 + addne r0, r0, #0x1 + bx lr + + arm_func_start _ffltu +_ffltu: ; 0x020EB57C + cmp r0, #0x0 + bxeq lr + mov r3, #0x9e + bmi _020EB598 + clz r12, r0 + movs r0, r0, lsl r12 + sub r3, r3, r12 +_020EB598: + ands r2, r0, #0xff + add r0, r0, r0 + mov r0, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bxeq lr + tst r2, #0x80 + bxeq lr + ands r1, r2, #0x7f + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr + + arm_func_start _fmul +_fmul: ; 0x020EB5C4 + eor r2, r0, r1 + and r2, r2, #0x80000000 + mov r12, #0xff + ands r3, r12, r0, lsr #0x17 + mov r0, r0, lsl #0x8 + cmpne r3, #0xff + beq _020EB640 + orr r0, r0, #0x80000000 + ands r12, r12, r1, lsr #0x17 + mov r1, r1, lsl #0x8 + cmpne r12, #0xff + beq _020EB680 + orr r1, r1, #0x80000000 +_020EB5F8: + add r12, r3, r12 + umull r1, r3, r0, r1 + movs r0, r3 + addpl r0, r0, r0 + subpl r12, r12, #0x1 + subs r12, r12, #0x7f + bmi _020EB70C + cmp r12, #0xfe + bge _020EB778 + ands r3, r0, #0xff + orr r0, r2, r0, lsr #0x8 + add r0, r0, r12, lsl #0x17 + tst r3, #0x80 + bxeq lr + orrs r1, r1, r3, lsl #0x19 + andeqs r3, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EB640: + cmp r3, #0x0 + beq _020EB694 + movs r0, r0, lsl #0x1 + bne _020EB768 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EB674 + cmp r12, #0xff + blt _020EB75C + cmp r1, #0x0 + beq _020EB75C + b _020EB768 +_020EB674: + cmp r1, #0x0 + beq _020EB770 + b _020EB75C +_020EB680: + cmp r12, #0x0 + beq _020EB6F0 +_020EB688: + movs r1, r1, lsl #0x1 + bne _020EB768 + b _020EB75C +_020EB694: + movs r0, r0, lsl #0x1 + beq _020EB6CC + mov r0, r0, lsr #0x1 + clz r3, r0 + movs r0, r0, lsl r3 + rsb r3, r3, #0x1 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x8 + ands r12, r12, #0xff + beq _020EB6F0 + cmp r12, #0xff + beq _020EB688 + orr r1, r1, #0x80000000 + b _020EB5F8 +_020EB6CC: + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EB79C + cmp r12, #0xff + blt _020EB79C + cmp r1, #0x0 + beq _020EB770 + b _020EB768 +_020EB6F0: + movs r1, r1, lsl #0x1 + beq _020EB79C + mov r1, r1, lsr #0x1 + clz r12, r1 + movs r1, r1, lsl r12 + rsb r12, r12, #0x1 + b _020EB5F8 +_020EB70C: + cmn r12, #0x18 + beq _020EB754 + bmi _020EB794 + cmp r1, #0x0 + orrne r0, r0, #0x1 + mov r3, r0 + mov r0, r0, lsr #0x8 + rsb r12, r12, #0x0 + orr r0, r2, r0, lsr r12 + rsb r12, r12, #0x18 + movs r1, r3, lsl r12 + bxeq lr + tst r1, #0x80000000 + bxeq lr + movs r1, r1, lsl #0x1 + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EB754: + mov r0, r0, lsl #0x1 + b _020EB784 +_020EB75C: + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020EB768: + mvn r0, #0x80000000 + bx lr +_020EB770: + mvn r0, #0x80000000 + bx lr +_020EB778: + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020EB784: + movs r1, r0 + mov r0, r2 + addne r0, r0, #0x1 + bx lr +_020EB794: + mov r0, r2 + bx lr +_020EB79C: + mov r0, r2 + bx lr + + arm_func_start _frsb +_frsb: ; 0x020EB7A4 + eor r0, r0, r1 + eor r1, r0, r1 + eor r0, r0, r1 + + arm_func_start _fsub +_fsub: ; 0x020EB7B0 + eors r2, r0, r1 + eormi r1, r1, #0x80000000 + bmi _020EA98C +_020EB7BC: + subs r12, r0, r1 + eorcc r12, r12, #0x80000000 + subcc r0, r0, r12 + addcc r1, r1, r12 + mov r2, #0x80000000 + mov r3, r0, lsr #0x17 + orr r0, r2, r0, lsl #0x8 + ands r12, r3, #0xff + cmpne r12, #0xff + beq _020EB8D8 + mov r12, r1, lsr #0x17 + orr r1, r2, r1, lsl #0x8 + ands r2, r12, #0xff + beq _020EB918 +_020EB7F4: + subs r12, r3, r12 + beq _020EB83C + rsb r2, r12, #0x20 + movs r2, r1, lsl r2 + mov r1, r1, lsr r12 + orrne r1, r1, #0x1 + subs r0, r0, r1 + bpl _020EB880 + ands r1, r0, #0xff + add r0, r0, r0 + mov r0, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + tst r1, #0x80 + bxeq lr + ands r1, r1, #0x7f + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EB83C: + subs r0, r0, r1 + beq _020EB9E4 + mov r2, r3, lsl #0x17 + and r2, r2, #0x80000000 + bic r3, r3, #0x100 + clz r12, r0 + movs r0, r0, lsl r12 + sub r3, r3, r12 + cmp r3, #0x0 + bgt _020EB870 + rsb r3, r3, #0x9 + orr r0, r2, r0, lsr r3 + bx lr +_020EB870: + add r0, r0, r0 + orr r0, r2, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bx lr +_020EB880: + mov r2, r3, lsl #0x17 + and r2, r2, #0x80000000 + bic r3, r3, #0x100 + clz r12, r0 + movs r0, r0, lsl r12 + sub r3, r3, r12 + cmp r3, #0x0 + bgt _020EB8AC + rsb r3, r3, #0x9 + orr r0, r2, r0, lsr r3 + bx lr +_020EB8AC: + ands r1, r0, #0xff + add r0, r0, r0 + orr r0, r2, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bxeq lr + tst r1, #0x80 + bxeq lr + ands r1, r1, #0x7f + andeqs r1, r0, #0x1 + addne r0, r0, #0x1 + bx lr +_020EB8D8: + cmp r3, #0x100 + movge r2, #0x80000000 + movlt r2, #0x0 + ands r3, r3, #0xff + beq _020EB940 + movs r0, r0, lsl #0x1 + bne _020EBA18 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x9 + ands r12, r12, #0xff + beq _020EBA0C + cmp r12, #0xff + blt _020EBA0C + cmp r1, #0x0 + beq _020EBA20 + b _020EBA18 +_020EB918: + cmp r12, #0x100 + movge r2, #0x80000000 + movlt r2, #0x0 + and r3, r3, #0xff + ands r12, r12, #0xff + beq _020EB9A8 +_020EB930: + eor r2, r2, #0x80000000 + movs r1, r1, lsl #0x1 + bne _020EBA18 + b _020EBA0C +_020EB940: + movs r0, r0, lsl #0x1 + beq _020EB978 + mov r0, r0, lsr #0x1 + mov r3, #0x1 + mov r12, r1, lsr #0x17 + mov r1, r1, lsl #0x8 + ands r12, r12, #0xff + beq _020EB9A8 + cmp r12, #0xff + beq _020EB930 + orr r1, r1, #0x80000000 + orr r3, r3, r2, lsr #0x17 + orr r12, r12, r2, lsr #0x17 + b _020EB7F4 +_020EB978: + mov r3, r1, lsr #0x17 + mov r0, r1, lsl #0x9 + ands r2, r3, #0xff + beq _020EB99C + cmp r2, #0xff + blt _020EB9C4 + cmp r0, #0x0 + bne _020EBA04 + b _020EBA0C +_020EB99C: + cmp r0, #0x0 + beq _020EB9E4 + b _020EB9C4 +_020EB9A8: + movs r1, r1, lsl #0x1 + beq _020EB9CC + mov r1, r1, lsr #0x1 + mov r12, #0x1 + orr r12, r12, r2, lsr #0x17 + orr r3, r3, r2, lsr #0x17 + b _020EB7F4 +_020EB9C4: + mov r0, r1 + bx lr +_020EB9CC: + cmp r0, #0x0 + subges r3, r3, #0x1 + add r0, r0, r0 + orr r0, r2, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bx lr +_020EB9E4: + mov r0, #0x0 + bx lr +_020EB9EC: ; 0x020EB9EC + cmp r0, #0x0 + subges r3, r3, #0x1 + add r0, r0, r0 + mov r0, r0, lsr #0x9 + orr r0, r0, r3, lsl #0x17 + bx lr +_020EBA04: + mvn r0, #0x80000000 + bx lr +_020EBA0C: + mov r0, #0xff000000 + orr r0, r2, r0, lsr #0x1 + bx lr +_020EBA18: + mvn r0, #0x80000000 + bx lr +_020EBA20: + mvn r0, #0x80000000 + bx lr + + arm_func_start _ll_mod +_ll_mod: ; 0x020EBA28 + stmdb sp!, {r4-r7,r11-r12,lr} + mov r4, r1 + orr r4, r4, #0x1 + b _020EBA48 + + arm_func_start _ll_sdiv +_ll_sdiv: ; 0x020EBA38 + stmdb sp!, {r4-r7,r11-r12,lr} + eor r4, r1, r3 + mov r4, r4, asr #0x1 + mov r4, r4, lsl #0x1 +_020EBA48: + orrs r5, r3, r2 + bne _020EBA58 + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr +_020EBA58: + mov r5, r0, lsr #0x1f + add r5, r5, r1 + mov r6, r2, lsr #0x1f + add r6, r6, r3 + orrs r6, r5, r6 + bne _020EBA8C + mov r1, r2 + bl _s32_div_f + ands r4, r4, #0x1 + movne r0, r1 + mov r1, r0, asr #0x1f + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr +_020EBA8C: + cmp r1, #0x0 + bge _020EBA9C + rsbs r0, r0, #0x0 + rsc r1, r1, #0x0 +_020EBA9C: + cmp r3, #0x0 + bge _020EBAAC + rsbs r2, r2, #0x0 + rsc r3, r3, #0x0 +_020EBAAC: + orrs r5, r1, r0 + beq _020EBBD0 + mov r5, #0x0 + mov r6, #0x1 + cmp r3, #0x0 + bmi _020EBAD8 +_020EBAC4: + add r5, r5, #0x1 + adds r2, r2, r2 + adcs r3, r3, r3 + bpl _020EBAC4 + add r6, r6, r5 +_020EBAD8: + cmp r1, #0x0 + blt _020EBAF8 +_020EBAE0: + cmp r6, #0x1 + beq _020EBAF8 + sub r6, r6, #0x1 + adds r0, r0, r0 + adcs r1, r1, r1 + bpl _020EBAE0 +_020EBAF8: + mov r7, #0x0 + mov r12, #0x0 + mov r11, #0x0 + b _020EBB20 +_020EBB08: + orr r12, r12, #0x1 + subs r6, r6, #0x1 + beq _020EBB78 + adds r0, r0, r0 + adcs r1, r1, r1 + adcs r7, r7, r7 +_020EBB20: + subs r0, r0, r2 + sbcs r1, r1, r3 + sbcs r7, r7, #0x0 + adds r12, r12, r12 + adc r11, r11, r11 + cmp r7, #0x0 + bge _020EBB08 +_020EBB3C: + subs r6, r6, #0x1 + beq _020EBB70 + adds r0, r0, r0 + adcs r1, r1, r1 + adc r7, r7, r7 + adds r0, r0, r2 + adcs r1, r1, r3 + adc r7, r7, #0x0 + adds r12, r12, r12 + adc r11, r11, r11 + cmp r7, #0x0 + bge _020EBB08 + b _020EBB3C +_020EBB70: + adds r0, r0, r2 + adc r1, r1, r3 +_020EBB78: + ands r7, r4, #0x1 + moveq r0, r12 + moveq r1, r11 + beq _020EBBB0 + subs r7, r5, #0x20 + movge r0, r1, lsr r7 + bge _020EBBD4 + rsb r7, r5, #0x20 + mov r0, r0, lsr r5 + orr r0, r0, r1, lsl r7 + mov r1, r1, lsr r5 + b _020EBBB0 +_020EBBA8: ; 0x020EBBA8 + mov r0, r1, lsr r7 + mov r1, #0x0 +_020EBBB0: + cmp r4, #0x0 + blt _020EBBC0 + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr +_020EBBC0: + rsbs r0, r0, #0x0 + rsc r1, r1, #0x0 + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr +_020EBBD0: + mov r0, #0x0 +_020EBBD4: + mov r1, #0x0 + cmp r4, #0x0 + blt _020EBBC0 + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr + + arm_func_start _ll_udiv +_ll_udiv: ; 0x020EBBE8 + stmdb sp!, {r4-r7,r11-r12,lr} + mov r4, #0x0 + b _020EBBFC + + arm_func_start _ull_mod +_ull_mod: ; 0x020EBBF4 + stmdb sp!, {r4-r7,r11-r12,lr} + mov r4, #0x1 +_020EBBFC: + orrs r5, r3, r2 + bne _020EBC0C + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr +_020EBC0C: + orrs r5, r1, r3 + bne _020EBAAC + mov r1, r2 + bl _u32_div_not_0_f +_020EBC1C: ; 0x020EBC1C + cmp r4, #0x0 + movne r0, r1 + mov r1, #0x0 + ldmia sp!, {r4-r7,r11-r12,lr} + bx lr + + arm_func_start _ll_mul +_ll_mul: ; 0x020EBC30 + stmdb sp!, {r4-r5,lr} + umull r5, r4, r0, r2 + mla r4, r0, r3, r4 + mla r4, r2, r1, r4 + mov r1, r4 + mov r0, r5 + ldmia sp!, {r4-r5,lr} + bx lr + + arm_func_start _ll_shl +_ll_shl: ; 0x020EBC50 + ands r2, r2, #0x3f + bxeq lr + subs r3, r2, #0x20 + bge _020EBC74 + rsb r3, r2, #0x20 + mov r1, r1, lsl r2 + orr r1, r1, r0, lsr r3 + mov r0, r0, lsl r2 + bx lr +_020EBC74: + mov r1, r0, lsl r3 + mov r0, #0x0 + bx lr + + arm_func_start _s32_div_f +_s32_div_f: ; 0x020EBC80 + eor r12, r0, r1 + and r12, r12, #0x80000000 + cmp r0, #0x0 + rsblt r0, r0, #0x0 + addlt r12, r12, #0x1 + cmp r1, #0x0 + rsblt r1, r1, #0x0 + beq _020EBE78 + cmp r0, r1 + movcc r1, r0 + movcc r0, #0x0 + blo _020EBE78 + mov r2, #0x1c + mov r3, r0, lsr #0x4 + cmp r1, r3, lsr #0xc + suble r2, r2, #0x10 + movle r3, r3, lsr #0x10 + cmp r1, r3, lsr #0x4 + suble r2, r2, #0x8 + movle r3, r3, lsr #0x8 + cmp r1, r3 + suble r2, r2, #0x4 + movle r3, r3, lsr #0x4 + mov r0, r0, lsl r2 + rsb r1, r1, #0x0 + adds r0, r0, r0 + add r2, r2, r2, lsl #0x1 + add pc, pc, r2, lsl #0x2 + mov r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + mov r1, r3 +_020EBE78: + ands r3, r12, #0x80000000 + rsbne r0, r0, #0x0 + ands r3, r12, #0x1 + rsbne r1, r1, #0x0 + bx lr + + arm_func_start _u32_div_f +_u32_div_f: ; 0x020EBE8C + cmp r1, #0x0 + bxeq lr + + arm_func_start _u32_div_not_0_f +_u32_div_not_0_f: + cmp r0, r1 + movcc r1, r0 + movcc r0, #0x0 + bxcc lr + mov r2, #0x1c + mov r3, r0, lsr #0x4 + cmp r1, r3, lsr #0xc + suble r2, r2, #0x10 + movle r3, r3, lsr #0x10 + cmp r1, r3, lsr #0x4 + suble r2, r2, #0x8 + movle r3, r3, lsr #0x8 + cmp r1, r3 + suble r2, r2, #0x4 + movle r3, r3, lsr #0x4 + mov r0, r0, lsl r2 + rsb r1, r1, #0x0 + adds r0, r0, r0 + add r2, r2, r2, lsl #0x1 + add pc, pc, r2, lsl #0x2 + mov r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + adcs r3, r1, r3, lsl #0x1 + subcc r3, r3, r1 + adcs r0, r0, r0 + mov r1, r3 + bx lr + + arm_func_start _drdiv +_drdiv: ; 0x020EC070 + eor r1, r1, r3 + eor r3, r1, r3 + eor r1, r1, r3 + eor r0, r0, r2 + eor r2, r0, r2 + eor r0, r0, r2 + + arm_func_start _ddiv +_ddiv: ; 0x020EC088 + stmdb sp!, {r4-r6,lr} + ldr lr, _020EC5C8 ; =0x00000FFE + eor r4, r1, r3 + ands r12, lr, r1, lsr #0x13 + cmpne r12, lr + beq _020EC434 + bic r1, r1, lr, lsl #0x14 + orr r1, r1, #0x100000 + add r12, r12, r4, lsr #0x1f +_020EC0AC: + ands r4, lr, r3, lsr #0x13 + cmpne r4, lr + beq _020EC4CC + bic r3, r3, lr, lsl #0x14 + orr r3, r3, #0x100000 +_020EC0C0: + sub r12, r12, r4 + cmp r1, r3 + cmpeq r0, r2 + bhs _020EC0DC + adds r0, r0, r0 + adc r1, r1, r1 + sub r12, r12, #0x2 +_020EC0DC: + sub r4, pc, #0x24 + ldrb lr, [r4, r3, lsr #0xc] + rsbs r2, r2, #0x0 + rsc r3, r3, #0x0 + mov r4, #0x20000000 + mla r5, lr, r3, r4 + mov r6, r3, lsl #0xa + mov r5, r5, lsr #0x7 + mul lr, r5, lr + orr r6, r6, r2, lsr #0x16 + mov lr, lr, lsr #0xd + mul r5, lr, r6 + mov r6, r1, lsl #0xa + orr r6, r6, r0, lsr #0x16 + mov r5, r5, lsr #0x10 + mul r5, lr, r5 + mov lr, lr, lsl #0xe + add lr, lr, r5, lsr #0x10 + umull r5, r6, lr, r6 + umull r4, r5, r6, r2 + mla r5, r3, r6, r5 + mov r4, r4, lsr #0x1a + orr r4, r4, r5, lsl #0x6 + add r4, r4, r0, lsl #0x2 + umull lr, r5, r4, lr + mov r4, #0x0 + adds r5, r5, r6, lsl #0x18 + adc r4, r4, r6, lsr #0x8 + cmp r12, #0x800 + bge _020EC2C0 + add r12, r12, #0x7f0 + adds r12, r12, #0xc + bmi _020EC2D8 + orr r1, r4, r12, lsl #0x1f + bic r12, r12, #0x1 + add r1, r1, r12, lsl #0x13 + tst lr, #0x80000000 + bne _020EC1B0 + rsbs r2, r2, #0x0 + mov r4, r4, lsl #0x1 + add r4, r4, r5, lsr #0x1f + mul lr, r2, r4 + mov r6, #0x0 + mov r4, r5, lsl #0x1 + orr r4, r4, #0x1 + umlal r6, lr, r4, r2 + rsc r3, r3, #0x0 + mla lr, r4, r3, lr + cmp lr, r0, lsl #0x15 + bmi _020EC1B0 + mov r0, r5 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC1B0: + adds r0, r5, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC1C0: ; not code + .byte 0xFF, 0xFF, 0xFE, 0xFD, 0xFC, 0xFB, 0xFA, 0xF9, 0xF8, 0xF7, 0xF6, 0xF5, 0xF4, 0xF3, 0xF2, 0xF1 + .byte 0xF0, 0xF0, 0xEF, 0xEE, 0xED, 0xEC, 0xEB, 0xEA, 0xEA, 0xE9, 0xE8, 0xE7, 0xE6, 0xE6, 0xE5, 0xE4 + .byte 0xE3, 0xE2, 0xE2, 0xE1, 0xE0, 0xDF, 0xDF, 0xDE, 0xDD, 0xDC, 0xDC, 0xDB, 0xDA, 0xD9, 0xD9, 0xD8 + .byte 0xD7, 0xD7, 0xD6, 0xD5, 0xD4, 0xD4, 0xD3, 0xD2, 0xD2, 0xD1, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, 0xCD + .byte 0xCC, 0xCC, 0xCB, 0xCB, 0xCA, 0xC9, 0xC9, 0xC8, 0xC8, 0xC7, 0xC6, 0xC6, 0xC5, 0xC5, 0xC4, 0xC3 + .byte 0xC3, 0xC2, 0xC2, 0xC1, 0xC0, 0xC0, 0xBF, 0xBF, 0xBE, 0xBE, 0xBD, 0xBD, 0xBC, 0xBC, 0xBB, 0xBA + .byte 0xBA, 0xB9, 0xB9, 0xB8, 0xB8, 0xB7, 0xB7, 0xB6, 0xB6, 0xB5, 0xB5, 0xB4, 0xB4, 0xB3, 0xB3, 0xB2 + .byte 0xB2, 0xB1, 0xB1, 0xB0, 0xB0, 0xAF, 0xAF, 0xAF, 0xAE, 0xAE, 0xAD, 0xAD, 0xAC, 0xAC, 0xAB, 0xAB + .byte 0xAA, 0xAA, 0xAA, 0xA9, 0xA9, 0xA8, 0xA8, 0xA7, 0xA7, 0xA7, 0xA6, 0xA6, 0xA5, 0xA5, 0xA4, 0xA4 + .byte 0xA4, 0xA3, 0xA3, 0xA2, 0xA2, 0xA2, 0xA1, 0xA1, 0xA0, 0xA0, 0xA0, 0x9F, 0x9F, 0x9E, 0x9E, 0x9E + .byte 0x9D, 0x9D, 0x9D, 0x9C, 0x9C, 0x9B, 0x9B, 0x9B, 0x9A, 0x9A, 0x9A, 0x99, 0x99, 0x99, 0x98, 0x98 + .byte 0x98, 0x97, 0x97, 0x96, 0x96, 0x96, 0x95, 0x95, 0x95, 0x94, 0x94, 0x94, 0x93, 0x93, 0x93, 0x92 + .byte 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, 0x90, 0x90, 0x90, 0x8F, 0x8F, 0x8F, 0x8E, 0x8E, 0x8E, 0x8D + .byte 0x8D, 0x8D, 0x8C, 0x8C, 0x8C, 0x8C, 0x8B, 0x8B, 0x8B, 0x8A, 0x8A, 0x8A, 0x8A, 0x89, 0x89, 0x89 + .byte 0x88, 0x88, 0x88, 0x88, 0x87, 0x87, 0x87, 0x86, 0x86, 0x86, 0x86, 0x85, 0x85, 0x85, 0x85, 0x84 + .byte 0x84, 0x84, 0x83, 0x83, 0x83, 0x83, 0x82, 0x82, 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x80, 0x80 +_020EC2C0: + movs r1, r12, lsl #0x1f + orr r1, r1, #0x7f000000 + orr r1, r1, #0xf00000 + mov r0, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC2D8: + mvn r6, r12, asr #0x1 + cmp r6, #0x34 + bgt _020EC424 + beq _020EC400 + cmp r6, #0x14 + bge _020EC320 + rsb r6, r6, #0x13 + mov lr, r0, lsl r6 + rsb r6, r6, #0x14 + mov r0, r5, lsr r6 + rsb r6, r6, #0x20 + orr r0, r0, r4, lsl r6 + rsb r6, r6, #0x20 + mov r4, r4, lsr r6 + orr r1, r4, r12, lsl #0x1f + mov r12, lr + mov lr, #0x0 + b _020EC350 +_020EC320: + rsb r6, r6, #0x33 + mov lr, r1, lsl r6 + mov r1, r12, lsl #0x1f + rsb r6, r6, #0x20 + orr r12, lr, r0, lsr r6 + rsb r6, r6, #0x20 + mov lr, r0, lsl r6 + mov r5, r5, lsr #0x15 + orr r5, r5, r4, lsl #0xb + rsb r6, r6, #0x1f + mov r0, r5, lsr r6 + mov r4, #0x0 +_020EC350: + rsbs r2, r2, #0x0 + mul r4, r2, r4 + mov r5, #0x0 + umlal r5, r4, r2, r0 + rsc r3, r3, #0x0 + mla r4, r0, r3, r4 + cmp r4, r12 + cmpeq r5, lr + ldmeqia sp!, {r4-r6,lr} + bxeq lr + adds r5, r5, r2 + adc r4, r4, r3 + cmp r4, r12 + bmi _020EC3F4 + bne _020EC398 + cmp r5, lr + beq _020EC3E4 + blo _020EC3F4 +_020EC398: + subs r5, r5, r2 + sbc r4, r4, r3 +_020EC3A0: + adds r5, r5, r5 + adc r4, r4, r4 + adds r5, r5, r2 + adc r4, r4, r3 + adds lr, lr, lr + adc r12, r12, r12 + cmp r4, r12 + bmi _020EC3E4 + ldmneia sp!, {r4-r6,lr} + bxne lr + cmp r5, lr + blo _020EC3E4 + ldmneia sp!, {r4-r6,lr} + bxne lr + tst r0, #0x1 + ldmeqia sp!, {r4-r6,lr} + bxeq lr +_020EC3E4: + adds r0, r0, #0x1 + adc r1, r1, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC3F4: + adds r0, r0, #0x1 + adc r1, r1, #0x0 + b _020EC3A0 +_020EC400: + rsbs r2, r2, #0x0 + rsc r3, r3, #0x0 + cmp r1, r3 + cmpeq r0, r2 + mov r1, r12, lsl #0x1f + mov r0, #0x0 + movne r0, #0x1 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC424: + mov r1, r12, lsl #0x1f + mov r0, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC434: + orrs r5, r0, r1, lsl #0x1 + beq _020EC558 + cmp r12, lr + beq _020EC49C + movs r1, r1, lsl #0xc + beq _020EC478 + clz r5, r1 + movs r1, r1, lsl r5 + sub r12, r12, r5 + add r5, r12, #0x1f + mov r1, r1, lsr #0xb + orr r1, r1, r0, lsr r5 + rsb r5, r5, #0x20 + mov r0, r0, lsl r5 + mov r12, r12, lsl #0x1 + orr r12, r12, r4, lsr #0x1f + b _020EC0AC +_020EC478: + mvn r12, #0x13 + clz r5, r0 + movs r0, r0, lsl r5 + sub r12, r12, r5 + mov r1, r0, lsr #0xb + mov r0, r0, lsl #0x15 + mov r12, r12, lsl #0x1 + orr r12, r12, r4, lsr #0x1f + b _020EC0AC +_020EC49C: + orrs r5, r0, r1, lsl #0xc + bne _020EC580 + bic r5, r3, #0x80000000 + cmp r5, lr, lsl #0x13 + bhs _020EC4C0 + and r5, r3, #0x80000000 + eor r1, r5, r1 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC4C0: + orrs r5, r2, r3, lsl #0xc + bne _020EC5A0 + b _020EC5B8 +_020EC4CC: + orrs r5, r2, r3, lsl #0x1 + beq _020EC544 + cmp r4, lr + beq _020EC52C + movs r3, r3, lsl #0xc + beq _020EC50C + clz r5, r3 + movs r3, r3, lsl r5 + sub r4, r4, r5 + add r5, r4, #0x1f + mov r3, r3, lsr #0xb + orr r3, r3, r2, lsr r5 + rsb r5, r5, #0x20 + mov r2, r2, lsl r5 + mov r4, r4, lsl #0x1 + b _020EC0C0 +_020EC50C: + mvn r4, #0x13 + clz r5, r2 + movs r2, r2, lsl r5 + sub r4, r4, r5 + mov r3, r2, lsr #0xb + mov r2, r2, lsl #0x15 + mov r4, r4, lsl #0x1 + b _020EC0C0 +_020EC52C: + orrs r5, r2, r3, lsl #0xc + bne _020EC5A0 + mov r1, r12, lsl #0x1f + mov r0, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC544: + mov r1, r12, lsl #0x1f + orr r1, r1, lr, lsl #0x13 + mov r0, #0x0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC558: + orrs r5, r2, r3, lsl #0x1 + beq _020EC5B8 + bic r5, r3, #0x80000000 + cmp r5, lr, lsl #0x13 + cmpeq r2, #0x0 + bhi _020EC5A0 + eor r1, r1, r3 + and r1, r1, #0x80000000 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC580: + tst r1, #0x80000 + beq _020EC5B8 + bic r5, r3, #0x80000000 + cmp r5, lr, lsl #0x13 + cmpeq r2, #0x0 + bhi _020EC5A0 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC5A0: + tst r3, #0x80000 + beq _020EC5B8 + mov r1, r3 + mov r0, r2 + ldmia sp!, {r4-r6,lr} + bx lr +_020EC5B8: + orr r1, r1, #0x7f000000 + orr r1, r1, #0xf80000 + ldmia sp!, {r4-r6,lr} + bx lr + .balign 4 +_020EC5C8: .word 0x00000FFE + + arm_func_start _fp_init +_fp_init: ; 0x020EC5CC + bx lr + + arm_func_start sys_writec +sys_writec: ; 0x020EC5D0 + str lr, [sp, #-0x4]! + mov r1, r0 + mov r0, #0x3 + swi 0x123456 + ldr pc, [sp], #0x4 + + arm_func_start sys_readc +sys_readc: ; 0x020EC5E4 + str lr, [sp, #-0x4]! + mov r1, #0x0 + mov r0, #0x7 + swi 0x123456 + ldr pc, [sp], #0x4 + + arm_func_start sys_exit +sys_exit: ; 0x020EC5F8 + mov r1, #0x0 + mov r0, #0x18 + swi 0x123456 + mov pc, lr + + arm_func_start __read_console +__read_console: ; 0x020EC608 + stmdb sp!, {r3-r7,lr} + mov r6, r2 + ldr r5, [r6, #0x0] + mov r7, r1 + cmp r5, #0x0 + mov r4, #0x0 + bls _020EC650 +_020EC624: + bl sys_readc + and r1, r0, #0xff + cmp r1, #0xd + strb r0, [r7, r4] + cmpne r1, #0xa + addeq r0, r4, #0x1 + streq r0, [r6, #0x0] + beq _020EC650 + add r4, r4, #0x1 + cmp r4, r5 + blo _020EC624 +_020EC650: + mov r0, #0x0 + ldmia sp!, {r3-r7,pc} + + arm_func_start __write_console +__write_console: ; 0x020EC658 + stmdb sp!, {r4-r6,lr} + ldr r5, [r2, #0x0] + mov r6, r1 + cmp r5, #0x0 + mov r4, #0x0 + bls _020EC684 +_020EC670: + add r0, r6, r4 + bl sys_writec + add r4, r4, #0x1 + cmp r4, r5 + blo _020EC670 +_020EC684: + mov r0, #0x0 + ldmia sp!, {r4-r6,pc} + + arm_func_start __close_console +__close_console: ; 0x020EC68C + mov r0, #0x0 + bx lr + + arm_func_start __call_static_initializers +__call_static_initializers: ; 0x020EC694 + stmdb sp!, {r4,lr} + ldr r4, _020EC6BC ; =0x02104774 + b _020EC6A8 +_020EC6A0: + blx r0 + add r4, r4, #0x4 +_020EC6A8: + cmp r4, #0x0 + ldrne r0, [r4, #0x0] + cmpne r0, #0x0 + bne _020EC6A0 + ldmia sp!, {r4,pc} + .balign 4 +_020EC6BC: .word 0x02104774 + + arm_func_start __destroy_global_chain +__destroy_global_chain: ; 0x020EC6C0 + stmdb sp!, {r3-r5,lr} + ldr r4, _020EC700 ; =0x021D74C8 + ldr r2, [r4, #0x0] + cmp r2, #0x0 + ldmeqia sp!, {r3-r5,pc} +_020EC6D4: ; 0x020EC6D4 + mvn r5, #0x0 +_020EC6D8: + ldr r0, [r2, #0x0] + mov r1, r5 + str r0, [r4, #0x0] + ldr r0, [r2, #0x8] + ldr r2, [r2, #0x4] + blx r2 + ldr r2, [r4, #0x0] + cmp r2, #0x0 + bne _020EC6D8 + ldmia sp!, {r3-r5,pc} + .balign 4 +_020EC700: .word 0x021D74C8 + + arm_func_start _ExitProcess +_ExitProcess: ; 0x020EC704 + ldr ip, _020EC70C ; =sys_exit + bx r12 + .balign 4 +_020EC70C: .word sys_exit diff --git a/arm9/asm/unk_02006864.s b/arm9/asm/unk_02006864.s index dab6adfe..f212d36f 100644 --- a/arm9/asm/unk_02006864.s +++ b/arm9/asm/unk_02006864.s @@ -45858,12 +45858,12 @@ _0201BBA2: ldrsh r1, [r2, r1] ldrsh r2, [r2, r3] add r0, r5, #0x0 - bl FUN_020C3EA4 + bl MTX_Rot22_ add r0, r5, #0x0 add r1, r5, #0x0 add r2, r4, #0x0 add r3, r6, #0x0 - blx FUN_020C3EB0 + blx MTX_ScaleApply22 pop {r4-r6, pc} nop _0201BBC8: .word 0x0000FFFF @@ -47636,7 +47636,7 @@ _0201C862: pop {r3-r7, pc} _0201C86A: add r1, r5, #0x0 - blx FX_Modf + blx FX_Atan2 add sp, #0x30 pop {r3-r7, pc} .balign 4 diff --git a/arm9/asm/unk_020AF030.s b/arm9/asm/unk_020AF030.s index 33faec27..ec33e3fa 100644 --- a/arm9/asm/unk_020AF030.s +++ b/arm9/asm/unk_020AF030.s @@ -24843,1993 +24843,3 @@ FUN_020C3E6C: ; 0x020C3E6C ldr r1, [r0, #0xc] str r1, [r0, #0x8] bx lr - - arm_func_start FUN_020C3E8C -FUN_020C3E8C: ; 0x020C3E8C - mov r1, #0x0 - mov r2, #0x1000 - mov r3, #0x0 - stmia r0!, {r2-r3} - stmia r0!, {r1-r2} - bx lr - - thumb_func_start FUN_020C3EA4 -FUN_020C3EA4: ; 0x020C3EA4 - str r2, [r0, #0x0] - str r1, [r0, #0x4] - neg r1, r1 - str r1, [r0, #0x8] - str r2, [r0, #0xc] - bx lr - - arm_func_start FUN_020C3EB0 -FUN_020C3EB0: ; 0x020C3EB0 - stmdb sp!, {lr} - sub sp, sp, #0x4 - ldr r12, [r0, #0x0] - smull lr, r12, r2, r12 - mov lr, lr, lsr #0xc - orr lr, lr, r12, lsl #0x14 - str lr, [r1, #0x0] - ldr r12, [r0, #0x4] - smull lr, r12, r2, r12 - mov r2, lr, lsr #0xc - orr r2, r2, r12, lsl #0x14 - str r2, [r1, #0x4] - ldr r2, [r0, #0x8] - smull r12, r2, r3, r2 - mov r12, r12, lsr #0xc - orr r12, r12, r2, lsl #0x14 - str r12, [r1, #0x8] - ldr r0, [r0, #0xc] - smull r2, r0, r3, r0 - mov r2, r2, lsr #0xc - orr r2, r2, r0, lsl #0x14 - str r2, [r1, #0xc] - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - - arm_func_start MTX_Identity33_ -MTX_Identity33_: ; 0x020C3F14 - mov r2, #0x1000 - str r2, [r0, #0x20] - mov r3, #0x0 - stmia r0!, {r2-r3} - mov r1, #0x0 - stmia r0!, {r1,r3} - stmia r0!, {r2-r3} - stmia r0!, {r1,r3} - bx lr - - thumb_func_start MTX_RotX33_ -MTX_RotX33_: ; 0x020C3F38 - mov r3, #0x1 - lsl r3, r3, #0xc - str r3, [r0, #0x0] - mov r3, #0x0 - str r3, [r0, #0x4] - str r3, [r0, #0x8] - str r3, [r0, #0xc] - str r2, [r0, #0x10] - str r1, [r0, #0x14] - str r3, [r0, #0x18] - neg r1, r1 - str r1, [r0, #0x1c] - str r2, [r0, #0x20] - bx lr - - thumb_func_start MTX_RotY33_ -MTX_RotY33_: ; 0x020C3F54 - str r2, [r0, #0x0] - str r2, [r0, #0x20] - mov r3, #0x0 - str r3, [r0, #0x4] - str r3, [r0, #0xc] - str r3, [r0, #0x14] - str r3, [r0, #0x1c] - neg r2, r1 - mov r3, #0x1 - lsl r3, r3, #0xc - str r1, [r0, #0x18] - str r2, [r0, #0x8] - str r3, [r0, #0x10] - bx lr - - thumb_func_start MTX_RotZ33_ -MTX_RotZ33_: ; 0x020C3F70 - stmia r0!, {r2} - mov r3, #0x0 - stmia r0!, {r1,r3} - neg r1, r1 - stmia r0!, {r1-r2} - mov r1, #0x1 - lsl r1, r1, #0xc - str r3, [r0, #0x0] - str r3, [r0, #0x4] - str r3, [r0, #0x8] - str r1, [r0, #0xc] - bx lr - - arm_func_start MTX_MultVec33 -MTX_MultVec33: ; 0x020C3F88 - stmdb sp!, {r4-r6,lr} - ldr r12, [r0, #0x4] - ldr r4, [r1, #0xc] - ldr r3, [r0, #0x0] - smull r6, r5, r12, r4 - ldr r4, [r1, #0x0] - ldr r0, [r0, #0x8] - smlal r6, r5, r3, r4 - ldr r4, [r1, #0x18] - smlal r6, r5, r0, r4 - mov r4, r6, lsr #0xc - orr r4, r4, r5, lsl #0x14 - str r4, [r2, #0x0] - ldr r4, [r1, #0x10] - ldr r5, [r1, #0x4] - smull r6, lr, r12, r4 - smlal r6, lr, r3, r5 - ldr r4, [r1, #0x1c] - smlal r6, lr, r0, r4 - mov r4, r6, lsr #0xc - orr r4, r4, lr, lsl #0x14 - str r4, [r2, #0x4] - ldr lr, [r1, #0x14] - ldr r4, [r1, #0x8] - smull r5, lr, r12, lr - smlal r5, lr, r3, r4 - ldr r1, [r1, #0x20] - smlal r5, lr, r0, r1 - mov r0, r5, lsr #0xc - orr r0, r0, lr, lsl #0x14 - str r0, [r2, #0x8] - ldmia sp!, {r4-r6,lr} - bx lr - - arm_func_start MTX_Concat33 -MTX_Concat33: ; 0x020C400C - stmdb sp!, {r4-r9,lr} - sub sp, sp, #0x24 - ldr r5, [r0, #0x4] - ldr r3, [r1, #0xc] - mov r12, r2 - smull r8, r7, r5, r3 - ldr r6, [r0, #0x0] - ldr r3, [r1, #0x0] - cmp r12, r1 - smlal r8, r7, r6, r3 - ldr r4, [r0, #0x8] - ldr r3, [r1, #0x18] - addeq r2, sp, #0x0 - smlal r8, r7, r4, r3 - mov r3, r8, lsr #0xc - orr r3, r3, r7, lsl #0x14 - str r3, [r2, #0x0] - ldr r3, [r1, #0x10] - ldr r7, [r1, #0x4] - smull r9, r8, r5, r3 - smlal r9, r8, r6, r7 - ldr r3, [r1, #0x1c] - add lr, sp, #0x0 - smlal r9, r8, r4, r3 - mov r3, r9, lsr #0xc - orr r3, r3, r8, lsl #0x14 - str r3, [r2, #0x4] - ldr r3, [r1, #0x14] - ldr r7, [r1, #0x8] - smull r9, r8, r5, r3 - smlal r9, r8, r6, r7 - ldr r6, [r1, #0x20] - cmp r2, lr - smlal r9, r8, r4, r6 - mov r4, r9, lsr #0xc - orr r4, r4, r8, lsl #0x14 - str r4, [r2, #0x8] - ldr r4, [r0, #0x10] - ldr r5, [r0, #0xc] - smull r9, r8, r4, r3 - smlal r9, r8, r5, r7 - ldr r3, [r0, #0x14] - addne sp, sp, #0x24 - smlal r9, r8, r3, r6 - mov r6, r9, lsr #0xc - orr r6, r6, r8, lsl #0x14 - str r6, [r2, #0x14] - ldr r6, [r1, #0x10] - ldr r7, [r1, #0x4] - smull r9, r8, r4, r6 - smlal r9, r8, r5, r7 - ldr r6, [r1, #0x1c] - smlal r9, r8, r3, r6 - mov r6, r9, lsr #0xc - orr r6, r6, r8, lsl #0x14 - str r6, [r2, #0x10] - ldr r7, [r1, #0xc] - ldr r6, [r1, #0x0] - smull r9, r8, r4, r7 - smlal r9, r8, r5, r6 - ldr r5, [r1, #0x18] - smlal r9, r8, r3, r5 - mov r3, r9, lsr #0xc - orr r3, r3, r8, lsl #0x14 - str r3, [r2, #0xc] - ldr r4, [r0, #0x1c] - ldr r3, [r0, #0x18] - smull r8, r7, r4, r7 - smlal r8, r7, r3, r6 - ldr r0, [r0, #0x20] - smlal r8, r7, r0, r5 - mov r5, r8, lsr #0xc - orr r5, r5, r7, lsl #0x14 - str r5, [r2, #0x18] - ldr r5, [r1, #0x10] - ldr r6, [r1, #0x4] - smull r8, r5, r4, r5 - smlal r8, r5, r3, r6 - ldr r7, [r1, #0x1c] - smlal r8, r5, r0, r7 - mov r6, r8, lsr #0xc - orr r6, r6, r5, lsl #0x14 - str r6, [r2, #0x1c] - ldr r6, [r1, #0x20] - ldr r5, [r1, #0x8] - ldr r1, [r1, #0x14] - smull r7, r1, r4, r1 - smlal r7, r1, r3, r5 - smlal r7, r1, r0, r6 - mov r0, r7, lsr #0xc - orr r0, r0, r1, lsl #0x14 - str r0, [r2, #0x20] - ldmneia sp!, {r4-r9,lr} - bxne lr - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldr r0, [lr, #0x0] - str r0, [r12, #0x0] - add sp, sp, #0x24 - ldmia sp!, {r4-r9,lr} - bx lr - - arm_func_start MTX_ScaleApply33 -MTX_ScaleApply33: ; 0x020C41A8 - stmdb sp!, {r4,lr} - ldr r4, [r0, #0x0] - ldr r12, [sp, #0x8] - smull lr, r4, r2, r4 - mov lr, lr, lsr #0xc - orr lr, lr, r4, lsl #0x14 - str lr, [r1, #0x0] - ldr r4, [r0, #0x4] - smull lr, r4, r2, r4 - mov lr, lr, lsr #0xc - orr lr, lr, r4, lsl #0x14 - str lr, [r1, #0x4] - ldr lr, [r0, #0x8] - smull r4, lr, r2, lr - mov r2, r4, lsr #0xc - orr r2, r2, lr, lsl #0x14 - str r2, [r1, #0x8] - ldr r2, [r0, #0xc] - smull lr, r2, r3, r2 - mov lr, lr, lsr #0xc - orr lr, lr, r2, lsl #0x14 - str lr, [r1, #0xc] - ldr r2, [r0, #0x10] - smull lr, r2, r3, r2 - mov lr, lr, lsr #0xc - orr lr, lr, r2, lsl #0x14 - str lr, [r1, #0x10] - ldr r2, [r0, #0x14] - smull lr, r2, r3, r2 - mov r3, lr, lsr #0xc - orr r3, r3, r2, lsl #0x14 - str r3, [r1, #0x14] - ldr r2, [r0, #0x18] - smull r3, r2, r12, r2 - mov r3, r3, lsr #0xc - orr r3, r3, r2, lsl #0x14 - str r3, [r1, #0x18] - ldr r2, [r0, #0x1c] - smull r3, r2, r12, r2 - mov r3, r3, lsr #0xc - orr r3, r3, r2, lsl #0x14 - str r3, [r1, #0x1c] - ldr r0, [r0, #0x20] - smull r2, r0, r12, r0 - mov r2, r2, lsr #0xc - orr r2, r2, r0, lsl #0x14 - str r2, [r1, #0x20] - ldmia sp!, {r4,lr} - bx lr - - arm_func_start MTX_Identity43_ -MTX_Identity43_: ; 0x020C426C - mov r2, #0x1000 - mov r3, #0x0 - stmia r0!, {r2-r3} - mov r1, #0x0 - stmia r0!, {r1,r3} - stmia r0!, {r2-r3} - stmia r0!, {r1,r3} - stmia r0!, {r2-r3} - stmia r0!, {r1,r3} - bx lr - - arm_func_start MTX_Copy43To44_ -MTX_Copy43To44_: ; 0x020C4294 - stmdb sp!, {r4} - mov r12, #0x0 - ldmia r0!, {r2-r4} - stmia r1!, {r2-r4,r12} - ldmia r0!, {r2-r4} - stmia r1!, {r2-r4,r12} - ldmia r0!, {r2-r4} - stmia r1!, {r2-r4,r12} - mov r12, #0x1000 - ldmia r0!, {r2-r4} - stmia r1!, {r2-r4,r12} - ldmia sp!, {r4} - bx lr - - thumb_func_start MTX_Scale43_ -MTX_Scale43_: ; 0x020C42C8 - stmia r0!, {r1} - mov r1, #0x0 - str r3, [r0, #0x1c] - mov r3, #0x0 - stmia r0!, {r1,r3} - stmia r0!, {r1-r3} - mov r2, #0x0 - stmia r0!, {r1,r3} - add r0, #0x4 - stmia r0!, {r1-r3} - bx lr - .balign 4 - - thumb_func_start MTX_RotX43_ -MTX_RotX43_: ; 0x020C42E0 - str r1, [r0, #0x14] - neg r1, r1 - str r1, [r0, #0x1c] - mov r1, #0x1 - lsl r1, r1, #0xc - stmia r0!, {r1} - mov r3, #0x0 - mov r1, #0x0 - stmia r0!, {r1,r3} - stmia r0!, {r1-r2} - str r1, [r0, #0x4] - add r0, #0xc - stmia r0!, {r2-r3} - stmia r0!, {r1,r3} - bx lr - .balign 4 - - thumb_func_start MTX_RotY43_ -MTX_RotY43_: ; 0x020C4300 - str r1, [r0, #0x18] - mov r3, #0x0 - stmia r0!, {r2-r3} - neg r1, r1 - stmia r0!, {r1,r3} - mov r1, #0x1 - lsl r1, r1, #0xc - stmia r0!, {r1,r3} - add r0, #0x4 - mov r1, #0x0 - stmia r0!, {r1-r3} - stmia r0!, {r1,r3} - bx lr - .balign 4 - - arm_func_start MTX_MultVec43 -MTX_MultVec43: ; 0x020C431C - stmdb sp!, {r4-r6,lr} - ldr r12, [r0, #0x4] - ldr r4, [r1, #0xc] - ldr r3, [r0, #0x0] - smull r6, r5, r12, r4 - ldr r4, [r1, #0x0] - ldr r0, [r0, #0x8] - smlal r6, r5, r3, r4 - ldr r4, [r1, #0x18] - smlal r6, r5, r0, r4 - mov r4, r6, lsr #0xc - orr r4, r4, r5, lsl #0x14 - str r4, [r2, #0x0] - ldr r5, [r2, #0x0] - ldr r4, [r1, #0x24] - add r4, r5, r4 - str r4, [r2, #0x0] - ldr r4, [r1, #0x10] - ldr r5, [r1, #0x4] - smull r6, lr, r12, r4 - smlal r6, lr, r3, r5 - ldr r4, [r1, #0x1c] - smlal r6, lr, r0, r4 - mov r4, r6, lsr #0xc - orr r4, r4, lr, lsl #0x14 - str r4, [r2, #0x4] - ldr r5, [r2, #0x4] - ldr r4, [r1, #0x28] - add r4, r5, r4 - str r4, [r2, #0x4] - ldr lr, [r1, #0x14] - ldr r4, [r1, #0x8] - smull r5, lr, r12, lr - smlal r5, lr, r3, r4 - ldr r3, [r1, #0x20] - smlal r5, lr, r0, r3 - mov r0, r5, lsr #0xc - orr r0, r0, lr, lsl #0x14 - str r0, [r2, #0x8] - ldr r3, [r2, #0x8] - ldr r0, [r1, #0x2c] - add r0, r3, r0 - str r0, [r2, #0x8] - ldmia sp!, {r4-r6,lr} - bx lr - - arm_func_start MTX_Concat43 -MTX_Concat43: ; 0x020C43D0 - stmdb sp!, {r4-r10,lr} - sub sp, sp, #0x30 - ldr r5, [r0, #0x4] - ldr r3, [r1, #0xc] - mov r12, r2 - smull r8, r7, r5, r3 - ldr r6, [r0, #0x0] - ldr r3, [r1, #0x0] - cmp r12, r1 - smlal r8, r7, r6, r3 - ldr r4, [r0, #0x8] - ldr r3, [r1, #0x18] - addeq r2, sp, #0x0 - smlal r8, r7, r4, r3 - mov r3, r8, lsr #0xc - orr r3, r3, r7, lsl #0x14 - str r3, [r2, #0x0] - ldr r3, [r1, #0x10] - ldr r7, [r1, #0x4] - smull r9, r8, r5, r3 - smlal r9, r8, r6, r7 - ldr r3, [r1, #0x1c] - add lr, sp, #0x0 - smlal r9, r8, r4, r3 - mov r3, r9, lsr #0xc - orr r3, r3, r8, lsl #0x14 - str r3, [r2, #0x4] - ldr r3, [r1, #0x14] - ldr r7, [r1, #0x8] - smull r9, r8, r5, r3 - smlal r9, r8, r6, r7 - ldr r6, [r1, #0x20] - smlal r9, r8, r4, r6 - mov r4, r9, lsr #0xc - orr r4, r4, r8, lsl #0x14 - str r4, [r2, #0x8] - ldr r4, [r0, #0x10] - ldr r5, [r0, #0xc] - smull r9, r8, r4, r3 - smlal r9, r8, r5, r7 - ldr r3, [r0, #0x14] - smlal r9, r8, r3, r6 - mov r6, r9, lsr #0xc - orr r6, r6, r8, lsl #0x14 - str r6, [r2, #0x14] - ldr r6, [r1, #0x10] - ldr r7, [r1, #0x4] - smull r9, r8, r4, r6 - smlal r9, r8, r5, r7 - ldr r6, [r1, #0x1c] - smlal r9, r8, r3, r6 - mov r6, r9, lsr #0xc - orr r6, r6, r8, lsl #0x14 - str r6, [r2, #0x10] - ldr r7, [r1, #0xc] - ldr r8, [r1, #0x0] - smull r10, r9, r4, r7 - smlal r10, r9, r5, r8 - ldr r6, [r1, #0x18] - smlal r10, r9, r3, r6 - mov r3, r10, lsr #0xc - orr r3, r3, r9, lsl #0x14 - str r3, [r2, #0xc] - ldr r4, [r0, #0x1c] - ldr r5, [r0, #0x18] - smull r9, r7, r4, r7 - smlal r9, r7, r5, r8 - ldr r3, [r0, #0x20] - smlal r9, r7, r3, r6 - mov r6, r9, lsr #0xc - orr r6, r6, r7, lsl #0x14 - str r6, [r2, #0x18] - ldr r6, [r1, #0x10] - ldr r7, [r1, #0x4] - smull r9, r6, r4, r6 - smlal r9, r6, r5, r7 - ldr r8, [r1, #0x1c] - smlal r9, r6, r3, r8 - mov r7, r9, lsr #0xc - orr r7, r7, r6, lsl #0x14 - str r7, [r2, #0x1c] - ldr r7, [r1, #0x14] - ldr r6, [r1, #0x8] - smull r9, r8, r4, r7 - smlal r9, r8, r5, r6 - ldr r5, [r1, #0x20] - smlal r9, r8, r3, r5 - mov r3, r9, lsr #0xc - orr r3, r3, r8, lsl #0x14 - str r3, [r2, #0x20] - ldr r4, [r0, #0x28] - ldr r3, [r0, #0x24] - smull r8, r7, r4, r7 - smlal r8, r7, r3, r6 - ldr r0, [r0, #0x2c] - ldr r6, [r1, #0x2c] - smlal r8, r7, r0, r5 - mov r5, r8, lsr #0xc - orr r5, r5, r7, lsl #0x14 - adds r5, r6, r5 - str r5, [r2, #0x2c] - ldr r5, [r1, #0x10] - ldr r6, [r1, #0x4] - smull r8, r5, r4, r5 - smlal r8, r5, r3, r6 - ldr r7, [r1, #0x1c] - ldr r9, [r1, #0x28] - smlal r8, r5, r0, r7 - mov r6, r8, lsr #0xc - orr r6, r6, r5, lsl #0x14 - adds r5, r9, r6 - str r5, [r2, #0x28] - ldr r8, [r1, #0x24] - ldr r6, [r1, #0x18] - ldr r5, [r1, #0x0] - ldr r1, [r1, #0xc] - smull r7, r1, r4, r1 - smlal r7, r1, r3, r5 - smlal r7, r1, r0, r6 - mov r0, r7, lsr #0xc - orr r0, r0, r1, lsl #0x14 - adds r0, r8, r0 - cmp r2, lr - str r0, [r2, #0x24] - addne sp, sp, #0x30 - ldmneia sp!, {r4-r10,lr} - bxne lr - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr, {r0-r3} - stmia r12, {r0-r3} - add sp, sp, #0x30 - ldmia sp!, {r4-r10,lr} - bx lr - - arm_func_start MTX_Inverse43 -MTX_Inverse43: ; 0x020C45F0 - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x5c - mov r10, r0 - ldr r11, [r10, #0x14] - cmp r10, r1 - addeq r9, sp, #0x2c - ldr r3, [r10, #0x18] - ldr r2, [r10, #0xc] - ldr r8, [r10, #0x20] - str r1, [sp, #0x0] - movne r9, r1 - smull r7, r5, r2, r8 - smull r6, r1, r11, r3 - ldr r4, [r10, #0x1c] - subs r12, r7, r6 - ldr r0, [r10, #0x10] - smull r6, lr, r11, r4 - sbc r11, r5, r1 - smull r5, r4, r2, r4 - mov r1, #0x800 - smull r8, r7, r0, r8 - smull r3, r2, r0, r3 - adds r12, r12, r1 - adc r0, r11, #0x0 - subs r8, r8, r6 - sbc r6, r7, lr - adds r7, r8, r1 - adc r11, r6, #0x0 - mov r7, r7, lsr #0xc - mov r8, r12, lsr #0xc - orr r7, r7, r11, lsl #0x14 - orr r8, r8, r0, lsl #0x14 - subs r0, r5, r3 - sbc r12, r4, r2 - ldr r6, [r10, #0x4] - ldr r11, [r10, #0x0] - smull r3, r2, r6, r8 - adds r0, r0, r1 - smull r5, r4, r11, r7 - adc r11, r12, #0x0 - mov r6, r0, lsr #0xc - subs r3, r5, r3 - ldr r0, [r10, #0x8] - orr r6, r6, r11, lsl #0x14 - sbc r2, r4, r2 - smlal r3, r2, r0, r6 - adds r0, r3, r1 - mov r1, r8, asr #0x1f - str r1, [sp, #0x4] - mov r1, r7, asr #0x1f - str r1, [sp, #0x8] - mov r1, r6, asr #0x1f - adc r2, r2, #0x0 - mov r0, r0, lsr #0xc - orrs r0, r0, r2, lsl #0x14 - str r1, [sp, #0xc] - addeq sp, sp, #0x5c - mvneq r0, #0x0 - ldmeqia sp!, {r4-r11,lr} - bxeq lr - bl FX_InvAsync - ldr r1, [r10, #0x8] - ldr r2, [r10, #0x1c] - ldr r11, [r10, #0x10] - smull r0, r4, r2, r1 - smull r3, r2, r11, r1 - ldr r5, [r10, #0x18] - str r2, [sp, #0x18] - str r3, [sp, #0x14] - smull r3, r2, r5, r1 - str r2, [sp, #0x20] - ldr r2, [r10, #0x20] - ldr lr, [r10, #0x4] - str r2, [sp, #0x10] - ldr r5, [sp, #0x10] - str r3, [sp, #0x1c] - smull r12, r5, lr, r5 - subs r0, r12, r0 - ldr r2, [r10, #0xc] - sbc r4, r5, r4 - smull r1, r5, r2, r1 - str r5, [sp, #0x28] - mov r5, r0, lsr #0xc - ldr r11, [r10, #0x14] - orr r5, r5, r4, lsl #0x14 - smull r4, r2, lr, r11 - ldr r0, [sp, #0x14] - ldr r3, [r10, #0x0] - subs r4, r4, r0 - ldr r0, [sp, #0x18] - mov r4, r4, lsr #0xc - sbc r0, r2, r0 - orr r4, r4, r0, lsl #0x14 - ldr r0, [sp, #0x10] - ldr r2, [sp, #0x1c] - smull r12, r0, r3, r0 - subs r2, r12, r2 - ldr r12, [sp, #0x20] - sbc r0, r0, r12 - smull r12, r11, r3, r11 - ldr r3, [sp, #0x28] - subs r1, r12, r1 - sbc r3, r11, r3 - mov r11, r2, lsr #0xc - orr r11, r11, r0, lsl #0x14 - mov r0, r1, lsr #0xc - str r0, [sp, #0x24] - orr r0, r0, r3, lsl #0x14 - str r0, [sp, #0x24] - bl FX_GetDivResult - smull r2, r1, r0, r5 - mov r2, r2, lsr #0xc - orr r2, r2, r1, lsl #0x14 - rsb lr, r2, #0x0 - smull r2, r1, r0, r4 - mov r4, r2, lsr #0xc - orr r4, r4, r1, lsl #0x14 - smull r2, r1, r0, r11 - mov r3, r2, lsr #0xc - orr r3, r3, r1, lsl #0x14 - ldr r1, [sp, #0x24] - umull r11, r5, r0, r7 - smull r2, r1, r0, r1 - mov r2, r2, lsr #0xc - orr r2, r2, r1, lsl #0x14 - ldr r1, [sp, #0x8] - mov r12, r0, asr #0x1f - mla r5, r0, r1, r5 - mla r5, r12, r7, r5 - mov r1, r11, lsr #0xc - orr r1, r1, r5, lsl #0x14 - str r1, [r9, #0x0] - str lr, [r9, #0x4] - str r4, [r9, #0x8] - ldr r1, [sp, #0x4] - umull r5, r4, r0, r8 - mla r4, r0, r1, r4 - mla r4, r12, r8, r4 - mov r1, r5, lsr #0xc - orr r1, r1, r4, lsl #0x14 - rsb r1, r1, #0x0 - str r1, [r9, #0xc] - ldr r1, [sp, #0xc] - rsb r2, r2, #0x0 - str r3, [r9, #0x10] - str r2, [r9, #0x14] - umull r3, r2, r0, r6 - mla r2, r0, r1, r2 - mla r2, r12, r6, r2 - mov r1, r3, lsr #0xc - orr r1, r1, r2, lsl #0x14 - str r1, [r9, #0x18] - ldr r3, [r10, #0x0] - ldr r1, [r10, #0x1c] - ldr r2, [r10, #0x18] - smull r5, r4, r3, r1 - ldr r1, [r10, #0x4] - smull r3, r1, r2, r1 - subs r2, r5, r3 - sbc r1, r4, r1 - mov r2, r2, lsr #0xc - orr r2, r2, r1, lsl #0x14 - smull r2, r1, r0, r2 - mov r2, r2, lsr #0xc - orr r2, r2, r1, lsl #0x14 - rsb r1, r2, #0x0 - str r1, [r9, #0x1c] - ldr r3, [r10, #0x0] - ldr r1, [r10, #0x10] - ldr r2, [r10, #0xc] - smull r5, r4, r3, r1 - ldr r1, [r10, #0x4] - smull r3, r1, r2, r1 - subs r2, r5, r3 - sbc r1, r4, r1 - mov r2, r2, lsr #0xc - orr r2, r2, r1, lsl #0x14 - smull r2, r1, r0, r2 - mov r0, r2, lsr #0xc - orr r0, r0, r1, lsl #0x14 - str r0, [r9, #0x20] - add r0, sp, #0x2c - ldr r2, [r9, #0xc] - ldr r1, [r10, #0x28] - ldr r4, [r9, #0x0] - smull r7, r1, r2, r1 - ldr r3, [r10, #0x24] - ldr r6, [r9, #0x18] - smlal r7, r1, r4, r3 - ldr r5, [r10, #0x2c] - cmp r9, r0 - smlal r7, r1, r6, r5 - mov r2, r7, lsr #0xc - orr r2, r2, r1, lsl #0x14 - rsb r1, r2, #0x0 - str r1, [r9, #0x24] - ldr r2, [r9, #0x10] - ldr r1, [r10, #0x28] - ldr r4, [r9, #0x4] - smull r7, r1, r2, r1 - ldr r3, [r10, #0x24] - ldr r6, [r9, #0x1c] - smlal r7, r1, r4, r3 - ldr r5, [r10, #0x2c] - smlal r7, r1, r6, r5 - mov r2, r7, lsr #0xc - orr r2, r2, r1, lsl #0x14 - rsb r1, r2, #0x0 - str r1, [r9, #0x28] - ldr r1, [r10, #0x28] - ldr r2, [r9, #0x14] - ldr r4, [r9, #0x8] - smull r7, r1, r2, r1 - ldr r3, [r10, #0x24] - ldr r6, [r9, #0x20] - smlal r7, r1, r4, r3 - ldr r5, [r10, #0x2c] - smlal r7, r1, r6, r5 - mov r2, r7, lsr #0xc - orr r2, r2, r1, lsl #0x14 - rsb r1, r2, #0x0 - str r1, [r9, #0x2c] - bne _020C4974 - ldr r1, [sp, #0x0] - bl MI_Copy48B -_020C4974: - mov r0, #0x0 - add sp, sp, #0x5c - ldmia sp!, {r4-r11,lr} - bx lr - - arm_func_start MTX_ScaleApply43 -MTX_ScaleApply43: ; 0x020C4984 - stmdb sp!, {r4-r5,lr} - sub sp, sp, #0x4 - ldr r12, [sp, #0x10] - mov r5, r0 - str r12, [sp, #0x0] - mov r4, r1 - bl MTX_ScaleApply33 - ldr r0, [r5, #0x24] - str r0, [r4, #0x24] - ldr r0, [r5, #0x28] - str r0, [r4, #0x28] - ldr r0, [r5, #0x2c] - str r0, [r4, #0x2c] - add sp, sp, #0x4 - ldmia sp!, {r4-r5,lr} - bx lr - - arm_func_start MTX_Identity44_ -MTX_Identity44_: ; 0x020C49C4 - mov r2, #0x1000 - mov r3, #0x0 - stmia r0!, {r2-r3} - mov r1, #0x0 - stmia r0!, {r1,r3} - stmia r0!, {r1-r3} - stmia r0!, {r1,r3} - stmia r0!, {r1-r3} - stmia r0!, {r1,r3} - stmia r0!, {r1-r2} - bx lr - - arm_func_start MTX_Copy44To43_ -MTX_Copy44To43_: - ldmia r0!, {r2-r3,r12} - add r0, r0, #0x4 - stmia r1!, {r2-r3,r12} - ldmia r0!, {r2-r3,r12} - add r0, r0, #0x4 - stmia r1!, {r2-r3,r12} - ldmia r0!, {r2-r3,r12} - add r0, r0, #0x4 - stmia r1!, {r2-r3,r12} - ldmia r0!, {r2-r3,r12} - add r0, r0, #0x4 - stmia r1!, {r2-r3,r12} - bx lr - - thumb_func_start MTX_RotX44_ -MTX_RotX44_: ; 0x020C4A24 - str r2, [r0, #0x14] - str r2, [r0, #0x28] - str r1, [r0, #0x18] - neg r1, r1 - str r1, [r0, #0x24] - mov r1, #0x1 - mov r2, #0x0 - lsl r1, r1, #0xc - mov r3, #0x0 - stmia r0!, {r1-r3} - stmia r0!, {r2-r3} - add r0, #0x8 - stmia r0!, {r2-r3} - add r0, #0x8 - stmia r0!, {r2-r3} - stmia r0!, {r2-r3} - str r1, [r0, #0x0] - bx lr - - thumb_func_start MTX_RotY44_ -MTX_RotY44_: ; 0x020C4A48 - str r2, [r0, #0x0] - str r2, [r0, #0x28] - str r1, [r0, #0x20] - neg r1, r1 - str r1, [r0, #0x8] - mov r3, #0x1 - mov r1, #0x0 - lsl r3, r3, #0xc - mov r2, #0x0 - str r2, [r0, #0x4] - add r0, #0xc - stmia r0!, {r1-r3} - stmia r0!, {r1-r2} - str r2, [r0, #0x4] - add r0, #0xc - stmia r0!, {r1-r2} - stmia r0!, {r1-r3} - bx lr - - thumb_func_start MTX_RotZ44_ -MTX_RotZ44_: ; 0x020C4A6C - str r2, [r0, #0x0] - str r2, [r0, #0x14] - str r1, [r0, #0x4] - neg r1, r1 - str r1, [r0, #0x10] - mov r3, #0x1 - mov r1, #0x0 - lsl r3, r3, #0xc - mov r2, #0x0 - add r0, #0x8 - stmia r0!, {r1-r2} - add r0, #0x8 - stmia r0!, {r1-r2} - stmia r0!, {r1-r3} - stmia r0!, {r1-r2} - stmia r0!, {r1-r3} - bx lr - .balign 4 - - arm_func_start MTX_Concat44 -MTX_Concat44: ; 0x020C4A90 - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x44 - ldr r5, [r0, #0x4] - ldr r3, [r1, #0x10] - mov r12, r2 - smull r6, r4, r5, r3 - ldr r9, [r0, #0x0] - ldr r3, [r1, #0x0] - cmp r12, r1 - smlal r6, r4, r9, r3 - ldr r10, [r0, #0x8] - ldr r3, [r1, #0x20] - ldr r8, [r0, #0xc] - smlal r6, r4, r10, r3 - ldr r3, [r1, #0x30] - addeq r2, sp, #0x0 - smlal r6, r4, r8, r3 - mov r3, r6, lsr #0xc - orr r3, r3, r4, lsl #0x14 - str r3, [r2, #0x0] - ldr r3, [r1, #0x14] - ldr r4, [r1, #0x4] - smull r7, r6, r5, r3 - smlal r7, r6, r9, r4 - ldr r3, [r1, #0x24] - ldr r4, [r1, #0x34] - smlal r7, r6, r10, r3 - smlal r7, r6, r8, r4 - mov r3, r7, lsr #0xc - orr r3, r3, r6, lsl #0x14 - str r3, [r2, #0x4] - ldr r3, [r1, #0x1c] - ldr r4, [r1, #0xc] - smull r7, r6, r5, r3 - smlal r7, r6, r9, r4 - ldr r3, [r1, #0x2c] - ldr r4, [r1, #0x3c] - smlal r7, r6, r10, r3 - smlal r7, r6, r8, r4 - mov r3, r7, lsr #0xc - orr r3, r3, r6, lsl #0x14 - str r3, [r2, #0xc] - ldr r6, [r1, #0x18] - ldr r7, [r1, #0x8] - smull r4, r3, r5, r6 - smlal r4, r3, r9, r7 - ldr r9, [r1, #0x28] - ldr r5, [r1, #0x38] - smlal r4, r3, r10, r9 - smlal r4, r3, r8, r5 - mov r4, r4, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x8] - ldr r8, [r0, #0x14] - ldr r10, [r0, #0x10] - smull r4, r3, r8, r6 - smlal r4, r3, r10, r7 - ldr r7, [r0, #0x18] - ldr r6, [r0, #0x1c] - smlal r4, r3, r7, r9 - smlal r4, r3, r6, r5 - mov r4, r4, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x18] - ldr r3, [r1, #0x14] - ldr r4, [r1, #0x4] - smull r11, r3, r8, r3 - smlal r11, r3, r10, r4 - ldr r5, [r1, #0x24] - ldr r9, [r1, #0x34] - smlal r11, r3, r7, r5 - smlal r11, r3, r6, r9 - mov r4, r11, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x14] - ldr r3, [r1, #0x1c] - ldr r4, [r1, #0xc] - smull r11, r3, r8, r3 - smlal r11, r3, r10, r4 - ldr r5, [r1, #0x2c] - ldr r9, [r1, #0x3c] - smlal r11, r3, r7, r5 - smlal r11, r3, r6, r9 - mov r4, r11, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x1c] - ldr r9, [r1, #0x10] - ldr r11, [r1, #0x0] - smull r4, r3, r8, r9 - smlal r4, r3, r10, r11 - ldr r5, [r1, #0x20] - ldr r8, [r1, #0x30] - smlal r4, r3, r7, r5 - smlal r4, r3, r6, r8 - mov r4, r4, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x10] - ldr r6, [r0, #0x24] - ldr r7, [r0, #0x20] - smull r4, r3, r6, r9 - smlal r4, r3, r7, r11 - ldr r10, [r0, #0x28] - add lr, sp, #0x0 - smlal r4, r3, r10, r5 - ldr r5, [r0, #0x2c] - cmp r2, lr - smlal r4, r3, r5, r8 - mov r4, r4, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x20] - ldr r3, [r1, #0x14] - ldr r4, [r1, #0x4] - smull r11, r3, r6, r3 - smlal r11, r3, r7, r4 - ldr r8, [r1, #0x24] - ldr r9, [r1, #0x34] - smlal r11, r3, r10, r8 - smlal r11, r3, r5, r9 - mov r4, r11, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x24] - ldr r3, [r1, #0x1c] - ldr r4, [r1, #0xc] - smull r11, r3, r6, r3 - smlal r11, r3, r7, r4 - ldr r8, [r1, #0x2c] - ldr r9, [r1, #0x3c] - smlal r11, r3, r10, r8 - smlal r11, r3, r5, r9 - mov r4, r11, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x2c] - ldr r9, [r1, #0x18] - ldr r8, [r1, #0x8] - smull r4, r3, r6, r9 - smlal r4, r3, r7, r8 - ldr r7, [r1, #0x28] - ldr r6, [r1, #0x38] - smlal r4, r3, r10, r7 - smlal r4, r3, r5, r6 - mov r4, r4, lsr #0xc - orr r4, r4, r3, lsl #0x14 - str r4, [r2, #0x28] - ldr r5, [r0, #0x34] - ldr r4, [r0, #0x30] - smull r10, r9, r5, r9 - ldr r3, [r0, #0x38] - smlal r10, r9, r4, r8 - smlal r10, r9, r3, r7 - ldr r0, [r0, #0x3c] - addne sp, sp, #0x44 - smlal r10, r9, r0, r6 - mov r6, r10, lsr #0xc - orr r6, r6, r9, lsl #0x14 - str r6, [r2, #0x38] - ldr r6, [r1, #0x14] - ldr r7, [r1, #0x4] - smull r10, r6, r5, r6 - smlal r10, r6, r4, r7 - ldr r8, [r1, #0x24] - ldr r9, [r1, #0x34] - smlal r10, r6, r3, r8 - smlal r10, r6, r0, r9 - mov r7, r10, lsr #0xc - orr r7, r7, r6, lsl #0x14 - str r7, [r2, #0x34] - ldr r6, [r1, #0x10] - ldr r7, [r1, #0x0] - smull r10, r6, r5, r6 - smlal r10, r6, r4, r7 - ldr r8, [r1, #0x20] - ldr r9, [r1, #0x30] - smlal r10, r6, r3, r8 - smlal r10, r6, r0, r9 - mov r7, r10, lsr #0xc - orr r7, r7, r6, lsl #0x14 - str r7, [r2, #0x30] - ldr r8, [r1, #0x3c] - ldr r7, [r1, #0x2c] - ldr r6, [r1, #0xc] - ldr r1, [r1, #0x1c] - smull r9, r1, r5, r1 - smlal r9, r1, r4, r6 - smlal r9, r1, r3, r7 - smlal r9, r1, r0, r8 - mov r0, r9, lsr #0xc - orr r0, r0, r1, lsl #0x14 - str r0, [r2, #0x3c] - ldmneia sp!, {r4-r11,lr} - bxne lr - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr!, {r0-r3} - stmia r12!, {r0-r3} - ldmia lr, {r0-r3} - stmia r12, {r0-r3} - add sp, sp, #0x44 - ldmia sp!, {r4-r11,lr} - bx lr - - arm_func_start MTX_TransApply44 -MTX_TransApply44: ; 0x020C4DB4 - stmdb sp!, {r4-r7,lr} - sub sp, sp, #0x4 - mov r7, r0 - mov r6, r1 - mov r5, r2 - mov r4, r3 - cmp r7, r6 - beq _020C4DD8 - bl MI_Copy48B -_020C4DD8: - ldr r0, [r7, #0x10] - ldr r1, [r7, #0x0] - smull r3, r2, r4, r0 - smlal r3, r2, r5, r1 - ldr r0, [sp, #0x18] - ldr r1, [r7, #0x20] - ldr r12, [r7, #0x30] - smlal r3, r2, r0, r1 - mov r1, r3, lsr #0xc - orr r1, r1, r2, lsl #0x14 - add r1, r12, r1 - str r1, [r6, #0x30] - ldr r1, [r7, #0x14] - ldr r2, [r7, #0x4] - smull r12, r3, r4, r1 - smlal r12, r3, r5, r2 - ldr r1, [r7, #0x24] - ldr r2, [r7, #0x34] - smlal r12, r3, r0, r1 - mov r1, r12, lsr #0xc - orr r1, r1, r3, lsl #0x14 - add r1, r2, r1 - str r1, [r6, #0x34] - ldr r1, [r7, #0x18] - ldr r2, [r7, #0x8] - smull r12, r3, r4, r1 - smlal r12, r3, r5, r2 - ldr r1, [r7, #0x28] - ldr r2, [r7, #0x38] - smlal r12, r3, r0, r1 - mov r1, r12, lsr #0xc - orr r1, r1, r3, lsl #0x14 - add r1, r2, r1 - str r1, [r6, #0x38] - ldr r1, [r7, #0x1c] - ldr r2, [r7, #0xc] - smull r12, r3, r4, r1 - smlal r12, r3, r5, r2 - ldr r1, [r7, #0x2c] - ldr r2, [r7, #0x3c] - smlal r12, r3, r0, r1 - mov r0, r12, lsr #0xc - orr r0, r0, r3, lsl #0x14 - add r0, r2, r0 - str r0, [r6, #0x3c] - add sp, sp, #0x4 - ldmia sp!, {r4-r7,lr} - bx lr - - arm_func_start FX_ModS32 -FX_ModS32: ; 0x020C4E98 - stmdb sp!, {lr} - sub sp, sp, #0x4 - ldr ip, _020C4EE0 ; =0x04000280 - mov lr, #0x0 - ldr r3, _020C4EE4 ; =0x04000290 - strh lr, [r12, #0x0] - ldr r2, _020C4EE8 ; =0x04000298 - str r0, [r3, #0x0] - str r1, [r2, #0x0] - str lr, [r2, #0x4] -_020C4EC0: - ldrh r0, [r12, #0x0] - ands r0, r0, #0x8000 - bne _020C4EC0 - ldr r0, _020C4EEC ; =0x040002A8 - ldr r0, [r0, #0x0] - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - .balign 4 -_020C4EE0: .word 0x04000280 -_020C4EE4: .word 0x04000290 -_020C4EE8: .word 0x04000298 -_020C4EEC: .word 0x040002A8 - - arm_func_start FX_DivS32 -FX_DivS32: ; 0x020C4EF0 - stmdb sp!, {lr} - sub sp, sp, #0x4 - ldr ip, _020C4F38 ; =0x04000280 - mov lr, #0x0 - ldr r3, _020C4F3C ; =0x04000290 - strh lr, [r12, #0x0] - ldr r2, _020C4F40 ; =0x04000298 - str r0, [r3, #0x0] - str r1, [r2, #0x0] - str lr, [r2, #0x4] -_020C4F18: - ldrh r0, [r12, #0x0] - ands r0, r0, #0x8000 - bne _020C4F18 - ldr r0, _020C4F44 ; =0x040002A0 - ldr r0, [r0, #0x0] - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - .balign 4 -_020C4F38: .word 0x04000280 -_020C4F3C: .word 0x04000290 -_020C4F40: .word 0x04000298 -_020C4F44: .word 0x040002A0 - - arm_func_start FX_DivAsync -FX_DivAsync: ; 0x020C4F48 - ldr r2, _020C4F74 ; =0x04000280 - mov r12, #0x1 - ldr r3, _020C4F78 ; =0x04000290 - strh r12, [r2, #0x0] - mov r12, #0x0 - str r12, [r3, #0x0] - ldr r2, _020C4F7C ; =0x04000298 - str r0, [r3, #0x4] - str r1, [r2, #0x0] - str r12, [r2, #0x4] - bx lr - .balign 4 -_020C4F74: .word 0x04000280 -_020C4F78: .word 0x04000290 -_020C4F7C: .word 0x04000298 - - arm_func_start FX_GetSqerResult -FX_GetSqerResult: ; 0x020C4F80 - ldr r1, _020C4FA4 ; =0x040002B0 -_020C4F84: - ldrh r0, [r1, #0x0] - ands r0, r0, #0x8000 - bne _020C4F84 - ldr r0, _020C4FA8 ; =0x040002B4 - ldr r0, [r0, #0x0] - add r0, r0, #0x200 - mov r0, r0, lsr #0xa - bx lr - .balign 4 -_020C4FA4: .word 0x040002B0 -_020C4FA8: .word 0x040002B4 - - arm_func_start FX_InvAsync -FX_InvAsync: - ldr r1, _020C4FDC ; =0x04000280 - mov r3, #0x1 - ldr r2, _020C4FE0 ; =0x04000290 - strh r3, [r1, #0x0] - mov r12, #0x0 - str r12, [r2, #0x0] - mov r3, #0x1000 - ldr r1, _020C4FE4 ; =0x04000298 - str r3, [r2, #0x4] - str r0, [r1, #0x0] - str r12, [r1, #0x4] - bx lr - .balign 4 -_020C4FDC: .word 0x04000280 -_020C4FE0: .word 0x04000290 -_020C4FE4: .word 0x04000298 - - arm_func_start FX_GetDivResult -FX_GetDivResult: ; 0x020C4FE8 - ldr r1, _020C501C ; =0x04000280 -_020C4FEC: - ldrh r0, [r1, #0x0] - ands r0, r0, #0x8000 - bne _020C4FEC - ldr r1, _020C5020 ; =0x040002A0 - mov r0, #0x80000 - ldr r2, [r1, #0x0] - ldr r1, [r1, #0x4] - adds r0, r2, r0 - adc r1, r1, #0x0 - mov r0, r0, lsr #0x14 - orr r0, r0, r1, lsl #0xc - bx lr - .balign 4 -_020C501C: .word 0x04000280 -_020C5020: .word 0x040002A0 - - arm_func_start FX_GetDivResultFx64c -FX_GetDivResultFx64c: ; 0x020C5024 - ldr r1, _020C5044 ; =0x04000280 -_020C5028: - ldrh r0, [r1, #0x0] - ands r0, r0, #0x8000 - bne _020C5028 - ldr r1, _020C5048 ; =0x040002A0 - ldr r0, [r1, #0x0] - ldr r1, [r1, #0x4] - bx lr - .balign 4 -_020C5044: .word 0x04000280 -_020C5048: .word 0x040002A0 - - arm_func_start FX_Sqrt -FX_Sqrt: ; 0x020C504C - stmdb sp!, {lr} - sub sp, sp, #0x4 - cmp r0, #0x0 - addle sp, sp, #0x4 - movle r0, #0x0 - ldmleia sp!, {lr} - bxle lr - ldr r2, _020C5094 ; =0x040002B0 - mov r3, #0x1 - strh r3, [r2, #0x0] - ldr r1, _020C5098 ; =0x040002B8 - mov r2, #0x0 - str r2, [r1, #0x0] - str r0, [r1, #0x4] - bl FX_GetSqerResult - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - .balign 4 -_020C5094: .word 0x040002B0 -_020C5098: .word 0x040002B8 - - arm_func_start FX_Inv -FX_Inv: ; 0x020C509C - stmdb sp!, {lr} - sub sp, sp, #0x4 - bl FX_InvAsync - bl FX_GetDivResult - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - - arm_func_start FX_Div -FX_Div: ; 0x020C50B8 - stmdb sp!, {lr} - sub sp, sp, #0x4 - bl FX_DivAsync - bl FX_GetDivResult - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - - arm_func_start VEC_MultAdd -VEC_MultAdd: ; 0x020C50D4 - stmdb sp!, {r4,lr} - ldr r4, [r1, #0x0] - ldr lr, [r2, #0x0] - smull r12, r4, r0, r4 - mov r12, r12, lsr #0xc - orr r12, r12, r4, lsl #0x14 - add r4, lr, r12 - str r4, [r3, #0x0] - ldr r12, [r1, #0x4] - ldr r4, [r2, #0x4] - smull lr, r12, r0, r12 - mov lr, lr, lsr #0xc - orr lr, lr, r12, lsl #0x14 - add r4, r4, lr - str r4, [r3, #0x4] - ldr r1, [r1, #0x8] - ldr r12, [r2, #0x8] - smull r2, r1, r0, r1 - mov r0, r2, lsr #0xc - orr r0, r0, r1, lsl #0x14 - add r0, r12, r0 - str r0, [r3, #0x8] - ldmia sp!, {r4,lr} - bx lr - - arm_func_start VEC_Fx16Normalize -VEC_Fx16Normalize: ; 0x020C5134 - stmdb sp!, {r4-r8,lr} - ldrsh r4, [r0, #0x0] - ldrsh r3, [r0, #0x2] - ldrsh r2, [r0, #0x4] - mul r8, r4, r4 - mul r7, r3, r3 - mul r6, r2, r2 - ldr r2, _020C526C ; =0x04000280 - mov r3, #0x2 - ldr r4, _020C5270 ; =0x04000290 - strh r3, [r2, #0x0] - mov r2, #0x0 - str r2, [r4, #0x0] - mov r5, #0x1000000 - mov r2, r8, asr #0x1f - adds r3, r8, r7 - adc r2, r2, r7, asr #0x1f - adds r7, r3, r6 - adc r6, r2, r6, asr #0x1f - mov r3, r6, lsl #0x2 - ldr r2, _020C5274 ; =0x04000298 - str r5, [r4, #0x4] - str r7, [r2, #0x0] - ldr r5, _020C5278 ; =0x040002B0 - str r6, [r2, #0x4] - mov r4, #0x1 - ldr r2, _020C527C ; =0x040002B8 - strh r4, [r5, #0x0] - mov r4, r7, lsl #0x2 - str r4, [r2, #0x0] - orr r3, r3, r7, lsr #0x1e - str r3, [r2, #0x4] -_020C51B4: - ldrh r2, [r5, #0x0] - ands r2, r2, #0x8000 - bne _020C51B4 - ldr r2, _020C5280 ; =0x040002B4 - ldr r12, [r2, #0x0] - ldr r3, _020C526C ; =0x04000280 -_020C51CC: - ldrh r2, [r3, #0x0] - ands r2, r2, #0x8000 - bne _020C51CC - ldr r7, _020C5284 ; =0x040002A0 - ldrsh r5, [r0, #0x0] - ldr r6, [r7, #0x0] - mov r4, r12, asr #0x1f - umull r3, r2, r6, r12 - mla r2, r6, r4, r2 - ldr r8, [r7, #0x4] - mov r4, r5, asr #0x1f - umull r7, r6, r3, r5 - mov lr, #0x0 - mla r2, r8, r12, r2 - mla r6, r3, r4, r6 - mla r6, r2, r5, r6 - adds r4, r7, lr - adc r4, r6, #0x1000 - mov r4, r4, asr #0xd - strh r4, [r1, #0x0] - ldrsh r5, [r0, #0x2] - umull r6, r12, r3, r5 - mov r4, r5, asr #0x1f - mla r12, r3, r4, r12 - mla r12, r2, r5, r12 - adds r4, r6, lr - adc r4, r12, #0x1000 - mov r4, r4, asr #0xd - strh r4, [r1, #0x2] - ldrsh r12, [r0, #0x4] - umull r5, r4, r3, r12 - mov r0, r12, asr #0x1f - adds r5, r5, lr - mla r4, r3, r0, r4 - mla r4, r2, r12, r4 - adc r0, r4, #0x1000 - mov r0, r0, asr #0xd - strh r0, [r1, #0x4] - ldmia sp!, {r4-r8,lr} - bx lr - .balign 4 -_020C526C: .word 0x04000280 -_020C5270: .word 0x04000290 -_020C5274: .word 0x04000298 -_020C5278: .word 0x040002B0 -_020C527C: .word 0x040002B8 -_020C5280: .word 0x040002B4 -_020C5284: .word 0x040002A0 - - arm_func_start VEC_Normalize -VEC_Normalize: - stmdb sp!, {r4-r8,lr} - ldr r3, [r0, #0x4] - ldr r4, [r0, #0x0] - smull r2, r7, r3, r3 - smlal r2, r7, r4, r4 - ldr r4, [r0, #0x8] - ldr r3, _020C53AC ; =0x04000280 - smlal r2, r7, r4, r4 - mov r6, #0x2 - mov r4, r7, lsl #0x2 - ldr r5, _020C53B0 ; =0x04000290 - strh r6, [r3, #0x0] - mov r3, #0x0 - str r3, [r5, #0x0] - mov r6, #0x1000000 - ldr r3, _020C53B4 ; =0x04000298 - str r6, [r5, #0x4] - str r2, [r3, #0x0] - ldr r6, _020C53B8 ; =0x040002B0 - str r7, [r3, #0x4] - mov r5, #0x1 - ldr r3, _020C53BC ; =0x040002B8 - strh r5, [r6, #0x0] - mov r5, r2, lsl #0x2 - str r5, [r3, #0x0] - orr r4, r4, r2, lsr #0x1e - str r4, [r3, #0x4] -_020C52F4: - ldrh r2, [r6, #0x0] - ands r2, r2, #0x8000 - bne _020C52F4 - ldr r2, _020C53C0 ; =0x040002B4 - ldr r12, [r2, #0x0] - ldr r3, _020C53AC ; =0x04000280 -_020C530C: - ldrh r2, [r3, #0x0] - ands r2, r2, #0x8000 - bne _020C530C - ldr r7, _020C53C4 ; =0x040002A0 - ldr r5, [r0, #0x0] - ldr r6, [r7, #0x0] - mov r4, r12, asr #0x1f - umull r3, r2, r6, r12 - mla r2, r6, r4, r2 - ldr r8, [r7, #0x4] - mov r4, r5, asr #0x1f - umull r7, r6, r3, r5 - mov lr, #0x0 - mla r2, r8, r12, r2 - mla r6, r3, r4, r6 - mla r6, r2, r5, r6 - adds r4, r7, lr - adc r4, r6, #0x1000 - mov r4, r4, asr #0xd - str r4, [r1, #0x0] - ldr r5, [r0, #0x4] - umull r6, r12, r3, r5 - mov r4, r5, asr #0x1f - mla r12, r3, r4, r12 - mla r12, r2, r5, r12 - adds r4, r6, lr - adc r4, r12, #0x1000 - mov r4, r4, asr #0xd - str r4, [r1, #0x4] - ldr r12, [r0, #0x8] - umull r5, r4, r3, r12 - mov r0, r12, asr #0x1f - adds r5, r5, lr - mla r4, r3, r0, r4 - mla r4, r2, r12, r4 - adc r0, r4, #0x1000 - mov r0, r0, asr #0xd - str r0, [r1, #0x8] - ldmia sp!, {r4-r8,lr} - bx lr - .balign 4 -_020C53AC: .word 0x04000280 -_020C53B0: .word 0x04000290 -_020C53B4: .word 0x04000298 -_020C53B8: .word 0x040002B0 -_020C53BC: .word 0x040002B8 -_020C53C0: .word 0x040002B4 -_020C53C4: .word 0x040002A0 - - arm_func_start VEC_Mag -VEC_Mag: - ldr r2, [r0, #0x4] - ldr r3, [r0, #0x0] - smull r12, r1, r2, r2 - smlal r12, r1, r3, r3 - ldr r0, [r0, #0x8] - ldr r3, _020C5424 ; =0x040002B0 - smlal r12, r1, r0, r0 - mov r2, #0x1 - mov r1, r1, lsl #0x2 - ldr r0, _020C5428 ; =0x040002B8 - strh r2, [r3, #0x0] - mov r2, r12, lsl #0x2 - str r2, [r0, #0x0] - orr r1, r1, r12, lsr #0x1e - str r1, [r0, #0x4] -_020C5404: - ldrh r0, [r3, #0x0] - ands r0, r0, #0x8000 - bne _020C5404 - ldr r0, _020C542C ; =0x040002B4 - ldr r0, [r0, #0x0] - add r0, r0, #0x1 - mov r0, r0, asr #0x1 - bx lr - .balign 4 -_020C5424: .word 0x040002B0 -_020C5428: .word 0x040002B8 -_020C542C: .word 0x040002B4 - - arm_func_start VEC_Fx16CrossProduct -VEC_Fx16CrossProduct: ; 0x020C5430 - stmdb sp!, {r4-r6,lr} - ldrsh r4, [r1, #0x4] - ldrsh r12, [r0, #0x2] - ldrsh lr, [r0, #0x0] - ldrsh r3, [r1, #0x2] - ldrsh r6, [r0, #0x4] - ldrsh r1, [r1, #0x0] - mul r5, r12, r4 - mul r0, r6, r3 - sub r0, r5, r0 - add r0, r0, #0x800 - mov r0, r0, asr #0xc - mul r5, r6, r1 - mul r4, lr, r4 - sub r4, r5, r4 - add r4, r4, #0x800 - mul r3, lr, r3 - mul r1, r12, r1 - sub r1, r3, r1 - add r1, r1, #0x800 - strh r0, [r2, #0x0] - mov r0, r4, asr #0xc - strh r0, [r2, #0x2] - mov r0, r1, asr #0xc - strh r0, [r2, #0x4] - ldmia sp!, {r4-r6,lr} - bx lr - - arm_func_start VEC_CrossProduct -VEC_CrossProduct: - stmdb sp!, {r4-r11,lr} - sub sp, sp, #0x4 - ldr r12, [r1, #0x8] - ldr r9, [r0, #0x4] - ldr r3, [r0, #0x0] - ldr r11, [r1, #0x4] - ldr r0, [r0, #0x8] - ldr r10, [r1, #0x0] - smull r4, r7, r9, r12 - smull r1, r6, r0, r11 - subs r8, r4, r1 - smull r5, r4, r0, r10 - smull lr, r12, r3, r12 - smull r1, r0, r3, r11 - smull r10, r3, r9, r10 - sbc r6, r7, r6 - mov r9, #0x800 - adds r7, r8, r9 - adc r6, r6, #0x0 - subs r8, r5, lr - sbc r5, r4, r12 - adds r8, r8, r9 - mov r4, r7, lsr #0xc - adc r5, r5, #0x0 - subs r1, r1, r10 - orr r4, r4, r6, lsl #0x14 - mov r6, r8, lsr #0xc - sbc r0, r0, r3 - adds r1, r1, r9 - str r4, [r2, #0x0] - orr r6, r6, r5, lsl #0x14 - adc r0, r0, #0x0 - mov r1, r1, lsr #0xc - str r6, [r2, #0x4] - orr r1, r1, r0, lsl #0x14 - str r1, [r2, #0x8] - add sp, sp, #0x4 - ldmia sp!, {r4-r11,lr} - bx lr - - arm_func_start VEC_Fx16DotProduct -VEC_Fx16DotProduct: ; 0x020C5538 - stmdb sp!, {r4-r5,lr} - sub sp, sp, #0x4 - ldrsh lr, [r0, #0x2] - ldrsh r12, [r1, #0x2] - ldrsh r3, [r0, #0x4] - ldrsh r2, [r1, #0x4] - ldrsh r5, [r0, #0x0] - ldrsh r4, [r1, #0x0] - smulbb r1, lr, r12 - smulbb r0, r3, r2 - smlabb r1, r5, r4, r1 - add r0, r0, #0x800 - adds r2, r1, r0 - mov r1, r1, asr #0x1f - adc r1, r1, r0, asr #0x1f - mov r0, r2, lsr #0xc - orr r0, r0, r1, lsl #0x14 - add sp, sp, #0x4 - ldmia sp!, {r4-r5,lr} - bx lr - - arm_func_start VEC_DotProduct -VEC_DotProduct: - stmdb sp!, {r4,lr} - ldr r3, [r0, #0x4] - ldr r2, [r1, #0x4] - ldr r12, [r0, #0x0] - smull r4, lr, r3, r2 - ldr r2, [r1, #0x0] - ldr r3, [r0, #0x8] - smlal r4, lr, r12, r2 - ldr r1, [r1, #0x8] - mov r0, #0x800 - smlal r4, lr, r3, r1 - adds r0, r4, r0 - adc r1, lr, #0x0 - mov r0, r0, lsr #0xc - orr r0, r0, r1, lsl #0x14 - ldmia sp!, {r4,lr} - bx lr - - arm_func_start VEC_Fx16Add -VEC_Fx16Add: ; 0x020C55CC - ldrsh r12, [r0, #0x0] - ldrsh r3, [r1, #0x0] - add r3, r12, r3 - strh r3, [r2, #0x0] - ldrsh r12, [r0, #0x2] - ldrsh r3, [r1, #0x2] - add r3, r12, r3 - strh r3, [r2, #0x2] - ldrsh r3, [r0, #0x4] - ldrsh r0, [r1, #0x4] - add r0, r3, r0 - strh r0, [r2, #0x4] - bx lr - - arm_func_start VEC_Subtract -VEC_Subtract: ; 0x020C5600 - ldr r12, [r0, #0x0] - ldr r3, [r1, #0x0] - sub r3, r12, r3 - str r3, [r2, #0x0] - ldr r12, [r0, #0x4] - ldr r3, [r1, #0x4] - sub r3, r12, r3 - str r3, [r2, #0x4] - ldr r3, [r0, #0x8] - ldr r0, [r1, #0x8] - sub r0, r3, r0 - str r0, [r2, #0x8] - bx lr - - arm_func_start VEC_Add -VEC_Add: ; 0x020C5634 - ldr r12, [r0, #0x0] - ldr r3, [r1, #0x0] - add r3, r12, r3 - str r3, [r2, #0x0] - ldr r12, [r0, #0x4] - ldr r3, [r1, #0x4] - add r3, r12, r3 - str r3, [r2, #0x4] - ldr r3, [r0, #0x8] - ldr r0, [r1, #0x8] - add r0, r3, r0 - str r0, [r2, #0x8] - bx lr - - arm_func_start FX_Modf -FX_Modf: ; 0x020C5668 - stmdb sp!, {r4,lr} - cmp r0, #0x0 - ble _020C5704 - cmp r1, #0x0 - ble _020C56B4 - cmp r1, r0 - movgt r3, r0 - movgt r4, #0x0 - movgt r0, #0x1 - bgt _020C57C8 - cmp r1, r0 - movlt r3, r1 - movlt r1, r0 - movlt r4, #0x4000 - movlt r0, #0x0 - blt _020C57C8 - mov r0, #0x2000 - ldmia sp!, {r4,lr} - bx lr -_020C56B4: - cmp r1, #0x0 - bge _020C56F8 - rsb r1, r1, #0x0 - cmp r1, r0 - movlt r3, r1 - movlt r1, r0 - movlt r4, #0x4000 - movlt r0, #0x1 - blt _020C57C8 - cmp r1, r0 - movgt r3, r0 - movgt r4, #0x8000 - movgt r0, #0x0 - bgt _020C57C8 - mov r0, #0x6000 - ldmia sp!, {r4,lr} - bx lr -_020C56F8: - mov r0, #0x4000 - ldmia sp!, {r4,lr} - bx lr -_020C5704: - cmp r0, #0x0 - bge _020C57B4 - cmp r1, #0x0 - rsb r2, r0, #0x0 - bge _020C5760 - rsb r1, r1, #0x0 - cmp r1, r2 - movgt r0, #0x8000 - rsbgt r4, r0, #0x0 - movgt r3, r2 - movgt r0, #0x1 - bgt _020C57C8 - cmp r1, r2 - bge _020C5754 - mov r0, #0x4000 - mov r3, r1 - mov r1, r2 - rsb r4, r0, #0x0 - mov r0, #0x0 - b _020C57C8 -_020C5754: - mov r0, #0xa000 - ldmia sp!, {r4,lr} - bx lr -_020C5760: - cmp r1, #0x0 - ble _020C57A8 - cmp r1, r2 - bge _020C5788 - mov r0, #0x4000 - mov r3, r1 - mov r1, r2 - rsb r4, r0, #0x0 - mov r0, #0x1 - b _020C57C8 -_020C5788: - cmp r1, r2 - movgt r4, #0x0 - movgt r3, r2 - movgt r0, r4 - bgt _020C57C8 - mov r0, #0xe000 - ldmia sp!, {r4,lr} - bx lr -_020C57A8: - mov r0, #0xc000 - ldmia sp!, {r4,lr} - bx lr -_020C57B4: - cmp r1, #0x0 - movge r0, #0x0 - movlt r0, #0x8000 - ldmia sp!, {r4,lr} - bx lr -_020C57C8: - cmp r1, #0x0 - moveq r0, #0x0 - ldmeqia sp!, {r4,lr} - bxeq lr - cmp r0, #0x0 - beq _020C580C - mov r0, r3 - bl FX_Div - mov r1, r0, asr #0x5 - ldr r0, _020C5838 ; =0x02103A38 - mov r1, r1, lsl #0x1 - ldrsh r0, [r0, r1] - add r0, r4, r0 - mov r0, r0, lsl #0x10 - mov r0, r0, lsr #0x10 - ldmia sp!, {r4,lr} - bx lr -_020C580C: - mov r0, r3 - bl FX_Div - mov r1, r0, asr #0x5 - ldr r0, _020C5838 ; =0x02103A38 - mov r1, r1, lsl #0x1 - ldrsh r0, [r0, r1] - sub r0, r4, r0 - mov r0, r0, lsl #0x10 - mov r0, r0, lsr #0x10 - ldmia sp!, {r4,lr} - bx lr - .balign 4 -_020C5838: .word 0x02103A38 - - arm_func_start FUN_020C583C -FUN_020C583C: ; 0x020C583C - stmdb sp!, {lr} - sub sp, sp, #0x4 - cmp r0, #0x0 - blt _020C58A4 - cmp r0, #0x1000 - ble _020C5880 - bl FX_Inv - mov r1, r0, asr #0x5 - ldr r0, _020C5924 ; =0x02103A38 - mov r1, r1, lsl #0x1 - ldrsh r0, [r0, r1] - add sp, sp, #0x4 - rsb r0, r0, #0x4000 - mov r0, r0, lsl #0x10 - mov r0, r0, lsr #0x10 - ldmia sp!, {lr} - bx lr -_020C5880: - cmp r0, #0x1000 - movlt r1, r0, asr #0x5 - ldrlt r0, _020C5924 ; =0x02103A38 - movlt r1, r1, lsl #0x1 - ldrlth r0, [r0, r1] - add sp, sp, #0x4 - movge r0, #0x2000 - ldmia sp!, {lr} - bx lr -_020C58A4: - mov r1, #0x1000 - rsb r1, r1, #0x0 - cmp r0, r1 - bge _020C58E4 - rsb r0, r0, #0x0 - bl FX_Inv - mov r1, r0, asr #0x5 - ldr r0, _020C5924 ; =0x02103A38 - - arm_func_start FUN_020C58C4 -FUN_020C58C4: ; 0x020C58C4 - mov r1, r1, lsl #0x1 - ldrsh r0, [r0, r1] - add sp, sp, #0x4 - sub r0, r0, #0x4000 - mov r0, r0, lsl #0x10 - mov r0, r0, lsr #0x10 - ldmia sp!, {lr} - bx lr -_020C58E4: - cmp r0, r1 - addle sp, sp, #0x4 - movle r0, #0xe000 - ldmleia sp!, {lr} - bxle lr - rsb r0, r0, #0x0 - mov r1, r0, asr #0x5 - ldr r0, _020C5924 ; =0x02103A38 - mov r1, r1, lsl #0x1 - ldrsh r0, [r0, r1] - rsb r0, r0, #0x0 - mov r0, r0, lsl #0x10 - mov r0, r0, lsr #0x10 - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr - .balign 4 -_020C5924: .word 0x02103A38 - - arm_func_start FUN_020C5928 -FUN_020C5928: ; 0x020C5928 - cmp r0, #0x0 - blt _020C5948 - ldr r2, _020C596C ; =0x7FFFF000 - ldr r3, _020C5970 ; =0x00000FFF - and r2, r0, r2 - str r2, [r1, #0x0] - and r0, r0, r3 - bx lr -_020C5948: - ldr r2, _020C596C ; =0x7FFFF000 - rsb r3, r0, #0x0 - ldr r0, _020C5970 ; =0x00000FFF - and r2, r3, r2 - rsb r2, r2, #0x0 - and r0, r3, r0 - str r2, [r1, #0x0] - rsb r0, r0, #0x0 - bx lr - .balign 4 -_020C596C: .word 0x7FFFF000 -_020C5970: .word 0x00000FFF - - arm_func_start FX_Init -FX_Init: ; 0x020C5974 - bx lr diff --git a/arm9/global.inc b/arm9/global.inc index d25362f3..9791c8f8 100644 --- a/arm9/global.inc +++ b/arm9/global.inc @@ -52,8 +52,6 @@ .extern FUNRTC_Init .extern FUN_0200019E .extern FUN_020002FE -.extern SVC_WaitByLoop -.extern OSi_ReferSymbol .extern FUN_02000DF4 .extern FUN_02000E7C .extern FUN_02000EE8 @@ -2554,8 +2552,6 @@ .extern FUN_020C3910 .extern FUN_020C3980 .extern FUN_020C39CC -.extern FUN_020C3EA4 -.extern FUN_020C3EB0 .extern FUN_020C6034 .extern FUN_020C605C .extern FUN_021D74E0 @@ -2996,12 +2992,15 @@ .extern FUN_02252534 .extern FUN_02252538 .extern FUN_022567E0 +.extern FX_Atan2 +.extern FX_AtanTable_ .extern FX_Div +.extern FX_DivAsync .extern FX_GetDivResult .extern FX_GetDivResultFx64c .extern FX_Init +.extern FX_Inv .extern FX_InvAsync -.extern FX_Modf .extern FX_Sqrt .extern G2S_GetBG0CharPtr .extern G2S_GetBG1CharPtr @@ -3177,14 +3176,22 @@ .extern MIi_UncompressBackward .extern MTX_Concat33 .extern MTX_Concat43 +.extern MTX_Concat44 +.extern MTX_Copy43To44_ +.extern MTX_Copy44To43_ .extern MTX_Identity33_ .extern MTX_Identity43_ +.extern MTX_Identity44_ +.extern MTX_Inverse43 .extern MTX_MultVec33 .extern MTX_MultVec43 +.extern MTX_Rot22_ .extern MTX_RotX33_ .extern MTX_RotY33_ .extern MTX_RotZ33_ .extern MTX_Scale43_ +.extern MTX_ScaleApply22 +.extern MTX_ScaleApply43 .extern NitroMain .extern OS_AllocFromArenaHi .extern OS_AllocFromArenaLo @@ -3263,8 +3270,18 @@ .extern OS_WakeupThread .extern OS_WakeupThreadDirect .extern OS_YieldThread +.extern OSi_AlarmQueue +.extern OSi_CurrentThreadPtr +.extern OSi_DebuggerHandler .extern OSi_DoResetSystem .extern OSi_EnterDmaCallback +.extern OSi_ExContext +.extern OSi_HeapInfo +.extern OSi_IdleThread +.extern OSi_IdleThreadStack +.extern OSi_Initialized +.extern OSi_IrqCallbackInfo +.extern OSi_IrqCallbackInfoIndex .extern OSi_IrqDma0 .extern OSi_IrqDma1 .extern OSi_IrqDma2 @@ -3274,11 +3291,32 @@ .extern OSi_IrqTimer1 .extern OSi_IrqTimer2 .extern OSi_IrqTimer3 +.extern OSi_IsInitReset .extern OSi_IsResetOccurred +.extern OSi_IsThreadInitialized +.extern OSi_LauncherThread .extern OSi_MainExArenaEnabled +.extern OSi_NeedResetTimer +.extern OSi_PreviousVCount +.extern OSi_ReferSymbol +.extern OSi_RescheduleCount +.extern OSi_StackForDestructor +.extern OSi_SystemCallbackInSwitchThread +.extern OSi_ThreadIdCount .extern OSi_ThreadInfo +.extern OSi_TickCounter +.extern OSi_TimerReserved .extern OSi_TryLockVram .extern OSi_UnlockVram +.extern OSi_UseAlarm +.extern OSi_UseTick +.extern OSi_UseVAlarm +.extern OSi_UserExceptionHandler +.extern OSi_UserExceptionHandlerArg +.extern OSi_VAlarmQueue +.extern OSi_VFrameCount +.extern OSi_vramExclusive +.extern OSi_vramLockId .extern PM_AppendPostSleepCallback .extern PM_DeletePostSleepCallback .extern PM_DeletePreSleepCallback @@ -3313,16 +3351,21 @@ .extern RTC_GetTime .extern RTC_Init .extern RunScriptCommand +.extern SDK_AUTOLOAD_DTCM_END .extern SDK_AUTOLOAD_DTCM_START +.extern SDK_AUTOLOAD_ITCM_END +.extern SDK_AUTOLOAD_ITCM_START .extern SDK_AUTOLOAD_LIST .extern SDK_AUTOLOAD_LIST_END .extern SDK_AUTOLOAD_START +.extern SDK_IRQ_STACKSIZE .extern SDK_MAIN_ARENA_LO .extern SDK_SECTION_ARENA_DTCM_START .extern SDK_SECTION_ARENA_EX_START .extern SDK_SECTION_ARENA_ITCM_START .extern SDK_STATIC_BSS_END .extern SDK_STATIC_BSS_START +.extern SDK_SYS_STACKSIZE .extern SND_AssignWaveArc .extern SND_CalcChannelVolume .extern SND_DestroyBank @@ -3367,6 +3410,7 @@ .extern SND_UnlockChannel .extern SND_WaitForCommandProc .extern STD_CopyLString +.extern SVC_WaitByLoop .extern ScriptCall .extern ScriptJump .extern ScriptReadHalfword @@ -3393,6 +3437,11 @@ .extern TP_SetCalibrateParam .extern TP_WaitBusy .extern TP_WaitRawResult +.extern Unk_0210683C +.extern Unk_02106840 +.extern Unk_02106900 +.extern Unk_02106A00 +.extern Unk_02106A04 .extern VEC_Add .extern VEC_CrossProduct .extern VEC_DotProduct @@ -3438,9 +3487,29 @@ .extern WM_StartScan .extern WM_StartScanEx .extern WMi_GetStatusAddress +.extern _ExitProcess .extern __call_static_initializers +.extern __close_console .extern __destroy_global_chain +.extern __read_console +.extern __write_console +.extern _d2f +.extern _dadd .extern _ddiv +.extern _deq +.extern _dfix +.extern _dflt +.extern _dfltu +.extern _dgr +.extern _dleq +.extern _dls +.extern _dmul +.extern _dneq +.extern _drdiv +.extern _drsb +.extern _dsqrt +.extern _dsub +.extern _f2d .extern _fadd .extern _fdiv .extern _feq @@ -3448,18 +3517,25 @@ .extern _ffixu .extern _fflt .extern _ffltu +.extern _fgeq .extern _fgr +.extern _fleq +.extern _fls .extern _fmul .extern _fp_init +.extern _frdiv +.extern _frsb .extern _fsub .extern _ll_mod .extern _ll_mul .extern _ll_sdiv .extern _ll_shl .extern _ll_udiv +.extern _ll_ufrom_d .extern _s32_div_f .extern _u32_div_f .extern _u32_div_not_0_f +.extern _ull_mod .extern abs .extern cardi_common .extern gScriptCmdTable @@ -3469,6 +3545,9 @@ .extern strcmp .extern strcpy .extern strlen +.extern sys_exit +.extern sys_readc +.extern sys_writec .extern tempName_NNS_FndAllocFromExpHeapEx .extern tempName_NNS_FndCreateExpHeapEx .extern thunk_FUN_02096e4c @@ -3478,44 +3557,3 @@ .extern thunk_FUN_020afda0 .extern thunk_FUN_020afda0_2 .extern thunk_FUN_020b5040 -.extern Unk_0210683C -.extern Unk_02106840 -.extern Unk_02106900 -.extern Unk_02106A00 -.extern Unk_02106A04 -.extern OSi_IrqCallbackInfo -.extern OSi_IrqCallbackInfoIndex -.extern SDK_SYS_STACKSIZE -.extern SDK_IRQ_STACKSIZE -.extern OSi_IsThreadInitialized -.extern OSi_LauncherThread -.extern OSi_CurrentThreadPtr -.extern OSi_IdleThread -.extern OSi_IdleThreadStack -.extern OSi_RescheduleCount -.extern OSi_SystemCallbackInSwitchThread -.extern OSi_Initialized -.extern OSi_HeapInfo -.extern OSi_DebuggerHandler -.extern OSi_ExContext -.extern OSi_UserExceptionHandler -.extern OSi_UserExceptionHandlerArg -.extern OSi_TimerReserved -.extern OSi_UseTick -.extern OSi_NeedResetTimer -.extern OSi_TickCounter -.extern OSi_UseAlarm -.extern OSi_AlarmQueue -.extern OSi_UseVAlarm -.extern OSi_PreviousVCount -.extern OSi_VFrameCount -.extern OSi_VAlarmQueue -.extern OSi_IsInitReset -.extern OSi_vramExclusive -.extern OSi_vramLockId -.extern OSi_ThreadIdCount -.extern OSi_StackForDestructor -.extern SDK_AUTOLOAD_ITCM_START -.extern SDK_AUTOLOAD_ITCM_END -.extern SDK_AUTOLOAD_DTCM_START -.extern SDK_AUTOLOAD_DTCM_END diff --git a/arm9/undefined_syms.txt b/arm9/undefined_syms.txt index 075d22a9..5329ff10 100644 --- a/arm9/undefined_syms.txt +++ b/arm9/undefined_syms.txt @@ -4,6 +4,8 @@ CONST_3F = 0x0000003F; SDK_IRQ_STACKSIZE = 0x00000400; // .data +// FX +FX_AtanTable_ = 0x02103A38; // OS OSi_IrqCallbackInfoIndex = 0x02106818; // DGT diff --git a/global.inc b/global.inc index 478abdaa..123bc193 100644 --- a/global.inc +++ b/global.inc @@ -2554,8 +2554,8 @@ .extern FUN_020C3910 .extern FUN_020C3980 .extern FUN_020C39CC -.extern FUN_020C3EA4 -.extern FUN_020C3EB0 +.extern MTX_Rot22_ +.extern MTX_ScaleApply22 .extern FUN_020C6034 .extern FUN_020C605C .extern FUN_021D74E0 @@ -3001,7 +3001,7 @@ .extern FX_GetDivResultFx64c .extern FX_Init .extern FX_InvAsync -.extern FX_Modf +.extern FX_Atan2 .extern FX_Sqrt .extern G2S_GetBG0CharPtr .extern G2S_GetBG1CharPtr -- cgit v1.2.3 From 3a1259dbe647e8acfa62632890deda5ac7524423 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 13:41:07 -0400 Subject: Label symbols in arm7_rom.s; quiet mwasmarm_patcher; SHA1 checksums for arm7, arm9 binaries --- Makefile | 3 +- arm7/Makefile | 4 +- arm7/asm/arm7_rom.s | 81 ++++++++++++++++++------------- arm9/Makefile | 4 +- arm9/asm/crt0.s | 7 +-- tools/mwasmarm_patcher/Makefile | 2 +- tools/mwasmarm_patcher/mwasmarm_patcher.c | 42 +++++++++++++--- 7 files changed, 94 insertions(+), 49 deletions(-) diff --git a/Makefile b/Makefile index bfb5ed9e..6ba134dd 100644 --- a/Makefile +++ b/Makefile @@ -92,7 +92,7 @@ TOOLS_DIR = tools SHA1SUM = sha1sum JSONPROC = $(TOOLS_DIR)/jsonproc/jsonproc GFX = $(TOOLS_DIR)/nitrogfx/nitrogfx -MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) +MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) -q TOOLDIRS = $(filter-out $(TOOLS_DIR)/mwccarm,$(wildcard $(TOOLS_DIR)/*)) TOOLBASE = $(TOOLDIRS:$(TOOLS_DIR)/%=%) @@ -138,6 +138,7 @@ $(TOOLDIRS): @$(MAKE) -C $@ $(MWASMARM): patch_mwasmarm + @: patch_mwasmarm: $(MWASMARM_PATCHER) $(MWASMARM) diff --git a/arm7/Makefile b/arm7/Makefile index d2c2681d..edf4b913 100644 --- a/arm7/Makefile +++ b/arm7/Makefile @@ -89,7 +89,7 @@ LDFLAGS = -map -nodead -w off -proc v5te -interworking -map -symtab -m _start SHA1SUM = sha1sum JSONPROC = $(TOOLS_DIR)/jsonproc/jsonproc GFX = $(TOOLS_DIR)/nitrogfx/nitrogfx -MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) +MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) -q TOOLDIRS = $(filter-out $(TOOLS_DIR)/mwccarm,$(wildcard $(TOOLS_DIR)/*)) TOOLBASE = $(TOOLDIRS:$(TOOLS_DIR)/%=%) @@ -112,7 +112,7 @@ endif MAKEFLAGS += --no-print-directory all: $(ROM) - # @$(SHA1SUM) -c $(TARGET).sha1 + @$(SHA1SUM) -c $(TARGET).sha1 clean: mostlyclean make -C $(TOOLS_DIR)/mwasmarm_patcher clean diff --git a/arm7/asm/arm7_rom.s b/arm7/asm/arm7_rom.s index 3366eba4..65eda913 100644 --- a/arm7/asm/arm7_rom.s +++ b/arm7/asm/arm7_rom.s @@ -61,7 +61,7 @@ _023800a4: ldr r1, _23800f8 ldr lr, _23800fc bx r1 -_23800cc: .word FUN_023801B0 +_23800cc: .word SDK_STATIC_BSS_START _23800d0: .word 0x0380ff00 _23800d4: .word 0x0380ffc0 _23800d8: .word 0x0380ff80 @@ -128,30 +128,33 @@ _0238018c: bx lr _2380194: .word 0x027ffffa _2380198: - .word UNK_23A92F8 - .word UNK_23A931C - .word FUN_023801B0 - .word FUN_023801B0 - .word FUN_023801B0 - .word 0x00000000 + .word SDK_AUTOLOAD_LIST + .word SDK_AUTOLOAD_LIST_END + .word SDK_AUTOLOAD_START + .word SDK_STATIC_BSS_START + .word SDK_STATIC_BSS_END arm_func_end FUN_238015C - arm_func_start FUN_023801B0 -FUN_023801B0: + .balign 16, 0 + +SDK_STATIC_BSS_START: +SDK_STATIC_BSS_END: + +SDK_AUTOLOAD_START: .incbin "baserom.nds", 0x30D1B0, 0x91B0 - thumb_func_start ROM7_SVC_SoftReset -ROM7_SVC_SoftReset: ; 0x02389360 + thumb_func_start SVC_SoftReset +SVC_SoftReset: ; 0x02389360 swi 0 bx lr - thumb_func_start ROM7_SVC_WaitByLoop -ROM7_SVC_WaitByLoop: ; 0x02389364 + thumb_func_start SVC_WaitByLoop +SVC_WaitByLoop: ; 0x02389364 swi 3 bx lr - thumb_func_start ROM7_SVC_WaitIntr -ROM7_SVC_WaitIntr: ; 0x02389368 + thumb_func_start SVC_WaitIntr +SVC_WaitIntr: ; 0x02389368 ldr r2, =0x04000000 mov ip, r2 mov r2, #0x0 @@ -159,54 +162,64 @@ ROM7_SVC_WaitIntr: ; 0x02389368 bx lr .pool - thumb_func_start ROM7_SVC_WaitVBlankIntr -ROM7_SVC_WaitVBlankIntr: + thumb_func_start SVC_WaitVBlankIntr +SVC_WaitVBlankIntr: mov r2, #0x0 swi 5 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_Halt -ROM7_SVC_Halt: + non_word_aligned_thumb_func_start SVC_Halt +SVC_Halt: swi 6 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_Stop -ROM7_SVC_Stop: + non_word_aligned_thumb_func_start SVC_Stop +SVC_Stop: swi 7 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_SoundBias -ROM7_SVC_SoundBias: + non_word_aligned_thumb_func_start SVC_SoundBias +SVC_SoundBias: swi 8 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_SoundBiasSet -ROM7_SVC_SoundBiasSet: + non_word_aligned_thumb_func_start SVC_SoundBiasSet +SVC_SoundBiasSet: add r1, r0, #0x0 mov r0, #0x1 swi 8 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_SoundBiasReset -ROM7_SVC_SoundBiasReset: + non_word_aligned_thumb_func_start SVC_SoundBiasReset +SVC_SoundBiasReset: add r1, r0, #0x0 mov r0, #0x0 swi 8 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_Div -ROM7_SVC_Div: + non_word_aligned_thumb_func_start SVC_Div +SVC_Div: swi 9 bx lr - non_word_aligned_thumb_func_start ROM7_SVC_DivRem -ROM7_SVC_DivRem: + non_word_aligned_thumb_func_start SVC_DivRem +SVC_DivRem: swi 9 add r0, r1, #0x0 bx lr .incbin "baserom.nds", 0x3163a4, 0x1ff54 -UNK_23A92F8: - .incbin "baserom.nds", 0x3362F8, 0x24 +SDK_AUTOLOAD_LIST: + .word 0x027E0000 + .word 0x000000DC + .word 0x00000000 + + .word 0x037F8000 + .word 0x0000F70C + .word 0x00004220 + + .word 0x06000000 + .word 0x00019960 + .word 0x00001590 -UNK_23A931C: +SDK_AUTOLOAD_LIST_END: diff --git a/arm9/Makefile b/arm9/Makefile index d97cfb95..5b12cbb8 100644 --- a/arm9/Makefile +++ b/arm9/Makefile @@ -89,7 +89,7 @@ LDFLAGS = -map -nodead -w off -proc v5te -interworking -map -symtab -m _start SHA1SUM = sha1sum JSONPROC = $(TOOLS_DIR)/jsonproc/jsonproc GFX = $(TOOLS_DIR)/nitrogfx/nitrogfx -MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) +MWASMARM_PATCHER = $(TOOLS_DIR)/mwasmarm_patcher/mwasmarm_patcher$(EXE) -q TOOLDIRS = $(filter-out $(TOOLS_DIR)/mwccarm,$(wildcard $(TOOLS_DIR)/*)) TOOLBASE = $(TOOLDIRS:$(TOOLS_DIR)/%=%) @@ -112,7 +112,7 @@ endif MAKEFLAGS += --no-print-directory all: $(ROM) - # @$(SHA1SUM) -c $(TARGET).sha1 + @$(SHA1SUM) -c $(TARGET).sha1 clean: mostlyclean make -C $(TOOLS_DIR)/mwasmarm_patcher clean diff --git a/arm9/asm/crt0.s b/arm9/asm/crt0.s index 709bd5f3..fd955dab 100644 --- a/arm9/asm/crt0.s +++ b/arm9/asm/crt0.s @@ -262,9 +262,10 @@ _start_ModuleParams: .word SDK_STATIC_BSS_START .word SDK_STATIC_BSS_END - .word 0x00000000 - .ascii "1u" ; 31 75 - .byte 0x02, 0x03 + .balign 16, 0 + + ; .version + .word 0x03027531 .word 0xdec00621 .byte 0xde, 0xc0, 0x06, 0x21 diff --git a/tools/mwasmarm_patcher/Makefile b/tools/mwasmarm_patcher/Makefile index 1e89832e..9765f713 100644 --- a/tools/mwasmarm_patcher/Makefile +++ b/tools/mwasmarm_patcher/Makefile @@ -6,7 +6,7 @@ CFLAGS := -O3 .PHONY: all clean all: mwasmarm_patcher - @ + @: clean: ; $(RM) mwasmarm_patcher$(EXE) diff --git a/tools/mwasmarm_patcher/mwasmarm_patcher.c b/tools/mwasmarm_patcher/mwasmarm_patcher.c index 2b887503..7d15820d 100644 --- a/tools/mwasmarm_patcher/mwasmarm_patcher.c +++ b/tools/mwasmarm_patcher/mwasmarm_patcher.c @@ -147,6 +147,7 @@ void sha1_process_block (const unsigned char * block, uint32_t * state) { // ax6 code end // --------------------------------------------------------- +__attribute__((format(printf, 1, 2))) void fatal_printf(char *str, ...) { va_list args; va_start(args, str); @@ -167,16 +168,45 @@ int get_file_size (FILE * fp) { #define SHA_DIGEST_LENGTH 20 void print_help(void) { - printf("mwasmarm patcher usage: input (example: mwasmarm_patcher mwasmarm.exe)\n"); + printf("Usage:\n" + "\tmwasmarm_patcher [OPTIONS] FILENAME\n\n" + "Arguments:\n" + "\tFILENAME: path to MWASMARM.exe program\n\n" + "OPTIONS:\n" + "\t-q/--quietly: Suppress verbose output\n" + "\t-h/--help: Print this message and exit\n"); } int main(int argc, char *argv[]) { - if (argc != 2) { + int quietly = 0; + char* filename = NULL; + for (int i = 1; i < argc; i++) + { + if (argv[i][0] == '-') { + if (strcmp(argv[i], "-q") == 0 || strcmp(argv[i], "--quietly") == 0) + quietly = 1; + else if (strcmp(argv[i], "-h") == 0 || strcmp(argv[i], "--help") == 0) { + print_help(); + exit(0); + } + else + { + print_help(); + fatal_printf("Unrecognized option: %s\n", argv[i]); + } + } else if (filename != NULL) { + print_help(); + fatal_printf("Excess filename supplied\n"); + } + else + filename = argv[i]; + } + if (filename == NULL) { print_help(); - return 1; + fatal_printf("Missing required argument: filename\n"); } else { // Open the file and read it's sha1 hash. - FILE *f = fopen(argv[1], "rb+"); + FILE *f = fopen(filename, "rb+"); if (f == NULL) { fatal_printf("ERROR: No file detected\n"); } @@ -205,7 +235,7 @@ int main(int argc, char *argv[]) { for (int i = 0; gPatchDefs[i].sha1before != NULL; i++) { // check if already patched for the current loop. if (!strcmp(buf, gPatchDefs[i].sha1after)) { - printf("Supported patched version detected (%s): no action needed\n", gPatchDefs[i].version); + if (!quietly) printf("Supported patched version detected (%s): no action needed\n", gPatchDefs[i].version); return 0; } else if(!strcmp(buf, gPatchDefs[i].sha1before)) { // we found an unpatched version: apply the patches. @@ -213,7 +243,7 @@ int main(int argc, char *argv[]) { fseek(f, gPatchDefs[i].patches[j].offsetPatch, SEEK_SET); fputc(gPatchDefs[i].patches[j].newByte, f); } - printf("Supported unpatched version detected (%s): assembler patched\n", gPatchDefs[i].version); + if (!quietly) printf("Supported unpatched version detected (%s): assembler patched\n", gPatchDefs[i].version); return 0; } } -- cgit v1.2.3 From d3b82e334c6f59dc3aed07588ece8cb571ed7349 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 14:48:05 -0400 Subject: Move autoload list to lcf --- arm7/arm7.lcf | 28 + arm7/asm/arm7_rom.s | 28 +- arm7/global.inc | 3508 +----------------------------------------- arm7/undefined_syms.txt | 503 +----- arm9/arm9.lcf | 18 +- arm9/asm/SDK_AUTOLOAD_LIST.s | 21 - arm9/asm/crt0.s | 1 + arm9/asm/unk_10b724.s | 4 - arm9/undefined_syms.txt | 12 + 9 files changed, 81 insertions(+), 4042 deletions(-) delete mode 100644 arm9/asm/SDK_AUTOLOAD_LIST.s delete mode 100644 arm9/asm/unk_10b724.s diff --git a/arm7/arm7.lcf b/arm7/arm7.lcf index 784c4cbb..5552835b 100644 --- a/arm7/arm7.lcf +++ b/arm7/arm7.lcf @@ -1,5 +1,9 @@ MEMORY { .text (RX) : ORIGIN=0x02380000, LENGTH=0 + .itcm (RWX) : ORIGIN=0x027E0000, LENGTH=0 + .dtcm (RWX) : ORIGIN=0x037F8000, LENGTH=0 + .ewram (RW) : ORIGIN=0x06000000, LENGTH=0 + .autoload (R) : ORIGIN=0x023A92F8, LENGTH=0 } SECTIONS { @@ -7,4 +11,28 @@ SECTIONS { .text : AT (0x0) { arm7_rom.o (.text) } > .text + + .itcm : AT (0x1b0) { + arm7_rom.o (.itcm) + } > .itcm + + .dtcm : AT (0x28C) { + arm7_rom.o (.dtcm) + } > .dtcm + + .ewram : AT (0xF998) { + arm7_rom.o (.ewram) + } > .ewram + + .autoload : AT (0x292F8) { + WRITEW SDK_AUTOLOAD_ITCM_START; + WRITEW SDK_AUTOLOAD_ITCM_SIZE; + WRITEW SDK_AUTOLOAD_ITCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_START; + WRITEW SDK_AUTOLOAD_DTCM_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_EXT_START; + WRITEW SDK_AUTOLOAD_EXT_SIZE; + WRITEW SDK_AUTOLOAD_EXT_BSS_SIZE; + } > .autoload } diff --git a/arm7/asm/arm7_rom.s b/arm7/asm/arm7_rom.s index 65eda913..6691475b 100644 --- a/arm7/asm/arm7_rom.s +++ b/arm7/asm/arm7_rom.s @@ -1,5 +1,6 @@ /* arm7_rom.s TODO: Disassemble */ .include "asm/macros.inc" + .include "global.inc" .global ARM7AutoLoad .section .text @@ -137,11 +138,18 @@ _2380198: .balign 16, 0 + .global SDK_STATIC_BSS_START + .global SDK_STATIC_BSS_END SDK_STATIC_BSS_START: SDK_STATIC_BSS_END: + .global SDK_AUTOLOAD_START SDK_AUTOLOAD_START: - .incbin "baserom.nds", 0x30D1B0, 0x91B0 + .section .itcm + .incbin "baserom.nds", 0x30D1B0, 0xDC + + .section .dtcm + .incbin "baserom.nds", 0x30D28C, 0x90D4 thumb_func_start SVC_SoftReset SVC_SoftReset: ; 0x02389360 @@ -207,19 +215,7 @@ SVC_DivRem: swi 9 add r0, r1, #0x0 bx lr - .incbin "baserom.nds", 0x3163a4, 0x1ff54 - -SDK_AUTOLOAD_LIST: - .word 0x027E0000 - .word 0x000000DC - .word 0x00000000 - - .word 0x037F8000 - .word 0x0000F70C - .word 0x00004220 - - .word 0x06000000 - .word 0x00019960 - .word 0x00001590 + .incbin "baserom.nds", 0x3163a4, 0x65F4 -SDK_AUTOLOAD_LIST_END: + .section .ewram + .incbin "baserom.nds", 0x31C998, 0x19960 diff --git a/arm7/global.inc b/arm7/global.inc index 123bc193..b9215e63 100644 --- a/arm7/global.inc +++ b/arm7/global.inc @@ -1,3318 +1,4 @@ -.extern CARD_CancelBackupAsync -.extern CARD_GetResultCode -.extern CARD_IdentifyBackup -.extern CARD_Init -.extern CARD_IsPulledOut -.extern CARD_LockBackup -.extern CARD_LockRom -.extern CARD_TryWaitBackupAsync -.extern CARD_UnlockBackup -.extern CARD_UnlockRom -.extern CARD_WaitBackupAsync -.extern CARDi_ReadRom -.extern CARDi_RequestStreamCommand -.extern CP_RestoreContext -.extern CP_SaveContext -.extern CTRDG_Init -.extern CTRDG_IsExisting -.extern CTRDG_IsPulledOut -.extern Call_FillMemWithValue -.extern ConvertUIntToDecimalString -.extern DC_FlushAll -.extern DC_FlushRange -.extern DC_InvalidateAll -.extern DC_InvalidateRange -.extern DC_StoreAll -.extern DC_StoreRange -.extern DC_WaitWriteBufferEmpty -.extern DGT_Hash1GetDigest_R -.extern DGT_Hash1Reset -.extern DGT_Hash1SetSource -.extern DGTi_hash2_arm4_small -.extern ErrorHandling -.extern FS_CloseFile -.extern FS_ConvertPathToFileID -.extern FS_FindArchive -.extern FS_Init -.extern FS_InitFile -.extern FS_IsAvailable -.extern FS_LoadOverlay -.extern FS_LoadOverlayImage -.extern FS_LoadOverlayImageAsync -.extern FS_LoadOverlayInfo -.extern FS_OpenFile -.extern FS_OpenFileFast -.extern FS_ReadFile -.extern FS_SeekFile -.extern FS_SetDefaultDMA -.extern FS_StartOverlay -.extern FS_TryLoadTable -.extern FS_UnloadOverlay -.extern FS_WaitAsync -.extern FUNRTC_Init -.extern FUN_0200019E -.extern FUN_020002FE -.extern SVC_WaitByLoop -.extern OSi_ReferSymbol -.extern FUN_02000DF4 -.extern FUN_02000E7C -.extern FUN_02000EE8 -.extern FUN_02000F18 -.extern FUN_02000FA4 -.extern FUN_02000FE8 -.extern FUN_020010A8 -.extern FUN_02001204 -.extern FUN_02001300 -.extern FUN_020013E8 -.extern FUN_02001448 -.extern FUN_02001470 -.extern FUN_02001B8C -.extern FUN_02001C14 -.extern FUN_02001C5C -.extern FUN_02001C78 -.extern FUN_02001D2C -.extern FUN_02001E5C -.extern FUN_020020EC -.extern FUN_02002198 -.extern FUN_020021AC -.extern FUN_02002840 -.extern FUN_02002B60 -.extern FUN_02002B7C -.extern FUN_02002BB8 -.extern FUN_02002C14 -.extern FUN_02002C50 -.extern FUN_02002C84 -.extern FUN_02002CC0 -.extern FUN_02002CF8 -.extern FUN_02002DB0 -.extern FUN_02002DE0 -.extern FUN_02002E14 -.extern FUN_02002E4C -.extern FUN_02002ED0 -.extern FUN_02002EEC -.extern FUN_02002F08 -.extern FUN_02002FD0 -.extern FUN_02002FEC -.extern FUN_02003008 -.extern FUN_02003038 -.extern FUN_02003054 -.extern FUN_020030E8 -.extern FUN_02003108 -.extern FUN_020031FC -.extern FUN_02003210 -.extern FUN_0200372C -.extern FUN_020038E4 -.extern FUN_020038F0 -.extern FUN_02003974 -.extern FUN_02003B98 -.extern FUN_02003C10 -.extern FUN_020040F4 -.extern FUN_02004104 -.extern FUN_02004124 -.extern FUN_0200414C -.extern FUN_0200415C -.extern FUN_0200433C -.extern FUN_02004724 -.extern FUN_020047C8 -.extern FUN_02004810 -.extern FUN_0200488C -.extern FUN_02004DCC -.extern FUN_02004E08 -.extern FUN_0200516C -.extern FUN_020051F4 -.extern FUN_0200521C -.extern FUN_02005308 -.extern FUN_02005350 -.extern FUN_0200538C -.extern FUN_020053CC -.extern FUN_02005404 -.extern FUN_02005410 -.extern FUN_0200541C -.extern FUN_020054C8 -.extern FUN_020054F0 -.extern FUN_02005508 -.extern FUN_02005514 -.extern FUN_02005578 -.extern FUN_02005670 -.extern FUN_020056AC -.extern FUN_02005C28 -.extern FUN_02005CBC -.extern FUN_02005D20 -.extern FUN_02005E28 -.extern FUN_02005E64 -.extern FUN_02005E6C -.extern FUN_02005E80 -.extern FUN_02005E90 -.extern FUN_02005F14 -.extern FUN_02005F60 -.extern FUN_02005FDC -.extern FUN_020061E8 -.extern FUN_0200621C -.extern FUN_02006234 -.extern FUN_02006260 -.extern FUN_02006268 -.extern FUN_02006278 -.extern FUN_0200627C -.extern FUN_0200628C -.extern FUN_02006290 -.extern FUN_02006528 -.extern FUN_02006548 -.extern FUN_02006564 -.extern FUN_02006670 -.extern FUN_020066F4 -.extern FUN_02006704 -.extern FUN_02006774 -.extern FUN_02006814 -.extern FUN_0200687C -.extern FUN_020068C8 -.extern FUN_02006930 -.extern FUN_02006BB0 -.extern FUN_02006C08 -.extern FUN_02006C98 -.extern FUN_02006D98 -.extern FUN_02006ED4 -.extern FUN_020072E8 -.extern FUN_02007314 -.extern FUN_0200737C -.extern FUN_02007390 -.extern FUN_020073A0 -.extern FUN_02007534 -.extern FUN_02007558 -.extern FUN_0200782C -.extern FUN_020079E0 -.extern FUN_02007E68 -.extern FUN_02007E98 -.extern FUN_02007F20 -.extern FUN_020080D0 -.extern FUN_020081C4 -.extern FUN_02008AA4 -.extern FUN_02008BE0 -.extern FUN_02008C80 -.extern FUN_02008C9C -.extern FUN_02008D24 -.extern FUN_02008DEC -.extern FUN_02008E2C -.extern FUN_02008F34 -.extern FUN_02008FEC -.extern FUN_020090AC -.extern FUN_02009168 -.extern FUN_020093A8 -.extern FUN_02009424 -.extern FUN_02009448 -.extern FUN_02009630 -.extern FUN_0200965C -.extern FUN_02009668 -.extern FUN_020096B4 -.extern FUN_020096CC -.extern FUN_02009A50 -.extern FUN_02009B04 -.extern FUN_02009B44 -.extern FUN_02009B78 -.extern FUN_02009C0C -.extern FUN_02009C30 -.extern FUN_02009CF0 -.extern FUN_02009DAC -.extern FUN_02009DE0 -.extern FUN_02009E04 -.extern FUN_02009E28 -.extern FUN_02009E88 -.extern FUN_02009EAC -.extern FUN_02009F80 -.extern FUN_02009FA0 -.extern FUN_0200A208 -.extern FUN_0200A274 -.extern FUN_0200A2AC -.extern FUN_0200A318 -.extern FUN_0200A344 -.extern FUN_0200A648 -.extern FUN_0200A738 -.extern FUN_0200A86C -.extern FUN_0200A8B8 -.extern FUN_0200A8E0 -.extern FUN_0200A914 -.extern FUN_0200A968 -.extern FUN_0200A99C -.extern FUN_0200A9C4 -.extern FUN_0200AA50 -.extern FUN_0200AA80 -.extern FUN_0200AA90 -.extern FUN_0200AB18 -.extern FUN_0200ABB4 -.extern FUN_0200ABC0 -.extern FUN_0200ABE4 -.extern FUN_0200AC0C -.extern FUN_0200AC60 -.extern FUN_0200ACA4 -.extern FUN_0200ACC0 -.extern FUN_0200ACF8 -.extern FUN_0200AD18 -.extern FUN_0200AD38 -.extern FUN_0200AD5C -.extern FUN_0200AD94 -.extern FUN_0200ADCC -.extern FUN_0200AE04 -.extern FUN_0200AE38 -.extern FUN_0200AE70 -.extern FUN_0200AEA8 -.extern FUN_0200AEE0 -.extern FUN_0200AF18 -.extern FUN_0200AF50 -.extern FUN_0200AFF4 -.extern FUN_0200B02C -.extern FUN_0200B064 -.extern FUN_0200B09C -.extern FUN_0200B164 -.extern FUN_0200B19C -.extern FUN_0200B1D4 -.extern FUN_0200B20C -.extern FUN_0200B244 -.extern FUN_0200B278 -.extern FUN_0200B2AC -.extern FUN_0200B350 -.extern FUN_0200B388 -.extern FUN_0200B410 -.extern FUN_0200B4A0 -.extern FUN_0200B4D8 -.extern FUN_0200B518 -.extern FUN_0200B534 -.extern FUN_0200B568 -.extern FUN_0200B59C -.extern FUN_0200B628 -.extern FUN_0200B660 -.extern FUN_0200B698 -.extern FUN_0200B6D0 -.extern FUN_0200B708 -.extern FUN_0200B764 -.extern FUN_0200B7A8 -.extern FUN_0200B7B8 -.extern FUN_0200B870 -.extern FUN_0200B990 -.extern FUN_0200B9A8 -.extern FUN_0200B9EC -.extern FUN_0200BA78 -.extern FUN_0200BB14 -.extern FUN_0200BB34 -.extern FUN_0200BB68 -.extern FUN_0200BB6C -.extern FUN_0200BBF0 -.extern FUN_0200BC1C -.extern FUN_0200BC30 -.extern FUN_0200BCE0 -.extern FUN_0200BD04 -.extern FUN_0200BD20 -.extern FUN_0200BE38 -.extern FUN_0200BF60 -.extern FUN_0200C00C -.extern FUN_0200C06C -.extern FUN_0200C0DC -.extern FUN_0200C124 -.extern FUN_0200C13C -.extern FUN_0200C154 -.extern FUN_0200C358 -.extern FUN_0200C368 -.extern FUN_0200C378 -.extern FUN_0200C388 -.extern FUN_0200C398 -.extern FUN_0200C3DC -.extern FUN_0200C5A8 -.extern FUN_0200C61C -.extern FUN_0200C63C -.extern FUN_0200C644 -.extern FUN_0200C664 -.extern FUN_0200C66C -.extern FUN_0200C6E4 -.extern FUN_0200C714 -.extern FUN_0200C75C -.extern FUN_0200C7A0 -.extern FUN_0200C82C -.extern FUN_0200C840 -.extern FUN_0200C884 -.extern FUN_0200C9D8 -.extern FUN_0200CA0C -.extern FUN_0200CA44 -.extern FUN_0200CAB4 -.extern FUN_0200CABC -.extern FUN_0200CAFC -.extern FUN_0200CB00 -.extern FUN_0200CCA4 -.extern FUN_0200CCF8 -.extern FUN_0200CD64 -.extern FUN_0200CD68 -.extern FUN_0200D0BC -.extern FUN_0200D0E0 -.extern FUN_0200D274 -.extern FUN_0200D300 -.extern FUN_0200D6F8 -.extern FUN_0200D858 -.extern FUN_0200DBFC -.extern FUN_0200DC4C -.extern FUN_0200DCA4 -.extern FUN_0200E1D0 -.extern FUN_0200E2D8 -.extern FUN_0200E308 -.extern FUN_0200E388 -.extern FUN_0200E394 -.extern FUN_0200E3A0 -.extern FUN_0200E3BC -.extern FUN_02011B20 -.extern FUN_02012420 -.extern FUN_0201259C -.extern FUN_020125D4 -.extern FUN_0201265C -.extern FUN_020126B4 -.extern FUN_020126D8 -.extern FUN_020126FC -.extern FUN_0201277C -.extern FUN_020127A8 -.extern FUN_020127C0 -.extern FUN_02012838 -.extern FUN_02012870 -.extern FUN_02012880 -.extern FUN_020128A0 -.extern FUN_02012CC8 -.extern FUN_02012CDC -.extern FUN_02012DE4 -.extern FUN_0201318C -.extern FUN_02013194 -.extern FUN_0201327C -.extern FUN_020132BC -.extern FUN_02013364 -.extern FUN_02013388 -.extern FUN_020133AC -.extern FUN_020133C8 -.extern FUN_020133E8 -.extern FUN_0201343C -.extern FUN_02013440 -.extern FUN_02013690 -.extern FUN_020136C0 -.extern FUN_020136E0 -.extern FUN_020136F8 -.extern FUN_0201373C -.extern FUN_02013754 -.extern FUN_0201385C -.extern FUN_02013918 -.extern FUN_02013920 -.extern FUN_02013924 -.extern FUN_02013928 -.extern FUN_02013960 -.extern FUN_020139D8 -.extern FUN_02013A10 -.extern FUN_02013A30 -.extern FUN_02013A9C -.extern FUN_02013B5C -.extern FUN_02013B68 -.extern FUN_02013B74 -.extern FUN_02013BC8 -.extern FUN_02013BE4 -.extern FUN_02013C0C -.extern FUN_02013C18 -.extern FUN_020142EC -.extern FUN_020143A8 -.extern FUN_020143D0 -.extern FUN_02014BF4 -.extern FUN_02014C28 -.extern FUN_02014C3C -.extern FUN_02014C54 -.extern FUN_02014D7C -.extern FUN_02014D9C -.extern FUN_02015CF8 -.extern FUN_02015E30 -.extern FUN_02015E60 -.extern FUN_02015EF4 -.extern FUN_02015F10 -.extern FUN_02015F1C -.extern FUN_02015F34 -.extern FUN_020161A4 -.extern FUN_020163BC -.extern FUN_02016438 -.extern FUN_02016464 -.extern FUN_0201669C -.extern FUN_020166C8 -.extern FUN_0201681C -.extern FUN_02016828 -.extern FUN_020168D0 -.extern FUN_02016998 -.extern FUN_020169D8 -.extern FUN_02016A18 -.extern FUN_02016A8C -.extern FUN_02016AF8 -.extern FUN_02016B94 -.extern FUN_02016BBC -.extern FUN_02016C18 -.extern FUN_020178A0 -.extern FUN_020178BC -.extern FUN_0201797C -.extern FUN_020179E0 -.extern FUN_02017B48 -.extern FUN_02017B54 -.extern FUN_02017CD0 -.extern FUN_02017CE8 -.extern FUN_02017DFC -.extern FUN_02017E14 -.extern FUN_02017F18 -.extern FUN_02017FB4 -.extern FUN_02017FE4 -.extern FUN_02018148 -.extern FUN_02018170 -.extern FUN_02018540 -.extern FUN_020186B4 -.extern FUN_02018744 -.extern FUN_0201886C -.extern FUN_02018884 -.extern FUN_02018FF4 -.extern FUN_0201901C -.extern FUN_02019048 -.extern FUN_02019064 -.extern FUN_02019150 -.extern FUN_02019178 -.extern FUN_020191A4 -.extern FUN_020191D0 -.extern FUN_02019220 -.extern FUN_02019548 -.extern FUN_02019570 -.extern FUN_0201958C -.extern FUN_02019620 -.extern FUN_02019658 -.extern FUN_020196F4 -.extern FUN_0201974C -.extern FUN_0201A8C8 -.extern FUN_0201AB08 -.extern FUN_0201AB0C -.extern FUN_0201AB10 -.extern FUN_0201AB14 -.extern FUN_0201AB18 -.extern FUN_0201AB60 -.extern FUN_0201AC68 -.extern FUN_0201AEE4 -.extern FUN_0201AFBC -.extern FUN_0201B234 -.extern FUN_0201B5CC -.extern FUN_0201B6C4 -.extern FUN_0201B6C8 -.extern FUN_0201B6D0 -.extern FUN_0201B76C -.extern FUN_0201B7DC -.extern FUN_0201B8B8 -.extern FUN_0201B8E0 -.extern FUN_0201B914 -.extern FUN_0201B93C -.extern FUN_0201B970 -.extern FUN_0201B9D4 -.extern FUN_0201B9E0 -.extern FUN_0201B9EC -.extern FUN_0201BA10 -.extern FUN_0201BA1C -.extern FUN_0201BA60 -.extern FUN_0201BCBC -.extern FUN_0201BD5C -.extern FUN_0201BD70 -.extern FUN_0201BD7C -.extern FUN_0201BD84 -.extern FUN_0201BDE0 -.extern FUN_0201BE3C -.extern FUN_0201C05C -.extern FUN_0201C1EC -.extern FUN_0201C24C -.extern FUN_0201C29C -.extern FUN_0201C30C -.extern FUN_0201C620 -.extern FUN_0201C638 -.extern FUN_0201CC08 -.extern FUN_0201CC24 -.extern FUN_0201CD04 -.extern FUN_0201CDD0 -.extern FUN_0201CE04 -.extern FUN_0201D040 -.extern FUN_0201D12C -.extern FUN_0201D168 -.extern FUN_0201E00C -.extern FUN_0201E08C -.extern FUN_0201E0BC -.extern FUN_0201E28C -.extern FUN_0201E66C -.extern FUN_0201E6D8 -.extern FUN_0201E6E4 -.extern FUN_0201E740 -.extern FUN_0201E74C -.extern FUN_0201E788 -.extern FUN_0201E7A0 -.extern FUN_0201EB64 -.extern FUN_0201EB70 -.extern FUN_0201EB8C -.extern FUN_0201EBA4 -.extern FUN_0201EC68 -.extern FUN_0201EC88 -.extern FUN_0201EC94 -.extern FUN_0201ED10 -.extern FUN_0201EEF0 -.extern FUN_0201EF70 -.extern FUN_0201EF90 -.extern FUN_0201EFE0 -.extern FUN_0201EFEC -.extern FUN_0201F04C -.extern FUN_0201F854 -.extern FUN_0201FD58 -.extern FUN_0201FDEC -.extern FUN_0201FE94 -.extern FUN_0201FFC8 -.extern FUN_02020044 -.extern FUN_020200A0 -.extern FUN_020200BC -.extern FUN_02020100 -.extern FUN_0202011C -.extern FUN_02020128 -.extern FUN_02020130 -.extern FUN_020201DC -.extern FUN_020201E4 -.extern FUN_02020208 -.extern FUN_0202022C -.extern FUN_02020248 -.extern FUN_02020310 -.extern FUN_02020354 -.extern FUN_02020388 -.extern FUN_02020398 -.extern FUN_02020968 -.extern FUN_02020988 -.extern FUN_02020AFC -.extern FUN_02021590 -.extern FUN_020215C8 -.extern FUN_020215E0 -.extern FUN_02021750 -.extern FUN_020218D8 -.extern FUN_02021934 -.extern FUN_0202199C -.extern FUN_020219F4 -.extern FUN_02021A20 -.extern FUN_02021A4C -.extern FUN_02021A74 -.extern FUN_02021CE0 -.extern FUN_02021D3C -.extern FUN_02021E28 -.extern FUN_02021EF0 -.extern FUN_02021F2C -.extern FUN_0202212C -.extern FUN_02022294 -.extern FUN_020222AC -.extern FUN_020222B4 -.extern FUN_020222C4 -.extern FUN_020222E8 -.extern FUN_020222F0 -.extern FUN_020222F8 -.extern FUN_02022300 -.extern FUN_02022308 -.extern FUN_02022310 -.extern FUN_02022318 -.extern FUN_020223BC -.extern FUN_02022504 -.extern FUN_02022510 -.extern FUN_02022528 -.extern FUN_02022534 -.extern FUN_02022540 -.extern FUN_0202254C -.extern FUN_020225F8 -.extern FUN_02022610 -.extern FUN_0202263C -.extern FUN_02022720 -.extern FUN_020227FC -.extern FUN_02022800 -.extern FUN_02022804 -.extern FUN_0202280C -.extern FUN_0202282C -.extern FUN_02022830 -.extern FUN_0202287C -.extern FUN_02023788 -.extern FUN_02023794 -.extern FUN_02023818 -.extern FUN_0202381C -.extern FUN_02023828 -.extern FUN_02023874 -.extern FUN_02023884 -.extern FUN_020238F4 -.extern FUN_0202390C -.extern FUN_02023918 -.extern FUN_02023924 -.extern FUN_02023928 -.extern FUN_0202393C -.extern FUN_0202395C -.extern FUN_0202397C -.extern FUN_0202398C -.extern FUN_02023990 -.extern FUN_020239A0 -.extern FUN_020239BC -.extern FUN_020239C0 -.extern FUN_020239C8 -.extern FUN_020239CC -.extern FUN_020239D0 -.extern FUN_020239E4 -.extern FUN_02023A10 -.extern FUN_02023A28 -.extern FUN_02023A2C -.extern FUN_02023A30 -.extern FUN_02023A54 -.extern FUN_02023A68 -.extern FUN_02023A70 -.extern FUN_02023A78 -.extern FUN_02023A88 -.extern FUN_02023A90 -.extern FUN_02023A9C -.extern FUN_02023AA4 -.extern FUN_02023AF4 -.extern FUN_02023B0C -.extern FUN_02023BD4 -.extern FUN_02023C90 -.extern FUN_02023D58 -.extern FUN_02023D6C -.extern FUN_02023D80 -.extern FUN_020243C8 -.extern FUN_02024404 -.extern FUN_02024440 -.extern FUN_0202445C -.extern FUN_020244A4 -.extern FUN_020244EC -.extern FUN_02024504 -.extern FUN_02024518 -.extern FUN_02024550 -.extern FUN_020245F0 -.extern FUN_0202471C -.extern FUN_0202498C -.extern FUN_02024AF0 -.extern FUN_02024C84 -.extern FUN_02024CA4 -.extern FUN_02024CE0 -.extern FUN_02024D4C -.extern FUN_02024D64 -.extern FUN_02024D80 -.extern FUN_02024DA0 -.extern FUN_02024EB4 -.extern FUN_02024EC0 -.extern FUN_02024ECC -.extern FUN_02024ED8 -.extern FUN_02024EE8 -.extern FUN_02024F0C -.extern FUN_02024F30 -.extern FUN_02024F44 -.extern FUN_02024FF4 -.extern FUN_02025084 -.extern FUN_02025128 -.extern FUN_02025238 -.extern FUN_02025244 -.extern FUN_0202524C -.extern FUN_02025268 -.extern FUN_02025274 -.extern FUN_020252AC -.extern FUN_020252C4 -.extern FUN_020252D0 -.extern FUN_020252DC -.extern FUN_020252E8 -.extern FUN_020252F4 -.extern FUN_020253E0 -.extern FUN_02025484 -.extern FUN_02025490 -.extern FUN_020254A0 -.extern FUN_020254B4 -.extern FUN_020254C0 -.extern FUN_02025520 -.extern FUN_02025614 -.extern FUN_02025658 -.extern FUN_020256AC -.extern FUN_020256BC -.extern FUN_020256D0 -.extern FUN_020256DC -.extern FUN_020257C0 -.extern FUN_020257C4 -.extern FUN_020257C8 -.extern FUN_020257CC -.extern FUN_020257D0 -.extern FUN_020257D8 -.extern FUN_020257DC -.extern FUN_020257E0 -.extern FUN_02025814 -.extern FUN_02025824 -.extern FUN_02025838 -.extern FUN_02025864 -.extern FUN_02025878 -.extern FUN_02025888 -.extern FUN_0202589C -.extern FUN_020258B0 -.extern FUN_020258D4 -.extern FUN_02025A60 -.extern FUN_02025B60 -.extern FUN_02025B94 -.extern FUN_02025BE8 -.extern FUN_02025C30 -.extern FUN_02025C40 -.extern FUN_02025D6C -.extern FUN_02025D94 -.extern FUN_02025DB0 -.extern FUN_020260C4 -.extern FUN_02026298 -.extern FUN_020266B0 -.extern FUN_020266C8 -.extern FUN_020268D4 -.extern FUN_02026908 -.extern FUN_02026970 -.extern FUN_020269A0 -.extern FUN_020269CC -.extern FUN_020269D4 -.extern FUN_02026BC8 -.extern FUN_02026C00 -.extern FUN_02026CB4 -.extern FUN_02026CC4 -.extern FUN_02026FE4 -.extern FUN_02026FE8 -.extern FUN_02027008 -.extern FUN_02027044 -.extern FUN_0202708C -.extern FUN_02027098 -.extern FUN_020270B4 -.extern FUN_020270D8 -.extern FUN_02027100 -.extern FUN_02027114 -.extern FUN_02027168 -.extern FUN_02027184 -.extern FUN_020271A4 -.extern FUN_02027210 -.extern FUN_02027264 -.extern FUN_02027478 -.extern FUN_020275D8 -.extern FUN_02027608 -.extern FUN_0202763C -.extern FUN_0202769C -.extern FUN_020276A8 -.extern FUN_02027710 -.extern FUN_02027740 -.extern FUN_0202787C -.extern FUN_020278AC -.extern FUN_020278DC -.extern FUN_02027914 -.extern FUN_02027964 -.extern FUN_02027E24 -.extern FUN_02027E34 -.extern FUN_02027E5C -.extern FUN_02027F04 -.extern FUN_02027FBC -.extern FUN_02027FDC -.extern FUN_02028048 -.extern FUN_02028074 -.extern FUN_02028094 -.extern FUN_020280B8 -.extern FUN_020280F4 -.extern FUN_02028174 -.extern FUN_02028190 -.extern FUN_020281B8 -.extern FUN_02028448 -.extern FUN_020286EC -.extern FUN_02028700 -.extern FUN_02028754 -.extern FUN_02028788 -.extern FUN_020287A4 -.extern FUN_020287A8 -.extern FUN_020287C0 -.extern FUN_020287EC -.extern FUN_02028810 -.extern FUN_0202881C -.extern FUN_02028828 -.extern FUN_02028840 -.extern FUN_02028930 -.extern FUN_02028934 -.extern FUN_02028954 -.extern FUN_0202896C -.extern FUN_020289A4 -.extern FUN_020289B0 -.extern FUN_02028A20 -.extern FUN_02028AD4 -.extern FUN_02028FA4 -.extern FUN_02029048 -.extern FUN_02029120 -.extern FUN_0202912C -.extern FUN_02029138 -.extern FUN_0202914C -.extern FUN_0202918C -.extern FUN_0202920C -.extern FUN_0202942C -.extern FUN_02029500 -.extern FUN_02029880 -.extern FUN_020299C0 -.extern FUN_020299DC -.extern FUN_02029ABC -.extern FUN_02029AC8 -.extern FUN_02029ACC -.extern FUN_02029AD0 -.extern FUN_02029AD8 -.extern FUN_02029AFC -.extern FUN_02029B38 -.extern FUN_02029B3C -.extern FUN_02029C08 -.extern FUN_02029C74 -.extern FUN_02029C80 -.extern FUN_02029C8C -.extern FUN_02029CC8 -.extern FUN_02029CE0 -.extern FUN_02029CEC -.extern FUN_02029D44 -.extern FUN_02029DD4 -.extern FUN_02029E0C -.extern FUN_02029E2C -.extern FUN_02029EBC -.extern FUN_02029EC0 -.extern FUN_02029EC4 -.extern FUN_02029EE4 -.extern FUN_02029EF8 -.extern FUN_02029F04 -.extern FUN_02029F10 -.extern FUN_02029F14 -.extern FUN_02029F4C -.extern FUN_02029F9C -.extern FUN_02029FC8 -.extern FUN_0202A07C -.extern FUN_0202A0A8 -.extern FUN_0202A0E8 -.extern FUN_0202A11C -.extern FUN_0202A150 -.extern FUN_0202A170 -.extern FUN_0202A1B8 -.extern FUN_0202A240 -.extern FUN_0202A2C4 -.extern FUN_0202A3B4 -.extern FUN_0202A498 -.extern FUN_0202A520 -.extern FUN_0202A538 -.extern FUN_0202A578 -.extern FUN_0202A5CC -.extern FUN_0202A5D0 -.extern FUN_0202A5D4 -.extern FUN_0202A5F4 -.extern FUN_0202A74C -.extern FUN_0202A864 -.extern FUN_0202A8CC -.extern FUN_0202A8D8 -.extern FUN_0202A8E4 -.extern FUN_0202A918 -.extern FUN_0202A988 -.extern FUN_0202A990 -.extern FUN_0202A9AC -.extern FUN_0202A9B0 -.extern FUN_0202A9D0 -.extern FUN_0202AA00 -.extern FUN_0202AA14 -.extern FUN_0202AA20 -.extern FUN_0202AA38 -.extern FUN_0202AA40 -.extern FUN_0202AA58 -.extern FUN_0202AA74 -.extern FUN_0202AAA0 -.extern FUN_0202AAFC -.extern FUN_0202AB40 -.extern FUN_0202AB68 -.extern FUN_0202AF70 -.extern FUN_0202AF88 -.extern FUN_0202AF9C -.extern FUN_0202AFC0 -.extern FUN_0202AFFC -.extern FUN_0202B020 -.extern FUN_0202B03C -.extern FUN_0202B050 -.extern FUN_0202B21C -.extern FUN_0202B3C4 -.extern FUN_0202B4B0 -.extern FUN_0202B710 -.extern FUN_0202B838 -.extern FUN_0202B844 -.extern FUN_0202B850 -.extern FUN_0202B85C -.extern FUN_0202B868 -.extern FUN_0202B870 -.extern FUN_0202B87C -.extern FUN_0202B8E4 -.extern FUN_0202B8F0 -.extern FUN_0202BD6C -.extern FUN_0202BDF0 -.extern FUN_0202BE6C -.extern FUN_0202BEDC -.extern FUN_0202BFD8 -.extern FUN_0202C000 -.extern FUN_0202C108 -.extern FUN_0202C144 -.extern FUN_0202CB8C -.extern FUN_0202D8B0 -.extern FUN_0202D8D0 -.extern FUN_0202DBE0 -.extern FUN_0202DCF8 -.extern FUN_0202DDE8 -.extern FUN_0202DE78 -.extern FUN_0202DFA4 -.extern FUN_0202E020 -.extern FUN_0202E044 -.extern FUN_0202E25C -.extern FUN_0202E4C8 -.extern FUN_0202EDD8 -.extern FUN_0202EDF8 -.extern FUN_0202EE0C -.extern FUN_0202EE24 -.extern FUN_0202EE44 -.extern FUN_0202EF18 -.extern FUN_0202EF84 -.extern FUN_0202F078 -.extern FUN_0202F094 -.extern FUN_0202F0B8 -.extern FUN_0202FA10 -.extern FUN_0202FA1C -.extern FUN_0202FA48 -.extern FUN_0202FB80 -.extern FUN_02030A78 -.extern FUN_02030ADC -.extern FUN_02030B3C -.extern FUN_02030BC4 -.extern FUN_02030C4C -.extern FUN_02030C58 -.extern FUN_02030E7C -.extern FUN_02030F20 -.extern FUN_02030F40 -.extern FUN_02030F60 -.extern FUN_02030F74 -.extern FUN_02030F88 -.extern FUN_02030FA8 -.extern FUN_02030FC8 -.extern FUN_02030FE0 -.extern FUN_02031190 -.extern FUN_020311D0 -.extern FUN_020311DC -.extern FUN_020311E8 -.extern FUN_020311F0 -.extern FUN_02031248 -.extern FUN_02031280 -.extern FUN_020312BC -.extern FUN_020313B4 -.extern FUN_020313EC -.extern FUN_02031400 -.extern FUN_02031438 -.extern FUN_02031588 -.extern FUN_020315D8 -.extern FUN_020315FC -.extern FUN_0203168C -.extern FUN_020316AC -.extern FUN_020316E0 -.extern FUN_02031810 -.extern FUN_02031824 -.extern FUN_02031860 -.extern FUN_02031880 -.extern FUN_020318B4 -.extern FUN_020318C4 -.extern FUN_02031914 -.extern FUN_02031924 -.extern FUN_02031934 -.extern FUN_02031948 -.extern FUN_02031990 -.extern FUN_020319D8 -.extern FUN_020319F4 -.extern FUN_02031A08 -.extern FUN_02031A2C -.extern FUN_02031A7C -.extern FUN_02031AC8 -.extern FUN_02031AF4 -.extern FUN_02031B2C -.extern FUN_02031B50 -.extern FUN_02031BD0 -.extern FUN_02031BF4 -.extern FUN_02031C2C -.extern FUN_02031C54 -.extern FUN_02031C64 -.extern FUN_02032888 -.extern FUN_020328C0 -.extern FUN_020328F4 -.extern FUN_02032B6C -.extern FUN_02032DAC -.extern FUN_020334E8 -.extern FUN_02033534 -.extern FUN_02033564 -.extern FUN_02033578 -.extern FUN_020335B8 -.extern FUN_020335F0 -.extern FUN_02033678 -.extern FUN_020337E8 -.extern FUN_0203384C -.extern FUN_02033E74 -.extern FUN_02033ED0 -.extern FUN_02033F20 -.extern FUN_02033F70 -.extern FUN_02034188 -.extern FUN_020344AC -.extern FUN_020344D8 -.extern FUN_020344FC -.extern FUN_0203450C -.extern FUN_0203451C -.extern FUN_02034678 -.extern FUN_020346CC -.extern FUN_02034774 -.extern FUN_02034788 -.extern FUN_020347B0 -.extern FUN_020347C4 -.extern FUN_02034824 -.extern FUN_0203484C -.extern FUN_02034860 -.extern FUN_0203487C -.extern FUN_02034898 -.extern FUN_020348B4 -.extern FUN_020348E4 -.extern FUN_02034908 -.extern FUN_02034930 -.extern FUN_02034944 -.extern FUN_02034964 -.extern FUN_02034998 -.extern FUN_020349D8 -.extern FUN_020349E4 -.extern FUN_02034A04 -.extern FUN_02034A60 -.extern FUN_02034AC8 -.extern FUN_02034AF0 -.extern FUN_02034AF8 -.extern FUN_02034B00 -.extern FUN_02034B64 -.extern FUN_02034B6C -.extern FUN_02034B74 -.extern FUN_02034BAC -.extern FUN_02034BDC -.extern FUN_02034C0C -.extern FUN_02034C24 -.extern FUN_02034C34 -.extern FUN_02034D2C -.extern FUN_02034D44 -.extern FUN_02034DC4 -.extern FUN_02034DC8 -.extern FUN_02034DCC -.extern FUN_02034DD0 -.extern FUN_02034DD4 -.extern FUN_02034DE8 -.extern FUN_02034DEC -.extern FUN_02034DF4 -.extern FUN_02034DFC -.extern FUN_02034E04 -.extern FUN_02034E0C -.extern FUN_02034E10 -.extern FUN_02034E18 -.extern FUN_02034E20 -.extern FUN_02034E24 -.extern FUN_02034E28 -.extern FUN_02034E30 -.extern FUN_02034E48 -.extern FUN_02034E60 -.extern FUN_02034E8C -.extern FUN_02034E90 -.extern FUN_02034EC4 -.extern FUN_02034EF8 -.extern FUN_02034F1C -.extern FUN_02034F40 -.extern FUN_02034F88 -.extern FUN_02034FC0 -.extern FUN_02034FE4 -.extern FUN_02035068 -.extern FUN_020351A0 -.extern FUN_02035D04 -.extern FUN_02035E50 -.extern FUN_02036A78 -.extern FUN_02036AB8 -.extern FUN_02036B90 -.extern FUN_02036BC4 -.extern FUN_02036BDC -.extern FUN_02036D94 -.extern FUN_02036DD4 -.extern FUN_02037024 -.extern FUN_02037350 -.extern FUN_02037394 -.extern FUN_0203739C -.extern FUN_020373AC -.extern FUN_020373C4 -.extern FUN_020373D4 -.extern FUN_02037760 -.extern FUN_02037778 -.extern FUN_020377A8 -.extern FUN_020377AC -.extern FUN_020377B0 -.extern FUN_020377C8 -.extern FUN_0203780C -.extern FUN_0203789C -.extern FUN_020378FC -.extern FUN_02037944 -.extern FUN_020379F8 -.extern FUN_02037A1C -.extern FUN_02037A40 -.extern FUN_02037A48 -.extern FUN_02037A70 -.extern FUN_02037A78 -.extern FUN_02037B44 -.extern FUN_02037BB0 -.extern FUN_02037C00 -.extern FUN_02037CF0 -.extern FUN_02037D5C -.extern FUN_02037D60 -.extern FUN_02037E18 -.extern FUN_02037E80 -.extern FUN_02037E90 -.extern FUN_02037EB8 -.extern FUN_02037F2C -.extern FUN_02037F58 -.extern FUN_02037FC4 -.extern FUN_02037FE4 -.extern FUN_020380CC -.extern FUN_02038130 -.extern FUN_020383D8 -.extern FUN_020383F8 -.extern FUN_0203842C -.extern FUN_0203846C -.extern FUN_020385CC -.extern FUN_02038680 -.extern FUN_020386A4 -.extern FUN_020386B4 -.extern FUN_020386E0 -.extern FUN_02038790 -.extern FUN_02038804 -.extern FUN_02038814 -.extern FUN_02038824 -.extern FUN_02038854 -.extern FUN_02038864 -.extern FUN_0203888C -.extern FUN_020388B4 -.extern FUN_020389CC -.extern FUN_02038AD0 -.extern FUN_02038AF4 -.extern FUN_02038B6C -.extern FUN_02038C78 -.extern FUN_02038CA8 -.extern FUN_02038CD8 -.extern FUN_02038D10 -.extern FUN_02038EB0 -.extern FUN_02039438 -.extern FUN_02039460 -.extern FUN_020394B8 -.extern FUN_020394F0 -.extern FUN_02039504 -.extern FUN_02039528 -.extern FUN_0203953C -.extern FUN_02039550 -.extern FUN_02039564 -.extern FUN_0203959C -.extern FUN_020395BC -.extern FUN_020395F4 -.extern FUN_02039618 -.extern FUN_0203962C -.extern FUN_02039640 -.extern FUN_0203965C -.extern FUN_02039678 -.extern FUN_02039694 -.extern FUN_02039874 -.extern FUN_0203989C -.extern FUN_020399A0 -.extern FUN_020399A4 -.extern FUN_020399A8 -.extern FUN_020399B4 -.extern FUN_02039A10 -.extern FUN_02039A28 -.extern FUN_02039A40 -.extern FUN_02039A5C -.extern FUN_02039A78 -.extern FUN_02039A90 -.extern FUN_02039AAC -.extern FUN_02039ACC -.extern FUN_02039AF8 -.extern FUN_02039B28 -.extern FUN_02039B50 -.extern FUN_02039B78 -.extern FUN_02039BA0 -.extern FUN_02039BBC -.extern FUN_02039BDC -.extern FUN_02039C08 -.extern FUN_02039C40 -.extern FUN_02039C78 -.extern FUN_02039CE4 -.extern FUN_02039CF8 -.extern FUN_02039D10 -.extern FUN_02039D48 -.extern FUN_02039D78 -.extern FUN_02039DAC -.extern FUN_02039DC4 -.extern FUN_02039DD0 -.extern FUN_02039E04 -.extern FUN_02039E38 -.extern FUN_02039E50 -.extern FUN_02039E68 -.extern FUN_02039E84 -.extern FUN_02039EC0 -.extern FUN_02039EE8 -.extern FUN_02039F0C -.extern FUN_02039F30 -.extern FUN_02039F58 -.extern FUN_02039F88 -.extern FUN_02039FB8 -.extern FUN_02039FDC -.extern FUN_0203A00C -.extern FUN_0203A038 -.extern FUN_0203A04C -.extern FUN_0203A098 -.extern FUN_0203A0FC -.extern FUN_0203A13C -.extern FUN_0203A188 -.extern FUN_0203A210 -.extern FUN_0203A288 -.extern FUN_0203A2C4 -.extern FUN_0203A304 -.extern FUN_0203A340 -.extern FUN_0203A388 -.extern FUN_0203A3C4 -.extern FUN_0203A400 -.extern FUN_0203A45C -.extern FUN_0203A484 -.extern FUN_0203A4D0 -.extern FUN_0203A560 -.extern FUN_0203A590 -.extern FUN_0203A5D8 -.extern FUN_0203A608 -.extern FUN_0203A630 -.extern FUN_0203A780 -.extern FUN_0203A830 -.extern FUN_0203A85C -.extern FUN_0203A878 -.extern FUN_0203A8B8 -.extern FUN_0203A9F0 -.extern FUN_0203AA90 -.extern FUN_0203AAA0 -.extern FUN_0203AB44 -.extern FUN_0203AB74 -.extern FUN_0203AB8C -.extern FUN_0203AC14 -.extern FUN_0203AC9C -.extern FUN_0203ACC4 -.extern FUN_0203AD08 -.extern FUN_0203AD54 -.extern FUN_0203ADC4 -.extern FUN_0203AE4C -.extern FUN_0203AED4 -.extern FUN_0203AF34 -.extern FUN_0203AF58 -.extern FUN_0203AF84 -.extern FUN_0203AFA4 -.extern FUN_0203AFC4 -.extern FUN_0203B024 -.extern FUN_0203B148 -.extern FUN_0203B1F0 -.extern FUN_0203B2E0 -.extern FUN_0203B3B0 -.extern FUN_0203B3C0 -.extern FUN_0203B3DC -.extern FUN_0203B3F8 -.extern FUN_0203B440 -.extern FUN_0203B468 -.extern FUN_0203B500 -.extern FUN_0203B544 -.extern FUN_0203B574 -.extern FUN_0203B5B8 -.extern FUN_0203B618 -.extern FUN_0203B640 -.extern FUN_0203B724 -.extern FUN_0203B758 -.extern FUN_0203B790 -.extern FUN_0203B7D8 -.extern FUN_0203B7F0 -.extern FUN_0203B81C -.extern FUN_0203B85C -.extern FUN_0203B8A0 -.extern FUN_0203B8E4 -.extern FUN_0203B914 -.extern FUN_0203B944 -.extern FUN_0203B968 -.extern FUN_0203B9B4 -.extern FUN_0203BA3C -.extern FUN_0203BAB0 -.extern FUN_0203BAF4 -.extern FUN_0203BB34 -.extern FUN_0203BB80 -.extern FUN_0203BB84 -.extern FUN_0203BB88 -.extern FUN_0203BB8C -.extern FUN_0203BC1C -.extern FUN_0203BC2C -.extern FUN_0203BCBC -.extern FUN_0203BCCC -.extern FUN_0203BCD8 -.extern FUN_0203BD08 -.extern FUN_0203BD28 -.extern FUN_0203BDB8 -.extern FUN_0203BE50 -.extern FUN_0203BE68 -.extern FUN_0203BE80 -.extern FUN_0203BECC -.extern FUN_0203BF00 -.extern FUN_0203BF20 -.extern FUN_0203BF2C -.extern FUN_0203BF84 -.extern FUN_0203BFEC -.extern FUN_0203C054 -.extern FUN_0203C090 -.extern FUN_0203C0CC -.extern FUN_0203C0FC -.extern FUN_0203C118 -.extern FUN_0203C12C -.extern FUN_0203C174 -.extern FUN_0203C1AC -.extern FUN_0203C200 -.extern FUN_0203C278 -.extern FUN_0203C2C4 -.extern FUN_0203C2E0 -.extern FUN_0203C2F0 -.extern FUN_0203C300 -.extern FUN_0203C32C -.extern FUN_0203C33C -.extern FUN_0203C368 -.extern FUN_0203C3C8 -.extern FUN_0203C3E8 -.extern FUN_0203C430 -.extern FUN_0203C460 -.extern FUN_0203C4B0 -.extern FUN_0203C4F0 -.extern FUN_0203C520 -.extern FUN_0203C58C -.extern FUN_0203C5BC -.extern FUN_0203C614 -.extern FUN_0203C680 -.extern FUN_0203C6C4 -.extern FUN_0203C70C -.extern FUN_0203C730 -.extern FUN_0203C788 -.extern FUN_0203C7E4 -.extern FUN_0203C7F4 -.extern FUN_0203C820 -.extern FUN_0203C844 -.extern FUN_0203C874 -.extern FUN_0203C8B4 -.extern FUN_0203C8E4 -.extern FUN_0203C930 -.extern FUN_0203C960 -.extern FUN_0203C990 -.extern FUN_0203CA20 -.extern FUN_0203CA2C -.extern FUN_0203CA5C -.extern FUN_0203CAE8 -.extern FUN_0203CB08 -.extern FUN_0203CB20 -.extern FUN_0203CB48 -.extern FUN_0203CB60 -.extern FUN_0203CB70 -.extern FUN_0203CBBC -.extern FUN_0203CBE8 -.extern FUN_0203CC88 -.extern FUN_0203CD20 -.extern FUN_0203CDB8 -.extern FUN_0203CDC4 -.extern FUN_0203CDD0 -.extern FUN_0203CE00 -.extern FUN_0203CE0C -.extern FUN_0203CE8C -.extern FUN_0203CEBC -.extern FUN_0203CF04 -.extern FUN_0203CF34 -.extern FUN_0203CF64 -.extern FUN_0203CF94 -.extern FUN_0203CFC4 -.extern FUN_0203CFC8 -.extern FUN_0203D050 -.extern FUN_0203D0A4 -.extern FUN_0203D0F8 -.extern FUN_0203D134 -.extern FUN_0203D140 -.extern FUN_0203D150 -.extern FUN_0203D178 -.extern FUN_0203D194 -.extern FUN_0203D1A4 -.extern FUN_0203D1C0 -.extern FUN_0203D214 -.extern FUN_0203D23C -.extern FUN_0203D248 -.extern FUN_0203D278 -.extern FUN_0203D2A4 -.extern FUN_0203D2E4 -.extern FUN_0203D330 -.extern FUN_0203D33C -.extern FUN_0203D36C -.extern FUN_0203D3A4 -.extern FUN_0203D3DC -.extern FUN_0203D448 -.extern FUN_0203D458 -.extern FUN_0203D490 -.extern FUN_0203D4E8 -.extern FUN_0203D528 -.extern FUN_0203D560 -.extern FUN_0203D5B0 -.extern FUN_0203D5F8 -.extern FUN_0203D60C -.extern FUN_0203D61C -.extern FUN_0203D630 -.extern FUN_0203D66C -.extern FUN_0203D6C4 -.extern FUN_0203D728 -.extern FUN_0203D738 -.extern FUN_0203D774 -.extern FUN_0203D7DC -.extern FUN_0203D834 -.extern FUN_0203D868 -.extern FUN_0203D874 -.extern FUN_0203D8A0 -.extern FUN_0203D8D0 -.extern FUN_0203D8E8 -.extern FUN_0203D8EC -.extern FUN_0203D920 -.extern FUN_0203D938 -.extern FUN_0203D948 -.extern FUN_0203D958 -.extern FUN_0203D998 -.extern FUN_0203D9E8 -.extern FUN_0203DA78 -.extern FUN_0203DAB0 -.extern FUN_0203DAE8 -.extern FUN_0203DB38 -.extern FUN_0203DB88 -.extern FUN_0203DBD4 -.extern FUN_0203DC00 -.extern FUN_0203DC58 -.extern FUN_0203DC70 -.extern FUN_0203DC88 -.extern FUN_0203DCA0 -.extern FUN_0203DCB8 -.extern FUN_0203DCC8 -.extern FUN_0203DCD8 -.extern FUN_0203DCE8 -.extern FUN_0203DCF8 -.extern FUN_0203DD08 -.extern FUN_0203DD18 -.extern FUN_0203DD34 -.extern FUN_0203DD50 -.extern FUN_0203DD60 -.extern FUN_0203DE00 -.extern FUN_0203DE4C -.extern FUN_0203DE58 -.extern FUN_0203DE80 -.extern FUN_0203DEA8 -.extern FUN_0203DEC4 -.extern FUN_0203DEF8 -.extern FUN_0203DF2C -.extern FUN_0203DF38 -.extern FUN_0203DF64 -.extern FUN_0203DF84 -.extern FUN_0203DFA8 -.extern FUN_0203DFE0 -.extern FUN_0203E018 -.extern FUN_0203E054 -.extern FUN_0203E078 -.extern FUN_0203E0CC -.extern FUN_0203E120 -.extern FUN_0203E138 -.extern FUN_0203E168 -.extern FUN_0203E254 -.extern FUN_0203E258 -.extern FUN_0203E29C -.extern FUN_0203E2F8 -.extern FUN_0203E35C -.extern FUN_0203E38C -.extern FUN_0203E3D0 -.extern FUN_0203E408 -.extern FUN_0203E440 -.extern FUN_0203E470 -.extern FUN_0203E4A0 -.extern FUN_0203E4B0 -.extern FUN_0203E4D8 -.extern FUN_0203E4F0 -.extern FUN_0203E510 -.extern FUN_0203E568 -.extern FUN_0203E5DC -.extern FUN_0203E674 -.extern FUN_0203E684 -.extern FUN_0203E6B4 -.extern FUN_0203E6C4 -.extern FUN_0203E6FC -.extern FUN_0203E72C -.extern FUN_0203E744 -.extern FUN_0203E774 -.extern FUN_0203E7F0 -.extern FUN_0203E81C -.extern FUN_0203E848 -.extern FUN_0203E858 -.extern FUN_0203E870 -.extern FUN_0203E894 -.extern FUN_0203E8C4 -.extern FUN_0203E8F4 -.extern FUN_0203E928 -.extern FUN_0203E940 -.extern FUN_0203E954 -.extern FUN_0203E968 -.extern FUN_0203E9CC -.extern FUN_0203EA68 -.extern FUN_0203EA90 -.extern FUN_0203EAB0 -.extern FUN_0203EB20 -.extern FUN_0203EB48 -.extern FUN_0203EB88 -.extern FUN_0203EBC8 -.extern FUN_0203EBE4 -.extern FUN_0203ECAC -.extern FUN_0203ECD8 -.extern FUN_0203ECF4 -.extern FUN_0203ED10 -.extern FUN_0203ED70 -.extern FUN_0203EDA4 -.extern FUN_0203EDC8 -.extern FUN_0203EDE0 -.extern FUN_0203EE08 -.extern FUN_0203EE18 -.extern FUN_0203EE28 -.extern FUN_0203EE58 -.extern FUN_0203EE68 -.extern FUN_0203EE78 -.extern FUN_0203EE98 -.extern FUN_0203EED8 -.extern FUN_0203EF58 -.extern FUN_0203F00C -.extern FUN_0203F020 -.extern FUN_0203F034 -.extern FUN_0203F058 -.extern FUN_0203F07C -.extern FUN_0203F110 -.extern FUN_0203F174 -.extern FUN_0203F19C -.extern FUN_0203F234 -.extern FUN_0203F254 -.extern FUN_0203F26C -.extern FUN_0203F2AC -.extern FUN_0203F2E4 -.extern FUN_0203F31C -.extern FUN_0203F348 -.extern FUN_0203F38C -.extern FUN_0203F39C -.extern FUN_0203F3AC -.extern FUN_0203F418 -.extern FUN_0203F44C -.extern FUN_0203F484 -.extern FUN_0203F4D8 -.extern FUN_0203F508 -.extern FUN_0203F5D4 -.extern FUN_0203F604 -.extern FUN_0203F634 -.extern FUN_0203F664 -.extern FUN_0203F6E4 -.extern FUN_0203F720 -.extern FUN_0203F760 -.extern FUN_0203F7C8 -.extern FUN_0203F80C -.extern FUN_0203F880 -.extern FUN_0203F8C0 -.extern FUN_0203F924 -.extern FUN_0203F954 -.extern FUN_0203F988 -.extern FUN_0203F9B0 -.extern FUN_0203F9DC -.extern FUN_0203FA14 -.extern FUN_0203FA58 -.extern FUN_0203FB4C -.extern FUN_0203FB64 -.extern FUN_0203FB94 -.extern FUN_0203FBA0 -.extern FUN_0203FBAC -.extern FUN_0203FBBC -.extern FUN_0203FC1C -.extern FUN_0203FC58 -.extern FUN_0203FC80 -.extern FUN_0203FCB0 -.extern FUN_0203FCDC -.extern FUN_0203FCF4 -.extern FUN_0203FDBC -.extern FUN_0203FE08 -.extern FUN_0203FE48 -.extern FUN_0203FE80 -.extern FUN_0203FE90 -.extern FUN_0203FEC0 -.extern FUN_0203FF10 -.extern FUN_02040028 -.extern FUN_02040074 -.extern FUN_020400C8 -.extern FUN_0204011C -.extern FUN_02040170 -.extern FUN_020401CC -.extern FUN_02040204 -.extern FUN_02040220 -.extern FUN_0204025C -.extern FUN_02040298 -.extern FUN_020402D4 -.extern FUN_02040304 -.extern FUN_02040340 -.extern FUN_02040370 -.extern FUN_020403A0 -.extern FUN_020403D0 -.extern FUN_02040414 -.extern FUN_02040458 -.extern FUN_02040488 -.extern FUN_020404FC -.extern FUN_0204052C -.extern FUN_0204056C -.extern FUN_0204059C -.extern FUN_020405B4 -.extern FUN_020405CC -.extern FUN_020405F8 -.extern FUN_02040638 -.extern FUN_0204064C -.extern FUN_02040660 -.extern FUN_020406C0 -.extern FUN_020406CC -.extern FUN_02040700 -.extern FUN_02040724 -.extern FUN_02040748 -.extern FUN_02040790 -.extern FUN_020407C8 -.extern FUN_02040800 -.extern FUN_0204083C -.extern FUN_02040874 -.extern FUN_020408BC -.extern FUN_0204091C -.extern FUN_02040964 -.extern FUN_020409C0 -.extern FUN_020409F8 -.extern FUN_02040A30 -.extern FUN_02040A7C -.extern FUN_02040B0C -.extern FUN_02040B5C -.extern FUN_02040BAC -.extern FUN_02040BFC -.extern FUN_02040C34 -.extern FUN_02040C6C -.extern FUN_02040CA4 -.extern FUN_02040D04 -.extern FUN_02040D7C -.extern FUN_02040DB4 -.extern FUN_02040DEC -.extern FUN_02040E4C -.extern FUN_02040EB4 -.extern FUN_02040EF8 -.extern FUN_02040F34 -.extern FUN_02040F6C -.extern FUN_02040FA4 -.extern FUN_02040FDC -.extern FUN_02041014 -.extern FUN_0204104C -.extern FUN_02041094 -.extern FUN_020410C8 -.extern FUN_02041100 -.extern FUN_02041138 -.extern FUN_02041174 -.extern FUN_02041194 -.extern FUN_020411C4 -.extern FUN_02041340 -.extern FUN_020413C0 -.extern FUN_020413E8 -.extern FUN_020413F8 -.extern FUN_0204140C -.extern FUN_02041424 -.extern FUN_0204143C -.extern FUN_02041478 -.extern FUN_0204149C -.extern FUN_020414B8 -.extern FUN_020414CC -.extern FUN_020414E0 -.extern FUN_020414FC -.extern FUN_02041518 -.extern FUN_02041558 -.extern FUN_02041588 -.extern FUN_020415AC -.extern FUN_020415BC -.extern FUN_020415E0 -.extern FUN_02041618 -.extern FUN_02041644 -.extern FUN_02041650 -.extern FUN_02041664 -.extern FUN_02041674 -.extern FUN_020416A8 -.extern FUN_02041770 -.extern FUN_020417E0 -.extern FUN_02041808 -.extern FUN_0204185C -.extern FUN_0204188C -.extern FUN_0204190C -.extern FUN_02041970 -.extern FUN_020419F8 -.extern FUN_02041A80 -.extern FUN_02041AB4 -.extern FUN_02041AD4 -.extern FUN_02041AE0 -.extern FUN_02041B10 -.extern FUN_02041B40 -.extern FUN_02041B70 -.extern FUN_02041B9C -.extern FUN_02041BC4 -.extern FUN_02041BF0 -.extern FUN_02041C38 -.extern FUN_02041E40 -.extern FUN_02041FDC -.extern FUN_02042000 -.extern FUN_02042038 -.extern FUN_02042110 -.extern FUN_0204214C -.extern FUN_02042354 -.extern FUN_02042364 -.extern FUN_02042394 -.extern FUN_020423B0 -.extern FUN_02042700 -.extern FUN_02042780 -.extern FUN_020427A8 -.extern FUN_020427D0 -.extern FUN_02042864 -.extern FUN_02042894 -.extern FUN_020428E0 -.extern FUN_02042950 -.extern FUN_02042980 -.extern FUN_02042998 -.extern FUN_020429B8 -.extern FUN_020429E8 -.extern FUN_02042A18 -.extern FUN_02042A48 -.extern FUN_02042A98 -.extern FUN_02042B0C -.extern FUN_02042B40 -.extern FUN_02042B74 -.extern FUN_02042BA8 -.extern FUN_02042BDC -.extern FUN_02042C10 -.extern FUN_02042C44 -.extern FUN_02042C8C -.extern FUN_02042CBC -.extern FUN_02042D1C -.extern FUN_0204387C -.extern FUN_020438D0 -.extern FUN_02043918 -.extern FUN_020439B4 -.extern FUN_02043A44 -.extern FUN_02043A94 -.extern FUN_02043AAC -.extern FUN_02043ACC -.extern FUN_02043AFC -.extern FUN_02043B28 -.extern FUN_02043B54 -.extern FUN_02043B84 -.extern FUN_02043BD0 -.extern FUN_02043C28 -.extern FUN_02043C6C -.extern FUN_02043C90 -.extern FUN_02043CB4 -.extern FUN_02043CE4 -.extern FUN_02043D28 -.extern FUN_02043D78 -.extern FUN_02043DC8 -.extern FUN_02043DE0 -.extern FUN_02043E00 -.extern FUN_02043E20 -.extern FUN_02043E50 -.extern FUN_02043E68 -.extern FUN_02043E9C -.extern FUN_02043EFC -.extern FUN_02043F50 -.extern FUN_02043FA0 -.extern FUN_02043FF4 -.extern FUN_02044034 -.extern FUN_020440C0 -.extern FUN_020440F0 -.extern FUN_02044120 -.extern FUN_02044138 -.extern FUN_0204413C -.extern FUN_02044140 -.extern FUN_02044158 -.extern FUN_0204416C -.extern FUN_02044198 -.extern FUN_020442BC -.extern FUN_0204434C -.extern FUN_020443A8 -.extern FUN_02044414 -.extern FUN_0204449C -.extern FUN_020444F4 -.extern FUN_02044598 -.extern FUN_02044658 -.extern FUN_0204469C -.extern FUN_02044730 -.extern FUN_0204478C -.extern FUN_02044800 -.extern FUN_0204488C -.extern FUN_020448D4 -.extern FUN_020449A4 -.extern FUN_02044A0C -.extern FUN_02044A6C -.extern FUN_02044A94 -.extern FUN_02044B00 -.extern FUN_02044B2C -.extern FUN_02044B84 -.extern FUN_02044C0C -.extern FUN_02044C88 -.extern FUN_02044CE0 -.extern FUN_02044D44 -.extern FUN_02044D8C -.extern FUN_02044E34 -.extern FUN_02044E78 -.extern FUN_02044ED8 -.extern FUN_02044F20 -.extern FUN_02044F58 -.extern FUN_02044FE8 -.extern FUN_0204505C -.extern FUN_02045104 -.extern FUN_02045170 -.extern FUN_020451D0 -.extern FUN_02045264 -.extern FUN_02045268 -.extern FUN_020452B4 -.extern FUN_02045308 -.extern FUN_02045398 -.extern FUN_0204539C -.extern FUN_020453A0 -.extern FUN_020453F4 -.extern FUN_02045424 -.extern FUN_02045438 -.extern FUN_02045468 -.extern FUN_02045484 -.extern FUN_020454CC -.extern FUN_02045500 -.extern FUN_0204552C -.extern FUN_0204557C -.extern FUN_02045590 -.extern FUN_020455BC -.extern FUN_020455D0 -.extern FUN_020455E4 -.extern FUN_02045610 -.extern FUN_02045624 -.extern FUN_02045638 -.extern FUN_02045664 -.extern FUN_02045678 -.extern FUN_020456D4 -.extern FUN_0204572C -.extern FUN_02045784 -.extern FUN_020457DC -.extern FUN_02045834 -.extern FUN_0204588C -.extern FUN_020458E4 -.extern FUN_02045918 -.extern FUN_02045950 -.extern FUN_02045954 -.extern FUN_02045958 -.extern FUN_020459AC -.extern FUN_020459E8 -.extern FUN_02045A3C -.extern FUN_02045A78 -.extern FUN_02045ACC -.extern FUN_02045B08 -.extern FUN_02045B44 -.extern FUN_02045B80 -.extern FUN_02045BC8 -.extern FUN_02045C04 -.extern FUN_02045C40 -.extern FUN_02045C7C -.extern FUN_02045CD4 -.extern FUN_02045D10 -.extern FUN_02045D4C -.extern FUN_02045D88 -.extern FUN_02045DD0 -.extern FUN_02045E1C -.extern FUN_02045E20 -.extern FUN_02045EE0 -.extern FUN_02045EE4 -.extern FUN_02045F24 -.extern FUN_02045F84 -.extern FUN_02045F88 -.extern FUN_02045FCC -.extern FUN_02046010 -.extern FUN_0204601C -.extern FUN_02046028 -.extern FUN_0204602C -.extern FUN_02046030 -.extern FUN_020462AC -.extern FUN_020462B8 -.extern FUN_020462E4 -.extern FUN_0204630C -.extern FUN_02046338 -.extern FUN_02046380 -.extern FUN_020463CC -.extern FUN_020463EC -.extern FUN_0204640C -.extern FUN_02046420 -.extern FUN_0204646C -.extern FUN_0204647C -.extern FUN_0204649C -.extern FUN_020464A4 -.extern FUN_02046500 -.extern FUN_02046528 -.extern FUN_0204652C -.extern FUN_02046530 -.extern FUN_02046534 -.extern FUN_02046DB4 -.extern FUN_02046E18 -.extern FUN_02046FA0 -.extern FUN_020470AC -.extern FUN_020470E8 -.extern FUN_02047174 -.extern FUN_020480B8 -.extern FUN_020480C8 -.extern FUN_020480D8 -.extern FUN_02048498 -.extern FUN_02048694 -.extern FUN_02048C58 -.extern FUN_02048D90 -.extern FUN_02048EC8 -.extern FUN_02048FC8 -.extern FUN_02049240 -.extern FUN_02049274 -.extern FUN_02049EA4 -.extern FUN_02049F98 -.extern FUN_02049FFC -.extern FUN_0204A048 -.extern FUN_0204A0C8 -.extern FUN_0204A120 -.extern FUN_0204A20C -.extern FUN_0204A248 -.extern FUN_0204A32C -.extern FUN_0204A6E0 -.extern FUN_0204AB20 -.extern FUN_0204AB58 -.extern FUN_0204ABA8 -.extern FUN_0204ABDC -.extern FUN_0204AD0C -.extern FUN_0204ADBC -.extern FUN_0204ADE0 -.extern FUN_0204AF3C -.extern FUN_0204AF84 -.extern FUN_0204B2A4 -.extern FUN_0204B2B4 -.extern FUN_0204B2C0 -.extern FUN_0204B2D8 -.extern FUN_0204B33C -.extern FUN_0204B4FC -.extern FUN_0204B57C -.extern FUN_0204B5A8 -.extern FUN_0204B5FC -.extern FUN_0204B63C -.extern FUN_0204B660 -.extern FUN_0204B684 -.extern FUN_0204B6A4 -.extern FUN_0204B9A0 -.extern FUN_0204B9CC -.extern FUN_0204B9EC -.extern FUN_0204BA1C -.extern FUN_0204BAB0 -.extern FUN_0204BAC4 -.extern FUN_0204BAD4 -.extern FUN_0204BAE4 -.extern FUN_0204BEC8 -.extern FUN_0204BED0 -.extern FUN_0204BED8 -.extern FUN_0204C104 -.extern FUN_0204C1A8 -.extern FUN_0204D6C0 -.extern FUN_0204E2FC -.extern FUN_0204F6DC -.extern FUN_0204FF5C -.extern FUN_02050024 -.extern FUN_02050048 -.extern FUN_020524CC -.extern FUN_02052544 -.extern FUN_02052604 -.extern FUN_02052608 -.extern FUN_02052648 -.extern FUN_0205265C -.extern FUN_02052714 -.extern FUN_02052718 -.extern FUN_020527A8 -.extern FUN_020527D8 -.extern FUN_0205296C -.extern FUN_02052A10 -.extern FUN_02052B74 -.extern FUN_02052C0C -.extern FUN_02052CD8 -.extern FUN_02052D08 -.extern FUN_02052DE8 -.extern FUN_02052E10 -.extern FUN_02052F74 -.extern FUN_020534DC -.extern FUN_0205363C -.extern FUN_02053678 -.extern FUN_020536D0 -.extern FUN_020545B8 -.extern FUN_02054608 -.extern FUN_02054658 -.extern FUN_020546C8 -.extern FUN_020547A4 -.extern FUN_02054C14 -.extern FUN_02054CB0 -.extern FUN_02054CC8 -.extern FUN_02054D1C -.extern FUN_02054DEC -.extern FUN_02054E30 -.extern FUN_02054F50 -.extern FUN_0205502C -.extern FUN_020552F8 -.extern FUN_02055304 -.extern FUN_02055320 -.extern FUN_0205532C -.extern FUN_020553A0 -.extern FUN_020553C4 -.extern FUN_020553D4 -.extern FUN_020553E8 -.extern FUN_02055468 -.extern FUN_02055474 -.extern FUN_02055488 -.extern FUN_02055560 -.extern FUN_02055720 -.extern FUN_020557F4 -.extern FUN_02055A38 -.extern FUN_02055B14 -.extern FUN_02055B30 -.extern FUN_02055B8C -.extern FUN_0205753C -.extern FUN_020575D4 -.extern FUN_02057654 -.extern FUN_02057688 -.extern FUN_02057800 -.extern FUN_0205785C -.extern FUN_02057BAC -.extern FUN_02058060 -.extern FUN_020580B4 -.extern FUN_02058448 -.extern FUN_02058458 -.extern FUN_02058480 -.extern FUN_02058488 -.extern FUN_02058510 -.extern FUN_02058738 -.extern FUN_02058780 -.extern FUN_020587B0 -.extern FUN_02058854 -.extern FUN_0205889C -.extern FUN_020588B8 -.extern FUN_020588D4 -.extern FUN_02058908 -.extern FUN_02058914 -.extern FUN_02058994 -.extern FUN_02058B2C -.extern FUN_02058B4C -.extern FUN_02058B7C -.extern FUN_02058BB4 -.extern FUN_02058BE4 -.extern FUN_02058D74 -.extern FUN_02058E28 -.extern FUN_02058E90 -.extern FUN_02058EB0 -.extern FUN_02059D1C -.extern FUN_02059E74 -.extern FUN_0205AE28 -.extern FUN_0205AEA4 -.extern FUN_0205AEF0 -.extern FUN_0205AEFC -.extern FUN_0205CA4C -.extern FUN_0205CA64 -.extern FUN_0205CA78 -.extern FUN_0205CE48 -.extern FUN_0205CE80 -.extern FUN_0205DD18 -.extern FUN_0205DD38 -.extern FUN_0205DD40 -.extern FUN_0205E7C4 -.extern FUN_0205ECD4 -.extern FUN_0205ECE0 -.extern FUN_0205ECFC -.extern FUN_0205ED0C -.extern FUN_0205ED1C -.extern FUN_0205ED2C -.extern FUN_0205ED3C -.extern FUN_0205ED4C -.extern FUN_0205ED5C -.extern FUN_0205ED6C -.extern FUN_0205F1C4 -.extern FUN_0205F1D4 -.extern FUN_0205F1F4 -.extern FUN_0205F204 -.extern FUN_0205F214 -.extern FUN_0205F224 -.extern FUN_0205F234 -.extern FUN_0205F244 -.extern FUN_0205F264 -.extern FUN_0205F274 -.extern FUN_0205F284 -.extern FUN_0205F294 -.extern FUN_0205F2A4 -.extern FUN_0205F2B4 -.extern FUN_0205F2C4 -.extern FUN_0205F2D4 -.extern FUN_0205F2E4 -.extern FUN_0205F368 -.extern FUN_0205F378 -.extern FUN_0205F388 -.extern FUN_0205F398 -.extern FUN_0205F3C0 -.extern FUN_0205F3F8 -.extern FUN_0205F478 -.extern FUN_0205F4A0 -.extern FUN_0205F4E4 -.extern FUN_0205F50C -.extern FUN_0205F524 -.extern FUN_0205F54C -.extern FUN_0205F55C -.extern FUN_0205F594 -.extern FUN_0205F5A4 -.extern FUN_0205F5D8 -.extern FUN_0205F5FC -.extern FUN_0205F648 -.extern FUN_0205F668 -.extern FUN_0205F688 -.extern FUN_0205F698 -.extern FUN_0205F6A8 -.extern FUN_0205F6C8 -.extern FUN_0205F6D8 -.extern FUN_0205F710 -.extern FUN_0205F720 -.extern FUN_0205F740 -.extern FUN_0205F760 -.extern FUN_0205F7A0 -.extern FUN_0205FD38 -.extern FUN_0205FDDC -.extern FUN_0205FE10 -.extern FUN_0205FF5C -.extern FUN_02060144 -.extern FUN_0206015C -.extern FUN_02060490 -.extern FUN_02060790 -.extern FUN_020607D4 -.extern FUN_02060F3C -.extern FUN_02060F88 -.extern FUN_02060F9C -.extern FUN_02060FD0 -.extern FUN_020612EC -.extern FUN_020612F8 -.extern FUN_02061374 -.extern FUN_020613CC -.extern FUN_02061460 -.extern FUN_02061574 -.extern FUN_02061A8C -.extern FUN_02063650 -.extern FUN_0206367C -.extern FUN_02063888 -.extern FUN_020638BC -.extern FUN_02063948 -.extern FUN_02063964 -.extern FUN_0206486C -.extern FUN_020649B0 -.extern FUN_020649D4 -.extern FUN_02064CA8 -.extern FUN_02064CC8 -.extern FUN_02064D10 -.extern FUN_02064D4C -.extern FUN_02064D88 -.extern FUN_02064E20 -.extern FUN_02064E60 -.extern FUN_02064E90 -.extern FUN_02065054 -.extern FUN_02065070 -.extern FUN_02065078 -.extern FUN_02065314 -.extern FUN_02065344 -.extern FUN_02066818 -.extern FUN_02066978 -.extern FUN_020669A0 -.extern FUN_020669C0 -.extern FUN_020669D4 -.extern FUN_02066A20 -.extern FUN_02066ACC -.extern FUN_02066ED8 -.extern FUN_020671BC -.extern FUN_020672BC -.extern FUN_02067830 -.extern FUN_02068678 -.extern FUN_02068854 -.extern FUN_020689E0 -.extern FUN_02068AAC -.extern FUN_02068B68 -.extern FUN_02068C00 -.extern FUN_02068E14 -.extern FUN_020690C4 -.extern FUN_020690CC -.extern FUN_020690E4 -.extern FUN_02069168 -.extern FUN_020699A4 -.extern FUN_02069A64 -.extern FUN_02069B40 -.extern FUN_02069B88 -.extern FUN_0206A23C -.extern FUN_0206AC74 -.extern FUN_0206AD4C -.extern FUN_0206B20C -.extern FUN_0206B3E4 -.extern FUN_0206B484 -.extern FUN_0206B57C -.extern FUN_0206B5E4 -.extern FUN_0206B620 -.extern FUN_0206B644 -.extern FUN_0206B6C8 -.extern FUN_0206B7BC -.extern FUN_0206B900 -.extern FUN_0206B9AC -.extern FUN_0206B9B0 -.extern FUN_0206BAE4 -.extern FUN_0206BB1C -.extern FUN_0206BB28 -.extern FUN_0206C700 -.extern FUN_0206C91C -.extern FUN_0206C92C -.extern FUN_0206E2F0 -.extern FUN_0206E308 -.extern FUN_0206E314 -.extern FUN_0206E340 -.extern FUN_0206E354 -.extern FUN_0206E358 -.extern FUN_0206E360 -.extern FUN_0206E37C -.extern FUN_0206E384 -.extern FUN_0206E38C -.extern FUN_0206E7B8 -.extern FUN_0206EA30 -.extern FUN_0206EA98 -.extern FUN_0206EAB8 -.extern FUN_0206EB1C -.extern FUN_0206ED24 -.extern FUN_0206ED38 -.extern FUN_0206EDD4 -.extern FUN_0206EE50 -.extern FUN_0206EE64 -.extern FUN_0206EEF8 -.extern FUN_0206EFEC -.extern FUN_0206F158 -.extern FUN_0206F164 -.extern FUN_0206F17C -.extern FUN_0206F190 -.extern FUN_0206F3B8 -.extern FUN_0206F3D8 -.extern FUN_02077A84 -.extern FUN_02077AC4 -.extern FUN_02079C70 -.extern FUN_0207B000 -.extern FUN_0207C2A4 -.extern FUN_0207FC5C -.extern FUN_0207FCE0 -.extern FUN_0208089C -.extern FUN_02080C38 -.extern FUN_02080E0C -.extern FUN_02081214 -.extern FUN_020814E8 -.extern FUN_02081DC4 -.extern FUN_02081EB8 -.extern FUN_0208201C -.extern FUN_02082034 -.extern FUN_0208206C -.extern FUN_02082090 -.extern FUN_020820B8 -.extern FUN_020820DC -.extern FUN_0208210C -.extern FUN_0208213C -.extern FUN_02082140 -.extern FUN_02082158 -.extern FUN_0208217C -.extern FUN_02082190 -.extern FUN_020821B4 -.extern FUN_020821C4 -.extern FUN_020821DC -.extern FUN_020821F0 -.extern FUN_02082214 -.extern FUN_0208223C -.extern FUN_0208224C -.extern FUN_02082254 -.extern FUN_02082284 -.extern FUN_020822F0 -.extern FUN_02082444 -.extern FUN_02082508 -.extern FUN_020825A0 -.extern FUN_02082630 -.extern FUN_02085140 -.extern FUN_020851B8 -.extern FUN_020851DC -.extern FUN_020851F8 -.extern FUN_0208524C -.extern FUN_02085258 -.extern FUN_02085264 -.extern FUN_0208526C -.extern FUN_02085290 -.extern FUN_020852E8 -.extern FUN_02085338 -.extern FUN_020853A8 -.extern FUN_020853B0 -.extern FUN_020853B4 -.extern FUN_020853BC -.extern FUN_020853E4 -.extern FUN_020853E8 -.extern FUN_020853EC -.extern FUN_020853F0 -.extern FUN_020853FC -.extern FUN_020854E0 -.extern FUN_02085538 -.extern FUN_02085578 -.extern FUN_020855B0 -.extern FUN_020855E4 -.extern FUN_0208560C -.extern FUN_0208562C -.extern FUN_02085F48 -.extern FUN_020863DC -.extern FUN_02087A1C -.extern FUN_02087A50 -.extern FUN_02087D00 -.extern FUN_02087E14 -.extern FUN_0208881C -.extern FUN_02088960 -.extern FUN_02088D40 -.extern FUN_02088DD8 -.extern FUN_02088DF0 -.extern FUN_02088DF8 -.extern FUN_02088EF8 -.extern FUN_02089D90 -.extern FUN_0208A0B8 -.extern FUN_0208A300 -.extern FUN_0208A320 -.extern FUN_0208A338 -.extern FUN_0208A9B8 -.extern FUN_0208ACEC -.extern FUN_0208AD80 -.extern FUN_0208AF80 -.extern FUN_0208AF94 -.extern FUN_0208AFA8 -.extern FUN_0208B05C -.extern FUN_0208B128 -.extern FUN_0208B4A0 -.extern FUN_02090CC8 -.extern FUN_02090DB8 -.extern FUN_02096B14 -.extern FUN_02096B78 -.extern FUN_02096CCC -.extern FUN_02096D2C -.extern FUN_02096DA0 -.extern FUN_02096F18 -.extern FUN_02096F80 -.extern FUN_02096FB0 -.extern FUN_0209700C -.extern FUN_020973B4 -.extern FUN_020ADA84 -.extern FUN_020ADA98 -.extern FUN_020ADAB0 -.extern FUN_020ADB18 -.extern FUN_020ADBE8 -.extern FUN_020ADC74 -.extern FUN_020ADDC0 -.extern FUN_020ADDC8 -.extern FUN_020ADDF0 -.extern FUN_020ADE2C -.extern FUN_020AE554 -.extern FUN_020AE5B0 -.extern FUN_020AE600 -.extern FUN_020AE638 -.extern FUN_020AE684 -.extern FUN_020AE82C -.extern FUN_020AE84C -.extern FUN_020AE868 -.extern FUN_020AE8CC -.extern FUN_020AE918 -.extern FUN_020AEB70 -.extern FUN_020AEC7C -.extern FUN_020AEC98 -.extern FUN_020AEE40 -.extern FUN_020AEEB8 -.extern FUN_020AEF1C -.extern FUN_020AF2E0 -.extern FUN_020AF2F4 -.extern FUN_020AF30C -.extern FUN_020AF894 -.extern FUN_020AF9C4 -.extern FUN_020AFA28 -.extern FUN_020AFA80 -.extern FUN_020AFBA8 -.extern FUN_020AFBFC -.extern FUN_020AFC04 -.extern FUN_020AFEB8 -.extern FUN_020AFFD8 -.extern FUN_020B0030 -.extern FUN_020B0088 -.extern FUN_020B00F0 -.extern FUN_020B0138 -.extern FUN_020B0180 -.extern FUN_020B0250 -.extern FUN_020B02C8 -.extern FUN_020B0448 -.extern FUN_020B0870 -.extern FUN_020B0BB0 -.extern FUN_020B0C7C -.extern FUN_020B0E34 -.extern FUN_020B0FC0 -.extern FUN_020B10E8 -.extern FUN_020B1240 -.extern FUN_020B1340 -.extern FUN_020B1528 -.extern FUN_020B1768 -.extern FUN_020B19C4 -.extern FUN_020B19DC -.extern FUN_020B1A14 -.extern FUN_020B1A24 -.extern FUN_020B1EA4 -.extern FUN_020B1EC4 -.extern FUN_020B1EE4 -.extern FUN_020B1EFC -.extern FUN_020B1F80 -.extern FUN_020B20C8 -.extern FUN_020B2194 -.extern FUN_020B224C -.extern FUN_020B23D8 -.extern FUN_020B242C -.extern FUN_020B2794 -.extern FUN_020B28B4 -.extern FUN_020B2A08 -.extern FUN_020B2B08 -.extern FUN_020B2B58 -.extern FUN_020B2D9C -.extern FUN_020B317C -.extern FUN_020B31F0 -.extern FUN_020B326C -.extern FUN_020B3334 -.extern FUN_020B3390 -.extern FUN_020B33A0 -.extern FUN_020B4358 -.extern FUN_020B43A4 -.extern FUN_020B442C -.extern FUN_020B4568 -.extern FUN_020B4F38 -.extern FUN_020B502C -.extern FUN_020B772C -.extern FUN_020B7790 -.extern FUN_020B7C58 -.extern FUN_020B7C78 -.extern FUN_020B7CDC -.extern FUN_020B7CE4 -.extern FUN_020B7CF0 -.extern FUN_020B7D28 -.extern FUN_020B7DFC -.extern FUN_020B7E10 -.extern FUN_020B7E1C -.extern FUN_020B80B4 -.extern FUN_020B844C -.extern FUN_020B8474 -.extern FUN_020B849C -.extern FUN_020BAC98 -.extern FUN_020BAFB8 -.extern FUN_020BB1C0 -.extern FUN_020BB394 -.extern FUN_020BB59C -.extern FUN_020BB7F4 -.extern FUN_020BC0FC -.extern FUN_020BC13C -.extern FUN_020BC2A0 -.extern FUN_020C0174 -.extern FUN_020C01A0 -.extern FUN_020C01D0 -.extern FUN_020C03B8 -.extern FUN_020C041C -.extern FUN_020C044C -.extern FUN_020C04DC -.extern FUN_020C0510 -.extern FUN_020C054C -.extern FUN_020C0670 -.extern FUN_020C0688 -.extern FUN_020C0DD4 -.extern FUN_020C0E14 -.extern FUN_020C0E7C -.extern FUN_020C0EA4 -.extern FUN_020C0EF4 -.extern FUN_020C0F30 -.extern FUN_020C0F50 -.extern FUN_020C0F68 -.extern FUN_020C0F80 -.extern FUN_020C0F8C -.extern FUN_020C0F9C -.extern FUN_020C0FDC -.extern FUN_020C1040 -.extern FUN_020C10A4 -.extern FUN_020C1148 -.extern FUN_020C1180 -.extern FUN_020C1E58 -.extern FUN_020C1E68 -.extern FUN_020C1EA4 -.extern FUN_020C1F54 -.extern FUN_020C1FA4 -.extern FUN_020C1FF0 -.extern FUN_020C20DC -.extern FUN_020C2104 -.extern FUN_020C217C -.extern FUN_020C226C -.extern FUN_020C22D0 -.extern FUN_020C23FC -.extern FUN_020C26F8 -.extern FUN_020C2828 -.extern FUN_020C290C -.extern FUN_020C2A94 -.extern FUN_020C35E0 -.extern FUN_020C360C -.extern FUN_020C3640 -.extern FUN_020C3674 -.extern FUN_020C36A8 -.extern FUN_020C3910 -.extern FUN_020C3980 -.extern FUN_020C39CC -.extern MTX_Rot22_ -.extern MTX_ScaleApply22 -.extern FUN_020C6034 -.extern FUN_020C605C -.extern FUN_021D74E0 -.extern FUN_021D76AC -.extern FUN_021D77C4 -.extern FUN_021D7800 -.extern FUN_021D78FC -.extern FUN_021D79B4 -.extern FUN_021D7CA4 -.extern FUN_021D7F8C -.extern FUN_021D8018 -.extern FUN_021D8164 -.extern FUN_021D82BC -.extern FUN_021D8320 -.extern FUN_021D836C -.extern FUN_021D83A8 -.extern FUN_021D83C0 -.extern FUN_021D844C -.extern FUN_021D8494 -.extern FUN_021D85FC -.extern FUN_021D8624 -.extern FUN_021D865C -.extern FUN_021D8758 -.extern FUN_021D8820 -.extern FUN_021D88E4 -.extern FUN_021D89CC -.extern FUN_021D8B64 -.extern FUN_021D8C24 -.extern FUN_021D917C -.extern FUN_021D959C -.extern FUN_021D967C -.extern FUN_021D96F4 -.extern FUN_021D9708 -.extern FUN_021D971C -.extern FUN_021D9820 -.extern FUN_021D99F8 -.extern FUN_021DA464 -.extern FUN_021DA4EC -.extern FUN_021DA54C -.extern FUN_021DA58C -.extern FUN_021DA5B8 -.extern FUN_021DA5C8 -.extern FUN_021DA5D0 -.extern FUN_021DA5D8 -.extern FUN_021DA7B4 -.extern FUN_021DAAA4 -.extern FUN_021DAC70 -.extern FUN_021DAE40 -.extern FUN_021DAED4 -.extern FUN_021DAF28 -.extern FUN_021DAF78 -.extern FUN_021DAF98 -.extern FUN_021DB030 -.extern FUN_021DB7E8 -.extern FUN_021DB858 -.extern FUN_021DC174 -.extern FUN_021DD6F0 -.extern FUN_021DD718 -.extern FUN_021DDB08 -.extern FUN_021E1374 -.extern FUN_021E1858 -.extern FUN_021E1994 -.extern FUN_021E1BF8 -.extern FUN_021E1C4C -.extern FUN_021E1C54 -.extern FUN_021E1ECC -.extern FUN_021E1F34 -.extern FUN_021E1F58 -.extern FUN_021E1F60 -.extern FUN_021E2464 -.extern FUN_021E2608 -.extern FUN_021E26CC -.extern FUN_021E27E8 -.extern FUN_021E288C -.extern FUN_021E28A0 -.extern FUN_021E2950 -.extern FUN_021E29B4 -.extern FUN_021E29C8 -.extern FUN_021E2A70 -.extern FUN_021E2AD4 -.extern FUN_021E2B80 -.extern FUN_021E2B9C -.extern FUN_021E2BB8 -.extern FUN_021E2BD0 -.extern FUN_021E2C24 -.extern FUN_021E2C58 -.extern FUN_021E2CBC -.extern FUN_021E32F0 -.extern FUN_021E331C -.extern FUN_021E3424 -.extern FUN_021E3444 -.extern FUN_021E495C -.extern FUN_021E4C54 -.extern FUN_021E4C60 -.extern FUN_021E4DE4 -.extern FUN_021E5614 -.extern FUN_021E57D4 -.extern FUN_021E5970 -.extern FUN_021E5B30 -.extern FUN_021E5FD8 -.extern FUN_021E5FE0 -.extern FUN_021E6410 -.extern FUN_021E643C -.extern FUN_021E6990 -.extern FUN_021E69BC -.extern FUN_021E6BF4 -.extern FUN_021E7030 -.extern FUN_021E70F0 -.extern FUN_021E7138 -.extern FUN_021E7184 -.extern FUN_021E71E8 -.extern FUN_021E7750 -.extern FUN_021E799C -.extern FUN_021E7AC0 -.extern FUN_021E7EA0 -.extern FUN_021E7EB0 -.extern FUN_021E7EC4 -.extern FUN_021E7EC8 -.extern FUN_021E7ED0 -.extern FUN_021E7ED8 -.extern FUN_021E7FBC -.extern FUN_021E8128 -.extern FUN_021E8130 -.extern FUN_021E8140 -.extern FUN_021E8144 -.extern FUN_021E8148 -.extern FUN_021E8158 -.extern FUN_021E81BC -.extern FUN_021E84F4 -.extern FUN_021E856C -.extern FUN_021E8588 -.extern FUN_021E85E4 -.extern FUN_021E85FC -.extern FUN_021EAE90 -.extern FUN_021EB044 -.extern FUN_021EC57C -.extern FUN_021EC71C -.extern FUN_021EC854 -.extern FUN_021EC864 -.extern FUN_021ECD64 -.extern FUN_021ECF14 -.extern FUN_021ED0CC -.extern FUN_021ED49C -.extern FUN_021ED4E0 -.extern FUN_021ED52C -.extern FUN_021ED5C4 -.extern FUN_021ED5EC -.extern FUN_021ED644 -.extern FUN_021ED940 -.extern FUN_021EDA48 -.extern FUN_021EDBC8 -.extern FUN_021EF5E0 -.extern FUN_021EF604 -.extern FUN_021EF620 -.extern FUN_021EF654 -.extern FUN_021EF824 -.extern FUN_021EF844 -.extern FUN_021EF8C8 -.extern FUN_021EF8DC -.extern FUN_021EFA9C -.extern FUN_021F02C4 -.extern FUN_021F1D8C -.extern FUN_021F1DC8 -.extern FUN_021F1DFC -.extern FUN_021F1EC0 -.extern FUN_021F1F78 -.extern FUN_021F2094 -.extern FUN_021F20D8 -.extern FUN_021F20F8 -.extern FUN_021F2AF4 -.extern FUN_021F2E0C -.extern FUN_021F2E28 -.extern FUN_021F2F48 -.extern FUN_021F2F6C -.extern FUN_021F3A18 -.extern FUN_021F3AB4 -.extern FUN_021F3B4C -.extern FUN_021F3B7C -.extern FUN_021F3DA4 -.extern FUN_021F44D8 -.extern FUN_021F4520 -.extern FUN_021F4568 -.extern FUN_021F4594 -.extern FUN_021F45E8 -.extern FUN_021F4608 -.extern FUN_021F4BD0 -.extern FUN_021F4C88 -.extern FUN_021F4D80 -.extern FUN_021F4DC8 -.extern FUN_021F4E7C -.extern FUN_021F57EC -.extern FUN_021F5C44 -.extern FUN_021F61DC -.extern FUN_021F61E8 -.extern FUN_02211E60 -.extern FUN_0222D5C0 -.extern FUN_0222DAEC -.extern FUN_0222DD1C -.extern FUN_0222DD38 -.extern FUN_0222E2BC -.extern FUN_0222E360 -.extern FUN_0222E3A0 -.extern FUN_0222E7E8 -.extern FUN_0222E874 -.extern FUN_0222ED34 -.extern FUN_0222EDBC -.extern FUN_0222F440 -.extern FUN_0222F480 -.extern FUN_0222F7E0 -.extern FUN_0222F990 -.extern FUN_022300D4 -.extern FUN_022300DC -.extern FUN_022300E4 -.extern FUN_022300E8 -.extern FUN_022300F4 -.extern FUN_02230100 -.extern FUN_0223010C -.extern FUN_02230118 -.extern FUN_02230124 -.extern FUN_02230F3C -.extern FUN_02230F70 -.extern FUN_02230F80 -.extern FUN_02231344 -.extern FUN_02231350 -.extern FUN_0223135C -.extern FUN_02231368 -.extern FUN_02231374 -.extern FUN_02239944 -.extern FUN_02239AAC -.extern FUN_0223CACC -.extern FUN_0223CB08 -.extern FUN_0223CCDC -.extern FUN_0223CD7C -.extern FUN_0223D3D0 -.extern FUN_0223D638 -.extern FUN_0223D648 -.extern FUN_0223DFB4 -.extern FUN_0223E060 -.extern FUN_0223E118 -.extern FUN_0223E154 -.extern FUN_0223E1A4 -.extern FUN_0223E1E0 -.extern FUN_0223E2AC -.extern FUN_0223E4A8 -.extern FUN_0223E4D4 -.extern FUN_0223E554 -.extern FUN_0223E6B8 -.extern FUN_0223E734 -.extern FUN_0223E7FC -.extern FUN_0223EB8C -.extern FUN_0223EF7C -.extern FUN_0223F4D8 -.extern FUN_0223F4F4 -.extern FUN_0223F8D8 -.extern FUN_0223FCE8 -.extern FUN_02240790 -.extern FUN_022407CC -.extern FUN_022407DC -.extern FUN_022407F8 -.extern FUN_02240834 -.extern FUN_02240844 -.extern FUN_0224089C -.extern FUN_022408FC -.extern FUN_022411F4 -.extern FUN_02241230 -.extern FUN_02241914 -.extern FUN_02242A38 -.extern FUN_02242BE0 -.extern FUN_0224312C -.extern FUN_022432E4 -.extern FUN_0224339C -.extern FUN_022433A8 -.extern FUN_022433B0 -.extern FUN_022433B8 -.extern FUN_022433F8 -.extern FUN_02243408 -.extern FUN_02243428 -.extern FUN_02243448 -.extern FUN_0224345C -.extern FUN_022434AC -.extern FUN_022434BC -.extern FUN_022434D0 -.extern FUN_02243694 -.extern FUN_022436C8 -.extern FUN_022436E8 -.extern FUN_02243780 -.extern FUN_02243838 -.extern FUN_022438DC -.extern FUN_022438E0 -.extern FUN_022438FC -.extern FUN_02243920 -.extern FUN_022439F8 -.extern FUN_02243AD8 -.extern FUN_02243BA8 -.extern FUN_02243C5C -.extern FUN_02243D3C -.extern FUN_02243DA0 -.extern FUN_02243DB8 -.extern FUN_02243DC0 -.extern FUN_02243DC4 -.extern FUN_02243DD8 -.extern FUN_02243DE0 -.extern FUN_02243E34 -.extern FUN_02243E74 -.extern FUN_02243F18 -.extern FUN_02243F50 -.extern FUN_02243F9C -.extern FUN_02244210 -.extern FUN_02244558 -.extern FUN_02244660 -.extern FUN_022446BC -.extern FUN_022446E0 -.extern FUN_022446FC -.extern FUN_02244758 -.extern FUN_02244770 -.extern FUN_02244824 -.extern FUN_0224484C -.extern FUN_02244D1C -.extern FUN_02244D20 -.extern FUN_02244D3C -.extern FUN_02244D40 -.extern FUN_02244D58 -.extern FUN_02244D98 -.extern FUN_02244DA0 -.extern FUN_02244DB0 -.extern FUN_02244DBC -.extern FUN_02244DC4 -.extern FUN_02244EF8 -.extern FUN_02244F18 -.extern FUN_02244F24 -.extern FUN_02244F2C -.extern FUN_02245088 -.extern FUN_02245114 -.extern FUN_02245190 -.extern FUN_02245198 -.extern FUN_022451F0 -.extern FUN_0224525C -.extern FUN_022452A4 -.extern FUN_02245324 -.extern FUN_02245340 -.extern FUN_02245358 -.extern FUN_0224566C -.extern FUN_022456E8 -.extern FUN_02245844 -.extern FUN_02245910 -.extern FUN_02245F1C -.extern FUN_02245F4C -.extern FUN_02245FA0 -.extern FUN_022461A4 -.extern FUN_022461B8 -.extern FUN_0224666C -.extern FUN_022466A0 -.extern FUN_022466AC -.extern FUN_02246F1C -.extern FUN_02247294 -.extern FUN_022472AC -.extern FUN_02247544 -.extern FUN_02247614 -.extern FUN_02247728 -.extern FUN_02247808 -.extern FUN_02247970 -.extern FUN_02247A34 -.extern FUN_022483BC -.extern FUN_022483E0 -.extern FUN_022483EC -.extern FUN_02248724 -.extern FUN_0224884C -.extern FUN_022488CC -.extern FUN_022488EC -.extern FUN_022488F4 -.extern FUN_022488FC -.extern FUN_0224891C -.extern FUN_02248B54 -.extern FUN_02248B58 -.extern FUN_02248B5C -.extern FUN_02248B60 -.extern FUN_02248B6C -.extern FUN_02248CC0 -.extern FUN_02248CD0 -.extern FUN_02248DF8 -.extern FUN_02248F70 -.extern FUN_02248FE0 -.extern FUN_02249038 -.extern FUN_022490A0 -.extern FUN_022491FC -.extern FUN_022494C8 -.extern FUN_02249508 -.extern FUN_02249668 -.extern FUN_022497E8 -.extern FUN_02249E6C -.extern FUN_02249E78 -.extern FUN_02249E84 -.extern FUN_02249E90 -.extern FUN_0224A310 -.extern FUN_0224A528 -.extern FUN_0224A7C8 -.extern FUN_0224ABAC -.extern FUN_0224B124 -.extern FUN_0224B2C4 -.extern FUN_0224B568 -.extern FUN_0224B818 -.extern FUN_0224B86C -.extern FUN_0224B9E0 -.extern FUN_0224BBEC -.extern FUN_0224BD90 -.extern FUN_0224C038 -.extern FUN_0224C27C -.extern FUN_0224C520 -.extern FUN_0224C678 -.extern FUN_0224C6E8 -.extern FUN_0224C6F4 -.extern FUN_0224C700 -.extern FUN_0224C8C8 -.extern FUN_0224CA2C -.extern FUN_0224CA54 -.extern FUN_0224CA58 -.extern FUN_0224CA88 -.extern FUN_0224CA94 -.extern FUN_0224CAA0 -.extern FUN_0224CAB4 -.extern FUN_0224CB30 -.extern FUN_0224CBB0 -.extern FUN_0224CC24 -.extern FUN_0224CECC -.extern FUN_0224D14C -.extern FUN_0224D2E0 -.extern FUN_0224D3E8 -.extern FUN_0224D70C -.extern FUN_0224D76C -.extern FUN_0224D79C -.extern FUN_0224DCB8 -.extern FUN_0224DD94 -.extern FUN_0224DDB8 -.extern FUN_0224E554 -.extern FUN_0224E764 -.extern FUN_0224E7C4 -.extern FUN_0224F12C -.extern FUN_02252534 -.extern FUN_02252538 -.extern FUN_022567E0 -.extern FX_Div -.extern FX_GetDivResult -.extern FX_GetDivResultFx64c -.extern FX_Init -.extern FX_InvAsync -.extern FX_Atan2 -.extern FX_Sqrt -.extern G2S_GetBG0CharPtr -.extern G2S_GetBG1CharPtr -.extern G2S_GetBG2CharPtr -.extern G2S_GetBG3CharPtr -.extern G2_GetBG0CharPtr -.extern G2_GetBG1CharPtr -.extern G2_GetBG2CharPtr -.extern G2_GetBG3CharPtr -.extern G2x_SetBGyAffine_ -.extern G2x_SetBlendAlpha_ -.extern G2x_SetBlendBrightness_ -.extern G3X_GetBoxTestResult -.extern G3X_GetClipMtx -.extern G3X_GetVectorMtx -.extern G3X_Init -.extern G3X_InitMtxStack -.extern G3X_ResetMtxStack -.extern G3X_SetClearColor -.extern G3X_SetFog -.extern G3_LoadMtx43 -.extern G3_MultMtx33 -.extern G3_MultMtx43 -.extern G3_RotX -.extern G3_RotY -.extern G3_RotZ -.extern G3i_LookAt_ -.extern G3i_OrthoW_ -.extern G3i_PerspectiveW_ -.extern GXS_BeginLoadBGExtPltt -.extern GXS_BeginLoadOBJExtPltt -.extern GXS_EndLoadBGExtPltt -.extern GXS_EndLoadOBJExtPltt -.extern GXS_LoadBG0Char -.extern GXS_LoadBG0Scr -.extern GXS_LoadBG1Char -.extern GXS_LoadBG1Scr -.extern GXS_LoadBG2Char -.extern GXS_LoadBG2Scr -.extern GXS_LoadBG3Char -.extern GXS_LoadBG3Scr -.extern GXS_LoadBGExtPltt -.extern GXS_LoadBGPltt -.extern GXS_LoadOAM -.extern GXS_LoadOBJ -.extern GXS_LoadOBJExtPltt -.extern GXS_LoadOBJPltt -.extern GXS_SetGraphicsMode -.extern GX_BeginLoadBGExtPltt -.extern GX_BeginLoadClearImage -.extern GX_BeginLoadOBJExtPltt -.extern GX_BeginLoadTex -.extern GX_BeginLoadTexPltt -.extern GX_DisableBankForLCDC -.extern GX_DispOff -.extern GX_DispOn -.extern GX_EndLoadBGExtPltt -.extern GX_EndLoadClearImage -.extern GX_EndLoadOBJExtPltt -.extern GX_EndLoadTex -.extern GX_EndLoadTexPltt -.extern GX_GetBankForOBJ -.extern GX_GetBankForOBJExtPltt -.extern GX_GetBankForSubOBJ -.extern GX_GetBankForSubOBJExtPltt -.extern GX_HBlankIntr -.extern GX_Init -.extern GX_LoadBG0Char -.extern GX_LoadBG0Scr -.extern GX_LoadBG1Char -.extern GX_LoadBG1Scr -.extern GX_LoadBG2Char -.extern GX_LoadBG2Scr -.extern GX_LoadBG3Char -.extern GX_LoadBG3Scr -.extern GX_LoadBGExtPltt -.extern GX_LoadBGPltt -.extern GX_LoadClearImageColor -.extern GX_LoadClearImageDepth -.extern GX_LoadOAM -.extern GX_LoadOBJ -.extern GX_LoadOBJExtPltt -.extern GX_LoadOBJPltt -.extern GX_LoadTex -.extern GX_LoadTexPltt -.extern GX_ResetBankForBG -.extern GX_ResetBankForBGExtPltt -.extern GX_ResetBankForOBJ -.extern GX_ResetBankForOBJExtPltt -.extern GX_ResetBankForSubBG -.extern GX_ResetBankForSubOBJ -.extern GX_ResetBankForTex -.extern GX_ResetBankForTexPltt -.extern GX_SetBankForBG -.extern GX_SetBankForBGExtPltt -.extern GX_SetBankForLCDC -.extern GX_SetBankForOBJ -.extern GX_SetBankForOBJExtPltt -.extern GX_SetBankForSubBG -.extern GX_SetBankForSubBGExtPltt -.extern GX_SetBankForSubOBJ -.extern GX_SetBankForSubOBJExtPltt -.extern GX_SetBankForTex -.extern GX_SetBankForTexPltt -.extern GX_SetGraphicsMode -.extern GX_VBlankIntr -.extern GXx_SetMasterBrightness_ -.extern IC_InvalidateAll -.extern IC_InvalidateRange -.extern InitGraphicMemory -.extern InitScriptContext -.extern InitSystemForTheGame -.extern LoadFromNARC -.extern LoadFromNARC_7 -.extern LoadFromNarc_2 -.extern LoadPlayerDataAddress -.extern MATH_CalcCRC16 -.extern MATH_CalcCRC16CCITT -.extern MATH_CalcCRC32 -.extern MATH_CalcCRC8 -.extern MATH_CalcHMACSHA1 -.extern MATH_CalcMD5 -.extern MATH_CalcSHA1 -.extern MATH_CountPopulation -.extern MATH_MD5GetHash -.extern MATH_MD5Init -.extern MATH_MD5Update -.extern MATH_SHA1GetHash -.extern MATH_SHA1Init -.extern MATH_SHA1Update -.extern MATHi_CRC16InitTable -.extern MATHi_CRC16InitTableRev -.extern MATHi_CRC32InitTableRev -.extern MATHi_CRC8InitTable -.extern MATHi_CalcHMAC -.extern MIC_DoSamplingAsync -.extern MIC_Init -.extern MIC_StartAutoSampling -.extern MIC_StopAutoSampling -.extern MI_Copy36B -.extern MI_Copy48B -.extern MI_Copy64B -.extern MI_CpuCopy8 -.extern MI_CpuFill8 -.extern MI_DmaCopy16 -.extern MI_DmaCopy32 -.extern MI_DmaCopy32Async -.extern MI_DmaFill32 -.extern MI_DmaFill32Async -.extern MI_HBlankDmaCopy16 -.extern MI_HBlankDmaCopy32 -.extern MI_Init -.extern MI_SendGXCommandAsync -.extern MI_SendGXCommandAsyncFast -.extern MI_StopDma -.extern MI_SwapWord -.extern MI_UncompressLZ8 -.extern MI_WaitDma -.extern MI_Zero36B -.extern MIi_CardDmaCopy32 -.extern MIi_CheckDma0SourceAddress -.extern MIi_CpuClear16 -.extern MIi_CpuClear32 -.extern MIi_CpuClearFast -.extern MIi_CpuCopy16 -.extern MIi_CpuCopy32 -.extern MIi_CpuCopyFast -.extern MIi_CpuSend32 -.extern MIi_DmaSetParams -.extern MIi_DmaSetParams_noInt -.extern MIi_DmaSetParams_wait -.extern MIi_DmaSetParams_wait_noInt -.extern MIi_UncompressBackward -.extern MTX_Concat33 -.extern MTX_Concat43 -.extern MTX_Identity33_ -.extern MTX_Identity43_ -.extern MTX_MultVec33 -.extern MTX_MultVec43 -.extern MTX_RotX33_ -.extern MTX_RotY33_ -.extern MTX_RotZ33_ -.extern MTX_Scale43_ -.extern NitroMain -.extern OS_AllocFromArenaHi -.extern OS_AllocFromArenaLo -.extern OS_AllocFromHeap -.extern OS_CancelAlarm -.extern OS_CreateAlarm -.extern OS_CreateThread -.extern OS_DestroyThread -.extern OS_DisableInterrupts -.extern OS_DisableIrqMask -.extern OS_DisableScheduler -.extern OS_EnableIrqMask -.extern OS_EnableScheduler -.extern OS_ExitThread -.extern OS_FreeToHeap -.extern OS_GetCpsrIrq -.extern OS_GetDTCMAddress -.extern OS_GetInitArenaHi -.extern OS_GetInitArenaLo -.extern OS_GetIrqFunction -.extern OS_GetLockID -.extern OS_GetLowEntropyData -.extern OS_GetMacAddress -.extern OS_GetOwnerInfo -.extern OS_GetOwnerRtcOffset -.extern OS_GetProcMode -.extern OS_GetThreadPriority -.extern OS_GetTick -.extern OS_GetTickLo -.extern OS_Halt -.extern OS_IRQTable -.extern OS_Init -.extern OS_InitAlarm -.extern OS_InitMessageQueue -.extern OS_InitMutex -.extern OS_InitTick -.extern OS_IrqDummy -.extern OS_IrqHandler -.extern OS_IsAlarmAvailable -.extern OS_IsRunOnEmulator -.extern OS_IsThreadTerminated -.extern OS_IsTickAvailable -.extern OS_JamMessage -.extern OS_JoinThread -.extern OS_LockCartridge -.extern OS_LockMutex -.extern OS_ReadMessage -.extern OS_ReadOwnerOfLockWord -.extern OS_ReceiveMessage -.extern OS_ReleaseLockID -.extern OS_RescheduleThread -.extern OS_ResetRequestIrqMask -.extern OS_ResetSystem -.extern OS_RestoreInterrupts -.extern OS_SNPrintf -.extern OS_SendMessage -.extern OS_SetAlarm -.extern OS_SetArenaHi -.extern OS_SetArenaLo -.extern OS_SetDPermissionsForProtectionRegion -.extern OS_SetIrqFunction -.extern OS_SetIrqMask -.extern OS_SetThreadPriority -.extern OS_Sleep -.extern OS_SleepThread -.extern OS_SpinWait -.extern OS_Terminate -.extern OS_TryLockCard -.extern OS_TryLockCartridge -.extern OS_TryLockMutex -.extern OS_UnlockCard -.extern OS_UnlockCartridge -.extern OS_UnlockCartridge2 -.extern OS_UnlockMutex -.extern OS_WaitIrq -.extern OS_WakeupThread -.extern OS_WakeupThreadDirect -.extern OS_YieldThread -.extern OSi_DoResetSystem -.extern OSi_EnterDmaCallback -.extern OSi_IrqDma0 -.extern OSi_IrqDma1 -.extern OSi_IrqDma2 -.extern OSi_IrqDma3 -.extern OSi_IrqThreadQueue -.extern OSi_IrqTimer0 -.extern OSi_IrqTimer1 -.extern OSi_IrqTimer2 -.extern OSi_IrqTimer3 -.extern OSi_IsResetOccurred -.extern OSi_MainExArenaEnabled -.extern OSi_ThreadInfo -.extern OSi_TryLockVram -.extern OSi_UnlockVram -.extern PM_AppendPostSleepCallback -.extern PM_DeletePostSleepCallback -.extern PM_DeletePreSleepCallback -.extern PM_ForceToPowerOff -.extern PM_GetBackLight -.extern PM_GetLCDPower -.extern PM_GoSleepMode -.extern PM_Init -.extern PM_PrependPreSleepCallback -.extern PM_SetAmp -.extern PM_SetAmpGain -.extern PM_SetBackLight -.extern PM_SetLCDPower -.extern PMi_Lock -.extern PMi_ReadRegister -.extern PMi_SendPxiData -.extern PMi_SendSleepStart -.extern PMi_SetLED -.extern PMi_SetLEDAsync -.extern PMi_WaitBusy -.extern PXI_Init -.extern PXI_IsCallbackReady -.extern PXI_SendWordByFifo -.extern PXI_SetFifoRecvCallback -.extern PXIi_HandlerRecvFifoNotEmpty -.extern ProcessBlock -.extern RTC_ConvertDateTimeToSecond -.extern RTC_ConvertDateToDay -.extern RTC_ConvertSecondToDateTime -.extern RTC_GetDate -.extern RTC_GetDateTimeAsync -.extern RTC_GetTime -.extern RTC_Init -.extern RunScriptCommand +.extern SDK_AUTOLOAD_ITCM_START .extern SDK_AUTOLOAD_DTCM_START .extern SDK_AUTOLOAD_LIST .extern SDK_AUTOLOAD_LIST_END @@ -3323,195 +9,3 @@ .extern SDK_SECTION_ARENA_ITCM_START .extern SDK_STATIC_BSS_END .extern SDK_STATIC_BSS_START -.extern SND_AssignWaveArc -.extern SND_CalcChannelVolume -.extern SND_DestroyBank -.extern SND_DestroyWaveArc -.extern SND_FlushCommand -.extern SND_GetChannelStatus -.extern SND_GetCurrentCommandTag -.extern SND_GetFirstInstDataPos -.extern SND_GetNextInstData -.extern SND_GetPlayerStatus -.extern SND_GetPlayerTickCounter -.extern SND_GetWaveDataAddress -.extern SND_GetWaveDataCount -.extern SND_Init -.extern SND_InvalidateBankData -.extern SND_InvalidateSeqData -.extern SND_InvalidateWaveData -.extern SND_IsFinishedCommandTag -.extern SND_LockChannel -.extern SND_PauseSeq -.extern SND_PrepareSeq -.extern SND_RecvCommandReply -.extern SND_ResetMasterPan -.extern SND_SetChannelPan -.extern SND_SetChannelTimer -.extern SND_SetChannelVolume -.extern SND_SetMasterPan -.extern SND_SetOutputSelector -.extern SND_SetPlayerChannelPriority -.extern SND_SetPlayerVolume -.extern SND_SetTrackAllocatableChannel -.extern SND_SetTrackPan -.extern SND_SetTrackPitch -.extern SND_SetWaveDataAddress -.extern SND_SetupAlarm -.extern SND_SetupCapture -.extern SND_SetupChannelPcm -.extern SND_StartPreparedSeq -.extern SND_StartTimer -.extern SND_StopSeq -.extern SND_StopTimer -.extern SND_UnlockChannel -.extern SND_WaitForCommandProc -.extern STD_CopyLString -.extern ScriptCall -.extern ScriptJump -.extern ScriptReadHalfword -.extern ScriptReadWord -.extern ScriptReturn -.extern SetupBytecodeScript -.extern SetupNativeScript -.extern StopScript -.extern StringCopy -.extern StringCopyN -.extern StringFillEOS -.extern StringLength -.extern StringNotEqual -.extern StringNotEqualN -.extern TP_CheckError -.extern TP_GetCalibratedPoint -.extern TP_GetLatestIndexInAuto -.extern TP_GetLatestRawPointInAuto -.extern TP_GetUserInfo -.extern TP_Init -.extern TP_RequestAutoSamplingStartAsync -.extern TP_RequestAutoSamplingStopAsync -.extern TP_RequestSamplingAsync -.extern TP_SetCalibrateParam -.extern TP_WaitBusy -.extern TP_WaitRawResult -.extern VEC_Add -.extern VEC_CrossProduct -.extern VEC_DotProduct -.extern VEC_Fx16CrossProduct -.extern VEC_Fx16DotProduct -.extern VEC_Fx16Normalize -.extern VEC_Mag -.extern VEC_Normalize -.extern VEC_Subtract -.extern WM_Disable -.extern WM_Disconnect -.extern WM_Enable -.extern WM_End -.extern WM_EndDCF -.extern WM_EndMP -.extern WM_EndParent -.extern WM_EndScan -.extern WM_Finish -.extern WM_GetAllowedChannel -.extern WM_GetDispersionBeaconPeriod -.extern WM_GetDispersionScanPeriod -.extern WM_GetLinkLevel -.extern WM_Init -.extern WM_Initialize -.extern WM_MeasureChannel -.extern WM_PowerOff -.extern WM_PowerOn -.extern WM_Reset -.extern WM_SetBeaconIndication -.extern WM_SetDCFData -.extern WM_SetEntry -.extern WM_SetGameInfo -.extern WM_SetIndCallback -.extern WM_SetLifeTime -.extern WM_SetMPDataToPortEx -.extern WM_SetParentParameter -.extern WM_SetPortCallback -.extern WM_SetWEPKeyEx -.extern WM_StartConnectEx -.extern WM_StartDCF -.extern WM_StartMP -.extern WM_StartParent -.extern WM_StartScan -.extern WM_StartScanEx -.extern WMi_GetStatusAddress -.extern __call_static_initializers -.extern __destroy_global_chain -.extern _ddiv -.extern _fadd -.extern _fdiv -.extern _feq -.extern _ffix -.extern _ffixu -.extern _fflt -.extern _ffltu -.extern _fgr -.extern _fmul -.extern _fp_init -.extern _fsub -.extern _ll_mod -.extern _ll_mul -.extern _ll_sdiv -.extern _ll_shl -.extern _ll_udiv -.extern _s32_div_f -.extern _u32_div_f -.extern _u32_div_not_0_f -.extern abs -.extern cardi_common -.extern gScriptCmdTable -.extern memcmp -.extern memcpy -.extern memmove -.extern strcmp -.extern strcpy -.extern strlen -.extern tempName_NNS_FndAllocFromExpHeapEx -.extern tempName_NNS_FndCreateExpHeapEx -.extern thunk_FUN_02096e4c -.extern thunk_FUN_02097190 -.extern thunk_FUN_020adc8c -.extern thunk_FUN_020adc8c_2 -.extern thunk_FUN_020afda0 -.extern thunk_FUN_020afda0_2 -.extern thunk_FUN_020b5040 -.extern Unk_0210683C -.extern Unk_02106840 -.extern Unk_02106900 -.extern Unk_02106A00 -.extern Unk_02106A04 -.extern OSi_IrqCallbackInfo -.extern OSi_IrqCallbackInfoIndex -.extern SDK_SYS_STACKSIZE -.extern SDK_IRQ_STACKSIZE -.extern OSi_IsThreadInitialized -.extern OSi_LauncherThread -.extern OSi_CurrentThreadPtr -.extern OSi_IdleThread -.extern OSi_IdleThreadStack -.extern OSi_RescheduleCount -.extern OSi_SystemCallbackInSwitchThread -.extern OSi_Initialized -.extern OSi_HeapInfo -.extern OSi_DebuggerHandler -.extern OSi_ExContext -.extern OSi_UserExceptionHandler -.extern OSi_UserExceptionHandlerArg -.extern OSi_TimerReserved -.extern OSi_UseTick -.extern OSi_NeedResetTimer -.extern OSi_TickCounter -.extern OSi_UseAlarm -.extern OSi_AlarmQueue -.extern OSi_UseVAlarm -.extern OSi_PreviousVCount -.extern OSi_VFrameCount -.extern OSi_VAlarmQueue -.extern OSi_IsInitReset -.extern OSi_vramExclusive -.extern OSi_vramLockId -.extern OSi_ThreadIdCount -.extern OSi_StackForDestructor diff --git a/arm7/undefined_syms.txt b/arm7/undefined_syms.txt index 075d22a9..adf613c0 100644 --- a/arm7/undefined_syms.txt +++ b/arm7/undefined_syms.txt @@ -3,498 +3,17 @@ CONST_34 = 0x00000034; CONST_3F = 0x0000003F; SDK_IRQ_STACKSIZE = 0x00000400; -// .data -// OS -OSi_IrqCallbackInfoIndex = 0x02106818; -// DGT -Unk_0210683C = 0x0210683C; -Unk_02106840 = 0x02106840; -Unk_02106900 = 0x02106900; -Unk_02106A00 = 0x02106A00; -Unk_02106A04 = 0x02106A04; - -// .bss -gBacklightTop = 0x02106FA0; -gBacklightTop_2 = 0x02106FA0; -gUnknown2106FB8 = 0x02106FB8; -gUnknown21C48B8 = 0x021C48B8; -gUnk021C4918 = 0x021C4918; -OSi_IrqCallbackInfo = 0x021D341C; -isInitialized = 0x021D347C; -OSi_StackForDestructor = 0x021D3480; -OSi_RescheduleCount = 0x021D3484; -OSi_ThreadIdCount = 0x021D3488; -OSi_SystemCallbackInSwitchThread = 0x021D348C; -OSi_CurrentThreadPtr = 0x021D3490; -OSi_IsThreadInitialized = 0x021D3494; -OSi_ThreadInfo = 0x021D3498; -OSi_IdleThread = 0x021D34A8; -OSi_LauncherThread = 0x021D3568; -OSi_IdleThreadStack = 0x021D3628; -OSi_Initialized = 0x021D36F0; -OSi_MainExArenaEnabled = 0x021D36F4; -OSi_HeapInfo = 0x021D36F8; -OSi_UserExceptionHandler = 0x021D371C; -OSi_UserExceptionHandlerArg = 0x21D3720; -OSi_DebuggerHandler = 0x021D3724; -OSi_ExContext = 0x021D3728; -OSi_TimerReserved = 0x021D37A8; -OSi_UseTick = 0x021D37AC; -OSi_NeedResetTimer = 0x021D37B0; -OSi_TickCounter = 0x021D37B4; -OSi_UseAlarm = 0x021D37BC; -OSi_AlarmQueue = 0x021D37C0; -OSi_UseVAlarm = 0x021D37C8; -OSi_PreviousVCount = 0x021D37CC; -OSi_VFrameCount = 0x021D37D0; -OSi_VAlarmQueue = 0x021D37D4; -OSi_IsInitReset = 0x021D37DC; -OSi_IsResetOccurred = 0x021D37E0; -OSi_vramExclusive = 0x021D37E4; -OSi_vramLockId = 0x021D37E8; -cardi_common = 0x021D55C0; - -// Overlay -FUN_021D74E0 = 0x021D74E0; -FUN_021D76AC = 0x021D76AC; -gUnk021D76C8 = 0x021D76C8; -FUN_021D77C4 = 0x021D77C4; -FUN_021D7800 = 0x021D7800; -FUN_021D78FC = 0x021D78FC; -FUN_021D79B4 = 0x021D79B4; -FUN_021D7CA4 = 0x021D7CA4; -FUN_021D7F8C = 0x021D7F8C; -FUN_021D8018 = 0x021D8018; -FUN_021D8164 = 0x021D8164; -FUN_021D82BC = 0x021D82BC; -FUN_021D8320 = 0x021D8320; -FUN_021D836C = 0x021D836C; -FUN_021D83A8 = 0x021D83A8; -FUN_021D83C0 = 0x021D83C0; -FUN_021D844C = 0x021D844C; -FUN_021D8494 = 0x021D8494; -FUN_021D85FC = 0x021D85FC; -FUN_021D8624 = 0x021D8624; -FUN_021D865C = 0x021D865C; -FUN_021D8758 = 0x021D8758; -FUN_021D8820 = 0x021D8820; -FUN_021D88E4 = 0x021D88E4; -FUN_021D89CC = 0x021D89CC; -FUN_021D8B64 = 0x021D8B64; -FUN_021D8C24 = 0x021D8C24; -FUN_021D917C = 0x021D917C; -FUN_021D959C = 0x021D959C; -FUN_021D967C = 0x021D967C; -FUN_021D96F4 = 0x021D96F4; -FUN_021D9708 = 0x021D9708; -FUN_021D971C = 0x021D971C; -FUN_021D9820 = 0x021D9820; -FUN_021D99F8 = 0x021D99F8; -FUN_021DA464 = 0x021DA464; -FUN_021DA4EC = 0x021DA4EC; -FUN_021DA54C = 0x021DA54C; -FUN_021DA58C = 0x021DA58C; -FUN_021DA5B8 = 0x021DA5B8; -FUN_021DA5C8 = 0x021DA5C8; -FUN_021DA5D0 = 0x021DA5D0; -FUN_021DA5D8 = 0x021DA5D8; -FUN_021DA7B4 = 0x021DA7B4; -FUN_021DAAA4 = 0x021DAAA4; -FUN_021DAC70 = 0x021DAC70; -FUN_021DAE40 = 0x021DAE40; -FUN_021DAED4 = 0x021DAED4; -FUN_021DAF28 = 0x021DAF28; -FUN_021DAF78 = 0x021DAF78; -FUN_021DAF98 = 0x021DAF98; -FUN_021DB030 = 0x021DB030; -FUN_021DB7E8 = 0x021DB7E8; -FUN_021DB858 = 0x021DB858; -gUnk021DBE18 = 0x021DBE18; -FUN_021DC174 = 0x021DC174; -FUN_021DD6F0 = 0x021DD6F0; -FUN_021DD718 = 0x021DD718; -FUN_021DDB08 = 0x021DDB08; -FUN_021E1374 = 0x021E1374; -FUN_021E1858 = 0x021E1858; -FUN_021E1994 = 0x021E1994; -FUN_021E1BF8 = 0x021E1BF8; -FUN_021E1C4C = 0x021E1C4C; -FUN_021E1C54 = 0x021E1C54; -FUN_021E1ECC = 0x021E1ECC; -FUN_021E1F34 = 0x021E1F34; -FUN_021E1F58 = 0x021E1F58; -FUN_021E1F60 = 0x021E1F60; -FUN_021E2464 = 0x021E2464; -FUN_021E2608 = 0x021E2608; -FUN_021E26CC = 0x021E26CC; -FUN_021E27E8 = 0x021E27E8; -FUN_021E288C = 0x021E288C; -FUN_021E28A0 = 0x021E28A0; -FUN_021E2950 = 0x021E2950; -FUN_021E29B4 = 0x021E29B4; -FUN_021E29C8 = 0x021E29C8; -FUN_021E2A70 = 0x021E2A70; -FUN_021E2AD4 = 0x021E2AD4; -FUN_021E2B80 = 0x021E2B80; -FUN_021E2B9C = 0x021E2B9C; -FUN_021E2BB8 = 0x021E2BB8; -FUN_021E2BD0 = 0x021E2BD0; -FUN_021E2C24 = 0x021E2C24; -FUN_021E2C58 = 0x021E2C58; -FUN_021E2CBC = 0x021E2CBC; -FUN_021E32F0 = 0x021E32F0; -FUN_021E331C = 0x021E331C; -FUN_021E3424 = 0x021E3424; -FUN_021E3444 = 0x021E3444; -FUN_021E495C = 0x021E495C; -FUN_021E4C54 = 0x021E4C54; -FUN_021E4C60 = 0x021E4C60; -FUN_021E4DE4 = 0x021E4DE4; -FUN_021E5614 = 0x021E5614; -FUN_021E57D4 = 0x021E57D4; -FUN_021E5970 = 0x021E5970; -FUN_021E5B30 = 0x021E5B30; -FUN_021E5FD8 = 0x021E5FD8; -FUN_021E5FE0 = 0x021E5FE0; -FUN_021E6410 = 0x021E6410; -FUN_021E643C = 0x021E643C; -FUN_021E6990 = 0x021E6990; -FUN_021E69BC = 0x021E69BC; -FUN_021E6BF4 = 0x021E6BF4; -FUN_021E7030 = 0x021E7030; -FUN_021E70F0 = 0x021E70F0; -FUN_021E7138 = 0x021E7138; -FUN_021E7184 = 0x021E7184; -FUN_021E71E8 = 0x021E71E8; -FUN_021E7750 = 0x021E7750; -FUN_021E799C = 0x021E799C; -FUN_021E7AC0 = 0x021E7AC0; -FUN_021E7EA0 = 0x021E7EA0; -FUN_021E7EB0 = 0x021E7EB0; -FUN_021E7EC4 = 0x021E7EC4; -FUN_021E7EC8 = 0x021E7EC8; -FUN_021E7ED0 = 0x021E7ED0; -FUN_021E7ED8 = 0x021E7ED8; -FUN_021E7FBC = 0x021E7FBC; -FUN_021E8128 = 0x021E8128; -FUN_021E8130 = 0x021E8130; -FUN_021E8140 = 0x021E8140; -FUN_021E8144 = 0x021E8144; -FUN_021E8148 = 0x021E8148; -FUN_021E8158 = 0x021E8158; -FUN_021E81BC = 0x021E81BC; -FUN_021E84F4 = 0x021E84F4; -FUN_021E856C = 0x021E856C; -FUN_021E8588 = 0x021E8588; -FUN_021E85E4 = 0x021E85E4; -FUN_021E85FC = 0x021E85FC; -FUN_021EAE90 = 0x021EAE90; -FUN_021EB044 = 0x021EB044; -FUN_021EC57C = 0x021EC57C; -FUN_021EC71C = 0x021EC71C; -FUN_021EC854 = 0x021EC854; -FUN_021EC864 = 0x021EC864; -FUN_021ECD64 = 0x021ECD64; -FUN_021ECF14 = 0x021ECF14; -FUN_021ED0CC = 0x021ED0CC; -FUN_021ED49C = 0x021ED49C; -FUN_021ED4E0 = 0x021ED4E0; -FUN_021ED52C = 0x021ED52C; -FUN_021ED5C4 = 0x021ED5C4; -FUN_021ED5EC = 0x021ED5EC; -FUN_021ED644 = 0x021ED644; -FUN_021ED940 = 0x021ED940; -FUN_021EDA48 = 0x021EDA48; -FUN_021EDBC8 = 0x021EDBC8; -FUN_021EF5E0 = 0x021EF5E0; -FUN_021EF604 = 0x021EF604; -FUN_021EF620 = 0x021EF620; -FUN_021EF654 = 0x021EF654; -FUN_021EF824 = 0x021EF824; -FUN_021EF844 = 0x021EF844; -FUN_021EF8C8 = 0x021EF8C8; -FUN_021EF8DC = 0x021EF8DC; -FUN_021EFA9C = 0x021EFA9C; -FUN_021F02C4 = 0x021F02C4; -FUN_021F1D8C = 0x021F1D8C; -FUN_021F1DC8 = 0x021F1DC8; -FUN_021F1DFC = 0x021F1DFC; -FUN_021F1EC0 = 0x021F1EC0; -FUN_021F1F78 = 0x021F1F78; -FUN_021F2094 = 0x021F2094; -FUN_021F20D8 = 0x021F20D8; -FUN_021F20F8 = 0x021F20F8; -FUN_021F2AF4 = 0x021F2AF4; -FUN_021F2E0C = 0x021F2E0C; -FUN_021F2E28 = 0x021F2E28; -FUN_021F2F48 = 0x021F2F48; -FUN_021F2F6C = 0x021F2F6C; -FUN_021F3A18 = 0x021F3A18; -FUN_021F3AB4 = 0x021F3AB4; -FUN_021F3B4C = 0x021F3B4C; -FUN_021F3B7C = 0x021F3B7C; -FUN_021F3DA4 = 0x021F3DA4; -FUN_021F44D8 = 0x021F44D8; -FUN_021F4520 = 0x021F4520; -FUN_021F4568 = 0x021F4568; -FUN_021F4594 = 0x021F4594; -FUN_021F45E8 = 0x021F45E8; -FUN_021F4608 = 0x021F4608; -FUN_021F4BD0 = 0x021F4BD0; -FUN_021F4C88 = 0x021F4C88; -FUN_021F4D80 = 0x021F4D80; -FUN_021F4DC8 = 0x021F4DC8; -FUN_021F4E7C = 0x021F4E7C; -FUN_021F57EC = 0x021F57EC; -FUN_021F5C44 = 0x021F5C44; -FUN_021F61DC = 0x021F61DC; -FUN_021F61E8 = 0x021F61E8; -FUN_02211E60 = 0x02211E60; -FUN_0222D5C0 = 0x0222D5C0; -FUN_0222DAEC = 0x0222DAEC; -FUN_0222DD1C = 0x0222DD1C; -FUN_0222DD38 = 0x0222DD38; -FUN_0222E2BC = 0x0222E2BC; -FUN_0222E360 = 0x0222E360; -FUN_0222E3A0 = 0x0222E3A0; -FUN_0222E7E8 = 0x0222E7E8; -FUN_0222E874 = 0x0222E874; -FUN_0222ED34 = 0x0222ED34; -FUN_0222EDBC = 0x0222EDBC; -FUN_0222F440 = 0x0222F440; -FUN_0222F480 = 0x0222F480; -FUN_0222F7E0 = 0x0222F7E0; -FUN_0222F990 = 0x0222F990; -FUN_022300D4 = 0x022300D4; -FUN_022300DC = 0x022300DC; -FUN_022300E4 = 0x022300E4; -FUN_022300E8 = 0x022300E8; -FUN_022300F4 = 0x022300F4; -FUN_02230100 = 0x02230100; -FUN_0223010C = 0x0223010C; -FUN_02230118 = 0x02230118; -FUN_02230124 = 0x02230124; -FUN_02230F3C = 0x02230F3C; -FUN_02230F70 = 0x02230F70; -FUN_02230F80 = 0x02230F80; -FUN_02231344 = 0x02231344; -FUN_02231350 = 0x02231350; -FUN_0223135C = 0x0223135C; -FUN_02231368 = 0x02231368; -FUN_02231374 = 0x02231374; -FUN_02239944 = 0x02239944; -FUN_02239AAC = 0x02239AAC; -FUN_0223CACC = 0x0223CACC; -FUN_0223CB08 = 0x0223CB08; -FUN_0223CCDC = 0x0223CCDC; -FUN_0223CD7C = 0x0223CD7C; -FUN_0223D3D0 = 0x0223D3D0; -FUN_0223D638 = 0x0223D638; -FUN_0223D648 = 0x0223D648; -FUN_0223DFB4 = 0x0223DFB4; -FUN_0223E060 = 0x0223E060; -FUN_0223E118 = 0x0223E118; -FUN_0223E154 = 0x0223E154; -FUN_0223E1A4 = 0x0223E1A4; -FUN_0223E1E0 = 0x0223E1E0; -FUN_0223E2AC = 0x0223E2AC; -FUN_0223E4A8 = 0x0223E4A8; -FUN_0223E4D4 = 0x0223E4D4; -FUN_0223E554 = 0x0223E554; -FUN_0223E6B8 = 0x0223E6B8; -FUN_0223E734 = 0x0223E734; -FUN_0223E7FC = 0x0223E7FC; -FUN_0223EB8C = 0x0223EB8C; -FUN_0223EF7C = 0x0223EF7C; -FUN_0223F4D8 = 0x0223F4D8; -FUN_0223F4F4 = 0x0223F4F4; -FUN_0223F8D8 = 0x0223F8D8; -FUN_0223FCE8 = 0x0223FCE8; -FUN_02240790 = 0x02240790; -FUN_022407CC = 0x022407CC; -FUN_022407DC = 0x022407DC; -FUN_022407F8 = 0x022407F8; -FUN_02240834 = 0x02240834; -FUN_02240844 = 0x02240844; -FUN_0224089C = 0x0224089C; -FUN_022408FC = 0x022408FC; -FUN_022411F4 = 0x022411F4; -FUN_02241230 = 0x02241230; -FUN_02241914 = 0x02241914; -FUN_02242A38 = 0x02242A38; -FUN_02242BE0 = 0x02242BE0; -FUN_0224312C = 0x0224312C; -FUN_022432E4 = 0x022432E4; -FUN_0224339C = 0x0224339C; -FUN_022433A8 = 0x022433A8; -FUN_022433B0 = 0x022433B0; -FUN_022433B8 = 0x022433B8; -FUN_022433F8 = 0x022433F8; -FUN_02243408 = 0x02243408; -FUN_02243428 = 0x02243428; -FUN_02243448 = 0x02243448; -FUN_0224345C = 0x0224345C; -FUN_022434AC = 0x022434AC; -FUN_022434BC = 0x022434BC; -FUN_022434D0 = 0x022434D0; -FUN_02243694 = 0x02243694; -FUN_022436C8 = 0x022436C8; -FUN_022436E8 = 0x022436E8; -FUN_02243780 = 0x02243780; -FUN_02243838 = 0x02243838; -FUN_022438DC = 0x022438DC; -FUN_022438E0 = 0x022438E0; -FUN_022438FC = 0x022438FC; -FUN_02243920 = 0x02243920; -FUN_022439F8 = 0x022439F8; -FUN_02243AD8 = 0x02243AD8; -FUN_02243BA8 = 0x02243BA8; -FUN_02243C5C = 0x02243C5C; -FUN_02243D3C = 0x02243D3C; -FUN_02243DA0 = 0x02243DA0; -FUN_02243DB8 = 0x02243DB8; -FUN_02243DC0 = 0x02243DC0; -FUN_02243DC4 = 0x02243DC4; -FUN_02243DD8 = 0x02243DD8; -FUN_02243DE0 = 0x02243DE0; -FUN_02243E34 = 0x02243E34; -FUN_02243E74 = 0x02243E74; -FUN_02243F18 = 0x02243F18; -FUN_02243F50 = 0x02243F50; -FUN_02243F9C = 0x02243F9C; -FUN_02244210 = 0x02244210; -FUN_02244558 = 0x02244558; -FUN_02244660 = 0x02244660; -FUN_022446BC = 0x022446BC; -FUN_022446E0 = 0x022446E0; -FUN_022446FC = 0x022446FC; -FUN_02244758 = 0x02244758; -FUN_02244770 = 0x02244770; -FUN_02244824 = 0x02244824; -FUN_0224484C = 0x0224484C; -FUN_02244D1C = 0x02244D1C; -FUN_02244D20 = 0x02244D20; -FUN_02244D3C = 0x02244D3C; -FUN_02244D40 = 0x02244D40; -FUN_02244D58 = 0x02244D58; -FUN_02244D98 = 0x02244D98; -FUN_02244DA0 = 0x02244DA0; -FUN_02244DB0 = 0x02244DB0; -FUN_02244DBC = 0x02244DBC; -FUN_02244DC4 = 0x02244DC4; -FUN_02244EF8 = 0x02244EF8; -FUN_02244F18 = 0x02244F18; -FUN_02244F24 = 0x02244F24; -FUN_02244F2C = 0x02244F2C; -FUN_02245088 = 0x02245088; -FUN_02245114 = 0x02245114; -FUN_02245190 = 0x02245190; -FUN_02245198 = 0x02245198; -FUN_022451F0 = 0x022451F0; -FUN_0224525C = 0x0224525C; -FUN_022452A4 = 0x022452A4; -FUN_02245324 = 0x02245324; -FUN_02245340 = 0x02245340; -FUN_02245358 = 0x02245358; -FUN_0224566C = 0x0224566C; -FUN_022456E8 = 0x022456E8; -FUN_02245844 = 0x02245844; -FUN_02245910 = 0x02245910; -FUN_02245F1C = 0x02245F1C; -FUN_02245F4C = 0x02245F4C; -FUN_02245FA0 = 0x02245FA0; -FUN_022461A4 = 0x022461A4; -FUN_022461B8 = 0x022461B8; -FUN_0224666C = 0x0224666C; -FUN_022466A0 = 0x022466A0; -FUN_022466AC = 0x022466AC; -FUN_02246F1C = 0x02246F1C; -FUN_02247294 = 0x02247294; -FUN_022472AC = 0x022472AC; -FUN_02247544 = 0x02247544; -FUN_02247614 = 0x02247614; -FUN_02247728 = 0x02247728; -FUN_02247808 = 0x02247808; -FUN_02247970 = 0x02247970; -FUN_02247A34 = 0x02247A34; -FUN_022483BC = 0x022483BC; -FUN_022483E0 = 0x022483E0; -FUN_022483EC = 0x022483EC; -FUN_02248724 = 0x02248724; -FUN_0224884C = 0x0224884C; -FUN_022488CC = 0x022488CC; -FUN_022488EC = 0x022488EC; -FUN_022488F4 = 0x022488F4; -FUN_022488FC = 0x022488FC; -FUN_0224891C = 0x0224891C; -FUN_02248B54 = 0x02248B54; -FUN_02248B58 = 0x02248B58; -FUN_02248B5C = 0x02248B5C; -FUN_02248B60 = 0x02248B60; -FUN_02248B6C = 0x02248B6C; -FUN_02248CC0 = 0x02248CC0; -FUN_02248CD0 = 0x02248CD0; -FUN_02248DF8 = 0x02248DF8; -FUN_02248F70 = 0x02248F70; -FUN_02248FE0 = 0x02248FE0; -FUN_02249038 = 0x02249038; -FUN_022490A0 = 0x022490A0; -FUN_022491FC = 0x022491FC; -FUN_022494C8 = 0x022494C8; -FUN_02249508 = 0x02249508; -FUN_02249668 = 0x02249668; -FUN_022497E8 = 0x022497E8; -FUN_02249E6C = 0x02249E6C; -FUN_02249E78 = 0x02249E78; -FUN_02249E84 = 0x02249E84; -FUN_02249E90 = 0x02249E90; -FUN_0224A310 = 0x0224A310; -FUN_0224A528 = 0x0224A528; -FUN_0224A7C8 = 0x0224A7C8; -FUN_0224ABAC = 0x0224ABAC; -FUN_0224B124 = 0x0224B124; -FUN_0224B2C4 = 0x0224B2C4; -FUN_0224B568 = 0x0224B568; -FUN_0224B818 = 0x0224B818; -FUN_0224B86C = 0x0224B86C; -FUN_0224B9E0 = 0x0224B9E0; -FUN_0224BBEC = 0x0224BBEC; -FUN_0224BD90 = 0x0224BD90; -FUN_0224C038 = 0x0224C038; -FUN_0224C27C = 0x0224C27C; -FUN_0224C520 = 0x0224C520; -FUN_0224C678 = 0x0224C678; -FUN_0224C6E8 = 0x0224C6E8; -FUN_0224C6F4 = 0x0224C6F4; -FUN_0224C700 = 0x0224C700; -FUN_0224C8C8 = 0x0224C8C8; -FUN_0224CA2C = 0x0224CA2C; -FUN_0224CA54 = 0x0224CA54; -FUN_0224CA58 = 0x0224CA58; -FUN_0224CA88 = 0x0224CA88; -FUN_0224CA94 = 0x0224CA94; -FUN_0224CAA0 = 0x0224CAA0; -FUN_0224CAB4 = 0x0224CAB4; -FUN_0224CB30 = 0x0224CB30; -FUN_0224CBB0 = 0x0224CBB0; -FUN_0224CC24 = 0x0224CC24; -FUN_0224CECC = 0x0224CECC; -FUN_0224D14C = 0x0224D14C; -FUN_0224D2E0 = 0x0224D2E0; -FUN_0224D3E8 = 0x0224D3E8; -FUN_0224D70C = 0x0224D70C; -FUN_0224D76C = 0x0224D76C; -FUN_0224D79C = 0x0224D79C; -FUN_0224DCB8 = 0x0224DCB8; -FUN_0224DD94 = 0x0224DD94; -FUN_0224DDB8 = 0x0224DDB8; -FUN_0224E554 = 0x0224E554; -FUN_0224E764 = 0x0224E764; -FUN_0224E7C4 = 0x0224E7C4; -FUN_0224F12C = 0x0224F12C; -FUN_02252534 = 0x02252534; -FUN_02252538 = 0x02252538; -FUN_022567E0 = 0x022567E0; +SDK_AUTOLOAD_LIST = 0x023A92F8; +SDK_AUTOLOAD_ITCM_START = 0x027E0000; +SDK_AUTOLOAD_ITCM_SIZE = 0x000000DC; +SDK_AUTOLOAD_ITCM_BSS_SIZE = 0x00000000; +SDK_AUTOLOAD_DTCM_START = 0x037F8000; +SDK_AUTOLOAD_DTCM_SIZE = 0x0000F70C; +SDK_AUTOLOAD_DTCM_BSS_SIZE = 0x00004220; +SDK_AUTOLOAD_EXT_START = 0x06000000; +SDK_AUTOLOAD_EXT_SIZE = 0x00019960; +SDK_AUTOLOAD_EXT_BSS_SIZE = 0x00001590; +SDK_AUTOLOAD_LIST_END = SDK_AUTOLOAD_LIST + 0x24; // ??? SDK_MAIN_ARENA_LO = 0x0225FFA0; diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index 58dbe37b..aa3c002d 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -3,6 +3,7 @@ MEMORY { .text (RX) : ORIGIN=0x02000000, LENGTH=0 .data (R) : ORIGIN=0x20EC710, LENGTH=0 .autoload (R) : ORIGIN=0x02107700, LENGTH=0 + .footer (R) : ORIGIN=0, LENGTH=0 .bss (RWX) : ORIGIN=0x02106FA0, LENGTH=0 .ewram (RWX) : ORIGIN=0x023E0000, LENGTH=0 .dtcm (RW) : ORIGIN=0x027E0000, LENGTH=0 @@ -71,10 +72,23 @@ SECTIONS { } > .itcm .autoload : AT (0x107700) { - SDK_AUTOLOAD_LIST.o (.data) - unk_10b724.o (.text) + WRITEW SDK_AUTOLOAD_ITCM_START; + WRITEW SDK_AUTOLOAD_ITCM_SIZE; + WRITEW SDK_AUTOLOAD_ITCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_START; + WRITEW SDK_AUTOLOAD_DTCM_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_EXT_START; + WRITEW SDK_AUTOLOAD_EXT_SIZE; + WRITEW SDK_AUTOLOAD_EXT_BSS_SIZE; } > .autoload + .footer : AT (0x107724) { + WRITEW 0xDEC00621; + WRITEW _start_ModuleParams - ADDR(.text); + WRITEW 0; + } > .footer + .overlay : AT (0x107800) { arm9overlay.o (.text) } > .overlay diff --git a/arm9/asm/SDK_AUTOLOAD_LIST.s b/arm9/asm/SDK_AUTOLOAD_LIST.s deleted file mode 100644 index a2d1d5fe..00000000 --- a/arm9/asm/SDK_AUTOLOAD_LIST.s +++ /dev/null @@ -1,21 +0,0 @@ - .include "asm/macros.inc" - .include "global.inc" - .section .data - - .global SDK_AUTOLOAD_LIST -SDK_AUTOLOAD_LIST: ; 0x02107700 - .word SDK_AUTOLOAD_ITCM_START - .word 0x00000700 - .word 0x00000000 - - .word SDK_AUTOLOAD_DTCM_START - .word 0x00000060 - .word 0x00000020 - - .word 0x02400000 - .word 0x00000000 - .word 0x00000000 - - .global SDK_AUTOLOAD_LIST_END -SDK_AUTOLOAD_LIST_END: - diff --git a/arm9/asm/crt0.s b/arm9/asm/crt0.s index fd955dab..3b4ec179 100644 --- a/arm9/asm/crt0.s +++ b/arm9/asm/crt0.s @@ -255,6 +255,7 @@ OSi_ReferSymbol: ; 0x02000B60 NitroStartUp: ; 0x02000B64 bx lr + .global _start_ModuleParams _start_ModuleParams: .word SDK_AUTOLOAD_LIST .word SDK_AUTOLOAD_LIST_END diff --git a/arm9/asm/unk_10b724.s b/arm9/asm/unk_10b724.s deleted file mode 100644 index cfa5f27a..00000000 --- a/arm9/asm/unk_10b724.s +++ /dev/null @@ -1,4 +0,0 @@ - .text - .word 0xdec00621 - .word 0x00000b68 - .word 0x00000000 diff --git a/arm9/undefined_syms.txt b/arm9/undefined_syms.txt index 5329ff10..379c1c46 100644 --- a/arm9/undefined_syms.txt +++ b/arm9/undefined_syms.txt @@ -506,3 +506,15 @@ SDK_SECTION_ARENA_EX_START = 0x023E0000; // DTCM gUnk027FFC20 = 0x027FFC20; + +SDK_AUTOLOAD_LIST = 0x02107700; +SDK_AUTOLOAD_ITCM_START = 0x01FF8000; +SDK_AUTOLOAD_ITCM_SIZE = 0x00000700; +SDK_AUTOLOAD_ITCM_BSS_SIZE = 0x00000000; +SDK_AUTOLOAD_DTCM_START = 0x027E0000; +SDK_AUTOLOAD_DTCM_SIZE = 0x00000060; +SDK_AUTOLOAD_DTCM_BSS_SIZE = 0x00000020; +SDK_AUTOLOAD_EXT_START = 0x02400000; +SDK_AUTOLOAD_EXT_SIZE = 0x00000000; +SDK_AUTOLOAD_EXT_BSS_SIZE = 0x00000000; +SDK_AUTOLOAD_LIST_END = 0x02107724; \ No newline at end of file -- cgit v1.2.3 From b6ba429e8c355db4c79044e9b07a652019cade95 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 14:54:14 -0400 Subject: Comment on SDK version --- arm9/arm9.lcf | 1 + arm9/asm/crt0.s | 9 +++++---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index aa3c002d..dbf326b1 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -15,6 +15,7 @@ SECTIONS { .text : AT (0x0) { secure.o (.text) crt0.o (.text) + crt0.o (.version) main.o (.text) FUN_02000DF4.o (.text) unk_02000E0C.o (.text) diff --git a/arm9/asm/crt0.s b/arm9/asm/crt0.s index 3b4ec179..aaf2d22f 100644 --- a/arm9/asm/crt0.s +++ b/arm9/asm/crt0.s @@ -265,10 +265,11 @@ _start_ModuleParams: .balign 16, 0 - ; .version - .word 0x03027531 - .word 0xdec00621 - .byte 0xde, 0xc0, 0x06, 0x21 + .section .version + ; NITRO SDK 3.2.30001 + .word (3 << 24) | (2 << 16) | 30001 + .word 0xdec00621 ; Nitro code BE + .word 0x2106c0de ; Nitro code LE # strings .balign 4 -- cgit v1.2.3 From 03e537113245d91ea32ee899cbbddc083a2c3023 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 16:09:45 -0400 Subject: arm7 sbss section --- arm7/arm7.lcf | 9 +++- arm7/asm/arm7_rom.s | 143 ---------------------------------------------------- arm7/asm/crt0.s | 139 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 147 insertions(+), 144 deletions(-) create mode 100644 arm7/asm/crt0.s diff --git a/arm7/arm7.lcf b/arm7/arm7.lcf index 5552835b..fdffb4d0 100644 --- a/arm7/arm7.lcf +++ b/arm7/arm7.lcf @@ -1,5 +1,6 @@ MEMORY { .text (RX) : ORIGIN=0x02380000, LENGTH=0 + .sbss (RWX) : ORIGIN=AFTER(.text), LENGTH=0 .itcm (RWX) : ORIGIN=0x027E0000, LENGTH=0 .dtcm (RWX) : ORIGIN=0x037F8000, LENGTH=0 .ewram (RW) : ORIGIN=0x06000000, LENGTH=0 @@ -9,9 +10,15 @@ MEMORY { SECTIONS { #include "undefined_syms.txt" .text : AT (0x0) { - arm7_rom.o (.text) + crt0.o (.text) } > .text + .sbss : { + SDK_STATIC_BSS_START = .; + SDK_STATIC_BSS_END = .; + } > .sbss + + SDK_AUTOLOAD_START = .; .itcm : AT (0x1b0) { arm7_rom.o (.itcm) } > .itcm diff --git a/arm7/asm/arm7_rom.s b/arm7/asm/arm7_rom.s index 6691475b..d22e0d18 100644 --- a/arm7/asm/arm7_rom.s +++ b/arm7/asm/arm7_rom.s @@ -1,150 +1,7 @@ /* arm7_rom.s TODO: Disassemble */ .include "asm/macros.inc" .include "global.inc" - .global ARM7AutoLoad - .section .text - arm_func_start _start - -_start: - mov ip, #67108864 ; 0x4000000 - str ip, [ip, #520] ; 0x208 - ldr r1, _23800cc - mov r0, #58720256 ; 0x3800000 - cmp r0, r1 - movpl r1, r0 - ldr r2, _23800d0 - mov r0, #0 -_02380020: - cmp r1, r2 - stmltia r1!, {r0} - blt _02380020 - mov r0, #19 - msr CPSR_c, r0 - ldr sp, _23800d4 - mov r0, #18 - msr CPSR_c, r0 - ldr r0, _23800d8 - mov sp, r0 - ldr r1, _23800dc - sub r1, r0, r1 - mov r0, #31 - msr CPSR_fsxc, r0 - sub sp, r1, #4 - ldr r0, _23800e0 - ldr r1, _23800e4 - add r2, r1, #352 ; 0x160 -_02380068: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r1, r2 - bmi _02380068 - ldr r0, _23800e8 - add r2, r1, #32 -_02380080: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r1, r2 - bmi _02380080 - bl FUN_2380100 - ldr r0, _23800ec - ldr r1, [r0, #12] - ldr r2, [r0, #16] - mov r0, #0 -_023800a4: - cmp r1, r2 - strcc r0, [r1], #4 - bcc _023800a4 - bl FUN_238015C - ldr r1, _23800f0 - ldr r0, _23800f4 - str r0, [r1] - ldr r1, _23800f8 - ldr lr, _23800fc - bx r1 -_23800cc: .word SDK_STATIC_BSS_START -_23800d0: .word 0x0380ff00 -_23800d4: .word 0x0380ffc0 -_23800d8: .word 0x0380ff80 -_23800dc: .word 0x00000400 -_23800e0: .word 0x023fe940 -_23800e4: .word 0x027ffa80 -_23800e8: .word 0x023fe904 -_23800ec: .word _2380198 -_23800f0: .word 0x0380fffc -_23800f4: .word 0x037f853c -_23800f8: .word 0x037f8468 -_23800fc: .word 0xffff0000 - arm_func_end _start - - arm_func_start FUN_2380100 -FUN_2380100: - ldr r0, _2380154 - ldr r1, [r0] - ldr r2, [r0, #4] - ldr r3, [r0, #8] -_02380110: - cmp r1, r2 - beq _02380150 - ldr r4, [r1], #4 - ldr r5, [r1], #4 - add r6, r4, r5 -_02380124: - cmp r4, r6 - ldrmi r7, [r3], #4 - strmi r7, [r4], #4 - bmi _02380124 - ldr r5, [r1], #4 - add r6, r4, r5 - mov r7, #0 -_02380140: - cmp r4, r6 - strcc r7, [r4], #4 - bcc _02380140 - beq _02380110 -_02380150: - b ARM7AutoLoad -_2380154: .word _2380198 -ARM7AutoLoad: - bx lr - arm_func_end FUN_2380100 - - arm_func_start FUN_238015C -FUN_238015C: - mov r0, #1 - mov r1, #0 - ldr r2, _2380194 - sub r3, r2, #4194304 ; 0x400000 -_0238016c: - strh r1, [r2] - ldrh ip, [r3] - cmp r1, ip - movne r0, #2 - bne _0238018c - add r1, r1, #1 - cmp r1, #2 - bne _0238016c -_0238018c: - strh r0, [r2] - bx lr -_2380194: .word 0x027ffffa -_2380198: - .word SDK_AUTOLOAD_LIST - .word SDK_AUTOLOAD_LIST_END - .word SDK_AUTOLOAD_START - .word SDK_STATIC_BSS_START - .word SDK_STATIC_BSS_END - arm_func_end FUN_238015C - - .balign 16, 0 - - .global SDK_STATIC_BSS_START - .global SDK_STATIC_BSS_END -SDK_STATIC_BSS_START: -SDK_STATIC_BSS_END: - - .global SDK_AUTOLOAD_START -SDK_AUTOLOAD_START: .section .itcm .incbin "baserom.nds", 0x30D1B0, 0xDC diff --git a/arm7/asm/crt0.s b/arm7/asm/crt0.s new file mode 100644 index 00000000..d25a70dd --- /dev/null +++ b/arm7/asm/crt0.s @@ -0,0 +1,139 @@ + .include "asm/macros.inc" + .include "global.inc" + .global ARM7AutoLoad + + .section .text + arm_func_start _start + +_start: + mov ip, #67108864 ; 0x4000000 + str ip, [ip, #520] ; 0x208 + ldr r1, _23800cc + mov r0, #58720256 ; 0x3800000 + cmp r0, r1 + movpl r1, r0 + ldr r2, _23800d0 + mov r0, #0 +_02380020: + cmp r1, r2 + stmltia r1!, {r0} + blt _02380020 + mov r0, #19 + msr CPSR_c, r0 + ldr sp, _23800d4 + mov r0, #18 + msr CPSR_c, r0 + ldr r0, _23800d8 + mov sp, r0 + ldr r1, _23800dc + sub r1, r0, r1 + mov r0, #31 + msr CPSR_fsxc, r0 + sub sp, r1, #4 + ldr r0, _23800e0 + ldr r1, _23800e4 + add r2, r1, #352 ; 0x160 +_02380068: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r1, r2 + bmi _02380068 + ldr r0, _23800e8 + add r2, r1, #32 +_02380080: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r1, r2 + bmi _02380080 + bl FUN_2380100 + ldr r0, _23800ec + ldr r1, [r0, #12] + ldr r2, [r0, #16] + mov r0, #0 +_023800a4: + cmp r1, r2 + strcc r0, [r1], #4 + bcc _023800a4 + bl FUN_238015C + ldr r1, _23800f0 + ldr r0, _23800f4 + str r0, [r1] + ldr r1, _23800f8 + ldr lr, _23800fc + bx r1 +_23800cc: .word SDK_STATIC_BSS_START +_23800d0: .word 0x0380ff00 +_23800d4: .word 0x0380ffc0 +_23800d8: .word 0x0380ff80 +_23800dc: .word 0x00000400 +_23800e0: .word 0x023fe940 +_23800e4: .word 0x027ffa80 +_23800e8: .word 0x023fe904 +_23800ec: .word _2380198 +_23800f0: .word 0x0380fffc +_23800f4: .word 0x037f853c +_23800f8: .word 0x037f8468 +_23800fc: .word 0xffff0000 + arm_func_end _start + + arm_func_start FUN_2380100 +FUN_2380100: + ldr r0, _2380154 + ldr r1, [r0] + ldr r2, [r0, #4] + ldr r3, [r0, #8] +_02380110: + cmp r1, r2 + beq _02380150 + ldr r4, [r1], #4 + ldr r5, [r1], #4 + add r6, r4, r5 +_02380124: + cmp r4, r6 + ldrmi r7, [r3], #4 + strmi r7, [r4], #4 + bmi _02380124 + ldr r5, [r1], #4 + add r6, r4, r5 + mov r7, #0 +_02380140: + cmp r4, r6 + strcc r7, [r4], #4 + bcc _02380140 + beq _02380110 +_02380150: + b ARM7AutoLoad +_2380154: .word _2380198 +ARM7AutoLoad: + bx lr + arm_func_end FUN_2380100 + + arm_func_start FUN_238015C +FUN_238015C: + mov r0, #1 + mov r1, #0 + ldr r2, _2380194 + sub r3, r2, #4194304 ; 0x400000 +_0238016c: + strh r1, [r2] + ldrh ip, [r3] + cmp r1, ip + movne r0, #2 + bne _0238018c + add r1, r1, #1 + cmp r1, #2 + bne _0238016c +_0238018c: + strh r0, [r2] + bx lr +_2380194: .word 0x027ffffa + arm_func_end FUN_238015C + +_2380198: + .word SDK_AUTOLOAD_LIST + .word SDK_AUTOLOAD_LIST_END + .word SDK_AUTOLOAD_START + .word SDK_STATIC_BSS_START + .word SDK_STATIC_BSS_END + + .balign 16, 0 -- cgit v1.2.3 From 323ac50d810bd5dc0f2c422fafe02cea7947d614 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 17:03:06 -0400 Subject: ARM9 overlay to lcf --- arm9/arm9.lcf | 796 +++++++++++++++++++++++++++++++++++++++++++++++- arm9/asm/arm9overlay.s | 5 - arm9/undefined_syms.txt | 440 +++++++++++++++++++++++++- 3 files changed, 1227 insertions(+), 14 deletions(-) delete mode 100644 arm9/asm/arm9overlay.s diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index dbf326b1..50a9da9c 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -72,6 +72,13 @@ SECTIONS { SDK_SECTION_ARENA_ITCM_START = .; } > .itcm + .dtcm : AT (0x1076A0) { + SDK_AUTOLOAD_DTCM_START = .; + OS_arm9.o (.dtcm) + SDK_AUTOLOAD_DTCM_END = .; + SDK_SECTION_ARENA_DTCM_START = 0x027E0080; + } > .dtcm + .autoload : AT (0x107700) { WRITEW SDK_AUTOLOAD_ITCM_START; WRITEW SDK_AUTOLOAD_ITCM_SIZE; @@ -91,14 +98,787 @@ SECTIONS { } > .footer .overlay : AT (0x107800) { - arm9overlay.o (.text) - } > .overlay + WRITEW 0; + WRITEW SDK_MODULE_00_START; + WRITEW SDK_MODULE_00_SIZE; + WRITEW SDK_MODULE_00_BSSSIZE; + WRITEW SDK_MODULE_00_STATIC_INIT_START; + WRITEW SDK_MODULE_00_STATIC_INIT_END; + WRITEW 0; + WRITEW 0; - .dtcm : AT (0x1076A0) { - SDK_AUTOLOAD_DTCM_START = .; - OS_arm9.o (.dtcm) - SDK_AUTOLOAD_DTCM_END = .; - SDK_SECTION_ARENA_DTCM_START = 0x027E0080; - } > .dtcm + WRITEW 1; + WRITEW SDK_MODULE_01_START; + WRITEW SDK_MODULE_01_SIZE; + WRITEW SDK_MODULE_01_BSSSIZE; + WRITEW SDK_MODULE_01_STATIC_INIT_START; + WRITEW SDK_MODULE_01_STATIC_INIT_END; + WRITEW 1; + WRITEW 0; + + WRITEW 2; + WRITEW SDK_MODULE_02_START; + WRITEW SDK_MODULE_02_SIZE; + WRITEW SDK_MODULE_02_BSSSIZE; + WRITEW SDK_MODULE_02_STATIC_INIT_START; + WRITEW SDK_MODULE_02_STATIC_INIT_END; + WRITEW 2; + WRITEW 0; + + WRITEW 3; + WRITEW SDK_MODULE_03_START; + WRITEW SDK_MODULE_03_SIZE; + WRITEW SDK_MODULE_03_BSSSIZE; + WRITEW SDK_MODULE_03_STATIC_INIT_START; + WRITEW SDK_MODULE_03_STATIC_INIT_END; + WRITEW 3; + WRITEW 0; + + WRITEW 4; + WRITEW SDK_MODULE_04_START; + WRITEW SDK_MODULE_04_SIZE; + WRITEW SDK_MODULE_04_BSSSIZE; + WRITEW SDK_MODULE_04_STATIC_INIT_START; + WRITEW SDK_MODULE_04_STATIC_INIT_END; + WRITEW 4; + WRITEW 0; + + WRITEW 5; + WRITEW SDK_MODULE_05_START; + WRITEW SDK_MODULE_05_SIZE; + WRITEW SDK_MODULE_05_BSSSIZE; + WRITEW SDK_MODULE_05_STATIC_INIT_START; + WRITEW SDK_MODULE_05_STATIC_INIT_END; + WRITEW 5; + WRITEW 0; + + WRITEW 6; + WRITEW SDK_MODULE_06_START; + WRITEW SDK_MODULE_06_SIZE; + WRITEW SDK_MODULE_06_BSSSIZE; + WRITEW SDK_MODULE_06_STATIC_INIT_START; + WRITEW SDK_MODULE_06_STATIC_INIT_END; + WRITEW 6; + WRITEW 0; + + WRITEW 7; + WRITEW SDK_MODULE_07_START; + WRITEW SDK_MODULE_07_SIZE; + WRITEW SDK_MODULE_07_BSSSIZE; + WRITEW SDK_MODULE_07_STATIC_INIT_START; + WRITEW SDK_MODULE_07_STATIC_INIT_END; + WRITEW 7; + WRITEW 0; + + WRITEW 8; + WRITEW SDK_MODULE_08_START; + WRITEW SDK_MODULE_08_SIZE; + WRITEW SDK_MODULE_08_BSSSIZE; + WRITEW SDK_MODULE_08_STATIC_INIT_START; + WRITEW SDK_MODULE_08_STATIC_INIT_END; + WRITEW 8; + WRITEW 0; + + WRITEW 9; + WRITEW SDK_MODULE_09_START; + WRITEW SDK_MODULE_09_SIZE; + WRITEW SDK_MODULE_09_BSSSIZE; + WRITEW SDK_MODULE_09_STATIC_INIT_START; + WRITEW SDK_MODULE_09_STATIC_INIT_END; + WRITEW 9; + WRITEW 0; + + WRITEW 10; + WRITEW SDK_MODULE_10_START; + WRITEW SDK_MODULE_10_SIZE; + WRITEW SDK_MODULE_10_BSSSIZE; + WRITEW SDK_MODULE_10_STATIC_INIT_START; + WRITEW SDK_MODULE_10_STATIC_INIT_END; + WRITEW 10; + WRITEW 0; + + WRITEW 11; + WRITEW SDK_MODULE_11_START; + WRITEW SDK_MODULE_11_SIZE; + WRITEW SDK_MODULE_11_BSSSIZE; + WRITEW SDK_MODULE_11_STATIC_INIT_START; + WRITEW SDK_MODULE_11_STATIC_INIT_END; + WRITEW 11; + WRITEW 0; + + WRITEW 12; + WRITEW SDK_MODULE_12_START; + WRITEW SDK_MODULE_12_SIZE; + WRITEW SDK_MODULE_12_BSSSIZE; + WRITEW SDK_MODULE_12_STATIC_INIT_START; + WRITEW SDK_MODULE_12_STATIC_INIT_END; + WRITEW 12; + WRITEW 0; + + WRITEW 13; + WRITEW SDK_MODULE_13_START; + WRITEW SDK_MODULE_13_SIZE; + WRITEW SDK_MODULE_13_BSSSIZE; + WRITEW SDK_MODULE_13_STATIC_INIT_START; + WRITEW SDK_MODULE_13_STATIC_INIT_END; + WRITEW 13; + WRITEW 0; + + WRITEW 14; + WRITEW SDK_MODULE_14_START; + WRITEW SDK_MODULE_14_SIZE; + WRITEW SDK_MODULE_14_BSSSIZE; + WRITEW SDK_MODULE_14_STATIC_INIT_START; + WRITEW SDK_MODULE_14_STATIC_INIT_END; + WRITEW 14; + WRITEW 0; + + WRITEW 15; + WRITEW SDK_MODULE_15_START; + WRITEW SDK_MODULE_15_SIZE; + WRITEW SDK_MODULE_15_BSSSIZE; + WRITEW SDK_MODULE_15_STATIC_INIT_START; + WRITEW SDK_MODULE_15_STATIC_INIT_END; + WRITEW 15; + WRITEW 0; + + WRITEW 16; + WRITEW SDK_MODULE_16_START; + WRITEW SDK_MODULE_16_SIZE; + WRITEW SDK_MODULE_16_BSSSIZE; + WRITEW SDK_MODULE_16_STATIC_INIT_START; + WRITEW SDK_MODULE_16_STATIC_INIT_END; + WRITEW 16; + WRITEW 0; + + WRITEW 17; + WRITEW SDK_MODULE_17_START; + WRITEW SDK_MODULE_17_SIZE; + WRITEW SDK_MODULE_17_BSSSIZE; + WRITEW SDK_MODULE_17_STATIC_INIT_START; + WRITEW SDK_MODULE_17_STATIC_INIT_END; + WRITEW 17; + WRITEW 0; + + WRITEW 18; + WRITEW SDK_MODULE_18_START; + WRITEW SDK_MODULE_18_SIZE; + WRITEW SDK_MODULE_18_BSSSIZE; + WRITEW SDK_MODULE_18_STATIC_INIT_START; + WRITEW SDK_MODULE_18_STATIC_INIT_END; + WRITEW 18; + WRITEW 0; + + WRITEW 19; + WRITEW SDK_MODULE_19_START; + WRITEW SDK_MODULE_19_SIZE; + WRITEW SDK_MODULE_19_BSSSIZE; + WRITEW SDK_MODULE_19_STATIC_INIT_START; + WRITEW SDK_MODULE_19_STATIC_INIT_END; + WRITEW 19; + WRITEW 0; + + WRITEW 20; + WRITEW SDK_MODULE_20_START; + WRITEW SDK_MODULE_20_SIZE; + WRITEW SDK_MODULE_20_BSSSIZE; + WRITEW SDK_MODULE_20_STATIC_INIT_START; + WRITEW SDK_MODULE_20_STATIC_INIT_END; + WRITEW 20; + WRITEW 0; + + WRITEW 21; + WRITEW SDK_MODULE_21_START; + WRITEW SDK_MODULE_21_SIZE; + WRITEW SDK_MODULE_21_BSSSIZE; + WRITEW SDK_MODULE_21_STATIC_INIT_START; + WRITEW SDK_MODULE_21_STATIC_INIT_END; + WRITEW 21; + WRITEW 0; + + WRITEW 22; + WRITEW SDK_MODULE_22_START; + WRITEW SDK_MODULE_22_SIZE; + WRITEW SDK_MODULE_22_BSSSIZE; + WRITEW SDK_MODULE_22_STATIC_INIT_START; + WRITEW SDK_MODULE_22_STATIC_INIT_END; + WRITEW 22; + WRITEW 0; + + WRITEW 23; + WRITEW SDK_MODULE_23_START; + WRITEW SDK_MODULE_23_SIZE; + WRITEW SDK_MODULE_23_BSSSIZE; + WRITEW SDK_MODULE_23_STATIC_INIT_START; + WRITEW SDK_MODULE_23_STATIC_INIT_END; + WRITEW 23; + WRITEW 0; + + WRITEW 24; + WRITEW SDK_MODULE_24_START; + WRITEW SDK_MODULE_24_SIZE; + WRITEW SDK_MODULE_24_BSSSIZE; + WRITEW SDK_MODULE_24_STATIC_INIT_START; + WRITEW SDK_MODULE_24_STATIC_INIT_END; + WRITEW 24; + WRITEW 0; + + WRITEW 25; + WRITEW SDK_MODULE_25_START; + WRITEW SDK_MODULE_25_SIZE; + WRITEW SDK_MODULE_25_BSSSIZE; + WRITEW SDK_MODULE_25_STATIC_INIT_START; + WRITEW SDK_MODULE_25_STATIC_INIT_END; + WRITEW 25; + WRITEW 0; + + WRITEW 26; + WRITEW SDK_MODULE_26_START; + WRITEW SDK_MODULE_26_SIZE; + WRITEW SDK_MODULE_26_BSSSIZE; + WRITEW SDK_MODULE_26_STATIC_INIT_START; + WRITEW SDK_MODULE_26_STATIC_INIT_END; + WRITEW 26; + WRITEW 0; + + WRITEW 27; + WRITEW SDK_MODULE_27_START; + WRITEW SDK_MODULE_27_SIZE; + WRITEW SDK_MODULE_27_BSSSIZE; + WRITEW SDK_MODULE_27_STATIC_INIT_START; + WRITEW SDK_MODULE_27_STATIC_INIT_END; + WRITEW 27; + WRITEW 0; + + WRITEW 28; + WRITEW SDK_MODULE_28_START; + WRITEW SDK_MODULE_28_SIZE; + WRITEW SDK_MODULE_28_BSSSIZE; + WRITEW SDK_MODULE_28_STATIC_INIT_START; + WRITEW SDK_MODULE_28_STATIC_INIT_END; + WRITEW 28; + WRITEW 0; + + WRITEW 29; + WRITEW SDK_MODULE_29_START; + WRITEW SDK_MODULE_29_SIZE; + WRITEW SDK_MODULE_29_BSSSIZE; + WRITEW SDK_MODULE_29_STATIC_INIT_START; + WRITEW SDK_MODULE_29_STATIC_INIT_END; + WRITEW 29; + WRITEW 0; + + WRITEW 30; + WRITEW SDK_MODULE_30_START; + WRITEW SDK_MODULE_30_SIZE; + WRITEW SDK_MODULE_30_BSSSIZE; + WRITEW SDK_MODULE_30_STATIC_INIT_START; + WRITEW SDK_MODULE_30_STATIC_INIT_END; + WRITEW 30; + WRITEW 0; + + WRITEW 31; + WRITEW SDK_MODULE_31_START; + WRITEW SDK_MODULE_31_SIZE; + WRITEW SDK_MODULE_31_BSSSIZE; + WRITEW SDK_MODULE_31_STATIC_INIT_START; + WRITEW SDK_MODULE_31_STATIC_INIT_END; + WRITEW 31; + WRITEW 0; + + WRITEW 32; + WRITEW SDK_MODULE_32_START; + WRITEW SDK_MODULE_32_SIZE; + WRITEW SDK_MODULE_32_BSSSIZE; + WRITEW SDK_MODULE_32_STATIC_INIT_START; + WRITEW SDK_MODULE_32_STATIC_INIT_END; + WRITEW 32; + WRITEW 0; + + WRITEW 33; + WRITEW SDK_MODULE_33_START; + WRITEW SDK_MODULE_33_SIZE; + WRITEW SDK_MODULE_33_BSSSIZE; + WRITEW SDK_MODULE_33_STATIC_INIT_START; + WRITEW SDK_MODULE_33_STATIC_INIT_END; + WRITEW 33; + WRITEW 0; + + WRITEW 34; + WRITEW SDK_MODULE_34_START; + WRITEW SDK_MODULE_34_SIZE; + WRITEW SDK_MODULE_34_BSSSIZE; + WRITEW SDK_MODULE_34_STATIC_INIT_START; + WRITEW SDK_MODULE_34_STATIC_INIT_END; + WRITEW 34; + WRITEW 0; + + WRITEW 35; + WRITEW SDK_MODULE_35_START; + WRITEW SDK_MODULE_35_SIZE; + WRITEW SDK_MODULE_35_BSSSIZE; + WRITEW SDK_MODULE_35_STATIC_INIT_START; + WRITEW SDK_MODULE_35_STATIC_INIT_END; + WRITEW 35; + WRITEW 0; + + WRITEW 36; + WRITEW SDK_MODULE_36_START; + WRITEW SDK_MODULE_36_SIZE; + WRITEW SDK_MODULE_36_BSSSIZE; + WRITEW SDK_MODULE_36_STATIC_INIT_START; + WRITEW SDK_MODULE_36_STATIC_INIT_END; + WRITEW 36; + WRITEW 0; + + WRITEW 37; + WRITEW SDK_MODULE_37_START; + WRITEW SDK_MODULE_37_SIZE; + WRITEW SDK_MODULE_37_BSSSIZE; + WRITEW SDK_MODULE_37_STATIC_INIT_START; + WRITEW SDK_MODULE_37_STATIC_INIT_END; + WRITEW 37; + WRITEW 0; + WRITEW 38; + WRITEW SDK_MODULE_38_START; + WRITEW SDK_MODULE_38_SIZE; + WRITEW SDK_MODULE_38_BSSSIZE; + WRITEW SDK_MODULE_38_STATIC_INIT_START; + WRITEW SDK_MODULE_38_STATIC_INIT_END; + WRITEW 38; + WRITEW 0; + + WRITEW 39; + WRITEW SDK_MODULE_39_START; + WRITEW SDK_MODULE_39_SIZE; + WRITEW SDK_MODULE_39_BSSSIZE; + WRITEW SDK_MODULE_39_STATIC_INIT_START; + WRITEW SDK_MODULE_39_STATIC_INIT_END; + WRITEW 39; + WRITEW 0; + + WRITEW 40; + WRITEW SDK_MODULE_40_START; + WRITEW SDK_MODULE_40_SIZE; + WRITEW SDK_MODULE_40_BSSSIZE; + WRITEW SDK_MODULE_40_STATIC_INIT_START; + WRITEW SDK_MODULE_40_STATIC_INIT_END; + WRITEW 40; + WRITEW 0; + + WRITEW 41; + WRITEW SDK_MODULE_41_START; + WRITEW SDK_MODULE_41_SIZE; + WRITEW SDK_MODULE_41_BSSSIZE; + WRITEW SDK_MODULE_41_STATIC_INIT_START; + WRITEW SDK_MODULE_41_STATIC_INIT_END; + WRITEW 41; + WRITEW 0; + + WRITEW 42; + WRITEW SDK_MODULE_42_START; + WRITEW SDK_MODULE_42_SIZE; + WRITEW SDK_MODULE_42_BSSSIZE; + WRITEW SDK_MODULE_42_STATIC_INIT_START; + WRITEW SDK_MODULE_42_STATIC_INIT_END; + WRITEW 42; + WRITEW 0; + + WRITEW 43; + WRITEW SDK_MODULE_43_START; + WRITEW SDK_MODULE_43_SIZE; + WRITEW SDK_MODULE_43_BSSSIZE; + WRITEW SDK_MODULE_43_STATIC_INIT_START; + WRITEW SDK_MODULE_43_STATIC_INIT_END; + WRITEW 43; + WRITEW 0; + + WRITEW 44; + WRITEW SDK_MODULE_44_START; + WRITEW SDK_MODULE_44_SIZE; + WRITEW SDK_MODULE_44_BSSSIZE; + WRITEW SDK_MODULE_44_STATIC_INIT_START; + WRITEW SDK_MODULE_44_STATIC_INIT_END; + WRITEW 44; + WRITEW 0; + + WRITEW 45; + WRITEW SDK_MODULE_45_START; + WRITEW SDK_MODULE_45_SIZE; + WRITEW SDK_MODULE_45_BSSSIZE; + WRITEW SDK_MODULE_45_STATIC_INIT_START; + WRITEW SDK_MODULE_45_STATIC_INIT_END; + WRITEW 45; + WRITEW 0; + + WRITEW 46; + WRITEW SDK_MODULE_46_START; + WRITEW SDK_MODULE_46_SIZE; + WRITEW SDK_MODULE_46_BSSSIZE; + WRITEW SDK_MODULE_46_STATIC_INIT_START; + WRITEW SDK_MODULE_46_STATIC_INIT_END; + WRITEW 46; + WRITEW 0; + + WRITEW 47; + WRITEW SDK_MODULE_47_START; + WRITEW SDK_MODULE_47_SIZE; + WRITEW SDK_MODULE_47_BSSSIZE; + WRITEW SDK_MODULE_47_STATIC_INIT_START; + WRITEW SDK_MODULE_47_STATIC_INIT_END; + WRITEW 47; + WRITEW 0; + + WRITEW 48; + WRITEW SDK_MODULE_48_START; + WRITEW SDK_MODULE_48_SIZE; + WRITEW SDK_MODULE_48_BSSSIZE; + WRITEW SDK_MODULE_48_STATIC_INIT_START; + WRITEW SDK_MODULE_48_STATIC_INIT_END; + WRITEW 48; + WRITEW 0; + + WRITEW 49; + WRITEW SDK_MODULE_49_START; + WRITEW SDK_MODULE_49_SIZE; + WRITEW SDK_MODULE_49_BSSSIZE; + WRITEW SDK_MODULE_49_STATIC_INIT_START; + WRITEW SDK_MODULE_49_STATIC_INIT_END; + WRITEW 49; + WRITEW 0; + + WRITEW 50; + WRITEW SDK_MODULE_50_START; + WRITEW SDK_MODULE_50_SIZE; + WRITEW SDK_MODULE_50_BSSSIZE; + WRITEW SDK_MODULE_50_STATIC_INIT_START; + WRITEW SDK_MODULE_50_STATIC_INIT_END; + WRITEW 50; + WRITEW 0; + + WRITEW 51; + WRITEW SDK_MODULE_51_START; + WRITEW SDK_MODULE_51_SIZE; + WRITEW SDK_MODULE_51_BSSSIZE; + WRITEW SDK_MODULE_51_STATIC_INIT_START; + WRITEW SDK_MODULE_51_STATIC_INIT_END; + WRITEW 51; + WRITEW 0; + + WRITEW 52; + WRITEW SDK_MODULE_52_START; + WRITEW SDK_MODULE_52_SIZE; + WRITEW SDK_MODULE_52_BSSSIZE; + WRITEW SDK_MODULE_52_STATIC_INIT_START; + WRITEW SDK_MODULE_52_STATIC_INIT_END; + WRITEW 52; + WRITEW 0; + + WRITEW 53; + WRITEW SDK_MODULE_53_START; + WRITEW SDK_MODULE_53_SIZE; + WRITEW SDK_MODULE_53_BSSSIZE; + WRITEW SDK_MODULE_53_STATIC_INIT_START; + WRITEW SDK_MODULE_53_STATIC_INIT_END; + WRITEW 53; + WRITEW 0; + + WRITEW 54; + WRITEW SDK_MODULE_54_START; + WRITEW SDK_MODULE_54_SIZE; + WRITEW SDK_MODULE_54_BSSSIZE; + WRITEW SDK_MODULE_54_STATIC_INIT_START; + WRITEW SDK_MODULE_54_STATIC_INIT_END; + WRITEW 54; + WRITEW 0; + + WRITEW 55; + WRITEW SDK_MODULE_55_START; + WRITEW SDK_MODULE_55_SIZE; + WRITEW SDK_MODULE_55_BSSSIZE; + WRITEW SDK_MODULE_55_STATIC_INIT_START; + WRITEW SDK_MODULE_55_STATIC_INIT_END; + WRITEW 55; + WRITEW 0; + + WRITEW 56; + WRITEW SDK_MODULE_56_START; + WRITEW SDK_MODULE_56_SIZE; + WRITEW SDK_MODULE_56_BSSSIZE; + WRITEW SDK_MODULE_56_STATIC_INIT_START; + WRITEW SDK_MODULE_56_STATIC_INIT_END; + WRITEW 56; + WRITEW 0; + + WRITEW 57; + WRITEW SDK_MODULE_57_START; + WRITEW SDK_MODULE_57_SIZE; + WRITEW SDK_MODULE_57_BSSSIZE; + WRITEW SDK_MODULE_57_STATIC_INIT_START; + WRITEW SDK_MODULE_57_STATIC_INIT_END; + WRITEW 57; + WRITEW 0; + + WRITEW 58; + WRITEW SDK_MODULE_58_START; + WRITEW SDK_MODULE_58_SIZE; + WRITEW SDK_MODULE_58_BSSSIZE; + WRITEW SDK_MODULE_58_STATIC_INIT_START; + WRITEW SDK_MODULE_58_STATIC_INIT_END; + WRITEW 58; + WRITEW 0; + + WRITEW 59; + WRITEW SDK_MODULE_59_START; + WRITEW SDK_MODULE_59_SIZE; + WRITEW SDK_MODULE_59_BSSSIZE; + WRITEW SDK_MODULE_59_STATIC_INIT_START; + WRITEW SDK_MODULE_59_STATIC_INIT_END; + WRITEW 59; + WRITEW 0; + + WRITEW 60; + WRITEW SDK_MODULE_60_START; + WRITEW SDK_MODULE_60_SIZE; + WRITEW SDK_MODULE_60_BSSSIZE; + WRITEW SDK_MODULE_60_STATIC_INIT_START; + WRITEW SDK_MODULE_60_STATIC_INIT_END; + WRITEW 60; + WRITEW 0; + + WRITEW 61; + WRITEW SDK_MODULE_61_START; + WRITEW SDK_MODULE_61_SIZE; + WRITEW SDK_MODULE_61_BSSSIZE; + WRITEW SDK_MODULE_61_STATIC_INIT_START; + WRITEW SDK_MODULE_61_STATIC_INIT_END; + WRITEW 61; + WRITEW 0; + + WRITEW 62; + WRITEW SDK_MODULE_62_START; + WRITEW SDK_MODULE_62_SIZE; + WRITEW SDK_MODULE_62_BSSSIZE; + WRITEW SDK_MODULE_62_STATIC_INIT_START; + WRITEW SDK_MODULE_62_STATIC_INIT_END; + WRITEW 62; + WRITEW 0; + + WRITEW 63; + WRITEW SDK_MODULE_63_START; + WRITEW SDK_MODULE_63_SIZE; + WRITEW SDK_MODULE_63_BSSSIZE; + WRITEW SDK_MODULE_63_STATIC_INIT_START; + WRITEW SDK_MODULE_63_STATIC_INIT_END; + WRITEW 63; + WRITEW 0; + + WRITEW 64; + WRITEW SDK_MODULE_64_START; + WRITEW SDK_MODULE_64_SIZE; + WRITEW SDK_MODULE_64_BSSSIZE; + WRITEW SDK_MODULE_64_STATIC_INIT_START; + WRITEW SDK_MODULE_64_STATIC_INIT_END; + WRITEW 64; + WRITEW 0; + + WRITEW 65; + WRITEW SDK_MODULE_65_START; + WRITEW SDK_MODULE_65_SIZE; + WRITEW SDK_MODULE_65_BSSSIZE; + WRITEW SDK_MODULE_65_STATIC_INIT_START; + WRITEW SDK_MODULE_65_STATIC_INIT_END; + WRITEW 65; + WRITEW 0; + + WRITEW 66; + WRITEW SDK_MODULE_66_START; + WRITEW SDK_MODULE_66_SIZE; + WRITEW SDK_MODULE_66_BSSSIZE; + WRITEW SDK_MODULE_66_STATIC_INIT_START; + WRITEW SDK_MODULE_66_STATIC_INIT_END; + WRITEW 66; + WRITEW 0; + + WRITEW 67; + WRITEW SDK_MODULE_67_START; + WRITEW SDK_MODULE_67_SIZE; + WRITEW SDK_MODULE_67_BSSSIZE; + WRITEW SDK_MODULE_67_STATIC_INIT_START; + WRITEW SDK_MODULE_67_STATIC_INIT_END; + WRITEW 67; + WRITEW 0; + + WRITEW 68; + WRITEW SDK_MODULE_68_START; + WRITEW SDK_MODULE_68_SIZE; + WRITEW SDK_MODULE_68_BSSSIZE; + WRITEW SDK_MODULE_68_STATIC_INIT_START; + WRITEW SDK_MODULE_68_STATIC_INIT_END; + WRITEW 68; + WRITEW 0; + + WRITEW 69; + WRITEW SDK_MODULE_69_START; + WRITEW SDK_MODULE_69_SIZE; + WRITEW SDK_MODULE_69_BSSSIZE; + WRITEW SDK_MODULE_69_STATIC_INIT_START; + WRITEW SDK_MODULE_69_STATIC_INIT_END; + WRITEW 69; + WRITEW 0; + + WRITEW 70; + WRITEW SDK_MODULE_70_START; + WRITEW SDK_MODULE_70_SIZE; + WRITEW SDK_MODULE_70_BSSSIZE; + WRITEW SDK_MODULE_70_STATIC_INIT_START; + WRITEW SDK_MODULE_70_STATIC_INIT_END; + WRITEW 70; + WRITEW 0; + + WRITEW 71; + WRITEW SDK_MODULE_71_START; + WRITEW SDK_MODULE_71_SIZE; + WRITEW SDK_MODULE_71_BSSSIZE; + WRITEW SDK_MODULE_71_STATIC_INIT_START; + WRITEW SDK_MODULE_71_STATIC_INIT_END; + WRITEW 71; + WRITEW 0; + + WRITEW 72; + WRITEW SDK_MODULE_72_START; + WRITEW SDK_MODULE_72_SIZE; + WRITEW SDK_MODULE_72_BSSSIZE; + WRITEW SDK_MODULE_72_STATIC_INIT_START; + WRITEW SDK_MODULE_72_STATIC_INIT_END; + WRITEW 72; + WRITEW 0; + + WRITEW 73; + WRITEW SDK_MODULE_73_START; + WRITEW SDK_MODULE_73_SIZE; + WRITEW SDK_MODULE_73_BSSSIZE; + WRITEW SDK_MODULE_73_STATIC_INIT_START; + WRITEW SDK_MODULE_73_STATIC_INIT_END; + WRITEW 73; + WRITEW 0; + + WRITEW 74; + WRITEW SDK_MODULE_74_START; + WRITEW SDK_MODULE_74_SIZE; + WRITEW SDK_MODULE_74_BSSSIZE; + WRITEW SDK_MODULE_74_STATIC_INIT_START; + WRITEW SDK_MODULE_74_STATIC_INIT_END; + WRITEW 74; + WRITEW 0; + + WRITEW 75; + WRITEW SDK_MODULE_75_START; + WRITEW SDK_MODULE_75_SIZE; + WRITEW SDK_MODULE_75_BSSSIZE; + WRITEW SDK_MODULE_75_STATIC_INIT_START; + WRITEW SDK_MODULE_75_STATIC_INIT_END; + WRITEW 75; + WRITEW 0; + + WRITEW 76; + WRITEW SDK_MODULE_76_START; + WRITEW SDK_MODULE_76_SIZE; + WRITEW SDK_MODULE_76_BSSSIZE; + WRITEW SDK_MODULE_76_STATIC_INIT_START; + WRITEW SDK_MODULE_76_STATIC_INIT_END; + WRITEW 76; + WRITEW 0; + + WRITEW 77; + WRITEW SDK_MODULE_77_START; + WRITEW SDK_MODULE_77_SIZE; + WRITEW SDK_MODULE_77_BSSSIZE; + WRITEW SDK_MODULE_77_STATIC_INIT_START; + WRITEW SDK_MODULE_77_STATIC_INIT_END; + WRITEW 77; + WRITEW 0; + + WRITEW 78; + WRITEW SDK_MODULE_78_START; + WRITEW SDK_MODULE_78_SIZE; + WRITEW SDK_MODULE_78_BSSSIZE; + WRITEW SDK_MODULE_78_STATIC_INIT_START; + WRITEW SDK_MODULE_78_STATIC_INIT_END; + WRITEW 78; + WRITEW 0; + + WRITEW 79; + WRITEW SDK_MODULE_79_START; + WRITEW SDK_MODULE_79_SIZE; + WRITEW SDK_MODULE_79_BSSSIZE; + WRITEW SDK_MODULE_79_STATIC_INIT_START; + WRITEW SDK_MODULE_79_STATIC_INIT_END; + WRITEW 79; + WRITEW 0; + + WRITEW 80; + WRITEW SDK_MODULE_80_START; + WRITEW SDK_MODULE_80_SIZE; + WRITEW SDK_MODULE_80_BSSSIZE; + WRITEW SDK_MODULE_80_STATIC_INIT_START; + WRITEW SDK_MODULE_80_STATIC_INIT_END; + WRITEW 80; + WRITEW 0; + + WRITEW 81; + WRITEW SDK_MODULE_81_START; + WRITEW SDK_MODULE_81_SIZE; + WRITEW SDK_MODULE_81_BSSSIZE; + WRITEW SDK_MODULE_81_STATIC_INIT_START; + WRITEW SDK_MODULE_81_STATIC_INIT_END; + WRITEW 81; + WRITEW 0; + + WRITEW 82; + WRITEW SDK_MODULE_82_START; + WRITEW SDK_MODULE_82_SIZE; + WRITEW SDK_MODULE_82_BSSSIZE; + WRITEW SDK_MODULE_82_STATIC_INIT_START; + WRITEW SDK_MODULE_82_STATIC_INIT_END; + WRITEW 82; + WRITEW 0; + + WRITEW 83; + WRITEW SDK_MODULE_83_START; + WRITEW SDK_MODULE_83_SIZE; + WRITEW SDK_MODULE_83_BSSSIZE; + WRITEW SDK_MODULE_83_STATIC_INIT_START; + WRITEW SDK_MODULE_83_STATIC_INIT_END; + WRITEW 83; + WRITEW 0; + + WRITEW 84; + WRITEW SDK_MODULE_84_START; + WRITEW SDK_MODULE_84_SIZE; + WRITEW SDK_MODULE_84_BSSSIZE; + WRITEW SDK_MODULE_84_STATIC_INIT_START; + WRITEW SDK_MODULE_84_STATIC_INIT_END; + WRITEW 84; + WRITEW 0; + + WRITEW 85; + WRITEW SDK_MODULE_85_START; + WRITEW SDK_MODULE_85_SIZE; + WRITEW SDK_MODULE_85_BSSSIZE; + WRITEW SDK_MODULE_85_STATIC_INIT_START; + WRITEW SDK_MODULE_85_STATIC_INIT_END; + WRITEW 85; + WRITEW 0; + + WRITEW 86; + WRITEW SDK_MODULE_86_START; + WRITEW SDK_MODULE_86_SIZE; + WRITEW SDK_MODULE_86_BSSSIZE; + WRITEW SDK_MODULE_86_STATIC_INIT_START; + WRITEW SDK_MODULE_86_STATIC_INIT_END; + WRITEW 86; + WRITEW 0; + } > .overlay } diff --git a/arm9/asm/arm9overlay.s b/arm9/asm/arm9overlay.s deleted file mode 100644 index 70356c52..00000000 --- a/arm9/asm/arm9overlay.s +++ /dev/null @@ -1,5 +0,0 @@ - .text - - .global ARM9Overlay -ARM9Overlay: - .incbin "baserom.nds", 0x10B800, 0xAE0 diff --git a/arm9/undefined_syms.txt b/arm9/undefined_syms.txt index 379c1c46..37c87728 100644 --- a/arm9/undefined_syms.txt +++ b/arm9/undefined_syms.txt @@ -517,4 +517,442 @@ SDK_AUTOLOAD_DTCM_BSS_SIZE = 0x00000020; SDK_AUTOLOAD_EXT_START = 0x02400000; SDK_AUTOLOAD_EXT_SIZE = 0x00000000; SDK_AUTOLOAD_EXT_BSS_SIZE = 0x00000000; -SDK_AUTOLOAD_LIST_END = 0x02107724; \ No newline at end of file +SDK_AUTOLOAD_LIST_END = 0x02107724; + +// Overlay + +SDK_MODULE_00_START = 0x021D74E0; +SDK_MODULE_00_SIZE = 0x00000020; +SDK_MODULE_00_BSSSIZE = 0x00000000; +SDK_MODULE_00_STATIC_INIT_START = 0x021D74E0; +SDK_MODULE_00_STATIC_INIT_END = 0x021D74E4; +SDK_MODULE_01_START = 0x021D74E0; +SDK_MODULE_01_SIZE = 0x00000020; +SDK_MODULE_01_BSSSIZE = 0x00000020; +SDK_MODULE_01_STATIC_INIT_START = 0x021D74F0; +SDK_MODULE_01_STATIC_INIT_END = 0x021D74F8; +SDK_MODULE_02_START = 0x021D7520; +SDK_MODULE_02_SIZE = 0x00000020; +SDK_MODULE_02_BSSSIZE = 0x00000000; +SDK_MODULE_02_STATIC_INIT_START = 0x021D7520; +SDK_MODULE_02_STATIC_INIT_END = 0x021D7524; +SDK_MODULE_03_START = 0x01FF8700; +SDK_MODULE_03_SIZE = 0x00000020; +SDK_MODULE_03_BSSSIZE = 0x00000000; +SDK_MODULE_03_STATIC_INIT_START = 0x01FF8700; +SDK_MODULE_03_STATIC_INIT_END = 0x01FF8704; +SDK_MODULE_04_START = 0x021D74E0; +SDK_MODULE_04_SIZE = 0x000386E0; +SDK_MODULE_04_BSSSIZE = 0x000022A0; +SDK_MODULE_04_STATIC_INIT_START = 0x0220BE94; +SDK_MODULE_04_STATIC_INIT_END = 0x0220BE98; +SDK_MODULE_05_START = 0x021D74E0; +SDK_MODULE_05_SIZE = 0x000261A0; +SDK_MODULE_05_BSSSIZE = 0x0003C020; +SDK_MODULE_05_STATIC_INIT_START = 0x021FD1C8; +SDK_MODULE_05_STATIC_INIT_END = 0x021FD1CC; +SDK_MODULE_06_START = 0x022396A0; +SDK_MODULE_06_SIZE = 0x00018D80; +SDK_MODULE_06_BSSSIZE = 0x00000020; +SDK_MODULE_06_STATIC_INIT_START = 0x02252228; +SDK_MODULE_06_STATIC_INIT_END = 0x0225222C; +SDK_MODULE_07_START = 0x02211E60; +SDK_MODULE_07_SIZE = 0x000032E0; +SDK_MODULE_07_BSSSIZE = 0x00000000; +SDK_MODULE_07_STATIC_INIT_START = 0x02215134; +SDK_MODULE_07_STATIC_INIT_END = 0x02215138; +SDK_MODULE_08_START = 0x02211E60; +SDK_MODULE_08_SIZE = 0x0001B760; +SDK_MODULE_08_BSSSIZE = 0x00000000; +SDK_MODULE_08_STATIC_INIT_START = 0x0222D598; +SDK_MODULE_08_STATIC_INIT_END = 0x0222D59C; +SDK_MODULE_09_START = 0x02211E60; +SDK_MODULE_09_SIZE = 0x0000A1A0; +SDK_MODULE_09_BSSSIZE = 0x00000000; +SDK_MODULE_09_STATIC_INIT_START = 0x0221BFE8; +SDK_MODULE_09_STATIC_INIT_END = 0x0221BFEC; +SDK_MODULE_10_START = 0x021D74E0; +SDK_MODULE_10_SIZE = 0x00000020; +SDK_MODULE_10_BSSSIZE = 0x00000000; +SDK_MODULE_10_STATIC_INIT_START = 0x021D74E0; +SDK_MODULE_10_STATIC_INIT_END = 0x021D74E4; +SDK_MODULE_11_START = 0x0222D5C0; +SDK_MODULE_11_SIZE = 0x000329E0; +SDK_MODULE_11_BSSSIZE = 0x00000000; +SDK_MODULE_11_STATIC_INIT_START = 0x0225FF18; +SDK_MODULE_11_STATIC_INIT_END = 0x0225FF20; +SDK_MODULE_12_START = 0x0222D5C0; +SDK_MODULE_12_SIZE = 0x00019260; +SDK_MODULE_12_BSSSIZE = 0x00000000; +SDK_MODULE_12_STATIC_INIT_START = 0x02246810; +SDK_MODULE_12_STATIC_INIT_END = 0x02246818; +SDK_MODULE_13_START = 0x02211E60; +SDK_MODULE_13_SIZE = 0x0002EBE0; +SDK_MODULE_13_BSSSIZE = 0x000027E0; +SDK_MODULE_13_STATIC_INIT_START = 0x0223F768; +SDK_MODULE_13_STATIC_INIT_END = 0x0223F76C; +SDK_MODULE_14_START = 0x021D74E0; +SDK_MODULE_14_SIZE = 0x0000F520; +SDK_MODULE_14_BSSSIZE = 0x000001A0; +SDK_MODULE_14_STATIC_INIT_START = 0x021E69C8; +SDK_MODULE_14_STATIC_INIT_END = 0x021E69CC; +SDK_MODULE_15_START = 0x021D74E0; +SDK_MODULE_15_SIZE = 0x00004680; +SDK_MODULE_15_BSSSIZE = 0x00000000; +SDK_MODULE_15_STATIC_INIT_START = 0x021DBB5C; +SDK_MODULE_15_STATIC_INIT_END = 0x021DBB60; +SDK_MODULE_16_START = 0x021D74E0; +SDK_MODULE_16_SIZE = 0x00028500; +SDK_MODULE_16_BSSSIZE = 0x00000000; +SDK_MODULE_16_STATIC_INIT_START = 0x021FF9C4; +SDK_MODULE_16_STATIC_INIT_END = 0x021FF9C8; +SDK_MODULE_17_START = 0x021D74E0; +SDK_MODULE_17_SIZE = 0x00006E80; +SDK_MODULE_17_BSSSIZE = 0x00000000; +SDK_MODULE_17_STATIC_INIT_START = 0x021DE354; +SDK_MODULE_17_STATIC_INIT_END = 0x021DE358; +SDK_MODULE_18_START = 0x022396A0; +SDK_MODULE_18_SIZE = 0x00017CE0; +SDK_MODULE_18_BSSSIZE = 0x00000080; +SDK_MODULE_18_STATIC_INIT_START = 0x02250858; +SDK_MODULE_18_STATIC_INIT_END = 0x0225085C; +SDK_MODULE_19_START = 0x02252440; +SDK_MODULE_19_SIZE = 0x00000100; +SDK_MODULE_19_BSSSIZE = 0x00000000; +SDK_MODULE_19_STATIC_INIT_START = 0x02252524; +SDK_MODULE_19_STATIC_INIT_END = 0x02252528; +SDK_MODULE_20_START = 0x02252440; +SDK_MODULE_20_SIZE = 0x00002400; +SDK_MODULE_20_BSSSIZE = 0x00000000; +SDK_MODULE_20_STATIC_INIT_START = 0x02254838; +SDK_MODULE_20_STATIC_INIT_END = 0x0225483C; +SDK_MODULE_21_START = 0x02254840; +SDK_MODULE_21_SIZE = 0x000005C0; +SDK_MODULE_21_BSSSIZE = 0x00000000; +SDK_MODULE_21_STATIC_INIT_START = 0x02254DE8; +SDK_MODULE_21_STATIC_INIT_END = 0x02254DF0; +SDK_MODULE_22_START = 0x02254840; +SDK_MODULE_22_SIZE = 0x00000F00; +SDK_MODULE_22_BSSSIZE = 0x00000000; +SDK_MODULE_22_STATIC_INIT_START = 0x02255730; +SDK_MODULE_22_STATIC_INIT_END = 0x02255738; +SDK_MODULE_23_START = 0x02254840; +SDK_MODULE_23_SIZE = 0x00001900; +SDK_MODULE_23_BSSSIZE = 0x00000000; +SDK_MODULE_23_STATIC_INIT_START = 0x02256128; +SDK_MODULE_23_STATIC_INIT_END = 0x02256130; +SDK_MODULE_24_START = 0x02254840; +SDK_MODULE_24_SIZE = 0x000009A0; +SDK_MODULE_24_BSSSIZE = 0x00000000; +SDK_MODULE_24_STATIC_INIT_START = 0x022551C0; +SDK_MODULE_24_STATIC_INIT_END = 0x022551C8; +SDK_MODULE_25_START = 0x02254840; +SDK_MODULE_25_SIZE = 0x00000560; +SDK_MODULE_25_BSSSIZE = 0x00000000; +SDK_MODULE_25_STATIC_INIT_START = 0x02254D80; +SDK_MODULE_25_STATIC_INIT_END = 0x02254D88; +SDK_MODULE_26_START = 0x02254840; +SDK_MODULE_26_SIZE = 0x00000800; +SDK_MODULE_26_BSSSIZE = 0x00000000; +SDK_MODULE_26_STATIC_INIT_START = 0x02255020; +SDK_MODULE_26_STATIC_INIT_END = 0x02255028; +SDK_MODULE_27_START = 0x02254840; +SDK_MODULE_27_SIZE = 0x00000BA0; +SDK_MODULE_27_BSSSIZE = 0x00000000; +SDK_MODULE_27_STATIC_INIT_START = 0x022553C4; +SDK_MODULE_27_STATIC_INIT_END = 0x022553CC; +SDK_MODULE_28_START = 0x02254840; +SDK_MODULE_28_SIZE = 0x00001780; +SDK_MODULE_28_BSSSIZE = 0x00000000; +SDK_MODULE_28_STATIC_INIT_START = 0x02255F18; +SDK_MODULE_28_STATIC_INIT_END = 0x02255F20; +SDK_MODULE_29_START = 0x02254840; +SDK_MODULE_29_SIZE = 0x00000900; +SDK_MODULE_29_BSSSIZE = 0x00000000; +SDK_MODULE_29_STATIC_INIT_START = 0x0225512C; +SDK_MODULE_29_STATIC_INIT_END = 0x02255134; +SDK_MODULE_30_START = 0x02254840; +SDK_MODULE_30_SIZE = 0x00000600; +SDK_MODULE_30_BSSSIZE = 0x00000000; +SDK_MODULE_30_STATIC_INIT_START = 0x02254E28; +SDK_MODULE_30_STATIC_INIT_END = 0x02254E30; +SDK_MODULE_31_START = 0x02254840; +SDK_MODULE_31_SIZE = 0x00000600; +SDK_MODULE_31_BSSSIZE = 0x00000000; +SDK_MODULE_31_STATIC_INIT_START = 0x02254E20; +SDK_MODULE_31_STATIC_INIT_END = 0x02254E28; +SDK_MODULE_32_START = 0x02254840; +SDK_MODULE_32_SIZE = 0x000004A0; +SDK_MODULE_32_BSSSIZE = 0x00000000; +SDK_MODULE_32_STATIC_INIT_START = 0x02254CC4; +SDK_MODULE_32_STATIC_INIT_END = 0x02254CCC; +SDK_MODULE_33_START = 0x02254840; +SDK_MODULE_33_SIZE = 0x00000320; +SDK_MODULE_33_BSSSIZE = 0x00000000; +SDK_MODULE_33_STATIC_INIT_START = 0x02254B40; +SDK_MODULE_33_STATIC_INIT_END = 0x02254B48; +SDK_MODULE_34_START = 0x02254840; +SDK_MODULE_34_SIZE = 0x000004C0; +SDK_MODULE_34_BSSSIZE = 0x00000000; +SDK_MODULE_34_STATIC_INIT_START = 0x02254CF8; +SDK_MODULE_34_STATIC_INIT_END = 0x02254D00; +SDK_MODULE_35_START = 0x02254840; +SDK_MODULE_35_SIZE = 0x000009A0; +SDK_MODULE_35_BSSSIZE = 0x00000000; +SDK_MODULE_35_STATIC_INIT_START = 0x022551C0; +SDK_MODULE_35_STATIC_INIT_END = 0x022551C8; +SDK_MODULE_36_START = 0x02254840; +SDK_MODULE_36_SIZE = 0x00000CC0; +SDK_MODULE_36_BSSSIZE = 0x00000000; +SDK_MODULE_36_STATIC_INIT_START = 0x022554F8; +SDK_MODULE_36_STATIC_INIT_END = 0x02255500; +SDK_MODULE_37_START = 0x02254840; +SDK_MODULE_37_SIZE = 0x00000560; +SDK_MODULE_37_BSSSIZE = 0x00000020; +SDK_MODULE_37_STATIC_INIT_START = 0x02254D90; +SDK_MODULE_37_STATIC_INIT_END = 0x02254D98; +SDK_MODULE_38_START = 0x02254840; +SDK_MODULE_38_SIZE = 0x00000B40; +SDK_MODULE_38_BSSSIZE = 0x00000000; +SDK_MODULE_38_STATIC_INIT_START = 0x02255360; +SDK_MODULE_38_STATIC_INIT_END = 0x02255368; +SDK_MODULE_39_START = 0x02254840; +SDK_MODULE_39_SIZE = 0x00000CC0; +SDK_MODULE_39_BSSSIZE = 0x00000000; +SDK_MODULE_39_STATIC_INIT_START = 0x022554E4; +SDK_MODULE_39_STATIC_INIT_END = 0x022554EC; +SDK_MODULE_40_START = 0x02254840; +SDK_MODULE_40_SIZE = 0x00000C60; +SDK_MODULE_40_BSSSIZE = 0x00000000; +SDK_MODULE_40_STATIC_INIT_START = 0x02255480; +SDK_MODULE_40_STATIC_INIT_END = 0x02255488; +SDK_MODULE_41_START = 0x02254840; +SDK_MODULE_41_SIZE = 0x00001140; +SDK_MODULE_41_BSSSIZE = 0x00000000; +SDK_MODULE_41_STATIC_INIT_START = 0x02255974; +SDK_MODULE_41_STATIC_INIT_END = 0x0225597C; +SDK_MODULE_42_START = 0x02254840; +SDK_MODULE_42_SIZE = 0x00000900; +SDK_MODULE_42_BSSSIZE = 0x00000000; +SDK_MODULE_42_STATIC_INIT_START = 0x0225511C; +SDK_MODULE_42_STATIC_INIT_END = 0x02255124; +SDK_MODULE_43_START = 0x02254840; +SDK_MODULE_43_SIZE = 0x000009C0; +SDK_MODULE_43_BSSSIZE = 0x00000000; +SDK_MODULE_43_STATIC_INIT_START = 0x022551EC; +SDK_MODULE_43_STATIC_INIT_END = 0x022551F4; +SDK_MODULE_44_START = 0x02254840; +SDK_MODULE_44_SIZE = 0x000004A0; +SDK_MODULE_44_BSSSIZE = 0x00000000; +SDK_MODULE_44_STATIC_INIT_START = 0x02254CBC; +SDK_MODULE_44_STATIC_INIT_END = 0x02254CC4; +SDK_MODULE_45_START = 0x02254840; +SDK_MODULE_45_SIZE = 0x00000940; +SDK_MODULE_45_BSSSIZE = 0x00000000; +SDK_MODULE_45_STATIC_INIT_START = 0x02255170; +SDK_MODULE_45_STATIC_INIT_END = 0x02255178; +SDK_MODULE_46_START = 0x02254840; +SDK_MODULE_46_SIZE = 0x00000320; +SDK_MODULE_46_BSSSIZE = 0x00000000; +SDK_MODULE_46_STATIC_INIT_START = 0x02254B40; +SDK_MODULE_46_STATIC_INIT_END = 0x02254B48; +SDK_MODULE_47_START = 0x02254840; +SDK_MODULE_47_SIZE = 0x00000CA0; +SDK_MODULE_47_BSSSIZE = 0x00000000; +SDK_MODULE_47_STATIC_INIT_START = 0x022554BC; +SDK_MODULE_47_STATIC_INIT_END = 0x022554C4; +SDK_MODULE_48_START = 0x02254840; +SDK_MODULE_48_SIZE = 0x000008A0; +SDK_MODULE_48_BSSSIZE = 0x00000000; +SDK_MODULE_48_STATIC_INIT_START = 0x022550D0; +SDK_MODULE_48_STATIC_INIT_END = 0x022550D8; +SDK_MODULE_49_START = 0x02254840; +SDK_MODULE_49_SIZE = 0x00000600; +SDK_MODULE_49_BSSSIZE = 0x00000000; +SDK_MODULE_49_STATIC_INIT_START = 0x02254E20; +SDK_MODULE_49_STATIC_INIT_END = 0x02254E28; +SDK_MODULE_50_START = 0x02254840; +SDK_MODULE_50_SIZE = 0x00000320; +SDK_MODULE_50_BSSSIZE = 0x00000000; +SDK_MODULE_50_STATIC_INIT_START = 0x02254B50; +SDK_MODULE_50_STATIC_INIT_END = 0x02254B58; +SDK_MODULE_51_START = 0x02254840; +SDK_MODULE_51_SIZE = 0x00000FC0; +SDK_MODULE_51_BSSSIZE = 0x00000020; +SDK_MODULE_51_STATIC_INIT_START = 0x022557E0; +SDK_MODULE_51_STATIC_INIT_END = 0x022557E4; +SDK_MODULE_52_START = 0x021D74E0; +SDK_MODULE_52_SIZE = 0x00000400; +SDK_MODULE_52_BSSSIZE = 0x00000000; +SDK_MODULE_52_STATIC_INIT_START = 0x021D78D0; +SDK_MODULE_52_STATIC_INIT_END = 0x021D78D4; +SDK_MODULE_53_START = 0x021D74E0; +SDK_MODULE_53_SIZE = 0x00002480; +SDK_MODULE_53_BSSSIZE = 0x00000000; +SDK_MODULE_53_STATIC_INIT_START = 0x021D9888; +SDK_MODULE_53_STATIC_INIT_END = 0x021D988C; +SDK_MODULE_54_START = 0x021D74E0; +SDK_MODULE_54_SIZE = 0x00002380; +SDK_MODULE_54_BSSSIZE = 0x00000000; +SDK_MODULE_54_STATIC_INIT_START = 0x021D97D4; +SDK_MODULE_54_STATIC_INIT_END = 0x021D97D8; +SDK_MODULE_55_START = 0x021D74E0; +SDK_MODULE_55_SIZE = 0x00003040; +SDK_MODULE_55_BSSSIZE = 0x00000000; +SDK_MODULE_55_STATIC_INIT_START = 0x021DA480; +SDK_MODULE_55_STATIC_INIT_END = 0x021DA484; +SDK_MODULE_56_START = 0x02211E60; +SDK_MODULE_56_SIZE = 0x000047A0; +SDK_MODULE_56_BSSSIZE = 0x00000000; +SDK_MODULE_56_STATIC_INIT_START = 0x0221647C; +SDK_MODULE_56_STATIC_INIT_END = 0x02216480; +SDK_MODULE_57_START = 0x021D74E0; +SDK_MODULE_57_SIZE = 0x00002540; +SDK_MODULE_57_BSSSIZE = 0x00000000; +SDK_MODULE_57_STATIC_INIT_START = 0x021D9A10; +SDK_MODULE_57_STATIC_INIT_END = 0x021D9A14; +SDK_MODULE_58_START = 0x021D9A20; +SDK_MODULE_58_SIZE = 0x000015A0; +SDK_MODULE_58_BSSSIZE = 0x00000000; +SDK_MODULE_58_STATIC_INIT_START = 0x021DAF94; +SDK_MODULE_58_STATIC_INIT_END = 0x021DAF98; +SDK_MODULE_59_START = 0x021D74E0; +SDK_MODULE_59_SIZE = 0x00002C20; +SDK_MODULE_59_BSSSIZE = 0x00000000; +SDK_MODULE_59_STATIC_INIT_START = 0x021DA0FC; +SDK_MODULE_59_STATIC_INIT_END = 0x021DA100; +SDK_MODULE_60_START = 0x021D74E0; +SDK_MODULE_60_SIZE = 0x00000D00; +SDK_MODULE_60_BSSSIZE = 0x00000000; +SDK_MODULE_60_STATIC_INIT_START = 0x021D81D8; +SDK_MODULE_60_STATIC_INIT_END = 0x021D81DC; +SDK_MODULE_61_START = 0x021D74E0; +SDK_MODULE_61_SIZE = 0x00001080; +SDK_MODULE_61_BSSSIZE = 0x00000000; +SDK_MODULE_61_STATIC_INIT_START = 0x021D8554; +SDK_MODULE_61_STATIC_INIT_END = 0x021D8558; +SDK_MODULE_62_START = 0x0222D5C0; +SDK_MODULE_62_SIZE = 0x00003DE0; +SDK_MODULE_62_BSSSIZE = 0x00000000; +SDK_MODULE_62_STATIC_INIT_START = 0x02231380; +SDK_MODULE_62_STATIC_INIT_END = 0x02231388; +SDK_MODULE_63_START = 0x021D74E0; +SDK_MODULE_63_SIZE = 0x00004AC0; +SDK_MODULE_63_BSSSIZE = 0x00000020; +SDK_MODULE_63_STATIC_INIT_START = 0x021DBF20; +SDK_MODULE_63_STATIC_INIT_END = 0x021DBF24; +SDK_MODULE_64_START = 0x021D74E0; +SDK_MODULE_64_SIZE = 0x00001C40; +SDK_MODULE_64_BSSSIZE = 0x00000000; +SDK_MODULE_64_STATIC_INIT_START = 0x021D9110; +SDK_MODULE_64_STATIC_INIT_END = 0x021D9114; +SDK_MODULE_65_START = 0x021D74E0; +SDK_MODULE_65_SIZE = 0x00003000; +SDK_MODULE_65_BSSSIZE = 0x00000000; +SDK_MODULE_65_STATIC_INIT_START = 0x021DA428; +SDK_MODULE_65_STATIC_INIT_END = 0x021DA42C; +SDK_MODULE_66_START = 0x021D74E0; +SDK_MODULE_66_SIZE = 0x00002660; +SDK_MODULE_66_BSSSIZE = 0x00000000; +SDK_MODULE_66_STATIC_INIT_START = 0x021D9A9C; +SDK_MODULE_66_STATIC_INIT_END = 0x021D9AA0; +SDK_MODULE_67_START = 0x021D74E0; +SDK_MODULE_67_SIZE = 0x00002440; +SDK_MODULE_67_BSSSIZE = 0x00000000; +SDK_MODULE_67_STATIC_INIT_START = 0x021D9918; +SDK_MODULE_67_STATIC_INIT_END = 0x021D991C; +SDK_MODULE_68_START = 0x021D74E0; +SDK_MODULE_68_SIZE = 0x00001600; +SDK_MODULE_68_BSSSIZE = 0x00000000; +SDK_MODULE_68_STATIC_INIT_START = 0x021D8AD4; +SDK_MODULE_68_STATIC_INIT_END = 0x021D8AD8; +SDK_MODULE_69_START = 0x0222D5C0; +SDK_MODULE_69_SIZE = 0x000023A0; +SDK_MODULE_69_BSSSIZE = 0x00000020; +SDK_MODULE_69_STATIC_INIT_START = 0x0222F93C; +SDK_MODULE_69_STATIC_INIT_END = 0x0222F940; +SDK_MODULE_70_START = 0x021D74E0; +SDK_MODULE_70_SIZE = 0x00000E20; +SDK_MODULE_70_BSSSIZE = 0x00000000; +SDK_MODULE_70_STATIC_INIT_START = 0x021D82DC; +SDK_MODULE_70_STATIC_INIT_END = 0x021D82E0; +SDK_MODULE_71_START = 0x0222D5C0; +SDK_MODULE_71_SIZE = 0x00003EC0; +SDK_MODULE_71_BSSSIZE = 0x00000000; +SDK_MODULE_71_STATIC_INIT_START = 0x0223147C; +SDK_MODULE_71_STATIC_INIT_END = 0x02231480; +SDK_MODULE_72_START = 0x021D74E0; +SDK_MODULE_72_SIZE = 0x00000020; +SDK_MODULE_72_BSSSIZE = 0x00000000; +SDK_MODULE_72_STATIC_INIT_START = 0x021D74E0; +SDK_MODULE_72_STATIC_INIT_END = 0x021D74E4; +SDK_MODULE_73_START = 0x021D74E0; +SDK_MODULE_73_SIZE = 0x00004AE0; +SDK_MODULE_73_BSSSIZE = 0x00000000; +SDK_MODULE_73_STATIC_INIT_START = 0x021DBF70; +SDK_MODULE_73_STATIC_INIT_END = 0x021DBF74; +SDK_MODULE_74_START = 0x021D74E0; +SDK_MODULE_74_SIZE = 0x00001220; +SDK_MODULE_74_BSSSIZE = 0x00000000; +SDK_MODULE_74_STATIC_INIT_START = 0x021D8664; +SDK_MODULE_74_STATIC_INIT_END = 0x021D8668; +SDK_MODULE_75_START = 0x021E6BA0; +SDK_MODULE_75_SIZE = 0x00005DE0; +SDK_MODULE_75_BSSSIZE = 0x00000000; +SDK_MODULE_75_STATIC_INIT_START = 0x021EC97C; +SDK_MODULE_75_STATIC_INIT_END = 0x021EC980; +SDK_MODULE_76_START = 0x021D74E0; +SDK_MODULE_76_SIZE = 0x00001E20; +SDK_MODULE_76_BSSSIZE = 0x00000000; +SDK_MODULE_76_STATIC_INIT_START = 0x021D92E0; +SDK_MODULE_76_STATIC_INIT_END = 0x021D92E4; +SDK_MODULE_77_START = 0x021D74E0; +SDK_MODULE_77_SIZE = 0x00001BE0; +SDK_MODULE_77_BSSSIZE = 0x00000000; +SDK_MODULE_77_STATIC_INIT_START = 0x021D90AC; +SDK_MODULE_77_STATIC_INIT_END = 0x021D90B0; +SDK_MODULE_78_START = 0x021D74E0; +SDK_MODULE_78_SIZE = 0x00000460; +SDK_MODULE_78_BSSSIZE = 0x00000000; +SDK_MODULE_78_STATIC_INIT_START = 0x021D78F8; +SDK_MODULE_78_STATIC_INIT_END = 0x021D78FC; +SDK_MODULE_79_START = 0x02211E60; +SDK_MODULE_79_SIZE = 0x000052C0; +SDK_MODULE_79_BSSSIZE = 0x00000040; +SDK_MODULE_79_STATIC_INIT_START = 0x02216748; +SDK_MODULE_79_STATIC_INIT_END = 0x0221674C; +SDK_MODULE_80_START = 0x0222D5C0; +SDK_MODULE_80_SIZE = 0x0000A720; +SDK_MODULE_80_BSSSIZE = 0x00000160; +SDK_MODULE_80_STATIC_INIT_START = 0x02237670; +SDK_MODULE_80_STATIC_INIT_END = 0x02237674; +SDK_MODULE_81_START = 0x02237E40; +SDK_MODULE_81_SIZE = 0x00005580; +SDK_MODULE_81_BSSSIZE = 0x000000A0; +SDK_MODULE_81_STATIC_INIT_START = 0x0223D39C; +SDK_MODULE_81_STATIC_INIT_END = 0x0223D3A0; +SDK_MODULE_82_START = 0x0222D5C0; +SDK_MODULE_82_SIZE = 0x00002540; +SDK_MODULE_82_BSSSIZE = 0x00000120; +SDK_MODULE_82_STATIC_INIT_START = 0x0222F8CC; +SDK_MODULE_82_STATIC_INIT_END = 0x0222F8D0; +SDK_MODULE_83_START = 0x0222D5C0; +SDK_MODULE_83_SIZE = 0x0000E2A0; +SDK_MODULE_83_BSSSIZE = 0x00001980; +SDK_MODULE_83_STATIC_INIT_START = 0x0223A77C; +SDK_MODULE_83_STATIC_INIT_END = 0x0223A780; +SDK_MODULE_84_START = 0x021D74E0; +SDK_MODULE_84_SIZE = 0x00003920; +SDK_MODULE_84_BSSSIZE = 0x00000000; +SDK_MODULE_84_STATIC_INIT_START = 0x021DADE4; +SDK_MODULE_84_STATIC_INIT_END = 0x021DADE8; +SDK_MODULE_85_START = 0x021D74E0; +SDK_MODULE_85_SIZE = 0x00009100; +SDK_MODULE_85_BSSSIZE = 0x00000000; +SDK_MODULE_85_STATIC_INIT_START = 0x021E05A0; +SDK_MODULE_85_STATIC_INIT_END = 0x021E05A4; +SDK_MODULE_86_START = 0x021D74E0; +SDK_MODULE_86_SIZE = 0x00000820; +SDK_MODULE_86_BSSSIZE = 0x00000000; +SDK_MODULE_86_STATIC_INIT_START = 0x021D7CE4; +SDK_MODULE_86_STATIC_INIT_END = 0x021D7CE8; -- cgit v1.2.3 From f57996cc27d8df4643e1d257fce90f30f518710f Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 17:08:30 -0400 Subject: arm9 data files to arm9/data --- arm9/asm/rom2.s | 7 - arm9/asm/rom2_2.s | 734 ----------------------------------------------------- arm9/data/rom2.s | 7 + arm9/data/rom2_2.s | 734 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 741 insertions(+), 741 deletions(-) delete mode 100644 arm9/asm/rom2.s delete mode 100644 arm9/asm/rom2_2.s create mode 100644 arm9/data/rom2.s create mode 100644 arm9/data/rom2_2.s diff --git a/arm9/asm/rom2.s b/arm9/asm/rom2.s deleted file mode 100644 index 0f18b45a..00000000 --- a/arm9/asm/rom2.s +++ /dev/null @@ -1,7 +0,0 @@ - - .include "asm/macros.inc" - .include "global.inc" - - .data - -.incbin "baserom.nds", 0xF0710, 0x3F8 ; this does not seem to be code diff --git a/arm9/asm/rom2_2.s b/arm9/asm/rom2_2.s deleted file mode 100644 index d5055773..00000000 --- a/arm9/asm/rom2_2.s +++ /dev/null @@ -1,734 +0,0 @@ -.include "asm/macros.inc" -.include "global.inc" - -/* rom2.s TODO: Disassemble */ - -.section .data - -.incbin "baserom.nds", 0xF0B50, 0x6A0C - - .global gScriptCmdTable -gScriptCmdTable: ; 0x020F355C - .word FUN_020399A0 - .word FUN_020399A4 - .word FUN_020399A8 - .word FUN_020399B4 - .word FUN_02039A28 - .word FUN_02039A40 - .word FUN_02039A5C - .word FUN_02039A78 - .word FUN_02039A90 - .word FUN_02039AAC - .word FUN_02039ACC - .word FUN_02039AF8 - .word FUN_02039B28 - .word FUN_02039B50 - .word FUN_02039B78 - .word FUN_02039BA0 - .word FUN_02039BBC - .word FUN_02039BDC - .word FUN_02039C08 - .word FUN_02039C40 - .word FUN_02039C78 - .word FUN_02039CE4 - .word FUN_02039CF8 - .word FUN_02039D10 - .word FUN_02039D48 - .word FUN_02039D78 - .word FUN_02039DAC - .word FUN_02039DC4 - .word FUN_02039DD0 - .word FUN_02039E04 - .word FUN_02039E38 - .word FUN_02039E50 - .word FUN_02039E68 - .word FUN_02039E84 - .word FUN_02039EC0 - .word FUN_02039EE8 - .word FUN_02039F0C - .word FUN_02039F30 - .word FUN_02039F58 - .word FUN_02039F88 - .word FUN_02039FB8 - .word FUN_02039FDC - .word FUN_0203A00C - .word FUN_0203A038 - .word FUN_0203A2C4 - .word FUN_0203A304 - .word FUN_0203A388 - .word FUN_0203A400 - .word FUN_0203A45C - .word FUN_0203A4D0 - .word FUN_0203A560 - .word FUN_0203A590 - .word FUN_0203A5D8 - .word FUN_0203A608 - .word FUN_0203A780 - .word FUN_0203A830 - .word FUN_0203A85C - .word FUN_0203A878 - .word FUN_0203A8B8 - .word FUN_0203A9F0 - .word FUN_0203AA90 - .word FUN_0203A630 - .word FUN_0203AAA0 - .word FUN_0203DEA8 - .word FUN_0203AB8C - .word FUN_0203AC14 - .word FUN_0203AC9C - .word FUN_0203AD08 - .word FUN_0203ADC4 - .word FUN_0203AE4C - .word FUN_0203AED4 - .word FUN_0203AF34 - .word FUN_0203AF58 - .word FUN_020414E0 - .word FUN_020414FC - .word FUN_02041518 - .word FUN_02041558 - .word FUN_02041588 - .word FUN_020415AC - .word FUN_020415BC - .word FUN_020413E8 - .word FUN_020413F8 - .word FUN_0204140C - .word FUN_02041424 - .word FUN_0204143C - .word FUN_02041478 - .word FUN_0204149C - .word FUN_020414B8 - .word FUN_020414CC - .word FUN_020415E0 - .word FUN_02041618 - .word FUN_02041644 - .word FUN_02041650 - .word FUN_02041664 - .word FUN_0203AFC4 - .word FUN_0203B148 - .word FUN_0203B1F0 - .word FUN_0203B3B0 - .word FUN_0203B3C0 - .word FUN_0203B3DC - .word FUN_0203B3F8 - .word FUN_0203B440 - .word FUN_0203B468 - .word FUN_0203B500 - .word FUN_0203B544 - .word FUN_0203B574 - .word FUN_0203B5B8 - .word FUN_0203B640 - .word FUN_0203B724 - .word FUN_0203B758 - .word FUN_0203B7D8 - .word FUN_02043C6C - .word FUN_02043C90 - .word FUN_02043CE4 - .word FUN_02043D78 - .word FUN_02043DC8 - .word FUN_02043DE0 - .word FUN_02043A44 - .word FUN_02043A94 - .word FUN_02043AAC - .word FUN_02043ACC - .word FUN_02043AFC - .word FUN_02043B28 - .word FUN_02045784 - .word FUN_020457DC - .word FUN_02045834 - .word FUN_0204588C - .word FUN_020458E4 - .word FUN_02045918 - .word FUN_02045950 - .word FUN_02045954 - .word FUN_02045958 - .word FUN_020459AC - .word FUN_020459E8 - .word FUN_02045A3C - .word FUN_02045A78 - .word FUN_02045ACC - .word FUN_02045B08 - .word FUN_02045B44 - .word FUN_02045B80 - .word FUN_02045BC8 - .word FUN_02045C04 - .word FUN_02045C40 - .word FUN_02045C7C - .word FUN_02045CD4 - .word FUN_02045D10 - .word FUN_02045D4C - .word FUN_0203B81C - .word FUN_0203B85C - .word FUN_0203B8A0 - .word FUN_020442BC - .word FUN_02044414 - .word FUN_0204449C - .word FUN_020444F4 - .word FUN_02044598 - .word FUN_0203BB34 - .word FUN_0203BB80 - .word FUN_0203BB84 - .word FUN_0203BB88 - .word FUN_0203BB8C - .word FUN_02045264 - .word FUN_0203BC1C - .word FUN_0203BCBC - .word FUN_0203BCCC - .word FUN_0203BCD8 - .word FUN_0203BF20 - .word FUN_0203BF2C - .word FUN_0203BF84 - .word FUN_0203BFEC - .word FUN_0203C118 - .word FUN_0203C12C - .word FUN_0203C278 - .word FUN_0203C2C4 - .word FUN_0203C2E0 - .word FUN_0203C2F0 - .word FUN_0203C300 - .word FUN_0203C32C - .word FUN_0203C33C - .word FUN_0203C368 - .word FUN_0203C3C8 - .word FUN_0203C3E8 - .word FUN_0203C430 - .word FUN_020416A8 - .word FUN_02041770 - .word FUN_020417E0 - .word FUN_02041808 - .word FUN_0203C4F0 - .word FUN_0203C520 - .word FUN_0203C6C4 - .word FUN_0203C70C - .word FUN_0203C730 - .word FUN_0203C844 - .word FUN_0203C874 - .word FUN_0203C8B4 - .word FUN_0203C8E4 - .word FUN_0203C930 - .word FUN_0203C960 - .word FUN_0203C990 - .word FUN_0203CA20 - .word FUN_0203CA2C - .word FUN_0203CA5C - .word FUN_0203CB08 - .word FUN_0203CB20 - .word FUN_0203CB48 - .word FUN_0203CB60 - .word FUN_020406CC - .word FUN_02040700 - .word FUN_02040724 - .word FUN_02040748 - .word FUN_02040790 - .word FUN_020407C8 - .word FUN_02040800 - .word FUN_0204083C - .word FUN_02040874 - .word FUN_0204091C - .word FUN_020409C0 - .word FUN_020409F8 - .word FUN_02040A30 - .word FUN_02040A7C - .word FUN_02040B0C - .word FUN_02040B5C - .word FUN_02040BAC - .word FUN_0203CBBC - .word FUN_02040BFC - .word FUN_02040C34 - .word FUN_02040C6C - .word FUN_02040CA4 - .word FUN_0203CB70 - .word FUN_0204185C - .word FUN_0204188C - .word FUN_0203CBE8 - .word FUN_02041970 - .word FUN_020419F8 - .word FUN_02041A80 - .word FUN_02041AB4 - .word FUN_02041AD4 - .word FUN_02041AE0 - .word FUN_02041B10 - .word FUN_02041B70 - .word FUN_02041B9C - .word FUN_02041BC4 - .word FUN_02041BF0 - .word FUN_0203CC88 - .word FUN_0203CD20 - .word FUN_0203CDB8 - .word FUN_0203CDC4 - .word FUN_0203CDD0 - .word FUN_0203CE00 - .word FUN_0203FE90 - .word FUN_0203FEC0 - .word FUN_0203FF10 - .word FUN_02040028 - .word FUN_02040074 - .word FUN_020400C8 - .word FUN_0204011C - .word FUN_02040170 - .word FUN_020401CC - .word FUN_02040204 - .word FUN_02040220 - .word FUN_0204025C - .word FUN_02040298 - .word FUN_020402D4 - .word FUN_02040304 - .word FUN_02040340 - .word FUN_02040370 - .word FUN_020403A0 - .word FUN_020403D0 - .word FUN_02040414 - .word FUN_02040458 - .word FUN_020404FC - .word FUN_0204052C - .word FUN_0204056C - .word FUN_02040488 - .word FUN_020405CC - .word FUN_020405F8 - .word FUN_02040638 - .word FUN_0204064C - .word FUN_02040660 - .word FUN_020406C0 - .word FUN_0204059C - .word FUN_020405B4 - .word FUN_02044CE0 - .word FUN_02044D44 - .word FUN_0203CE0C - .word FUN_0203CE8C - .word FUN_0203CEBC - .word FUN_0203CF04 - .word FUN_0203CF34 - .word FUN_0203CF64 - .word FUN_0203CF94 - .word FUN_0203CFC4 - .word FUN_0203CFC8 - .word FUN_0203D050 - .word FUN_0203D0F8 - .word FUN_0203D134 - .word FUN_0203D140 - .word FUN_0203D150 - .word FUN_0203D178 - .word FUN_0203D194 - .word FUN_0203D1A4 - .word FUN_0203D1C0 - .word FUN_0203D214 - .word FUN_0203C054 - .word FUN_0203C090 - .word FUN_0203C0CC - .word FUN_0203D23C - .word FUN_0203D248 - .word FUN_0203D278 - .word FUN_0203D2A4 - .word FUN_0203D2E4 - .word FUN_0203D330 - .word FUN_0203D33C - .word FUN_0203D36C - .word FUN_0203D3A4 - .word FUN_0203D60C - .word FUN_0203D61C - .word FUN_0203D3DC - .word FUN_0203D448 - .word FUN_0203D458 - .word FUN_0203D490 - .word FUN_0203D528 - .word FUN_0203D5B0 - .word FUN_0203D5F8 - .word FUN_0203D630 - .word FUN_0203D66C - .word FUN_0203D6C4 - .word FUN_0203D560 - .word FUN_0203FCF4 - .word FUN_0203FDBC - .word FUN_0203FE08 - .word FUN_0203FE48 - .word FUN_0203D868 - .word FUN_0203D874 - .word FUN_0203D8A0 - .word FUN_0203D8D0 - .word FUN_0203D8E8 - .word FUN_0203D8EC - .word FUN_0203D938 - .word FUN_0203D948 - .word FUN_0203D728 - .word FUN_0203D738 - .word FUN_0203D774 - .word FUN_0203D834 - .word FUN_020453F4 - .word FUN_02045424 - .word FUN_02045438 - .word FUN_02045468 - .word FUN_02045484 - .word FUN_020454CC - .word FUN_0204552C - .word FUN_02045500 - .word FUN_0204557C - .word FUN_02045590 - .word FUN_020455BC - .word FUN_020455D0 - .word FUN_020455E4 - .word FUN_02045610 - .word FUN_02045624 - .word FUN_02045638 - .word FUN_02045664 - .word FUN_0203DC00 - .word FUN_0203DC58 - .word FUN_0203DC70 - .word FUN_0203DC88 - .word FUN_0203DCA0 - .word FUN_02043E00 - .word FUN_02043E20 - .word FUN_0203DCB8 - .word FUN_0203DCC8 - .word FUN_0203DCD8 - .word FUN_0203DCE8 - .word FUN_0203DCF8 - .word FUN_0203DD08 - .word FUN_0203DD18 - .word FUN_0203DD34 - .word FUN_02044B00 - .word FUN_0203C460 - .word FUN_0203C4B0 - .word FUN_0203D958 - .word FUN_02040D04 - .word FUN_02040D7C - .word FUN_02042B0C - .word FUN_02042B40 - .word FUN_02042B74 - .word FUN_02042BA8 - .word FUN_02042BDC - .word FUN_02042C10 - .word FUN_02042C44 - .word FUN_02042C8C - .word FUN_02042CBC - .word FUN_0203D998 - .word FUN_0203D9E8 - .word FUN_0203DA78 - .word FUN_0203DAB0 - .word FUN_0203DAE8 - .word FUN_0203DB38 - .word FUN_0203DB88 - .word FUN_0203AB44 - .word FUN_0203AB74 - .word FUN_0203DBD4 - .word FUN_0203A484 - .word FUN_0203B8E4 - .word FUN_0203B944 - .word FUN_0203B968 - .word FUN_0203B9B4 - .word FUN_0203BA3C - .word FUN_0203BAB0 - .word FUN_0203BAF4 - .word FUN_0204434C - .word FUN_020443A8 - .word FUN_02044B2C - .word FUN_02044B84 - .word FUN_02044C0C - .word FUN_02044C88 - .word FUN_0203DD60 - .word FUN_0203DE00 - .word FUN_0203DE4C - .word FUN_0203DE58 - .word FUN_0203DE80 - .word FUN_02043CB4 - .word FUN_02043E9C - .word FUN_02044120 - .word FUN_02044138 - .word FUN_0204413C - .word FUN_02043E50 - .word FUN_02043E68 - .word FUN_02043EFC - .word FUN_02043D28 - .word FUN_0203DD50 - .word FUN_02044140 - .word FUN_02043F50 - .word FUN_02043FA0 - .word FUN_02043FF4 - .word FUN_0203DEC4 - .word FUN_0203DEF8 - .word FUN_0203DF2C - .word FUN_0203DF38 - .word FUN_0203DF64 - .word FUN_0203DF84 - .word FUN_0203DFA8 - .word FUN_0203DFE0 - .word FUN_0204488C - .word FUN_020448D4 - .word FUN_020449A4 - .word FUN_02044034 - .word FUN_0203B618 - .word FUN_020440C0 - .word FUN_020440F0 - .word FUN_02044F58 - .word FUN_0203E018 - .word FUN_0203E054 - .word FUN_0203E078 - .word FUN_0203E0CC - .word FUN_0203E120 - .word FUN_02045D88 - .word FUN_02045DD0 - .word FUN_02044D8C - .word FUN_02044E34 - .word FUN_02044E78 - .word FUN_02040E4C - .word FUN_0203E138 - .word FUN_0203E168 - .word FUN_0203E254 - .word FUN_02045678 - .word FUN_020456D4 - .word FUN_0204572C - .word FUN_0203E258 - .word FUN_0203E29C - .word FUN_0203E2F8 - .word FUN_0203E35C - .word FUN_0203E38C - .word FUN_0203C174 - .word FUN_0203C1AC - .word FUN_0203C200 - .word FUN_02042354 - .word FUN_02042364 - .word FUN_02042394 - .word FUN_020423B0 - .word FUN_02042700 - .word FUN_02042780 - .word FUN_020427A8 - .word FUN_020427D0 - .word FUN_02042864 - .word FUN_02042894 - .word FUN_020428E0 - .word FUN_0203E4F0 - .word FUN_0203E510 - .word FUN_0203E568 - .word FUN_0203E3D0 - .word FUN_0203E408 - .word FUN_0203E440 - .word FUN_0203E470 - .word FUN_0203E4A0 - .word FUN_0203E4B0 - .word FUN_02044ED8 - .word FUN_0203E4D8 - .word FUN_02044F20 - .word FUN_02045268 - .word FUN_02045398 - .word FUN_0204539C - .word FUN_020452B4 - .word FUN_02045308 - .word FUN_0204469C - .word FUN_02044658 - .word FUN_0203BC2C - .word FUN_02039A10 - .word FUN_0203A04C - .word FUN_0203A098 - .word FUN_0203A0FC - .word FUN_0203A13C - .word FUN_0203A188 - .word FUN_0203A210 - .word FUN_0203C7F4 - .word FUN_0203C820 - .word FUN_0203E5DC - .word FUN_0203C788 - .word FUN_0203C7E4 - .word FUN_0203C0FC - .word FUN_0203E674 - .word FUN_0203BD08 - .word FUN_0203BD28 - .word FUN_0203BE50 - .word FUN_0203BECC - .word FUN_0203BF00 - .word FUN_0203A3C4 - .word FUN_0203E684 - .word FUN_0203E6B4 - .word FUN_0203E6C4 - .word FUN_0203E6FC - .word FUN_0203E72C - .word FUN_0204478C - .word FUN_02044800 - .word FUN_0203E744 - .word FUN_02044158 - .word FUN_0204416C - .word FUN_02044198 - .word FUN_0203E774 - .word FUN_0203E7F0 - .word FUN_0203E81C - .word FUN_0203E848 - .word FUN_0203E858 - .word FUN_02041C38 - .word FUN_02045E1C - .word FUN_02045E20 - .word FUN_02045EE0 - .word FUN_02045EE4 - .word FUN_02045F84 - .word FUN_02045F88 - .word FUN_02045F24 - .word FUN_02045FCC - .word FUN_0203E870 - .word FUN_0203E894 - .word FUN_0203E8C4 - .word FUN_0203E8F4 - .word FUN_0203E928 - .word FUN_0203E940 - .word FUN_0203E954 - .word FUN_0203E968 - .word FUN_02044FE8 - .word FUN_0204505C - .word FUN_02045104 - .word FUN_02045170 - .word FUN_02040EB4 - .word FUN_0203E9CC - .word FUN_0203EA68 - .word FUN_02041E40 - .word FUN_02041FDC - .word FUN_02042038 - .word FUN_02042110 - .word FUN_0203EA90 - .word FUN_0203EAB0 - .word FUN_0203EB20 - .word FUN_0203EB48 - .word FUN_0203EB88 - .word FUN_02042D1C - .word FUN_02046010 - .word FUN_0204601C - .word FUN_02046028 - .word FUN_0204602C - .word FUN_0203C5BC - .word FUN_0203C614 - .word FUN_0203C680 - .word FUN_0203EBC8 - .word FUN_02044A6C - .word FUN_02044A94 - .word FUN_0203EBE4 - .word FUN_0203ECAC - .word FUN_0203ECD8 - .word FUN_0203ECF4 - .word FUN_0203ED10 - .word FUN_02041194 - .word FUN_020411C4 - .word FUN_02041340 - .word FUN_02040964 - .word FUN_0203ED70 - .word FUN_0204387C - .word FUN_020438D0 - .word FUN_02043918 - .word FUN_020439B4 - .word FUN_0203FE80 - .word FUN_0203EDA4 - .word FUN_0203EDC8 - .word FUN_0203EDE0 - .word FUN_0203EE08 - .word FUN_0203EE18 - .word FUN_0203EE28 - .word FUN_0203EE58 - .word FUN_0203EE68 - .word FUN_0203EE78 - .word FUN_02040DB4 - .word FUN_0203EE98 - .word FUN_0203EED8 - .word FUN_0203EF58 - .word FUN_0203F00C - .word FUN_0203F020 - .word FUN_0203F034 - .word FUN_0203F058 - .word FUN_0203F07C - .word FUN_0203F110 - .word FUN_0203F174 - .word FUN_0203F19C - .word FUN_0203A288 - .word FUN_0203F234 - .word FUN_0203F254 - .word FUN_0203F26C - .word FUN_0203C58C - .word FUN_02040DEC - .word FUN_0203F2AC - .word FUN_02043B84 - .word FUN_0203F2E4 - .word FUN_02043C28 - .word FUN_0203F31C - .word FUN_02044730 - .word FUN_0203F348 - .word FUN_0203F38C - .word FUN_0203F39C - .word FUN_0204214C - .word FUN_0203F3AC - .word FUN_0203F44C - .word FUN_0203F418 - .word FUN_020408BC - .word FUN_02044A0C - .word FUN_0203F484 - .word FUN_02041674 - .word FUN_0203F4D8 - .word FUN_0203F508 - .word FUN_0203F5D4 - .word FUN_0203F604 - .word FUN_0203F634 - .word FUN_0203F664 - .word FUN_0203F6E4 - .word FUN_0203F720 - .word FUN_0203BDB8 - .word FUN_0203BE68 - .word FUN_0203BE80 - .word FUN_0203F760 - .word FUN_0203F7C8 - .word FUN_0203F80C - .word FUN_0203F880 - .word FUN_0203F924 - .word FUN_02042950 - .word FUN_02042980 - .word FUN_02042998 - .word FUN_020429B8 - .word FUN_020429E8 - .word FUN_02042A18 - .word FUN_02042A48 - .word FUN_02042A98 - .word FUN_0203D7DC - .word FUN_0203ACC4 - .word FUN_0203F8C0 - .word FUN_0203F954 - .word FUN_0204190C - .word FUN_0203B024 - .word FUN_0203F9DC - .word FUN_0203F988 - .word FUN_0203F9B0 - .word FUN_0203B914 - .word FUN_020453A0 - .word FUN_0203FA14 - .word FUN_02043B54 - .word FUN_02043BD0 - .word FUN_0203FA58 - .word FUN_0203B7F0 - .word FUN_0203FB4C - .word FUN_0203B790 - .word FUN_020413C0 - .word FUN_0203FB64 - .word FUN_0203FB94 - .word FUN_0203FBA0 - .word FUN_0203FBAC - .word FUN_02040EF8 - .word FUN_0203B2E0 - .word FUN_0203FBBC - .word FUN_0203FC1C - .word FUN_020451D0 - .word FUN_02042000 - .word FUN_0203AD54 - .word FUN_0203D4E8 - .word FUN_0203D920 - .word FUN_02041B40 - .word FUN_0203D0A4 - .word FUN_0203FC58 - .word FUN_0203CAE8 - .word FUN_0203A340 - .word FUN_0203FC80 - .word FUN_0203FCB0 - .word FUN_0203FCDC - .word FUN_02040F34 - .word FUN_02040F6C - .word FUN_02040FA4 - .word FUN_02040FDC - .word FUN_02041014 - .word FUN_0204104C - .word FUN_02041094 - .word FUN_020410C8 - .word FUN_02041100 - .word FUN_02041138 - .word FUN_02041174 - .word FUN_0203AF84 - .word FUN_0203AFA4 - -.incbin "baserom.nds", 0xF80A0, 0x12F00 diff --git a/arm9/data/rom2.s b/arm9/data/rom2.s new file mode 100644 index 00000000..0f18b45a --- /dev/null +++ b/arm9/data/rom2.s @@ -0,0 +1,7 @@ + + .include "asm/macros.inc" + .include "global.inc" + + .data + +.incbin "baserom.nds", 0xF0710, 0x3F8 ; this does not seem to be code diff --git a/arm9/data/rom2_2.s b/arm9/data/rom2_2.s new file mode 100644 index 00000000..d5055773 --- /dev/null +++ b/arm9/data/rom2_2.s @@ -0,0 +1,734 @@ +.include "asm/macros.inc" +.include "global.inc" + +/* rom2.s TODO: Disassemble */ + +.section .data + +.incbin "baserom.nds", 0xF0B50, 0x6A0C + + .global gScriptCmdTable +gScriptCmdTable: ; 0x020F355C + .word FUN_020399A0 + .word FUN_020399A4 + .word FUN_020399A8 + .word FUN_020399B4 + .word FUN_02039A28 + .word FUN_02039A40 + .word FUN_02039A5C + .word FUN_02039A78 + .word FUN_02039A90 + .word FUN_02039AAC + .word FUN_02039ACC + .word FUN_02039AF8 + .word FUN_02039B28 + .word FUN_02039B50 + .word FUN_02039B78 + .word FUN_02039BA0 + .word FUN_02039BBC + .word FUN_02039BDC + .word FUN_02039C08 + .word FUN_02039C40 + .word FUN_02039C78 + .word FUN_02039CE4 + .word FUN_02039CF8 + .word FUN_02039D10 + .word FUN_02039D48 + .word FUN_02039D78 + .word FUN_02039DAC + .word FUN_02039DC4 + .word FUN_02039DD0 + .word FUN_02039E04 + .word FUN_02039E38 + .word FUN_02039E50 + .word FUN_02039E68 + .word FUN_02039E84 + .word FUN_02039EC0 + .word FUN_02039EE8 + .word FUN_02039F0C + .word FUN_02039F30 + .word FUN_02039F58 + .word FUN_02039F88 + .word FUN_02039FB8 + .word FUN_02039FDC + .word FUN_0203A00C + .word FUN_0203A038 + .word FUN_0203A2C4 + .word FUN_0203A304 + .word FUN_0203A388 + .word FUN_0203A400 + .word FUN_0203A45C + .word FUN_0203A4D0 + .word FUN_0203A560 + .word FUN_0203A590 + .word FUN_0203A5D8 + .word FUN_0203A608 + .word FUN_0203A780 + .word FUN_0203A830 + .word FUN_0203A85C + .word FUN_0203A878 + .word FUN_0203A8B8 + .word FUN_0203A9F0 + .word FUN_0203AA90 + .word FUN_0203A630 + .word FUN_0203AAA0 + .word FUN_0203DEA8 + .word FUN_0203AB8C + .word FUN_0203AC14 + .word FUN_0203AC9C + .word FUN_0203AD08 + .word FUN_0203ADC4 + .word FUN_0203AE4C + .word FUN_0203AED4 + .word FUN_0203AF34 + .word FUN_0203AF58 + .word FUN_020414E0 + .word FUN_020414FC + .word FUN_02041518 + .word FUN_02041558 + .word FUN_02041588 + .word FUN_020415AC + .word FUN_020415BC + .word FUN_020413E8 + .word FUN_020413F8 + .word FUN_0204140C + .word FUN_02041424 + .word FUN_0204143C + .word FUN_02041478 + .word FUN_0204149C + .word FUN_020414B8 + .word FUN_020414CC + .word FUN_020415E0 + .word FUN_02041618 + .word FUN_02041644 + .word FUN_02041650 + .word FUN_02041664 + .word FUN_0203AFC4 + .word FUN_0203B148 + .word FUN_0203B1F0 + .word FUN_0203B3B0 + .word FUN_0203B3C0 + .word FUN_0203B3DC + .word FUN_0203B3F8 + .word FUN_0203B440 + .word FUN_0203B468 + .word FUN_0203B500 + .word FUN_0203B544 + .word FUN_0203B574 + .word FUN_0203B5B8 + .word FUN_0203B640 + .word FUN_0203B724 + .word FUN_0203B758 + .word FUN_0203B7D8 + .word FUN_02043C6C + .word FUN_02043C90 + .word FUN_02043CE4 + .word FUN_02043D78 + .word FUN_02043DC8 + .word FUN_02043DE0 + .word FUN_02043A44 + .word FUN_02043A94 + .word FUN_02043AAC + .word FUN_02043ACC + .word FUN_02043AFC + .word FUN_02043B28 + .word FUN_02045784 + .word FUN_020457DC + .word FUN_02045834 + .word FUN_0204588C + .word FUN_020458E4 + .word FUN_02045918 + .word FUN_02045950 + .word FUN_02045954 + .word FUN_02045958 + .word FUN_020459AC + .word FUN_020459E8 + .word FUN_02045A3C + .word FUN_02045A78 + .word FUN_02045ACC + .word FUN_02045B08 + .word FUN_02045B44 + .word FUN_02045B80 + .word FUN_02045BC8 + .word FUN_02045C04 + .word FUN_02045C40 + .word FUN_02045C7C + .word FUN_02045CD4 + .word FUN_02045D10 + .word FUN_02045D4C + .word FUN_0203B81C + .word FUN_0203B85C + .word FUN_0203B8A0 + .word FUN_020442BC + .word FUN_02044414 + .word FUN_0204449C + .word FUN_020444F4 + .word FUN_02044598 + .word FUN_0203BB34 + .word FUN_0203BB80 + .word FUN_0203BB84 + .word FUN_0203BB88 + .word FUN_0203BB8C + .word FUN_02045264 + .word FUN_0203BC1C + .word FUN_0203BCBC + .word FUN_0203BCCC + .word FUN_0203BCD8 + .word FUN_0203BF20 + .word FUN_0203BF2C + .word FUN_0203BF84 + .word FUN_0203BFEC + .word FUN_0203C118 + .word FUN_0203C12C + .word FUN_0203C278 + .word FUN_0203C2C4 + .word FUN_0203C2E0 + .word FUN_0203C2F0 + .word FUN_0203C300 + .word FUN_0203C32C + .word FUN_0203C33C + .word FUN_0203C368 + .word FUN_0203C3C8 + .word FUN_0203C3E8 + .word FUN_0203C430 + .word FUN_020416A8 + .word FUN_02041770 + .word FUN_020417E0 + .word FUN_02041808 + .word FUN_0203C4F0 + .word FUN_0203C520 + .word FUN_0203C6C4 + .word FUN_0203C70C + .word FUN_0203C730 + .word FUN_0203C844 + .word FUN_0203C874 + .word FUN_0203C8B4 + .word FUN_0203C8E4 + .word FUN_0203C930 + .word FUN_0203C960 + .word FUN_0203C990 + .word FUN_0203CA20 + .word FUN_0203CA2C + .word FUN_0203CA5C + .word FUN_0203CB08 + .word FUN_0203CB20 + .word FUN_0203CB48 + .word FUN_0203CB60 + .word FUN_020406CC + .word FUN_02040700 + .word FUN_02040724 + .word FUN_02040748 + .word FUN_02040790 + .word FUN_020407C8 + .word FUN_02040800 + .word FUN_0204083C + .word FUN_02040874 + .word FUN_0204091C + .word FUN_020409C0 + .word FUN_020409F8 + .word FUN_02040A30 + .word FUN_02040A7C + .word FUN_02040B0C + .word FUN_02040B5C + .word FUN_02040BAC + .word FUN_0203CBBC + .word FUN_02040BFC + .word FUN_02040C34 + .word FUN_02040C6C + .word FUN_02040CA4 + .word FUN_0203CB70 + .word FUN_0204185C + .word FUN_0204188C + .word FUN_0203CBE8 + .word FUN_02041970 + .word FUN_020419F8 + .word FUN_02041A80 + .word FUN_02041AB4 + .word FUN_02041AD4 + .word FUN_02041AE0 + .word FUN_02041B10 + .word FUN_02041B70 + .word FUN_02041B9C + .word FUN_02041BC4 + .word FUN_02041BF0 + .word FUN_0203CC88 + .word FUN_0203CD20 + .word FUN_0203CDB8 + .word FUN_0203CDC4 + .word FUN_0203CDD0 + .word FUN_0203CE00 + .word FUN_0203FE90 + .word FUN_0203FEC0 + .word FUN_0203FF10 + .word FUN_02040028 + .word FUN_02040074 + .word FUN_020400C8 + .word FUN_0204011C + .word FUN_02040170 + .word FUN_020401CC + .word FUN_02040204 + .word FUN_02040220 + .word FUN_0204025C + .word FUN_02040298 + .word FUN_020402D4 + .word FUN_02040304 + .word FUN_02040340 + .word FUN_02040370 + .word FUN_020403A0 + .word FUN_020403D0 + .word FUN_02040414 + .word FUN_02040458 + .word FUN_020404FC + .word FUN_0204052C + .word FUN_0204056C + .word FUN_02040488 + .word FUN_020405CC + .word FUN_020405F8 + .word FUN_02040638 + .word FUN_0204064C + .word FUN_02040660 + .word FUN_020406C0 + .word FUN_0204059C + .word FUN_020405B4 + .word FUN_02044CE0 + .word FUN_02044D44 + .word FUN_0203CE0C + .word FUN_0203CE8C + .word FUN_0203CEBC + .word FUN_0203CF04 + .word FUN_0203CF34 + .word FUN_0203CF64 + .word FUN_0203CF94 + .word FUN_0203CFC4 + .word FUN_0203CFC8 + .word FUN_0203D050 + .word FUN_0203D0F8 + .word FUN_0203D134 + .word FUN_0203D140 + .word FUN_0203D150 + .word FUN_0203D178 + .word FUN_0203D194 + .word FUN_0203D1A4 + .word FUN_0203D1C0 + .word FUN_0203D214 + .word FUN_0203C054 + .word FUN_0203C090 + .word FUN_0203C0CC + .word FUN_0203D23C + .word FUN_0203D248 + .word FUN_0203D278 + .word FUN_0203D2A4 + .word FUN_0203D2E4 + .word FUN_0203D330 + .word FUN_0203D33C + .word FUN_0203D36C + .word FUN_0203D3A4 + .word FUN_0203D60C + .word FUN_0203D61C + .word FUN_0203D3DC + .word FUN_0203D448 + .word FUN_0203D458 + .word FUN_0203D490 + .word FUN_0203D528 + .word FUN_0203D5B0 + .word FUN_0203D5F8 + .word FUN_0203D630 + .word FUN_0203D66C + .word FUN_0203D6C4 + .word FUN_0203D560 + .word FUN_0203FCF4 + .word FUN_0203FDBC + .word FUN_0203FE08 + .word FUN_0203FE48 + .word FUN_0203D868 + .word FUN_0203D874 + .word FUN_0203D8A0 + .word FUN_0203D8D0 + .word FUN_0203D8E8 + .word FUN_0203D8EC + .word FUN_0203D938 + .word FUN_0203D948 + .word FUN_0203D728 + .word FUN_0203D738 + .word FUN_0203D774 + .word FUN_0203D834 + .word FUN_020453F4 + .word FUN_02045424 + .word FUN_02045438 + .word FUN_02045468 + .word FUN_02045484 + .word FUN_020454CC + .word FUN_0204552C + .word FUN_02045500 + .word FUN_0204557C + .word FUN_02045590 + .word FUN_020455BC + .word FUN_020455D0 + .word FUN_020455E4 + .word FUN_02045610 + .word FUN_02045624 + .word FUN_02045638 + .word FUN_02045664 + .word FUN_0203DC00 + .word FUN_0203DC58 + .word FUN_0203DC70 + .word FUN_0203DC88 + .word FUN_0203DCA0 + .word FUN_02043E00 + .word FUN_02043E20 + .word FUN_0203DCB8 + .word FUN_0203DCC8 + .word FUN_0203DCD8 + .word FUN_0203DCE8 + .word FUN_0203DCF8 + .word FUN_0203DD08 + .word FUN_0203DD18 + .word FUN_0203DD34 + .word FUN_02044B00 + .word FUN_0203C460 + .word FUN_0203C4B0 + .word FUN_0203D958 + .word FUN_02040D04 + .word FUN_02040D7C + .word FUN_02042B0C + .word FUN_02042B40 + .word FUN_02042B74 + .word FUN_02042BA8 + .word FUN_02042BDC + .word FUN_02042C10 + .word FUN_02042C44 + .word FUN_02042C8C + .word FUN_02042CBC + .word FUN_0203D998 + .word FUN_0203D9E8 + .word FUN_0203DA78 + .word FUN_0203DAB0 + .word FUN_0203DAE8 + .word FUN_0203DB38 + .word FUN_0203DB88 + .word FUN_0203AB44 + .word FUN_0203AB74 + .word FUN_0203DBD4 + .word FUN_0203A484 + .word FUN_0203B8E4 + .word FUN_0203B944 + .word FUN_0203B968 + .word FUN_0203B9B4 + .word FUN_0203BA3C + .word FUN_0203BAB0 + .word FUN_0203BAF4 + .word FUN_0204434C + .word FUN_020443A8 + .word FUN_02044B2C + .word FUN_02044B84 + .word FUN_02044C0C + .word FUN_02044C88 + .word FUN_0203DD60 + .word FUN_0203DE00 + .word FUN_0203DE4C + .word FUN_0203DE58 + .word FUN_0203DE80 + .word FUN_02043CB4 + .word FUN_02043E9C + .word FUN_02044120 + .word FUN_02044138 + .word FUN_0204413C + .word FUN_02043E50 + .word FUN_02043E68 + .word FUN_02043EFC + .word FUN_02043D28 + .word FUN_0203DD50 + .word FUN_02044140 + .word FUN_02043F50 + .word FUN_02043FA0 + .word FUN_02043FF4 + .word FUN_0203DEC4 + .word FUN_0203DEF8 + .word FUN_0203DF2C + .word FUN_0203DF38 + .word FUN_0203DF64 + .word FUN_0203DF84 + .word FUN_0203DFA8 + .word FUN_0203DFE0 + .word FUN_0204488C + .word FUN_020448D4 + .word FUN_020449A4 + .word FUN_02044034 + .word FUN_0203B618 + .word FUN_020440C0 + .word FUN_020440F0 + .word FUN_02044F58 + .word FUN_0203E018 + .word FUN_0203E054 + .word FUN_0203E078 + .word FUN_0203E0CC + .word FUN_0203E120 + .word FUN_02045D88 + .word FUN_02045DD0 + .word FUN_02044D8C + .word FUN_02044E34 + .word FUN_02044E78 + .word FUN_02040E4C + .word FUN_0203E138 + .word FUN_0203E168 + .word FUN_0203E254 + .word FUN_02045678 + .word FUN_020456D4 + .word FUN_0204572C + .word FUN_0203E258 + .word FUN_0203E29C + .word FUN_0203E2F8 + .word FUN_0203E35C + .word FUN_0203E38C + .word FUN_0203C174 + .word FUN_0203C1AC + .word FUN_0203C200 + .word FUN_02042354 + .word FUN_02042364 + .word FUN_02042394 + .word FUN_020423B0 + .word FUN_02042700 + .word FUN_02042780 + .word FUN_020427A8 + .word FUN_020427D0 + .word FUN_02042864 + .word FUN_02042894 + .word FUN_020428E0 + .word FUN_0203E4F0 + .word FUN_0203E510 + .word FUN_0203E568 + .word FUN_0203E3D0 + .word FUN_0203E408 + .word FUN_0203E440 + .word FUN_0203E470 + .word FUN_0203E4A0 + .word FUN_0203E4B0 + .word FUN_02044ED8 + .word FUN_0203E4D8 + .word FUN_02044F20 + .word FUN_02045268 + .word FUN_02045398 + .word FUN_0204539C + .word FUN_020452B4 + .word FUN_02045308 + .word FUN_0204469C + .word FUN_02044658 + .word FUN_0203BC2C + .word FUN_02039A10 + .word FUN_0203A04C + .word FUN_0203A098 + .word FUN_0203A0FC + .word FUN_0203A13C + .word FUN_0203A188 + .word FUN_0203A210 + .word FUN_0203C7F4 + .word FUN_0203C820 + .word FUN_0203E5DC + .word FUN_0203C788 + .word FUN_0203C7E4 + .word FUN_0203C0FC + .word FUN_0203E674 + .word FUN_0203BD08 + .word FUN_0203BD28 + .word FUN_0203BE50 + .word FUN_0203BECC + .word FUN_0203BF00 + .word FUN_0203A3C4 + .word FUN_0203E684 + .word FUN_0203E6B4 + .word FUN_0203E6C4 + .word FUN_0203E6FC + .word FUN_0203E72C + .word FUN_0204478C + .word FUN_02044800 + .word FUN_0203E744 + .word FUN_02044158 + .word FUN_0204416C + .word FUN_02044198 + .word FUN_0203E774 + .word FUN_0203E7F0 + .word FUN_0203E81C + .word FUN_0203E848 + .word FUN_0203E858 + .word FUN_02041C38 + .word FUN_02045E1C + .word FUN_02045E20 + .word FUN_02045EE0 + .word FUN_02045EE4 + .word FUN_02045F84 + .word FUN_02045F88 + .word FUN_02045F24 + .word FUN_02045FCC + .word FUN_0203E870 + .word FUN_0203E894 + .word FUN_0203E8C4 + .word FUN_0203E8F4 + .word FUN_0203E928 + .word FUN_0203E940 + .word FUN_0203E954 + .word FUN_0203E968 + .word FUN_02044FE8 + .word FUN_0204505C + .word FUN_02045104 + .word FUN_02045170 + .word FUN_02040EB4 + .word FUN_0203E9CC + .word FUN_0203EA68 + .word FUN_02041E40 + .word FUN_02041FDC + .word FUN_02042038 + .word FUN_02042110 + .word FUN_0203EA90 + .word FUN_0203EAB0 + .word FUN_0203EB20 + .word FUN_0203EB48 + .word FUN_0203EB88 + .word FUN_02042D1C + .word FUN_02046010 + .word FUN_0204601C + .word FUN_02046028 + .word FUN_0204602C + .word FUN_0203C5BC + .word FUN_0203C614 + .word FUN_0203C680 + .word FUN_0203EBC8 + .word FUN_02044A6C + .word FUN_02044A94 + .word FUN_0203EBE4 + .word FUN_0203ECAC + .word FUN_0203ECD8 + .word FUN_0203ECF4 + .word FUN_0203ED10 + .word FUN_02041194 + .word FUN_020411C4 + .word FUN_02041340 + .word FUN_02040964 + .word FUN_0203ED70 + .word FUN_0204387C + .word FUN_020438D0 + .word FUN_02043918 + .word FUN_020439B4 + .word FUN_0203FE80 + .word FUN_0203EDA4 + .word FUN_0203EDC8 + .word FUN_0203EDE0 + .word FUN_0203EE08 + .word FUN_0203EE18 + .word FUN_0203EE28 + .word FUN_0203EE58 + .word FUN_0203EE68 + .word FUN_0203EE78 + .word FUN_02040DB4 + .word FUN_0203EE98 + .word FUN_0203EED8 + .word FUN_0203EF58 + .word FUN_0203F00C + .word FUN_0203F020 + .word FUN_0203F034 + .word FUN_0203F058 + .word FUN_0203F07C + .word FUN_0203F110 + .word FUN_0203F174 + .word FUN_0203F19C + .word FUN_0203A288 + .word FUN_0203F234 + .word FUN_0203F254 + .word FUN_0203F26C + .word FUN_0203C58C + .word FUN_02040DEC + .word FUN_0203F2AC + .word FUN_02043B84 + .word FUN_0203F2E4 + .word FUN_02043C28 + .word FUN_0203F31C + .word FUN_02044730 + .word FUN_0203F348 + .word FUN_0203F38C + .word FUN_0203F39C + .word FUN_0204214C + .word FUN_0203F3AC + .word FUN_0203F44C + .word FUN_0203F418 + .word FUN_020408BC + .word FUN_02044A0C + .word FUN_0203F484 + .word FUN_02041674 + .word FUN_0203F4D8 + .word FUN_0203F508 + .word FUN_0203F5D4 + .word FUN_0203F604 + .word FUN_0203F634 + .word FUN_0203F664 + .word FUN_0203F6E4 + .word FUN_0203F720 + .word FUN_0203BDB8 + .word FUN_0203BE68 + .word FUN_0203BE80 + .word FUN_0203F760 + .word FUN_0203F7C8 + .word FUN_0203F80C + .word FUN_0203F880 + .word FUN_0203F924 + .word FUN_02042950 + .word FUN_02042980 + .word FUN_02042998 + .word FUN_020429B8 + .word FUN_020429E8 + .word FUN_02042A18 + .word FUN_02042A48 + .word FUN_02042A98 + .word FUN_0203D7DC + .word FUN_0203ACC4 + .word FUN_0203F8C0 + .word FUN_0203F954 + .word FUN_0204190C + .word FUN_0203B024 + .word FUN_0203F9DC + .word FUN_0203F988 + .word FUN_0203F9B0 + .word FUN_0203B914 + .word FUN_020453A0 + .word FUN_0203FA14 + .word FUN_02043B54 + .word FUN_02043BD0 + .word FUN_0203FA58 + .word FUN_0203B7F0 + .word FUN_0203FB4C + .word FUN_0203B790 + .word FUN_020413C0 + .word FUN_0203FB64 + .word FUN_0203FB94 + .word FUN_0203FBA0 + .word FUN_0203FBAC + .word FUN_02040EF8 + .word FUN_0203B2E0 + .word FUN_0203FBBC + .word FUN_0203FC1C + .word FUN_020451D0 + .word FUN_02042000 + .word FUN_0203AD54 + .word FUN_0203D4E8 + .word FUN_0203D920 + .word FUN_02041B40 + .word FUN_0203D0A4 + .word FUN_0203FC58 + .word FUN_0203CAE8 + .word FUN_0203A340 + .word FUN_0203FC80 + .word FUN_0203FCB0 + .word FUN_0203FCDC + .word FUN_02040F34 + .word FUN_02040F6C + .word FUN_02040FA4 + .word FUN_02040FDC + .word FUN_02041014 + .word FUN_0204104C + .word FUN_02041094 + .word FUN_020410C8 + .word FUN_02041100 + .word FUN_02041138 + .word FUN_02041174 + .word FUN_0203AF84 + .word FUN_0203AFA4 + +.incbin "baserom.nds", 0xF80A0, 0x12F00 -- cgit v1.2.3 From 399c07bb0deaedc9bdf38fdd92757fd619e85b63 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 17:47:06 -0400 Subject: Move overlay module files to arm9.bin --- arm7/arm7.sha1 | 1 + arm9/Makefile | 9 +- arm9/arm9.lcf | 676 +++++++++++++++++++++++++++++++++++++++++------ arm9/arm9.sha1 | 1 + arm9/files/FILE_10C400.s | 4 + arm9/files/FILE_10C600.s | 4 + arm9/files/FILE_10C800.s | 4 + arm9/files/FILE_10CA00.s | 4 + arm9/files/FILE_10CC00.s | 4 + arm9/files/FILE_145400.s | 4 + arm9/files/FILE_16B600.s | 4 + arm9/files/FILE_184400.s | 4 + arm9/files/FILE_187800.s | 4 + arm9/files/FILE_1A3000.s | 4 + arm9/files/FILE_1AD200.s | 4 + arm9/files/FILE_1AD400.s | 4 + arm9/files/FILE_1DFE00.s | 4 + arm9/files/FILE_1F9200.s | 4 + arm9/files/FILE_227E00.s | 4 + arm9/files/FILE_237400.s | 4 + arm9/files/FILE_23BC00.s | 4 + arm9/files/FILE_264200.s | 4 + arm9/files/FILE_26B200.s | 4 + arm9/files/FILE_283000.s | 4 + arm9/files/FILE_283200.s | 4 + arm9/files/FILE_285600.s | 4 + arm9/files/FILE_285C00.s | 4 + arm9/files/FILE_286C00.s | 4 + arm9/files/FILE_288600.s | 4 + arm9/files/FILE_289000.s | 4 + arm9/files/FILE_289600.s | 4 + arm9/files/FILE_289E00.s | 4 + arm9/files/FILE_28AA00.s | 4 + arm9/files/FILE_28C200.s | 4 + arm9/files/FILE_28CC00.s | 4 + arm9/files/FILE_28D200.s | 4 + arm9/files/FILE_28D800.s | 4 + arm9/files/FILE_28DE00.s | 4 + arm9/files/FILE_28E200.s | 4 + arm9/files/FILE_28E800.s | 4 + arm9/files/FILE_28F200.s | 4 + arm9/files/FILE_290000.s | 4 + arm9/files/FILE_290600.s | 4 + arm9/files/FILE_291200.s | 4 + arm9/files/FILE_292000.s | 4 + arm9/files/FILE_292E00.s | 4 + arm9/files/FILE_294000.s | 4 + arm9/files/FILE_294A00.s | 4 + arm9/files/FILE_295400.s | 4 + arm9/files/FILE_295A00.s | 4 + arm9/files/FILE_296400.s | 4 + arm9/files/FILE_296800.s | 4 + arm9/files/FILE_297600.s | 4 + arm9/files/FILE_298000.s | 4 + arm9/files/FILE_298600.s | 4 + arm9/files/FILE_298A00.s | 4 + arm9/files/FILE_299A00.s | 4 + arm9/files/FILE_299E00.s | 4 + arm9/files/FILE_29C400.s | 4 + arm9/files/FILE_29E800.s | 4 + arm9/files/FILE_2A1A00.s | 4 + arm9/files/FILE_2A6200.s | 4 + arm9/files/FILE_2A8800.s | 4 + arm9/files/FILE_2A9E00.s | 4 + arm9/files/FILE_2ACC00.s | 4 + arm9/files/FILE_2ADA00.s | 4 + arm9/files/FILE_2AEC00.s | 4 + arm9/files/FILE_2B2A00.s | 4 + arm9/files/FILE_2B7600.s | 4 + arm9/files/FILE_2B9400.s | 4 + arm9/files/FILE_2BC400.s | 4 + arm9/files/FILE_2BEC00.s | 4 + arm9/files/FILE_2C1200.s | 4 + arm9/files/FILE_2C2800.s | 4 + arm9/files/FILE_2C4C00.s | 4 + arm9/files/FILE_2C5C00.s | 4 + arm9/files/FILE_2C9C00.s | 4 + arm9/files/FILE_2C9E00.s | 4 + arm9/files/FILE_2CEA00.s | 4 + arm9/files/FILE_2CFE00.s | 4 + arm9/files/FILE_2D5C00.s | 4 + arm9/files/FILE_2D7C00.s | 4 + arm9/files/FILE_2D9800.s | 4 + arm9/files/FILE_2D9E00.s | 4 + arm9/files/FILE_2DF200.s | 4 + arm9/files/FILE_2E9A00.s | 4 + arm9/files/FILE_2EF000.s | 4 + arm9/files/FILE_2F1600.s | 4 + arm9/files/FILE_2FFA00.s | 4 + arm9/files/FILE_303400.s | 4 + arm9/files/FILE_30C600.s | 4 + files/FILE_10C400.s | 4 - files/FILE_10C600.s | 4 - files/FILE_10C800.s | 4 - files/FILE_10CA00.s | 4 - files/FILE_10CC00.s | 4 - files/FILE_145400.s | 4 - files/FILE_16B600.s | 4 - files/FILE_184400.s | 4 - files/FILE_187800.s | 4 - files/FILE_1A3000.s | 4 - files/FILE_1AD200.s | 4 - files/FILE_1AD400.s | 4 - files/FILE_1DFE00.s | 4 - files/FILE_1F9200.s | 4 - files/FILE_227E00.s | 4 - files/FILE_237400.s | 4 - files/FILE_23BC00.s | 4 - files/FILE_264200.s | 4 - files/FILE_26B200.s | 4 - files/FILE_283000.s | 4 - files/FILE_283200.s | 4 - files/FILE_285600.s | 4 - files/FILE_285C00.s | 4 - files/FILE_286C00.s | 4 - files/FILE_288600.s | 4 - files/FILE_289000.s | 4 - files/FILE_289600.s | 4 - files/FILE_289E00.s | 4 - files/FILE_28AA00.s | 4 - files/FILE_28C200.s | 4 - files/FILE_28CC00.s | 4 - files/FILE_28D200.s | 4 - files/FILE_28D800.s | 4 - files/FILE_28DE00.s | 4 - files/FILE_28E200.s | 4 - files/FILE_28E800.s | 4 - files/FILE_28F200.s | 4 - files/FILE_290000.s | 4 - files/FILE_290600.s | 4 - files/FILE_291200.s | 4 - files/FILE_292000.s | 4 - files/FILE_292E00.s | 4 - files/FILE_294000.s | 4 - files/FILE_294A00.s | 4 - files/FILE_295400.s | 4 - files/FILE_295A00.s | 4 - files/FILE_296400.s | 4 - files/FILE_296800.s | 4 - files/FILE_297600.s | 4 - files/FILE_298000.s | 4 - files/FILE_298600.s | 4 - files/FILE_298A00.s | 4 - files/FILE_299A00.s | 4 - files/FILE_299E00.s | 4 - files/FILE_29C400.s | 4 - files/FILE_29E800.s | 4 - files/FILE_2A1A00.s | 4 - files/FILE_2A6200.s | 4 - files/FILE_2A8800.s | 4 - files/FILE_2A9E00.s | 4 - files/FILE_2ACC00.s | 4 - files/FILE_2ADA00.s | 4 - files/FILE_2AEC00.s | 4 - files/FILE_2B2A00.s | 4 - files/FILE_2B7600.s | 4 - files/FILE_2B9400.s | 4 - files/FILE_2BC400.s | 4 - files/FILE_2BEC00.s | 4 - files/FILE_2C1200.s | 4 - files/FILE_2C2800.s | 4 - files/FILE_2C4C00.s | 4 - files/FILE_2C5C00.s | 4 - files/FILE_2C9C00.s | 4 - files/FILE_2C9E00.s | 4 - files/FILE_2CEA00.s | 4 - files/FILE_2CFE00.s | 4 - files/FILE_2D5C00.s | 4 - files/FILE_2D7C00.s | 4 - files/FILE_2D9800.s | 4 - files/FILE_2D9E00.s | 4 - files/FILE_2DF200.s | 4 - files/FILE_2E9A00.s | 4 - files/FILE_2EF000.s | 4 - files/FILE_2F1600.s | 4 - files/FILE_2FFA00.s | 4 - files/FILE_303400.s | 4 - files/FILE_30C600.s | 4 - pokediamond.lcf | 349 ------------------------ 179 files changed, 957 insertions(+), 775 deletions(-) create mode 100644 arm7/arm7.sha1 create mode 100644 arm9/arm9.sha1 create mode 100644 arm9/files/FILE_10C400.s create mode 100644 arm9/files/FILE_10C600.s create mode 100644 arm9/files/FILE_10C800.s create mode 100644 arm9/files/FILE_10CA00.s create mode 100644 arm9/files/FILE_10CC00.s create mode 100644 arm9/files/FILE_145400.s create mode 100644 arm9/files/FILE_16B600.s create mode 100644 arm9/files/FILE_184400.s create mode 100644 arm9/files/FILE_187800.s create mode 100644 arm9/files/FILE_1A3000.s create mode 100644 arm9/files/FILE_1AD200.s create mode 100644 arm9/files/FILE_1AD400.s create mode 100644 arm9/files/FILE_1DFE00.s create mode 100644 arm9/files/FILE_1F9200.s create mode 100644 arm9/files/FILE_227E00.s create mode 100644 arm9/files/FILE_237400.s create mode 100644 arm9/files/FILE_23BC00.s create mode 100644 arm9/files/FILE_264200.s create mode 100644 arm9/files/FILE_26B200.s create mode 100644 arm9/files/FILE_283000.s create mode 100644 arm9/files/FILE_283200.s create mode 100644 arm9/files/FILE_285600.s create mode 100644 arm9/files/FILE_285C00.s create mode 100644 arm9/files/FILE_286C00.s create mode 100644 arm9/files/FILE_288600.s create mode 100644 arm9/files/FILE_289000.s create mode 100644 arm9/files/FILE_289600.s create mode 100644 arm9/files/FILE_289E00.s create mode 100644 arm9/files/FILE_28AA00.s create mode 100644 arm9/files/FILE_28C200.s create mode 100644 arm9/files/FILE_28CC00.s create mode 100644 arm9/files/FILE_28D200.s create mode 100644 arm9/files/FILE_28D800.s create mode 100644 arm9/files/FILE_28DE00.s create mode 100644 arm9/files/FILE_28E200.s create mode 100644 arm9/files/FILE_28E800.s create mode 100644 arm9/files/FILE_28F200.s create mode 100644 arm9/files/FILE_290000.s create mode 100644 arm9/files/FILE_290600.s create mode 100644 arm9/files/FILE_291200.s create mode 100644 arm9/files/FILE_292000.s create mode 100644 arm9/files/FILE_292E00.s create mode 100644 arm9/files/FILE_294000.s create mode 100644 arm9/files/FILE_294A00.s create mode 100644 arm9/files/FILE_295400.s create mode 100644 arm9/files/FILE_295A00.s create mode 100644 arm9/files/FILE_296400.s create mode 100644 arm9/files/FILE_296800.s create mode 100644 arm9/files/FILE_297600.s create mode 100644 arm9/files/FILE_298000.s create mode 100644 arm9/files/FILE_298600.s create mode 100644 arm9/files/FILE_298A00.s create mode 100644 arm9/files/FILE_299A00.s create mode 100644 arm9/files/FILE_299E00.s create mode 100644 arm9/files/FILE_29C400.s create mode 100644 arm9/files/FILE_29E800.s create mode 100644 arm9/files/FILE_2A1A00.s create mode 100644 arm9/files/FILE_2A6200.s create mode 100644 arm9/files/FILE_2A8800.s create mode 100644 arm9/files/FILE_2A9E00.s create mode 100644 arm9/files/FILE_2ACC00.s create mode 100644 arm9/files/FILE_2ADA00.s create mode 100644 arm9/files/FILE_2AEC00.s create mode 100644 arm9/files/FILE_2B2A00.s create mode 100644 arm9/files/FILE_2B7600.s create mode 100644 arm9/files/FILE_2B9400.s create mode 100644 arm9/files/FILE_2BC400.s create mode 100644 arm9/files/FILE_2BEC00.s create mode 100644 arm9/files/FILE_2C1200.s create mode 100644 arm9/files/FILE_2C2800.s create mode 100644 arm9/files/FILE_2C4C00.s create mode 100644 arm9/files/FILE_2C5C00.s create mode 100644 arm9/files/FILE_2C9C00.s create mode 100644 arm9/files/FILE_2C9E00.s create mode 100644 arm9/files/FILE_2CEA00.s create mode 100644 arm9/files/FILE_2CFE00.s create mode 100644 arm9/files/FILE_2D5C00.s create mode 100644 arm9/files/FILE_2D7C00.s create mode 100644 arm9/files/FILE_2D9800.s create mode 100644 arm9/files/FILE_2D9E00.s create mode 100644 arm9/files/FILE_2DF200.s create mode 100644 arm9/files/FILE_2E9A00.s create mode 100644 arm9/files/FILE_2EF000.s create mode 100644 arm9/files/FILE_2F1600.s create mode 100644 arm9/files/FILE_2FFA00.s create mode 100644 arm9/files/FILE_303400.s create mode 100644 arm9/files/FILE_30C600.s delete mode 100644 files/FILE_10C400.s delete mode 100644 files/FILE_10C600.s delete mode 100644 files/FILE_10C800.s delete mode 100644 files/FILE_10CA00.s delete mode 100644 files/FILE_10CC00.s delete mode 100644 files/FILE_145400.s delete mode 100644 files/FILE_16B600.s delete mode 100644 files/FILE_184400.s delete mode 100644 files/FILE_187800.s delete mode 100644 files/FILE_1A3000.s delete mode 100644 files/FILE_1AD200.s delete mode 100644 files/FILE_1AD400.s delete mode 100644 files/FILE_1DFE00.s delete mode 100644 files/FILE_1F9200.s delete mode 100644 files/FILE_227E00.s delete mode 100644 files/FILE_237400.s delete mode 100644 files/FILE_23BC00.s delete mode 100644 files/FILE_264200.s delete mode 100644 files/FILE_26B200.s delete mode 100644 files/FILE_283000.s delete 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delete mode 100644 files/FILE_2C5C00.s delete mode 100644 files/FILE_2C9C00.s delete mode 100644 files/FILE_2C9E00.s delete mode 100644 files/FILE_2CEA00.s delete mode 100644 files/FILE_2CFE00.s delete mode 100644 files/FILE_2D5C00.s delete mode 100644 files/FILE_2D7C00.s delete mode 100644 files/FILE_2D9800.s delete mode 100644 files/FILE_2D9E00.s delete mode 100644 files/FILE_2DF200.s delete mode 100644 files/FILE_2E9A00.s delete mode 100644 files/FILE_2EF000.s delete mode 100644 files/FILE_2F1600.s delete mode 100644 files/FILE_2FFA00.s delete mode 100644 files/FILE_303400.s delete mode 100644 files/FILE_30C600.s diff --git a/arm7/arm7.sha1 b/arm7/arm7.sha1 new file mode 100644 index 00000000..e3bf79ef --- /dev/null +++ b/arm7/arm7.sha1 @@ -0,0 +1 @@ +39aacbf97ae65b17783057aeed06b80049b18dee build/arm7.bin diff --git a/arm9/Makefile b/arm9/Makefile index 5b12cbb8..53a868d0 100644 --- a/arm9/Makefile +++ b/arm9/Makefile @@ -54,6 +54,9 @@ S_FILES := $(foreach dir,$(ASM_DIRS),$(wildcard $(dir)/*.s)) O_FILES := $(foreach file,$(C_FILES),$(BUILD_DIR)/$(file:.c=.o)) \ $(foreach file,$(S_FILES),$(BUILD_DIR)/$(file:.s=.o)) \ +# Overlay modules +BIN_FILES := $(wildcard files/*.__AT_*) + ##################### Compiler Options ####################### MWCCVERSION := 2.0/base @@ -144,8 +147,8 @@ $(BUILD_DIR)/%.o: %.s $(BUILD_DIR)/$(LD_SCRIPT): $(LD_SCRIPT) undefined_syms.txt $(CPP) $(VERSION_CFLAGS) -MMD -MP -MT $@ -MF $@.d -I include/ -I . -DBUILD_DIR=$(BUILD_DIR) -o $@ $< -$(ELF): $(O_FILES) $(BUILD_DIR)/$(LD_SCRIPT) - $(LD) $(LDFLAGS) $(BUILD_DIR)/$(LD_SCRIPT) -o $(ELF) $(O_FILES) +$(ELF): $(O_FILES) $(BUILD_DIR)/$(LD_SCRIPT) $(BIN_FILES) + $(LD) $(LDFLAGS) $(BUILD_DIR)/$(LD_SCRIPT) -o $(ELF) $(O_FILES) $(BIN_FILES) $(ROM): $(ELF) $(OBJCOPY) -O binary --gap-fill=0xFF $< $@ @@ -168,6 +171,8 @@ DUMMY != mkdir -p $(ALL_DIRS) %.png: ; %.pal: ; +$(BIN_FILES): ; + $(BUILD_DIR)/data/icon.o: graphics/icon.4bpp graphics/icon.gbapal ### Debug Print ### diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index 50a9da9c..e71920ae 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -1,3 +1,4 @@ + MEMORY { .itcm (RWX) : ORIGIN=0x01FF8000, LENGTH=0 .text (RX) : ORIGIN=0x02000000, LENGTH=0 @@ -8,96 +9,184 @@ MEMORY { .ewram (RWX) : ORIGIN=0x023E0000, LENGTH=0 .dtcm (RW) : ORIGIN=0x027E0000, LENGTH=0 .overlay (RX) : ORIGIN=0, LENGTH=0 + MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 } SECTIONS { #include "undefined_syms.txt" - .text : AT (0x0) { - secure.o (.text) - crt0.o (.text) - crt0.o (.version) - main.o (.text) - FUN_02000DF4.o (.text) - unk_02000E0C.o (.text) - string_util.o (.text) - unk_020023C0.o (.text) - filesystem.o (.text) - unk_02006864.o (.text) - script.o (.text) - unk_02038C78.o (.text) - scrcmd.o (.text) - unk_02046030.o (.text) - unk_0208AC14.o (.text) - unk_020AF030.o (.text) - /* Nitro SDK */ - FX_arm9.o (.text) - GX_arm9.o (.text) - OS_arm9.o (.text) - MI_arm9.o (.text) - SND_arm9.o (.text) - PXI_arm9.o (.text) - FS_arm9.o (.text) - DGT_arm9.o (.text) - CP_arm9.o (.text) - SPI_arm9.o (.text) - PM_arm9.o (.text) - RTC_arm9.o (.text) - CARD_arm9.o (.text) - WM_arm9.o (.text) - CTRDG_arm9.o (.text) - MATH_arm9.o (.text) - STD_arm9.o (.text) - /* C standard library */ - libc.o (.text) - /* MWCC library */ - libmwcc.o (.text) + .text : AT (0x0) { + secure.o (.text) + crt0.o (.text) + crt0.o (.version) + main.o (.text) + FUN_02000DF4.o (.text) + unk_02000E0C.o (.text) + string_util.o (.text) + unk_020023C0.o (.text) + filesystem.o (.text) + unk_02006864.o (.text) + script.o (.text) + unk_02038C78.o (.text) + scrcmd.o (.text) + unk_02046030.o (.text) + unk_0208AC14.o (.text) + unk_020AF030.o (.text) + /* Nitro SDK */ + FX_arm9.o (.text) + GX_arm9.o (.text) + OS_arm9.o (.text) + MI_arm9.o (.text) + SND_arm9.o (.text) + PXI_arm9.o (.text) + FS_arm9.o (.text) + DGT_arm9.o (.text) + CP_arm9.o (.text) + SPI_arm9.o (.text) + PM_arm9.o (.text) + RTC_arm9.o (.text) + CARD_arm9.o (.text) + WM_arm9.o (.text) + CTRDG_arm9.o (.text) + MATH_arm9.o (.text) + STD_arm9.o (.text) + /* C standard library */ + libc.o (.text) + /* MWCC library */ + libmwcc.o (.text) } > .text .data : AT (0xEC710) { - rom2.o (.data) - string_util.o (.data) - rom2_2.o (.data) + rom2.o (.data) + string_util.o (.data) + rom2_2.o (.data) } > .data - SDK_AUTOLOAD_START = .; SDK_STATIC_BSS_START = .; - SDK_STATIC_BSS_END = . + 0xd0540; + SDK_STATIC_BSS_END = SDK_STATIC_BSS_START + 0xd0540; + + SDK_AUTOLOAD_START = .; .itcm : AT (0x106FA0) { SDK_AUTOLOAD_ITCM_START = .; - arm9_itcm.o (.itcm) - SDK_AUTOLOAD_ITCM_END = .; - . = 0x01FF8720; - SDK_SECTION_ARENA_ITCM_START = .; - } > .itcm - - .dtcm : AT (0x1076A0) { - SDK_AUTOLOAD_DTCM_START = .; - OS_arm9.o (.dtcm) - SDK_AUTOLOAD_DTCM_END = .; - SDK_SECTION_ARENA_DTCM_START = 0x027E0080; - } > .dtcm - - .autoload : AT (0x107700) { + arm9_itcm.o (.itcm) + SDK_AUTOLOAD_ITCM_END = .; + . = 0x01FF8720; + SDK_SECTION_ARENA_ITCM_START = .; + } > .itcm + + .dtcm : AT (0x1076A0) { + SDK_AUTOLOAD_DTCM_START = .; + OS_arm9.o (.dtcm) + SDK_AUTOLOAD_DTCM_END = .; + SDK_SECTION_ARENA_DTCM_START = 0x027E0080; + } > .dtcm + + .autoload : AT (0x107700) { WRITEW SDK_AUTOLOAD_ITCM_START; - WRITEW SDK_AUTOLOAD_ITCM_SIZE; - WRITEW SDK_AUTOLOAD_ITCM_BSS_SIZE; - WRITEW SDK_AUTOLOAD_DTCM_START; - WRITEW SDK_AUTOLOAD_DTCM_SIZE; - WRITEW SDK_AUTOLOAD_DTCM_BSS_SIZE; - WRITEW SDK_AUTOLOAD_EXT_START; - WRITEW SDK_AUTOLOAD_EXT_SIZE; - WRITEW SDK_AUTOLOAD_EXT_BSS_SIZE; - } > .autoload - - .footer : AT (0x107724) { - WRITEW 0xDEC00621; - WRITEW _start_ModuleParams - ADDR(.text); - WRITEW 0; - } > .footer - - .overlay : AT (0x107800) { + WRITEW SDK_AUTOLOAD_ITCM_SIZE; + WRITEW SDK_AUTOLOAD_ITCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_START; + WRITEW SDK_AUTOLOAD_DTCM_SIZE; + WRITEW SDK_AUTOLOAD_DTCM_BSS_SIZE; + WRITEW SDK_AUTOLOAD_EXT_START; + WRITEW SDK_AUTOLOAD_EXT_SIZE; + WRITEW SDK_AUTOLOAD_EXT_BSS_SIZE; + } > .autoload + + .footer : AT (0x107724) { + WRITEW 0xDEC00621; + WRITEW _start_ModuleParams - ADDR(.text); + WRITEW 0; + } > .footer + + .overlay : AT (0x107800) { WRITEW 0; WRITEW SDK_MODULE_00_START; WRITEW SDK_MODULE_00_SIZE; @@ -880,5 +969,440 @@ SECTIONS { WRITEW SDK_MODULE_86_STATIC_INIT_END; WRITEW 86; WRITEW 0; - } > .overlay + } > .overlay + + .MODULE.00 : AT (0x108400) { + . = ALIGN(512); + FILE_10C400.o (.text) + } > MODULE_00 + + .MODULE.01 : AT (0x108600) { + . = ALIGN(512); + FILE_10C600.o (.text) + } > MODULE_01 + + .MODULE.02 : AT (0x108800) { + . = ALIGN(512); + FILE_10C800.o (.text) + } > MODULE_02 + + .MODULE.03 : AT (0x108A00) { + . = ALIGN(512); + FILE_10CA00.o (.text) + } > MODULE_03 + + .MODULE.04 : AT (0x108C00) { + . = ALIGN(512); + FILE_10CC00.o (.text) + } > MODULE_04 + + .MODULE.05 : AT (0x141400) { + . = ALIGN(512); + FILE_145400.o (.text) + } > MODULE_05 + + .MODULE.06 : AT (0x167600) { + . = ALIGN(512); + FILE_16B600.o (.text) + } > MODULE_06 + + .MODULE.07 : AT (0x180400) { + . = ALIGN(512); + FILE_184400.o (.text) + } > MODULE_07 + + .MODULE.08 : AT (0x183800) { + . = ALIGN(512); + FILE_187800.o (.text) + } > MODULE_08 + + .MODULE.09 : AT (0x19F000) { + . = ALIGN(512); + FILE_1A3000.o (.text) + } > MODULE_09 + + .MODULE.10 : AT (0x1A9200) { + . = ALIGN(512); + FILE_1AD200.o (.text) + } > MODULE_10 + + .MODULE.11 : AT (0x1A9400) { + . = ALIGN(512); + FILE_1AD400.o (.text) + } > MODULE_11 + + .MODULE.12 : AT (0x1DBE00) { + . = ALIGN(512); + FILE_1DFE00.o (.text) + } > MODULE_12 + + .MODULE.13 : AT (0x1F5200) { + . = ALIGN(512); + FILE_1F9200.o (.text) + } > MODULE_13 + + .MODULE.14 : AT (0x223E00) { + . = ALIGN(512); + FILE_227E00.o (.text) + } > MODULE_14 + + .MODULE.15 : AT (0x233400) { + . = ALIGN(512); + FILE_237400.o (.text) + } > MODULE_15 + + .MODULE.16 : AT (0x237C00) { + . = ALIGN(512); + FILE_23BC00.o (.text) + } > MODULE_16 + + .MODULE.17 : AT (0x260200) { + . = ALIGN(512); + FILE_264200.o (.text) + } > MODULE_17 + + .MODULE.18 : AT (0x267200) { + . = ALIGN(512); + FILE_26B200.o (.text) + } > MODULE_18 + + .MODULE.19 : AT (0x27F000) { + . = ALIGN(512); + FILE_283000.o (.text) + } > MODULE_19 + + .MODULE.20 : AT (0x27F200) { + . = ALIGN(512); + FILE_283200.o (.text) + } > MODULE_20 + + .MODULE.21 : AT (0x281600) { + . = ALIGN(512); + FILE_285600.o (.text) + } > MODULE_21 + + .MODULE.22 : AT (0x281C00) { + . = ALIGN(512); + FILE_285C00.o (.text) + } > MODULE_22 + + .MODULE.23 : AT (0x282C00) { + . = ALIGN(512); + FILE_286C00.o (.text) + } > MODULE_23 + + .MODULE.24 : AT (0x284600) { + . = ALIGN(512); + FILE_288600.o (.text) + } > MODULE_24 + + .MODULE.25 : AT (0x285000) { + . = ALIGN(512); + FILE_289000.o (.text) + } > MODULE_25 + + .MODULE.26 : AT (0x285600) { + . = ALIGN(512); + FILE_289600.o (.text) + } > MODULE_26 + + .MODULE.27 : AT (0x285E00) { + . = ALIGN(512); + FILE_289E00.o (.text) + } > MODULE_27 + + .MODULE.28 : AT (0x286A00) { + . = ALIGN(512); + FILE_28AA00.o (.text) + } > MODULE_28 + + .MODULE.29 : AT (0x288200) { + . = ALIGN(512); + FILE_28C200.o (.text) + } > MODULE_29 + + .MODULE.30 : AT (0x288C00) { + . = ALIGN(512); + FILE_28CC00.o (.text) + } > MODULE_30 + + .MODULE.31 : AT (0x289200) { + . = ALIGN(512); + FILE_28D200.o (.text) + } > MODULE_31 + + .MODULE.32 : AT (0x289800) { + . = ALIGN(512); + FILE_28D800.o (.text) + } > MODULE_32 + + .MODULE.33 : AT (0x289E00) { + . = ALIGN(512); + FILE_28DE00.o (.text) + } > MODULE_33 + + .MODULE.34 : AT (0x28A200) { + . = ALIGN(512); + FILE_28E200.o (.text) + } > MODULE_34 + + .MODULE.35 : AT (0x28A800) { + . = ALIGN(512); + FILE_28E800.o (.text) + } > MODULE_35 + + .MODULE.36 : AT (0x28B200) { + . = ALIGN(512); + FILE_28F200.o (.text) + } > MODULE_36 + + .MODULE.37 : AT (0x28C000) { + . = ALIGN(512); + FILE_290000.o (.text) + } > MODULE_37 + + .MODULE.38 : AT (0x28C600) { + . = ALIGN(512); + FILE_290600.o (.text) + } > MODULE_38 + + .MODULE.39 : AT (0x28D200) { + . = ALIGN(512); + FILE_291200.o (.text) + } > MODULE_39 + + .MODULE.40 : AT (0x28E000) { + . = ALIGN(512); + FILE_292000.o (.text) + } > MODULE_40 + + .MODULE.41 : AT (0x28EE00) { + . = ALIGN(512); + FILE_292E00.o (.text) + } > MODULE_41 + + .MODULE.42 : AT (0x290000) { + . = ALIGN(512); + FILE_294000.o (.text) + } > MODULE_42 + + .MODULE.43 : AT (0x290A00) { + . = ALIGN(512); + FILE_294A00.o (.text) + } > MODULE_43 + + .MODULE.44 : AT (0x291400) { + . = ALIGN(512); + FILE_295400.o (.text) + } > MODULE_44 + + .MODULE.45 : AT (0x291A00) { + . = ALIGN(512); + FILE_295A00.o (.text) + } > MODULE_45 + + .MODULE.46 : AT (0x292400) { + . = ALIGN(512); + FILE_296400.o (.text) + } > MODULE_46 + + .MODULE.47 : AT (0x292800) { + . = ALIGN(512); + FILE_296800.o (.text) + } > MODULE_47 + + .MODULE.48 : AT (0x293600) { + . = ALIGN(512); + FILE_297600.o (.text) + } > MODULE_48 + + .MODULE.49 : AT (0x294000) { + . = ALIGN(512); + FILE_298000.o (.text) + } > MODULE_49 + + .MODULE.50 : AT (0x294600) { + . = ALIGN(512); + FILE_298600.o (.text) + } > MODULE_50 + + .MODULE.51 : AT (0x294A00) { + . = ALIGN(512); + FILE_298A00.o (.text) + } > MODULE_51 + + .MODULE.52 : AT (0x295A00) { + . = ALIGN(512); + FILE_299A00.o (.text) + } > MODULE_52 + + .MODULE.53 : AT (0x295E00) { + . = ALIGN(512); + FILE_299E00.o (.text) + } > MODULE_53 + + .MODULE.54 : AT (0x298400) { + . = ALIGN(512); + FILE_29C400.o (.text) + } > MODULE_54 + + .MODULE.55 : AT (0x29A800) { + . = ALIGN(512); + FILE_29E800.o (.text) + } > MODULE_55 + + .MODULE.56 : AT (0x29DA00) { + . = ALIGN(512); + FILE_2A1A00.o (.text) + } > MODULE_56 + + .MODULE.57 : AT (0x2A2200) { + . = ALIGN(512); + FILE_2A6200.o (.text) + } > MODULE_57 + + .MODULE.58 : AT (0x2A4800) { + . = ALIGN(512); + FILE_2A8800.o (.text) + } > MODULE_58 + + .MODULE.59 : AT (0x2A5E00) { + . = ALIGN(512); + FILE_2A9E00.o (.text) + } > MODULE_59 + + .MODULE.60 : AT (0x2A8C00) { + . = ALIGN(512); + FILE_2ACC00.o (.text) + } > MODULE_60 + + .MODULE.61 : AT (0x2A9A00) { + . = ALIGN(512); + FILE_2ADA00.o (.text) + } > MODULE_61 + + .MODULE.62 : AT (0x2AAC00) { + . = ALIGN(512); + FILE_2AEC00.o (.text) + } > MODULE_62 + + .MODULE.63 : AT (0x2AEA00) { + . = ALIGN(512); + FILE_2B2A00.o (.text) + } > MODULE_63 + + .MODULE.64 : AT (0x2B3600) { + . = ALIGN(512); + FILE_2B7600.o (.text) + } > MODULE_64 + + .MODULE.65 : AT (0x2B5400) { + . = ALIGN(512); + FILE_2B9400.o (.text) + } > MODULE_65 + + .MODULE.66 : AT (0x2B8400) { + . = ALIGN(512); + FILE_2BC400.o (.text) + } > MODULE_66 + + .MODULE.67 : AT (0x2BAC00) { + . = ALIGN(512); + FILE_2BEC00.o (.text) + } > MODULE_67 + + .MODULE.68 : AT (0x2BD200) { + . = ALIGN(512); + FILE_2C1200.o (.text) + } > MODULE_68 + + .MODULE.69 : AT (0x2BE800) { + . = ALIGN(512); + FILE_2C2800.o (.text) + } > MODULE_69 + + .MODULE.70 : AT (0x2C0C00) { + . = ALIGN(512); + FILE_2C4C00.o (.text) + } > MODULE_70 + + .MODULE.71 : AT (0x2C1C00) { + . = ALIGN(512); + FILE_2C5C00.o (.text) + } > MODULE_71 + + .MODULE.72 : AT (0x2C5C00) { + . = ALIGN(512); + FILE_2C9C00.o (.text) + } > MODULE_72 + + .MODULE.73 : AT (0x2C5E00) { + . = ALIGN(512); + FILE_2C9E00.o (.text) + } > MODULE_73 + + .MODULE.74 : AT (0x2CAA00) { + . = ALIGN(512); + FILE_2CEA00.o (.text) + } > MODULE_74 + + .MODULE.75 : AT (0x2CBE00) { + . = ALIGN(512); + FILE_2CFE00.o (.text) + } > MODULE_75 + + .MODULE.76 : AT (0x2D1C00) { + . = ALIGN(512); + FILE_2D5C00.o (.text) + } > MODULE_76 + + .MODULE.77 : AT (0x2D3C00) { + . = ALIGN(512); + FILE_2D7C00.o (.text) + } > MODULE_77 + + .MODULE.78 : AT (0x2D5800) { + . = ALIGN(512); + FILE_2D9800.o (.text) + } > MODULE_78 + + .MODULE.79 : AT (0x2D5E00) { + . = ALIGN(512); + FILE_2D9E00.o (.text) + } > MODULE_79 + + .MODULE.80 : AT (0x2DB200) { + . = ALIGN(512); + FILE_2DF200.o (.text) + } > MODULE_80 + + .MODULE.81 : AT (0x2E5A00) { + . = ALIGN(512); + FILE_2E9A00.o (.text) + } > MODULE_81 + + .MODULE.82 : AT (0x2EB000) { + . = ALIGN(512); + FILE_2EF000.o (.text) + } > MODULE_82 + + .MODULE.83 : AT (0x2ED600) { + . = ALIGN(512); + FILE_2F1600.o (.text) + } > MODULE_83 + + .MODULE.84 : AT (0x2FBA00) { + . = ALIGN(512); + FILE_2FFA00.o (.text) + } > MODULE_84 + + .MODULE.85 : AT (0x2FF400) { + . = ALIGN(512); + FILE_303400.o (.text) + } > MODULE_85 + + .MODULE.86 : AT (0x308600) { + . = ALIGN(512); + FILE_30C600.o (.text) + } > MODULE_86 } diff --git a/arm9/arm9.sha1 b/arm9/arm9.sha1 new file mode 100644 index 00000000..3bc27b8a --- /dev/null +++ b/arm9/arm9.sha1 @@ -0,0 +1 @@ +f72681568e075a56beb25b584734a35d118468a1 build/arm9.bin diff --git a/arm9/files/FILE_10C400.s b/arm9/files/FILE_10C400.s new file mode 100644 index 00000000..5cf27f33 --- /dev/null +++ b/arm9/files/FILE_10C400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x10C400, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_10C600.s b/arm9/files/FILE_10C600.s new file mode 100644 index 00000000..d2608c8c --- /dev/null +++ b/arm9/files/FILE_10C600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x10C600, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_10C800.s b/arm9/files/FILE_10C800.s new file mode 100644 index 00000000..8cb22116 --- /dev/null +++ b/arm9/files/FILE_10C800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x10C800, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_10CA00.s b/arm9/files/FILE_10CA00.s new file mode 100644 index 00000000..46e1e03b --- /dev/null +++ b/arm9/files/FILE_10CA00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x10CA00, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_10CC00.s b/arm9/files/FILE_10CC00.s new file mode 100644 index 00000000..2876942a --- /dev/null +++ b/arm9/files/FILE_10CC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x10CC00, 0x386E0 + .balign 512, 255 diff --git a/arm9/files/FILE_145400.s b/arm9/files/FILE_145400.s new file mode 100644 index 00000000..31de6e12 --- /dev/null +++ b/arm9/files/FILE_145400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x145400, 0x261A0 + .balign 512, 255 diff --git a/arm9/files/FILE_16B600.s b/arm9/files/FILE_16B600.s new file mode 100644 index 00000000..33e75c23 --- /dev/null +++ b/arm9/files/FILE_16B600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x16B600, 0x18D80 + .balign 512, 255 diff --git a/arm9/files/FILE_184400.s b/arm9/files/FILE_184400.s new file mode 100644 index 00000000..936860c0 --- /dev/null +++ b/arm9/files/FILE_184400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x184400, 0x32E0 + .balign 512, 255 diff --git a/arm9/files/FILE_187800.s b/arm9/files/FILE_187800.s new file mode 100644 index 00000000..38b64eec --- /dev/null +++ b/arm9/files/FILE_187800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x187800, 0x1B760 + .balign 512, 255 diff --git a/arm9/files/FILE_1A3000.s b/arm9/files/FILE_1A3000.s new file mode 100644 index 00000000..3febcf47 --- /dev/null +++ b/arm9/files/FILE_1A3000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x1A3000, 0xA1A0 + .balign 512, 255 diff --git a/arm9/files/FILE_1AD200.s b/arm9/files/FILE_1AD200.s new file mode 100644 index 00000000..24bfcb9b --- /dev/null +++ b/arm9/files/FILE_1AD200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x1AD200, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_1AD400.s b/arm9/files/FILE_1AD400.s new file mode 100644 index 00000000..f66becc6 --- /dev/null +++ b/arm9/files/FILE_1AD400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x1AD400, 0x329E0 + .balign 512, 255 diff --git a/arm9/files/FILE_1DFE00.s b/arm9/files/FILE_1DFE00.s new file mode 100644 index 00000000..5e5e8a7c --- /dev/null +++ b/arm9/files/FILE_1DFE00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x1DFE00, 0x19260 + .balign 512, 255 diff --git a/arm9/files/FILE_1F9200.s b/arm9/files/FILE_1F9200.s new file mode 100644 index 00000000..e2e33721 --- /dev/null +++ b/arm9/files/FILE_1F9200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x1F9200, 0x2EBE0 + .balign 512, 255 diff --git a/arm9/files/FILE_227E00.s b/arm9/files/FILE_227E00.s new file mode 100644 index 00000000..ab307e3a --- /dev/null +++ b/arm9/files/FILE_227E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x227E00, 0xF520 + .balign 512, 255 diff --git a/arm9/files/FILE_237400.s b/arm9/files/FILE_237400.s new file mode 100644 index 00000000..45907862 --- /dev/null +++ b/arm9/files/FILE_237400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x237400, 0x4680 + .balign 512, 255 diff --git a/arm9/files/FILE_23BC00.s b/arm9/files/FILE_23BC00.s new file mode 100644 index 00000000..72123ecb --- /dev/null +++ b/arm9/files/FILE_23BC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x23BC00, 0x28500 + .balign 512, 255 diff --git a/arm9/files/FILE_264200.s b/arm9/files/FILE_264200.s new file mode 100644 index 00000000..5e654387 --- /dev/null +++ b/arm9/files/FILE_264200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x264200, 0x6E80 + .balign 512, 255 diff --git a/arm9/files/FILE_26B200.s b/arm9/files/FILE_26B200.s new file mode 100644 index 00000000..0c91220f --- /dev/null +++ b/arm9/files/FILE_26B200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x26B200, 0x17CE0 + .balign 512, 255 diff --git a/arm9/files/FILE_283000.s b/arm9/files/FILE_283000.s new file mode 100644 index 00000000..6b536136 --- /dev/null +++ b/arm9/files/FILE_283000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x283000, 0x100 + .balign 512, 255 diff --git a/arm9/files/FILE_283200.s b/arm9/files/FILE_283200.s new file mode 100644 index 00000000..461d9ac6 --- /dev/null +++ b/arm9/files/FILE_283200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x283200, 0x2400 + .balign 512, 255 diff --git a/arm9/files/FILE_285600.s b/arm9/files/FILE_285600.s new file mode 100644 index 00000000..02c6eb09 --- /dev/null +++ b/arm9/files/FILE_285600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x285600, 0x5C0 + .balign 512, 255 diff --git a/arm9/files/FILE_285C00.s b/arm9/files/FILE_285C00.s new file mode 100644 index 00000000..70fab4a8 --- /dev/null +++ b/arm9/files/FILE_285C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x285C00, 0xF00 + .balign 512, 255 diff --git a/arm9/files/FILE_286C00.s b/arm9/files/FILE_286C00.s new file mode 100644 index 00000000..7d4ff42d --- /dev/null +++ b/arm9/files/FILE_286C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x286C00, 0x1900 + .balign 512, 255 diff --git a/arm9/files/FILE_288600.s b/arm9/files/FILE_288600.s new file mode 100644 index 00000000..cdb33573 --- /dev/null +++ b/arm9/files/FILE_288600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x288600, 0x9A0 + .balign 512, 255 diff --git a/arm9/files/FILE_289000.s b/arm9/files/FILE_289000.s new file mode 100644 index 00000000..0d794c29 --- /dev/null +++ b/arm9/files/FILE_289000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x289000, 0x560 + .balign 512, 255 diff --git a/arm9/files/FILE_289600.s b/arm9/files/FILE_289600.s new file mode 100644 index 00000000..813f71fe --- /dev/null +++ b/arm9/files/FILE_289600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x289600, 0x800 + .balign 512, 255 diff --git a/arm9/files/FILE_289E00.s b/arm9/files/FILE_289E00.s new file mode 100644 index 00000000..34da6195 --- /dev/null +++ b/arm9/files/FILE_289E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x289E00, 0xBA0 + .balign 512, 255 diff --git a/arm9/files/FILE_28AA00.s b/arm9/files/FILE_28AA00.s new file mode 100644 index 00000000..d8827a3a --- /dev/null +++ b/arm9/files/FILE_28AA00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28AA00, 0x1780 + .balign 512, 255 diff --git a/arm9/files/FILE_28C200.s b/arm9/files/FILE_28C200.s new file mode 100644 index 00000000..b69d6856 --- /dev/null +++ b/arm9/files/FILE_28C200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28C200, 0x900 + .balign 512, 255 diff --git a/arm9/files/FILE_28CC00.s b/arm9/files/FILE_28CC00.s new file mode 100644 index 00000000..8b411001 --- /dev/null +++ b/arm9/files/FILE_28CC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28CC00, 0x600 + .balign 512, 255 diff --git a/arm9/files/FILE_28D200.s b/arm9/files/FILE_28D200.s new file mode 100644 index 00000000..fe324802 --- /dev/null +++ b/arm9/files/FILE_28D200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28D200, 0x600 + .balign 512, 255 diff --git a/arm9/files/FILE_28D800.s b/arm9/files/FILE_28D800.s new file mode 100644 index 00000000..f787e794 --- /dev/null +++ b/arm9/files/FILE_28D800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28D800, 0x4A0 + .balign 512, 255 diff --git a/arm9/files/FILE_28DE00.s b/arm9/files/FILE_28DE00.s new file mode 100644 index 00000000..6658c9fc --- /dev/null +++ b/arm9/files/FILE_28DE00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28DE00, 0x320 + .balign 512, 255 diff --git a/arm9/files/FILE_28E200.s b/arm9/files/FILE_28E200.s new file mode 100644 index 00000000..d36e77ce --- /dev/null +++ b/arm9/files/FILE_28E200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28E200, 0x4C0 + .balign 512, 255 diff --git a/arm9/files/FILE_28E800.s b/arm9/files/FILE_28E800.s new file mode 100644 index 00000000..bdc1ef52 --- /dev/null +++ b/arm9/files/FILE_28E800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28E800, 0x9A0 + .balign 512, 255 diff --git a/arm9/files/FILE_28F200.s b/arm9/files/FILE_28F200.s new file mode 100644 index 00000000..f8b95b6a --- /dev/null +++ b/arm9/files/FILE_28F200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x28F200, 0xCC0 + .balign 512, 255 diff --git a/arm9/files/FILE_290000.s b/arm9/files/FILE_290000.s new file mode 100644 index 00000000..7e15ff90 --- /dev/null +++ b/arm9/files/FILE_290000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x290000, 0x560 + .balign 512, 255 diff --git a/arm9/files/FILE_290600.s b/arm9/files/FILE_290600.s new file mode 100644 index 00000000..fda50640 --- /dev/null +++ b/arm9/files/FILE_290600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x290600, 0xB40 + .balign 512, 255 diff --git a/arm9/files/FILE_291200.s b/arm9/files/FILE_291200.s new file mode 100644 index 00000000..ce12a90a --- /dev/null +++ b/arm9/files/FILE_291200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x291200, 0xCC0 + .balign 512, 255 diff --git a/arm9/files/FILE_292000.s b/arm9/files/FILE_292000.s new file mode 100644 index 00000000..d50a3ef1 --- /dev/null +++ b/arm9/files/FILE_292000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x292000, 0xC60 + .balign 512, 255 diff --git a/arm9/files/FILE_292E00.s b/arm9/files/FILE_292E00.s new file mode 100644 index 00000000..b5a8d36d --- /dev/null +++ b/arm9/files/FILE_292E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x292E00, 0x1140 + .balign 512, 255 diff --git a/arm9/files/FILE_294000.s b/arm9/files/FILE_294000.s new file mode 100644 index 00000000..8a03373c --- /dev/null +++ b/arm9/files/FILE_294000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x294000, 0x900 + .balign 512, 255 diff --git a/arm9/files/FILE_294A00.s b/arm9/files/FILE_294A00.s new file mode 100644 index 00000000..452c8165 --- /dev/null +++ b/arm9/files/FILE_294A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x294A00, 0x9C0 + .balign 512, 255 diff --git a/arm9/files/FILE_295400.s b/arm9/files/FILE_295400.s new file mode 100644 index 00000000..b21be08b --- /dev/null +++ b/arm9/files/FILE_295400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x295400, 0x4A0 + .balign 512, 255 diff --git a/arm9/files/FILE_295A00.s b/arm9/files/FILE_295A00.s new file mode 100644 index 00000000..1017f6aa --- /dev/null +++ b/arm9/files/FILE_295A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x295A00, 0x940 + .balign 512, 255 diff --git a/arm9/files/FILE_296400.s b/arm9/files/FILE_296400.s new file mode 100644 index 00000000..118ca39a --- /dev/null +++ b/arm9/files/FILE_296400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x296400, 0x320 + .balign 512, 255 diff --git a/arm9/files/FILE_296800.s b/arm9/files/FILE_296800.s new file mode 100644 index 00000000..68ac75b9 --- /dev/null +++ b/arm9/files/FILE_296800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x296800, 0xCA0 + .balign 512, 255 diff --git a/arm9/files/FILE_297600.s b/arm9/files/FILE_297600.s new file mode 100644 index 00000000..1887c4af --- /dev/null +++ b/arm9/files/FILE_297600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x297600, 0x8A0 + .balign 512, 255 diff --git a/arm9/files/FILE_298000.s b/arm9/files/FILE_298000.s new file mode 100644 index 00000000..ffdcde2a --- /dev/null +++ b/arm9/files/FILE_298000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x298000, 0x600 + .balign 512, 255 diff --git a/arm9/files/FILE_298600.s b/arm9/files/FILE_298600.s new file mode 100644 index 00000000..d4bef86c --- /dev/null +++ b/arm9/files/FILE_298600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x298600, 0x320 + .balign 512, 255 diff --git a/arm9/files/FILE_298A00.s b/arm9/files/FILE_298A00.s new file mode 100644 index 00000000..258432c2 --- /dev/null +++ b/arm9/files/FILE_298A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x298A00, 0xFC0 + .balign 512, 255 diff --git a/arm9/files/FILE_299A00.s b/arm9/files/FILE_299A00.s new file mode 100644 index 00000000..71432656 --- /dev/null +++ b/arm9/files/FILE_299A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x299A00, 0x400 + .balign 512, 255 diff --git a/arm9/files/FILE_299E00.s b/arm9/files/FILE_299E00.s new file mode 100644 index 00000000..4fb90fe1 --- /dev/null +++ b/arm9/files/FILE_299E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x299E00, 0x2480 + .balign 512, 255 diff --git a/arm9/files/FILE_29C400.s b/arm9/files/FILE_29C400.s new file mode 100644 index 00000000..3b880c03 --- /dev/null +++ b/arm9/files/FILE_29C400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x29C400, 0x2380 + .balign 512, 255 diff --git a/arm9/files/FILE_29E800.s b/arm9/files/FILE_29E800.s new file mode 100644 index 00000000..f3cf72cb --- /dev/null +++ b/arm9/files/FILE_29E800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x29E800, 0x3040 + .balign 512, 255 diff --git a/arm9/files/FILE_2A1A00.s b/arm9/files/FILE_2A1A00.s new file mode 100644 index 00000000..d917b776 --- /dev/null +++ b/arm9/files/FILE_2A1A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2A1A00, 0x47A0 + .balign 512, 255 diff --git a/arm9/files/FILE_2A6200.s b/arm9/files/FILE_2A6200.s new file mode 100644 index 00000000..ae62fcc6 --- /dev/null +++ b/arm9/files/FILE_2A6200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2A6200, 0x2540 + .balign 512, 255 diff --git a/arm9/files/FILE_2A8800.s b/arm9/files/FILE_2A8800.s new file mode 100644 index 00000000..967d96f3 --- /dev/null +++ b/arm9/files/FILE_2A8800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2A8800, 0x15A0 + .balign 512, 255 diff --git a/arm9/files/FILE_2A9E00.s b/arm9/files/FILE_2A9E00.s new file mode 100644 index 00000000..21839769 --- /dev/null +++ b/arm9/files/FILE_2A9E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2A9E00, 0x2C20 + .balign 512, 255 diff --git a/arm9/files/FILE_2ACC00.s b/arm9/files/FILE_2ACC00.s new file mode 100644 index 00000000..2068bd4c --- /dev/null +++ b/arm9/files/FILE_2ACC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2ACC00, 0xD00 + .balign 512, 255 diff --git a/arm9/files/FILE_2ADA00.s b/arm9/files/FILE_2ADA00.s new file mode 100644 index 00000000..9f464dac --- /dev/null +++ b/arm9/files/FILE_2ADA00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2ADA00, 0x1080 + .balign 512, 255 diff --git a/arm9/files/FILE_2AEC00.s b/arm9/files/FILE_2AEC00.s new file mode 100644 index 00000000..e6a54fb3 --- /dev/null +++ b/arm9/files/FILE_2AEC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2AEC00, 0x3DE0 + .balign 512, 255 diff --git a/arm9/files/FILE_2B2A00.s b/arm9/files/FILE_2B2A00.s new file mode 100644 index 00000000..44eba0d2 --- /dev/null +++ b/arm9/files/FILE_2B2A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2B2A00, 0x4AC0 + .balign 512, 255 diff --git a/arm9/files/FILE_2B7600.s b/arm9/files/FILE_2B7600.s new file mode 100644 index 00000000..8258b44e --- /dev/null +++ b/arm9/files/FILE_2B7600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2B7600, 0x1C40 + .balign 512, 255 diff --git a/arm9/files/FILE_2B9400.s b/arm9/files/FILE_2B9400.s new file mode 100644 index 00000000..17ffa8d8 --- /dev/null +++ b/arm9/files/FILE_2B9400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2B9400, 0x3000 + .balign 512, 255 diff --git a/arm9/files/FILE_2BC400.s b/arm9/files/FILE_2BC400.s new file mode 100644 index 00000000..e34ef7f4 --- /dev/null +++ b/arm9/files/FILE_2BC400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2BC400, 0x2660 + .balign 512, 255 diff --git a/arm9/files/FILE_2BEC00.s b/arm9/files/FILE_2BEC00.s new file mode 100644 index 00000000..c229a70e --- /dev/null +++ b/arm9/files/FILE_2BEC00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2BEC00, 0x2440 + .balign 512, 255 diff --git a/arm9/files/FILE_2C1200.s b/arm9/files/FILE_2C1200.s new file mode 100644 index 00000000..f357627d --- /dev/null +++ b/arm9/files/FILE_2C1200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C1200, 0x1600 + .balign 512, 255 diff --git a/arm9/files/FILE_2C2800.s b/arm9/files/FILE_2C2800.s new file mode 100644 index 00000000..bddd6f01 --- /dev/null +++ b/arm9/files/FILE_2C2800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C2800, 0x23A0 + .balign 512, 255 diff --git a/arm9/files/FILE_2C4C00.s b/arm9/files/FILE_2C4C00.s new file mode 100644 index 00000000..d41910b0 --- /dev/null +++ b/arm9/files/FILE_2C4C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C4C00, 0xE20 + .balign 512, 255 diff --git a/arm9/files/FILE_2C5C00.s b/arm9/files/FILE_2C5C00.s new file mode 100644 index 00000000..c24ed641 --- /dev/null +++ b/arm9/files/FILE_2C5C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C5C00, 0x3EC0 + .balign 512, 255 diff --git a/arm9/files/FILE_2C9C00.s b/arm9/files/FILE_2C9C00.s new file mode 100644 index 00000000..72b30caa --- /dev/null +++ b/arm9/files/FILE_2C9C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C9C00, 0x20 + .balign 512, 255 diff --git a/arm9/files/FILE_2C9E00.s b/arm9/files/FILE_2C9E00.s new file mode 100644 index 00000000..91cc4599 --- /dev/null +++ b/arm9/files/FILE_2C9E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2C9E00, 0x4AE0 + .balign 512, 255 diff --git a/arm9/files/FILE_2CEA00.s b/arm9/files/FILE_2CEA00.s new file mode 100644 index 00000000..e9a4ed70 --- /dev/null +++ b/arm9/files/FILE_2CEA00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2CEA00, 0x1220 + .balign 512, 255 diff --git a/arm9/files/FILE_2CFE00.s b/arm9/files/FILE_2CFE00.s new file mode 100644 index 00000000..513e7dea --- /dev/null +++ b/arm9/files/FILE_2CFE00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2CFE00, 0x5DE0 + .balign 512, 255 diff --git a/arm9/files/FILE_2D5C00.s b/arm9/files/FILE_2D5C00.s new file mode 100644 index 00000000..adc46cc2 --- /dev/null +++ b/arm9/files/FILE_2D5C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2D5C00, 0x1E20 + .balign 512, 255 diff --git a/arm9/files/FILE_2D7C00.s b/arm9/files/FILE_2D7C00.s new file mode 100644 index 00000000..4fc876ea --- /dev/null +++ b/arm9/files/FILE_2D7C00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2D7C00, 0x1BE0 + .balign 512, 255 diff --git a/arm9/files/FILE_2D9800.s b/arm9/files/FILE_2D9800.s new file mode 100644 index 00000000..772b6549 --- /dev/null +++ b/arm9/files/FILE_2D9800.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2D9800, 0x460 + .balign 512, 255 diff --git a/arm9/files/FILE_2D9E00.s b/arm9/files/FILE_2D9E00.s new file mode 100644 index 00000000..934f9168 --- /dev/null +++ b/arm9/files/FILE_2D9E00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2D9E00, 0x52C0 + .balign 512, 255 diff --git a/arm9/files/FILE_2DF200.s b/arm9/files/FILE_2DF200.s new file mode 100644 index 00000000..b5761253 --- /dev/null +++ b/arm9/files/FILE_2DF200.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2DF200, 0xA720 + .balign 512, 255 diff --git a/arm9/files/FILE_2E9A00.s b/arm9/files/FILE_2E9A00.s new file mode 100644 index 00000000..8b6338f7 --- /dev/null +++ b/arm9/files/FILE_2E9A00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2E9A00, 0x5580 + .balign 512, 255 diff --git a/arm9/files/FILE_2EF000.s b/arm9/files/FILE_2EF000.s new file mode 100644 index 00000000..b8304264 --- /dev/null +++ b/arm9/files/FILE_2EF000.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2EF000, 0x2540 + .balign 512, 255 diff --git a/arm9/files/FILE_2F1600.s b/arm9/files/FILE_2F1600.s new file mode 100644 index 00000000..643b88fc --- /dev/null +++ b/arm9/files/FILE_2F1600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2F1600, 0xE2A0 + .balign 512, 255 diff --git a/arm9/files/FILE_2FFA00.s b/arm9/files/FILE_2FFA00.s new file mode 100644 index 00000000..8fb7cb9c --- /dev/null +++ b/arm9/files/FILE_2FFA00.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x2FFA00, 0x3920 + .balign 512, 255 diff --git a/arm9/files/FILE_303400.s b/arm9/files/FILE_303400.s new file mode 100644 index 00000000..a180411b --- /dev/null +++ b/arm9/files/FILE_303400.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x303400, 0x9100 + .balign 512, 255 diff --git a/arm9/files/FILE_30C600.s b/arm9/files/FILE_30C600.s new file mode 100644 index 00000000..72531ed0 --- /dev/null +++ b/arm9/files/FILE_30C600.s @@ -0,0 +1,4 @@ + .include "asm/macros.inc" + .text + .incbin "baserom.nds", 0x30C600, 0x820 + .balign 512, 255 diff --git a/files/FILE_10C400.s b/files/FILE_10C400.s deleted file mode 100644 index 5cf27f33..00000000 --- a/files/FILE_10C400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x10C400, 0x20 - .balign 512, 255 diff --git a/files/FILE_10C600.s b/files/FILE_10C600.s deleted file mode 100644 index d2608c8c..00000000 --- a/files/FILE_10C600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x10C600, 0x20 - .balign 512, 255 diff --git a/files/FILE_10C800.s b/files/FILE_10C800.s deleted file mode 100644 index 8cb22116..00000000 --- a/files/FILE_10C800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x10C800, 0x20 - .balign 512, 255 diff --git a/files/FILE_10CA00.s b/files/FILE_10CA00.s deleted file mode 100644 index 46e1e03b..00000000 --- a/files/FILE_10CA00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x10CA00, 0x20 - .balign 512, 255 diff --git a/files/FILE_10CC00.s b/files/FILE_10CC00.s deleted file mode 100644 index 2876942a..00000000 --- a/files/FILE_10CC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x10CC00, 0x386E0 - .balign 512, 255 diff --git a/files/FILE_145400.s b/files/FILE_145400.s deleted file mode 100644 index 31de6e12..00000000 --- a/files/FILE_145400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x145400, 0x261A0 - .balign 512, 255 diff --git a/files/FILE_16B600.s b/files/FILE_16B600.s deleted file mode 100644 index 33e75c23..00000000 --- a/files/FILE_16B600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x16B600, 0x18D80 - .balign 512, 255 diff --git a/files/FILE_184400.s b/files/FILE_184400.s deleted file mode 100644 index 936860c0..00000000 --- a/files/FILE_184400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x184400, 0x32E0 - .balign 512, 255 diff --git a/files/FILE_187800.s b/files/FILE_187800.s deleted file mode 100644 index 38b64eec..00000000 --- a/files/FILE_187800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x187800, 0x1B760 - .balign 512, 255 diff --git a/files/FILE_1A3000.s b/files/FILE_1A3000.s deleted file mode 100644 index 3febcf47..00000000 --- a/files/FILE_1A3000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x1A3000, 0xA1A0 - .balign 512, 255 diff --git a/files/FILE_1AD200.s b/files/FILE_1AD200.s deleted file mode 100644 index 24bfcb9b..00000000 --- a/files/FILE_1AD200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x1AD200, 0x20 - .balign 512, 255 diff --git a/files/FILE_1AD400.s b/files/FILE_1AD400.s deleted file mode 100644 index f66becc6..00000000 --- a/files/FILE_1AD400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x1AD400, 0x329E0 - .balign 512, 255 diff --git a/files/FILE_1DFE00.s b/files/FILE_1DFE00.s deleted file mode 100644 index 5e5e8a7c..00000000 --- a/files/FILE_1DFE00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x1DFE00, 0x19260 - .balign 512, 255 diff --git a/files/FILE_1F9200.s b/files/FILE_1F9200.s deleted file mode 100644 index e2e33721..00000000 --- a/files/FILE_1F9200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x1F9200, 0x2EBE0 - .balign 512, 255 diff --git a/files/FILE_227E00.s b/files/FILE_227E00.s deleted file mode 100644 index ab307e3a..00000000 --- a/files/FILE_227E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x227E00, 0xF520 - .balign 512, 255 diff --git a/files/FILE_237400.s b/files/FILE_237400.s deleted file mode 100644 index 45907862..00000000 --- a/files/FILE_237400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x237400, 0x4680 - .balign 512, 255 diff --git a/files/FILE_23BC00.s b/files/FILE_23BC00.s deleted file mode 100644 index 72123ecb..00000000 --- a/files/FILE_23BC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x23BC00, 0x28500 - .balign 512, 255 diff --git a/files/FILE_264200.s b/files/FILE_264200.s deleted file mode 100644 index 5e654387..00000000 --- a/files/FILE_264200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x264200, 0x6E80 - .balign 512, 255 diff --git a/files/FILE_26B200.s b/files/FILE_26B200.s deleted file mode 100644 index 0c91220f..00000000 --- a/files/FILE_26B200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x26B200, 0x17CE0 - .balign 512, 255 diff --git a/files/FILE_283000.s b/files/FILE_283000.s deleted file mode 100644 index 6b536136..00000000 --- a/files/FILE_283000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x283000, 0x100 - .balign 512, 255 diff --git a/files/FILE_283200.s b/files/FILE_283200.s deleted file mode 100644 index 461d9ac6..00000000 --- a/files/FILE_283200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x283200, 0x2400 - .balign 512, 255 diff --git a/files/FILE_285600.s b/files/FILE_285600.s deleted file mode 100644 index 02c6eb09..00000000 --- a/files/FILE_285600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x285600, 0x5C0 - .balign 512, 255 diff --git a/files/FILE_285C00.s b/files/FILE_285C00.s deleted file mode 100644 index 70fab4a8..00000000 --- a/files/FILE_285C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x285C00, 0xF00 - .balign 512, 255 diff --git a/files/FILE_286C00.s b/files/FILE_286C00.s deleted file mode 100644 index 7d4ff42d..00000000 --- a/files/FILE_286C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x286C00, 0x1900 - .balign 512, 255 diff --git a/files/FILE_288600.s b/files/FILE_288600.s deleted file mode 100644 index cdb33573..00000000 --- a/files/FILE_288600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x288600, 0x9A0 - .balign 512, 255 diff --git a/files/FILE_289000.s b/files/FILE_289000.s deleted file mode 100644 index 0d794c29..00000000 --- a/files/FILE_289000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x289000, 0x560 - .balign 512, 255 diff --git a/files/FILE_289600.s b/files/FILE_289600.s deleted file mode 100644 index 813f71fe..00000000 --- a/files/FILE_289600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x289600, 0x800 - .balign 512, 255 diff --git a/files/FILE_289E00.s b/files/FILE_289E00.s deleted file mode 100644 index 34da6195..00000000 --- a/files/FILE_289E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x289E00, 0xBA0 - .balign 512, 255 diff --git a/files/FILE_28AA00.s b/files/FILE_28AA00.s deleted file mode 100644 index d8827a3a..00000000 --- a/files/FILE_28AA00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28AA00, 0x1780 - .balign 512, 255 diff --git a/files/FILE_28C200.s b/files/FILE_28C200.s deleted file mode 100644 index b69d6856..00000000 --- a/files/FILE_28C200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28C200, 0x900 - .balign 512, 255 diff --git a/files/FILE_28CC00.s b/files/FILE_28CC00.s deleted file mode 100644 index 8b411001..00000000 --- a/files/FILE_28CC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28CC00, 0x600 - .balign 512, 255 diff --git a/files/FILE_28D200.s b/files/FILE_28D200.s deleted file mode 100644 index fe324802..00000000 --- a/files/FILE_28D200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28D200, 0x600 - .balign 512, 255 diff --git a/files/FILE_28D800.s b/files/FILE_28D800.s deleted file mode 100644 index f787e794..00000000 --- a/files/FILE_28D800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28D800, 0x4A0 - .balign 512, 255 diff --git a/files/FILE_28DE00.s b/files/FILE_28DE00.s deleted file mode 100644 index 6658c9fc..00000000 --- a/files/FILE_28DE00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28DE00, 0x320 - .balign 512, 255 diff --git a/files/FILE_28E200.s b/files/FILE_28E200.s deleted file mode 100644 index d36e77ce..00000000 --- a/files/FILE_28E200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28E200, 0x4C0 - .balign 512, 255 diff --git a/files/FILE_28E800.s b/files/FILE_28E800.s deleted file mode 100644 index bdc1ef52..00000000 --- a/files/FILE_28E800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28E800, 0x9A0 - .balign 512, 255 diff --git a/files/FILE_28F200.s b/files/FILE_28F200.s deleted file mode 100644 index f8b95b6a..00000000 --- a/files/FILE_28F200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x28F200, 0xCC0 - .balign 512, 255 diff --git a/files/FILE_290000.s b/files/FILE_290000.s deleted file mode 100644 index 7e15ff90..00000000 --- a/files/FILE_290000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x290000, 0x560 - .balign 512, 255 diff --git a/files/FILE_290600.s b/files/FILE_290600.s deleted file mode 100644 index fda50640..00000000 --- a/files/FILE_290600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x290600, 0xB40 - .balign 512, 255 diff --git a/files/FILE_291200.s b/files/FILE_291200.s deleted file mode 100644 index ce12a90a..00000000 --- a/files/FILE_291200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x291200, 0xCC0 - .balign 512, 255 diff --git a/files/FILE_292000.s b/files/FILE_292000.s deleted file mode 100644 index d50a3ef1..00000000 --- a/files/FILE_292000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x292000, 0xC60 - .balign 512, 255 diff --git a/files/FILE_292E00.s b/files/FILE_292E00.s deleted file mode 100644 index b5a8d36d..00000000 --- a/files/FILE_292E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x292E00, 0x1140 - .balign 512, 255 diff --git a/files/FILE_294000.s b/files/FILE_294000.s deleted file mode 100644 index 8a03373c..00000000 --- a/files/FILE_294000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x294000, 0x900 - .balign 512, 255 diff --git a/files/FILE_294A00.s b/files/FILE_294A00.s deleted file mode 100644 index 452c8165..00000000 --- a/files/FILE_294A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x294A00, 0x9C0 - .balign 512, 255 diff --git a/files/FILE_295400.s b/files/FILE_295400.s deleted file mode 100644 index b21be08b..00000000 --- a/files/FILE_295400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x295400, 0x4A0 - .balign 512, 255 diff --git a/files/FILE_295A00.s b/files/FILE_295A00.s deleted file mode 100644 index 1017f6aa..00000000 --- a/files/FILE_295A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x295A00, 0x940 - .balign 512, 255 diff --git a/files/FILE_296400.s b/files/FILE_296400.s deleted file mode 100644 index 118ca39a..00000000 --- a/files/FILE_296400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x296400, 0x320 - .balign 512, 255 diff --git a/files/FILE_296800.s b/files/FILE_296800.s deleted file mode 100644 index 68ac75b9..00000000 --- a/files/FILE_296800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x296800, 0xCA0 - .balign 512, 255 diff --git a/files/FILE_297600.s b/files/FILE_297600.s deleted file mode 100644 index 1887c4af..00000000 --- a/files/FILE_297600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x297600, 0x8A0 - .balign 512, 255 diff --git a/files/FILE_298000.s b/files/FILE_298000.s deleted file mode 100644 index ffdcde2a..00000000 --- a/files/FILE_298000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x298000, 0x600 - .balign 512, 255 diff --git a/files/FILE_298600.s b/files/FILE_298600.s deleted file mode 100644 index d4bef86c..00000000 --- a/files/FILE_298600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x298600, 0x320 - .balign 512, 255 diff --git a/files/FILE_298A00.s b/files/FILE_298A00.s deleted file mode 100644 index 258432c2..00000000 --- a/files/FILE_298A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x298A00, 0xFC0 - .balign 512, 255 diff --git a/files/FILE_299A00.s b/files/FILE_299A00.s deleted file mode 100644 index 71432656..00000000 --- a/files/FILE_299A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x299A00, 0x400 - .balign 512, 255 diff --git a/files/FILE_299E00.s b/files/FILE_299E00.s deleted file mode 100644 index 4fb90fe1..00000000 --- a/files/FILE_299E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x299E00, 0x2480 - .balign 512, 255 diff --git a/files/FILE_29C400.s b/files/FILE_29C400.s deleted file mode 100644 index 3b880c03..00000000 --- a/files/FILE_29C400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x29C400, 0x2380 - .balign 512, 255 diff --git a/files/FILE_29E800.s b/files/FILE_29E800.s deleted file mode 100644 index f3cf72cb..00000000 --- a/files/FILE_29E800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x29E800, 0x3040 - .balign 512, 255 diff --git a/files/FILE_2A1A00.s b/files/FILE_2A1A00.s deleted file mode 100644 index d917b776..00000000 --- a/files/FILE_2A1A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2A1A00, 0x47A0 - .balign 512, 255 diff --git a/files/FILE_2A6200.s b/files/FILE_2A6200.s deleted file mode 100644 index ae62fcc6..00000000 --- a/files/FILE_2A6200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2A6200, 0x2540 - .balign 512, 255 diff --git a/files/FILE_2A8800.s b/files/FILE_2A8800.s deleted file mode 100644 index 967d96f3..00000000 --- a/files/FILE_2A8800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2A8800, 0x15A0 - .balign 512, 255 diff --git a/files/FILE_2A9E00.s b/files/FILE_2A9E00.s deleted file mode 100644 index 21839769..00000000 --- a/files/FILE_2A9E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2A9E00, 0x2C20 - .balign 512, 255 diff --git a/files/FILE_2ACC00.s b/files/FILE_2ACC00.s deleted file mode 100644 index 2068bd4c..00000000 --- a/files/FILE_2ACC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2ACC00, 0xD00 - .balign 512, 255 diff --git a/files/FILE_2ADA00.s b/files/FILE_2ADA00.s deleted file mode 100644 index 9f464dac..00000000 --- a/files/FILE_2ADA00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2ADA00, 0x1080 - .balign 512, 255 diff --git a/files/FILE_2AEC00.s b/files/FILE_2AEC00.s deleted file mode 100644 index e6a54fb3..00000000 --- a/files/FILE_2AEC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2AEC00, 0x3DE0 - .balign 512, 255 diff --git a/files/FILE_2B2A00.s b/files/FILE_2B2A00.s deleted file mode 100644 index 44eba0d2..00000000 --- a/files/FILE_2B2A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2B2A00, 0x4AC0 - .balign 512, 255 diff --git a/files/FILE_2B7600.s b/files/FILE_2B7600.s deleted file mode 100644 index 8258b44e..00000000 --- a/files/FILE_2B7600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2B7600, 0x1C40 - .balign 512, 255 diff --git a/files/FILE_2B9400.s b/files/FILE_2B9400.s deleted file mode 100644 index 17ffa8d8..00000000 --- a/files/FILE_2B9400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2B9400, 0x3000 - .balign 512, 255 diff --git a/files/FILE_2BC400.s b/files/FILE_2BC400.s deleted file mode 100644 index e34ef7f4..00000000 --- a/files/FILE_2BC400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2BC400, 0x2660 - .balign 512, 255 diff --git a/files/FILE_2BEC00.s b/files/FILE_2BEC00.s deleted file mode 100644 index c229a70e..00000000 --- a/files/FILE_2BEC00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2BEC00, 0x2440 - .balign 512, 255 diff --git a/files/FILE_2C1200.s b/files/FILE_2C1200.s deleted file mode 100644 index f357627d..00000000 --- a/files/FILE_2C1200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C1200, 0x1600 - .balign 512, 255 diff --git a/files/FILE_2C2800.s b/files/FILE_2C2800.s deleted file mode 100644 index bddd6f01..00000000 --- a/files/FILE_2C2800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C2800, 0x23A0 - .balign 512, 255 diff --git a/files/FILE_2C4C00.s b/files/FILE_2C4C00.s deleted file mode 100644 index d41910b0..00000000 --- a/files/FILE_2C4C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C4C00, 0xE20 - .balign 512, 255 diff --git a/files/FILE_2C5C00.s b/files/FILE_2C5C00.s deleted file mode 100644 index c24ed641..00000000 --- a/files/FILE_2C5C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C5C00, 0x3EC0 - .balign 512, 255 diff --git a/files/FILE_2C9C00.s b/files/FILE_2C9C00.s deleted file mode 100644 index 72b30caa..00000000 --- a/files/FILE_2C9C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C9C00, 0x20 - .balign 512, 255 diff --git a/files/FILE_2C9E00.s b/files/FILE_2C9E00.s deleted file mode 100644 index 91cc4599..00000000 --- a/files/FILE_2C9E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2C9E00, 0x4AE0 - .balign 512, 255 diff --git a/files/FILE_2CEA00.s b/files/FILE_2CEA00.s deleted file mode 100644 index e9a4ed70..00000000 --- a/files/FILE_2CEA00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2CEA00, 0x1220 - .balign 512, 255 diff --git a/files/FILE_2CFE00.s b/files/FILE_2CFE00.s deleted file mode 100644 index 513e7dea..00000000 --- a/files/FILE_2CFE00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2CFE00, 0x5DE0 - .balign 512, 255 diff --git a/files/FILE_2D5C00.s b/files/FILE_2D5C00.s deleted file mode 100644 index adc46cc2..00000000 --- a/files/FILE_2D5C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2D5C00, 0x1E20 - .balign 512, 255 diff --git a/files/FILE_2D7C00.s b/files/FILE_2D7C00.s deleted file mode 100644 index 4fc876ea..00000000 --- a/files/FILE_2D7C00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2D7C00, 0x1BE0 - .balign 512, 255 diff --git a/files/FILE_2D9800.s b/files/FILE_2D9800.s deleted file mode 100644 index 772b6549..00000000 --- a/files/FILE_2D9800.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2D9800, 0x460 - .balign 512, 255 diff --git a/files/FILE_2D9E00.s b/files/FILE_2D9E00.s deleted file mode 100644 index 934f9168..00000000 --- a/files/FILE_2D9E00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2D9E00, 0x52C0 - .balign 512, 255 diff --git a/files/FILE_2DF200.s b/files/FILE_2DF200.s deleted file mode 100644 index b5761253..00000000 --- a/files/FILE_2DF200.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2DF200, 0xA720 - .balign 512, 255 diff --git a/files/FILE_2E9A00.s b/files/FILE_2E9A00.s deleted file mode 100644 index 8b6338f7..00000000 --- a/files/FILE_2E9A00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2E9A00, 0x5580 - .balign 512, 255 diff --git a/files/FILE_2EF000.s b/files/FILE_2EF000.s deleted file mode 100644 index b8304264..00000000 --- a/files/FILE_2EF000.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2EF000, 0x2540 - .balign 512, 255 diff --git a/files/FILE_2F1600.s b/files/FILE_2F1600.s deleted file mode 100644 index 643b88fc..00000000 --- a/files/FILE_2F1600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2F1600, 0xE2A0 - .balign 512, 255 diff --git a/files/FILE_2FFA00.s b/files/FILE_2FFA00.s deleted file mode 100644 index 8fb7cb9c..00000000 --- a/files/FILE_2FFA00.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x2FFA00, 0x3920 - .balign 512, 255 diff --git a/files/FILE_303400.s b/files/FILE_303400.s deleted file mode 100644 index a180411b..00000000 --- a/files/FILE_303400.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x303400, 0x9100 - .balign 512, 255 diff --git a/files/FILE_30C600.s b/files/FILE_30C600.s deleted file mode 100644 index 72531ed0..00000000 --- a/files/FILE_30C600.s +++ /dev/null @@ -1,4 +0,0 @@ - .include "asm/macros.inc" - .text - .incbin "baserom.nds", 0x30C600, 0x820 - .balign 512, 255 diff --git a/pokediamond.lcf b/pokediamond.lcf index 01161a05..362e8e6c 100644 --- a/pokediamond.lcf +++ b/pokediamond.lcf @@ -6,93 +6,6 @@ MEMORY { filenametable (RWX) : ORIGIN=0, LENGTH=0 fileallocationtable (RWX) : ORIGIN=0, LENGTH=0 icon_title (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_10C400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_10C600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_10C800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_10CA00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_10CC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_145400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_16B600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_184400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_187800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_1A3000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_1AD200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_1AD400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_1DFE00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_1F9200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_227E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_237400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_23BC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_264200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_26B200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_283000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_283200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_285600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_285C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_286C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_288600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_289000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_289600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_289E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28AA00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28C200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28CC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28D200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28D800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28DE00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28E200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28E800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_28F200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_290000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_290600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_291200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_292000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_292E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_294000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_294A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_295400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_295A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_296400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_296800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_297600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_298000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_298600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_298A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_299A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_299E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_29C400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_29E800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2A1A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2A6200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2A8800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2A9E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2ACC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2ADA00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2AEC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2B2A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2B7600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2B9400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2BC400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2BEC00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C1200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C2800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C4C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C5C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C9C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2C9E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2CEA00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2CFE00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2D5C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2D7C00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2D9800 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2D9E00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2DF200 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2E9A00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2EF000 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2F1600 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_2FFA00 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_303400 (RWX) : ORIGIN=0, LENGTH=0 - rom3.FILE_30C600 (RWX) : ORIGIN=0, LENGTH=0 narc.FILE_339000 (RWX) : ORIGIN=0, LENGTH=0 narc.FILE_339200 (RWX) : ORIGIN=0, LENGTH=0 narc.FILE_339C00 (RWX) : ORIGIN=0, LENGTH=0 @@ -377,268 +290,6 @@ SECTIONS { INCLUDE arm9.bin } > arm9 - .FILE_10C400 : AT (0x10C400) { - FILE_10C400.o (.text) /* 0x10C400 */ - } > rom3.FILE_10C400 - .FILE_10C600 : AT (0x10C600) { - FILE_10C600.o (.text) /* 0x10C600 */ - } > rom3.FILE_10C600 - .FILE_10C800 : AT (0x10C800) { - FILE_10C800.o (.text) /* 0x10C800 */ - } > rom3.FILE_10C800 - .FILE_10CA00 : AT (0x10CA00) { - FILE_10CA00.o (.text) /* 0x10CA00 */ - } > rom3.FILE_10CA00 - .FILE_10CC00 : AT (0x10CC00) { - FILE_10CC00.o (.text) /* 0x10CC00 */ - } > rom3.FILE_10CC00 - .FILE_145400 : AT (0x145400) { - FILE_145400.o (.text) /* 0x145400 */ - } > rom3.FILE_145400 - .FILE_16B600 : AT (0x16B600) { - FILE_16B600.o (.text) /* 0x16B600 */ - } > rom3.FILE_16B600 - .FILE_184400 : AT (0x184400) { - FILE_184400.o (.text) /* 0x184400 */ - } > rom3.FILE_184400 - .FILE_187800 : AT (0x187800) { - FILE_187800.o (.text) /* 0x187800 */ - } > rom3.FILE_187800 - .FILE_1A3000 : AT (0x1A3000) { - FILE_1A3000.o (.text) /* 0x1A3000 */ - } > rom3.FILE_1A3000 - .FILE_1AD200 : AT (0x1AD200) { - FILE_1AD200.o (.text) /* 0x1AD200 */ - } > rom3.FILE_1AD200 - .FILE_1AD400 : AT (0x1AD400) { - FILE_1AD400.o (.text) /* 0x1AD400 */ - } > rom3.FILE_1AD400 - .FILE_1DFE00 : AT (0x1DFE00) { - FILE_1DFE00.o (.text) /* 0x1DFE00 */ - } > rom3.FILE_1DFE00 - .FILE_1F9200 : AT (0x1F9200) { - FILE_1F9200.o (.text) /* 0x1F9200 */ - } > rom3.FILE_1F9200 - .FILE_227E00 : AT (0x227E00) { - FILE_227E00.o (.text) /* 0x227E00 */ - } > rom3.FILE_227E00 - .FILE_237400 : AT (0x237400) { - FILE_237400.o (.text) /* 0x237400 */ - } > rom3.FILE_237400 - .FILE_23BC00 : AT (0x23BC00) { - FILE_23BC00.o (.text) /* 0x23BC00 */ - } > rom3.FILE_23BC00 - .FILE_264200 : AT (0x264200) { - FILE_264200.o (.text) /* 0x264200 */ - } > rom3.FILE_264200 - .FILE_26B200 : AT (0x26B200) { - FILE_26B200.o (.text) /* 0x26B200 */ - } > rom3.FILE_26B200 - .FILE_283000 : AT (0x283000) { - FILE_283000.o (.text) /* 0x283000 */ - } > rom3.FILE_283000 - .FILE_283200 : AT (0x283200) { - FILE_283200.o (.text) /* 0x283200 */ - } > rom3.FILE_283200 - .FILE_285600 : AT (0x285600) { - FILE_285600.o (.text) /* 0x285600 */ - } > rom3.FILE_285600 - .FILE_285C00 : AT (0x285C00) { - FILE_285C00.o (.text) /* 0x285C00 */ - } > rom3.FILE_285C00 - .FILE_286C00 : AT (0x286C00) { - FILE_286C00.o (.text) /* 0x286C00 */ - } > rom3.FILE_286C00 - .FILE_288600 : AT (0x288600) { - FILE_288600.o (.text) /* 0x288600 */ - } > rom3.FILE_288600 - .FILE_289000 : AT (0x289000) { - FILE_289000.o (.text) /* 0x289000 */ - } > rom3.FILE_289000 - .FILE_289600 : AT (0x289600) { - FILE_289600.o (.text) /* 0x289600 */ - } > rom3.FILE_289600 - .FILE_289E00 : AT (0x289E00) { - FILE_289E00.o (.text) /* 0x289E00 */ - } > rom3.FILE_289E00 - .FILE_28AA00 : AT (0x28AA00) { - FILE_28AA00.o (.text) /* 0x28AA00 */ - } > rom3.FILE_28AA00 - .FILE_28C200 : AT (0x28C200) { - FILE_28C200.o (.text) /* 0x28C200 */ - } > rom3.FILE_28C200 - .FILE_28CC00 : AT (0x28CC00) { - FILE_28CC00.o (.text) /* 0x28CC00 */ - } > rom3.FILE_28CC00 - .FILE_28D200 : AT (0x28D200) { - FILE_28D200.o (.text) /* 0x28D200 */ - } > rom3.FILE_28D200 - .FILE_28D800 : AT (0x28D800) { - FILE_28D800.o (.text) /* 0x28D800 */ - } > rom3.FILE_28D800 - .FILE_28DE00 : AT (0x28DE00) { - FILE_28DE00.o (.text) /* 0x28DE00 */ - } > rom3.FILE_28DE00 - .FILE_28E200 : AT (0x28E200) { - FILE_28E200.o (.text) /* 0x28E200 */ - } > rom3.FILE_28E200 - .FILE_28E800 : AT (0x28E800) { - FILE_28E800.o (.text) /* 0x28E800 */ - } > rom3.FILE_28E800 - .FILE_28F200 : AT (0x28F200) { - FILE_28F200.o (.text) /* 0x28F200 */ - } > rom3.FILE_28F200 - .FILE_290000 : AT (0x290000) { - FILE_290000.o (.text) /* 0x290000 */ - } > rom3.FILE_290000 - .FILE_290600 : AT (0x290600) { - FILE_290600.o (.text) /* 0x290600 */ - } > rom3.FILE_290600 - .FILE_291200 : AT (0x291200) { - FILE_291200.o (.text) /* 0x291200 */ - } > rom3.FILE_291200 - .FILE_292000 : AT (0x292000) { - FILE_292000.o (.text) /* 0x292000 */ - } > rom3.FILE_292000 - .FILE_292E00 : AT (0x292E00) { - FILE_292E00.o (.text) /* 0x292E00 */ - } > rom3.FILE_292E00 - .FILE_294000 : AT (0x294000) { - FILE_294000.o (.text) /* 0x294000 */ - } > rom3.FILE_294000 - .FILE_294A00 : AT (0x294A00) { - FILE_294A00.o (.text) /* 0x294A00 */ - } > rom3.FILE_294A00 - .FILE_295400 : AT (0x295400) { - FILE_295400.o (.text) /* 0x295400 */ - } > rom3.FILE_295400 - .FILE_295A00 : AT (0x295A00) { - FILE_295A00.o (.text) /* 0x295A00 */ - } > rom3.FILE_295A00 - .FILE_296400 : AT (0x296400) { - FILE_296400.o (.text) /* 0x296400 */ - } > rom3.FILE_296400 - .FILE_296800 : AT (0x296800) { - FILE_296800.o (.text) /* 0x296800 */ - } > rom3.FILE_296800 - .FILE_297600 : AT (0x297600) { - FILE_297600.o (.text) /* 0x297600 */ - } > rom3.FILE_297600 - .FILE_298000 : AT (0x298000) { - FILE_298000.o (.text) /* 0x298000 */ - } > rom3.FILE_298000 - .FILE_298600 : AT (0x298600) { - FILE_298600.o (.text) /* 0x298600 */ - } > rom3.FILE_298600 - .FILE_298A00 : AT (0x298A00) { - FILE_298A00.o (.text) /* 0x298A00 */ - } > rom3.FILE_298A00 - .FILE_299A00 : AT (0x299A00) { - FILE_299A00.o (.text) /* 0x299A00 */ - } > rom3.FILE_299A00 - .FILE_299E00 : AT (0x299E00) { - FILE_299E00.o (.text) /* 0x299E00 */ - } > rom3.FILE_299E00 - .FILE_29C400 : AT (0x29C400) { - FILE_29C400.o (.text) /* 0x29C400 */ - } > rom3.FILE_29C400 - .FILE_29E800 : AT (0x29E800) { - FILE_29E800.o (.text) /* 0x29E800 */ - } > rom3.FILE_29E800 - .FILE_2A1A00 : AT (0x2A1A00) { - FILE_2A1A00.o (.text) /* 0x2A1A00 */ - } > rom3.FILE_2A1A00 - .FILE_2A6200 : AT (0x2A6200) { - FILE_2A6200.o (.text) /* 0x2A6200 */ - } > rom3.FILE_2A6200 - .FILE_2A8800 : AT (0x2A8800) { - FILE_2A8800.o (.text) /* 0x2A8800 */ - } > rom3.FILE_2A8800 - .FILE_2A9E00 : AT (0x2A9E00) { - FILE_2A9E00.o (.text) /* 0x2A9E00 */ - } > rom3.FILE_2A9E00 - .FILE_2ACC00 : AT (0x2ACC00) { - FILE_2ACC00.o (.text) /* 0x2ACC00 */ - } > rom3.FILE_2ACC00 - .FILE_2ADA00 : AT (0x2ADA00) { - FILE_2ADA00.o (.text) /* 0x2ADA00 */ - } > rom3.FILE_2ADA00 - .FILE_2AEC00 : AT (0x2AEC00) { - FILE_2AEC00.o (.text) /* 0x2AEC00 */ - } > rom3.FILE_2AEC00 - .FILE_2B2A00 : AT (0x2B2A00) { - FILE_2B2A00.o (.text) /* 0x2B2A00 */ - } > rom3.FILE_2B2A00 - .FILE_2B7600 : AT (0x2B7600) { - FILE_2B7600.o (.text) /* 0x2B7600 */ - } > rom3.FILE_2B7600 - .FILE_2B9400 : AT (0x2B9400) { - FILE_2B9400.o (.text) /* 0x2B9400 */ - } > rom3.FILE_2B9400 - .FILE_2BC400 : AT (0x2BC400) { - FILE_2BC400.o (.text) /* 0x2BC400 */ - } > rom3.FILE_2BC400 - .FILE_2BEC00 : AT (0x2BEC00) { - FILE_2BEC00.o (.text) /* 0x2BEC00 */ - } > rom3.FILE_2BEC00 - .FILE_2C1200 : AT (0x2C1200) { - FILE_2C1200.o (.text) /* 0x2C1200 */ - } > rom3.FILE_2C1200 - .FILE_2C2800 : AT (0x2C2800) { - FILE_2C2800.o (.text) /* 0x2C2800 */ - } > rom3.FILE_2C2800 - .FILE_2C4C00 : AT (0x2C4C00) { - FILE_2C4C00.o (.text) /* 0x2C4C00 */ - } > rom3.FILE_2C4C00 - .FILE_2C5C00 : AT (0x2C5C00) { - FILE_2C5C00.o (.text) /* 0x2C5C00 */ - } > rom3.FILE_2C5C00 - .FILE_2C9C00 : AT (0x2C9C00) { - FILE_2C9C00.o (.text) /* 0x2C9C00 */ - } > rom3.FILE_2C9C00 - .FILE_2C9E00 : AT (0x2C9E00) { - FILE_2C9E00.o (.text) /* 0x2C9E00 */ - } > rom3.FILE_2C9E00 - .FILE_2CEA00 : AT (0x2CEA00) { - FILE_2CEA00.o (.text) /* 0x2CEA00 */ - } > rom3.FILE_2CEA00 - .FILE_2CFE00 : AT (0x2CFE00) { - FILE_2CFE00.o (.text) /* 0x2CFE00 */ - } > rom3.FILE_2CFE00 - .FILE_2D5C00 : AT (0x2D5C00) { - FILE_2D5C00.o (.text) /* 0x2D5C00 */ - } > rom3.FILE_2D5C00 - .FILE_2D7C00 : AT (0x2D7C00) { - FILE_2D7C00.o (.text) /* 0x2D7C00 */ - } > rom3.FILE_2D7C00 - .FILE_2D9800 : AT (0x2D9800) { - FILE_2D9800.o (.text) /* 0x2D9800 */ - } > rom3.FILE_2D9800 - .FILE_2D9E00 : AT (0x2D9E00) { - FILE_2D9E00.o (.text) /* 0x2D9E00 */ - } > rom3.FILE_2D9E00 - .FILE_2DF200 : AT (0x2DF200) { - FILE_2DF200.o (.text) /* 0x2DF200 */ - } > rom3.FILE_2DF200 - .FILE_2E9A00 : AT (0x2E9A00) { - FILE_2E9A00.o (.text) /* 0x2E9A00 */ - } > rom3.FILE_2E9A00 - .FILE_2EF000 : AT (0x2EF000) { - FILE_2EF000.o (.text) /* 0x2EF000 */ - } > rom3.FILE_2EF000 - .FILE_2F1600 : AT (0x2F1600) { - FILE_2F1600.o (.text) /* 0x2F1600 */ - } > rom3.FILE_2F1600 - .FILE_2FFA00 : AT (0x2FFA00) { - FILE_2FFA00.o (.text) /* 0x2FFA00 */ - } > rom3.FILE_2FFA00 - .FILE_303400 : AT (0x303400) { - FILE_303400.o (.text) /* 0x303400 */ - } > rom3.FILE_303400 - .FILE_30C600 : AT (0x30C600) { - FILE_30C600.o (.text) /* 0x30C600 */ - } > rom3.FILE_30C600 - .arm7 : AT(0x30D000) { ARM7AutoLoad = 0x02380158; INCLUDE arm7.bin -- cgit v1.2.3 From 3510d5acb20866b9f0ace302027e413abfb01b10 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 18:17:04 -0400 Subject: Disasemble ROM7 ITCM --- .gitignore | 7 +++-- arm7/Makefile | 6 ++--- arm7/asm/arm7_rom.s | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++-- 3 files changed, 79 insertions(+), 7 deletions(-) diff --git a/.gitignore b/.gitignore index 43a15d11..518bec55 100644 --- a/.gitignore +++ b/.gitignore @@ -6,8 +6,7 @@ tools/mwccarm/** # Build folder build/** -arm7/build/** -arm9/build/** +arm*/build/** # CLion folders .idea/ @@ -23,3 +22,7 @@ cmake-build-debug/ *.4bpp *.lz *.gbapal + +# For asmdiff +arm*/baserom.* +*.dump diff --git a/arm7/Makefile b/arm7/Makefile index edf4b913..c2e69fe2 100644 --- a/arm7/Makefile +++ b/arm7/Makefile @@ -79,9 +79,9 @@ OBJDUMP := $(CROSS)objdump OBJCOPY := $(CROSS)objcopy # ./tools/mwccarm/2.0/base/mwasmarm.exe -proc arm5te asm/arm7_thumb.s -o arm7.o -ASFLAGS = -proc arm5te -i .. -CFLAGS = -O4,p -proc v5te -thumb -fp soft -lang c99 -Cpp_exceptions off -ir ../include -LDFLAGS = -map -nodead -w off -proc v5te -interworking -map -symtab -m _start +ASFLAGS = -proc arm4t -i .. +CFLAGS = -O4,p -proc v4t -thumb -fp soft -lang c99 -Cpp_exceptions off -ir ../include +LDFLAGS = -map -nodead -w off -proc v4t -interworking -map -symtab -m _start ####################### Other Tools ######################### diff --git a/arm7/asm/arm7_rom.s b/arm7/asm/arm7_rom.s index d22e0d18..b2070728 100644 --- a/arm7/asm/arm7_rom.s +++ b/arm7/asm/arm7_rom.s @@ -3,10 +3,79 @@ .include "global.inc" .section .itcm - .incbin "baserom.nds", 0x30D1B0, 0xDC + arm_func_start FUNC_027E0000 +FUNC_027E0000: ; 0x027E0000 load at 0x023801B0 + stmdb sp!, {r4, r5, r6, lr} + ldr r6, [pc, #180] ; 0x270 + ldr r3, [pc, #180] ; 0x274 + ldr r0, [pc, #180] ; 0x278 + b _027E00B0 +_027E0014: + mov r2, r3 + ldr r5, [r3, #4] + add r1, r3, #8 + add r3, r3, #12 + ldr r4, [r1] + ldr r1, [r2] + cmp r1, #100663296 ; 0x6000000 + bne _027E00AC + ldr r3, [pc, #144] ; 0x27c + ldr r0, [pc, #144] ; 0x280 + str r3, [r0] + add r2, r5, r4 + ldr r0, [pc, #136] ; 0x284 + str r2, [r0] + ldr r1, [pc, #132] ; 0x288 + add r0, r3, r2 + cmp r1, r0 + beq _027E0060 + bl FUN_037FB1F0 +_027E0060: + ldr r0, [pc, #104] ; 0x280 + ldr r3, [r0] + mov r2, #0 + mov r1, r5, lsr #2 + b _027E0080 +_027E0074: + ldr r0, [r6], #4 + str r0, [r3], #4 + add r2, r2, #1 +_027E0080: + cmp r2, r1 + bcc _027E0074 + mov r1, #0 + mov r2, r4, lsr #2 + mov r0, r1 + b _027E00A0 +_027E0098: + str r0, [r3], #4 + add r1, r1, #1 +_027E00A0: + cmp r1, r2 + bcc _027E0098 + b _027E00B8 +_027E00AC: + add r6, r6, r5 +_027E00B0: + cmp r3, r0 + bne _027E0014 +_027E00B8: + ldmia sp!, {r4, r5, r6, lr} + bx lr +_027E00C0: .word 0x023801B0 +_027E00C4: .word 0x023A92F8 +_027E00C8: .word 0x023A931C +_027E00CC: .word 0x027E00DC +_027E00D0: .word 0x0380A3F4 +_027E00D4: .word 0x0380A3FC +_027E00D8: .word 0x027FAFCC .section .dtcm - .incbin "baserom.nds", 0x30D28C, 0x90D4 + .incbin "baserom.nds", 0x30D28C, 0x31F0 + + arm_func_start FUN_037FB1F0 +FUN_037FB1F0: ; 0x037FB1F0 + .incbin "baserom.nds", 0x31047C, 0x5EE4 thumb_func_start SVC_SoftReset SVC_SoftReset: ; 0x02389360 -- cgit v1.2.3 From aac0210bdf746128600757ffc89dc176152178fd Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 18:34:25 -0400 Subject: Move overlay defs to lcf includes --- arm9/arm9.lcf | 1306 +----------------------------------------- arm9/module_regions.lcf.inc | 87 +++ arm9/module_sections.lcf.inc | 435 ++++++++++++++ arm9/overlay_table.lcf.inc | 782 +++++++++++++++++++++++++ 4 files changed, 1307 insertions(+), 1303 deletions(-) create mode 100644 arm9/module_regions.lcf.inc create mode 100644 arm9/module_sections.lcf.inc create mode 100644 arm9/overlay_table.lcf.inc diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index e71920ae..b7ee9744 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -9,93 +9,7 @@ MEMORY { .ewram (RWX) : ORIGIN=0x023E0000, LENGTH=0 .dtcm (RW) : ORIGIN=0x027E0000, LENGTH=0 .overlay (RX) : ORIGIN=0, LENGTH=0 - MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 +#include "module_regions.lcf.inc" } SECTIONS { @@ -187,1222 +101,8 @@ SECTIONS { } > .footer .overlay : AT (0x107800) { - WRITEW 0; - WRITEW SDK_MODULE_00_START; - WRITEW SDK_MODULE_00_SIZE; - WRITEW SDK_MODULE_00_BSSSIZE; - WRITEW SDK_MODULE_00_STATIC_INIT_START; - WRITEW SDK_MODULE_00_STATIC_INIT_END; - WRITEW 0; - WRITEW 0; - - WRITEW 1; - WRITEW SDK_MODULE_01_START; - WRITEW SDK_MODULE_01_SIZE; - WRITEW SDK_MODULE_01_BSSSIZE; - WRITEW SDK_MODULE_01_STATIC_INIT_START; - WRITEW SDK_MODULE_01_STATIC_INIT_END; - WRITEW 1; - WRITEW 0; - - WRITEW 2; - WRITEW SDK_MODULE_02_START; - WRITEW SDK_MODULE_02_SIZE; - WRITEW SDK_MODULE_02_BSSSIZE; - WRITEW SDK_MODULE_02_STATIC_INIT_START; - WRITEW SDK_MODULE_02_STATIC_INIT_END; - WRITEW 2; - WRITEW 0; - - WRITEW 3; - WRITEW SDK_MODULE_03_START; - WRITEW SDK_MODULE_03_SIZE; - WRITEW SDK_MODULE_03_BSSSIZE; - WRITEW SDK_MODULE_03_STATIC_INIT_START; - WRITEW SDK_MODULE_03_STATIC_INIT_END; - WRITEW 3; - WRITEW 0; - - WRITEW 4; - WRITEW SDK_MODULE_04_START; - WRITEW SDK_MODULE_04_SIZE; - WRITEW SDK_MODULE_04_BSSSIZE; - WRITEW SDK_MODULE_04_STATIC_INIT_START; - WRITEW SDK_MODULE_04_STATIC_INIT_END; - WRITEW 4; - WRITEW 0; - - WRITEW 5; - WRITEW SDK_MODULE_05_START; - WRITEW SDK_MODULE_05_SIZE; - WRITEW SDK_MODULE_05_BSSSIZE; - WRITEW SDK_MODULE_05_STATIC_INIT_START; - WRITEW SDK_MODULE_05_STATIC_INIT_END; - WRITEW 5; - WRITEW 0; - - WRITEW 6; - WRITEW SDK_MODULE_06_START; - WRITEW SDK_MODULE_06_SIZE; - WRITEW SDK_MODULE_06_BSSSIZE; - WRITEW SDK_MODULE_06_STATIC_INIT_START; - WRITEW SDK_MODULE_06_STATIC_INIT_END; - WRITEW 6; - WRITEW 0; - - WRITEW 7; - WRITEW SDK_MODULE_07_START; - WRITEW SDK_MODULE_07_SIZE; - WRITEW SDK_MODULE_07_BSSSIZE; - WRITEW SDK_MODULE_07_STATIC_INIT_START; - WRITEW SDK_MODULE_07_STATIC_INIT_END; - WRITEW 7; - WRITEW 0; - - WRITEW 8; - WRITEW SDK_MODULE_08_START; - WRITEW SDK_MODULE_08_SIZE; - WRITEW SDK_MODULE_08_BSSSIZE; - WRITEW SDK_MODULE_08_STATIC_INIT_START; - WRITEW SDK_MODULE_08_STATIC_INIT_END; - WRITEW 8; - WRITEW 0; - - WRITEW 9; - WRITEW SDK_MODULE_09_START; - WRITEW SDK_MODULE_09_SIZE; - WRITEW SDK_MODULE_09_BSSSIZE; - WRITEW SDK_MODULE_09_STATIC_INIT_START; - WRITEW SDK_MODULE_09_STATIC_INIT_END; - WRITEW 9; - WRITEW 0; - - WRITEW 10; - WRITEW SDK_MODULE_10_START; - WRITEW SDK_MODULE_10_SIZE; - WRITEW SDK_MODULE_10_BSSSIZE; - WRITEW SDK_MODULE_10_STATIC_INIT_START; - WRITEW SDK_MODULE_10_STATIC_INIT_END; - WRITEW 10; - WRITEW 0; - - WRITEW 11; - WRITEW SDK_MODULE_11_START; - WRITEW SDK_MODULE_11_SIZE; - WRITEW SDK_MODULE_11_BSSSIZE; - WRITEW SDK_MODULE_11_STATIC_INIT_START; - WRITEW SDK_MODULE_11_STATIC_INIT_END; - WRITEW 11; - WRITEW 0; - - WRITEW 12; - WRITEW SDK_MODULE_12_START; - WRITEW SDK_MODULE_12_SIZE; - WRITEW SDK_MODULE_12_BSSSIZE; - WRITEW SDK_MODULE_12_STATIC_INIT_START; - WRITEW SDK_MODULE_12_STATIC_INIT_END; - WRITEW 12; - WRITEW 0; - - WRITEW 13; - WRITEW SDK_MODULE_13_START; - WRITEW SDK_MODULE_13_SIZE; - WRITEW SDK_MODULE_13_BSSSIZE; - WRITEW SDK_MODULE_13_STATIC_INIT_START; - WRITEW SDK_MODULE_13_STATIC_INIT_END; - WRITEW 13; - WRITEW 0; - - WRITEW 14; - WRITEW SDK_MODULE_14_START; - WRITEW SDK_MODULE_14_SIZE; - WRITEW SDK_MODULE_14_BSSSIZE; - WRITEW SDK_MODULE_14_STATIC_INIT_START; - WRITEW SDK_MODULE_14_STATIC_INIT_END; - WRITEW 14; - WRITEW 0; - - WRITEW 15; - WRITEW SDK_MODULE_15_START; - WRITEW SDK_MODULE_15_SIZE; - WRITEW SDK_MODULE_15_BSSSIZE; - WRITEW SDK_MODULE_15_STATIC_INIT_START; - WRITEW SDK_MODULE_15_STATIC_INIT_END; - WRITEW 15; - WRITEW 0; - - WRITEW 16; - WRITEW SDK_MODULE_16_START; - WRITEW SDK_MODULE_16_SIZE; - WRITEW SDK_MODULE_16_BSSSIZE; - WRITEW SDK_MODULE_16_STATIC_INIT_START; - WRITEW SDK_MODULE_16_STATIC_INIT_END; - WRITEW 16; - WRITEW 0; - - WRITEW 17; - WRITEW SDK_MODULE_17_START; - WRITEW SDK_MODULE_17_SIZE; - WRITEW SDK_MODULE_17_BSSSIZE; - WRITEW SDK_MODULE_17_STATIC_INIT_START; - WRITEW SDK_MODULE_17_STATIC_INIT_END; - WRITEW 17; - WRITEW 0; - - WRITEW 18; - WRITEW SDK_MODULE_18_START; - WRITEW SDK_MODULE_18_SIZE; - WRITEW SDK_MODULE_18_BSSSIZE; - WRITEW SDK_MODULE_18_STATIC_INIT_START; - WRITEW SDK_MODULE_18_STATIC_INIT_END; - WRITEW 18; - WRITEW 0; - - WRITEW 19; - WRITEW SDK_MODULE_19_START; - WRITEW SDK_MODULE_19_SIZE; - WRITEW SDK_MODULE_19_BSSSIZE; - WRITEW SDK_MODULE_19_STATIC_INIT_START; - WRITEW SDK_MODULE_19_STATIC_INIT_END; - WRITEW 19; - WRITEW 0; - - WRITEW 20; - WRITEW SDK_MODULE_20_START; - WRITEW SDK_MODULE_20_SIZE; - WRITEW SDK_MODULE_20_BSSSIZE; - WRITEW SDK_MODULE_20_STATIC_INIT_START; - WRITEW SDK_MODULE_20_STATIC_INIT_END; - WRITEW 20; - WRITEW 0; - - WRITEW 21; - WRITEW SDK_MODULE_21_START; - WRITEW SDK_MODULE_21_SIZE; - WRITEW SDK_MODULE_21_BSSSIZE; - WRITEW SDK_MODULE_21_STATIC_INIT_START; - WRITEW SDK_MODULE_21_STATIC_INIT_END; - WRITEW 21; - WRITEW 0; - - WRITEW 22; - WRITEW SDK_MODULE_22_START; - WRITEW SDK_MODULE_22_SIZE; - WRITEW SDK_MODULE_22_BSSSIZE; - WRITEW SDK_MODULE_22_STATIC_INIT_START; - WRITEW SDK_MODULE_22_STATIC_INIT_END; - WRITEW 22; - WRITEW 0; - - WRITEW 23; - WRITEW SDK_MODULE_23_START; - WRITEW SDK_MODULE_23_SIZE; - WRITEW SDK_MODULE_23_BSSSIZE; - WRITEW SDK_MODULE_23_STATIC_INIT_START; - WRITEW SDK_MODULE_23_STATIC_INIT_END; - WRITEW 23; - WRITEW 0; - - WRITEW 24; - WRITEW SDK_MODULE_24_START; - WRITEW SDK_MODULE_24_SIZE; - WRITEW SDK_MODULE_24_BSSSIZE; - WRITEW SDK_MODULE_24_STATIC_INIT_START; - WRITEW SDK_MODULE_24_STATIC_INIT_END; - WRITEW 24; - WRITEW 0; - - WRITEW 25; - WRITEW SDK_MODULE_25_START; - WRITEW SDK_MODULE_25_SIZE; - WRITEW SDK_MODULE_25_BSSSIZE; - WRITEW SDK_MODULE_25_STATIC_INIT_START; - WRITEW SDK_MODULE_25_STATIC_INIT_END; - WRITEW 25; - WRITEW 0; - - WRITEW 26; - WRITEW SDK_MODULE_26_START; - WRITEW SDK_MODULE_26_SIZE; - WRITEW SDK_MODULE_26_BSSSIZE; - WRITEW SDK_MODULE_26_STATIC_INIT_START; - WRITEW SDK_MODULE_26_STATIC_INIT_END; - WRITEW 26; - WRITEW 0; - - WRITEW 27; - WRITEW SDK_MODULE_27_START; - WRITEW SDK_MODULE_27_SIZE; - WRITEW SDK_MODULE_27_BSSSIZE; - WRITEW SDK_MODULE_27_STATIC_INIT_START; - WRITEW SDK_MODULE_27_STATIC_INIT_END; - WRITEW 27; - WRITEW 0; - - WRITEW 28; - WRITEW SDK_MODULE_28_START; - WRITEW SDK_MODULE_28_SIZE; - WRITEW SDK_MODULE_28_BSSSIZE; - WRITEW SDK_MODULE_28_STATIC_INIT_START; - WRITEW SDK_MODULE_28_STATIC_INIT_END; - WRITEW 28; - WRITEW 0; - - WRITEW 29; - WRITEW SDK_MODULE_29_START; - WRITEW SDK_MODULE_29_SIZE; - WRITEW SDK_MODULE_29_BSSSIZE; - WRITEW SDK_MODULE_29_STATIC_INIT_START; - WRITEW SDK_MODULE_29_STATIC_INIT_END; - WRITEW 29; - WRITEW 0; - - WRITEW 30; - WRITEW SDK_MODULE_30_START; - WRITEW SDK_MODULE_30_SIZE; - WRITEW SDK_MODULE_30_BSSSIZE; - WRITEW SDK_MODULE_30_STATIC_INIT_START; - WRITEW SDK_MODULE_30_STATIC_INIT_END; - WRITEW 30; - WRITEW 0; - - WRITEW 31; - WRITEW SDK_MODULE_31_START; - WRITEW SDK_MODULE_31_SIZE; - WRITEW SDK_MODULE_31_BSSSIZE; - WRITEW SDK_MODULE_31_STATIC_INIT_START; - WRITEW SDK_MODULE_31_STATIC_INIT_END; - WRITEW 31; - WRITEW 0; - - WRITEW 32; - WRITEW SDK_MODULE_32_START; - WRITEW SDK_MODULE_32_SIZE; - WRITEW SDK_MODULE_32_BSSSIZE; - WRITEW SDK_MODULE_32_STATIC_INIT_START; - WRITEW SDK_MODULE_32_STATIC_INIT_END; - WRITEW 32; - WRITEW 0; - - WRITEW 33; - WRITEW SDK_MODULE_33_START; - WRITEW SDK_MODULE_33_SIZE; - WRITEW SDK_MODULE_33_BSSSIZE; - WRITEW SDK_MODULE_33_STATIC_INIT_START; - WRITEW SDK_MODULE_33_STATIC_INIT_END; - WRITEW 33; - WRITEW 0; - - WRITEW 34; - WRITEW SDK_MODULE_34_START; - WRITEW SDK_MODULE_34_SIZE; - WRITEW SDK_MODULE_34_BSSSIZE; - WRITEW SDK_MODULE_34_STATIC_INIT_START; - WRITEW SDK_MODULE_34_STATIC_INIT_END; - WRITEW 34; - WRITEW 0; - - WRITEW 35; - WRITEW SDK_MODULE_35_START; - WRITEW SDK_MODULE_35_SIZE; - WRITEW SDK_MODULE_35_BSSSIZE; - WRITEW SDK_MODULE_35_STATIC_INIT_START; - WRITEW SDK_MODULE_35_STATIC_INIT_END; - WRITEW 35; - WRITEW 0; - - WRITEW 36; - WRITEW SDK_MODULE_36_START; - WRITEW SDK_MODULE_36_SIZE; - WRITEW SDK_MODULE_36_BSSSIZE; - WRITEW SDK_MODULE_36_STATIC_INIT_START; - WRITEW SDK_MODULE_36_STATIC_INIT_END; - WRITEW 36; - WRITEW 0; - - WRITEW 37; - WRITEW SDK_MODULE_37_START; - WRITEW SDK_MODULE_37_SIZE; - WRITEW SDK_MODULE_37_BSSSIZE; - WRITEW SDK_MODULE_37_STATIC_INIT_START; - WRITEW SDK_MODULE_37_STATIC_INIT_END; - WRITEW 37; - WRITEW 0; - - WRITEW 38; - WRITEW SDK_MODULE_38_START; - WRITEW SDK_MODULE_38_SIZE; - WRITEW SDK_MODULE_38_BSSSIZE; - WRITEW SDK_MODULE_38_STATIC_INIT_START; - WRITEW SDK_MODULE_38_STATIC_INIT_END; - WRITEW 38; - WRITEW 0; - - WRITEW 39; - WRITEW SDK_MODULE_39_START; - WRITEW SDK_MODULE_39_SIZE; - WRITEW SDK_MODULE_39_BSSSIZE; - WRITEW SDK_MODULE_39_STATIC_INIT_START; - WRITEW SDK_MODULE_39_STATIC_INIT_END; - WRITEW 39; - WRITEW 0; - - WRITEW 40; - WRITEW SDK_MODULE_40_START; - WRITEW SDK_MODULE_40_SIZE; - WRITEW SDK_MODULE_40_BSSSIZE; - WRITEW SDK_MODULE_40_STATIC_INIT_START; - WRITEW SDK_MODULE_40_STATIC_INIT_END; - WRITEW 40; - WRITEW 0; - - WRITEW 41; - WRITEW SDK_MODULE_41_START; - WRITEW SDK_MODULE_41_SIZE; - WRITEW SDK_MODULE_41_BSSSIZE; - WRITEW SDK_MODULE_41_STATIC_INIT_START; - WRITEW SDK_MODULE_41_STATIC_INIT_END; - WRITEW 41; - WRITEW 0; - - WRITEW 42; - WRITEW SDK_MODULE_42_START; - WRITEW SDK_MODULE_42_SIZE; - WRITEW SDK_MODULE_42_BSSSIZE; - WRITEW SDK_MODULE_42_STATIC_INIT_START; - WRITEW SDK_MODULE_42_STATIC_INIT_END; - WRITEW 42; - WRITEW 0; - - WRITEW 43; - WRITEW SDK_MODULE_43_START; - WRITEW SDK_MODULE_43_SIZE; - WRITEW SDK_MODULE_43_BSSSIZE; - WRITEW SDK_MODULE_43_STATIC_INIT_START; - WRITEW SDK_MODULE_43_STATIC_INIT_END; - WRITEW 43; - WRITEW 0; - - WRITEW 44; - WRITEW SDK_MODULE_44_START; - WRITEW SDK_MODULE_44_SIZE; - WRITEW SDK_MODULE_44_BSSSIZE; - WRITEW SDK_MODULE_44_STATIC_INIT_START; - WRITEW SDK_MODULE_44_STATIC_INIT_END; - WRITEW 44; - WRITEW 0; - - WRITEW 45; - WRITEW SDK_MODULE_45_START; - WRITEW SDK_MODULE_45_SIZE; - WRITEW SDK_MODULE_45_BSSSIZE; - WRITEW SDK_MODULE_45_STATIC_INIT_START; - WRITEW SDK_MODULE_45_STATIC_INIT_END; - WRITEW 45; - WRITEW 0; - - WRITEW 46; - WRITEW SDK_MODULE_46_START; - WRITEW SDK_MODULE_46_SIZE; - WRITEW SDK_MODULE_46_BSSSIZE; - WRITEW SDK_MODULE_46_STATIC_INIT_START; - WRITEW SDK_MODULE_46_STATIC_INIT_END; - WRITEW 46; - WRITEW 0; - - WRITEW 47; - WRITEW SDK_MODULE_47_START; - WRITEW SDK_MODULE_47_SIZE; - WRITEW SDK_MODULE_47_BSSSIZE; - WRITEW SDK_MODULE_47_STATIC_INIT_START; - WRITEW SDK_MODULE_47_STATIC_INIT_END; - WRITEW 47; - WRITEW 0; - - WRITEW 48; - WRITEW SDK_MODULE_48_START; - WRITEW SDK_MODULE_48_SIZE; - WRITEW SDK_MODULE_48_BSSSIZE; - WRITEW SDK_MODULE_48_STATIC_INIT_START; - WRITEW SDK_MODULE_48_STATIC_INIT_END; - WRITEW 48; - WRITEW 0; - - WRITEW 49; - WRITEW SDK_MODULE_49_START; - WRITEW SDK_MODULE_49_SIZE; - WRITEW SDK_MODULE_49_BSSSIZE; - WRITEW SDK_MODULE_49_STATIC_INIT_START; - WRITEW SDK_MODULE_49_STATIC_INIT_END; - WRITEW 49; - WRITEW 0; - - WRITEW 50; - WRITEW SDK_MODULE_50_START; - WRITEW SDK_MODULE_50_SIZE; - WRITEW SDK_MODULE_50_BSSSIZE; - WRITEW SDK_MODULE_50_STATIC_INIT_START; - WRITEW SDK_MODULE_50_STATIC_INIT_END; - WRITEW 50; - WRITEW 0; - - WRITEW 51; - WRITEW SDK_MODULE_51_START; - WRITEW SDK_MODULE_51_SIZE; - WRITEW SDK_MODULE_51_BSSSIZE; - WRITEW SDK_MODULE_51_STATIC_INIT_START; - WRITEW SDK_MODULE_51_STATIC_INIT_END; - WRITEW 51; - WRITEW 0; - - WRITEW 52; - WRITEW SDK_MODULE_52_START; - WRITEW SDK_MODULE_52_SIZE; - WRITEW SDK_MODULE_52_BSSSIZE; - WRITEW SDK_MODULE_52_STATIC_INIT_START; - WRITEW SDK_MODULE_52_STATIC_INIT_END; - WRITEW 52; - WRITEW 0; - - WRITEW 53; - WRITEW SDK_MODULE_53_START; - WRITEW SDK_MODULE_53_SIZE; - WRITEW SDK_MODULE_53_BSSSIZE; - WRITEW SDK_MODULE_53_STATIC_INIT_START; - WRITEW SDK_MODULE_53_STATIC_INIT_END; - WRITEW 53; - WRITEW 0; - - WRITEW 54; - WRITEW SDK_MODULE_54_START; - WRITEW SDK_MODULE_54_SIZE; - WRITEW SDK_MODULE_54_BSSSIZE; - WRITEW SDK_MODULE_54_STATIC_INIT_START; - WRITEW SDK_MODULE_54_STATIC_INIT_END; - WRITEW 54; - WRITEW 0; - - WRITEW 55; - WRITEW SDK_MODULE_55_START; - WRITEW SDK_MODULE_55_SIZE; - WRITEW SDK_MODULE_55_BSSSIZE; - WRITEW SDK_MODULE_55_STATIC_INIT_START; - WRITEW SDK_MODULE_55_STATIC_INIT_END; - WRITEW 55; - WRITEW 0; - - WRITEW 56; - WRITEW SDK_MODULE_56_START; - WRITEW SDK_MODULE_56_SIZE; - WRITEW SDK_MODULE_56_BSSSIZE; - WRITEW SDK_MODULE_56_STATIC_INIT_START; - WRITEW SDK_MODULE_56_STATIC_INIT_END; - WRITEW 56; - WRITEW 0; - - WRITEW 57; - WRITEW SDK_MODULE_57_START; - WRITEW SDK_MODULE_57_SIZE; - WRITEW SDK_MODULE_57_BSSSIZE; - WRITEW SDK_MODULE_57_STATIC_INIT_START; - WRITEW SDK_MODULE_57_STATIC_INIT_END; - WRITEW 57; - WRITEW 0; - - WRITEW 58; - WRITEW SDK_MODULE_58_START; - WRITEW SDK_MODULE_58_SIZE; - WRITEW SDK_MODULE_58_BSSSIZE; - WRITEW SDK_MODULE_58_STATIC_INIT_START; - WRITEW SDK_MODULE_58_STATIC_INIT_END; - WRITEW 58; - WRITEW 0; - - WRITEW 59; - WRITEW SDK_MODULE_59_START; - WRITEW SDK_MODULE_59_SIZE; - WRITEW SDK_MODULE_59_BSSSIZE; - WRITEW SDK_MODULE_59_STATIC_INIT_START; - WRITEW SDK_MODULE_59_STATIC_INIT_END; - WRITEW 59; - WRITEW 0; - - WRITEW 60; - WRITEW SDK_MODULE_60_START; - WRITEW SDK_MODULE_60_SIZE; - WRITEW SDK_MODULE_60_BSSSIZE; - WRITEW SDK_MODULE_60_STATIC_INIT_START; - WRITEW SDK_MODULE_60_STATIC_INIT_END; - WRITEW 60; - WRITEW 0; - - WRITEW 61; - WRITEW SDK_MODULE_61_START; - WRITEW SDK_MODULE_61_SIZE; - WRITEW SDK_MODULE_61_BSSSIZE; - WRITEW SDK_MODULE_61_STATIC_INIT_START; - WRITEW SDK_MODULE_61_STATIC_INIT_END; - WRITEW 61; - WRITEW 0; - - WRITEW 62; - WRITEW SDK_MODULE_62_START; - WRITEW SDK_MODULE_62_SIZE; - WRITEW SDK_MODULE_62_BSSSIZE; - WRITEW SDK_MODULE_62_STATIC_INIT_START; - WRITEW SDK_MODULE_62_STATIC_INIT_END; - WRITEW 62; - WRITEW 0; - - WRITEW 63; - WRITEW SDK_MODULE_63_START; - WRITEW SDK_MODULE_63_SIZE; - WRITEW SDK_MODULE_63_BSSSIZE; - WRITEW SDK_MODULE_63_STATIC_INIT_START; - WRITEW SDK_MODULE_63_STATIC_INIT_END; - WRITEW 63; - WRITEW 0; - - WRITEW 64; - WRITEW SDK_MODULE_64_START; - WRITEW SDK_MODULE_64_SIZE; - WRITEW SDK_MODULE_64_BSSSIZE; - WRITEW SDK_MODULE_64_STATIC_INIT_START; - WRITEW SDK_MODULE_64_STATIC_INIT_END; - WRITEW 64; - WRITEW 0; - - WRITEW 65; - WRITEW SDK_MODULE_65_START; - WRITEW SDK_MODULE_65_SIZE; - WRITEW SDK_MODULE_65_BSSSIZE; - WRITEW SDK_MODULE_65_STATIC_INIT_START; - WRITEW SDK_MODULE_65_STATIC_INIT_END; - WRITEW 65; - WRITEW 0; - - WRITEW 66; - WRITEW SDK_MODULE_66_START; - WRITEW SDK_MODULE_66_SIZE; - WRITEW SDK_MODULE_66_BSSSIZE; - WRITEW SDK_MODULE_66_STATIC_INIT_START; - WRITEW SDK_MODULE_66_STATIC_INIT_END; - WRITEW 66; - WRITEW 0; - - WRITEW 67; - WRITEW SDK_MODULE_67_START; - WRITEW SDK_MODULE_67_SIZE; - WRITEW SDK_MODULE_67_BSSSIZE; - WRITEW SDK_MODULE_67_STATIC_INIT_START; - WRITEW SDK_MODULE_67_STATIC_INIT_END; - WRITEW 67; - WRITEW 0; - - WRITEW 68; - WRITEW SDK_MODULE_68_START; - WRITEW SDK_MODULE_68_SIZE; - WRITEW SDK_MODULE_68_BSSSIZE; - WRITEW SDK_MODULE_68_STATIC_INIT_START; - WRITEW SDK_MODULE_68_STATIC_INIT_END; - WRITEW 68; - WRITEW 0; - - WRITEW 69; - WRITEW SDK_MODULE_69_START; - WRITEW SDK_MODULE_69_SIZE; - WRITEW SDK_MODULE_69_BSSSIZE; - WRITEW SDK_MODULE_69_STATIC_INIT_START; - WRITEW SDK_MODULE_69_STATIC_INIT_END; - WRITEW 69; - WRITEW 0; - - WRITEW 70; - WRITEW SDK_MODULE_70_START; - WRITEW SDK_MODULE_70_SIZE; - WRITEW SDK_MODULE_70_BSSSIZE; - WRITEW SDK_MODULE_70_STATIC_INIT_START; - WRITEW SDK_MODULE_70_STATIC_INIT_END; - WRITEW 70; - WRITEW 0; - - WRITEW 71; - WRITEW SDK_MODULE_71_START; - WRITEW SDK_MODULE_71_SIZE; - WRITEW SDK_MODULE_71_BSSSIZE; - WRITEW SDK_MODULE_71_STATIC_INIT_START; - WRITEW SDK_MODULE_71_STATIC_INIT_END; - WRITEW 71; - WRITEW 0; - - WRITEW 72; - WRITEW SDK_MODULE_72_START; - WRITEW SDK_MODULE_72_SIZE; - WRITEW SDK_MODULE_72_BSSSIZE; - WRITEW SDK_MODULE_72_STATIC_INIT_START; - WRITEW SDK_MODULE_72_STATIC_INIT_END; - WRITEW 72; - WRITEW 0; - - WRITEW 73; - WRITEW SDK_MODULE_73_START; - WRITEW SDK_MODULE_73_SIZE; - WRITEW SDK_MODULE_73_BSSSIZE; - WRITEW SDK_MODULE_73_STATIC_INIT_START; - WRITEW SDK_MODULE_73_STATIC_INIT_END; - WRITEW 73; - WRITEW 0; - - WRITEW 74; - WRITEW SDK_MODULE_74_START; - WRITEW SDK_MODULE_74_SIZE; - WRITEW SDK_MODULE_74_BSSSIZE; - WRITEW SDK_MODULE_74_STATIC_INIT_START; - WRITEW SDK_MODULE_74_STATIC_INIT_END; - WRITEW 74; - WRITEW 0; - - WRITEW 75; - WRITEW SDK_MODULE_75_START; - WRITEW SDK_MODULE_75_SIZE; - WRITEW SDK_MODULE_75_BSSSIZE; - WRITEW SDK_MODULE_75_STATIC_INIT_START; - WRITEW SDK_MODULE_75_STATIC_INIT_END; - WRITEW 75; - WRITEW 0; - - WRITEW 76; - WRITEW SDK_MODULE_76_START; - WRITEW SDK_MODULE_76_SIZE; - WRITEW SDK_MODULE_76_BSSSIZE; - WRITEW SDK_MODULE_76_STATIC_INIT_START; - WRITEW SDK_MODULE_76_STATIC_INIT_END; - WRITEW 76; - WRITEW 0; - - WRITEW 77; - WRITEW SDK_MODULE_77_START; - WRITEW SDK_MODULE_77_SIZE; - WRITEW SDK_MODULE_77_BSSSIZE; - WRITEW SDK_MODULE_77_STATIC_INIT_START; - WRITEW SDK_MODULE_77_STATIC_INIT_END; - WRITEW 77; - WRITEW 0; - - WRITEW 78; - WRITEW SDK_MODULE_78_START; - WRITEW SDK_MODULE_78_SIZE; - WRITEW SDK_MODULE_78_BSSSIZE; - WRITEW SDK_MODULE_78_STATIC_INIT_START; - WRITEW SDK_MODULE_78_STATIC_INIT_END; - WRITEW 78; - WRITEW 0; - - WRITEW 79; - WRITEW SDK_MODULE_79_START; - WRITEW SDK_MODULE_79_SIZE; - WRITEW SDK_MODULE_79_BSSSIZE; - WRITEW SDK_MODULE_79_STATIC_INIT_START; - WRITEW SDK_MODULE_79_STATIC_INIT_END; - WRITEW 79; - WRITEW 0; - - WRITEW 80; - WRITEW SDK_MODULE_80_START; - WRITEW SDK_MODULE_80_SIZE; - WRITEW SDK_MODULE_80_BSSSIZE; - WRITEW SDK_MODULE_80_STATIC_INIT_START; - WRITEW SDK_MODULE_80_STATIC_INIT_END; - WRITEW 80; - WRITEW 0; - - WRITEW 81; - WRITEW SDK_MODULE_81_START; - WRITEW SDK_MODULE_81_SIZE; - WRITEW SDK_MODULE_81_BSSSIZE; - WRITEW SDK_MODULE_81_STATIC_INIT_START; - WRITEW SDK_MODULE_81_STATIC_INIT_END; - WRITEW 81; - WRITEW 0; - - WRITEW 82; - WRITEW SDK_MODULE_82_START; - WRITEW SDK_MODULE_82_SIZE; - WRITEW SDK_MODULE_82_BSSSIZE; - WRITEW SDK_MODULE_82_STATIC_INIT_START; - WRITEW SDK_MODULE_82_STATIC_INIT_END; - WRITEW 82; - WRITEW 0; - - WRITEW 83; - WRITEW SDK_MODULE_83_START; - WRITEW SDK_MODULE_83_SIZE; - WRITEW SDK_MODULE_83_BSSSIZE; - WRITEW SDK_MODULE_83_STATIC_INIT_START; - WRITEW SDK_MODULE_83_STATIC_INIT_END; - WRITEW 83; - WRITEW 0; - - WRITEW 84; - WRITEW SDK_MODULE_84_START; - WRITEW SDK_MODULE_84_SIZE; - WRITEW SDK_MODULE_84_BSSSIZE; - WRITEW SDK_MODULE_84_STATIC_INIT_START; - WRITEW SDK_MODULE_84_STATIC_INIT_END; - WRITEW 84; - WRITEW 0; - - WRITEW 85; - WRITEW SDK_MODULE_85_START; - WRITEW SDK_MODULE_85_SIZE; - WRITEW SDK_MODULE_85_BSSSIZE; - WRITEW SDK_MODULE_85_STATIC_INIT_START; - WRITEW SDK_MODULE_85_STATIC_INIT_END; - WRITEW 85; - WRITEW 0; - - WRITEW 86; - WRITEW SDK_MODULE_86_START; - WRITEW SDK_MODULE_86_SIZE; - WRITEW SDK_MODULE_86_BSSSIZE; - WRITEW SDK_MODULE_86_STATIC_INIT_START; - WRITEW SDK_MODULE_86_STATIC_INIT_END; - WRITEW 86; - WRITEW 0; +#include "overlay_table.lcf.inc" } > .overlay - .MODULE.00 : AT (0x108400) { - . = ALIGN(512); - FILE_10C400.o (.text) - } > MODULE_00 - - .MODULE.01 : AT (0x108600) { - . = ALIGN(512); - FILE_10C600.o (.text) - } > MODULE_01 - - .MODULE.02 : AT (0x108800) { - . = ALIGN(512); - FILE_10C800.o (.text) - } > MODULE_02 - - .MODULE.03 : AT (0x108A00) { - . = ALIGN(512); - FILE_10CA00.o (.text) - } > MODULE_03 - - .MODULE.04 : AT (0x108C00) { - . = ALIGN(512); - FILE_10CC00.o (.text) - } > MODULE_04 - - .MODULE.05 : AT (0x141400) { - . = ALIGN(512); - FILE_145400.o (.text) - } > MODULE_05 - - .MODULE.06 : AT (0x167600) { - . = ALIGN(512); - FILE_16B600.o (.text) - } > MODULE_06 - - .MODULE.07 : AT (0x180400) { - . = ALIGN(512); - FILE_184400.o (.text) - } > MODULE_07 - - .MODULE.08 : AT (0x183800) { - . = ALIGN(512); - FILE_187800.o (.text) - } > MODULE_08 - - .MODULE.09 : AT (0x19F000) { - . = ALIGN(512); - FILE_1A3000.o (.text) - } > MODULE_09 - - .MODULE.10 : AT (0x1A9200) { - . = ALIGN(512); - FILE_1AD200.o (.text) - } > MODULE_10 - - .MODULE.11 : AT (0x1A9400) { - . = ALIGN(512); - FILE_1AD400.o (.text) - } > MODULE_11 - - .MODULE.12 : AT (0x1DBE00) { - . = ALIGN(512); - FILE_1DFE00.o (.text) - } > MODULE_12 - - .MODULE.13 : AT (0x1F5200) { - . = ALIGN(512); - FILE_1F9200.o (.text) - } > MODULE_13 - - .MODULE.14 : AT (0x223E00) { - . = ALIGN(512); - FILE_227E00.o (.text) - } > MODULE_14 - - .MODULE.15 : AT (0x233400) { - . = ALIGN(512); - FILE_237400.o (.text) - } > MODULE_15 - - .MODULE.16 : AT (0x237C00) { - . = ALIGN(512); - FILE_23BC00.o (.text) - } > MODULE_16 - - .MODULE.17 : AT (0x260200) { - . = ALIGN(512); - FILE_264200.o (.text) - } > MODULE_17 - - .MODULE.18 : AT (0x267200) { - . = ALIGN(512); - FILE_26B200.o (.text) - } > MODULE_18 - - .MODULE.19 : AT (0x27F000) { - . = ALIGN(512); - FILE_283000.o (.text) - } > MODULE_19 - - .MODULE.20 : AT (0x27F200) { - . = ALIGN(512); - FILE_283200.o (.text) - } > MODULE_20 - - .MODULE.21 : AT (0x281600) { - . = ALIGN(512); - FILE_285600.o (.text) - } > MODULE_21 - - .MODULE.22 : AT (0x281C00) { - . = ALIGN(512); - FILE_285C00.o (.text) - } > MODULE_22 - - .MODULE.23 : AT (0x282C00) { - . = ALIGN(512); - FILE_286C00.o (.text) - } > MODULE_23 - - .MODULE.24 : AT (0x284600) { - . = ALIGN(512); - FILE_288600.o (.text) - } > MODULE_24 - - .MODULE.25 : AT (0x285000) { - . = ALIGN(512); - FILE_289000.o (.text) - } > MODULE_25 - - .MODULE.26 : AT (0x285600) { - . = ALIGN(512); - FILE_289600.o (.text) - } > MODULE_26 - - .MODULE.27 : AT (0x285E00) { - . = ALIGN(512); - FILE_289E00.o (.text) - } > MODULE_27 - - .MODULE.28 : AT (0x286A00) { - . = ALIGN(512); - FILE_28AA00.o (.text) - } > MODULE_28 - - .MODULE.29 : AT (0x288200) { - . = ALIGN(512); - FILE_28C200.o (.text) - } > MODULE_29 - - .MODULE.30 : AT (0x288C00) { - . = ALIGN(512); - FILE_28CC00.o (.text) - } > MODULE_30 - - .MODULE.31 : AT (0x289200) { - . = ALIGN(512); - FILE_28D200.o (.text) - } > MODULE_31 - - .MODULE.32 : AT (0x289800) { - . = ALIGN(512); - FILE_28D800.o (.text) - } > MODULE_32 - - .MODULE.33 : AT (0x289E00) { - . = ALIGN(512); - FILE_28DE00.o (.text) - } > MODULE_33 - - .MODULE.34 : AT (0x28A200) { - . = ALIGN(512); - FILE_28E200.o (.text) - } > MODULE_34 - - .MODULE.35 : AT (0x28A800) { - . = ALIGN(512); - FILE_28E800.o (.text) - } > MODULE_35 - - .MODULE.36 : AT (0x28B200) { - . = ALIGN(512); - FILE_28F200.o (.text) - } > MODULE_36 - - .MODULE.37 : AT (0x28C000) { - . = ALIGN(512); - FILE_290000.o (.text) - } > MODULE_37 - - .MODULE.38 : AT (0x28C600) { - . = ALIGN(512); - FILE_290600.o (.text) - } > MODULE_38 - - .MODULE.39 : AT (0x28D200) { - . = ALIGN(512); - FILE_291200.o (.text) - } > MODULE_39 - - .MODULE.40 : AT (0x28E000) { - . = ALIGN(512); - FILE_292000.o (.text) - } > MODULE_40 - - .MODULE.41 : AT (0x28EE00) { - . = ALIGN(512); - FILE_292E00.o (.text) - } > MODULE_41 - - .MODULE.42 : AT (0x290000) { - . = ALIGN(512); - FILE_294000.o (.text) - } > MODULE_42 - - .MODULE.43 : AT (0x290A00) { - . = ALIGN(512); - FILE_294A00.o (.text) - } > MODULE_43 - - .MODULE.44 : AT (0x291400) { - . = ALIGN(512); - FILE_295400.o (.text) - } > MODULE_44 - - .MODULE.45 : AT (0x291A00) { - . = ALIGN(512); - FILE_295A00.o (.text) - } > MODULE_45 - - .MODULE.46 : AT (0x292400) { - . = ALIGN(512); - FILE_296400.o (.text) - } > MODULE_46 - - .MODULE.47 : AT (0x292800) { - . = ALIGN(512); - FILE_296800.o (.text) - } > MODULE_47 - - .MODULE.48 : AT (0x293600) { - . = ALIGN(512); - FILE_297600.o (.text) - } > MODULE_48 - - .MODULE.49 : AT (0x294000) { - . = ALIGN(512); - FILE_298000.o (.text) - } > MODULE_49 - - .MODULE.50 : AT (0x294600) { - . = ALIGN(512); - FILE_298600.o (.text) - } > MODULE_50 - - .MODULE.51 : AT (0x294A00) { - . = ALIGN(512); - FILE_298A00.o (.text) - } > MODULE_51 - - .MODULE.52 : AT (0x295A00) { - . = ALIGN(512); - FILE_299A00.o (.text) - } > MODULE_52 - - .MODULE.53 : AT (0x295E00) { - . = ALIGN(512); - FILE_299E00.o (.text) - } > MODULE_53 - - .MODULE.54 : AT (0x298400) { - . = ALIGN(512); - FILE_29C400.o (.text) - } > MODULE_54 - - .MODULE.55 : AT (0x29A800) { - . = ALIGN(512); - FILE_29E800.o (.text) - } > MODULE_55 - - .MODULE.56 : AT (0x29DA00) { - . = ALIGN(512); - FILE_2A1A00.o (.text) - } > MODULE_56 - - .MODULE.57 : AT (0x2A2200) { - . = ALIGN(512); - FILE_2A6200.o (.text) - } > MODULE_57 - - .MODULE.58 : AT (0x2A4800) { - . = ALIGN(512); - FILE_2A8800.o (.text) - } > MODULE_58 - - .MODULE.59 : AT (0x2A5E00) { - . = ALIGN(512); - FILE_2A9E00.o (.text) - } > MODULE_59 - - .MODULE.60 : AT (0x2A8C00) { - . = ALIGN(512); - FILE_2ACC00.o (.text) - } > MODULE_60 - - .MODULE.61 : AT (0x2A9A00) { - . = ALIGN(512); - FILE_2ADA00.o (.text) - } > MODULE_61 - - .MODULE.62 : AT (0x2AAC00) { - . = ALIGN(512); - FILE_2AEC00.o (.text) - } > MODULE_62 - - .MODULE.63 : AT (0x2AEA00) { - . = ALIGN(512); - FILE_2B2A00.o (.text) - } > MODULE_63 - - .MODULE.64 : AT (0x2B3600) { - . = ALIGN(512); - FILE_2B7600.o (.text) - } > MODULE_64 - - .MODULE.65 : AT (0x2B5400) { - . = ALIGN(512); - FILE_2B9400.o (.text) - } > MODULE_65 - - .MODULE.66 : AT (0x2B8400) { - . = ALIGN(512); - FILE_2BC400.o (.text) - } > MODULE_66 - - .MODULE.67 : AT (0x2BAC00) { - . = ALIGN(512); - FILE_2BEC00.o (.text) - } > MODULE_67 - - .MODULE.68 : AT (0x2BD200) { - . = ALIGN(512); - FILE_2C1200.o (.text) - } > MODULE_68 - - .MODULE.69 : AT (0x2BE800) { - . = ALIGN(512); - FILE_2C2800.o (.text) - } > MODULE_69 - - .MODULE.70 : AT (0x2C0C00) { - . = ALIGN(512); - FILE_2C4C00.o (.text) - } > MODULE_70 - - .MODULE.71 : AT (0x2C1C00) { - . = ALIGN(512); - FILE_2C5C00.o (.text) - } > MODULE_71 - - .MODULE.72 : AT (0x2C5C00) { - . = ALIGN(512); - FILE_2C9C00.o (.text) - } > MODULE_72 - - .MODULE.73 : AT (0x2C5E00) { - . = ALIGN(512); - FILE_2C9E00.o (.text) - } > MODULE_73 - - .MODULE.74 : AT (0x2CAA00) { - . = ALIGN(512); - FILE_2CEA00.o (.text) - } > MODULE_74 - - .MODULE.75 : AT (0x2CBE00) { - . = ALIGN(512); - FILE_2CFE00.o (.text) - } > MODULE_75 - - .MODULE.76 : AT (0x2D1C00) { - . = ALIGN(512); - FILE_2D5C00.o (.text) - } > MODULE_76 - - .MODULE.77 : AT (0x2D3C00) { - . = ALIGN(512); - FILE_2D7C00.o (.text) - } > MODULE_77 - - .MODULE.78 : AT (0x2D5800) { - . = ALIGN(512); - FILE_2D9800.o (.text) - } > MODULE_78 - - .MODULE.79 : AT (0x2D5E00) { - . = ALIGN(512); - FILE_2D9E00.o (.text) - } > MODULE_79 - - .MODULE.80 : AT (0x2DB200) { - . = ALIGN(512); - FILE_2DF200.o (.text) - } > MODULE_80 - - .MODULE.81 : AT (0x2E5A00) { - . = ALIGN(512); - FILE_2E9A00.o (.text) - } > MODULE_81 - - .MODULE.82 : AT (0x2EB000) { - . = ALIGN(512); - FILE_2EF000.o (.text) - } > MODULE_82 - - .MODULE.83 : AT (0x2ED600) { - . = ALIGN(512); - FILE_2F1600.o (.text) - } > MODULE_83 - - .MODULE.84 : AT (0x2FBA00) { - . = ALIGN(512); - FILE_2FFA00.o (.text) - } > MODULE_84 - - .MODULE.85 : AT (0x2FF400) { - . = ALIGN(512); - FILE_303400.o (.text) - } > MODULE_85 - - .MODULE.86 : AT (0x308600) { - . = ALIGN(512); - FILE_30C600.o (.text) - } > MODULE_86 +#include "module_sections.lcf.inc" } diff --git a/arm9/module_regions.lcf.inc b/arm9/module_regions.lcf.inc new file mode 100644 index 00000000..05dc10a9 --- /dev/null +++ b/arm9/module_regions.lcf.inc @@ -0,0 +1,87 @@ +MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 +MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 diff --git a/arm9/module_sections.lcf.inc b/arm9/module_sections.lcf.inc new file mode 100644 index 00000000..262d32cf --- /dev/null +++ b/arm9/module_sections.lcf.inc @@ -0,0 +1,435 @@ + +.MODULE.00 : AT (0x108400) { + . = ALIGN(512); + FILE_10C400.o (.text) +} > MODULE_00 + +.MODULE.01 : AT (0x108600) { + . = ALIGN(512); + FILE_10C600.o (.text) +} > MODULE_01 + +.MODULE.02 : AT (0x108800) { + . = ALIGN(512); + FILE_10C800.o (.text) +} > MODULE_02 + +.MODULE.03 : AT (0x108A00) { + . = ALIGN(512); + FILE_10CA00.o (.text) +} > MODULE_03 + +.MODULE.04 : AT (0x108C00) { + . = ALIGN(512); + FILE_10CC00.o (.text) +} > MODULE_04 + +.MODULE.05 : AT (0x141400) { + . = ALIGN(512); + FILE_145400.o (.text) +} > MODULE_05 + +.MODULE.06 : AT (0x167600) { + . = ALIGN(512); + FILE_16B600.o (.text) +} > MODULE_06 + +.MODULE.07 : AT (0x180400) { + . = ALIGN(512); + FILE_184400.o (.text) +} > MODULE_07 + +.MODULE.08 : AT (0x183800) { + . = ALIGN(512); + FILE_187800.o (.text) +} > MODULE_08 + +.MODULE.09 : AT (0x19F000) { + . = ALIGN(512); + FILE_1A3000.o (.text) +} > MODULE_09 + +.MODULE.10 : AT (0x1A9200) { + . = ALIGN(512); + FILE_1AD200.o (.text) +} > MODULE_10 + +.MODULE.11 : AT (0x1A9400) { + . = ALIGN(512); + FILE_1AD400.o (.text) +} > MODULE_11 + +.MODULE.12 : AT (0x1DBE00) { + . = ALIGN(512); + FILE_1DFE00.o (.text) +} > MODULE_12 + +.MODULE.13 : AT (0x1F5200) { + . = ALIGN(512); + FILE_1F9200.o (.text) +} > MODULE_13 + +.MODULE.14 : AT (0x223E00) { + . = ALIGN(512); + FILE_227E00.o (.text) +} > MODULE_14 + +.MODULE.15 : AT (0x233400) { + . = ALIGN(512); + FILE_237400.o (.text) +} > MODULE_15 + +.MODULE.16 : AT (0x237C00) { + . = ALIGN(512); + FILE_23BC00.o (.text) +} > MODULE_16 + +.MODULE.17 : AT (0x260200) { + . = ALIGN(512); + FILE_264200.o (.text) +} > MODULE_17 + +.MODULE.18 : AT (0x267200) { + . = ALIGN(512); + FILE_26B200.o (.text) +} > MODULE_18 + +.MODULE.19 : AT (0x27F000) { + . = ALIGN(512); + FILE_283000.o (.text) +} > MODULE_19 + +.MODULE.20 : AT (0x27F200) { + . = ALIGN(512); + FILE_283200.o (.text) +} > MODULE_20 + +.MODULE.21 : AT (0x281600) { + . = ALIGN(512); + FILE_285600.o (.text) +} > MODULE_21 + +.MODULE.22 : AT (0x281C00) { + . = ALIGN(512); + FILE_285C00.o (.text) +} > MODULE_22 + +.MODULE.23 : AT (0x282C00) { + . = ALIGN(512); + FILE_286C00.o (.text) +} > MODULE_23 + +.MODULE.24 : AT (0x284600) { + . = ALIGN(512); + FILE_288600.o (.text) +} > MODULE_24 + +.MODULE.25 : AT (0x285000) { + . = ALIGN(512); + FILE_289000.o (.text) +} > MODULE_25 + +.MODULE.26 : AT (0x285600) { + . = ALIGN(512); + FILE_289600.o (.text) +} > MODULE_26 + +.MODULE.27 : AT (0x285E00) { + . = ALIGN(512); + FILE_289E00.o (.text) +} > MODULE_27 + +.MODULE.28 : AT (0x286A00) { + . = ALIGN(512); + FILE_28AA00.o (.text) +} > MODULE_28 + +.MODULE.29 : AT (0x288200) { + . = ALIGN(512); + FILE_28C200.o (.text) +} > MODULE_29 + +.MODULE.30 : AT (0x288C00) { + . = ALIGN(512); + FILE_28CC00.o (.text) +} > MODULE_30 + +.MODULE.31 : AT (0x289200) { + . = ALIGN(512); + FILE_28D200.o (.text) +} > MODULE_31 + +.MODULE.32 : AT (0x289800) { + . = ALIGN(512); + FILE_28D800.o (.text) +} > MODULE_32 + +.MODULE.33 : AT (0x289E00) { + . = ALIGN(512); + FILE_28DE00.o (.text) +} > MODULE_33 + +.MODULE.34 : AT (0x28A200) { + . = ALIGN(512); + FILE_28E200.o (.text) +} > MODULE_34 + +.MODULE.35 : AT (0x28A800) { + . = ALIGN(512); + FILE_28E800.o (.text) +} > MODULE_35 + +.MODULE.36 : AT (0x28B200) { + . = ALIGN(512); + FILE_28F200.o (.text) +} > MODULE_36 + +.MODULE.37 : AT (0x28C000) { + . = ALIGN(512); + FILE_290000.o (.text) +} > MODULE_37 + +.MODULE.38 : AT (0x28C600) { + . = ALIGN(512); + FILE_290600.o (.text) +} > MODULE_38 + +.MODULE.39 : AT (0x28D200) { + . = ALIGN(512); + FILE_291200.o (.text) +} > MODULE_39 + +.MODULE.40 : AT (0x28E000) { + . = ALIGN(512); + FILE_292000.o (.text) +} > MODULE_40 + +.MODULE.41 : AT (0x28EE00) { + . = ALIGN(512); + FILE_292E00.o (.text) +} > MODULE_41 + +.MODULE.42 : AT (0x290000) { + . = ALIGN(512); + FILE_294000.o (.text) +} > MODULE_42 + +.MODULE.43 : AT (0x290A00) { + . = ALIGN(512); + FILE_294A00.o (.text) +} > MODULE_43 + +.MODULE.44 : AT (0x291400) { + . = ALIGN(512); + FILE_295400.o (.text) +} > MODULE_44 + +.MODULE.45 : AT (0x291A00) { + . = ALIGN(512); + FILE_295A00.o (.text) +} > MODULE_45 + +.MODULE.46 : AT (0x292400) { + . = ALIGN(512); + FILE_296400.o (.text) +} > MODULE_46 + +.MODULE.47 : AT (0x292800) { + . = ALIGN(512); + FILE_296800.o (.text) +} > MODULE_47 + +.MODULE.48 : AT (0x293600) { + . = ALIGN(512); + FILE_297600.o (.text) +} > MODULE_48 + +.MODULE.49 : AT (0x294000) { + . = ALIGN(512); + FILE_298000.o (.text) +} > MODULE_49 + +.MODULE.50 : AT (0x294600) { + . = ALIGN(512); + FILE_298600.o (.text) +} > MODULE_50 + +.MODULE.51 : AT (0x294A00) { + . = ALIGN(512); + FILE_298A00.o (.text) +} > MODULE_51 + +.MODULE.52 : AT (0x295A00) { + . = ALIGN(512); + FILE_299A00.o (.text) +} > MODULE_52 + +.MODULE.53 : AT (0x295E00) { + . = ALIGN(512); + FILE_299E00.o (.text) +} > MODULE_53 + +.MODULE.54 : AT (0x298400) { + . = ALIGN(512); + FILE_29C400.o (.text) +} > MODULE_54 + +.MODULE.55 : AT (0x29A800) { + . = ALIGN(512); + FILE_29E800.o (.text) +} > MODULE_55 + +.MODULE.56 : AT (0x29DA00) { + . = ALIGN(512); + FILE_2A1A00.o (.text) +} > MODULE_56 + +.MODULE.57 : AT (0x2A2200) { + . = ALIGN(512); + FILE_2A6200.o (.text) +} > MODULE_57 + +.MODULE.58 : AT (0x2A4800) { + . = ALIGN(512); + FILE_2A8800.o (.text) +} > MODULE_58 + +.MODULE.59 : AT (0x2A5E00) { + . = ALIGN(512); + FILE_2A9E00.o (.text) +} > MODULE_59 + +.MODULE.60 : AT (0x2A8C00) { + . = ALIGN(512); + FILE_2ACC00.o (.text) +} > MODULE_60 + +.MODULE.61 : AT (0x2A9A00) { + . = ALIGN(512); + FILE_2ADA00.o (.text) +} > MODULE_61 + +.MODULE.62 : AT (0x2AAC00) { + . = ALIGN(512); + FILE_2AEC00.o (.text) +} > MODULE_62 + +.MODULE.63 : AT (0x2AEA00) { + . = ALIGN(512); + FILE_2B2A00.o (.text) +} > MODULE_63 + +.MODULE.64 : AT (0x2B3600) { + . = ALIGN(512); + FILE_2B7600.o (.text) +} > MODULE_64 + +.MODULE.65 : AT (0x2B5400) { + . = ALIGN(512); + FILE_2B9400.o (.text) +} > MODULE_65 + +.MODULE.66 : AT (0x2B8400) { + . = ALIGN(512); + FILE_2BC400.o (.text) +} > MODULE_66 + +.MODULE.67 : AT (0x2BAC00) { + . = ALIGN(512); + FILE_2BEC00.o (.text) +} > MODULE_67 + +.MODULE.68 : AT (0x2BD200) { + . = ALIGN(512); + FILE_2C1200.o (.text) +} > MODULE_68 + +.MODULE.69 : AT (0x2BE800) { + . = ALIGN(512); + FILE_2C2800.o (.text) +} > MODULE_69 + +.MODULE.70 : AT (0x2C0C00) { + . = ALIGN(512); + FILE_2C4C00.o (.text) +} > MODULE_70 + +.MODULE.71 : AT (0x2C1C00) { + . = ALIGN(512); + FILE_2C5C00.o (.text) +} > MODULE_71 + +.MODULE.72 : AT (0x2C5C00) { + . = ALIGN(512); + FILE_2C9C00.o (.text) +} > MODULE_72 + +.MODULE.73 : AT (0x2C5E00) { + . = ALIGN(512); + FILE_2C9E00.o (.text) +} > MODULE_73 + +.MODULE.74 : AT (0x2CAA00) { + . = ALIGN(512); + FILE_2CEA00.o (.text) +} > MODULE_74 + +.MODULE.75 : AT (0x2CBE00) { + . = ALIGN(512); + FILE_2CFE00.o (.text) +} > MODULE_75 + +.MODULE.76 : AT (0x2D1C00) { + . = ALIGN(512); + FILE_2D5C00.o (.text) +} > MODULE_76 + +.MODULE.77 : AT (0x2D3C00) { + . = ALIGN(512); + FILE_2D7C00.o (.text) +} > MODULE_77 + +.MODULE.78 : AT (0x2D5800) { + . = ALIGN(512); + FILE_2D9800.o (.text) +} > MODULE_78 + +.MODULE.79 : AT (0x2D5E00) { + . = ALIGN(512); + FILE_2D9E00.o (.text) +} > MODULE_79 + +.MODULE.80 : AT (0x2DB200) { + . = ALIGN(512); + FILE_2DF200.o (.text) +} > MODULE_80 + +.MODULE.81 : AT (0x2E5A00) { + . = ALIGN(512); + FILE_2E9A00.o (.text) +} > MODULE_81 + +.MODULE.82 : AT (0x2EB000) { + . = ALIGN(512); + FILE_2EF000.o (.text) +} > MODULE_82 + +.MODULE.83 : AT (0x2ED600) { + . = ALIGN(512); + FILE_2F1600.o (.text) +} > MODULE_83 + +.MODULE.84 : AT (0x2FBA00) { + . = ALIGN(512); + FILE_2FFA00.o (.text) +} > MODULE_84 + +.MODULE.85 : AT (0x2FF400) { + . = ALIGN(512); + FILE_303400.o (.text) +} > MODULE_85 + +.MODULE.86 : AT (0x308600) { + . = ALIGN(512); + FILE_30C600.o (.text) +} > MODULE_86 diff --git a/arm9/overlay_table.lcf.inc b/arm9/overlay_table.lcf.inc new file mode 100644 index 00000000..d3a29439 --- /dev/null +++ b/arm9/overlay_table.lcf.inc @@ -0,0 +1,782 @@ +WRITEW 0; +WRITEW SDK_MODULE_00_START; +WRITEW SDK_MODULE_00_SIZE; +WRITEW SDK_MODULE_00_BSSSIZE; +WRITEW SDK_MODULE_00_STATIC_INIT_START; +WRITEW SDK_MODULE_00_STATIC_INIT_END; +WRITEW 0; +WRITEW 0; + +WRITEW 1; +WRITEW SDK_MODULE_01_START; +WRITEW SDK_MODULE_01_SIZE; +WRITEW SDK_MODULE_01_BSSSIZE; +WRITEW SDK_MODULE_01_STATIC_INIT_START; +WRITEW SDK_MODULE_01_STATIC_INIT_END; +WRITEW 1; +WRITEW 0; + +WRITEW 2; +WRITEW SDK_MODULE_02_START; +WRITEW SDK_MODULE_02_SIZE; +WRITEW SDK_MODULE_02_BSSSIZE; +WRITEW SDK_MODULE_02_STATIC_INIT_START; +WRITEW SDK_MODULE_02_STATIC_INIT_END; +WRITEW 2; +WRITEW 0; + +WRITEW 3; +WRITEW SDK_MODULE_03_START; +WRITEW SDK_MODULE_03_SIZE; +WRITEW SDK_MODULE_03_BSSSIZE; +WRITEW SDK_MODULE_03_STATIC_INIT_START; +WRITEW SDK_MODULE_03_STATIC_INIT_END; +WRITEW 3; +WRITEW 0; + +WRITEW 4; +WRITEW SDK_MODULE_04_START; +WRITEW SDK_MODULE_04_SIZE; +WRITEW SDK_MODULE_04_BSSSIZE; +WRITEW SDK_MODULE_04_STATIC_INIT_START; +WRITEW SDK_MODULE_04_STATIC_INIT_END; +WRITEW 4; +WRITEW 0; + +WRITEW 5; +WRITEW SDK_MODULE_05_START; +WRITEW SDK_MODULE_05_SIZE; +WRITEW SDK_MODULE_05_BSSSIZE; +WRITEW SDK_MODULE_05_STATIC_INIT_START; +WRITEW SDK_MODULE_05_STATIC_INIT_END; +WRITEW 5; +WRITEW 0; + +WRITEW 6; +WRITEW SDK_MODULE_06_START; +WRITEW SDK_MODULE_06_SIZE; +WRITEW SDK_MODULE_06_BSSSIZE; +WRITEW SDK_MODULE_06_STATIC_INIT_START; +WRITEW SDK_MODULE_06_STATIC_INIT_END; +WRITEW 6; +WRITEW 0; + +WRITEW 7; +WRITEW SDK_MODULE_07_START; +WRITEW SDK_MODULE_07_SIZE; +WRITEW SDK_MODULE_07_BSSSIZE; +WRITEW SDK_MODULE_07_STATIC_INIT_START; +WRITEW SDK_MODULE_07_STATIC_INIT_END; +WRITEW 7; +WRITEW 0; + +WRITEW 8; +WRITEW SDK_MODULE_08_START; +WRITEW SDK_MODULE_08_SIZE; +WRITEW SDK_MODULE_08_BSSSIZE; +WRITEW SDK_MODULE_08_STATIC_INIT_START; +WRITEW SDK_MODULE_08_STATIC_INIT_END; +WRITEW 8; +WRITEW 0; + +WRITEW 9; +WRITEW SDK_MODULE_09_START; +WRITEW SDK_MODULE_09_SIZE; +WRITEW SDK_MODULE_09_BSSSIZE; +WRITEW SDK_MODULE_09_STATIC_INIT_START; +WRITEW SDK_MODULE_09_STATIC_INIT_END; +WRITEW 9; +WRITEW 0; + +WRITEW 10; +WRITEW SDK_MODULE_10_START; +WRITEW SDK_MODULE_10_SIZE; +WRITEW SDK_MODULE_10_BSSSIZE; +WRITEW SDK_MODULE_10_STATIC_INIT_START; +WRITEW SDK_MODULE_10_STATIC_INIT_END; +WRITEW 10; +WRITEW 0; + +WRITEW 11; +WRITEW SDK_MODULE_11_START; +WRITEW SDK_MODULE_11_SIZE; +WRITEW SDK_MODULE_11_BSSSIZE; +WRITEW SDK_MODULE_11_STATIC_INIT_START; +WRITEW SDK_MODULE_11_STATIC_INIT_END; +WRITEW 11; +WRITEW 0; + +WRITEW 12; +WRITEW SDK_MODULE_12_START; +WRITEW SDK_MODULE_12_SIZE; +WRITEW SDK_MODULE_12_BSSSIZE; +WRITEW SDK_MODULE_12_STATIC_INIT_START; +WRITEW SDK_MODULE_12_STATIC_INIT_END; +WRITEW 12; +WRITEW 0; + +WRITEW 13; +WRITEW SDK_MODULE_13_START; +WRITEW SDK_MODULE_13_SIZE; +WRITEW SDK_MODULE_13_BSSSIZE; +WRITEW SDK_MODULE_13_STATIC_INIT_START; +WRITEW SDK_MODULE_13_STATIC_INIT_END; +WRITEW 13; +WRITEW 0; + +WRITEW 14; +WRITEW SDK_MODULE_14_START; +WRITEW SDK_MODULE_14_SIZE; +WRITEW SDK_MODULE_14_BSSSIZE; +WRITEW SDK_MODULE_14_STATIC_INIT_START; +WRITEW SDK_MODULE_14_STATIC_INIT_END; +WRITEW 14; +WRITEW 0; + +WRITEW 15; +WRITEW SDK_MODULE_15_START; +WRITEW SDK_MODULE_15_SIZE; +WRITEW SDK_MODULE_15_BSSSIZE; +WRITEW SDK_MODULE_15_STATIC_INIT_START; +WRITEW SDK_MODULE_15_STATIC_INIT_END; +WRITEW 15; +WRITEW 0; + +WRITEW 16; +WRITEW SDK_MODULE_16_START; +WRITEW SDK_MODULE_16_SIZE; +WRITEW SDK_MODULE_16_BSSSIZE; +WRITEW SDK_MODULE_16_STATIC_INIT_START; +WRITEW SDK_MODULE_16_STATIC_INIT_END; +WRITEW 16; +WRITEW 0; + +WRITEW 17; +WRITEW SDK_MODULE_17_START; +WRITEW SDK_MODULE_17_SIZE; +WRITEW SDK_MODULE_17_BSSSIZE; +WRITEW SDK_MODULE_17_STATIC_INIT_START; +WRITEW SDK_MODULE_17_STATIC_INIT_END; +WRITEW 17; +WRITEW 0; + +WRITEW 18; +WRITEW SDK_MODULE_18_START; +WRITEW SDK_MODULE_18_SIZE; +WRITEW SDK_MODULE_18_BSSSIZE; +WRITEW SDK_MODULE_18_STATIC_INIT_START; +WRITEW SDK_MODULE_18_STATIC_INIT_END; +WRITEW 18; +WRITEW 0; + +WRITEW 19; +WRITEW SDK_MODULE_19_START; +WRITEW SDK_MODULE_19_SIZE; +WRITEW SDK_MODULE_19_BSSSIZE; +WRITEW SDK_MODULE_19_STATIC_INIT_START; +WRITEW SDK_MODULE_19_STATIC_INIT_END; +WRITEW 19; +WRITEW 0; + +WRITEW 20; +WRITEW SDK_MODULE_20_START; +WRITEW SDK_MODULE_20_SIZE; +WRITEW SDK_MODULE_20_BSSSIZE; +WRITEW SDK_MODULE_20_STATIC_INIT_START; +WRITEW SDK_MODULE_20_STATIC_INIT_END; +WRITEW 20; +WRITEW 0; + +WRITEW 21; +WRITEW SDK_MODULE_21_START; +WRITEW SDK_MODULE_21_SIZE; +WRITEW SDK_MODULE_21_BSSSIZE; +WRITEW SDK_MODULE_21_STATIC_INIT_START; +WRITEW SDK_MODULE_21_STATIC_INIT_END; +WRITEW 21; +WRITEW 0; + +WRITEW 22; +WRITEW SDK_MODULE_22_START; +WRITEW SDK_MODULE_22_SIZE; +WRITEW SDK_MODULE_22_BSSSIZE; +WRITEW SDK_MODULE_22_STATIC_INIT_START; +WRITEW SDK_MODULE_22_STATIC_INIT_END; +WRITEW 22; +WRITEW 0; + +WRITEW 23; +WRITEW SDK_MODULE_23_START; +WRITEW SDK_MODULE_23_SIZE; +WRITEW SDK_MODULE_23_BSSSIZE; +WRITEW SDK_MODULE_23_STATIC_INIT_START; +WRITEW SDK_MODULE_23_STATIC_INIT_END; +WRITEW 23; +WRITEW 0; + +WRITEW 24; +WRITEW SDK_MODULE_24_START; +WRITEW SDK_MODULE_24_SIZE; +WRITEW SDK_MODULE_24_BSSSIZE; +WRITEW SDK_MODULE_24_STATIC_INIT_START; +WRITEW SDK_MODULE_24_STATIC_INIT_END; +WRITEW 24; +WRITEW 0; + +WRITEW 25; +WRITEW SDK_MODULE_25_START; +WRITEW SDK_MODULE_25_SIZE; +WRITEW SDK_MODULE_25_BSSSIZE; +WRITEW SDK_MODULE_25_STATIC_INIT_START; +WRITEW SDK_MODULE_25_STATIC_INIT_END; +WRITEW 25; +WRITEW 0; + +WRITEW 26; +WRITEW SDK_MODULE_26_START; +WRITEW SDK_MODULE_26_SIZE; +WRITEW SDK_MODULE_26_BSSSIZE; +WRITEW SDK_MODULE_26_STATIC_INIT_START; +WRITEW SDK_MODULE_26_STATIC_INIT_END; +WRITEW 26; +WRITEW 0; + +WRITEW 27; +WRITEW SDK_MODULE_27_START; +WRITEW SDK_MODULE_27_SIZE; +WRITEW SDK_MODULE_27_BSSSIZE; +WRITEW SDK_MODULE_27_STATIC_INIT_START; +WRITEW SDK_MODULE_27_STATIC_INIT_END; +WRITEW 27; +WRITEW 0; + +WRITEW 28; +WRITEW SDK_MODULE_28_START; +WRITEW SDK_MODULE_28_SIZE; +WRITEW SDK_MODULE_28_BSSSIZE; +WRITEW SDK_MODULE_28_STATIC_INIT_START; +WRITEW SDK_MODULE_28_STATIC_INIT_END; +WRITEW 28; +WRITEW 0; + +WRITEW 29; +WRITEW SDK_MODULE_29_START; +WRITEW SDK_MODULE_29_SIZE; +WRITEW SDK_MODULE_29_BSSSIZE; +WRITEW SDK_MODULE_29_STATIC_INIT_START; +WRITEW SDK_MODULE_29_STATIC_INIT_END; +WRITEW 29; +WRITEW 0; + +WRITEW 30; +WRITEW SDK_MODULE_30_START; +WRITEW SDK_MODULE_30_SIZE; +WRITEW SDK_MODULE_30_BSSSIZE; +WRITEW SDK_MODULE_30_STATIC_INIT_START; +WRITEW SDK_MODULE_30_STATIC_INIT_END; +WRITEW 30; +WRITEW 0; + +WRITEW 31; +WRITEW SDK_MODULE_31_START; +WRITEW SDK_MODULE_31_SIZE; +WRITEW SDK_MODULE_31_BSSSIZE; +WRITEW SDK_MODULE_31_STATIC_INIT_START; +WRITEW SDK_MODULE_31_STATIC_INIT_END; +WRITEW 31; +WRITEW 0; + +WRITEW 32; +WRITEW SDK_MODULE_32_START; +WRITEW SDK_MODULE_32_SIZE; +WRITEW SDK_MODULE_32_BSSSIZE; +WRITEW SDK_MODULE_32_STATIC_INIT_START; +WRITEW SDK_MODULE_32_STATIC_INIT_END; +WRITEW 32; +WRITEW 0; + +WRITEW 33; +WRITEW SDK_MODULE_33_START; +WRITEW SDK_MODULE_33_SIZE; +WRITEW SDK_MODULE_33_BSSSIZE; +WRITEW SDK_MODULE_33_STATIC_INIT_START; +WRITEW SDK_MODULE_33_STATIC_INIT_END; +WRITEW 33; +WRITEW 0; + +WRITEW 34; +WRITEW SDK_MODULE_34_START; +WRITEW SDK_MODULE_34_SIZE; +WRITEW SDK_MODULE_34_BSSSIZE; +WRITEW SDK_MODULE_34_STATIC_INIT_START; +WRITEW SDK_MODULE_34_STATIC_INIT_END; +WRITEW 34; +WRITEW 0; + +WRITEW 35; +WRITEW SDK_MODULE_35_START; +WRITEW SDK_MODULE_35_SIZE; +WRITEW SDK_MODULE_35_BSSSIZE; +WRITEW SDK_MODULE_35_STATIC_INIT_START; +WRITEW SDK_MODULE_35_STATIC_INIT_END; +WRITEW 35; +WRITEW 0; + +WRITEW 36; +WRITEW SDK_MODULE_36_START; +WRITEW SDK_MODULE_36_SIZE; +WRITEW SDK_MODULE_36_BSSSIZE; +WRITEW SDK_MODULE_36_STATIC_INIT_START; +WRITEW SDK_MODULE_36_STATIC_INIT_END; +WRITEW 36; +WRITEW 0; + +WRITEW 37; +WRITEW SDK_MODULE_37_START; +WRITEW SDK_MODULE_37_SIZE; +WRITEW SDK_MODULE_37_BSSSIZE; +WRITEW SDK_MODULE_37_STATIC_INIT_START; +WRITEW SDK_MODULE_37_STATIC_INIT_END; +WRITEW 37; +WRITEW 0; + +WRITEW 38; +WRITEW SDK_MODULE_38_START; +WRITEW SDK_MODULE_38_SIZE; +WRITEW SDK_MODULE_38_BSSSIZE; +WRITEW SDK_MODULE_38_STATIC_INIT_START; +WRITEW SDK_MODULE_38_STATIC_INIT_END; +WRITEW 38; +WRITEW 0; + +WRITEW 39; +WRITEW SDK_MODULE_39_START; +WRITEW SDK_MODULE_39_SIZE; +WRITEW SDK_MODULE_39_BSSSIZE; +WRITEW SDK_MODULE_39_STATIC_INIT_START; +WRITEW SDK_MODULE_39_STATIC_INIT_END; +WRITEW 39; +WRITEW 0; + +WRITEW 40; +WRITEW SDK_MODULE_40_START; +WRITEW SDK_MODULE_40_SIZE; +WRITEW SDK_MODULE_40_BSSSIZE; +WRITEW SDK_MODULE_40_STATIC_INIT_START; +WRITEW SDK_MODULE_40_STATIC_INIT_END; +WRITEW 40; +WRITEW 0; + +WRITEW 41; +WRITEW SDK_MODULE_41_START; +WRITEW SDK_MODULE_41_SIZE; +WRITEW SDK_MODULE_41_BSSSIZE; +WRITEW SDK_MODULE_41_STATIC_INIT_START; +WRITEW SDK_MODULE_41_STATIC_INIT_END; +WRITEW 41; +WRITEW 0; + +WRITEW 42; +WRITEW SDK_MODULE_42_START; +WRITEW SDK_MODULE_42_SIZE; +WRITEW SDK_MODULE_42_BSSSIZE; +WRITEW SDK_MODULE_42_STATIC_INIT_START; +WRITEW SDK_MODULE_42_STATIC_INIT_END; +WRITEW 42; +WRITEW 0; + +WRITEW 43; +WRITEW SDK_MODULE_43_START; +WRITEW SDK_MODULE_43_SIZE; +WRITEW SDK_MODULE_43_BSSSIZE; +WRITEW SDK_MODULE_43_STATIC_INIT_START; +WRITEW SDK_MODULE_43_STATIC_INIT_END; +WRITEW 43; +WRITEW 0; + +WRITEW 44; +WRITEW SDK_MODULE_44_START; +WRITEW SDK_MODULE_44_SIZE; +WRITEW SDK_MODULE_44_BSSSIZE; +WRITEW SDK_MODULE_44_STATIC_INIT_START; +WRITEW SDK_MODULE_44_STATIC_INIT_END; +WRITEW 44; +WRITEW 0; + +WRITEW 45; +WRITEW SDK_MODULE_45_START; +WRITEW SDK_MODULE_45_SIZE; +WRITEW SDK_MODULE_45_BSSSIZE; +WRITEW SDK_MODULE_45_STATIC_INIT_START; +WRITEW SDK_MODULE_45_STATIC_INIT_END; +WRITEW 45; +WRITEW 0; + +WRITEW 46; +WRITEW SDK_MODULE_46_START; +WRITEW SDK_MODULE_46_SIZE; +WRITEW SDK_MODULE_46_BSSSIZE; +WRITEW SDK_MODULE_46_STATIC_INIT_START; +WRITEW SDK_MODULE_46_STATIC_INIT_END; +WRITEW 46; +WRITEW 0; + +WRITEW 47; +WRITEW SDK_MODULE_47_START; +WRITEW SDK_MODULE_47_SIZE; +WRITEW SDK_MODULE_47_BSSSIZE; +WRITEW SDK_MODULE_47_STATIC_INIT_START; +WRITEW SDK_MODULE_47_STATIC_INIT_END; +WRITEW 47; +WRITEW 0; + +WRITEW 48; +WRITEW SDK_MODULE_48_START; +WRITEW SDK_MODULE_48_SIZE; +WRITEW SDK_MODULE_48_BSSSIZE; +WRITEW SDK_MODULE_48_STATIC_INIT_START; +WRITEW SDK_MODULE_48_STATIC_INIT_END; +WRITEW 48; +WRITEW 0; + +WRITEW 49; +WRITEW SDK_MODULE_49_START; +WRITEW SDK_MODULE_49_SIZE; +WRITEW SDK_MODULE_49_BSSSIZE; +WRITEW SDK_MODULE_49_STATIC_INIT_START; +WRITEW SDK_MODULE_49_STATIC_INIT_END; +WRITEW 49; +WRITEW 0; + +WRITEW 50; +WRITEW SDK_MODULE_50_START; +WRITEW SDK_MODULE_50_SIZE; +WRITEW SDK_MODULE_50_BSSSIZE; +WRITEW SDK_MODULE_50_STATIC_INIT_START; +WRITEW SDK_MODULE_50_STATIC_INIT_END; +WRITEW 50; +WRITEW 0; + +WRITEW 51; +WRITEW SDK_MODULE_51_START; +WRITEW SDK_MODULE_51_SIZE; +WRITEW SDK_MODULE_51_BSSSIZE; +WRITEW SDK_MODULE_51_STATIC_INIT_START; +WRITEW SDK_MODULE_51_STATIC_INIT_END; +WRITEW 51; +WRITEW 0; + +WRITEW 52; +WRITEW SDK_MODULE_52_START; +WRITEW SDK_MODULE_52_SIZE; +WRITEW SDK_MODULE_52_BSSSIZE; +WRITEW SDK_MODULE_52_STATIC_INIT_START; +WRITEW SDK_MODULE_52_STATIC_INIT_END; +WRITEW 52; +WRITEW 0; + +WRITEW 53; +WRITEW SDK_MODULE_53_START; +WRITEW SDK_MODULE_53_SIZE; +WRITEW SDK_MODULE_53_BSSSIZE; +WRITEW SDK_MODULE_53_STATIC_INIT_START; +WRITEW SDK_MODULE_53_STATIC_INIT_END; +WRITEW 53; +WRITEW 0; + +WRITEW 54; +WRITEW SDK_MODULE_54_START; +WRITEW SDK_MODULE_54_SIZE; +WRITEW SDK_MODULE_54_BSSSIZE; +WRITEW SDK_MODULE_54_STATIC_INIT_START; +WRITEW SDK_MODULE_54_STATIC_INIT_END; +WRITEW 54; +WRITEW 0; + +WRITEW 55; +WRITEW SDK_MODULE_55_START; +WRITEW SDK_MODULE_55_SIZE; +WRITEW SDK_MODULE_55_BSSSIZE; +WRITEW SDK_MODULE_55_STATIC_INIT_START; +WRITEW SDK_MODULE_55_STATIC_INIT_END; +WRITEW 55; +WRITEW 0; + +WRITEW 56; +WRITEW SDK_MODULE_56_START; +WRITEW SDK_MODULE_56_SIZE; +WRITEW SDK_MODULE_56_BSSSIZE; +WRITEW SDK_MODULE_56_STATIC_INIT_START; +WRITEW SDK_MODULE_56_STATIC_INIT_END; +WRITEW 56; +WRITEW 0; + +WRITEW 57; +WRITEW SDK_MODULE_57_START; +WRITEW SDK_MODULE_57_SIZE; +WRITEW SDK_MODULE_57_BSSSIZE; +WRITEW SDK_MODULE_57_STATIC_INIT_START; +WRITEW SDK_MODULE_57_STATIC_INIT_END; +WRITEW 57; +WRITEW 0; + +WRITEW 58; +WRITEW SDK_MODULE_58_START; +WRITEW SDK_MODULE_58_SIZE; +WRITEW SDK_MODULE_58_BSSSIZE; +WRITEW SDK_MODULE_58_STATIC_INIT_START; +WRITEW SDK_MODULE_58_STATIC_INIT_END; +WRITEW 58; +WRITEW 0; + +WRITEW 59; +WRITEW SDK_MODULE_59_START; +WRITEW SDK_MODULE_59_SIZE; +WRITEW SDK_MODULE_59_BSSSIZE; +WRITEW SDK_MODULE_59_STATIC_INIT_START; +WRITEW SDK_MODULE_59_STATIC_INIT_END; +WRITEW 59; +WRITEW 0; + +WRITEW 60; +WRITEW SDK_MODULE_60_START; +WRITEW SDK_MODULE_60_SIZE; +WRITEW SDK_MODULE_60_BSSSIZE; +WRITEW SDK_MODULE_60_STATIC_INIT_START; +WRITEW SDK_MODULE_60_STATIC_INIT_END; +WRITEW 60; +WRITEW 0; + +WRITEW 61; +WRITEW SDK_MODULE_61_START; +WRITEW SDK_MODULE_61_SIZE; +WRITEW SDK_MODULE_61_BSSSIZE; +WRITEW SDK_MODULE_61_STATIC_INIT_START; +WRITEW SDK_MODULE_61_STATIC_INIT_END; +WRITEW 61; +WRITEW 0; + +WRITEW 62; +WRITEW SDK_MODULE_62_START; +WRITEW SDK_MODULE_62_SIZE; +WRITEW SDK_MODULE_62_BSSSIZE; +WRITEW SDK_MODULE_62_STATIC_INIT_START; +WRITEW SDK_MODULE_62_STATIC_INIT_END; +WRITEW 62; +WRITEW 0; + +WRITEW 63; +WRITEW SDK_MODULE_63_START; +WRITEW SDK_MODULE_63_SIZE; +WRITEW SDK_MODULE_63_BSSSIZE; +WRITEW SDK_MODULE_63_STATIC_INIT_START; +WRITEW SDK_MODULE_63_STATIC_INIT_END; +WRITEW 63; +WRITEW 0; + +WRITEW 64; +WRITEW SDK_MODULE_64_START; +WRITEW SDK_MODULE_64_SIZE; +WRITEW SDK_MODULE_64_BSSSIZE; +WRITEW SDK_MODULE_64_STATIC_INIT_START; +WRITEW SDK_MODULE_64_STATIC_INIT_END; +WRITEW 64; +WRITEW 0; + +WRITEW 65; +WRITEW SDK_MODULE_65_START; +WRITEW SDK_MODULE_65_SIZE; +WRITEW SDK_MODULE_65_BSSSIZE; +WRITEW SDK_MODULE_65_STATIC_INIT_START; +WRITEW SDK_MODULE_65_STATIC_INIT_END; +WRITEW 65; +WRITEW 0; + +WRITEW 66; +WRITEW SDK_MODULE_66_START; +WRITEW SDK_MODULE_66_SIZE; +WRITEW SDK_MODULE_66_BSSSIZE; +WRITEW SDK_MODULE_66_STATIC_INIT_START; +WRITEW SDK_MODULE_66_STATIC_INIT_END; +WRITEW 66; +WRITEW 0; + +WRITEW 67; +WRITEW SDK_MODULE_67_START; +WRITEW SDK_MODULE_67_SIZE; +WRITEW SDK_MODULE_67_BSSSIZE; +WRITEW SDK_MODULE_67_STATIC_INIT_START; +WRITEW SDK_MODULE_67_STATIC_INIT_END; +WRITEW 67; +WRITEW 0; + +WRITEW 68; +WRITEW SDK_MODULE_68_START; +WRITEW SDK_MODULE_68_SIZE; +WRITEW SDK_MODULE_68_BSSSIZE; +WRITEW SDK_MODULE_68_STATIC_INIT_START; +WRITEW SDK_MODULE_68_STATIC_INIT_END; +WRITEW 68; +WRITEW 0; + +WRITEW 69; +WRITEW SDK_MODULE_69_START; +WRITEW SDK_MODULE_69_SIZE; +WRITEW SDK_MODULE_69_BSSSIZE; +WRITEW SDK_MODULE_69_STATIC_INIT_START; +WRITEW SDK_MODULE_69_STATIC_INIT_END; +WRITEW 69; +WRITEW 0; + +WRITEW 70; +WRITEW SDK_MODULE_70_START; +WRITEW SDK_MODULE_70_SIZE; +WRITEW SDK_MODULE_70_BSSSIZE; +WRITEW SDK_MODULE_70_STATIC_INIT_START; +WRITEW SDK_MODULE_70_STATIC_INIT_END; +WRITEW 70; +WRITEW 0; + +WRITEW 71; +WRITEW SDK_MODULE_71_START; +WRITEW SDK_MODULE_71_SIZE; +WRITEW SDK_MODULE_71_BSSSIZE; +WRITEW SDK_MODULE_71_STATIC_INIT_START; +WRITEW SDK_MODULE_71_STATIC_INIT_END; +WRITEW 71; +WRITEW 0; + +WRITEW 72; +WRITEW SDK_MODULE_72_START; +WRITEW SDK_MODULE_72_SIZE; +WRITEW SDK_MODULE_72_BSSSIZE; +WRITEW SDK_MODULE_72_STATIC_INIT_START; +WRITEW SDK_MODULE_72_STATIC_INIT_END; +WRITEW 72; +WRITEW 0; + +WRITEW 73; +WRITEW SDK_MODULE_73_START; +WRITEW SDK_MODULE_73_SIZE; +WRITEW SDK_MODULE_73_BSSSIZE; +WRITEW SDK_MODULE_73_STATIC_INIT_START; +WRITEW SDK_MODULE_73_STATIC_INIT_END; +WRITEW 73; +WRITEW 0; + +WRITEW 74; +WRITEW SDK_MODULE_74_START; +WRITEW SDK_MODULE_74_SIZE; +WRITEW SDK_MODULE_74_BSSSIZE; +WRITEW SDK_MODULE_74_STATIC_INIT_START; +WRITEW SDK_MODULE_74_STATIC_INIT_END; +WRITEW 74; +WRITEW 0; + +WRITEW 75; +WRITEW SDK_MODULE_75_START; +WRITEW SDK_MODULE_75_SIZE; +WRITEW SDK_MODULE_75_BSSSIZE; +WRITEW SDK_MODULE_75_STATIC_INIT_START; +WRITEW SDK_MODULE_75_STATIC_INIT_END; +WRITEW 75; +WRITEW 0; + +WRITEW 76; +WRITEW SDK_MODULE_76_START; +WRITEW SDK_MODULE_76_SIZE; +WRITEW SDK_MODULE_76_BSSSIZE; +WRITEW SDK_MODULE_76_STATIC_INIT_START; +WRITEW SDK_MODULE_76_STATIC_INIT_END; +WRITEW 76; +WRITEW 0; + +WRITEW 77; +WRITEW SDK_MODULE_77_START; +WRITEW SDK_MODULE_77_SIZE; +WRITEW SDK_MODULE_77_BSSSIZE; +WRITEW SDK_MODULE_77_STATIC_INIT_START; +WRITEW SDK_MODULE_77_STATIC_INIT_END; +WRITEW 77; +WRITEW 0; + +WRITEW 78; +WRITEW SDK_MODULE_78_START; +WRITEW SDK_MODULE_78_SIZE; +WRITEW SDK_MODULE_78_BSSSIZE; +WRITEW SDK_MODULE_78_STATIC_INIT_START; +WRITEW SDK_MODULE_78_STATIC_INIT_END; +WRITEW 78; +WRITEW 0; + +WRITEW 79; +WRITEW SDK_MODULE_79_START; +WRITEW SDK_MODULE_79_SIZE; +WRITEW SDK_MODULE_79_BSSSIZE; +WRITEW SDK_MODULE_79_STATIC_INIT_START; +WRITEW SDK_MODULE_79_STATIC_INIT_END; +WRITEW 79; +WRITEW 0; + +WRITEW 80; +WRITEW SDK_MODULE_80_START; +WRITEW SDK_MODULE_80_SIZE; +WRITEW SDK_MODULE_80_BSSSIZE; +WRITEW SDK_MODULE_80_STATIC_INIT_START; +WRITEW SDK_MODULE_80_STATIC_INIT_END; +WRITEW 80; +WRITEW 0; + +WRITEW 81; +WRITEW SDK_MODULE_81_START; +WRITEW SDK_MODULE_81_SIZE; +WRITEW SDK_MODULE_81_BSSSIZE; +WRITEW SDK_MODULE_81_STATIC_INIT_START; +WRITEW SDK_MODULE_81_STATIC_INIT_END; +WRITEW 81; +WRITEW 0; + +WRITEW 82; +WRITEW SDK_MODULE_82_START; +WRITEW SDK_MODULE_82_SIZE; +WRITEW SDK_MODULE_82_BSSSIZE; +WRITEW SDK_MODULE_82_STATIC_INIT_START; +WRITEW SDK_MODULE_82_STATIC_INIT_END; +WRITEW 82; +WRITEW 0; + +WRITEW 83; +WRITEW SDK_MODULE_83_START; +WRITEW SDK_MODULE_83_SIZE; +WRITEW SDK_MODULE_83_BSSSIZE; +WRITEW SDK_MODULE_83_STATIC_INIT_START; +WRITEW SDK_MODULE_83_STATIC_INIT_END; +WRITEW 83; +WRITEW 0; + +WRITEW 84; +WRITEW SDK_MODULE_84_START; +WRITEW SDK_MODULE_84_SIZE; +WRITEW SDK_MODULE_84_BSSSIZE; +WRITEW SDK_MODULE_84_STATIC_INIT_START; +WRITEW SDK_MODULE_84_STATIC_INIT_END; +WRITEW 84; +WRITEW 0; + +WRITEW 85; +WRITEW SDK_MODULE_85_START; +WRITEW SDK_MODULE_85_SIZE; +WRITEW SDK_MODULE_85_BSSSIZE; +WRITEW SDK_MODULE_85_STATIC_INIT_START; +WRITEW SDK_MODULE_85_STATIC_INIT_END; +WRITEW 85; +WRITEW 0; + +WRITEW 86; +WRITEW SDK_MODULE_86_START; +WRITEW SDK_MODULE_86_SIZE; +WRITEW SDK_MODULE_86_BSSSIZE; +WRITEW SDK_MODULE_86_STATIC_INIT_START; +WRITEW SDK_MODULE_86_STATIC_INIT_END; +WRITEW 86; +WRITEW 0; -- cgit v1.2.3 From c5b3023b016162ff3c6563e2618601609bb356aa Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 20:00:28 -0400 Subject: Inline modules again, and define macros for lcf --- arm9/arm9.lcf | 265 ++++++++++++++- arm9/macros.lcf.inc | 15 + arm9/module_regions.lcf.inc | 87 ----- arm9/module_sections.lcf.inc | 435 ------------------------ arm9/overlay_table.lcf.inc | 782 ------------------------------------------- 5 files changed, 277 insertions(+), 1307 deletions(-) create mode 100644 arm9/macros.lcf.inc delete mode 100644 arm9/module_regions.lcf.inc delete mode 100644 arm9/module_sections.lcf.inc delete mode 100644 arm9/overlay_table.lcf.inc diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index b7ee9744..272edfca 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -1,3 +1,4 @@ +#include "macros.lcf.inc" MEMORY { .itcm (RWX) : ORIGIN=0x01FF8000, LENGTH=0 @@ -9,7 +10,93 @@ MEMORY { .ewram (RWX) : ORIGIN=0x023E0000, LENGTH=0 .dtcm (RW) : ORIGIN=0x027E0000, LENGTH=0 .overlay (RX) : ORIGIN=0, LENGTH=0 -#include "module_regions.lcf.inc" + MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 } SECTIONS { @@ -101,8 +188,180 @@ SECTIONS { } > .footer .overlay : AT (0x107800) { -#include "overlay_table.lcf.inc" + OVERLAY_TABLE(SDK_MODULE_00, 0) + OVERLAY_TABLE(SDK_MODULE_01, 1) + OVERLAY_TABLE(SDK_MODULE_02, 2) + OVERLAY_TABLE(SDK_MODULE_03, 3) + OVERLAY_TABLE(SDK_MODULE_04, 4) + OVERLAY_TABLE(SDK_MODULE_05, 5) + OVERLAY_TABLE(SDK_MODULE_06, 6) + OVERLAY_TABLE(SDK_MODULE_07, 7) + OVERLAY_TABLE(SDK_MODULE_08, 8) + OVERLAY_TABLE(SDK_MODULE_09, 9) + OVERLAY_TABLE(SDK_MODULE_10, 10) + OVERLAY_TABLE(SDK_MODULE_11, 11) + OVERLAY_TABLE(SDK_MODULE_12, 12) + OVERLAY_TABLE(SDK_MODULE_13, 13) + OVERLAY_TABLE(SDK_MODULE_14, 14) + OVERLAY_TABLE(SDK_MODULE_15, 15) + OVERLAY_TABLE(SDK_MODULE_16, 16) + OVERLAY_TABLE(SDK_MODULE_17, 17) + OVERLAY_TABLE(SDK_MODULE_18, 18) + OVERLAY_TABLE(SDK_MODULE_19, 19) + OVERLAY_TABLE(SDK_MODULE_20, 20) + OVERLAY_TABLE(SDK_MODULE_21, 21) + OVERLAY_TABLE(SDK_MODULE_22, 22) + OVERLAY_TABLE(SDK_MODULE_23, 23) + OVERLAY_TABLE(SDK_MODULE_24, 24) + OVERLAY_TABLE(SDK_MODULE_25, 25) + OVERLAY_TABLE(SDK_MODULE_26, 26) + OVERLAY_TABLE(SDK_MODULE_27, 27) + OVERLAY_TABLE(SDK_MODULE_28, 28) + OVERLAY_TABLE(SDK_MODULE_29, 29) + OVERLAY_TABLE(SDK_MODULE_30, 30) + OVERLAY_TABLE(SDK_MODULE_31, 31) + OVERLAY_TABLE(SDK_MODULE_32, 32) + OVERLAY_TABLE(SDK_MODULE_33, 33) + OVERLAY_TABLE(SDK_MODULE_34, 34) + OVERLAY_TABLE(SDK_MODULE_35, 35) + OVERLAY_TABLE(SDK_MODULE_36, 36) + OVERLAY_TABLE(SDK_MODULE_37, 37) + OVERLAY_TABLE(SDK_MODULE_38, 38) + OVERLAY_TABLE(SDK_MODULE_39, 39) + OVERLAY_TABLE(SDK_MODULE_40, 40) + OVERLAY_TABLE(SDK_MODULE_41, 41) + OVERLAY_TABLE(SDK_MODULE_42, 42) + OVERLAY_TABLE(SDK_MODULE_43, 43) + OVERLAY_TABLE(SDK_MODULE_44, 44) + OVERLAY_TABLE(SDK_MODULE_45, 45) + OVERLAY_TABLE(SDK_MODULE_46, 46) + OVERLAY_TABLE(SDK_MODULE_47, 47) + OVERLAY_TABLE(SDK_MODULE_48, 48) + OVERLAY_TABLE(SDK_MODULE_49, 49) + OVERLAY_TABLE(SDK_MODULE_50, 50) + OVERLAY_TABLE(SDK_MODULE_51, 51) + OVERLAY_TABLE(SDK_MODULE_52, 52) + OVERLAY_TABLE(SDK_MODULE_53, 53) + OVERLAY_TABLE(SDK_MODULE_54, 54) + OVERLAY_TABLE(SDK_MODULE_55, 55) + OVERLAY_TABLE(SDK_MODULE_56, 56) + OVERLAY_TABLE(SDK_MODULE_57, 57) + OVERLAY_TABLE(SDK_MODULE_58, 58) + OVERLAY_TABLE(SDK_MODULE_59, 59) + OVERLAY_TABLE(SDK_MODULE_60, 60) + OVERLAY_TABLE(SDK_MODULE_61, 61) + OVERLAY_TABLE(SDK_MODULE_62, 62) + OVERLAY_TABLE(SDK_MODULE_63, 63) + OVERLAY_TABLE(SDK_MODULE_64, 64) + OVERLAY_TABLE(SDK_MODULE_65, 65) + OVERLAY_TABLE(SDK_MODULE_66, 66) + OVERLAY_TABLE(SDK_MODULE_67, 67) + OVERLAY_TABLE(SDK_MODULE_68, 68) + OVERLAY_TABLE(SDK_MODULE_69, 69) + OVERLAY_TABLE(SDK_MODULE_70, 70) + OVERLAY_TABLE(SDK_MODULE_71, 71) + OVERLAY_TABLE(SDK_MODULE_72, 72) + OVERLAY_TABLE(SDK_MODULE_73, 73) + OVERLAY_TABLE(SDK_MODULE_74, 74) + OVERLAY_TABLE(SDK_MODULE_75, 75) + OVERLAY_TABLE(SDK_MODULE_76, 76) + OVERLAY_TABLE(SDK_MODULE_77, 77) + OVERLAY_TABLE(SDK_MODULE_78, 78) + OVERLAY_TABLE(SDK_MODULE_79, 79) + OVERLAY_TABLE(SDK_MODULE_80, 80) + OVERLAY_TABLE(SDK_MODULE_81, 81) + OVERLAY_TABLE(SDK_MODULE_82, 82) + OVERLAY_TABLE(SDK_MODULE_83, 83) + OVERLAY_TABLE(SDK_MODULE_84, 84) + OVERLAY_TABLE(SDK_MODULE_85, 85) + OVERLAY_TABLE(SDK_MODULE_86, 86) } > .overlay -#include "module_sections.lcf.inc" + OVERLAY_FILE(00, 0x108400, FILE_10C400.o) + OVERLAY_FILE(01, 0x108600, FILE_10C600.o) + OVERLAY_FILE(02, 0x108800, FILE_10C800.o) + OVERLAY_FILE(03, 0x108A00, FILE_10CA00.o) + OVERLAY_FILE(04, 0x108C00, FILE_10CC00.o) + OVERLAY_FILE(05, 0x141400, FILE_145400.o) + OVERLAY_FILE(06, 0x167600, FILE_16B600.o) + OVERLAY_FILE(07, 0x180400, FILE_184400.o) + OVERLAY_FILE(08, 0x183800, FILE_187800.o) + OVERLAY_FILE(09, 0x19F000, FILE_1A3000.o) + OVERLAY_FILE(10, 0x1A9200, FILE_1AD200.o) + OVERLAY_FILE(11, 0x1A9400, FILE_1AD400.o) + OVERLAY_FILE(12, 0x1DBE00, FILE_1DFE00.o) + OVERLAY_FILE(13, 0x1F5200, FILE_1F9200.o) + OVERLAY_FILE(14, 0x223E00, FILE_227E00.o) + OVERLAY_FILE(15, 0x233400, FILE_237400.o) + OVERLAY_FILE(16, 0x237C00, FILE_23BC00.o) + OVERLAY_FILE(17, 0x260200, FILE_264200.o) + OVERLAY_FILE(18, 0x267200, FILE_26B200.o) + OVERLAY_FILE(19, 0x27F000, FILE_283000.o) + OVERLAY_FILE(20, 0x27F200, FILE_283200.o) + OVERLAY_FILE(21, 0x281600, FILE_285600.o) + OVERLAY_FILE(22, 0x281C00, FILE_285C00.o) + OVERLAY_FILE(23, 0x282C00, FILE_286C00.o) + OVERLAY_FILE(24, 0x284600, FILE_288600.o) + OVERLAY_FILE(25, 0x285000, FILE_289000.o) + OVERLAY_FILE(26, 0x285600, FILE_289600.o) + OVERLAY_FILE(27, 0x285E00, FILE_289E00.o) + OVERLAY_FILE(28, 0x286A00, FILE_28AA00.o) + OVERLAY_FILE(29, 0x288200, FILE_28C200.o) + OVERLAY_FILE(30, 0x288C00, FILE_28CC00.o) + OVERLAY_FILE(31, 0x289200, FILE_28D200.o) + OVERLAY_FILE(32, 0x289800, FILE_28D800.o) + OVERLAY_FILE(33, 0x289E00, FILE_28DE00.o) + OVERLAY_FILE(34, 0x28A200, FILE_28E200.o) + OVERLAY_FILE(35, 0x28A800, FILE_28E800.o) + OVERLAY_FILE(36, 0x28B200, FILE_28F200.o) + OVERLAY_FILE(37, 0x28C000, FILE_290000.o) + OVERLAY_FILE(38, 0x28C600, FILE_290600.o) + OVERLAY_FILE(39, 0x28D200, FILE_291200.o) + OVERLAY_FILE(40, 0x28E000, FILE_292000.o) + OVERLAY_FILE(41, 0x28EE00, FILE_292E00.o) + OVERLAY_FILE(42, 0x290000, FILE_294000.o) + OVERLAY_FILE(43, 0x290A00, FILE_294A00.o) + OVERLAY_FILE(44, 0x291400, FILE_295400.o) + OVERLAY_FILE(45, 0x291A00, FILE_295A00.o) + OVERLAY_FILE(46, 0x292400, FILE_296400.o) + OVERLAY_FILE(47, 0x292800, FILE_296800.o) + OVERLAY_FILE(48, 0x293600, FILE_297600.o) + OVERLAY_FILE(49, 0x294000, FILE_298000.o) + OVERLAY_FILE(50, 0x294600, FILE_298600.o) + OVERLAY_FILE(51, 0x294A00, FILE_298A00.o) + OVERLAY_FILE(52, 0x295A00, FILE_299A00.o) + OVERLAY_FILE(53, 0x295E00, FILE_299E00.o) + OVERLAY_FILE(54, 0x298400, FILE_29C400.o) + OVERLAY_FILE(55, 0x29A800, FILE_29E800.o) + OVERLAY_FILE(56, 0x29DA00, FILE_2A1A00.o) + OVERLAY_FILE(57, 0x2A2200, FILE_2A6200.o) + OVERLAY_FILE(58, 0x2A4800, FILE_2A8800.o) + OVERLAY_FILE(59, 0x2A5E00, FILE_2A9E00.o) + OVERLAY_FILE(60, 0x2A8C00, FILE_2ACC00.o) + OVERLAY_FILE(61, 0x2A9A00, FILE_2ADA00.o) + OVERLAY_FILE(62, 0x2AAC00, FILE_2AEC00.o) + OVERLAY_FILE(63, 0x2AEA00, FILE_2B2A00.o) + OVERLAY_FILE(64, 0x2B3600, FILE_2B7600.o) + OVERLAY_FILE(65, 0x2B5400, FILE_2B9400.o) + OVERLAY_FILE(66, 0x2B8400, FILE_2BC400.o) + OVERLAY_FILE(67, 0x2BAC00, FILE_2BEC00.o) + OVERLAY_FILE(68, 0x2BD200, FILE_2C1200.o) + OVERLAY_FILE(69, 0x2BE800, FILE_2C2800.o) + OVERLAY_FILE(70, 0x2C0C00, FILE_2C4C00.o) + OVERLAY_FILE(71, 0x2C1C00, FILE_2C5C00.o) + OVERLAY_FILE(72, 0x2C5C00, FILE_2C9C00.o) + OVERLAY_FILE(73, 0x2C5E00, FILE_2C9E00.o) + OVERLAY_FILE(74, 0x2CAA00, FILE_2CEA00.o) + OVERLAY_FILE(75, 0x2CBE00, FILE_2CFE00.o) + OVERLAY_FILE(76, 0x2D1C00, FILE_2D5C00.o) + OVERLAY_FILE(77, 0x2D3C00, FILE_2D7C00.o) + OVERLAY_FILE(78, 0x2D5800, FILE_2D9800.o) + OVERLAY_FILE(79, 0x2D5E00, FILE_2D9E00.o) + OVERLAY_FILE(80, 0x2DB200, FILE_2DF200.o) + OVERLAY_FILE(81, 0x2E5A00, FILE_2E9A00.o) + OVERLAY_FILE(82, 0x2EB000, FILE_2EF000.o) + OVERLAY_FILE(83, 0x2ED600, FILE_2F1600.o) + OVERLAY_FILE(84, 0x2FBA00, FILE_2FFA00.o) + OVERLAY_FILE(85, 0x2FF400, FILE_303400.o) + OVERLAY_FILE(86, 0x308600, FILE_30C600.o) } diff --git a/arm9/macros.lcf.inc b/arm9/macros.lcf.inc new file mode 100644 index 00000000..f72f93fa --- /dev/null +++ b/arm9/macros.lcf.inc @@ -0,0 +1,15 @@ +#define OVERLAY_TABLE(module, number) \ +WRITEW number; \ +WRITEW module##_START; \ +WRITEW module##_SIZE; \ +WRITEW module##_BSSSIZE; \ +WRITEW module##_STATIC_INIT_START; \ +WRITEW module##_STATIC_INIT_END; \ +WRITEW number; \ +WRITEW 0; + +#define OVERLAY_FILE(number, offset, filename) \ +.MODULE.##number : AT (offset) { \ + . = ALIGN(512); \ + filename (.text) \ +} > MODULE_##number diff --git a/arm9/module_regions.lcf.inc b/arm9/module_regions.lcf.inc deleted file mode 100644 index 05dc10a9..00000000 --- a/arm9/module_regions.lcf.inc +++ /dev/null @@ -1,87 +0,0 @@ -MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 -MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 diff --git a/arm9/module_sections.lcf.inc b/arm9/module_sections.lcf.inc deleted file mode 100644 index 262d32cf..00000000 --- a/arm9/module_sections.lcf.inc +++ /dev/null @@ -1,435 +0,0 @@ - -.MODULE.00 : AT (0x108400) { - . = ALIGN(512); - FILE_10C400.o (.text) -} > MODULE_00 - -.MODULE.01 : AT (0x108600) { - . = ALIGN(512); - FILE_10C600.o (.text) -} > MODULE_01 - -.MODULE.02 : AT (0x108800) { - . = ALIGN(512); - FILE_10C800.o (.text) -} > MODULE_02 - -.MODULE.03 : AT (0x108A00) { - . = ALIGN(512); - FILE_10CA00.o (.text) -} > MODULE_03 - -.MODULE.04 : AT (0x108C00) { - . = ALIGN(512); - FILE_10CC00.o (.text) -} > MODULE_04 - -.MODULE.05 : AT (0x141400) { - . = ALIGN(512); - FILE_145400.o (.text) -} > MODULE_05 - -.MODULE.06 : AT (0x167600) { - . = ALIGN(512); - FILE_16B600.o (.text) -} > MODULE_06 - -.MODULE.07 : AT (0x180400) { - . = ALIGN(512); - FILE_184400.o (.text) -} > MODULE_07 - -.MODULE.08 : AT (0x183800) { - . = ALIGN(512); - FILE_187800.o (.text) -} > MODULE_08 - -.MODULE.09 : AT (0x19F000) { - . = ALIGN(512); - FILE_1A3000.o (.text) -} > MODULE_09 - -.MODULE.10 : AT (0x1A9200) { - . = ALIGN(512); - FILE_1AD200.o (.text) -} > MODULE_10 - -.MODULE.11 : AT (0x1A9400) { - . = ALIGN(512); - FILE_1AD400.o (.text) -} > MODULE_11 - -.MODULE.12 : AT (0x1DBE00) { - . = ALIGN(512); - FILE_1DFE00.o (.text) -} > MODULE_12 - -.MODULE.13 : AT (0x1F5200) { - . = ALIGN(512); - FILE_1F9200.o (.text) -} > MODULE_13 - -.MODULE.14 : AT (0x223E00) { - . = ALIGN(512); - FILE_227E00.o (.text) -} > MODULE_14 - -.MODULE.15 : AT (0x233400) { - . = ALIGN(512); - FILE_237400.o (.text) -} > MODULE_15 - -.MODULE.16 : AT (0x237C00) { - . = ALIGN(512); - FILE_23BC00.o (.text) -} > MODULE_16 - -.MODULE.17 : AT (0x260200) { - . = ALIGN(512); - FILE_264200.o (.text) -} > MODULE_17 - -.MODULE.18 : AT (0x267200) { - . = ALIGN(512); - FILE_26B200.o (.text) -} > MODULE_18 - -.MODULE.19 : AT (0x27F000) { - . = ALIGN(512); - FILE_283000.o (.text) -} > MODULE_19 - -.MODULE.20 : AT (0x27F200) { - . = ALIGN(512); - FILE_283200.o (.text) -} > MODULE_20 - -.MODULE.21 : AT (0x281600) { - . = ALIGN(512); - FILE_285600.o (.text) -} > MODULE_21 - -.MODULE.22 : AT (0x281C00) { - . = ALIGN(512); - FILE_285C00.o (.text) -} > MODULE_22 - -.MODULE.23 : AT (0x282C00) { - . = ALIGN(512); - FILE_286C00.o (.text) -} > MODULE_23 - -.MODULE.24 : AT (0x284600) { - . = ALIGN(512); - FILE_288600.o (.text) -} > MODULE_24 - -.MODULE.25 : AT (0x285000) { - . = ALIGN(512); - FILE_289000.o (.text) -} > MODULE_25 - -.MODULE.26 : AT (0x285600) { - . = ALIGN(512); - FILE_289600.o (.text) -} > MODULE_26 - -.MODULE.27 : AT (0x285E00) { - . = ALIGN(512); - FILE_289E00.o (.text) -} > MODULE_27 - -.MODULE.28 : AT (0x286A00) { - . = ALIGN(512); - FILE_28AA00.o (.text) -} > MODULE_28 - -.MODULE.29 : AT (0x288200) { - . = ALIGN(512); - FILE_28C200.o (.text) -} > MODULE_29 - -.MODULE.30 : AT (0x288C00) { - . = ALIGN(512); - FILE_28CC00.o (.text) -} > MODULE_30 - -.MODULE.31 : AT (0x289200) { - . = ALIGN(512); - FILE_28D200.o (.text) -} > MODULE_31 - -.MODULE.32 : AT (0x289800) { - . = ALIGN(512); - FILE_28D800.o (.text) -} > MODULE_32 - -.MODULE.33 : AT (0x289E00) { - . = ALIGN(512); - FILE_28DE00.o (.text) -} > MODULE_33 - -.MODULE.34 : AT (0x28A200) { - . = ALIGN(512); - FILE_28E200.o (.text) -} > MODULE_34 - -.MODULE.35 : AT (0x28A800) { - . = ALIGN(512); - FILE_28E800.o (.text) -} > MODULE_35 - -.MODULE.36 : AT (0x28B200) { - . = ALIGN(512); - FILE_28F200.o (.text) -} > MODULE_36 - -.MODULE.37 : AT (0x28C000) { - . = ALIGN(512); - FILE_290000.o (.text) -} > MODULE_37 - -.MODULE.38 : AT (0x28C600) { - . = ALIGN(512); - FILE_290600.o (.text) -} > MODULE_38 - -.MODULE.39 : AT (0x28D200) { - . = ALIGN(512); - FILE_291200.o (.text) -} > MODULE_39 - -.MODULE.40 : AT (0x28E000) { - . = ALIGN(512); - FILE_292000.o (.text) -} > MODULE_40 - -.MODULE.41 : AT (0x28EE00) { - . = ALIGN(512); - FILE_292E00.o (.text) -} > MODULE_41 - -.MODULE.42 : AT (0x290000) { - . = ALIGN(512); - FILE_294000.o (.text) -} > MODULE_42 - -.MODULE.43 : AT (0x290A00) { - . = ALIGN(512); - FILE_294A00.o (.text) -} > MODULE_43 - -.MODULE.44 : AT (0x291400) { - . = ALIGN(512); - FILE_295400.o (.text) -} > MODULE_44 - -.MODULE.45 : AT (0x291A00) { - . = ALIGN(512); - FILE_295A00.o (.text) -} > MODULE_45 - -.MODULE.46 : AT (0x292400) { - . = ALIGN(512); - FILE_296400.o (.text) -} > MODULE_46 - -.MODULE.47 : AT (0x292800) { - . = ALIGN(512); - FILE_296800.o (.text) -} > MODULE_47 - -.MODULE.48 : AT (0x293600) { - . = ALIGN(512); - FILE_297600.o (.text) -} > MODULE_48 - -.MODULE.49 : AT (0x294000) { - . = ALIGN(512); - FILE_298000.o (.text) -} > MODULE_49 - -.MODULE.50 : AT (0x294600) { - . = ALIGN(512); - FILE_298600.o (.text) -} > MODULE_50 - -.MODULE.51 : AT (0x294A00) { - . = ALIGN(512); - FILE_298A00.o (.text) -} > MODULE_51 - -.MODULE.52 : AT (0x295A00) { - . = ALIGN(512); - FILE_299A00.o (.text) -} > MODULE_52 - -.MODULE.53 : AT (0x295E00) { - . = ALIGN(512); - FILE_299E00.o (.text) -} > MODULE_53 - -.MODULE.54 : AT (0x298400) { - . = ALIGN(512); - FILE_29C400.o (.text) -} > MODULE_54 - -.MODULE.55 : AT (0x29A800) { - . = ALIGN(512); - FILE_29E800.o (.text) -} > MODULE_55 - -.MODULE.56 : AT (0x29DA00) { - . = ALIGN(512); - FILE_2A1A00.o (.text) -} > MODULE_56 - -.MODULE.57 : AT (0x2A2200) { - . = ALIGN(512); - FILE_2A6200.o (.text) -} > MODULE_57 - -.MODULE.58 : AT (0x2A4800) { - . = ALIGN(512); - FILE_2A8800.o (.text) -} > MODULE_58 - -.MODULE.59 : AT (0x2A5E00) { - . = ALIGN(512); - FILE_2A9E00.o (.text) -} > MODULE_59 - -.MODULE.60 : AT (0x2A8C00) { - . = ALIGN(512); - FILE_2ACC00.o (.text) -} > MODULE_60 - -.MODULE.61 : AT (0x2A9A00) { - . = ALIGN(512); - FILE_2ADA00.o (.text) -} > MODULE_61 - -.MODULE.62 : AT (0x2AAC00) { - . = ALIGN(512); - FILE_2AEC00.o (.text) -} > MODULE_62 - -.MODULE.63 : AT (0x2AEA00) { - . = ALIGN(512); - FILE_2B2A00.o (.text) -} > MODULE_63 - -.MODULE.64 : AT (0x2B3600) { - . = ALIGN(512); - FILE_2B7600.o (.text) -} > MODULE_64 - -.MODULE.65 : AT (0x2B5400) { - . = ALIGN(512); - FILE_2B9400.o (.text) -} > MODULE_65 - -.MODULE.66 : AT (0x2B8400) { - . = ALIGN(512); - FILE_2BC400.o (.text) -} > MODULE_66 - -.MODULE.67 : AT (0x2BAC00) { - . = ALIGN(512); - FILE_2BEC00.o (.text) -} > MODULE_67 - -.MODULE.68 : AT (0x2BD200) { - . = ALIGN(512); - FILE_2C1200.o (.text) -} > MODULE_68 - -.MODULE.69 : AT (0x2BE800) { - . = ALIGN(512); - FILE_2C2800.o (.text) -} > MODULE_69 - -.MODULE.70 : AT (0x2C0C00) { - . = ALIGN(512); - FILE_2C4C00.o (.text) -} > MODULE_70 - -.MODULE.71 : AT (0x2C1C00) { - . = ALIGN(512); - FILE_2C5C00.o (.text) -} > MODULE_71 - -.MODULE.72 : AT (0x2C5C00) { - . = ALIGN(512); - FILE_2C9C00.o (.text) -} > MODULE_72 - -.MODULE.73 : AT (0x2C5E00) { - . = ALIGN(512); - FILE_2C9E00.o (.text) -} > MODULE_73 - -.MODULE.74 : AT (0x2CAA00) { - . = ALIGN(512); - FILE_2CEA00.o (.text) -} > MODULE_74 - -.MODULE.75 : AT (0x2CBE00) { - . = ALIGN(512); - FILE_2CFE00.o (.text) -} > MODULE_75 - -.MODULE.76 : AT (0x2D1C00) { - . = ALIGN(512); - FILE_2D5C00.o (.text) -} > MODULE_76 - -.MODULE.77 : AT (0x2D3C00) { - . = ALIGN(512); - FILE_2D7C00.o (.text) -} > MODULE_77 - -.MODULE.78 : AT (0x2D5800) { - . = ALIGN(512); - FILE_2D9800.o (.text) -} > MODULE_78 - -.MODULE.79 : AT (0x2D5E00) { - . = ALIGN(512); - FILE_2D9E00.o (.text) -} > MODULE_79 - -.MODULE.80 : AT (0x2DB200) { - . = ALIGN(512); - FILE_2DF200.o (.text) -} > MODULE_80 - -.MODULE.81 : AT (0x2E5A00) { - . = ALIGN(512); - FILE_2E9A00.o (.text) -} > MODULE_81 - -.MODULE.82 : AT (0x2EB000) { - . = ALIGN(512); - FILE_2EF000.o (.text) -} > MODULE_82 - -.MODULE.83 : AT (0x2ED600) { - . = ALIGN(512); - FILE_2F1600.o (.text) -} > MODULE_83 - -.MODULE.84 : AT (0x2FBA00) { - . = ALIGN(512); - FILE_2FFA00.o (.text) -} > MODULE_84 - -.MODULE.85 : AT (0x2FF400) { - . = ALIGN(512); - FILE_303400.o (.text) -} > MODULE_85 - -.MODULE.86 : AT (0x308600) { - . = ALIGN(512); - FILE_30C600.o (.text) -} > MODULE_86 diff --git a/arm9/overlay_table.lcf.inc b/arm9/overlay_table.lcf.inc deleted file mode 100644 index d3a29439..00000000 --- a/arm9/overlay_table.lcf.inc +++ /dev/null @@ -1,782 +0,0 @@ -WRITEW 0; -WRITEW SDK_MODULE_00_START; -WRITEW SDK_MODULE_00_SIZE; -WRITEW SDK_MODULE_00_BSSSIZE; -WRITEW SDK_MODULE_00_STATIC_INIT_START; -WRITEW SDK_MODULE_00_STATIC_INIT_END; -WRITEW 0; -WRITEW 0; - -WRITEW 1; -WRITEW SDK_MODULE_01_START; -WRITEW SDK_MODULE_01_SIZE; -WRITEW SDK_MODULE_01_BSSSIZE; -WRITEW SDK_MODULE_01_STATIC_INIT_START; -WRITEW SDK_MODULE_01_STATIC_INIT_END; -WRITEW 1; -WRITEW 0; - -WRITEW 2; -WRITEW SDK_MODULE_02_START; -WRITEW SDK_MODULE_02_SIZE; -WRITEW SDK_MODULE_02_BSSSIZE; -WRITEW SDK_MODULE_02_STATIC_INIT_START; -WRITEW SDK_MODULE_02_STATIC_INIT_END; -WRITEW 2; -WRITEW 0; - -WRITEW 3; -WRITEW SDK_MODULE_03_START; -WRITEW SDK_MODULE_03_SIZE; -WRITEW SDK_MODULE_03_BSSSIZE; -WRITEW SDK_MODULE_03_STATIC_INIT_START; -WRITEW SDK_MODULE_03_STATIC_INIT_END; -WRITEW 3; -WRITEW 0; - -WRITEW 4; -WRITEW SDK_MODULE_04_START; -WRITEW SDK_MODULE_04_SIZE; -WRITEW SDK_MODULE_04_BSSSIZE; -WRITEW SDK_MODULE_04_STATIC_INIT_START; -WRITEW SDK_MODULE_04_STATIC_INIT_END; -WRITEW 4; -WRITEW 0; - -WRITEW 5; -WRITEW SDK_MODULE_05_START; -WRITEW SDK_MODULE_05_SIZE; -WRITEW SDK_MODULE_05_BSSSIZE; -WRITEW SDK_MODULE_05_STATIC_INIT_START; -WRITEW SDK_MODULE_05_STATIC_INIT_END; -WRITEW 5; -WRITEW 0; - -WRITEW 6; -WRITEW SDK_MODULE_06_START; -WRITEW SDK_MODULE_06_SIZE; -WRITEW SDK_MODULE_06_BSSSIZE; -WRITEW SDK_MODULE_06_STATIC_INIT_START; -WRITEW SDK_MODULE_06_STATIC_INIT_END; -WRITEW 6; -WRITEW 0; - -WRITEW 7; -WRITEW SDK_MODULE_07_START; -WRITEW SDK_MODULE_07_SIZE; -WRITEW SDK_MODULE_07_BSSSIZE; -WRITEW SDK_MODULE_07_STATIC_INIT_START; -WRITEW SDK_MODULE_07_STATIC_INIT_END; -WRITEW 7; -WRITEW 0; - -WRITEW 8; -WRITEW SDK_MODULE_08_START; -WRITEW SDK_MODULE_08_SIZE; -WRITEW SDK_MODULE_08_BSSSIZE; -WRITEW SDK_MODULE_08_STATIC_INIT_START; -WRITEW SDK_MODULE_08_STATIC_INIT_END; -WRITEW 8; -WRITEW 0; - -WRITEW 9; -WRITEW SDK_MODULE_09_START; -WRITEW SDK_MODULE_09_SIZE; -WRITEW SDK_MODULE_09_BSSSIZE; -WRITEW SDK_MODULE_09_STATIC_INIT_START; -WRITEW SDK_MODULE_09_STATIC_INIT_END; -WRITEW 9; -WRITEW 0; - -WRITEW 10; -WRITEW SDK_MODULE_10_START; -WRITEW SDK_MODULE_10_SIZE; -WRITEW SDK_MODULE_10_BSSSIZE; -WRITEW SDK_MODULE_10_STATIC_INIT_START; -WRITEW SDK_MODULE_10_STATIC_INIT_END; -WRITEW 10; -WRITEW 0; - -WRITEW 11; -WRITEW SDK_MODULE_11_START; -WRITEW SDK_MODULE_11_SIZE; -WRITEW SDK_MODULE_11_BSSSIZE; -WRITEW SDK_MODULE_11_STATIC_INIT_START; -WRITEW SDK_MODULE_11_STATIC_INIT_END; -WRITEW 11; -WRITEW 0; - -WRITEW 12; -WRITEW SDK_MODULE_12_START; -WRITEW SDK_MODULE_12_SIZE; -WRITEW SDK_MODULE_12_BSSSIZE; -WRITEW SDK_MODULE_12_STATIC_INIT_START; -WRITEW SDK_MODULE_12_STATIC_INIT_END; -WRITEW 12; -WRITEW 0; - -WRITEW 13; -WRITEW SDK_MODULE_13_START; -WRITEW SDK_MODULE_13_SIZE; -WRITEW SDK_MODULE_13_BSSSIZE; -WRITEW SDK_MODULE_13_STATIC_INIT_START; -WRITEW SDK_MODULE_13_STATIC_INIT_END; -WRITEW 13; -WRITEW 0; - -WRITEW 14; -WRITEW SDK_MODULE_14_START; -WRITEW SDK_MODULE_14_SIZE; -WRITEW SDK_MODULE_14_BSSSIZE; -WRITEW SDK_MODULE_14_STATIC_INIT_START; -WRITEW SDK_MODULE_14_STATIC_INIT_END; -WRITEW 14; -WRITEW 0; - -WRITEW 15; -WRITEW SDK_MODULE_15_START; -WRITEW SDK_MODULE_15_SIZE; -WRITEW SDK_MODULE_15_BSSSIZE; -WRITEW SDK_MODULE_15_STATIC_INIT_START; -WRITEW SDK_MODULE_15_STATIC_INIT_END; -WRITEW 15; -WRITEW 0; - -WRITEW 16; -WRITEW SDK_MODULE_16_START; -WRITEW SDK_MODULE_16_SIZE; -WRITEW SDK_MODULE_16_BSSSIZE; -WRITEW SDK_MODULE_16_STATIC_INIT_START; -WRITEW SDK_MODULE_16_STATIC_INIT_END; -WRITEW 16; -WRITEW 0; - -WRITEW 17; -WRITEW SDK_MODULE_17_START; -WRITEW SDK_MODULE_17_SIZE; -WRITEW SDK_MODULE_17_BSSSIZE; -WRITEW SDK_MODULE_17_STATIC_INIT_START; -WRITEW SDK_MODULE_17_STATIC_INIT_END; -WRITEW 17; -WRITEW 0; - -WRITEW 18; -WRITEW SDK_MODULE_18_START; -WRITEW SDK_MODULE_18_SIZE; -WRITEW SDK_MODULE_18_BSSSIZE; -WRITEW SDK_MODULE_18_STATIC_INIT_START; -WRITEW SDK_MODULE_18_STATIC_INIT_END; -WRITEW 18; -WRITEW 0; - -WRITEW 19; -WRITEW SDK_MODULE_19_START; -WRITEW SDK_MODULE_19_SIZE; -WRITEW SDK_MODULE_19_BSSSIZE; -WRITEW SDK_MODULE_19_STATIC_INIT_START; -WRITEW SDK_MODULE_19_STATIC_INIT_END; -WRITEW 19; -WRITEW 0; - -WRITEW 20; -WRITEW SDK_MODULE_20_START; -WRITEW SDK_MODULE_20_SIZE; -WRITEW SDK_MODULE_20_BSSSIZE; -WRITEW SDK_MODULE_20_STATIC_INIT_START; -WRITEW SDK_MODULE_20_STATIC_INIT_END; -WRITEW 20; -WRITEW 0; - -WRITEW 21; -WRITEW SDK_MODULE_21_START; -WRITEW SDK_MODULE_21_SIZE; -WRITEW SDK_MODULE_21_BSSSIZE; -WRITEW SDK_MODULE_21_STATIC_INIT_START; -WRITEW SDK_MODULE_21_STATIC_INIT_END; -WRITEW 21; -WRITEW 0; - -WRITEW 22; -WRITEW SDK_MODULE_22_START; -WRITEW SDK_MODULE_22_SIZE; -WRITEW SDK_MODULE_22_BSSSIZE; -WRITEW SDK_MODULE_22_STATIC_INIT_START; -WRITEW SDK_MODULE_22_STATIC_INIT_END; -WRITEW 22; -WRITEW 0; - -WRITEW 23; -WRITEW SDK_MODULE_23_START; -WRITEW SDK_MODULE_23_SIZE; -WRITEW SDK_MODULE_23_BSSSIZE; -WRITEW SDK_MODULE_23_STATIC_INIT_START; -WRITEW SDK_MODULE_23_STATIC_INIT_END; -WRITEW 23; -WRITEW 0; - -WRITEW 24; -WRITEW SDK_MODULE_24_START; -WRITEW SDK_MODULE_24_SIZE; -WRITEW SDK_MODULE_24_BSSSIZE; -WRITEW SDK_MODULE_24_STATIC_INIT_START; -WRITEW SDK_MODULE_24_STATIC_INIT_END; -WRITEW 24; -WRITEW 0; - -WRITEW 25; -WRITEW SDK_MODULE_25_START; -WRITEW SDK_MODULE_25_SIZE; -WRITEW SDK_MODULE_25_BSSSIZE; -WRITEW SDK_MODULE_25_STATIC_INIT_START; -WRITEW SDK_MODULE_25_STATIC_INIT_END; -WRITEW 25; -WRITEW 0; - -WRITEW 26; -WRITEW SDK_MODULE_26_START; -WRITEW SDK_MODULE_26_SIZE; -WRITEW SDK_MODULE_26_BSSSIZE; -WRITEW SDK_MODULE_26_STATIC_INIT_START; -WRITEW SDK_MODULE_26_STATIC_INIT_END; -WRITEW 26; -WRITEW 0; - -WRITEW 27; -WRITEW SDK_MODULE_27_START; -WRITEW SDK_MODULE_27_SIZE; -WRITEW SDK_MODULE_27_BSSSIZE; -WRITEW SDK_MODULE_27_STATIC_INIT_START; -WRITEW SDK_MODULE_27_STATIC_INIT_END; -WRITEW 27; -WRITEW 0; - -WRITEW 28; -WRITEW SDK_MODULE_28_START; -WRITEW SDK_MODULE_28_SIZE; -WRITEW SDK_MODULE_28_BSSSIZE; -WRITEW SDK_MODULE_28_STATIC_INIT_START; -WRITEW SDK_MODULE_28_STATIC_INIT_END; -WRITEW 28; -WRITEW 0; - -WRITEW 29; -WRITEW SDK_MODULE_29_START; -WRITEW SDK_MODULE_29_SIZE; -WRITEW SDK_MODULE_29_BSSSIZE; -WRITEW SDK_MODULE_29_STATIC_INIT_START; -WRITEW SDK_MODULE_29_STATIC_INIT_END; -WRITEW 29; -WRITEW 0; - -WRITEW 30; -WRITEW SDK_MODULE_30_START; -WRITEW SDK_MODULE_30_SIZE; -WRITEW SDK_MODULE_30_BSSSIZE; -WRITEW SDK_MODULE_30_STATIC_INIT_START; -WRITEW SDK_MODULE_30_STATIC_INIT_END; -WRITEW 30; -WRITEW 0; - -WRITEW 31; -WRITEW SDK_MODULE_31_START; -WRITEW SDK_MODULE_31_SIZE; -WRITEW SDK_MODULE_31_BSSSIZE; -WRITEW SDK_MODULE_31_STATIC_INIT_START; -WRITEW SDK_MODULE_31_STATIC_INIT_END; -WRITEW 31; -WRITEW 0; - -WRITEW 32; -WRITEW SDK_MODULE_32_START; -WRITEW SDK_MODULE_32_SIZE; -WRITEW SDK_MODULE_32_BSSSIZE; -WRITEW SDK_MODULE_32_STATIC_INIT_START; -WRITEW SDK_MODULE_32_STATIC_INIT_END; -WRITEW 32; -WRITEW 0; - -WRITEW 33; -WRITEW SDK_MODULE_33_START; -WRITEW SDK_MODULE_33_SIZE; -WRITEW SDK_MODULE_33_BSSSIZE; -WRITEW SDK_MODULE_33_STATIC_INIT_START; -WRITEW SDK_MODULE_33_STATIC_INIT_END; -WRITEW 33; -WRITEW 0; - -WRITEW 34; -WRITEW SDK_MODULE_34_START; -WRITEW SDK_MODULE_34_SIZE; -WRITEW SDK_MODULE_34_BSSSIZE; -WRITEW SDK_MODULE_34_STATIC_INIT_START; -WRITEW SDK_MODULE_34_STATIC_INIT_END; -WRITEW 34; -WRITEW 0; - -WRITEW 35; -WRITEW SDK_MODULE_35_START; -WRITEW SDK_MODULE_35_SIZE; -WRITEW SDK_MODULE_35_BSSSIZE; -WRITEW SDK_MODULE_35_STATIC_INIT_START; -WRITEW SDK_MODULE_35_STATIC_INIT_END; -WRITEW 35; -WRITEW 0; - -WRITEW 36; -WRITEW SDK_MODULE_36_START; -WRITEW SDK_MODULE_36_SIZE; -WRITEW SDK_MODULE_36_BSSSIZE; -WRITEW SDK_MODULE_36_STATIC_INIT_START; -WRITEW SDK_MODULE_36_STATIC_INIT_END; -WRITEW 36; -WRITEW 0; - -WRITEW 37; -WRITEW SDK_MODULE_37_START; -WRITEW SDK_MODULE_37_SIZE; -WRITEW SDK_MODULE_37_BSSSIZE; -WRITEW SDK_MODULE_37_STATIC_INIT_START; -WRITEW SDK_MODULE_37_STATIC_INIT_END; -WRITEW 37; -WRITEW 0; - -WRITEW 38; -WRITEW SDK_MODULE_38_START; -WRITEW SDK_MODULE_38_SIZE; -WRITEW SDK_MODULE_38_BSSSIZE; -WRITEW SDK_MODULE_38_STATIC_INIT_START; -WRITEW SDK_MODULE_38_STATIC_INIT_END; -WRITEW 38; -WRITEW 0; - -WRITEW 39; -WRITEW SDK_MODULE_39_START; -WRITEW SDK_MODULE_39_SIZE; -WRITEW SDK_MODULE_39_BSSSIZE; -WRITEW SDK_MODULE_39_STATIC_INIT_START; -WRITEW SDK_MODULE_39_STATIC_INIT_END; -WRITEW 39; -WRITEW 0; - -WRITEW 40; -WRITEW SDK_MODULE_40_START; -WRITEW SDK_MODULE_40_SIZE; -WRITEW SDK_MODULE_40_BSSSIZE; -WRITEW SDK_MODULE_40_STATIC_INIT_START; -WRITEW SDK_MODULE_40_STATIC_INIT_END; -WRITEW 40; -WRITEW 0; - -WRITEW 41; -WRITEW SDK_MODULE_41_START; -WRITEW SDK_MODULE_41_SIZE; -WRITEW SDK_MODULE_41_BSSSIZE; -WRITEW SDK_MODULE_41_STATIC_INIT_START; -WRITEW SDK_MODULE_41_STATIC_INIT_END; -WRITEW 41; -WRITEW 0; - -WRITEW 42; -WRITEW SDK_MODULE_42_START; -WRITEW SDK_MODULE_42_SIZE; -WRITEW SDK_MODULE_42_BSSSIZE; -WRITEW SDK_MODULE_42_STATIC_INIT_START; -WRITEW SDK_MODULE_42_STATIC_INIT_END; -WRITEW 42; -WRITEW 0; - -WRITEW 43; -WRITEW SDK_MODULE_43_START; -WRITEW SDK_MODULE_43_SIZE; -WRITEW SDK_MODULE_43_BSSSIZE; -WRITEW SDK_MODULE_43_STATIC_INIT_START; -WRITEW SDK_MODULE_43_STATIC_INIT_END; -WRITEW 43; -WRITEW 0; - -WRITEW 44; -WRITEW SDK_MODULE_44_START; -WRITEW SDK_MODULE_44_SIZE; -WRITEW SDK_MODULE_44_BSSSIZE; -WRITEW SDK_MODULE_44_STATIC_INIT_START; -WRITEW SDK_MODULE_44_STATIC_INIT_END; -WRITEW 44; -WRITEW 0; - -WRITEW 45; -WRITEW SDK_MODULE_45_START; -WRITEW SDK_MODULE_45_SIZE; -WRITEW SDK_MODULE_45_BSSSIZE; -WRITEW SDK_MODULE_45_STATIC_INIT_START; -WRITEW SDK_MODULE_45_STATIC_INIT_END; -WRITEW 45; -WRITEW 0; - -WRITEW 46; -WRITEW SDK_MODULE_46_START; -WRITEW SDK_MODULE_46_SIZE; -WRITEW SDK_MODULE_46_BSSSIZE; -WRITEW SDK_MODULE_46_STATIC_INIT_START; -WRITEW SDK_MODULE_46_STATIC_INIT_END; -WRITEW 46; -WRITEW 0; - -WRITEW 47; -WRITEW SDK_MODULE_47_START; -WRITEW SDK_MODULE_47_SIZE; -WRITEW SDK_MODULE_47_BSSSIZE; -WRITEW SDK_MODULE_47_STATIC_INIT_START; -WRITEW SDK_MODULE_47_STATIC_INIT_END; -WRITEW 47; -WRITEW 0; - -WRITEW 48; -WRITEW SDK_MODULE_48_START; -WRITEW SDK_MODULE_48_SIZE; -WRITEW SDK_MODULE_48_BSSSIZE; -WRITEW SDK_MODULE_48_STATIC_INIT_START; -WRITEW SDK_MODULE_48_STATIC_INIT_END; -WRITEW 48; -WRITEW 0; - -WRITEW 49; -WRITEW SDK_MODULE_49_START; -WRITEW SDK_MODULE_49_SIZE; -WRITEW SDK_MODULE_49_BSSSIZE; -WRITEW SDK_MODULE_49_STATIC_INIT_START; -WRITEW SDK_MODULE_49_STATIC_INIT_END; -WRITEW 49; -WRITEW 0; - -WRITEW 50; -WRITEW SDK_MODULE_50_START; -WRITEW SDK_MODULE_50_SIZE; -WRITEW SDK_MODULE_50_BSSSIZE; -WRITEW SDK_MODULE_50_STATIC_INIT_START; -WRITEW SDK_MODULE_50_STATIC_INIT_END; -WRITEW 50; -WRITEW 0; - -WRITEW 51; -WRITEW SDK_MODULE_51_START; -WRITEW SDK_MODULE_51_SIZE; -WRITEW SDK_MODULE_51_BSSSIZE; -WRITEW SDK_MODULE_51_STATIC_INIT_START; -WRITEW SDK_MODULE_51_STATIC_INIT_END; -WRITEW 51; -WRITEW 0; - -WRITEW 52; -WRITEW SDK_MODULE_52_START; -WRITEW SDK_MODULE_52_SIZE; -WRITEW SDK_MODULE_52_BSSSIZE; -WRITEW SDK_MODULE_52_STATIC_INIT_START; -WRITEW SDK_MODULE_52_STATIC_INIT_END; -WRITEW 52; -WRITEW 0; - -WRITEW 53; -WRITEW SDK_MODULE_53_START; -WRITEW SDK_MODULE_53_SIZE; -WRITEW SDK_MODULE_53_BSSSIZE; -WRITEW SDK_MODULE_53_STATIC_INIT_START; -WRITEW SDK_MODULE_53_STATIC_INIT_END; -WRITEW 53; -WRITEW 0; - -WRITEW 54; -WRITEW SDK_MODULE_54_START; -WRITEW SDK_MODULE_54_SIZE; -WRITEW SDK_MODULE_54_BSSSIZE; -WRITEW SDK_MODULE_54_STATIC_INIT_START; -WRITEW SDK_MODULE_54_STATIC_INIT_END; -WRITEW 54; -WRITEW 0; - -WRITEW 55; -WRITEW SDK_MODULE_55_START; -WRITEW SDK_MODULE_55_SIZE; -WRITEW SDK_MODULE_55_BSSSIZE; -WRITEW SDK_MODULE_55_STATIC_INIT_START; -WRITEW SDK_MODULE_55_STATIC_INIT_END; -WRITEW 55; -WRITEW 0; - -WRITEW 56; -WRITEW SDK_MODULE_56_START; -WRITEW SDK_MODULE_56_SIZE; -WRITEW SDK_MODULE_56_BSSSIZE; -WRITEW SDK_MODULE_56_STATIC_INIT_START; -WRITEW SDK_MODULE_56_STATIC_INIT_END; -WRITEW 56; -WRITEW 0; - -WRITEW 57; -WRITEW SDK_MODULE_57_START; -WRITEW SDK_MODULE_57_SIZE; -WRITEW SDK_MODULE_57_BSSSIZE; -WRITEW SDK_MODULE_57_STATIC_INIT_START; -WRITEW SDK_MODULE_57_STATIC_INIT_END; -WRITEW 57; -WRITEW 0; - -WRITEW 58; -WRITEW SDK_MODULE_58_START; -WRITEW SDK_MODULE_58_SIZE; -WRITEW SDK_MODULE_58_BSSSIZE; -WRITEW SDK_MODULE_58_STATIC_INIT_START; -WRITEW SDK_MODULE_58_STATIC_INIT_END; -WRITEW 58; -WRITEW 0; - -WRITEW 59; -WRITEW SDK_MODULE_59_START; -WRITEW SDK_MODULE_59_SIZE; -WRITEW SDK_MODULE_59_BSSSIZE; -WRITEW SDK_MODULE_59_STATIC_INIT_START; -WRITEW SDK_MODULE_59_STATIC_INIT_END; -WRITEW 59; -WRITEW 0; - -WRITEW 60; -WRITEW SDK_MODULE_60_START; -WRITEW SDK_MODULE_60_SIZE; -WRITEW SDK_MODULE_60_BSSSIZE; -WRITEW SDK_MODULE_60_STATIC_INIT_START; -WRITEW SDK_MODULE_60_STATIC_INIT_END; -WRITEW 60; -WRITEW 0; - -WRITEW 61; -WRITEW SDK_MODULE_61_START; -WRITEW SDK_MODULE_61_SIZE; -WRITEW SDK_MODULE_61_BSSSIZE; -WRITEW SDK_MODULE_61_STATIC_INIT_START; -WRITEW SDK_MODULE_61_STATIC_INIT_END; -WRITEW 61; -WRITEW 0; - -WRITEW 62; -WRITEW SDK_MODULE_62_START; -WRITEW SDK_MODULE_62_SIZE; -WRITEW SDK_MODULE_62_BSSSIZE; -WRITEW SDK_MODULE_62_STATIC_INIT_START; -WRITEW SDK_MODULE_62_STATIC_INIT_END; -WRITEW 62; -WRITEW 0; - -WRITEW 63; -WRITEW SDK_MODULE_63_START; -WRITEW SDK_MODULE_63_SIZE; -WRITEW SDK_MODULE_63_BSSSIZE; -WRITEW SDK_MODULE_63_STATIC_INIT_START; -WRITEW SDK_MODULE_63_STATIC_INIT_END; -WRITEW 63; -WRITEW 0; - -WRITEW 64; -WRITEW SDK_MODULE_64_START; -WRITEW SDK_MODULE_64_SIZE; -WRITEW SDK_MODULE_64_BSSSIZE; -WRITEW SDK_MODULE_64_STATIC_INIT_START; -WRITEW SDK_MODULE_64_STATIC_INIT_END; -WRITEW 64; -WRITEW 0; - -WRITEW 65; -WRITEW SDK_MODULE_65_START; -WRITEW SDK_MODULE_65_SIZE; -WRITEW SDK_MODULE_65_BSSSIZE; -WRITEW SDK_MODULE_65_STATIC_INIT_START; -WRITEW SDK_MODULE_65_STATIC_INIT_END; -WRITEW 65; -WRITEW 0; - -WRITEW 66; -WRITEW SDK_MODULE_66_START; -WRITEW SDK_MODULE_66_SIZE; -WRITEW SDK_MODULE_66_BSSSIZE; -WRITEW SDK_MODULE_66_STATIC_INIT_START; -WRITEW SDK_MODULE_66_STATIC_INIT_END; -WRITEW 66; -WRITEW 0; - -WRITEW 67; -WRITEW SDK_MODULE_67_START; -WRITEW SDK_MODULE_67_SIZE; -WRITEW SDK_MODULE_67_BSSSIZE; -WRITEW SDK_MODULE_67_STATIC_INIT_START; -WRITEW SDK_MODULE_67_STATIC_INIT_END; -WRITEW 67; -WRITEW 0; - -WRITEW 68; -WRITEW SDK_MODULE_68_START; -WRITEW SDK_MODULE_68_SIZE; -WRITEW SDK_MODULE_68_BSSSIZE; -WRITEW SDK_MODULE_68_STATIC_INIT_START; -WRITEW SDK_MODULE_68_STATIC_INIT_END; -WRITEW 68; -WRITEW 0; - -WRITEW 69; -WRITEW SDK_MODULE_69_START; -WRITEW SDK_MODULE_69_SIZE; -WRITEW SDK_MODULE_69_BSSSIZE; -WRITEW SDK_MODULE_69_STATIC_INIT_START; -WRITEW SDK_MODULE_69_STATIC_INIT_END; -WRITEW 69; -WRITEW 0; - -WRITEW 70; -WRITEW SDK_MODULE_70_START; -WRITEW SDK_MODULE_70_SIZE; -WRITEW SDK_MODULE_70_BSSSIZE; -WRITEW SDK_MODULE_70_STATIC_INIT_START; -WRITEW SDK_MODULE_70_STATIC_INIT_END; -WRITEW 70; -WRITEW 0; - -WRITEW 71; -WRITEW SDK_MODULE_71_START; -WRITEW SDK_MODULE_71_SIZE; -WRITEW SDK_MODULE_71_BSSSIZE; -WRITEW SDK_MODULE_71_STATIC_INIT_START; -WRITEW SDK_MODULE_71_STATIC_INIT_END; -WRITEW 71; -WRITEW 0; - -WRITEW 72; -WRITEW SDK_MODULE_72_START; -WRITEW SDK_MODULE_72_SIZE; -WRITEW SDK_MODULE_72_BSSSIZE; -WRITEW SDK_MODULE_72_STATIC_INIT_START; -WRITEW SDK_MODULE_72_STATIC_INIT_END; -WRITEW 72; -WRITEW 0; - -WRITEW 73; -WRITEW SDK_MODULE_73_START; -WRITEW SDK_MODULE_73_SIZE; -WRITEW SDK_MODULE_73_BSSSIZE; -WRITEW SDK_MODULE_73_STATIC_INIT_START; -WRITEW SDK_MODULE_73_STATIC_INIT_END; -WRITEW 73; -WRITEW 0; - -WRITEW 74; -WRITEW SDK_MODULE_74_START; -WRITEW SDK_MODULE_74_SIZE; -WRITEW SDK_MODULE_74_BSSSIZE; -WRITEW SDK_MODULE_74_STATIC_INIT_START; -WRITEW SDK_MODULE_74_STATIC_INIT_END; -WRITEW 74; -WRITEW 0; - -WRITEW 75; -WRITEW SDK_MODULE_75_START; -WRITEW SDK_MODULE_75_SIZE; -WRITEW SDK_MODULE_75_BSSSIZE; -WRITEW SDK_MODULE_75_STATIC_INIT_START; -WRITEW SDK_MODULE_75_STATIC_INIT_END; -WRITEW 75; -WRITEW 0; - -WRITEW 76; -WRITEW SDK_MODULE_76_START; -WRITEW SDK_MODULE_76_SIZE; -WRITEW SDK_MODULE_76_BSSSIZE; -WRITEW SDK_MODULE_76_STATIC_INIT_START; -WRITEW SDK_MODULE_76_STATIC_INIT_END; -WRITEW 76; -WRITEW 0; - -WRITEW 77; -WRITEW SDK_MODULE_77_START; -WRITEW SDK_MODULE_77_SIZE; -WRITEW SDK_MODULE_77_BSSSIZE; -WRITEW SDK_MODULE_77_STATIC_INIT_START; -WRITEW SDK_MODULE_77_STATIC_INIT_END; -WRITEW 77; -WRITEW 0; - -WRITEW 78; -WRITEW SDK_MODULE_78_START; -WRITEW SDK_MODULE_78_SIZE; -WRITEW SDK_MODULE_78_BSSSIZE; -WRITEW SDK_MODULE_78_STATIC_INIT_START; -WRITEW SDK_MODULE_78_STATIC_INIT_END; -WRITEW 78; -WRITEW 0; - -WRITEW 79; -WRITEW SDK_MODULE_79_START; -WRITEW SDK_MODULE_79_SIZE; -WRITEW SDK_MODULE_79_BSSSIZE; -WRITEW SDK_MODULE_79_STATIC_INIT_START; -WRITEW SDK_MODULE_79_STATIC_INIT_END; -WRITEW 79; -WRITEW 0; - -WRITEW 80; -WRITEW SDK_MODULE_80_START; -WRITEW SDK_MODULE_80_SIZE; -WRITEW SDK_MODULE_80_BSSSIZE; -WRITEW SDK_MODULE_80_STATIC_INIT_START; -WRITEW SDK_MODULE_80_STATIC_INIT_END; -WRITEW 80; -WRITEW 0; - -WRITEW 81; -WRITEW SDK_MODULE_81_START; -WRITEW SDK_MODULE_81_SIZE; -WRITEW SDK_MODULE_81_BSSSIZE; -WRITEW SDK_MODULE_81_STATIC_INIT_START; -WRITEW SDK_MODULE_81_STATIC_INIT_END; -WRITEW 81; -WRITEW 0; - -WRITEW 82; -WRITEW SDK_MODULE_82_START; -WRITEW SDK_MODULE_82_SIZE; -WRITEW SDK_MODULE_82_BSSSIZE; -WRITEW SDK_MODULE_82_STATIC_INIT_START; -WRITEW SDK_MODULE_82_STATIC_INIT_END; -WRITEW 82; -WRITEW 0; - -WRITEW 83; -WRITEW SDK_MODULE_83_START; -WRITEW SDK_MODULE_83_SIZE; -WRITEW SDK_MODULE_83_BSSSIZE; -WRITEW SDK_MODULE_83_STATIC_INIT_START; -WRITEW SDK_MODULE_83_STATIC_INIT_END; -WRITEW 83; -WRITEW 0; - -WRITEW 84; -WRITEW SDK_MODULE_84_START; -WRITEW SDK_MODULE_84_SIZE; -WRITEW SDK_MODULE_84_BSSSIZE; -WRITEW SDK_MODULE_84_STATIC_INIT_START; -WRITEW SDK_MODULE_84_STATIC_INIT_END; -WRITEW 84; -WRITEW 0; - -WRITEW 85; -WRITEW SDK_MODULE_85_START; -WRITEW SDK_MODULE_85_SIZE; -WRITEW SDK_MODULE_85_BSSSIZE; -WRITEW SDK_MODULE_85_STATIC_INIT_START; -WRITEW SDK_MODULE_85_STATIC_INIT_END; -WRITEW 85; -WRITEW 0; - -WRITEW 86; -WRITEW SDK_MODULE_86_START; -WRITEW SDK_MODULE_86_SIZE; -WRITEW SDK_MODULE_86_BSSSIZE; -WRITEW SDK_MODULE_86_STATIC_INIT_START; -WRITEW SDK_MODULE_86_STATIC_INIT_END; -WRITEW 86; -WRITEW 0; -- cgit v1.2.3 From 2ff9a168c425a37f2cefda3f0d1d6f01ff212125 Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 20:20:40 -0400 Subject: Fix spaces vs tabs in arm9/arm9.lcf --- arm9/Makefile | 3 +- arm9/arm9.lcf | 344 +++++++++++++++++++++++++++++----------------------------- 2 files changed, 174 insertions(+), 173 deletions(-) diff --git a/arm9/Makefile b/arm9/Makefile index 53a868d0..a48e5acb 100644 --- a/arm9/Makefile +++ b/arm9/Makefile @@ -55,7 +55,8 @@ O_FILES := $(foreach file,$(C_FILES),$(BUILD_DIR)/$(file:.c=.o)) \ $(foreach file,$(S_FILES),$(BUILD_DIR)/$(file:.s=.o)) \ # Overlay modules -BIN_FILES := $(wildcard files/*.__AT_*) +# FIXME: lcf doesn't like this +# BIN_FILES := $(wildcard files/*.__AT_*) ##################### Compiler Options ####################### diff --git a/arm9/arm9.lcf b/arm9/arm9.lcf index 272edfca..42ce3088 100644 --- a/arm9/arm9.lcf +++ b/arm9/arm9.lcf @@ -11,92 +11,92 @@ MEMORY { .dtcm (RW) : ORIGIN=0x027E0000, LENGTH=0 .overlay (RX) : ORIGIN=0, LENGTH=0 MODULE_00 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 - MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_01 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_02 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_03 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_04 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_05 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_06 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_07 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_08 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_09 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_10 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_11 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_12 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_13 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_14 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_15 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_16 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_17 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_18 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_19 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_20 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_21 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_22 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_23 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_24 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_25 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_26 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_27 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_28 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_29 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_30 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_31 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_32 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_33 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_34 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_35 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_36 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_37 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_38 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_39 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_40 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_41 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_42 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_43 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_44 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_45 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_46 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_47 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_48 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_49 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_50 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_51 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_52 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_53 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_54 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_55 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_56 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_57 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_58 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_59 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_60 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_61 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_62 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_63 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_64 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_65 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_66 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_67 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_68 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_69 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_70 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_71 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_72 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_73 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_74 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_75 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_76 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_77 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_78 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_79 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_80 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_81 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_82 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_83 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_84 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_85 (RWX) : ORIGIN=0, LENGTH=0 + MODULE_86 (RWX) : ORIGIN=0, LENGTH=0 } SECTIONS { @@ -189,92 +189,92 @@ SECTIONS { .overlay : AT (0x107800) { OVERLAY_TABLE(SDK_MODULE_00, 0) - OVERLAY_TABLE(SDK_MODULE_01, 1) - OVERLAY_TABLE(SDK_MODULE_02, 2) - OVERLAY_TABLE(SDK_MODULE_03, 3) - OVERLAY_TABLE(SDK_MODULE_04, 4) - OVERLAY_TABLE(SDK_MODULE_05, 5) - OVERLAY_TABLE(SDK_MODULE_06, 6) - OVERLAY_TABLE(SDK_MODULE_07, 7) - OVERLAY_TABLE(SDK_MODULE_08, 8) - OVERLAY_TABLE(SDK_MODULE_09, 9) - OVERLAY_TABLE(SDK_MODULE_10, 10) - OVERLAY_TABLE(SDK_MODULE_11, 11) - OVERLAY_TABLE(SDK_MODULE_12, 12) - OVERLAY_TABLE(SDK_MODULE_13, 13) - OVERLAY_TABLE(SDK_MODULE_14, 14) - OVERLAY_TABLE(SDK_MODULE_15, 15) - OVERLAY_TABLE(SDK_MODULE_16, 16) - OVERLAY_TABLE(SDK_MODULE_17, 17) - OVERLAY_TABLE(SDK_MODULE_18, 18) - OVERLAY_TABLE(SDK_MODULE_19, 19) - OVERLAY_TABLE(SDK_MODULE_20, 20) - OVERLAY_TABLE(SDK_MODULE_21, 21) - OVERLAY_TABLE(SDK_MODULE_22, 22) - OVERLAY_TABLE(SDK_MODULE_23, 23) - OVERLAY_TABLE(SDK_MODULE_24, 24) - OVERLAY_TABLE(SDK_MODULE_25, 25) - OVERLAY_TABLE(SDK_MODULE_26, 26) - OVERLAY_TABLE(SDK_MODULE_27, 27) - OVERLAY_TABLE(SDK_MODULE_28, 28) - OVERLAY_TABLE(SDK_MODULE_29, 29) - OVERLAY_TABLE(SDK_MODULE_30, 30) - OVERLAY_TABLE(SDK_MODULE_31, 31) - OVERLAY_TABLE(SDK_MODULE_32, 32) - OVERLAY_TABLE(SDK_MODULE_33, 33) - OVERLAY_TABLE(SDK_MODULE_34, 34) - OVERLAY_TABLE(SDK_MODULE_35, 35) - OVERLAY_TABLE(SDK_MODULE_36, 36) - OVERLAY_TABLE(SDK_MODULE_37, 37) - OVERLAY_TABLE(SDK_MODULE_38, 38) - OVERLAY_TABLE(SDK_MODULE_39, 39) - OVERLAY_TABLE(SDK_MODULE_40, 40) - OVERLAY_TABLE(SDK_MODULE_41, 41) - OVERLAY_TABLE(SDK_MODULE_42, 42) - OVERLAY_TABLE(SDK_MODULE_43, 43) - OVERLAY_TABLE(SDK_MODULE_44, 44) - OVERLAY_TABLE(SDK_MODULE_45, 45) - OVERLAY_TABLE(SDK_MODULE_46, 46) - OVERLAY_TABLE(SDK_MODULE_47, 47) - OVERLAY_TABLE(SDK_MODULE_48, 48) - OVERLAY_TABLE(SDK_MODULE_49, 49) - OVERLAY_TABLE(SDK_MODULE_50, 50) - OVERLAY_TABLE(SDK_MODULE_51, 51) - OVERLAY_TABLE(SDK_MODULE_52, 52) - OVERLAY_TABLE(SDK_MODULE_53, 53) - OVERLAY_TABLE(SDK_MODULE_54, 54) - OVERLAY_TABLE(SDK_MODULE_55, 55) - OVERLAY_TABLE(SDK_MODULE_56, 56) - OVERLAY_TABLE(SDK_MODULE_57, 57) - OVERLAY_TABLE(SDK_MODULE_58, 58) - OVERLAY_TABLE(SDK_MODULE_59, 59) - OVERLAY_TABLE(SDK_MODULE_60, 60) - OVERLAY_TABLE(SDK_MODULE_61, 61) - OVERLAY_TABLE(SDK_MODULE_62, 62) - OVERLAY_TABLE(SDK_MODULE_63, 63) - OVERLAY_TABLE(SDK_MODULE_64, 64) - OVERLAY_TABLE(SDK_MODULE_65, 65) - OVERLAY_TABLE(SDK_MODULE_66, 66) - OVERLAY_TABLE(SDK_MODULE_67, 67) - OVERLAY_TABLE(SDK_MODULE_68, 68) - OVERLAY_TABLE(SDK_MODULE_69, 69) - OVERLAY_TABLE(SDK_MODULE_70, 70) - OVERLAY_TABLE(SDK_MODULE_71, 71) - OVERLAY_TABLE(SDK_MODULE_72, 72) - OVERLAY_TABLE(SDK_MODULE_73, 73) - OVERLAY_TABLE(SDK_MODULE_74, 74) - OVERLAY_TABLE(SDK_MODULE_75, 75) - OVERLAY_TABLE(SDK_MODULE_76, 76) - OVERLAY_TABLE(SDK_MODULE_77, 77) - OVERLAY_TABLE(SDK_MODULE_78, 78) - OVERLAY_TABLE(SDK_MODULE_79, 79) - OVERLAY_TABLE(SDK_MODULE_80, 80) - OVERLAY_TABLE(SDK_MODULE_81, 81) - OVERLAY_TABLE(SDK_MODULE_82, 82) - OVERLAY_TABLE(SDK_MODULE_83, 83) - OVERLAY_TABLE(SDK_MODULE_84, 84) - OVERLAY_TABLE(SDK_MODULE_85, 85) - OVERLAY_TABLE(SDK_MODULE_86, 86) + OVERLAY_TABLE(SDK_MODULE_01, 1) + OVERLAY_TABLE(SDK_MODULE_02, 2) + OVERLAY_TABLE(SDK_MODULE_03, 3) + OVERLAY_TABLE(SDK_MODULE_04, 4) + OVERLAY_TABLE(SDK_MODULE_05, 5) + OVERLAY_TABLE(SDK_MODULE_06, 6) + OVERLAY_TABLE(SDK_MODULE_07, 7) + OVERLAY_TABLE(SDK_MODULE_08, 8) + OVERLAY_TABLE(SDK_MODULE_09, 9) + OVERLAY_TABLE(SDK_MODULE_10, 10) + OVERLAY_TABLE(SDK_MODULE_11, 11) + OVERLAY_TABLE(SDK_MODULE_12, 12) + OVERLAY_TABLE(SDK_MODULE_13, 13) + OVERLAY_TABLE(SDK_MODULE_14, 14) + OVERLAY_TABLE(SDK_MODULE_15, 15) + OVERLAY_TABLE(SDK_MODULE_16, 16) + OVERLAY_TABLE(SDK_MODULE_17, 17) + OVERLAY_TABLE(SDK_MODULE_18, 18) + OVERLAY_TABLE(SDK_MODULE_19, 19) + OVERLAY_TABLE(SDK_MODULE_20, 20) + OVERLAY_TABLE(SDK_MODULE_21, 21) + OVERLAY_TABLE(SDK_MODULE_22, 22) + OVERLAY_TABLE(SDK_MODULE_23, 23) + OVERLAY_TABLE(SDK_MODULE_24, 24) + OVERLAY_TABLE(SDK_MODULE_25, 25) + OVERLAY_TABLE(SDK_MODULE_26, 26) + OVERLAY_TABLE(SDK_MODULE_27, 27) + OVERLAY_TABLE(SDK_MODULE_28, 28) + OVERLAY_TABLE(SDK_MODULE_29, 29) + OVERLAY_TABLE(SDK_MODULE_30, 30) + OVERLAY_TABLE(SDK_MODULE_31, 31) + OVERLAY_TABLE(SDK_MODULE_32, 32) + OVERLAY_TABLE(SDK_MODULE_33, 33) + OVERLAY_TABLE(SDK_MODULE_34, 34) + OVERLAY_TABLE(SDK_MODULE_35, 35) + OVERLAY_TABLE(SDK_MODULE_36, 36) + OVERLAY_TABLE(SDK_MODULE_37, 37) + OVERLAY_TABLE(SDK_MODULE_38, 38) + OVERLAY_TABLE(SDK_MODULE_39, 39) + OVERLAY_TABLE(SDK_MODULE_40, 40) + OVERLAY_TABLE(SDK_MODULE_41, 41) + OVERLAY_TABLE(SDK_MODULE_42, 42) + OVERLAY_TABLE(SDK_MODULE_43, 43) + OVERLAY_TABLE(SDK_MODULE_44, 44) + OVERLAY_TABLE(SDK_MODULE_45, 45) + OVERLAY_TABLE(SDK_MODULE_46, 46) + OVERLAY_TABLE(SDK_MODULE_47, 47) + OVERLAY_TABLE(SDK_MODULE_48, 48) + OVERLAY_TABLE(SDK_MODULE_49, 49) + OVERLAY_TABLE(SDK_MODULE_50, 50) + OVERLAY_TABLE(SDK_MODULE_51, 51) + OVERLAY_TABLE(SDK_MODULE_52, 52) + OVERLAY_TABLE(SDK_MODULE_53, 53) + OVERLAY_TABLE(SDK_MODULE_54, 54) + OVERLAY_TABLE(SDK_MODULE_55, 55) + OVERLAY_TABLE(SDK_MODULE_56, 56) + OVERLAY_TABLE(SDK_MODULE_57, 57) + OVERLAY_TABLE(SDK_MODULE_58, 58) + OVERLAY_TABLE(SDK_MODULE_59, 59) + OVERLAY_TABLE(SDK_MODULE_60, 60) + OVERLAY_TABLE(SDK_MODULE_61, 61) + OVERLAY_TABLE(SDK_MODULE_62, 62) + OVERLAY_TABLE(SDK_MODULE_63, 63) + OVERLAY_TABLE(SDK_MODULE_64, 64) + OVERLAY_TABLE(SDK_MODULE_65, 65) + OVERLAY_TABLE(SDK_MODULE_66, 66) + OVERLAY_TABLE(SDK_MODULE_67, 67) + OVERLAY_TABLE(SDK_MODULE_68, 68) + OVERLAY_TABLE(SDK_MODULE_69, 69) + OVERLAY_TABLE(SDK_MODULE_70, 70) + OVERLAY_TABLE(SDK_MODULE_71, 71) + OVERLAY_TABLE(SDK_MODULE_72, 72) + OVERLAY_TABLE(SDK_MODULE_73, 73) + OVERLAY_TABLE(SDK_MODULE_74, 74) + OVERLAY_TABLE(SDK_MODULE_75, 75) + OVERLAY_TABLE(SDK_MODULE_76, 76) + OVERLAY_TABLE(SDK_MODULE_77, 77) + OVERLAY_TABLE(SDK_MODULE_78, 78) + OVERLAY_TABLE(SDK_MODULE_79, 79) + OVERLAY_TABLE(SDK_MODULE_80, 80) + OVERLAY_TABLE(SDK_MODULE_81, 81) + OVERLAY_TABLE(SDK_MODULE_82, 82) + OVERLAY_TABLE(SDK_MODULE_83, 83) + OVERLAY_TABLE(SDK_MODULE_84, 84) + OVERLAY_TABLE(SDK_MODULE_85, 85) + OVERLAY_TABLE(SDK_MODULE_86, 86) } > .overlay OVERLAY_FILE(00, 0x108400, FILE_10C400.o) -- cgit v1.2.3 From cbed99c6efad124029a0d775da907c5f281888bf Mon Sep 17 00:00:00 2001 From: PikalaxALT Date: Sun, 26 Apr 2020 20:56:26 -0400 Subject: Fix missing closing " in FS_arm9.s --- arm9/asm/FS_arm9.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arm9/asm/FS_arm9.s b/arm9/asm/FS_arm9.s index 8fcbff7a..d9b791b8 100644 --- a/arm9/asm/FS_arm9.s +++ b/arm9/asm/FS_arm9.s @@ -1,4 +1,4 @@ - .include "asm/macros.inc + .include "asm/macros.inc" .include "global.inc" .section .text -- cgit v1.2.3 From dcb315ec000fc88d718379a31491df10b8dd1895 Mon Sep 17 00:00:00 2001 From: red031000 Date: Mon, 27 Apr 2020 20:41:32 +0100 Subject: add eol normalisation for .sha1 files because git is dumb --- .gitattributes | 1 + 1 file changed, 1 insertion(+) create mode 100644 .gitattributes diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 00000000..ce8c0f74 --- /dev/null +++ b/.gitattributes @@ -0,0 +1 @@ +*.sha1 text eol=lf \ No newline at end of file -- cgit v1.2.3 From 4bd24f94086640791952bf1e23b2655b3cfa6dcf Mon Sep 17 00:00:00 2001 From: red031000 Date: Mon, 27 Apr 2020 20:44:57 +0100 Subject: newline --- .gitattributes | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitattributes b/.gitattributes index ce8c0f74..7aba79ac 100644 --- a/.gitattributes +++ b/.gitattributes @@ -1 +1 @@ -*.sha1 text eol=lf \ No newline at end of file +*.sha1 text eol=lf -- cgit v1.2.3 From 7676cd5dce30f0ba7cdbf5bb4a80c4409e7ee544 Mon Sep 17 00:00:00 2001 From: red031000 Date: Mon, 27 Apr 2020 20:53:22 +0100 Subject: split os_alloc and os_arena --- include/nitro/os.h | 1 + include/nitro/os_alloc.c | 514 ---------------------------------------------- include/nitro/os_alloc.h | 31 +-- include/nitro/os_arena.c | 521 +++++++++++++++++++++++++++++++++++++++++++++++ include/nitro/os_arena.h | 41 ++++ 5 files changed, 564 insertions(+), 544 deletions(-) create mode 100644 include/nitro/os_arena.c create mode 100644 include/nitro/os_arena.h diff --git a/include/nitro/os.h b/include/nitro/os.h index b8843a73..591d8db0 100644 --- a/include/nitro/os.h +++ b/include/nitro/os.h @@ -8,6 +8,7 @@ #include "types.h" #include "consts.h" #include "os_protectionRegion.h" +#include "os_arena.h" #include "os_alloc.h" #include "os_system.h" diff --git a/include/nitro/os_alloc.c b/include/nitro/os_alloc.c index e6a77d15..6f76e3b1 100644 --- a/include/nitro/os_alloc.c +++ b/include/nitro/os_alloc.c @@ -5,14 +5,7 @@ #include "os_alloc.h" #include "consts.h" #include "os_system.h" -#include "os_protectionRegion.h" -extern BOOL OSi_MainExArenaEnabled; -extern BOOL OSi_Initialized; // TODO: located at 0x021d36f0 -extern u32 SDK_MAIN_ARENA_LO; // TODO: technically this should be defined in the lcf -extern u32 SDK_SECTION_ARENA_EX_START; // TODO: technically this should be defined in the lcf -extern u32 SDK_SECTION_ARENA_ITCM_START; // TODO: technically this should be defined in the lcf -extern u32 SDK_SECTION_ARENA_DTCM_START; // TODO: technically this should be defined in the lcf extern u32 OS_GetConsoleType(); extern Cell* DLInsert(Cell* list, Cell* cell); extern Cell* DLAddFront(Cell* list, Cell* cell); @@ -59,513 +52,6 @@ static Cell* DLExtract(Cell* list, Cell* cell) } #endif -#ifdef MATCH_ASM -asm void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align) { - stmdb sp!,{ r4-r6, lr } - mov r4,r0 - mov r6,r1 - mov r5,r2 - bl OS_GetArenaHi - cmp r0,#0x0 - moveq r0,#0x0 - ldmeqia sp!,{ r4-r6, lr } - bxeq lr - sub r1,r5,#0x1 - mvn r2,r1 - and r0,r0,r2 - sub r1,r0,r6 - mov r0,r4 - and r5,r1,r2 - bl OS_GetArenaLo - cmp r5,r0 - movcc r0,#0x0 - ldmccia sp!,{ r4-r6, lr } - bxcc lr - mov r0,r4 - mov r1,r5 - bl OS_SetArenaHi - mov r0,r5 - ldmia sp!,{ r4-r6, lr } - bx lr -} -#else -void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align) { - void* ptr; - u8* arenaHi; - - arenaHi = OS_GetArenaHi(id); - if (!arenaHi) { - return NULL; - } - - arenaHi = (u8 *)OSi_TRUNC(arenaHi, align); - arenaHi -= size; - arenaHi = ptr = (void *)OSi_TRUNC(arenaHi, align); - - if (arenaHi < (u8*)OS_GetArenaLo(id)) { - return NULL; - } - - OS_SetArenaHi(id, arenaHi); - - return ptr; -} -#endif - -#ifdef MATCH_ASM -asm void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align) { - stmdb sp!,{ r4-r7, lr } - sub sp,sp,#0x4 - mov r7,r0 - mov r6,r1 - mov r5,r2 - bl OS_GetArenaLo - cmp r0,#0x0 - addeq sp,sp,#0x4 - moveq r0,#0x0 - ldmeqia sp!,{ r4-r7, lr } - bxeq lr - add r0,r0,r5 - sub r1,r5,#0x1 - mvn r2,r1 - sub r0,r0,#0x1 - and r4,r2,r0 - add r0,r4,r6 - add r0,r0,r5 - sub r1,r0,#0x1 - mov r0,r7 - and r5,r2,r1 - bl OS_GetArenaHi - cmp r5,r0 - addhi sp,sp,#0x4 - movhi r0,#0x0 - ldmhiia sp!,{ r4-r7, lr } - bxhi lr - mov r0,r7 - mov r1,r5 - bl OS_SetArenaLo - mov r0,r4 - add sp,sp,#0x4 - ldmia sp!,{ r4-r7, lr } - bx lr -} -#else -void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align) { - void* ptr; - u8* arenaLo; - ptr = OS_GetArenaLo(id); - if (!ptr) { - return NULL; - } - arenaLo = ptr = (void *)OSi_ROUND(ptr, align); - arenaLo += size; - arenaLo = (u8 *)OSi_ROUND(arenaLo, align); - if (arenaLo > (u8*)OS_GetArenaHi(id)) { - return NULL; - } - OS_SetArenaLo(id, arenaLo); - - return ptr; -} -#endif - -#ifdef MATCH_ASM -asm void OS_SetArenaLo(OSArenaId id, void* newLo) { - mov r0,r0, lsl #0x2 - add r0,r0,#0x2700000 - add r0,r0,#0xff000 - str r1,[r0,#0xda0] - bx lr -} -#else -void OS_SetArenaLo(OSArenaId id, void* newLo) { - OSi_GetArenaInfo().lo[id] = newLo; -} -#endif - -#ifdef MATCH_ASM -asm void OS_SetArenaHi(OSArenaId id, void* newHi) { - mov r0,r0, lsl #0x2 - add r0,r0,#0x2700000 - add r0,r0,#0xff000 - str r1,[r0,#0xdc4] - bx lr -} -#else -void OS_SetArenaHi(OSArenaId id, void* newHi) { - OSi_GetArenaInfo().lo[id] = newHi; -} -#endif - -#ifdef MATCH_ASM -asm void* OS_GetInitArenaLo(OSArenaId id) { - stmdb sp!, {lr} - sub sp, sp, #0x4 - cmp r0, #0x6 - addls pc, pc, r0, lsl #0x2 - b _020CC3DC -_020CC330: - b _020CC34C - b _020CC3DC - b _020CC35C - b _020CC39C - b _020CC3AC - b _020CC3BC - b _020CC3CC -_020CC34C: - add sp, sp, #0x4 - ldr r0, =SDK_MAIN_ARENA_LO - ldmfd sp!, {lr} - bx lr -_020CC35C: - ldr r0, =OSi_MainExArenaEnabled - ldr r0, [r0] - cmp r0, #0x0 - beq _020CC37C - bl OS_GetConsoleType - and r0, r0, #0x3 - cmp r0, #0x1 - bne _020CC38C -_020CC37C: - add sp, sp, #0x4 - mov r0, #0x0 - ldmfd sp!, {lr} - bx lr -_020CC38C: - add sp, sp, #0x4 - ldr r0, =SDK_SECTION_ARENA_EX_START - ldmfd sp!, {lr} - bx lr -_020CC39C: - add sp, sp, #0x4 - ldr r0, =SDK_SECTION_ARENA_ITCM_START - ldmfd sp!, {lr} - bx lr -_020CC3AC: - add sp, sp, #0x4 - ldr r0, =SDK_SECTION_ARENA_DTCM_START - ldmfd sp!, {lr} - bx lr -_020CC3BC: - add sp, sp, #0x4 - ldr r0, =HW_SHARED_ARENA_LO_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC3CC: - add sp, sp, #0x4 - ldr r0, =OSi_WRAM_MAIN_ARENA_LO_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC3DC: - mov r0, #0x0 - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr -} -#else -void* OS_GetInitArenaLo(OSArenaId id) { - switch (id) { - case OS_ARENA_MAIN: - return (void *)SDK_MAIN_ARENA_LO; - case OS_ARENA_MAINEX: - if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { - return NULL; - } else { - return (void *)SDK_SECTION_ARENA_EX_START; - } - case OS_ARENA_ITCM: - return (void *)SDK_SECTION_ARENA_ITCM_START; - case OS_ARENA_DTCM: - return (void *)SDK_SECTION_ARENA_DTCM_START; - case OS_ARENA_SHARED: - return (void *)HW_SHARED_ARENA_LO_DEFAULT; - case OS_ARENA_WRAM_MAIN: - return (void *)OSi_WRAM_MAIN_ARENA_LO_DEFAULT; - default: - return NULL; - } -} -#endif - -#ifdef MATCH_ASM -asm void* OS_GetInitArenaHi(OSArenaId id) { - stmdb sp!, {lr} - sub sp, sp, #0x4 - cmp r0, #0x6 - addls pc, pc, r0, lsl #0x2 - b _020CC508 -_020CC41C: - b _020CC438 - b _020CC508 - b _020CC448 - b _020CC488 - b _020CC498 - b _020CC4E8 - b _020CC4F8 -_020CC438: - add sp, sp, #0x4 - ldr r0, =OSi_MAIN_ARENA_HI_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC448: - ldr r0, =OSi_MainExArenaEnabled - ldr r0, [r0] - cmp r0, #0x0 - beq _020CC468 - bl OS_GetConsoleType - and r0, r0, #0x3 - cmp r0, #0x1 - bne _020CC478 -_020CC468: - add sp, sp, #0x4 - mov r0, #0x0 - ldmfd sp!, {lr} - bx lr -_020CC478: - add sp, sp, #0x4 - mov r0, #OSi_MAINEX_ARENA_HI_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC488: - add sp, sp, #0x4 - mov r0, #HW_ITCM_ARENA_HI_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC498: - ldr r0, =0x027E0000 - ldr r1, =0x00000000 - ldr r2, =0x00000400 - add r3, r0, #0x3f80 - cmp r1, #0x0 - sub r2, r3, r2 - bne _020CC4CC - ldr r1, =0x027E0080 - add sp, sp, #0x4 - cmp r0, r1 - movcc r0, r1 - ldmfd sp!, {lr} - bx lr -_020CC4CC: - cmp r1, #0x0 - ldrlt r0, =0x027E0080 - add sp, sp, #0x4 - sublt r0, r0, r1 - subge r0, r2, r1 - ldmfd sp!, {lr} - bx lr -_020CC4E8: - add sp, sp, #0x4 - ldr r0, =HW_SHARED_ARENA_HI_DEFAULT - ldmfd sp!, {lr} - bx lr -_020CC4F8: - add sp, sp, #0x4 - ldr r0, =OSi_WRAM_MAIN_ARENA_HI_DEFAULT; - ldmfd sp!, {lr} - bx lr -_020CC508: - mov r0, #0x0 - add sp, sp, #0x4 - ldmia sp!, {lr} - bx lr -} -#else -void* OS_GetInitArenaHi(OSArenaId id) { - switch (id) { - case OS_ARENA_MAIN: - return (void *)OSi_MAIN_ARENA_HI_DEFAULT; - case OS_ARENA_MAINEX: - if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { - return (void *)0; - } else { - return (void *)OSi_MAINEX_ARENA_HI_DEFAULT; - } - case OS_ARENA_ITCM: - return (void *)HW_ITCM_ARENA_HI_DEFAULT; - case OS_ARENA_DTCM: - return (void *)0x027e0080; //todo pretty sure this is incorrect, no constant and doesn't match - case OS_ARENA_SHARED: - return (void *)HW_SHARED_ARENA_HI_DEFAULT; - case OS_ARENA_WRAM_MAIN: - return (void *)OSi_WRAM_MAIN_ARENA_HI_DEFAULT; - default: - return NULL; - } -} -#endif - -#ifdef MATCH_ASM -asm void* OS_GetArenaLo(OSArenaId id) { - mov r0,r0, lsl #0x2 - add r0,r0,#0x2700000 - add r0,r0,#0xff000 - ldr r0,[r0,#0xda0] - bx lr -} -#else -void* OS_GetArenaLo(OSArenaId id) { - return OSi_GetArenaInfo().lo[id]; -} -#endif - -#ifdef MATCH_ASM -asm void* OS_GetArenaHi(OSArenaId id) { - mov r0,r0, lsl #0x2 - add r0,r0,#0x2700000 - add r0,r0,#0xff000 - ldr r0,[r0,#0xdc4] - bx lr -} -#else -void* OS_GetArenaHi(OSArenaId id) { - return OSi_GetArenaInfo().hi[id]; -} -#endif - -#ifdef MATCH_ASM -asm void OS_InitArenaEx() { - stmdb sp!,{ lr } - sub sp,sp,#0x4 - mov r0,#0x2 - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x2 - bl OS_SetArenaHi - mov r0,#0x2 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x2 - bl OS_SetArenaLo - ldr r0, =OSi_MainExArenaEnabled - ldr r0,[r0,#0x0] - cmp r0,#0x0 - beq _020CC5B8 - bl OS_GetConsoleType - and r0,r0,#0x3 - cmp r0,#0x1 - addne sp,sp,#0x4 - ldmneia sp!,{ lr } - bxne lr -_020CC5B8: - ldr r0, =0x0200002b - bl OS_SetProtectionRegion1 - ldr r0, =0x023e0021 - bl OS_SetProtectionRegion2 - add sp,sp,#0x4 - ldmia sp!,{ lr } - bx lr -} -#else -void OS_InitArenaEx() { //todo figure out what compiler settings will get this to match - OS_SetArenaHi(2, OS_GetInitArenaHi(OS_ARENA_MAINEX)); - OS_SetArenaLo(2, OS_GetInitArenaLo(OS_ARENA_MAINEX)); - - if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { - OS_SetProtectionRegion(1, HW_MAIN_MEM, 4MB); - OS_SetProtectionRegion(2, HW_MAIN_MEM_MAIN_END, 128KB); - } -} -#endif - -#ifdef MATCH_ASM -asm void OS_InitArena() { - stmdb sp!,{ lr } - sub sp,sp,#0x4 - ldr r1, =OSi_Initialized - ldr r0,[r1,#0x0] - cmp r0,#0x0 - addne sp,sp,#0x4 - ldmneia sp!,{ lr } - bxne lr - mov r2,#0x1 - mov r0,#0x0 - str r2,[r1,#0x0] - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x0 - bl OS_SetArenaHi - mov r0,#0x0 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x0 - bl OS_SetArenaLo - mov r0,#0x2 - mov r1,#0x0 - bl OS_SetArenaLo - mov r0,#0x2 - mov r1,#0x0 - bl OS_SetArenaHi - mov r0,#0x3 - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x3 - bl OS_SetArenaHi - mov r0,#0x3 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x3 - bl OS_SetArenaLo - mov r0,#0x4 - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x4 - bl OS_SetArenaHi - mov r0,#0x4 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x4 - bl OS_SetArenaLo - mov r0,#0x5 - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x5 - bl OS_SetArenaHi - mov r0,#0x5 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x5 - bl OS_SetArenaLo - mov r0,#0x6 - bl OS_GetInitArenaHi - mov r1,r0 - mov r0,#0x6 - bl OS_SetArenaHi - mov r0,#0x6 - bl OS_GetInitArenaLo - mov r1,r0 - mov r0,#0x6 - bl OS_SetArenaLo - add sp,sp,#0x4 - ldmia sp!,{ lr } - bx lr -} -#else -void OS_InitArena() { - if (OSi_Initialized) { - return; - } - OSi_Initialized = TRUE; - - OS_SetArenaHi(OS_ARENA_MAIN, OS_GetInitArenaHi(OS_ARENA_MAIN)); - OS_SetArenaLo(OS_ARENA_MAIN, OS_GetInitArenaLo(OS_ARENA_MAIN)); - - OS_SetArenaLo(OS_ARENA_MAINEX, (void *)0); - OS_SetArenaHi(OS_ARENA_MAINEX, (void *)0); - - OS_SetArenaHi(OS_ARENA_ITCM, OS_GetInitArenaHi(OS_ARENA_ITCM)); - OS_SetArenaLo(OS_ARENA_ITCM, OS_GetInitArenaLo(OS_ARENA_ITCM)); - - OS_SetArenaHi(OS_ARENA_DTCM, OS_GetInitArenaHi(OS_ARENA_DTCM)); - OS_SetArenaLo(OS_ARENA_DTCM, OS_GetInitArenaLo(OS_ARENA_DTCM)); - - OS_SetArenaHi(OS_ARENA_SHARED, OS_GetInitArenaHi(OS_ARENA_SHARED)); - OS_SetArenaLo(OS_ARENA_SHARED, OS_GetInitArenaLo(OS_ARENA_SHARED)); - - OS_SetArenaHi(OS_ARENA_WRAM_MAIN, OS_GetInitArenaHi(OS_ARENA_WRAM_MAIN)); - OS_SetArenaLo(OS_ARENA_WRAM_MAIN, OS_GetInitArenaLo(OS_ARENA_WRAM_MAIN)); -} -#endif - #define HEADERSIZE OSi_ROUND(sizeof(Cell), 32) #define MINOBJSIZE (HEADERSIZE+32) diff --git a/include/nitro/os_alloc.h b/include/nitro/os_alloc.h index e3c37079..1c4b6122 100644 --- a/include/nitro/os_alloc.h +++ b/include/nitro/os_alloc.h @@ -6,26 +6,7 @@ #define POKEDIAMOND_OS_ALLOC_H #include "types.h" - -typedef enum { - OS_ARENA_MAIN = 0, - OS_ARENA_MAIN_SUBPRIV = 1, - OS_ARENA_MAINEX = 2, - OS_ARENA_ITCM = 3, - OS_ARENA_DTCM = 4, - OS_ARENA_SHARED = 5, - OS_ARENA_WRAM_MAIN = 6, - OS_ARENA_WRAM_SUB = 7, - OS_ARENA_WRAM_SUBPRIV = 8, - OS_ARENA_MAX = 9 -} OSArenaId; - -typedef struct { - void* lo[OS_ARENA_MAX]; - void* hi[OS_ARENA_MAX]; - u16 initialized; - u8 padding[2]; -} OSArenaInfo; +#include "os_arena.h" typedef int OSHeapHandle; @@ -51,16 +32,6 @@ typedef struct { HeapDesc* heapArray; } OSHeapInfo; -void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align); -void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align); -void OS_SetArenaLo(OSArenaId id, void *newLo); -void OS_SetArenaHi(OSArenaId id, void *newHi); -void* OS_GetInitArenaLo(OSArenaId id); -void* OS_GetInitArenaHi(OSArenaId id); -void* OS_GetArenaLo(OSArenaId id); -void* OS_GetArenaHi(OSArenaId id); -void OS_InitArenaEx(); -void OS_InitArena(); void OS_FreeToHeap(OSArenaId id, OSHeapHandle heap, void *ptr); void* OS_AllocFromHeap(OSArenaId id, OSHeapHandle heap, u32 size); diff --git a/include/nitro/os_arena.c b/include/nitro/os_arena.c new file mode 100644 index 00000000..4923642d --- /dev/null +++ b/include/nitro/os_arena.c @@ -0,0 +1,521 @@ +// +// Created by red031000 on 2020-04-27. +// + +#include "consts.h" +#include "os_arena.h" +#include "os_protectionRegion.h" + +extern BOOL OSi_MainExArenaEnabled; +extern BOOL OSi_Initialized; // TODO: located at 0x021d36f0 +extern u32 SDK_MAIN_ARENA_LO; // TODO: technically this should be defined in the lcf +extern u32 SDK_SECTION_ARENA_EX_START; // TODO: technically this should be defined in the lcf +extern u32 SDK_SECTION_ARENA_ITCM_START; // TODO: technically this should be defined in the lcf +extern u32 SDK_SECTION_ARENA_DTCM_START; // TODO: technically this should be defined in the lcf + +#ifdef MATCH_ASM +asm void OS_InitArena() { + stmdb sp!,{ lr } + sub sp,sp,#0x4 + ldr r1, =OSi_Initialized + ldr r0,[r1,#0x0] + cmp r0,#0x0 + addne sp,sp,#0x4 + ldmneia sp!,{ lr } + bxne lr + mov r2,#0x1 + mov r0,#0x0 + str r2,[r1,#0x0] + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x0 + bl OS_SetArenaHi + mov r0,#0x0 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x0 + bl OS_SetArenaLo + mov r0,#0x2 + mov r1,#0x0 + bl OS_SetArenaLo + mov r0,#0x2 + mov r1,#0x0 + bl OS_SetArenaHi + mov r0,#0x3 + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x3 + bl OS_SetArenaHi + mov r0,#0x3 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x3 + bl OS_SetArenaLo + mov r0,#0x4 + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x4 + bl OS_SetArenaHi + mov r0,#0x4 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x4 + bl OS_SetArenaLo + mov r0,#0x5 + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x5 + bl OS_SetArenaHi + mov r0,#0x5 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x5 + bl OS_SetArenaLo + mov r0,#0x6 + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x6 + bl OS_SetArenaHi + mov r0,#0x6 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x6 + bl OS_SetArenaLo + add sp,sp,#0x4 + ldmia sp!,{ lr } + bx lr +} +#else +void OS_InitArena() { + if (OSi_Initialized) { + return; + } + OSi_Initialized = TRUE; + + OS_SetArenaHi(OS_ARENA_MAIN, OS_GetInitArenaHi(OS_ARENA_MAIN)); + OS_SetArenaLo(OS_ARENA_MAIN, OS_GetInitArenaLo(OS_ARENA_MAIN)); + + OS_SetArenaLo(OS_ARENA_MAINEX, (void *)0); + OS_SetArenaHi(OS_ARENA_MAINEX, (void *)0); + + OS_SetArenaHi(OS_ARENA_ITCM, OS_GetInitArenaHi(OS_ARENA_ITCM)); + OS_SetArenaLo(OS_ARENA_ITCM, OS_GetInitArenaLo(OS_ARENA_ITCM)); + + OS_SetArenaHi(OS_ARENA_DTCM, OS_GetInitArenaHi(OS_ARENA_DTCM)); + OS_SetArenaLo(OS_ARENA_DTCM, OS_GetInitArenaLo(OS_ARENA_DTCM)); + + OS_SetArenaHi(OS_ARENA_SHARED, OS_GetInitArenaHi(OS_ARENA_SHARED)); + OS_SetArenaLo(OS_ARENA_SHARED, OS_GetInitArenaLo(OS_ARENA_SHARED)); + + OS_SetArenaHi(OS_ARENA_WRAM_MAIN, OS_GetInitArenaHi(OS_ARENA_WRAM_MAIN)); + OS_SetArenaLo(OS_ARENA_WRAM_MAIN, OS_GetInitArenaLo(OS_ARENA_WRAM_MAIN)); +} +#endif + +#ifdef MATCH_ASM +asm void OS_InitArenaEx() { + stmdb sp!,{ lr } + sub sp,sp,#0x4 + mov r0,#0x2 + bl OS_GetInitArenaHi + mov r1,r0 + mov r0,#0x2 + bl OS_SetArenaHi + mov r0,#0x2 + bl OS_GetInitArenaLo + mov r1,r0 + mov r0,#0x2 + bl OS_SetArenaLo + ldr r0, =OSi_MainExArenaEnabled + ldr r0,[r0,#0x0] + cmp r0,#0x0 + beq _020CC5B8 + bl OS_GetConsoleType + and r0,r0,#0x3 + cmp r0,#0x1 + addne sp,sp,#0x4 + ldmneia sp!,{ lr } + bxne lr +_020CC5B8: + ldr r0, =0x0200002b + bl OS_SetProtectionRegion1 + ldr r0, =0x023e0021 + bl OS_SetProtectionRegion2 + add sp,sp,#0x4 + ldmia sp!,{ lr } + bx lr +} +#else +void OS_InitArenaEx() { //todo figure out what compiler settings will get this to match + OS_SetArenaHi(2, OS_GetInitArenaHi(OS_ARENA_MAINEX)); + OS_SetArenaLo(2, OS_GetInitArenaLo(OS_ARENA_MAINEX)); + + if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { + OS_SetProtectionRegion(1, HW_MAIN_MEM, 4MB); + OS_SetProtectionRegion(2, HW_MAIN_MEM_MAIN_END, 128KB); + } +} +#endif + +#ifdef MATCH_ASM +asm void* OS_GetArenaHi(OSArenaId id) { + mov r0,r0, lsl #0x2 + add r0,r0,#0x2700000 + add r0,r0,#0xff000 + ldr r0,[r0,#0xdc4] + bx lr +} +#else +void* OS_GetArenaHi(OSArenaId id) { + return OSi_GetArenaInfo().hi[id]; +} +#endif + +#ifdef MATCH_ASM +asm void* OS_GetArenaLo(OSArenaId id) { + mov r0,r0, lsl #0x2 + add r0,r0,#0x2700000 + add r0,r0,#0xff000 + ldr r0,[r0,#0xda0] + bx lr +} +#else +void* OS_GetArenaLo(OSArenaId id) { + return OSi_GetArenaInfo().lo[id]; +} +#endif + +#ifdef MATCH_ASM +asm void* OS_GetInitArenaHi(OSArenaId id) { + stmdb sp!, {lr} + sub sp, sp, #0x4 + cmp r0, #0x6 + addls pc, pc, r0, lsl #0x2 + b _020CC508 +_020CC41C: + b _020CC438 + b _020CC508 + b _020CC448 + b _020CC488 + b _020CC498 + b _020CC4E8 + b _020CC4F8 +_020CC438: + add sp, sp, #0x4 + ldr r0, =OSi_MAIN_ARENA_HI_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC448: + ldr r0, =OSi_MainExArenaEnabled + ldr r0, [r0] + cmp r0, #0x0 + beq _020CC468 + bl OS_GetConsoleType + and r0, r0, #0x3 + cmp r0, #0x1 + bne _020CC478 +_020CC468: + add sp, sp, #0x4 + mov r0, #0x0 + ldmfd sp!, {lr} + bx lr +_020CC478: + add sp, sp, #0x4 + mov r0, #OSi_MAINEX_ARENA_HI_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC488: + add sp, sp, #0x4 + mov r0, #HW_ITCM_ARENA_HI_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC498: + ldr r0, =0x027E0000 + ldr r1, =0x00000000 + ldr r2, =0x00000400 + add r3, r0, #0x3f80 + cmp r1, #0x0 + sub r2, r3, r2 + bne _020CC4CC + ldr r1, =0x027E0080 + add sp, sp, #0x4 + cmp r0, r1 + movcc r0, r1 + ldmfd sp!, {lr} + bx lr +_020CC4CC: + cmp r1, #0x0 + ldrlt r0, =0x027E0080 + add sp, sp, #0x4 + sublt r0, r0, r1 + subge r0, r2, r1 + ldmfd sp!, {lr} + bx lr +_020CC4E8: + add sp, sp, #0x4 + ldr r0, =HW_SHARED_ARENA_HI_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC4F8: + add sp, sp, #0x4 + ldr r0, =OSi_WRAM_MAIN_ARENA_HI_DEFAULT; + ldmfd sp!, {lr} + bx lr +_020CC508: + mov r0, #0x0 + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr +} +#else +void* OS_GetInitArenaHi(OSArenaId id) { + switch (id) { + case OS_ARENA_MAIN: + return (void *)OSi_MAIN_ARENA_HI_DEFAULT; + case OS_ARENA_MAINEX: + if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { + return (void *)0; + } else { + return (void *)OSi_MAINEX_ARENA_HI_DEFAULT; + } + case OS_ARENA_ITCM: + return (void *)HW_ITCM_ARENA_HI_DEFAULT; + case OS_ARENA_DTCM: + return (void *)0x027e0080; //todo pretty sure this is incorrect, no constant and doesn't match + case OS_ARENA_SHARED: + return (void *)HW_SHARED_ARENA_HI_DEFAULT; + case OS_ARENA_WRAM_MAIN: + return (void *)OSi_WRAM_MAIN_ARENA_HI_DEFAULT; + default: + return NULL; + } +} +#endif + +#ifdef MATCH_ASM +asm void* OS_GetInitArenaLo(OSArenaId id) { + stmdb sp!, {lr} + sub sp, sp, #0x4 + cmp r0, #0x6 + addls pc, pc, r0, lsl #0x2 + b _020CC3DC +_020CC330: + b _020CC34C + b _020CC3DC + b _020CC35C + b _020CC39C + b _020CC3AC + b _020CC3BC + b _020CC3CC +_020CC34C: + add sp, sp, #0x4 + ldr r0, =SDK_MAIN_ARENA_LO + ldmfd sp!, {lr} + bx lr +_020CC35C: + ldr r0, =OSi_MainExArenaEnabled + ldr r0, [r0] + cmp r0, #0x0 + beq _020CC37C + bl OS_GetConsoleType + and r0, r0, #0x3 + cmp r0, #0x1 + bne _020CC38C +_020CC37C: + add sp, sp, #0x4 + mov r0, #0x0 + ldmfd sp!, {lr} + bx lr +_020CC38C: + add sp, sp, #0x4 + ldr r0, =SDK_SECTION_ARENA_EX_START + ldmfd sp!, {lr} + bx lr +_020CC39C: + add sp, sp, #0x4 + ldr r0, =SDK_SECTION_ARENA_ITCM_START + ldmfd sp!, {lr} + bx lr +_020CC3AC: + add sp, sp, #0x4 + ldr r0, =SDK_SECTION_ARENA_DTCM_START + ldmfd sp!, {lr} + bx lr +_020CC3BC: + add sp, sp, #0x4 + ldr r0, =HW_SHARED_ARENA_LO_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC3CC: + add sp, sp, #0x4 + ldr r0, =OSi_WRAM_MAIN_ARENA_LO_DEFAULT + ldmfd sp!, {lr} + bx lr +_020CC3DC: + mov r0, #0x0 + add sp, sp, #0x4 + ldmia sp!, {lr} + bx lr +} +#else +void* OS_GetInitArenaLo(OSArenaId id) { + switch (id) { + case OS_ARENA_MAIN: + return (void *)SDK_MAIN_ARENA_LO; + case OS_ARENA_MAINEX: + if (!OSi_MainExArenaEnabled || (OS_GetConsoleType() & OS_CONSOLE_SIZE_MASK) == OS_CONSOLE_SIZE_4MB) { + return NULL; + } else { + return (void *)SDK_SECTION_ARENA_EX_START; + } + case OS_ARENA_ITCM: + return (void *)SDK_SECTION_ARENA_ITCM_START; + case OS_ARENA_DTCM: + return (void *)SDK_SECTION_ARENA_DTCM_START; + case OS_ARENA_SHARED: + return (void *)HW_SHARED_ARENA_LO_DEFAULT; + case OS_ARENA_WRAM_MAIN: + return (void *)OSi_WRAM_MAIN_ARENA_LO_DEFAULT; + default: + return NULL; + } +} +#endif + +#ifdef MATCH_ASM +asm void OS_SetArenaHi(OSArenaId id, void* newHi) { + mov r0,r0, lsl #0x2 + add r0,r0,#0x2700000 + add r0,r0,#0xff000 + str r1,[r0,#0xdc4] + bx lr +} +#else +void OS_SetArenaHi(OSArenaId id, void* newHi) { + OSi_GetArenaInfo().lo[id] = newHi; +} +#endif + +#ifdef MATCH_ASM +asm void OS_SetArenaLo(OSArenaId id, void* newLo) { + mov r0,r0, lsl #0x2 + add r0,r0,#0x2700000 + add r0,r0,#0xff000 + str r1,[r0,#0xda0] + bx lr +} +#else +void OS_SetArenaLo(OSArenaId id, void* newLo) { + OSi_GetArenaInfo().lo[id] = newLo; +} +#endif + +#ifdef MATCH_ASM +asm void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align) { + stmdb sp!,{ r4-r7, lr } + sub sp,sp,#0x4 + mov r7,r0 + mov r6,r1 + mov r5,r2 + bl OS_GetArenaLo + cmp r0,#0x0 + addeq sp,sp,#0x4 + moveq r0,#0x0 + ldmeqia sp!,{ r4-r7, lr } + bxeq lr + add r0,r0,r5 + sub r1,r5,#0x1 + mvn r2,r1 + sub r0,r0,#0x1 + and r4,r2,r0 + add r0,r4,r6 + add r0,r0,r5 + sub r1,r0,#0x1 + mov r0,r7 + and r5,r2,r1 + bl OS_GetArenaHi + cmp r5,r0 + addhi sp,sp,#0x4 + movhi r0,#0x0 + ldmhiia sp!,{ r4-r7, lr } + bxhi lr + mov r0,r7 + mov r1,r5 + bl OS_SetArenaLo + mov r0,r4 + add sp,sp,#0x4 + ldmia sp!,{ r4-r7, lr } + bx lr +} +#else +void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align) { + void* ptr; + u8* arenaLo; + ptr = OS_GetArenaLo(id); + if (!ptr) { + return NULL; + } + arenaLo = ptr = (void *)OSi_ROUND(ptr, align); + arenaLo += size; + arenaLo = (u8 *)OSi_ROUND(arenaLo, align); + if (arenaLo > (u8*)OS_GetArenaHi(id)) { + return NULL; + } + OS_SetArenaLo(id, arenaLo); + + return ptr; +} +#endif + +#ifdef MATCH_ASM +asm void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align) { + stmdb sp!,{ r4-r6, lr } + mov r4,r0 + mov r6,r1 + mov r5,r2 + bl OS_GetArenaHi + cmp r0,#0x0 + moveq r0,#0x0 + ldmeqia sp!,{ r4-r6, lr } + bxeq lr + sub r1,r5,#0x1 + mvn r2,r1 + and r0,r0,r2 + sub r1,r0,r6 + mov r0,r4 + and r5,r1,r2 + bl OS_GetArenaLo + cmp r5,r0 + movcc r0,#0x0 + ldmccia sp!,{ r4-r6, lr } + bxcc lr + mov r0,r4 + mov r1,r5 + bl OS_SetArenaHi + mov r0,r5 + ldmia sp!,{ r4-r6, lr } + bx lr +} +#else +void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align) { + void* ptr; + u8* arenaHi; + + arenaHi = OS_GetArenaHi(id); + if (!arenaHi) { + return NULL; + } + + arenaHi = (u8 *)OSi_TRUNC(arenaHi, align); + arenaHi -= size; + arenaHi = ptr = (void *)OSi_TRUNC(arenaHi, align); + + if (arenaHi < (u8*)OS_GetArenaLo(id)) { + return NULL; + } + + OS_SetArenaHi(id, arenaHi); + + return ptr; +} +#endif \ No newline at end of file diff --git a/include/nitro/os_arena.h b/include/nitro/os_arena.h new file mode 100644 index 00000000..f1893a3d --- /dev/null +++ b/include/nitro/os_arena.h @@ -0,0 +1,41 @@ +// +// Created by red031000 on 2020-04-27. +// + +#ifndef POKEDIAMOND_OS_ARENA_H +#define POKEDIAMOND_OS_ARENA_H + +#include "types.h" + +typedef enum { + OS_ARENA_MAIN = 0, + OS_ARENA_MAIN_SUBPRIV = 1, + OS_ARENA_MAINEX = 2, + OS_ARENA_ITCM = 3, + OS_ARENA_DTCM = 4, + OS_ARENA_SHARED = 5, + OS_ARENA_WRAM_MAIN = 6, + OS_ARENA_WRAM_SUB = 7, + OS_ARENA_WRAM_SUBPRIV = 8, + OS_ARENA_MAX = 9 +} OSArenaId; + +typedef struct { + void* lo[OS_ARENA_MAX]; + void* hi[OS_ARENA_MAX]; + u16 initialized; + u8 padding[2]; +} OSArenaInfo; + +void OS_InitArena(); +void OS_InitArenaEx(); +void* OS_GetArenaHi(OSArenaId id); +void* OS_GetArenaLo(OSArenaId id); +void* OS_GetInitArenaHi(OSArenaId id); +void* OS_GetInitArenaLo(OSArenaId id); +void OS_SetArenaHi(OSArenaId id, void *newHi); +void OS_SetArenaLo(OSArenaId id, void *newLo); +void* OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align); +void* OS_AllocFromArenaHi(OSArenaId id, u32 size, u32 align); + +#endif //POKEDIAMOND_OS_ARENA_H -- cgit v1.2.3