From d612c41066844fc82edaaea6bc946adbcc71a3d9 Mon Sep 17 00:00:00 2001
From: PikalaxALT <pikalaxalt@gmail.com>
Date: Mon, 31 May 2021 12:14:52 -0400
Subject: Better docs of gx, error_message_reset, etc

---
 arm9/lib/include/GX_ioreg.h      | 67 ++++++++++++++++++++++++++++++++++++++++
 arm9/lib/include/OS_irqHandler.h |  2 +-
 arm9/lib/include/gx.h            | 23 ++++++++------
 3 files changed, 82 insertions(+), 10 deletions(-)

(limited to 'arm9/lib/include')

diff --git a/arm9/lib/include/GX_ioreg.h b/arm9/lib/include/GX_ioreg.h
index 81055b0a..bfdc370a 100644
--- a/arm9/lib/include/GX_ioreg.h
+++ b/arm9/lib/include/GX_ioreg.h
@@ -81,4 +81,71 @@
 #define REG_GX_DISPCNT_EXOBJ_BM_SIZE                       1
 #define REG_GX_DISPCNT_EXOBJ_BM_MASK                       0x00400000
 
+// DISPSTAT
+#define REG_GX_DISPSTAT_VCOUNTER_SHIFT                     7
+#define REG_GX_DISPSTAT_VCOUNTER_SIZE                      9
+#define REG_GX_DISPSTAT_VCOUNTER_MASK                      0xff80
+
+#define REG_GX_DISPSTAT_VQI_SHIFT                          5
+#define REG_GX_DISPSTAT_VQI_SIZE                           1
+#define REG_GX_DISPSTAT_VQI_MASK                           0x0020
+
+#define REG_GX_DISPSTAT_HBI_SHIFT                          4
+#define REG_GX_DISPSTAT_HBI_SIZE                           1
+#define REG_GX_DISPSTAT_HBI_MASK                           0x0010
+
+#define REG_GX_DISPSTAT_VBI_SHIFT                          3
+#define REG_GX_DISPSTAT_VBI_SIZE                           1
+#define REG_GX_DISPSTAT_VBI_MASK                           0x0008
+
+#define REG_GX_DISPSTAT_LYC_SHIFT                          2
+#define REG_GX_DISPSTAT_LYC_SIZE                           1
+#define REG_GX_DISPSTAT_LYC_MASK                           0x0004
+
+#define REG_GX_DISPSTAT_HBLK_SHIFT                         1
+#define REG_GX_DISPSTAT_HBLK_SIZE                          1
+#define REG_GX_DISPSTAT_HBLK_MASK                          0x0002
+
+#define REG_GX_DISPSTAT_VBLK_SHIFT                         0
+#define REG_GX_DISPSTAT_VBLK_SIZE                          1
+#define REG_GX_DISPSTAT_VBLK_MASK                          0x0001
+
+// POWCNT
+#define REG_GX_POWCNT_GE_SHIFT                             3
+#define REG_GX_POWCNT_GE_SIZE                              1
+#define REG_GX_POWCNT_GE_MASK                              0x0008
+
+#define REG_GX_POWCNT_RE_SHIFT                             2
+#define REG_GX_POWCNT_RE_SIZE                              1
+#define REG_GX_POWCNT_RE_MASK                              0x0004
+
+#define REG_GX_POWCNT_E2DG_SHIFT                           1
+#define REG_GX_POWCNT_E2DG_SIZE                            1
+#define REG_GX_POWCNT_E2DG_MASK                            0x0002
+
+#define REG_GX_POWCNT_LCD_SHIFT                            0
+#define REG_GX_POWCNT_LCD_SIZE                             1
+#define REG_GX_POWCNT_LCD_MASK                             0x0001
+
+#define REG_GX_POWCNT_LCDB_SHIFT                           8
+#define REG_GX_POWCNT_LCDB_SIZE                            1
+#define REG_GX_POWCNT_LCDB_MASK                            0x0100
+
+#define REG_GX_POWCNT_E2DGB_SHIFT                          9
+#define REG_GX_POWCNT_E2DGB_SIZE                           1
+#define REG_GX_POWCNT_E2DGB_MASK                           0x0200
+
+#define REG_GX_POWCNT_DSEL_SHIFT                           15
+#define REG_GX_POWCNT_DSEL_SIZE                            1
+#define REG_GX_POWCNT_DSEL_MASK                            0x8000
+
+// MASTER BRIGHT
+#define REG_GX_MASTER_BRIGHT_E_MOD_SHIFT                   14
+#define REG_GX_MASTER_BRIGHT_E_MOD_SIZE                    2
+#define REG_GX_MASTER_BRIGHT_E_MOD_MASK                    0xc000
+
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SHIFT                 0
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SIZE                  5
+#define REG_GX_MASTER_BRIGHT_E_VALUE_MASK                  0x001f
+
 #endif //NITRO_GX_IOREG_H
diff --git a/arm9/lib/include/OS_irqHandler.h b/arm9/lib/include/OS_irqHandler.h
index f052016d..ea12a0ad 100644
--- a/arm9/lib/include/OS_irqHandler.h
+++ b/arm9/lib/include/OS_irqHandler.h
@@ -16,6 +16,6 @@ static inline OSIrqMask OS_GetIrqCheckFlag(void)
 
 void OS_IrqHandler(void);
 void OS_IrqHandler_ThreadSwitch(void);
-void OS_WaitIrq(BOOL param1, u32 param2);
+void OS_WaitIrq(BOOL clear, OSIrqMask irqFlags);
 
 #endif //POKEDIAMOND_OS_IRQHANDLER_H
diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h
index 210d61f4..d73b4f53 100644
--- a/arm9/lib/include/gx.h
+++ b/arm9/lib/include/gx.h
@@ -27,15 +27,6 @@ void GXi_NopClearFifo128_(void *);
 #include "GX_g3imm.h"
 #include "GX_dma.h"
 
-void GX_Init();
-u32 GX_HBlankIntr(u32 enable);
-u32 GX_VBlankIntr(u32 enable);
-void GX_DispOff();
-void GX_DispOn();
-void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3);
-void GXS_SetGraphicsMode(u32 mode);
-void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness);
-
 typedef union
 {
     u32     raw;
@@ -181,4 +172,18 @@ typedef enum
 }
     GXOBJVRamModeChar;
 
+void GX_Init();
+u32 GX_HBlankIntr(u32 enable);
+u32 GX_VBlankIntr(u32 enable);
+void GX_DispOff();
+void GX_DispOn();
+void GX_SetGraphicsMode(GXDispMode dispMode, GXBGMode bgMode, GXBG0As bg0_2d3d);
+void GXS_SetGraphicsMode(GXBGMode mode);
+void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness);
+
+static inline void GX_SetMasterBrightness(int brightness)
+{
+    GXx_SetMasterBrightness_(&reg_GX_MASTER_BRIGHT, brightness);
+}
+
 #endif //GUARD_GX_H
-- 
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