From 3f833281144c32ab7452639c060fd4fb01c8d63f Mon Sep 17 00:00:00 2001 From: Made Date: Wed, 6 May 2020 02:02:35 +0200 Subject: Decompile GX_asm and GX_g3 --- arm9/lib/src/GX_asm.c | 16 ++++++++++++++++ arm9/lib/src/GX_g3.c | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 arm9/lib/src/GX_asm.c create mode 100644 arm9/lib/src/GX_g3.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_asm.c b/arm9/lib/src/GX_asm.c new file mode 100644 index 00000000..1eb0a011 --- /dev/null +++ b/arm9/lib/src/GX_asm.c @@ -0,0 +1,16 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +//looks like asm and says asm on the tin... +ARM_FUNC asm void GX_SendFifo48B(void *src, void *dst){ + ldmia r0!, {r2-r3,r12} + stmia r1, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + stmia r1, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + stmia r1, {r2-r3,r12} + ldmia r0!, {r2-r3,r12} + stmia r1, {r2-r3,r12} + bx lr +} diff --git a/arm9/lib/src/GX_g3.c b/arm9/lib/src/GX_g3.c new file mode 100644 index 00000000..66e34dc7 --- /dev/null +++ b/arm9/lib/src/GX_g3.c @@ -0,0 +1,36 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + + +void G3_BeginMakeDL(struct DL *displaylist, void *r1, u32 r2){ + displaylist->var0C = r2; + displaylist->var08 = r1; + displaylist->var00 = r1; + displaylist->var04 = (u32 *)r1 + 1; + displaylist->var10 = 0x0; +} + +s32 G3_EndMakeDL(struct DL *displaylist){ + if (displaylist->var08 == displaylist->var00) + return 0; + //pads the buffer with 0 to 4byte alignment if needed + switch((u32)displaylist->var00 & 0x3) + { + case 0: + return displaylist->var00 - displaylist->var08; + case 1: + *displaylist->var00++ = 0x0; + case 2: + *displaylist->var00++ = 0x0; + case 3: + *displaylist->var00++ = 0x0; + } + if (displaylist->var10) + { + *displaylist->var04++ = 0x0; + displaylist->var10 = 0x0; + } + displaylist->var00 = (u8 *)displaylist->var04; + return displaylist->var00 - displaylist->var08; +} -- cgit v1.2.3 From 6d3d11491cf6e8289822d2c5ba9cd7e309a5ce11 Mon Sep 17 00:00:00 2001 From: Made Date: Wed, 6 May 2020 23:41:54 +0200 Subject: Decompile GX_g3b.s and GX_g3x.s --- arm9/lib/src/GX_g3b.c | 122 +++++++++++++++++++++++++ arm9/lib/src/GX_g3x.c | 242 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 364 insertions(+) create mode 100644 arm9/lib/src/GX_g3b.c create mode 100644 arm9/lib/src/GX_g3x.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_g3b.c b/arm9/lib/src/GX_g3b.c new file mode 100644 index 00000000..1e25adb5 --- /dev/null +++ b/arm9/lib/src/GX_g3b.c @@ -0,0 +1,122 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + + +void MI_Copy64B(void *src, void *dst); + +void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ + *(u32 *)displaylist->var00 = 0x16; + MI_Copy64B(mtx, displaylist->var04); +} + +void G3B_PushMtx(struct DL *displaylist){ + *(u32 *)displaylist->var00 = 0x11; + displaylist->var00 = (u8 *)displaylist->var04; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_PopMtx(struct DL *displaylist, void *mtx){ + *(u32 *)displaylist->var00 = 0x12; + *displaylist->var04 = (u32)mtx; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ + G3BS_LoadMtx44(displaylist, mtx); + displaylist->var00 = (u8 *)displaylist->var04 + sizeof(struct Mtx44); + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +//color format is RGB555, stored in the lower bits +void G3B_Color(struct DL * displaylist, u32 vtx_col){ + *(u32 *)displaylist->var00 = 0x20; + *displaylist->var04 = vtx_col; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +/* +Only feed normalized Vectors +only the fractional part and the sign, which is in the first nonfraction bit +since the vector is assumed to be normalized, are used +*/ +void G3B_Normal(struct DL * displaylist, fx16 x, fx16 y, fx16 z){ + *(u32 *)displaylist->var00 = 0x21; + *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) ; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_Vtx(struct DL * displaylist, fx32 x, fx32 y, fx32 z){ + *(u32 *)displaylist->var00 = 0x23; + displaylist->var04[0] = (u32)(u16)x | (u32)(u16)y << 0x10; + displaylist->var04[1] = (u32)(u16)z; + displaylist->var00 = (u8 *)displaylist->var04 + 0x8; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +//TODO: name arguments +void G3B_PolygonAttr(struct DL *displaylist, u32 r1, u32 r2, u32 r3, u32 r4, u32 r5, u32 r6){ + *(u32 *)displaylist->var00 = 0x29; + *displaylist->var04 = r1 | r2 << 0x4 | r3 << 0x6 | r6 | r4 << 0x18 | r5 << 0x10; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_MaterialColorDiffAmb(struct DL *displaylist, u32 diffuse_col, u32 ambient_col, u32 replace){ + *(u32 *)displaylist->var00 = 0x30; + u32 replace_vtx_color_with_diffuse; + if (replace) + replace_vtx_color_with_diffuse = TRUE; + else + replace_vtx_color_with_diffuse = FALSE; + *displaylist->var04 = diffuse_col | ambient_col << 0x10 | replace_vtx_color_with_diffuse << 0xF; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_MaterialColorSpecEmi(struct DL *displaylist, u32 specular_col, u32 emission_col, u32 shiny_table){ + *(u32 *)displaylist->var00 = 0x31; + u32 enable_shininess_table; + if (shiny_table) + enable_shininess_table = TRUE; + else + enable_shininess_table = FALSE; + *displaylist->var04 = specular_col | emission_col << 0x10 | enable_shininess_table << 0xF; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +/* +Only feed normalized Vectors +only the fractional part and the sign, which is in the first nonfraction bit +since the vector is assumed to be normalized, are used +*/ +void G3B_LightVector(struct DL * displaylist, u32 light_num, fx16 x, fx16 y, fx16 z){ + *(u32 *)displaylist->var00 = 0x32; + *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) | light_num << 0x1E; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_LightColor(struct DL * displaylist, u32 light_num, u32 col){ + *(u32 *)displaylist->var00 = 0x33; + *displaylist->var04 = col | light_num << 0x1E; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_Begin(struct DL * displaylist, u32 type){ + *(u32 *)displaylist->var00 = 0x40; + *displaylist->var04 = type; + displaylist->var00 = (u8 *)displaylist->var04 + 0x4; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} + +void G3B_End(struct DL * displaylist){ + *(u32 *)displaylist->var00 = 0x41; + displaylist->var00 = (u8 *)displaylist->var04; + displaylist->var04 = (u32 *)displaylist->var00 + 1; +} diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c new file mode 100644 index 00000000..f9c2adb7 --- /dev/null +++ b/arm9/lib/src/GX_g3x.c @@ -0,0 +1,242 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern u32 gUnk02106814; +void MI_Copy64B(void *, void *); +void MIi_CpuCopy16(void *, void *, u32); +void GXi_NopClearFifo128_(void *); +void MI_Copy16B(void *, void *); +void MI_DmaFill32Async(u32, void *, u32, u32, u32, u32); +void MI_DmaFill32(u32, void *, u32, u32); +void MIi_CpuClear32(u32, void *, u32); + +asm void GXi_NopClearFifo128_(void *reg){ + mov r1, #0x0 + mov r2, #0x0 + mov r3, #0x0 + mov r12, #0x0 + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + stmia r0, {r1-r3,r12} + bx lr +} + +void G3X_Init(){ + G3X_ClearFifo(); + SETREG32(HW_REG_END_VTXS, 0x0); + while (READREG32(HW_REG_GXSTAT) & 0x8000000); //wait for geometry engine to not be busy + SETREG16(HW_REG_DISP3DCNT, 0x0); + SETREG32(HW_REG_GXSTAT, 0x0); + SETREG32(HW_REG_BG0HOFS, 0x0); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x2000); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x1000); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x3002); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x3000 | 0x10); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & (u16)~0x3004); + SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) & ~0xC0000000 | 0x80000000); + G3X_InitMtxStack(); + SETREG32(HW_REG_CLEAR_COLOR, 0x0); + SETREG16(HW_REG_CLEAR_DEPTH, 0x7FFF); + SETREG16(HW_REG_CLRIMAGE_OFFSET, 0x0); + SETREG32(HW_REG_FOG_COLOR, 0x0); + SETREG16(HW_REG_FOG_OFFSET, 0x0); + SETREG16(HW_REG_BG0CNT, READREG16(HW_REG_BG0CNT) & ~0x3); + G3X_InitTable(); + SETREG32(HW_REG_POLYGON_ATTR, 0x1F0080); + SETREG32(HW_REG_TEXIMAGE_PARAM, 0x0); + SETREG32(HW_REG_PLTT_BASE, 0x0); +} + +void G3X_ResetMtxStack(){ + while (READREG32(HW_REG_GXSTAT) & 0x8000000); + SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x2000); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x1000); + G3X_ResetMtxStack_2(); + SETREG32(HW_REG_POLYGON_ATTR, 0x1F0080); + SETREG32(HW_REG_TEXIMAGE_PARAM, 0x0); + SETREG32(HW_REG_PLTT_BASE, 0x0); +} + +void G3X_ClearFifo(){ + GXi_NopClearFifo128_((void *)HW_REG_GXFIFO); + while (READREG32(HW_REG_GXSTAT) & 0x8000000); +} + +void G3X_InitMtxStack(){ + u32 PV_level, PJ_level; + SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + while (G3X_GetMtxStackLevelPV(&PV_level)); + while (G3X_GetMtxStackLevelPJ(&PJ_level)); + SETREG32(HW_REG_MTX_MODE, 0x3); + SETREG32(HW_REG_MTX_IDENTITY, 0x0); + SETREG32(HW_REG_MTX_MODE, 0x0); + if (PJ_level) + { + SETREG32(HW_REG_MTX_POP, PJ_level); + } + SETREG32(HW_REG_MTX_IDENTITY, 0x0); + SETREG32(HW_REG_MTX_MODE, 0x2); + SETREG32(HW_REG_MTX_POP, PV_level); + SETREG32(HW_REG_MTX_IDENTITY, 0x0); +} + +void G3X_ResetMtxStack_2(){ + u32 PV_level, PJ_level; + SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + while (G3X_GetMtxStackLevelPV(&PV_level)); + while (G3X_GetMtxStackLevelPJ(&PJ_level)); + SETREG32(HW_REG_MTX_MODE, 0x3); + SETREG32(HW_REG_MTX_IDENTITY, 0x0); + SETREG32(HW_REG_MTX_MODE, 0x0); + if (PJ_level) + { + SETREG32(HW_REG_MTX_POP, PJ_level); + } + + SETREG32(HW_REG_MTX_MODE, 0x2); + SETREG32(HW_REG_MTX_POP, PV_level); + SETREG32(HW_REG_MTX_IDENTITY, 0x0); + +} + +void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){ + if (enable) + { + SETREG16(HW_REG_FOG_OFFSET, offset); + SETREG16(HW_REG_DISP3DCNT, (READREG16(HW_REG_DISP3DCNT) &~0x3f40) | (((depth << 0x8)| (alphamode << 0x6)|0x80 ))); + + } + else + { + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & (u16)~0x3080); + } +} + +u32 G3X_GetClipMtx(struct Mtx44 *dst){ + if (READREG32(HW_REG_GXSTAT) & 0x8000000) + { + return -1; + } + else + { + MI_Copy64B((void *)HW_REG_CLIPMTX_RESULT, dst); + return 0; + } +} + +u32 G3X_GetVectorMtx(struct Mtx33 *dst){ + if (READREG32(HW_REG_GXSTAT) & 0x8000000) + { + return -1; + } + else + { + MI_Copy36B((void *)HW_REG_VECMTX_RESULT, dst); + return 0; + } +} + +void G3X_SetEdgeColorTable(void *tbl_ptr){ + MIi_CpuCopy16(tbl_ptr, (void *)HW_REG_EDGE_COLOR, 0x10); +} + +void G3X_SetFogTable(void *tbl_ptr){ + MI_Copy16B(tbl_ptr, (void *)HW_REG_FOG_TABLE); +} + +void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){ + u32 temp = col | (alpha << 0x10) | (polygon_id << 0x18); + if (enable_fog) + temp |= 0x8000; + SETREG32(HW_REG_CLEAR_COLOR, temp); + SETREG16(HW_REG_CLEAR_DEPTH, depth); +} + +void G3X_InitTable(){ + if (gUnk02106814 != -1) + { + MI_DmaFill32Async(gUnk02106814, (void *)HW_REG_EDGE_COLOR, 0x0, 0x10, 0x0, 0x0); + MI_DmaFill32(gUnk02106814, (void *)HW_REG_FOG_TABLE, 0x0, 0x60); + } + else + { + MIi_CpuClear32(0x0, (void *)HW_REG_EDGE_COLOR, 0x10); + MIi_CpuClear32(0x0, (void *)HW_REG_FOG_TABLE, 0x60); + } + for (int i = 0; i < 0x20; i++) + { + SETREG32(HW_REG_SHININESS, 0x0); + } +} + +u32 G3X_GetMtxStackLevelPV(u32 *level){ + if (READREG32(HW_REG_GXSTAT) & 0x4000) + { + return -1; + } + else + { + *level = (READREG32(HW_REG_GXSTAT) & 0x1F00) >> 0x8; + return 0; + } +} + +u32 G3X_GetMtxStackLevelPJ(u32 *level){ + if (READREG32(HW_REG_GXSTAT) & 0x4000) + { + return -1; + } + else + { + *level = (READREG32(HW_REG_GXSTAT) & 0x2000) >> 0xD; + return 0; + } +} + +u32 G3X_GetBoxTestResult(u32 *result){ + if (READREG32(HW_REG_GXSTAT) & 0x1) + { + return -1; + } + else + { + *result = (READREG32(HW_REG_GXSTAT) & 0x2); + return 0; + } +} + +void G3X_SetHOffset(u32 offset){ + SETREG32(HW_REG_BG0HOFS, offset); +} -- cgit v1.2.3 From 4abf7d45568d93040fdb86993e915ffdfc4c4a9e Mon Sep 17 00:00:00 2001 From: Made Date: Sat, 9 May 2020 19:44:46 +0200 Subject: start decompiling GX_vramcnt.s --- arm9/lib/src/GX_vramcnt_c.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 arm9/lib/src/GX_vramcnt_c.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_vramcnt_c.c b/arm9/lib/src/GX_vramcnt_c.c new file mode 100644 index 00000000..50107888 --- /dev/null +++ b/arm9/lib/src/GX_vramcnt_c.c @@ -0,0 +1,24 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +void GX_VRAMCNT_SetLCDC_(u32 r0){ + if (r0 & (0x1 << 0)) + SETREG8(HW_REG_VRAMCNT_A, 0x80); + if (r0 & (0x1 << 1)) + SETREG8(HW_REG_VRAMCNT_B, 0x80); + if (r0 & (0x1 << 2)) + SETREG8(HW_REG_VRAMCNT_C, 0x80); + if (r0 & (0x1 << 3)) + SETREG8(HW_REG_VRAMCNT_D, 0x80); + if (r0 & (0x1 << 4)) + SETREG8(HW_REG_VRAMCNT_E, 0x80); + if (r0 & (0x1 << 5)) + SETREG8(HW_REG_VRAMCNT_F, 0x80); + if (r0 & (0x1 << 6)) + SETREG8(HW_REG_VRAMCNT_G, 0x80); + if (r0 & (0x1 << 7)) + SETREG8(HW_REG_VRAMCNT_H, 0x80); + if (r0 & (0x1 << 8)) + SETREG8(HW_REG_VRAMCNT_I, 0x80); +} -- cgit v1.2.3 From 435f3ce09ee75bc612ac5e827e62a341249c3c67 Mon Sep 17 00:00:00 2001 From: Made Date: Sun, 10 May 2020 04:14:47 +0200 Subject: Finish edcompiling GX_vramcnt.s --- arm9/lib/src/GX_vramcnt.c | 581 ++++++++++++++++++++++++++++++++++++++++++++ arm9/lib/src/GX_vramcnt_c.c | 24 -- 2 files changed, 581 insertions(+), 24 deletions(-) create mode 100644 arm9/lib/src/GX_vramcnt.c delete mode 100644 arm9/lib/src/GX_vramcnt_c.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c new file mode 100644 index 00000000..aa3d9cc9 --- /dev/null +++ b/arm9/lib/src/GX_vramcnt.c @@ -0,0 +1,581 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern u16 gUnk021D33BC; +extern struct VRAM_banks gUnk021D33C4; + +void OSi_UnlockVram(u16, u16); + +void GX_VRAMCNT_SetLCDC_(u32 mask){ + if (mask & (0x1 << 0)) + SETREG8(HW_REG_VRAMCNT_A, 0x80); + if (mask & (0x1 << 1)) + SETREG8(HW_REG_VRAMCNT_B, 0x80); + if (mask & (0x1 << 2)) + SETREG8(HW_REG_VRAMCNT_C, 0x80); + if (mask & (0x1 << 3)) + SETREG8(HW_REG_VRAMCNT_D, 0x80); + if (mask & (0x1 << 4)) + SETREG8(HW_REG_VRAMCNT_E, 0x80); + if (mask & (0x1 << 5)) + SETREG8(HW_REG_VRAMCNT_F, 0x80); + if (mask & (0x1 << 6)) + SETREG8(HW_REG_VRAMCNT_G, 0x80); + if (mask & (0x1 << 7)) + SETREG8(HW_REG_VRAMCNT_H, 0x80); + if (mask & (0x1 << 8)) + SETREG8(HW_REG_VRAMCNT_I, 0x80); +} + +void GX_SetBankForBG(u16 bg){ + gUnk021D33C4.var00 = ~bg & (gUnk021D33C4.var00 | gUnk021D33C4.var02); + gUnk021D33C4.var02 = bg; + switch (bg) + { + case 8: + SETREG8(HW_REG_VRAMCNT_D, 0x81); + break; + case 12: + SETREG8(HW_REG_VRAMCNT_D, 0x89); + case 4: + SETREG8(HW_REG_VRAMCNT_C, 0x81); + break; + case 14: + SETREG8(HW_REG_VRAMCNT_D, 0x91); + case 6: + SETREG8(HW_REG_VRAMCNT_C, 0x89); + case 2: + SETREG8(HW_REG_VRAMCNT_B, 0x81); + break; + case 15: + SETREG8(HW_REG_VRAMCNT_D, 0x99); + case 7: + SETREG8(HW_REG_VRAMCNT_C, 0x91); + case 3: + SETREG8(HW_REG_VRAMCNT_B, 0x89); + case 1: + SETREG8(HW_REG_VRAMCNT_A, 0x81); + break; + case 11: + SETREG8(HW_REG_VRAMCNT_A, 0x81); + SETREG8(HW_REG_VRAMCNT_B, 0x89); + SETREG8(HW_REG_VRAMCNT_D, 0x91); + break; + case 13: + SETREG8(HW_REG_VRAMCNT_D, 0x91); + case 5: + SETREG8(HW_REG_VRAMCNT_A, 0x81); + SETREG8(HW_REG_VRAMCNT_C, 0x89); + break; + case 9: + SETREG8(HW_REG_VRAMCNT_A, 0x81); + SETREG8(HW_REG_VRAMCNT_D, 0x89); + break; + case 10: + SETREG8(HW_REG_VRAMCNT_B, 0x81); + SETREG8(HW_REG_VRAMCNT_D, 0x89); + break; + case 112: + SETREG8(HW_REG_VRAMCNT_G, 0x99); + case 48: + SETREG8(HW_REG_VRAMCNT_F, 0x91); + case 16: + SETREG8(HW_REG_VRAMCNT_E, 0x81); + break; + case 80: + SETREG8(HW_REG_VRAMCNT_G, 0x91); + SETREG8(HW_REG_VRAMCNT_E, 0x81); + break; + case 96: + SETREG8(HW_REG_VRAMCNT_G, 0x89); + case 32: + SETREG8(HW_REG_VRAMCNT_F, 0x81); + break; + case 64: + SETREG8(HW_REG_VRAMCNT_G, 0x81); + break; + default: + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForOBJ(u16 obj){ + gUnk021D33C4.var00 = ~obj & (gUnk021D33C4.var00 | gUnk021D33C4.var04); + gUnk021D33C4.var04 = obj; + switch (obj) + { + case 3: + SETREG8(HW_REG_VRAMCNT_B, 0x8A); + case 1: + SETREG8(HW_REG_VRAMCNT_A, 0x82); + case 0: //needed to match + break; + case 2: + SETREG8(HW_REG_VRAMCNT_B, 0x82); + break; + case 112: + SETREG8(HW_REG_VRAMCNT_G, 0x9A); + case 48: + SETREG8(HW_REG_VRAMCNT_F, 0x92); + case 16: + SETREG8(HW_REG_VRAMCNT_E, 0x82); + break; + case 80: + SETREG8(HW_REG_VRAMCNT_G, 0x92); + SETREG8(HW_REG_VRAMCNT_E, 0x82); + break; + case 96: + SETREG8(HW_REG_VRAMCNT_G, 0x8A); + case 32: + SETREG8(HW_REG_VRAMCNT_F, 0x82); + break; + case 64: + SETREG8(HW_REG_VRAMCNT_G, 0x82); + break; + default: + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForBGExtPltt(u16 bgextpltt){ + gUnk021D33C4.var00 = ~bgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0E); + gUnk021D33C4.var0E = bgextpltt; + switch (bgextpltt) + { + case 0x10: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); + SETREG8(HW_REG_VRAMCNT_E, 0x84); + break; + case 0x40: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); + SETREG8(HW_REG_VRAMCNT_G, 0x8C); + break; + case 0x60: + SETREG8(HW_REG_VRAMCNT_G, 0x8C); + case 0x20: + SETREG8(HW_REG_VRAMCNT_F, 0x84); + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); + break; + case 0: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForOBJExtPltt(u16 objextpltt){ + gUnk021D33C4.var00 = ~objextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var10); + gUnk021D33C4.var10 = objextpltt; + switch (objextpltt) + { + case 32: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x80000000); + SETREG8(HW_REG_VRAMCNT_F, 0x85); + break; + case 64: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x80000000); + SETREG8(HW_REG_VRAMCNT_G, 0x85); + break; + case 0: + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForTex(u16 tex){ + gUnk021D33C4.var00 = ~tex & (gUnk021D33C4.var00 | gUnk021D33C4.var08); + gUnk021D33C4.var08 = tex; + if (tex == 0) + { + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & 0x0000CFFE); + } + else + { + SETREG16(HW_REG_DISP3DCNT, (READREG16(HW_REG_DISP3DCNT) & ~0x3000) | 0x1); + switch (tex) + { + case 5: + SETREG8(HW_REG_VRAMCNT_A, 0x83); + SETREG8(HW_REG_VRAMCNT_C, 0x8B); + break; + case 9: + SETREG8(HW_REG_VRAMCNT_A, 0x83); + SETREG8(HW_REG_VRAMCNT_D, 0x8B); + break; + case 10: + SETREG8(HW_REG_VRAMCNT_B, 0x83); + SETREG8(HW_REG_VRAMCNT_D, 0x8B); + break; + case 11: + SETREG8(HW_REG_VRAMCNT_A, 0x83); + SETREG8(HW_REG_VRAMCNT_B, 0x8B); + SETREG8(HW_REG_VRAMCNT_D, 0x93); + break; + case 13: + SETREG8(HW_REG_VRAMCNT_A, 0x83); + SETREG8(HW_REG_VRAMCNT_C, 0x8B); + SETREG8(HW_REG_VRAMCNT_D, 0x93); + break; + case 8: + SETREG8(HW_REG_VRAMCNT_D, 0x83); + break; + case 12: + SETREG8(HW_REG_VRAMCNT_D, 0x8B); + case 4: + SETREG8(HW_REG_VRAMCNT_C, 0x83); + break; + case 14: + SETREG8(HW_REG_VRAMCNT_D, 0x93); + case 6: + SETREG8(HW_REG_VRAMCNT_C, 0x8B); + case 2: + SETREG8(HW_REG_VRAMCNT_B, 0x83); + break; + case 15: + SETREG8(HW_REG_VRAMCNT_D, 0x9B); + case 7: + SETREG8(HW_REG_VRAMCNT_C, 0x93); + case 3: + SETREG8(HW_REG_VRAMCNT_B, 0x8B); + case 1: + SETREG8(HW_REG_VRAMCNT_A, 0x83); + break; + } + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForTexPltt(u16 texpltt){ + gUnk021D33C4.var00 = ~texpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0A); + gUnk021D33C4.var0A = texpltt; + switch (texpltt) + { + case 0: //needed to match + break; + case 96: + SETREG8(HW_REG_VRAMCNT_G, 0x8B); + case 32: + SETREG8(HW_REG_VRAMCNT_F, 0x83); + break; + case 112: + SETREG8(HW_REG_VRAMCNT_G, 0x9B); + case 48: + SETREG8(HW_REG_VRAMCNT_F, 0x93); + case 16: + SETREG8(HW_REG_VRAMCNT_E, 0x83); + break; + case 64: + SETREG8(HW_REG_VRAMCNT_G, 0x83); + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForClearImage(u16 clearimage){ + gUnk021D33C4.var00 = ~clearimage & (gUnk021D33C4.var00 | gUnk021D33C4.var0C); + gUnk021D33C4.var0C = clearimage; + switch (clearimage) + { + case 3: + SETREG8(HW_REG_VRAMCNT_A, 0x93); + case 2: + SETREG8(HW_REG_VRAMCNT_B, 0x9B); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + break; + case 12: + SETREG8(HW_REG_VRAMCNT_C, 0x93); + case 8: + SETREG8(HW_REG_VRAMCNT_D, 0x9B); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + break; + case 0: + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x4000); + break; + case 1: + SETREG8(HW_REG_VRAMCNT_A, 0x9B); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + break; + case 4: + SETREG8(HW_REG_VRAMCNT_C, 0x9B); + SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForARM7(u16 arm7){ + gUnk021D33C4.var00 = ~arm7 & (gUnk021D33C4.var00 | gUnk021D33C4.var06); + gUnk021D33C4.var06 = arm7; + switch (arm7) + { + case 0: //needed to match + break; + case 12: + SETREG8(HW_REG_VRAMCNT_D, 0x8A); + SETREG8(HW_REG_VRAMCNT_C, 0x82); + break; + case 4: + SETREG8(HW_REG_VRAMCNT_C, 0x82); + break; + case 8: + SETREG8(HW_REG_VRAMCNT_D, 0x82); + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForLCDC(u16 lcdc){ + gUnk021D33C4.var00 |= lcdc; + GX_VRAMCNT_SetLCDC_(lcdc); +} + +void GX_SetBankForSubBG(u16 subbg){ + gUnk021D33C4.var00 = ~subbg & (gUnk021D33C4.var00 | gUnk021D33C4.var12); + gUnk021D33C4.var12 = subbg; + switch (subbg) + { + case 0: //needed to match + break; + case 4: + SETREG8(HW_REG_VRAMCNT_C, 0x84); + break; + case 384: + SETREG8(HW_REG_VRAMCNT_I, 0x81); + case 128: + SETREG8(HW_REG_VRAMCNT_H, 0x81); + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + + +void GX_SetBankForSubOBJ(u16 subobj){ + gUnk021D33C4.var00 = ~subobj & (gUnk021D33C4.var00 | gUnk021D33C4.var14); + gUnk021D33C4.var14 = subobj; + switch (subobj) + { + case 8: + SETREG8(HW_REG_VRAMCNT_D, 0x84); + break; + case 256: + SETREG8(HW_REG_VRAMCNT_I, 0x82); + break; + case 0: //needed to match + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForSubBGExtPltt(u16 subbgextpltt){ + gUnk021D33C4.var00 = ~subbgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var16); + gUnk021D33C4.var16 = subbgextpltt; + switch (subbgextpltt) + { + case 128: + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) | 0x40000000); + SETREG8(HW_REG_VRAMCNT_H, 0x82); + break; + case 0: + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +void GX_SetBankForSubOBJExtPltt(u16 subobjextpltt){ + gUnk021D33C4.var00 = ~subobjextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var18); + gUnk021D33C4.var18 = subobjextpltt; + switch (subobjextpltt) + { + case 256: + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) | 0x80000000); + SETREG8(HW_REG_VRAMCNT_I, 0x83); + break; + case 0: + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + break; + } + GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); +} + +u32 FUN_020C6130(u16 *ptr){ + u16 temp = *ptr; + *ptr = 0; + gUnk021D33C4.var00 |= temp; + GX_VRAMCNT_SetLCDC_(temp); + return temp; +} + +u32 GX_ResetBankForBG(){ + return FUN_020C6130(&gUnk021D33C4.var02); +} + +u32 GX_ResetBankForOBJ(){ + return FUN_020C6130(&gUnk021D33C4.var04); +} + +u32 GX_ResetBankForBGExtPltt(){ + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + return FUN_020C6130(&gUnk021D33C4.var0E); +} + +u32 GX_ResetBankForOBJExtPltt(){ + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + return FUN_020C6130(&gUnk021D33C4.var10); +} + +u32 GX_ResetBankForTex(){ + return FUN_020C6130(&gUnk021D33C4.var08); +} + +u32 GX_ResetBankForTexPltt(){ + return FUN_020C6130(&gUnk021D33C4.var0A); +} + +u32 GX_ResetBankForClearImage(){ + return FUN_020C6130(&gUnk021D33C4.var0C); +} + +u32 GX_ResetBankForSubBG(){ + return FUN_020C6130(&gUnk021D33C4.var12); +} + +u32 FUN_020C605C(){ + return FUN_020C6130(&gUnk021D33C4.var14); +} + +u32 FUN_020C6034(){ + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + return FUN_020C6130(&gUnk021D33C4.var16); +} + +u32 GX_ResetBankForSubOBJ(){ + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + return FUN_020C6130(&gUnk021D33C4.var18); +} + +u32 FUN_020C5F28(u16 *ptr){ + u32 temp = *ptr; + *ptr = 0; + if (temp & (0x1 << 0)) + SETREG8(HW_REG_VRAMCNT_A, 0x0); + if (temp & (0x1 << 1)) + SETREG8(HW_REG_VRAMCNT_B, 0x0); + if (temp & (0x1 << 2)) + SETREG8(HW_REG_VRAMCNT_C, 0x0); + if (temp & (0x1 << 3)) + SETREG8(HW_REG_VRAMCNT_D, 0x0); + if (temp & (0x1 << 4)) + SETREG8(HW_REG_VRAMCNT_E, 0x0); + if (temp & (0x1 << 5)) + SETREG8(HW_REG_VRAMCNT_F, 0x0); + if (temp & (0x1 << 6)) + SETREG8(HW_REG_VRAMCNT_G, 0x0); + if (temp & (0x1 << 7)) + SETREG8(HW_REG_VRAMCNT_H, 0x0); + if (temp & (0x1 << 8)) + SETREG8(HW_REG_VRAMCNT_I, 0x0); + OSi_UnlockVram((u16)temp, gUnk021D33BC); + return temp; +} + +u32 disableBankForX_(){ + return FUN_020C5F28(&gUnk021D33C4.var02); +} + +u32 GX_DisableBankForOBJExtPltt_2(){ + return FUN_020C5F28(&gUnk021D33C4.var04); +} + +u32 GX_DisableBankForBGExtPltt(){ + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + return FUN_020C5F28(&gUnk021D33C4.var0E); +} + +u32 GX_DisableBankForOBJExtPltt(){ + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + return FUN_020C5F28(&gUnk021D33C4.var10); +} + +u32 GX_DisableBankForTexPltt_2(){ + return FUN_020C5F28(&gUnk021D33C4.var08); +} + +u32 GX_DisableBankForTexPltt(){ + return FUN_020C5F28(&gUnk021D33C4.var0A); +} + +u32 GX_DisableBankForClearImage(){ + return FUN_020C5F28(&gUnk021D33C4.var0C); +} + +u32 GX_DisableBankForARM7(){ + return FUN_020C5F28(&gUnk021D33C4.var06); +} + +u32 GX_DisableBankForLCDC(){ + return FUN_020C5F28(&gUnk021D33C4.var00); +} + +u32 GX_DisableBankForSubBGExtPltt(){ + return FUN_020C5F28(&gUnk021D33C4.var12); +} + +u32 GX_DisableBankForSubOBJExtPltt_2(){ + return FUN_020C5F28(&gUnk021D33C4.var14); +} + +u32 FUN_020C5E04(){ + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + return FUN_020C5F28(&gUnk021D33C4.var16); +} + +u32 GX_DisableBankForSubOBJExtPltt(){ + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + return FUN_020C5F28(&gUnk021D33C4.var18); +} + +u32 GX_GetBankForBGExtPltt_2(){ + return gUnk021D33C4.var02; +} + +u32 GX_GetBankForOBJ(){ + return gUnk021D33C4.var04; +} + +u32 GX_GetBankForBGExtPltt(){ + return gUnk021D33C4.var0E; +} + +u32 GX_GetBankForOBJExtPltt(){ + return gUnk021D33C4.var10; +} + +u32 FUN_020C5D8C(){ + return gUnk021D33C4.var08; +} + +u32 GX_GetBankForTexPltt(){ + return gUnk021D33C4.var0A; +} + +u32 GX_GetBankForLCDC(){ + return gUnk021D33C4.var00; +} + +u32 GX_GetBankForSubBGExtPltt_2(){ + return gUnk021D33C4.var12; +} + +u32 GX_GetBankForSubOBJ(){ + return gUnk021D33C4.var14; +} + +u32 GX_GetBankForSubBGExtPltt(){ + return gUnk021D33C4.var16; +} + +u32 GX_GetBankForSubOBJExtPltt(){ + return gUnk021D33C4.var18; +} diff --git a/arm9/lib/src/GX_vramcnt_c.c b/arm9/lib/src/GX_vramcnt_c.c deleted file mode 100644 index 50107888..00000000 --- a/arm9/lib/src/GX_vramcnt_c.c +++ /dev/null @@ -1,24 +0,0 @@ -#include "global.h" -#include "main.h" -#include "gx.h" - -void GX_VRAMCNT_SetLCDC_(u32 r0){ - if (r0 & (0x1 << 0)) - SETREG8(HW_REG_VRAMCNT_A, 0x80); - if (r0 & (0x1 << 1)) - SETREG8(HW_REG_VRAMCNT_B, 0x80); - if (r0 & (0x1 << 2)) - SETREG8(HW_REG_VRAMCNT_C, 0x80); - if (r0 & (0x1 << 3)) - SETREG8(HW_REG_VRAMCNT_D, 0x80); - if (r0 & (0x1 << 4)) - SETREG8(HW_REG_VRAMCNT_E, 0x80); - if (r0 & (0x1 << 5)) - SETREG8(HW_REG_VRAMCNT_F, 0x80); - if (r0 & (0x1 << 6)) - SETREG8(HW_REG_VRAMCNT_G, 0x80); - if (r0 & (0x1 << 7)) - SETREG8(HW_REG_VRAMCNT_H, 0x80); - if (r0 & (0x1 << 8)) - SETREG8(HW_REG_VRAMCNT_I, 0x80); -} -- cgit v1.2.3 From fd64cccafa5d4d8031ba3b19dc907c672f8b7041 Mon Sep 17 00:00:00 2001 From: Made Date: Mon, 11 May 2020 03:08:38 +0200 Subject: Decompile GX_g3_util.h --- arm9/lib/src/GX_g3_util.c | 267 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 267 insertions(+) create mode 100644 arm9/lib/src/GX_g3_util.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_g3_util.c b/arm9/lib/src/GX_g3_util.c new file mode 100644 index 00000000..049b9366 --- /dev/null +++ b/arm9/lib/src/GX_g3_util.c @@ -0,0 +1,267 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +#define HW_REG_DIV_NUMER 0x04000290 +#define HW_REG_DIV_DENOM 0x04000298 + +#define HW_REG_MTX_MODE 0x04000440 +#define HW_REG_MTX_LOAD_4x4 0x04000458 +#define HW_REG_MTX_LOAD_4x3 0x0400045C +#define HW_REG_MTX_MULT_3x3 0x04000468 + +void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ + fx32 fovcot, temp1, temp2; + fx64c temp0; + vu32 *reg_ptr; + + fovcot = FX_Div(fovcos, fovsin); + if (scale != 0x1000) //!= 1.0 + fovcot = (fovcot * scale) / 0x1000; + SETREG64(HW_REG_DIV_NUMER, (s64)fovcot << 0x20); + SETREG64(HW_REG_DIV_DENOM, (u32)ratio); + if (load) + { + SETREG32(HW_REG_MTX_MODE, 0x0); + reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x4; + } + if (mtx) + { + mtx->_[1] = 0x0; + mtx->_[2] = 0x0; + mtx->_[3] = 0x0; + mtx->_[4] = 0x0; + mtx->_[6] = 0x0; + mtx->_[7] = 0x0; + mtx->_[8] = 0x0; + mtx->_[9] = 0x0; + mtx->_[11] = -scale; + mtx->_[12] = 0x0; + mtx->_[13] = 0x0; + mtx->_[15] = 0x0; + } + temp1 = FX_GetDivResult(); + SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); + SETREG64(HW_REG_DIV_DENOM, (u32)(near - far)); + if (load) + { + *reg_ptr = temp1; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = fovcot; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + } + if (mtx) + { + mtx->_[0] = temp1; + mtx->_[5] = fovcot; + } + temp0 = FX_GetDivResultFx64c(); + if (scale != 0x1000) + temp0 = (temp0 * scale) / 0x1000; + temp1 = ((far + near) * temp0 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + temp2 = (((fx32)(((fx64)(near << 1) * far + (1 << (FX32_INT_SHIFT - 1))) >> FX32_INT_SHIFT)) * temp0 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + if (load) + { + *reg_ptr = temp1; + *reg_ptr = -scale; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = temp2; + *reg_ptr = 0x0; + } + if (mtx) + { + mtx->_[10] = temp1; + mtx->_[14] = temp2; + } +} + +void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ + fx64c temp1, temp2, temp3; + fx32 temp0, temp4, temp5; + vu32 *reg_ptr; + + FX_InvAsync(right - left); + if (load) + { + SETREG32(HW_REG_MTX_MODE, 0x0); + reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x4; + } + if (mtx) + { + mtx->_[1] = 0x0; + mtx->_[2] = 0x0; + mtx->_[3] = 0x0; + mtx->_[4] = 0x0; + mtx->_[6] = 0x0; + mtx->_[7] = 0x0; + mtx->_[8] = 0x0; + mtx->_[9] = 0x0; + mtx->_[11] = 0x0; + mtx->_[15] = scale; + } + temp1 = FX_GetDivResultFx64c(); + SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); + SETREG64(HW_REG_DIV_DENOM, (u32)(top - bottom)); + if (scale != 0x1000) + temp1 = (temp1 * scale) / 0x1000; + temp0 = (0x2000 * temp1 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + if (load) + { + *reg_ptr = temp0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + } + if (mtx) + { + mtx->_[0] = temp0; + } + temp2 = FX_GetDivResultFx64c(); + SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); + SETREG64(HW_REG_DIV_DENOM, (u32)(near - far)); + if (scale != 0x1000) + temp2 = (temp2 * scale) / 0x1000; + temp0 = (0x2000 * temp2 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + if (load) + { + *reg_ptr = temp0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + } + if (mtx) + { + mtx->_[5] = temp0; + } + temp3 = FX_GetDivResultFx64c(); + if (scale != 0x1000) + temp3 = (temp3 * scale) / 0x1000; + temp0 = (0x2000 * temp3 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + if (load) + { + *reg_ptr = temp0; + *reg_ptr = 0x0; + } + if (mtx) + { + mtx->_[10] = temp0; + } + temp0 = ((-(right + left)) * temp1 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + temp4 = ((-(top + bottom)) * temp2 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + temp5 = ((far + near) * temp3 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; + if (load) + { + *reg_ptr = temp0; + *reg_ptr = temp4; + *reg_ptr = temp5; + *reg_ptr = scale; + } + if (mtx) + { + mtx->_[12] = temp0; + mtx->_[13] = temp4; + mtx->_[14] = temp5; + } +} + +void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, u32 load, struct Mtx44 *mtx){ + struct Vecx32 temp, temp1, temp2; + fx32 c1, c2, c3; + vu32 *reg_ptr; + temp.x = a->x - c->x; + temp.y = a->y - c->y; + temp.z = a->z - c->z; + VEC_Normalize(&temp, &temp); + VEC_CrossProduct(b, &temp, &temp1); + VEC_Normalize(&temp1, &temp1); + VEC_CrossProduct(&temp, &temp1, &temp2); + if (load) + { + SETREG32(HW_REG_MTX_MODE, 0x2); + reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x3; + *reg_ptr = temp1.x; + *reg_ptr = temp2.x; + *reg_ptr = temp.x; + *reg_ptr = temp1.y; + *reg_ptr = temp2.y; + *reg_ptr = temp.y; + *reg_ptr = temp1.z; + *reg_ptr = temp2.z; + *reg_ptr = temp.z; + } + c1 = -VEC_DotProduct(a, &temp1); + c2 = -VEC_DotProduct(a, &temp2); + c3 = -VEC_DotProduct(a, &temp); + if (load) + { + *reg_ptr = c1; + *reg_ptr = c2; + *reg_ptr = c3; + } + if (mtx) + { + mtx->_[0] = temp1.x; + mtx->_[1] = temp2.x; + mtx->_[2] = temp.x; + mtx->_[3] = temp1.y; + mtx->_[4] = temp2.y; + mtx->_[5] = temp.y; + mtx->_[6] = temp1.z; + mtx->_[7] = temp2.z; + mtx->_[8] = temp.z; + mtx->_[9] = c1; + mtx->_[10] = c2; + mtx->_[11] = c3; + } +} + +void G3_RotX(fx32 sinphi, fx32 cosphi){ + vu32 *reg_ptr; + reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + *reg_ptr = 0x1000; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = cosphi; + *reg_ptr = sinphi; + *reg_ptr = 0x0; + *reg_ptr = -sinphi; + *reg_ptr = cosphi; +} + +void G3_RotY(fx32 sinphi, fx32 cosphi){ + vu32 *reg_ptr; + reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + *reg_ptr = cosphi; + *reg_ptr = 0x0; + *reg_ptr = -sinphi; + *reg_ptr = 0x0; + *reg_ptr = 0x1000; + *reg_ptr = 0x0; + *reg_ptr = sinphi; + *reg_ptr = 0x0; + *reg_ptr = cosphi; +} + +void G3_RotZ(fx32 sinphi, fx32 cosphi){ + vu32 *reg_ptr; + reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + *reg_ptr = cosphi; + *reg_ptr = sinphi; + *reg_ptr = 0x0; + *reg_ptr = -sinphi; + *reg_ptr = cosphi; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x0; + *reg_ptr = 0x1000; +} -- cgit v1.2.3 From 2d3d64c1c94ba8b94147bfbc29bb15bd42772ed3 Mon Sep 17 00:00:00 2001 From: Made Date: Tue, 12 May 2020 01:27:44 +0200 Subject: Decompile GX_bgcnt.s --- arm9/lib/src/GX_bgcnt.c | 195 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 195 insertions(+) create mode 100644 arm9/lib/src/GX_bgcnt.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_bgcnt.c b/arm9/lib/src/GX_bgcnt.c new file mode 100644 index 00000000..918f4d32 --- /dev/null +++ b/arm9/lib/src/GX_bgcnt.c @@ -0,0 +1,195 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +void *G2_GetBG0ScrPtr(){ + u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x1F00) >> 0x8) << 0xB); + return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); +} + +void *G2S_GetBG0ScrPtr(){ + return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x1F00) >> 0x8) << 0xB)); +} + +void *G2_GetBG1ScrPtr(){ + u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x1F00) >> 0x8) << 0xB); + return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); +} + +void *G2S_GetBG1ScrPtr(){ + return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x1F00) >> 0x8) << 0xB)); +} + +void *G2_GetBG2ScrPtr(){ + u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); + u32 temp3 = READREG16(HW_REG_BG2CNT_A); + u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); + u32 temp1 = ((temp3 & 0x1F00) >> 0x8); + switch (temp12) + { + case 0: + case 1: + case 2: + case 3: + case 4: + return (void *)(0x6000000 + temp2 + (temp1 << 0xB)); + case 5: + if (temp3 & 0x80) + return (void *)(0x6000000 + (temp1 << 0xE)); + else + return (void *)(0x6000000 + temp2 + (temp1 << 0xB)); + case 6: + return (void *)0x6000000; + default: + return NULL; + } +} + +void *G2S_GetBG2ScrPtr(){ + u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); + u32 temp3 = READREG16(HW_REG_BG2CNT_B); + u32 temp1 = ((temp3 & 0x1F00) >> 0x8); + switch (temp12) + { + case 0: + case 1: + case 2: + case 3: + case 4: + return (void *)(0x6200000 + (temp1 << 0xB)); + case 5: + if (temp3 & 0x80) + return (void *)(0x6200000 + (temp1 << 0xE)); + else + return (void *)(0x6200000 + (temp1 << 0xB)); + case 6: + return NULL; + default: + return NULL; + } +} + +void *G2_GetBG3ScrPtr(){ + u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); + u32 temp3 = READREG16(HW_REG_BG3CNT_A); + u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); + u32 temp1 = ((temp3 & 0x1F00) >> 0x8); + switch (temp12) + { + case 0: + case 1: + case 2: + return (void *)(0x6000000 + temp2 + (temp1 << 0xB)); + case 3: + case 4: + case 5: + if (temp3 & 0x80) + return (void *)(0x6000000 + (temp1 << 0xE)); + else + return (void *)(0x6000000 + temp2 + (temp1 << 0xB)); + case 6: + return NULL; + default: + return NULL; + } +} + +void *G2S_GetBG3ScrPtr(){ + u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); + u32 temp3 = READREG16(HW_REG_BG3CNT_B); + u32 temp1 = ((temp3 & 0x1F00) >> 0x8); + switch (temp12) + { + case 0: + case 1: + case 2: + return (void *)(0x6200000 + (temp1 << 0xB)); + case 3: + case 4: + case 5: + if (temp3 & 0x80) + return (void *)(0x6200000 + (temp1 << 0xE)); + else + return (void *)(0x6200000 + (temp1 << 0xB)); + case 6: + return NULL; + default: + return NULL; + } +} + +void *G2_GetBG0CharPtr(){ + u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x3C) >> 0x2) << 0xE); + return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); +} + +void *G2S_GetBG0CharPtr(){ + return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x3C) >> 0x2) << 0xE)); +} + +void *G2_GetBG1CharPtr(){ + u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x3C) >> 0x2) << 0xE); + return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); +} + +void *G2S_GetBG1CharPtr(){ + return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x3C) >> 0x2) << 0xE)); +} + +void *G2_GetBG2CharPtr(){ + s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); + u32 temp = READREG16(HW_REG_BG2CNT_A); + if (temp1 < 5 || !(temp & 0x80)) + { + u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10); + u32 temp2 = (temp & 0x3C) >> 2; + return (void *)(0x6000000 + temp1 + (temp2 << 0xE)); + } + else + { + return NULL; + } +} + +void *G2S_GetBG2CharPtr(){ + s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); + u32 temp = READREG16(HW_REG_BG2CNT_B); + if (temp1 < 5 || !(temp & 0x80)) + { + u32 temp2 = ((temp & 0x3C) >> 2) << 0xE; + return (void *)(0x6200000 + temp2); + } + else + { + return NULL; + } +} + +void *G2_GetBG3CharPtr(){ + s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); + u32 temp = READREG16(HW_REG_BG3CNT_A); + if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) + { + u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10); + u32 temp2 = (temp & 0x3C) >> 2; + return (void *)(0x6000000 + temp1 + (temp2 << 0xE)); + } + else + { + return NULL; + } +} + +void *G2S_GetBG3CharPtr(){ + s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); + u32 temp = READREG16(HW_REG_BG3CNT_B); + if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) + { + u32 temp2 = ((temp & 0x3C) >> 2) << 0xE; + return (void *)(0x6200000 + temp2); + } + else + { + return NULL; + } +} -- cgit v1.2.3 From 0516c30ad7aa1941882b4e31e6b7bc4ec4ae02a4 Mon Sep 17 00:00:00 2001 From: Made Date: Wed, 13 May 2020 19:27:00 +0200 Subject: Fix Function signatures in GX_vramcnt --- arm9/lib/src/GX_vramcnt.c | 50 +++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 25 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index aa3d9cc9..52be412c 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -28,8 +28,8 @@ void GX_VRAMCNT_SetLCDC_(u32 mask){ SETREG8(HW_REG_VRAMCNT_I, 0x80); } -void GX_SetBankForBG(u16 bg){ - gUnk021D33C4.var00 = ~bg & (gUnk021D33C4.var00 | gUnk021D33C4.var02); +void GX_SetBankForBG(s32 bg){ + gUnk021D33C4.var00 = (u16)(~bg & (gUnk021D33C4.var00 | gUnk021D33C4.var02)); gUnk021D33C4.var02 = bg; switch (bg) { @@ -101,8 +101,8 @@ void GX_SetBankForBG(u16 bg){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForOBJ(u16 obj){ - gUnk021D33C4.var00 = ~obj & (gUnk021D33C4.var00 | gUnk021D33C4.var04); +void GX_SetBankForOBJ(s32 obj){ + gUnk021D33C4.var00 = (u16)(~obj & (gUnk021D33C4.var00 | gUnk021D33C4.var04)); gUnk021D33C4.var04 = obj; switch (obj) { @@ -140,8 +140,8 @@ void GX_SetBankForOBJ(u16 obj){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForBGExtPltt(u16 bgextpltt){ - gUnk021D33C4.var00 = ~bgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0E); +void GX_SetBankForBGExtPltt(s32 bgextpltt){ + gUnk021D33C4.var00 = (u16)(~bgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0E)); gUnk021D33C4.var0E = bgextpltt; switch (bgextpltt) { @@ -166,8 +166,8 @@ void GX_SetBankForBGExtPltt(u16 bgextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForOBJExtPltt(u16 objextpltt){ - gUnk021D33C4.var00 = ~objextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var10); +void GX_SetBankForOBJExtPltt(s32 objextpltt){ + gUnk021D33C4.var00 = (u16)(~objextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var10)); gUnk021D33C4.var10 = objextpltt; switch (objextpltt) { @@ -186,8 +186,8 @@ void GX_SetBankForOBJExtPltt(u16 objextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForTex(u16 tex){ - gUnk021D33C4.var00 = ~tex & (gUnk021D33C4.var00 | gUnk021D33C4.var08); +void GX_SetBankForTex(s32 tex){ + gUnk021D33C4.var00 = (u16)(~tex & (gUnk021D33C4.var00 | gUnk021D33C4.var08)); gUnk021D33C4.var08 = tex; if (tex == 0) { @@ -249,8 +249,8 @@ void GX_SetBankForTex(u16 tex){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForTexPltt(u16 texpltt){ - gUnk021D33C4.var00 = ~texpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0A); +void GX_SetBankForTexPltt(s32 texpltt){ + gUnk021D33C4.var00 = (u16)(~texpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0A)); gUnk021D33C4.var0A = texpltt; switch (texpltt) { @@ -275,8 +275,8 @@ void GX_SetBankForTexPltt(u16 texpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForClearImage(u16 clearimage){ - gUnk021D33C4.var00 = ~clearimage & (gUnk021D33C4.var00 | gUnk021D33C4.var0C); +void GX_SetBankForClearImage(s32 clearimage){ + gUnk021D33C4.var00 = (u16)(~clearimage & (gUnk021D33C4.var00 | gUnk021D33C4.var0C)); gUnk021D33C4.var0C = clearimage; switch (clearimage) { @@ -306,8 +306,8 @@ void GX_SetBankForClearImage(u16 clearimage){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForARM7(u16 arm7){ - gUnk021D33C4.var00 = ~arm7 & (gUnk021D33C4.var00 | gUnk021D33C4.var06); +void GX_SetBankForARM7(s32 arm7){ + gUnk021D33C4.var00 = (u16)(~arm7 & (gUnk021D33C4.var00 | gUnk021D33C4.var06)); gUnk021D33C4.var06 = arm7; switch (arm7) { @@ -326,13 +326,13 @@ void GX_SetBankForARM7(u16 arm7){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForLCDC(u16 lcdc){ +void GX_SetBankForLCDC(s32 lcdc){ gUnk021D33C4.var00 |= lcdc; GX_VRAMCNT_SetLCDC_(lcdc); } -void GX_SetBankForSubBG(u16 subbg){ - gUnk021D33C4.var00 = ~subbg & (gUnk021D33C4.var00 | gUnk021D33C4.var12); +void GX_SetBankForSubBG(s32 subbg){ + gUnk021D33C4.var00 = (u16)(~subbg & (gUnk021D33C4.var00 | gUnk021D33C4.var12)); gUnk021D33C4.var12 = subbg; switch (subbg) { @@ -350,8 +350,8 @@ void GX_SetBankForSubBG(u16 subbg){ } -void GX_SetBankForSubOBJ(u16 subobj){ - gUnk021D33C4.var00 = ~subobj & (gUnk021D33C4.var00 | gUnk021D33C4.var14); +void GX_SetBankForSubOBJ(s32 subobj){ + gUnk021D33C4.var00 = (u16)(~subobj & (gUnk021D33C4.var00 | gUnk021D33C4.var14)); gUnk021D33C4.var14 = subobj; switch (subobj) { @@ -367,8 +367,8 @@ void GX_SetBankForSubOBJ(u16 subobj){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForSubBGExtPltt(u16 subbgextpltt){ - gUnk021D33C4.var00 = ~subbgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var16); +void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ + gUnk021D33C4.var00 = (u16)(~subbgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var16)); gUnk021D33C4.var16 = subbgextpltt; switch (subbgextpltt) { @@ -383,8 +383,8 @@ void GX_SetBankForSubBGExtPltt(u16 subbgextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForSubOBJExtPltt(u16 subobjextpltt){ - gUnk021D33C4.var00 = ~subobjextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var18); +void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ + gUnk021D33C4.var00 = (u16)(~subobjextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var18)); gUnk021D33C4.var18 = subobjextpltt; switch (subobjextpltt) { -- cgit v1.2.3 From 5223256ef928245620bb1a223084df6931999795 Mon Sep 17 00:00:00 2001 From: Made Date: Wed, 13 May 2020 20:55:45 +0200 Subject: Decompile GX_load2d.h --- arm9/lib/src/GX_load2d.c | 267 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 267 insertions(+) create mode 100644 arm9/lib/src/GX_load2d.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c new file mode 100644 index 00000000..b0af0e8c --- /dev/null +++ b/arm9/lib/src/GX_load2d.c @@ -0,0 +1,267 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern u32 gUnk02106814; + +extern s32 gUnk021D33F8; +extern s32 gUnk021D33F4; +extern u32 gUnk021D33F0; +extern u32 gUnk021D33EC; +extern s32 gUnk021D33E8; +extern u32 gUnk021D33E4; +extern s32 gUnk021D33E0; + +void MI_WaitDma(u32); +void MI_DmaCopy32Async(u32, void *, void *, u32, void *, void *); +void MI_DmaCopy16(u32 unk, void *src, void *dst, u32 size); +void MIi_CpuCopy16(void *src, void *dst, u32 size); +void MI_DmaCopy32(u32 unk, void *src, void *dst, u32 size); +void MIi_CpuCopy32(void *src, void *dst, u32 size); + + +static inline void _GX_Load_16(void *src, u32 offset, u32 size, u32 base){ + if (gUnk02106814 != -1 && size > 0x1C) + { + MI_DmaCopy16(gUnk02106814, src, (void *)(base + offset), size); + } + else + { + MIi_CpuCopy16(src, (void *)(base + offset), size); + } +} + +static inline void _GX_Load_32(void *src, u32 offset, u32 size, u32 base){ + if (gUnk02106814 != -1 && size > 0x30) + { + MI_DmaCopy32(gUnk02106814, src, (void *)(base + offset), size); + } + else + { + MIi_CpuCopy32(src, (void *)(base + offset), size); + } +} + +static inline void _GX_Load_32_Async(void *src, void *dst, u32 size, void *func, void *ptr){ + if (gUnk02106814 != -1) + { + MI_DmaCopy32Async(gUnk02106814, src, dst, size, func, ptr); + } + else + { + MIi_CpuCopy32(src, dst, size); + } +} + +static inline void *_GX_OBJ_PTR(){ + return (void *)0x6400000; +} +static inline void *_GXS_OBJ_PTR(){ + return (void *)0x6600000; +} + +void GX_LoadBGPltt(void *src, u32 offset, u32 size){ + _GX_Load_16(src, offset, size, 0x5000000); +} + +void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ + _GX_Load_16(src, offset, size, 0x5000400); +} + +void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ + _GX_Load_16(src, offset, size, 0x5000200); +} + +void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ + _GX_Load_16(src, offset, size, 0x5000600); +} + +void GX_LoadOAM(void *src, u32 offset, u32 size){ + _GX_Load_32(src, offset, size, 0x7000000); +} + +void GXS_LoadOAM(void *src, u32 offset, u32 size){ + _GX_Load_32(src, offset, size, 0x7000400); +} + +void GX_LoadOBJ(void *src, u32 offset, u32 size){ + u32 base = (u32)_GX_OBJ_PTR(); + _GX_Load_32(src, offset, size, base); +} + +void GXS_LoadOBJ(void *src, u32 offset, u32 size){ + u32 base = (u32)_GXS_OBJ_PTR(); + _GX_Load_32(src, offset, size, base); +} + +void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG0ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG0ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG1ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG1ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG2ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG2ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG3ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG3ScrPtr(); + _GX_Load_16(src, offset, size, base); +} + +void GX_LoadBG0Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG0CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG0CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GX_LoadBG1Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG1CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG1CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GX_LoadBG2Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG2CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG2CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GX_LoadBG3Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2_GetBG3CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ + u32 base = (u32)G2S_GetBG3CharPtr(); + _GX_Load_32(src, offset, size, base); +} + +void GX_BeginLoadBGExtPltt(){ + gUnk021D33F4 = GX_ResetBankForBGExtPltt(); + switch (gUnk021D33F4) + { + case 0: //needed to match + break; + case 0x10: + gUnk021D33F0 = 0x06880000; + gUnk021D33EC = 0x0; + break; + case 0x40: + gUnk021D33F0 = 0x06894000; + gUnk021D33EC = 0x4000; + break; + case 0x20: + case 0x60: + gUnk021D33F0 = 0x06890000; + gUnk021D33EC = 0x0; + break; + } +} + +void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ + _GX_Load_32_Async(src, (void *)(gUnk021D33F0 + offset - gUnk021D33EC), size, NULL, NULL); +} + +void GX_EndLoadBGExtPltt(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForBGExtPltt(gUnk021D33F4); + gUnk021D33F4 = 0x0; + gUnk021D33F0 = 0x0; + gUnk021D33EC = 0x0; +} + +void GX_BeginLoadOBJExtPltt(){ + gUnk021D33E8 = GX_ResetBankForOBJExtPltt(); + switch (gUnk021D33E8) + { + case 0: //needed to match + break; + case 0x40: + gUnk021D33E4 = 0x06894000; + break; + case 0x20: + gUnk021D33E4 = 0x06890000; + break; + } +} + +void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ + _GX_Load_32_Async(src, (void *)(gUnk021D33E4 + offset), size, NULL, NULL); +} + +void GX_EndLoadOBJExtPltt(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForOBJExtPltt(gUnk021D33E8); + gUnk021D33E8 = 0x0; + gUnk021D33E4 = 0x0; +} + +void GXS_BeginLoadBGExtPltt(){ + gUnk021D33E0 = FUN_020C6034(); +} + +void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ + _GX_Load_32_Async(src, (void *)(0x06898000 + offset), size, NULL, NULL); +} + +void GXS_EndLoadBGExtPltt(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForSubBGExtPltt(gUnk021D33E0); + gUnk021D33E0 = 0x0; +} + +void GXS_BeginLoadOBJExtPltt(){ + gUnk021D33F8 = GX_ResetBankForSubOBJ(); +} + +void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ + _GX_Load_32_Async(src, (void *)(0x068A0000 + offset), size, NULL, NULL); +} + +void GXS_EndLoadOBJExtPltt(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForSubOBJExtPltt(gUnk021D33F8); + gUnk021D33F8 = 0x0; +} -- cgit v1.2.3 From 0b3c15a399b456bffcd65aa5d100371ce69fa8eb Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 00:22:52 +0200 Subject: Decompile GX_load3d.s --- arm9/lib/src/GX_load3d.c | 157 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 arm9/lib/src/GX_load3d.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c new file mode 100644 index 00000000..9ae7427a --- /dev/null +++ b/arm9/lib/src/GX_load3d.c @@ -0,0 +1,157 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern u32 gUnk02106814; + +extern u32 gUnk021D3410; +extern u32 gUnk021D3400; +extern u32 gUnk021D3414; +extern u32 gUnk021D3418; + +//probably structs of length 0x6 +extern u16 gUnk02103B4C[]; +extern u16 gUnk02103B4E[]; +extern u16 gUnk02103B50[]; + +extern u32 gUnk021D3408; +extern u32 gUnk021D3404; +extern u16 gUnk02103B3C[]; + +extern s32 gUnk021D33FC; +extern u32 gUnk021D340C; + +static inline void _GX_Load_16(void *src, void *dst, u32 size){ + if (gUnk02106814 != -1 && size > 0x1C) + { + MI_DmaCopy16(gUnk02106814, src, dst, size); + } + else + { + MIi_CpuCopy16(src, dst, size); + } +} + +static inline void _GX_Load_32(void *src, void *dst, u32 size){ + if (gUnk02106814 != -1 && size > 0x30) + { + MI_DmaCopy32(gUnk02106814, src, dst, size); + } + else + { + MIi_CpuCopy32(src, dst, size); + } +} + +static inline void _GX_Load_32_Async(void *src, void *dst, u32 size, void *func, void *ptr){ + if (gUnk02106814 != -1) + { + MI_DmaCopy32Async(gUnk02106814, src, dst, size, func, ptr); + } + else + { + MIi_CpuCopy32(src, dst, size); + } +} + +void GX_BeginLoadTex(){ + u32 temp = GX_ResetBankForTex(); + gUnk021D3410 = temp; + gUnk021D3400 = gUnk02103B4C[temp * 3] << 0xC; + gUnk021D3414 = gUnk02103B4E[temp * 3] << 0xC; + gUnk021D3418 = gUnk02103B50[temp * 3] << 0xC; +} + +void GX_LoadTex(void *src, u32 offset, u32 size){ + void *temp; + if (!gUnk021D3414) + { + temp = (void *)(gUnk021D3400 + offset); + } + else + { + if ((offset + size) < gUnk021D3418) + { + temp = (void *)(gUnk021D3400 + offset); + } + else if (offset >= gUnk021D3418) + { + temp = (void *)(gUnk021D3414 + offset - gUnk021D3418); + } + else + { + void *temp2 = (void *)gUnk021D3414; + u32 temp1 = gUnk021D3418 - offset; + temp = (void *)(gUnk021D3400 + offset); + _GX_Load_32(src, temp, temp1); + _GX_Load_32_Async((void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); + return; + } + } + _GX_Load_32_Async(src, temp, size, NULL, NULL); +} + +void GX_EndLoadTex(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForTex(gUnk021D3410); + gUnk021D3418 = 0x0; + gUnk021D3414 = 0x0; + gUnk021D3400 = 0x0; + gUnk021D3410 = 0x0; +} + +void GX_BeginLoadTexPltt(){ + s32 temp = GX_ResetBankForTexPltt(); + gUnk021D3408 = temp; + gUnk021D3404 = gUnk02103B3C[temp >> 4] << 0xC; +} + +void GX_LoadTexPltt(void *src, u32 offset, u32 size){ + _GX_Load_32_Async(src, (void *)(gUnk021D3404 + offset), size, NULL, NULL); +} + +void GX_EndLoadTexPltt(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForTexPltt(gUnk021D3408); + gUnk021D3408 = 0x0; + gUnk021D3404 = 0x0; +} + +void GX_BeginLoadClearImage(){ + s32 temp = GX_ResetBankForClearImage(); + gUnk021D33FC = temp; + switch (temp) + { + case 2: + case 3: + gUnk021D340C = 0x6800000; + return; + case 8: + case 12: + gUnk021D340C = 0x6840000; + return; + case 1: + gUnk021D340C = 0x67E0000; + return; + case 4: + gUnk021D340C = 0x6820000; + } +} + +void GX_LoadClearImageColor(void *src, u32 size){ + _GX_Load_32_Async(src, (void *)(gUnk021D340C), size, NULL, NULL); +} + +void GX_LoadClearImageDepth(void *src, u32 size){ + _GX_Load_32_Async(src, (void *)(gUnk021D340C + 0x20000), size, NULL, NULL); +} + +void GX_EndLoadClearImage(){ + if (gUnk02106814 != -1) + MI_WaitDma(gUnk02106814); + GX_SetBankForClearImage(gUnk021D33FC); + gUnk021D33FC = 0x0; + gUnk021D340C = 0x0; +} -- cgit v1.2.3 From 42adea6c97323f7e5738dc05c062af0d6fddd66d Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 02:40:41 +0200 Subject: Decompile GX.s --- arm9/lib/src/GX.c | 127 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 arm9/lib/src/GX.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c new file mode 100644 index 00000000..6d979139 --- /dev/null +++ b/arm9/lib/src/GX.c @@ -0,0 +1,127 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern u16 gUnk021D33BC; +extern u16 gUnk021D33C0; +extern u32 gUnk02106814; +extern u16 gUnk02106810; + +void GX_InitGXState(); + +void MI_DmaFill32(u32, void *, u32, u32); +void MIi_CpuClear32(u32, void *, u32); + +void GX_Init(){ + SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000); + SETREG16(HW_REG_POWCNT1, (READREG16(HW_REG_POWCNT1) & ~0x20E) | 0x20E); + SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x1); + GX_InitGXState(); + u32 temp; + while (gUnk021D33BC == 0) + { + temp = OS_GetLockID(); + if (temp == -3) + { + OS_Terminate(); + } + gUnk021D33BC = temp; + } + SETREG16(HW_REG_DISPSTAT, 0x0); + SETREG32(HW_REG_DISPCNT, 0x0); + if (gUnk02106814 != -1) + { + MI_DmaFill32(gUnk02106814, (void *)HW_REG_BG0CNT_A, 0x0, 0x60); + SETREG16(HW_REG_MASTER_BRIGHT, 0x0); + MI_DmaFill32(gUnk02106814, (void *)HW_REG_DISPCNT_2D, 0x0, 0x70); + } + else + { + MIi_CpuClear32(0x0, (void *)HW_REG_BG0CNT_A, 0x60); + SETREG16(HW_REG_MASTER_BRIGHT, 0x0); + MIi_CpuClear32(0x0, (void *)HW_REG_DISPCNT_2D, 0x70); + } + SETREG16(HW_REG_BG2PA_A, 0x100); + SETREG16(HW_REG_BG2PD_A, 0x100); + SETREG16(HW_REG_BG3PA_A, 0x100); + SETREG16(HW_REG_BG3PD_A, 0x100); + SETREG16(HW_REG_BG2PA_B, 0x100); + SETREG16(HW_REG_BG2PD_B, 0x100); + SETREG16(HW_REG_BG3PA_B, 0x100); + SETREG16(HW_REG_BG3PD_B, 0x100); +} + +u32 GX_HBlankIntr(u32 enable){ + u32 temp = READREG16(HW_REG_DISPSTAT) & 0x10; + if (enable) + { + SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x10); + } + else + { + SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x10); + } + return temp; +} + +u32 GX_VBlankIntr(u32 enable){ + u32 temp = READREG16(HW_REG_DISPSTAT) & 0x8; + if (enable) + { + SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x8); + } + else + { + SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x8); + } + return temp; +} + +void GX_DispOff(){ + u32 temp = READREG32(HW_REG_DISPCNT); + gUnk02106810 = 0x0; + gUnk021D33C0 = (temp & 0x30000) >> 0x10; + SETREG32(HW_REG_DISPCNT, temp & ~0x30000); +} + +void GX_DispOn(){ + gUnk02106810 = 0x1; + if (gUnk021D33C0) + { + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x30000 | (gUnk021D33C0 << 0x10)); + + } + else + { + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x10000); + } +} + +void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ + u32 temp2 = READREG32(HW_REG_DISPCNT); + gUnk021D33C0 = mode1; + if (!gUnk02106810) + mode1 = 0; + SETREG32(HW_REG_DISPCNT, (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3)); + if (!gUnk021D33C0) + gUnk02106810 = 0x0; +} + +void GXS_SetGraphicsMode(u32 mode){ + SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x7 | mode); +} + +void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ + if (!brightness) + { + *dst = 0x0; + } + else if (brightness > 0) + { + *dst = 0x4000 | brightness; + } + else + { + *dst = 0x8000 | -brightness; + } +} -- cgit v1.2.3 From 14a5ca7ae49912305b1bcbaa180cfc9fdf8ff17a Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 03:29:32 +0200 Subject: Decompile GX_g2.s --- arm9/lib/src/GX_g2.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 arm9/lib/src/GX_g2.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_g2.c b/arm9/lib/src/GX_g2.c new file mode 100644 index 00000000..7441e302 --- /dev/null +++ b/arm9/lib/src/GX_g2.c @@ -0,0 +1,66 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +void G2x_SetBGyAffine_(u32 *ptr, struct Mtx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 d){ + fx32 temp0, temp1, temp2, temp3; + ptr[0] = ((u16)(fx16)(mtx->_[0] >> 4) | (u16)(fx16)(mtx->_[1] >> 4)<< 0x10); + ptr[1] = ((u16)(fx16)(mtx->_[2] >> 4) | (u16)(fx16)(mtx->_[3] >> 4)<< 0x10); + temp0 = c - a; + temp1 = d - b; + temp2 = mtx->_[0] * temp0 + mtx->_[1] * temp1 + (a << 0xC); + temp3 = mtx->_[2] * temp0 + mtx->_[3] * temp1 + (b << 0xC); + ptr[2] = temp2 >> 4; + ptr[3] = temp3 >> 4; +} + +void G2x_SetBlendAlpha_(u32 *ptr, fx32 a, fx32 b, fx32 c, fx32 d){ + *ptr = ((a | 0x40) | (b << 0x8)) | ((c | (d << 0x8)) << 0x10); +} + +void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness){ + if (brightness < 0) + { + ptr[0] = a | 0xC0; + ptr[2] = -brightness; + } + else + { + ptr[0] = a | 0x80; + ptr[2] = brightness; + } +} + +void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 brightness){ + ptr[1] = c | (d << 0x8); + if (brightness < 0) + { + ptr[0] = 0xC0 | a | (b << 0x8); + ptr[2] = -brightness; + } + else + { + ptr[0] = 0x80 | a | (b << 0x8); + ptr[2] = brightness; + } +} + +void *G2x_ChangeBlendBrightness_(u16 *ptr, fx32 brightness){ + u32 temp = *ptr; + if (brightness < 0) + { + if ((temp & 0xC0) == 0x80) + { + ptr[0] = temp & ~0xC0 | 0xC0; + } + ptr[2] = -brightness; + } + else + { + if ((temp & 0xC0) == 0xC0) + { + ptr[0] = temp & ~0xC0 | 0x80; + } + ptr[2] = brightness; + } +} -- cgit v1.2.3 From 7e9089849989d5e930eb5b5f7cecfd8d2c6c379c Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 03:47:36 +0200 Subject: Decompile GX_g3imm.s and GX_state.s --- arm9/lib/src/GX_g3imm.c | 18 ++++++++++++++++++ arm9/lib/src/GX_state.c | 26 ++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) create mode 100644 arm9/lib/src/GX_g3imm.c create mode 100644 arm9/lib/src/GX_state.c (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c new file mode 100644 index 00000000..f41b5cbf --- /dev/null +++ b/arm9/lib/src/GX_g3imm.c @@ -0,0 +1,18 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +void G3_LoadMtx43(struct Mtx43 *mtx){ + SETREG32(HW_REG_GXFIFO, 0x17); + GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); +} + +void G3_MultMtx43(struct Mtx43 *mtx){ + SETREG32(HW_REG_GXFIFO, 0x19); + GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); +} + +void G3_MultMtx33(struct Mtx33 *mtx){ + SETREG32(HW_REG_GXFIFO, 0x1A); + MI_Copy36B(mtx, (void *)HW_REG_GXFIFO); +} diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c new file mode 100644 index 00000000..52d3c6f5 --- /dev/null +++ b/arm9/lib/src/GX_state.c @@ -0,0 +1,26 @@ +#include "global.h" +#include "main.h" +#include "gx.h" + +extern struct VRAM_banks gUnk021D33C4; + +void GX_InitGXState(){ + gUnk021D33C4.var00 = 0x0; + gUnk021D33C4.var02 = 0x0; + gUnk021D33C4.var04 = 0x0; + gUnk021D33C4.var06 = 0x0; + gUnk021D33C4.var08 = 0x0; + gUnk021D33C4.var0A = 0x0; + gUnk021D33C4.var0C = 0x0; + gUnk021D33C4.var0E = 0x0; + gUnk021D33C4.var10 = 0x0; + gUnk021D33C4.var12 = 0x0; + gUnk021D33C4.var14 = 0x0; + gUnk021D33C4.var16 = 0x0; + gUnk021D33C4.var18 = 0x0; + SETREG32(HW_REG_VRAMCNT_A, 0x0); + SETREG8(HW_REG_VRAMCNT_E, 0x0); + SETREG8(HW_REG_VRAMCNT_F, 0x0); + SETREG8(HW_REG_VRAMCNT_G, 0x0); + SETREG16(HW_REG_VRAMCNT_H, 0x0); +} -- cgit v1.2.3 From 08e4b4f6657bac9d361a9f6948ae6d2bfe50eebf Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 04:03:35 +0200 Subject: Cleanup --- arm9/lib/src/GX.c | 5 --- arm9/lib/src/GX_g3_util.c | 6 --- arm9/lib/src/GX_g3b.c | 2 - arm9/lib/src/GX_g3x.c | 7 ---- arm9/lib/src/GX_load2d.c | 96 ++++++++++++++--------------------------------- arm9/lib/src/GX_load3d.c | 45 +++------------------- arm9/lib/src/GX_vramcnt.c | 2 - 7 files changed, 34 insertions(+), 129 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index 6d979139..9823e8ba 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -7,11 +7,6 @@ extern u16 gUnk021D33C0; extern u32 gUnk02106814; extern u16 gUnk02106810; -void GX_InitGXState(); - -void MI_DmaFill32(u32, void *, u32, u32); -void MIi_CpuClear32(u32, void *, u32); - void GX_Init(){ SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000); SETREG16(HW_REG_POWCNT1, (READREG16(HW_REG_POWCNT1) & ~0x20E) | 0x20E); diff --git a/arm9/lib/src/GX_g3_util.c b/arm9/lib/src/GX_g3_util.c index 049b9366..1cd956ad 100644 --- a/arm9/lib/src/GX_g3_util.c +++ b/arm9/lib/src/GX_g3_util.c @@ -2,13 +2,7 @@ #include "main.h" #include "gx.h" -#define HW_REG_DIV_NUMER 0x04000290 -#define HW_REG_DIV_DENOM 0x04000298 -#define HW_REG_MTX_MODE 0x04000440 -#define HW_REG_MTX_LOAD_4x4 0x04000458 -#define HW_REG_MTX_LOAD_4x3 0x0400045C -#define HW_REG_MTX_MULT_3x3 0x04000468 void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ fx32 fovcot, temp1, temp2; diff --git a/arm9/lib/src/GX_g3b.c b/arm9/lib/src/GX_g3b.c index 1e25adb5..0efe8518 100644 --- a/arm9/lib/src/GX_g3b.c +++ b/arm9/lib/src/GX_g3b.c @@ -3,8 +3,6 @@ #include "gx.h" -void MI_Copy64B(void *src, void *dst); - void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ *(u32 *)displaylist->var00 = 0x16; MI_Copy64B(mtx, displaylist->var04); diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index f9c2adb7..70c4f3fe 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -3,13 +3,6 @@ #include "gx.h" extern u32 gUnk02106814; -void MI_Copy64B(void *, void *); -void MIi_CpuCopy16(void *, void *, u32); -void GXi_NopClearFifo128_(void *); -void MI_Copy16B(void *, void *); -void MI_DmaFill32Async(u32, void *, u32, u32, u32, u32); -void MI_DmaFill32(u32, void *, u32, u32); -void MIi_CpuClear32(u32, void *, u32); asm void GXi_NopClearFifo128_(void *reg){ mov r1, #0x0 diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index b0af0e8c..9ebf24cc 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -12,46 +12,6 @@ extern s32 gUnk021D33E8; extern u32 gUnk021D33E4; extern s32 gUnk021D33E0; -void MI_WaitDma(u32); -void MI_DmaCopy32Async(u32, void *, void *, u32, void *, void *); -void MI_DmaCopy16(u32 unk, void *src, void *dst, u32 size); -void MIi_CpuCopy16(void *src, void *dst, u32 size); -void MI_DmaCopy32(u32 unk, void *src, void *dst, u32 size); -void MIi_CpuCopy32(void *src, void *dst, u32 size); - - -static inline void _GX_Load_16(void *src, u32 offset, u32 size, u32 base){ - if (gUnk02106814 != -1 && size > 0x1C) - { - MI_DmaCopy16(gUnk02106814, src, (void *)(base + offset), size); - } - else - { - MIi_CpuCopy16(src, (void *)(base + offset), size); - } -} - -static inline void _GX_Load_32(void *src, u32 offset, u32 size, u32 base){ - if (gUnk02106814 != -1 && size > 0x30) - { - MI_DmaCopy32(gUnk02106814, src, (void *)(base + offset), size); - } - else - { - MIi_CpuCopy32(src, (void *)(base + offset), size); - } -} - -static inline void _GX_Load_32_Async(void *src, void *dst, u32 size, void *func, void *ptr){ - if (gUnk02106814 != -1) - { - MI_DmaCopy32Async(gUnk02106814, src, dst, size, func, ptr); - } - else - { - MIi_CpuCopy32(src, dst, size); - } -} static inline void *_GX_OBJ_PTR(){ return (void *)0x6400000; @@ -61,117 +21,117 @@ static inline void *_GXS_OBJ_PTR(){ } void GX_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(src, offset, size, 0x5000000); + _GX_Load_16(gUnk02106814, src, (void *)(0x5000000 + offset), size); } void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(src, offset, size, 0x5000400); + _GX_Load_16(gUnk02106814, src, (void *)(0x5000400 + offset), size); } void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(src, offset, size, 0x5000200); + _GX_Load_16(gUnk02106814, src, (void *)(0x5000200 + offset), size); } void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(src, offset, size, 0x5000600); + _GX_Load_16(gUnk02106814, src, (void *)(0x5000600 + offset), size); } void GX_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(src, offset, size, 0x7000000); + _GX_Load_32(gUnk02106814, src, (void *)(0x7000000 + offset), size); } void GXS_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(src, offset, size, 0x7000400); + _GX_Load_32(gUnk02106814, src, (void *)(0x7000400 + offset), size); } void GX_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GX_OBJ_PTR(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GXS_OBJ_PTR(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3ScrPtr(); - _GX_Load_16(src, offset, size, base); + _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GX_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3CharPtr(); - _GX_Load_32(src, offset, size, base); + _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } void GX_BeginLoadBGExtPltt(){ @@ -197,7 +157,7 @@ void GX_BeginLoadBGExtPltt(){ } void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(src, (void *)(gUnk021D33F0 + offset - gUnk021D33EC), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33F0 + offset - gUnk021D33EC), size, NULL, NULL); } void GX_EndLoadBGExtPltt(){ @@ -225,7 +185,7 @@ void GX_BeginLoadOBJExtPltt(){ } void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(src, (void *)(gUnk021D33E4 + offset), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33E4 + offset), size, NULL, NULL); } void GX_EndLoadOBJExtPltt(){ @@ -241,7 +201,7 @@ void GXS_BeginLoadBGExtPltt(){ } void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(src, (void *)(0x06898000 + offset), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); } void GXS_EndLoadBGExtPltt(){ @@ -256,7 +216,7 @@ void GXS_BeginLoadOBJExtPltt(){ } void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(src, (void *)(0x068A0000 + offset), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); } void GXS_EndLoadOBJExtPltt(){ diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index 9ae7427a..bad119fd 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -21,39 +21,6 @@ extern u16 gUnk02103B3C[]; extern s32 gUnk021D33FC; extern u32 gUnk021D340C; -static inline void _GX_Load_16(void *src, void *dst, u32 size){ - if (gUnk02106814 != -1 && size > 0x1C) - { - MI_DmaCopy16(gUnk02106814, src, dst, size); - } - else - { - MIi_CpuCopy16(src, dst, size); - } -} - -static inline void _GX_Load_32(void *src, void *dst, u32 size){ - if (gUnk02106814 != -1 && size > 0x30) - { - MI_DmaCopy32(gUnk02106814, src, dst, size); - } - else - { - MIi_CpuCopy32(src, dst, size); - } -} - -static inline void _GX_Load_32_Async(void *src, void *dst, u32 size, void *func, void *ptr){ - if (gUnk02106814 != -1) - { - MI_DmaCopy32Async(gUnk02106814, src, dst, size, func, ptr); - } - else - { - MIi_CpuCopy32(src, dst, size); - } -} - void GX_BeginLoadTex(){ u32 temp = GX_ResetBankForTex(); gUnk021D3410 = temp; @@ -83,12 +50,12 @@ void GX_LoadTex(void *src, u32 offset, u32 size){ void *temp2 = (void *)gUnk021D3414; u32 temp1 = gUnk021D3418 - offset; temp = (void *)(gUnk021D3400 + offset); - _GX_Load_32(src, temp, temp1); - _GX_Load_32_Async((void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); + _GX_Load_32(gUnk02106814, src, temp, temp1); + _GX_Load_32_Async(gUnk02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); return; } } - _GX_Load_32_Async(src, temp, size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, temp, size, NULL, NULL); } void GX_EndLoadTex(){ @@ -108,7 +75,7 @@ void GX_BeginLoadTexPltt(){ } void GX_LoadTexPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(src, (void *)(gUnk021D3404 + offset), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D3404 + offset), size, NULL, NULL); } void GX_EndLoadTexPltt(){ @@ -141,11 +108,11 @@ void GX_BeginLoadClearImage(){ } void GX_LoadClearImageColor(void *src, u32 size){ - _GX_Load_32_Async(src, (void *)(gUnk021D340C), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C), size, NULL, NULL); } void GX_LoadClearImageDepth(void *src, u32 size){ - _GX_Load_32_Async(src, (void *)(gUnk021D340C + 0x20000), size, NULL, NULL); + _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C + 0x20000), size, NULL, NULL); } void GX_EndLoadClearImage(){ diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index 52be412c..d0ac5f7a 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -5,8 +5,6 @@ extern u16 gUnk021D33BC; extern struct VRAM_banks gUnk021D33C4; -void OSi_UnlockVram(u16, u16); - void GX_VRAMCNT_SetLCDC_(u32 mask){ if (mask & (0x1 << 0)) SETREG8(HW_REG_VRAMCNT_A, 0x80); -- cgit v1.2.3 From a92d77224c8ec645752a56aa35cc8a8457cd4cd3 Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 04:14:48 +0200 Subject: Add ARM_FUNC to GX --- arm9/lib/src/GX.c | 16 ++++---- arm9/lib/src/GX_bgcnt.c | 32 +++++++-------- arm9/lib/src/GX_g2.c | 10 ++--- arm9/lib/src/GX_g3.c | 4 +- arm9/lib/src/GX_g3_util.c | 13 +++--- arm9/lib/src/GX_g3b.c | 28 ++++++------- arm9/lib/src/GX_g3imm.c | 6 +-- arm9/lib/src/GX_g3x.c | 34 ++++++++-------- arm9/lib/src/GX_load2d.c | 72 ++++++++++++++++---------------- arm9/lib/src/GX_load3d.c | 20 ++++----- arm9/lib/src/GX_state.c | 2 +- arm9/lib/src/GX_vramcnt.c | 102 +++++++++++++++++++++++----------------------- 12 files changed, 169 insertions(+), 170 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index 9823e8ba..bae16fca 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -7,7 +7,7 @@ extern u16 gUnk021D33C0; extern u32 gUnk02106814; extern u16 gUnk02106810; -void GX_Init(){ +ARM_FUNC void GX_Init(){ SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000); SETREG16(HW_REG_POWCNT1, (READREG16(HW_REG_POWCNT1) & ~0x20E) | 0x20E); SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x1); @@ -46,7 +46,7 @@ void GX_Init(){ SETREG16(HW_REG_BG3PD_B, 0x100); } -u32 GX_HBlankIntr(u32 enable){ +ARM_FUNC u32 GX_HBlankIntr(u32 enable){ u32 temp = READREG16(HW_REG_DISPSTAT) & 0x10; if (enable) { @@ -59,7 +59,7 @@ u32 GX_HBlankIntr(u32 enable){ return temp; } -u32 GX_VBlankIntr(u32 enable){ +ARM_FUNC u32 GX_VBlankIntr(u32 enable){ u32 temp = READREG16(HW_REG_DISPSTAT) & 0x8; if (enable) { @@ -72,14 +72,14 @@ u32 GX_VBlankIntr(u32 enable){ return temp; } -void GX_DispOff(){ +ARM_FUNC void GX_DispOff(){ u32 temp = READREG32(HW_REG_DISPCNT); gUnk02106810 = 0x0; gUnk021D33C0 = (temp & 0x30000) >> 0x10; SETREG32(HW_REG_DISPCNT, temp & ~0x30000); } -void GX_DispOn(){ +ARM_FUNC void GX_DispOn(){ gUnk02106810 = 0x1; if (gUnk021D33C0) { @@ -92,7 +92,7 @@ void GX_DispOn(){ } } -void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ +ARM_FUNC void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ u32 temp2 = READREG32(HW_REG_DISPCNT); gUnk021D33C0 = mode1; if (!gUnk02106810) @@ -102,11 +102,11 @@ void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ gUnk02106810 = 0x0; } -void GXS_SetGraphicsMode(u32 mode){ +ARM_FUNC void GXS_SetGraphicsMode(u32 mode){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x7 | mode); } -void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ +ARM_FUNC void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ if (!brightness) { *dst = 0x0; diff --git a/arm9/lib/src/GX_bgcnt.c b/arm9/lib/src/GX_bgcnt.c index 918f4d32..1eeffab6 100644 --- a/arm9/lib/src/GX_bgcnt.c +++ b/arm9/lib/src/GX_bgcnt.c @@ -2,25 +2,25 @@ #include "main.h" #include "gx.h" -void *G2_GetBG0ScrPtr(){ +ARM_FUNC void *G2_GetBG0ScrPtr(){ u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x1F00) >> 0x8) << 0xB); return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); } -void *G2S_GetBG0ScrPtr(){ +ARM_FUNC void *G2S_GetBG0ScrPtr(){ return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x1F00) >> 0x8) << 0xB)); } -void *G2_GetBG1ScrPtr(){ +ARM_FUNC void *G2_GetBG1ScrPtr(){ u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x1F00) >> 0x8) << 0xB); return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); } -void *G2S_GetBG1ScrPtr(){ +ARM_FUNC void *G2S_GetBG1ScrPtr(){ return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x1F00) >> 0x8) << 0xB)); } -void *G2_GetBG2ScrPtr(){ +ARM_FUNC void *G2_GetBG2ScrPtr(){ u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); u32 temp3 = READREG16(HW_REG_BG2CNT_A); u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); @@ -45,7 +45,7 @@ void *G2_GetBG2ScrPtr(){ } } -void *G2S_GetBG2ScrPtr(){ +ARM_FUNC void *G2S_GetBG2ScrPtr(){ u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); u32 temp3 = READREG16(HW_REG_BG2CNT_B); u32 temp1 = ((temp3 & 0x1F00) >> 0x8); @@ -69,7 +69,7 @@ void *G2S_GetBG2ScrPtr(){ } } -void *G2_GetBG3ScrPtr(){ +ARM_FUNC void *G2_GetBG3ScrPtr(){ u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); u32 temp3 = READREG16(HW_REG_BG3CNT_A); u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); @@ -94,7 +94,7 @@ void *G2_GetBG3ScrPtr(){ } } -void *G2S_GetBG3ScrPtr(){ +ARM_FUNC void *G2S_GetBG3ScrPtr(){ u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); u32 temp3 = READREG16(HW_REG_BG3CNT_B); u32 temp1 = ((temp3 & 0x1F00) >> 0x8); @@ -118,25 +118,25 @@ void *G2S_GetBG3ScrPtr(){ } } -void *G2_GetBG0CharPtr(){ +ARM_FUNC void *G2_GetBG0CharPtr(){ u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x3C) >> 0x2) << 0xE); return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); } -void *G2S_GetBG0CharPtr(){ +ARM_FUNC void *G2S_GetBG0CharPtr(){ return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x3C) >> 0x2) << 0xE)); } -void *G2_GetBG1CharPtr(){ +ARM_FUNC void *G2_GetBG1CharPtr(){ u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x3C) >> 0x2) << 0xE); return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); } -void *G2S_GetBG1CharPtr(){ +ARM_FUNC void *G2S_GetBG1CharPtr(){ return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x3C) >> 0x2) << 0xE)); } -void *G2_GetBG2CharPtr(){ +ARM_FUNC void *G2_GetBG2CharPtr(){ s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); u32 temp = READREG16(HW_REG_BG2CNT_A); if (temp1 < 5 || !(temp & 0x80)) @@ -151,7 +151,7 @@ void *G2_GetBG2CharPtr(){ } } -void *G2S_GetBG2CharPtr(){ +ARM_FUNC void *G2S_GetBG2CharPtr(){ s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); u32 temp = READREG16(HW_REG_BG2CNT_B); if (temp1 < 5 || !(temp & 0x80)) @@ -165,7 +165,7 @@ void *G2S_GetBG2CharPtr(){ } } -void *G2_GetBG3CharPtr(){ +ARM_FUNC void *G2_GetBG3CharPtr(){ s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); u32 temp = READREG16(HW_REG_BG3CNT_A); if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) @@ -180,7 +180,7 @@ void *G2_GetBG3CharPtr(){ } } -void *G2S_GetBG3CharPtr(){ +ARM_FUNC void *G2S_GetBG3CharPtr(){ s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); u32 temp = READREG16(HW_REG_BG3CNT_B); if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) diff --git a/arm9/lib/src/GX_g2.c b/arm9/lib/src/GX_g2.c index 7441e302..5bced1ef 100644 --- a/arm9/lib/src/GX_g2.c +++ b/arm9/lib/src/GX_g2.c @@ -2,7 +2,7 @@ #include "main.h" #include "gx.h" -void G2x_SetBGyAffine_(u32 *ptr, struct Mtx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 d){ +ARM_FUNC void G2x_SetBGyAffine_(u32 *ptr, struct Mtx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 d){ fx32 temp0, temp1, temp2, temp3; ptr[0] = ((u16)(fx16)(mtx->_[0] >> 4) | (u16)(fx16)(mtx->_[1] >> 4)<< 0x10); ptr[1] = ((u16)(fx16)(mtx->_[2] >> 4) | (u16)(fx16)(mtx->_[3] >> 4)<< 0x10); @@ -14,11 +14,11 @@ void G2x_SetBGyAffine_(u32 *ptr, struct Mtx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 ptr[3] = temp3 >> 4; } -void G2x_SetBlendAlpha_(u32 *ptr, fx32 a, fx32 b, fx32 c, fx32 d){ +ARM_FUNC void G2x_SetBlendAlpha_(u32 *ptr, fx32 a, fx32 b, fx32 c, fx32 d){ *ptr = ((a | 0x40) | (b << 0x8)) | ((c | (d << 0x8)) << 0x10); } -void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness){ +ARM_FUNC void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness){ if (brightness < 0) { ptr[0] = a | 0xC0; @@ -31,7 +31,7 @@ void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness){ } } -void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 brightness){ +ARM_FUNC void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 brightness){ ptr[1] = c | (d << 0x8); if (brightness < 0) { @@ -45,7 +45,7 @@ void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 b } } -void *G2x_ChangeBlendBrightness_(u16 *ptr, fx32 brightness){ +ARM_FUNC void *G2x_ChangeBlendBrightness_(u16 *ptr, fx32 brightness){ u32 temp = *ptr; if (brightness < 0) { diff --git a/arm9/lib/src/GX_g3.c b/arm9/lib/src/GX_g3.c index 66e34dc7..eb01453d 100644 --- a/arm9/lib/src/GX_g3.c +++ b/arm9/lib/src/GX_g3.c @@ -3,7 +3,7 @@ #include "gx.h" -void G3_BeginMakeDL(struct DL *displaylist, void *r1, u32 r2){ +ARM_FUNC void G3_BeginMakeDL(struct DL *displaylist, void *r1, u32 r2){ displaylist->var0C = r2; displaylist->var08 = r1; displaylist->var00 = r1; @@ -11,7 +11,7 @@ void G3_BeginMakeDL(struct DL *displaylist, void *r1, u32 r2){ displaylist->var10 = 0x0; } -s32 G3_EndMakeDL(struct DL *displaylist){ +ARM_FUNC s32 G3_EndMakeDL(struct DL *displaylist){ if (displaylist->var08 == displaylist->var00) return 0; //pads the buffer with 0 to 4byte alignment if needed diff --git a/arm9/lib/src/GX_g3_util.c b/arm9/lib/src/GX_g3_util.c index 1cd956ad..75e18589 100644 --- a/arm9/lib/src/GX_g3_util.c +++ b/arm9/lib/src/GX_g3_util.c @@ -3,8 +3,7 @@ #include "gx.h" - -void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ +ARM_FUNC void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ fx32 fovcot, temp1, temp2; fx64c temp0; vu32 *reg_ptr; @@ -76,7 +75,7 @@ void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far } } -void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ +ARM_FUNC void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ fx64c temp1, temp2, temp3; fx32 temp0, temp4, temp5; vu32 *reg_ptr; @@ -167,7 +166,7 @@ void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 near, fx32 f } } -void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, u32 load, struct Mtx44 *mtx){ +ARM_FUNC void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, u32 load, struct Mtx44 *mtx){ struct Vecx32 temp, temp1, temp2; fx32 c1, c2, c3; vu32 *reg_ptr; @@ -218,7 +217,7 @@ void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, u32 load, } } -void G3_RotX(fx32 sinphi, fx32 cosphi){ +ARM_FUNC void G3_RotX(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; *reg_ptr = 0x1000; @@ -232,7 +231,7 @@ void G3_RotX(fx32 sinphi, fx32 cosphi){ *reg_ptr = cosphi; } -void G3_RotY(fx32 sinphi, fx32 cosphi){ +ARM_FUNC void G3_RotY(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; *reg_ptr = cosphi; @@ -246,7 +245,7 @@ void G3_RotY(fx32 sinphi, fx32 cosphi){ *reg_ptr = cosphi; } -void G3_RotZ(fx32 sinphi, fx32 cosphi){ +ARM_FUNC void G3_RotZ(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; *reg_ptr = cosphi; diff --git a/arm9/lib/src/GX_g3b.c b/arm9/lib/src/GX_g3b.c index 0efe8518..50281ec0 100644 --- a/arm9/lib/src/GX_g3b.c +++ b/arm9/lib/src/GX_g3b.c @@ -3,32 +3,32 @@ #include "gx.h" -void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ +ARM_FUNC void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ *(u32 *)displaylist->var00 = 0x16; MI_Copy64B(mtx, displaylist->var04); } -void G3B_PushMtx(struct DL *displaylist){ +ARM_FUNC void G3B_PushMtx(struct DL *displaylist){ *(u32 *)displaylist->var00 = 0x11; displaylist->var00 = (u8 *)displaylist->var04; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_PopMtx(struct DL *displaylist, void *mtx){ +ARM_FUNC void G3B_PopMtx(struct DL *displaylist, void *mtx){ *(u32 *)displaylist->var00 = 0x12; *displaylist->var04 = (u32)mtx; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ +ARM_FUNC void G3B_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ G3BS_LoadMtx44(displaylist, mtx); displaylist->var00 = (u8 *)displaylist->var04 + sizeof(struct Mtx44); displaylist->var04 = (u32 *)displaylist->var00 + 1; } //color format is RGB555, stored in the lower bits -void G3B_Color(struct DL * displaylist, u32 vtx_col){ +ARM_FUNC void G3B_Color(struct DL * displaylist, u32 vtx_col){ *(u32 *)displaylist->var00 = 0x20; *displaylist->var04 = vtx_col; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; @@ -40,14 +40,14 @@ Only feed normalized Vectors only the fractional part and the sign, which is in the first nonfraction bit since the vector is assumed to be normalized, are used */ -void G3B_Normal(struct DL * displaylist, fx16 x, fx16 y, fx16 z){ +ARM_FUNC void G3B_Normal(struct DL * displaylist, fx16 x, fx16 y, fx16 z){ *(u32 *)displaylist->var00 = 0x21; *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) ; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_Vtx(struct DL * displaylist, fx32 x, fx32 y, fx32 z){ +ARM_FUNC void G3B_Vtx(struct DL * displaylist, fx32 x, fx32 y, fx32 z){ *(u32 *)displaylist->var00 = 0x23; displaylist->var04[0] = (u32)(u16)x | (u32)(u16)y << 0x10; displaylist->var04[1] = (u32)(u16)z; @@ -56,14 +56,14 @@ void G3B_Vtx(struct DL * displaylist, fx32 x, fx32 y, fx32 z){ } //TODO: name arguments -void G3B_PolygonAttr(struct DL *displaylist, u32 r1, u32 r2, u32 r3, u32 r4, u32 r5, u32 r6){ +ARM_FUNC void G3B_PolygonAttr(struct DL *displaylist, u32 r1, u32 r2, u32 r3, u32 r4, u32 r5, u32 r6){ *(u32 *)displaylist->var00 = 0x29; *displaylist->var04 = r1 | r2 << 0x4 | r3 << 0x6 | r6 | r4 << 0x18 | r5 << 0x10; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_MaterialColorDiffAmb(struct DL *displaylist, u32 diffuse_col, u32 ambient_col, u32 replace){ +ARM_FUNC void G3B_MaterialColorDiffAmb(struct DL *displaylist, u32 diffuse_col, u32 ambient_col, u32 replace){ *(u32 *)displaylist->var00 = 0x30; u32 replace_vtx_color_with_diffuse; if (replace) @@ -75,7 +75,7 @@ void G3B_MaterialColorDiffAmb(struct DL *displaylist, u32 diffuse_col, u32 ambie displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_MaterialColorSpecEmi(struct DL *displaylist, u32 specular_col, u32 emission_col, u32 shiny_table){ +ARM_FUNC void G3B_MaterialColorSpecEmi(struct DL *displaylist, u32 specular_col, u32 emission_col, u32 shiny_table){ *(u32 *)displaylist->var00 = 0x31; u32 enable_shininess_table; if (shiny_table) @@ -92,28 +92,28 @@ Only feed normalized Vectors only the fractional part and the sign, which is in the first nonfraction bit since the vector is assumed to be normalized, are used */ -void G3B_LightVector(struct DL * displaylist, u32 light_num, fx16 x, fx16 y, fx16 z){ +ARM_FUNC void G3B_LightVector(struct DL * displaylist, u32 light_num, fx16 x, fx16 y, fx16 z){ *(u32 *)displaylist->var00 = 0x32; *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) | light_num << 0x1E; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_LightColor(struct DL * displaylist, u32 light_num, u32 col){ +ARM_FUNC void G3B_LightColor(struct DL * displaylist, u32 light_num, u32 col){ *(u32 *)displaylist->var00 = 0x33; *displaylist->var04 = col | light_num << 0x1E; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_Begin(struct DL * displaylist, u32 type){ +ARM_FUNC void G3B_Begin(struct DL * displaylist, u32 type){ *(u32 *)displaylist->var00 = 0x40; *displaylist->var04 = type; displaylist->var00 = (u8 *)displaylist->var04 + 0x4; displaylist->var04 = (u32 *)displaylist->var00 + 1; } -void G3B_End(struct DL * displaylist){ +ARM_FUNC void G3B_End(struct DL * displaylist){ *(u32 *)displaylist->var00 = 0x41; displaylist->var00 = (u8 *)displaylist->var04; displaylist->var04 = (u32 *)displaylist->var00 + 1; diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c index f41b5cbf..f11e2927 100644 --- a/arm9/lib/src/GX_g3imm.c +++ b/arm9/lib/src/GX_g3imm.c @@ -2,17 +2,17 @@ #include "main.h" #include "gx.h" -void G3_LoadMtx43(struct Mtx43 *mtx){ +ARM_FUNC void G3_LoadMtx43(struct Mtx43 *mtx){ SETREG32(HW_REG_GXFIFO, 0x17); GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); } -void G3_MultMtx43(struct Mtx43 *mtx){ +ARM_FUNC void G3_MultMtx43(struct Mtx43 *mtx){ SETREG32(HW_REG_GXFIFO, 0x19); GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); } -void G3_MultMtx33(struct Mtx33 *mtx){ +ARM_FUNC void G3_MultMtx33(struct Mtx33 *mtx){ SETREG32(HW_REG_GXFIFO, 0x1A); MI_Copy36B(mtx, (void *)HW_REG_GXFIFO); } diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index 70c4f3fe..7ced9de6 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -4,7 +4,7 @@ extern u32 gUnk02106814; -asm void GXi_NopClearFifo128_(void *reg){ +ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){ mov r1, #0x0 mov r2, #0x0 mov r3, #0x0 @@ -44,7 +44,7 @@ asm void GXi_NopClearFifo128_(void *reg){ bx lr } -void G3X_Init(){ +ARM_FUNC void G3X_Init(){ G3X_ClearFifo(); SETREG32(HW_REG_END_VTXS, 0x0); while (READREG32(HW_REG_GXSTAT) & 0x8000000); //wait for geometry engine to not be busy @@ -71,7 +71,7 @@ void G3X_Init(){ SETREG32(HW_REG_PLTT_BASE, 0x0); } -void G3X_ResetMtxStack(){ +ARM_FUNC void G3X_ResetMtxStack(){ while (READREG32(HW_REG_GXSTAT) & 0x8000000); SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x2000); @@ -82,12 +82,12 @@ void G3X_ResetMtxStack(){ SETREG32(HW_REG_PLTT_BASE, 0x0); } -void G3X_ClearFifo(){ +ARM_FUNC void G3X_ClearFifo(){ GXi_NopClearFifo128_((void *)HW_REG_GXFIFO); while (READREG32(HW_REG_GXSTAT) & 0x8000000); } -void G3X_InitMtxStack(){ +ARM_FUNC void G3X_InitMtxStack(){ u32 PV_level, PJ_level; SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); while (G3X_GetMtxStackLevelPV(&PV_level)); @@ -105,7 +105,7 @@ void G3X_InitMtxStack(){ SETREG32(HW_REG_MTX_IDENTITY, 0x0); } -void G3X_ResetMtxStack_2(){ +ARM_FUNC void G3X_ResetMtxStack_2(){ u32 PV_level, PJ_level; SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); while (G3X_GetMtxStackLevelPV(&PV_level)); @@ -124,7 +124,7 @@ void G3X_ResetMtxStack_2(){ } -void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){ +ARM_FUNC void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){ if (enable) { SETREG16(HW_REG_FOG_OFFSET, offset); @@ -137,7 +137,7 @@ void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){ } } -u32 G3X_GetClipMtx(struct Mtx44 *dst){ +ARM_FUNC u32 G3X_GetClipMtx(struct Mtx44 *dst){ if (READREG32(HW_REG_GXSTAT) & 0x8000000) { return -1; @@ -149,7 +149,7 @@ u32 G3X_GetClipMtx(struct Mtx44 *dst){ } } -u32 G3X_GetVectorMtx(struct Mtx33 *dst){ +ARM_FUNC u32 G3X_GetVectorMtx(struct Mtx33 *dst){ if (READREG32(HW_REG_GXSTAT) & 0x8000000) { return -1; @@ -161,15 +161,15 @@ u32 G3X_GetVectorMtx(struct Mtx33 *dst){ } } -void G3X_SetEdgeColorTable(void *tbl_ptr){ +ARM_FUNC void G3X_SetEdgeColorTable(void *tbl_ptr){ MIi_CpuCopy16(tbl_ptr, (void *)HW_REG_EDGE_COLOR, 0x10); } -void G3X_SetFogTable(void *tbl_ptr){ +ARM_FUNC void G3X_SetFogTable(void *tbl_ptr){ MI_Copy16B(tbl_ptr, (void *)HW_REG_FOG_TABLE); } -void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){ +ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){ u32 temp = col | (alpha << 0x10) | (polygon_id << 0x18); if (enable_fog) temp |= 0x8000; @@ -177,7 +177,7 @@ void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable SETREG16(HW_REG_CLEAR_DEPTH, depth); } -void G3X_InitTable(){ +ARM_FUNC void G3X_InitTable(){ if (gUnk02106814 != -1) { MI_DmaFill32Async(gUnk02106814, (void *)HW_REG_EDGE_COLOR, 0x0, 0x10, 0x0, 0x0); @@ -194,7 +194,7 @@ void G3X_InitTable(){ } } -u32 G3X_GetMtxStackLevelPV(u32 *level){ +ARM_FUNC u32 G3X_GetMtxStackLevelPV(u32 *level){ if (READREG32(HW_REG_GXSTAT) & 0x4000) { return -1; @@ -206,7 +206,7 @@ u32 G3X_GetMtxStackLevelPV(u32 *level){ } } -u32 G3X_GetMtxStackLevelPJ(u32 *level){ +ARM_FUNC u32 G3X_GetMtxStackLevelPJ(u32 *level){ if (READREG32(HW_REG_GXSTAT) & 0x4000) { return -1; @@ -218,7 +218,7 @@ u32 G3X_GetMtxStackLevelPJ(u32 *level){ } } -u32 G3X_GetBoxTestResult(u32 *result){ +ARM_FUNC u32 G3X_GetBoxTestResult(u32 *result){ if (READREG32(HW_REG_GXSTAT) & 0x1) { return -1; @@ -230,6 +230,6 @@ u32 G3X_GetBoxTestResult(u32 *result){ } } -void G3X_SetHOffset(u32 offset){ +ARM_FUNC void G3X_SetHOffset(u32 offset){ SETREG32(HW_REG_BG0HOFS, offset); } diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index 9ebf24cc..972babad 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -20,121 +20,121 @@ static inline void *_GXS_OBJ_PTR(){ return (void *)0x6600000; } -void GX_LoadBGPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBGPltt(void *src, u32 offset, u32 size){ _GX_Load_16(gUnk02106814, src, (void *)(0x5000000 + offset), size); } -void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ _GX_Load_16(gUnk02106814, src, (void *)(0x5000400 + offset), size); } -void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ _GX_Load_16(gUnk02106814, src, (void *)(0x5000200 + offset), size); } -void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ _GX_Load_16(gUnk02106814, src, (void *)(0x5000600 + offset), size); } -void GX_LoadOAM(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadOAM(void *src, u32 offset, u32 size){ _GX_Load_32(gUnk02106814, src, (void *)(0x7000000 + offset), size); } -void GXS_LoadOAM(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadOAM(void *src, u32 offset, u32 size){ _GX_Load_32(gUnk02106814, src, (void *)(0x7000400 + offset), size); } -void GX_LoadOBJ(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GX_OBJ_PTR(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadOBJ(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GXS_OBJ_PTR(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3ScrPtr(); _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG0Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG1Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG2Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GX_LoadBG3Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3CharPtr(); _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); } -void GX_BeginLoadBGExtPltt(){ +ARM_FUNC void GX_BeginLoadBGExtPltt(){ gUnk021D33F4 = GX_ResetBankForBGExtPltt(); switch (gUnk021D33F4) { @@ -156,11 +156,11 @@ void GX_BeginLoadBGExtPltt(){ } } -void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33F0 + offset - gUnk021D33EC), size, NULL, NULL); } -void GX_EndLoadBGExtPltt(){ +ARM_FUNC void GX_EndLoadBGExtPltt(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForBGExtPltt(gUnk021D33F4); @@ -169,7 +169,7 @@ void GX_EndLoadBGExtPltt(){ gUnk021D33EC = 0x0; } -void GX_BeginLoadOBJExtPltt(){ +ARM_FUNC void GX_BeginLoadOBJExtPltt(){ gUnk021D33E8 = GX_ResetBankForOBJExtPltt(); switch (gUnk021D33E8) { @@ -184,11 +184,11 @@ void GX_BeginLoadOBJExtPltt(){ } } -void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33E4 + offset), size, NULL, NULL); } -void GX_EndLoadOBJExtPltt(){ +ARM_FUNC void GX_EndLoadOBJExtPltt(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForOBJExtPltt(gUnk021D33E8); @@ -196,30 +196,30 @@ void GX_EndLoadOBJExtPltt(){ gUnk021D33E4 = 0x0; } -void GXS_BeginLoadBGExtPltt(){ +ARM_FUNC void GXS_BeginLoadBGExtPltt(){ gUnk021D33E0 = FUN_020C6034(); } -void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); } -void GXS_EndLoadBGExtPltt(){ +ARM_FUNC void GXS_EndLoadBGExtPltt(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForSubBGExtPltt(gUnk021D33E0); gUnk021D33E0 = 0x0; } -void GXS_BeginLoadOBJExtPltt(){ +ARM_FUNC void GXS_BeginLoadOBJExtPltt(){ gUnk021D33F8 = GX_ResetBankForSubOBJ(); } -void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); } -void GXS_EndLoadOBJExtPltt(){ +ARM_FUNC void GXS_EndLoadOBJExtPltt(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForSubOBJExtPltt(gUnk021D33F8); diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index bad119fd..ee7502db 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -21,7 +21,7 @@ extern u16 gUnk02103B3C[]; extern s32 gUnk021D33FC; extern u32 gUnk021D340C; -void GX_BeginLoadTex(){ +ARM_FUNC void GX_BeginLoadTex(){ u32 temp = GX_ResetBankForTex(); gUnk021D3410 = temp; gUnk021D3400 = gUnk02103B4C[temp * 3] << 0xC; @@ -29,7 +29,7 @@ void GX_BeginLoadTex(){ gUnk021D3418 = gUnk02103B50[temp * 3] << 0xC; } -void GX_LoadTex(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadTex(void *src, u32 offset, u32 size){ void *temp; if (!gUnk021D3414) { @@ -58,7 +58,7 @@ void GX_LoadTex(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, temp, size, NULL, NULL); } -void GX_EndLoadTex(){ +ARM_FUNC void GX_EndLoadTex(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForTex(gUnk021D3410); @@ -68,17 +68,17 @@ void GX_EndLoadTex(){ gUnk021D3410 = 0x0; } -void GX_BeginLoadTexPltt(){ +ARM_FUNC void GX_BeginLoadTexPltt(){ s32 temp = GX_ResetBankForTexPltt(); gUnk021D3408 = temp; gUnk021D3404 = gUnk02103B3C[temp >> 4] << 0xC; } -void GX_LoadTexPltt(void *src, u32 offset, u32 size){ +ARM_FUNC void GX_LoadTexPltt(void *src, u32 offset, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D3404 + offset), size, NULL, NULL); } -void GX_EndLoadTexPltt(){ +ARM_FUNC void GX_EndLoadTexPltt(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForTexPltt(gUnk021D3408); @@ -86,7 +86,7 @@ void GX_EndLoadTexPltt(){ gUnk021D3404 = 0x0; } -void GX_BeginLoadClearImage(){ +ARM_FUNC void GX_BeginLoadClearImage(){ s32 temp = GX_ResetBankForClearImage(); gUnk021D33FC = temp; switch (temp) @@ -107,15 +107,15 @@ void GX_BeginLoadClearImage(){ } } -void GX_LoadClearImageColor(void *src, u32 size){ +ARM_FUNC void GX_LoadClearImageColor(void *src, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C), size, NULL, NULL); } -void GX_LoadClearImageDepth(void *src, u32 size){ +ARM_FUNC void GX_LoadClearImageDepth(void *src, u32 size){ _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C + 0x20000), size, NULL, NULL); } -void GX_EndLoadClearImage(){ +ARM_FUNC void GX_EndLoadClearImage(){ if (gUnk02106814 != -1) MI_WaitDma(gUnk02106814); GX_SetBankForClearImage(gUnk021D33FC); diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c index 52d3c6f5..38968523 100644 --- a/arm9/lib/src/GX_state.c +++ b/arm9/lib/src/GX_state.c @@ -4,7 +4,7 @@ extern struct VRAM_banks gUnk021D33C4; -void GX_InitGXState(){ +ARM_FUNC void GX_InitGXState(){ gUnk021D33C4.var00 = 0x0; gUnk021D33C4.var02 = 0x0; gUnk021D33C4.var04 = 0x0; diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index d0ac5f7a..24862470 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -5,7 +5,7 @@ extern u16 gUnk021D33BC; extern struct VRAM_banks gUnk021D33C4; -void GX_VRAMCNT_SetLCDC_(u32 mask){ +ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ if (mask & (0x1 << 0)) SETREG8(HW_REG_VRAMCNT_A, 0x80); if (mask & (0x1 << 1)) @@ -26,7 +26,7 @@ void GX_VRAMCNT_SetLCDC_(u32 mask){ SETREG8(HW_REG_VRAMCNT_I, 0x80); } -void GX_SetBankForBG(s32 bg){ +ARM_FUNC void GX_SetBankForBG(s32 bg){ gUnk021D33C4.var00 = (u16)(~bg & (gUnk021D33C4.var00 | gUnk021D33C4.var02)); gUnk021D33C4.var02 = bg; switch (bg) @@ -99,7 +99,7 @@ void GX_SetBankForBG(s32 bg){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForOBJ(s32 obj){ +ARM_FUNC void GX_SetBankForOBJ(s32 obj){ gUnk021D33C4.var00 = (u16)(~obj & (gUnk021D33C4.var00 | gUnk021D33C4.var04)); gUnk021D33C4.var04 = obj; switch (obj) @@ -138,7 +138,7 @@ void GX_SetBankForOBJ(s32 obj){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForBGExtPltt(s32 bgextpltt){ +ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ gUnk021D33C4.var00 = (u16)(~bgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0E)); gUnk021D33C4.var0E = bgextpltt; switch (bgextpltt) @@ -164,7 +164,7 @@ void GX_SetBankForBGExtPltt(s32 bgextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForOBJExtPltt(s32 objextpltt){ +ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ gUnk021D33C4.var00 = (u16)(~objextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var10)); gUnk021D33C4.var10 = objextpltt; switch (objextpltt) @@ -184,7 +184,7 @@ void GX_SetBankForOBJExtPltt(s32 objextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForTex(s32 tex){ +ARM_FUNC void GX_SetBankForTex(s32 tex){ gUnk021D33C4.var00 = (u16)(~tex & (gUnk021D33C4.var00 | gUnk021D33C4.var08)); gUnk021D33C4.var08 = tex; if (tex == 0) @@ -247,7 +247,7 @@ void GX_SetBankForTex(s32 tex){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForTexPltt(s32 texpltt){ +ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ gUnk021D33C4.var00 = (u16)(~texpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0A)); gUnk021D33C4.var0A = texpltt; switch (texpltt) @@ -273,7 +273,7 @@ void GX_SetBankForTexPltt(s32 texpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForClearImage(s32 clearimage){ +ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ gUnk021D33C4.var00 = (u16)(~clearimage & (gUnk021D33C4.var00 | gUnk021D33C4.var0C)); gUnk021D33C4.var0C = clearimage; switch (clearimage) @@ -304,7 +304,7 @@ void GX_SetBankForClearImage(s32 clearimage){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForARM7(s32 arm7){ +ARM_FUNC void GX_SetBankForARM7(s32 arm7){ gUnk021D33C4.var00 = (u16)(~arm7 & (gUnk021D33C4.var00 | gUnk021D33C4.var06)); gUnk021D33C4.var06 = arm7; switch (arm7) @@ -324,12 +324,12 @@ void GX_SetBankForARM7(s32 arm7){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForLCDC(s32 lcdc){ +ARM_FUNC void GX_SetBankForLCDC(s32 lcdc){ gUnk021D33C4.var00 |= lcdc; GX_VRAMCNT_SetLCDC_(lcdc); } -void GX_SetBankForSubBG(s32 subbg){ +ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ gUnk021D33C4.var00 = (u16)(~subbg & (gUnk021D33C4.var00 | gUnk021D33C4.var12)); gUnk021D33C4.var12 = subbg; switch (subbg) @@ -348,7 +348,7 @@ void GX_SetBankForSubBG(s32 subbg){ } -void GX_SetBankForSubOBJ(s32 subobj){ +ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ gUnk021D33C4.var00 = (u16)(~subobj & (gUnk021D33C4.var00 | gUnk021D33C4.var14)); gUnk021D33C4.var14 = subobj; switch (subobj) @@ -365,7 +365,7 @@ void GX_SetBankForSubOBJ(s32 subobj){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ +ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ gUnk021D33C4.var00 = (u16)(~subbgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var16)); gUnk021D33C4.var16 = subbgextpltt; switch (subbgextpltt) @@ -381,7 +381,7 @@ void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ +ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ gUnk021D33C4.var00 = (u16)(~subobjextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var18)); gUnk021D33C4.var18 = subobjextpltt; switch (subobjextpltt) @@ -397,7 +397,7 @@ void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); } -u32 FUN_020C6130(u16 *ptr){ +ARM_FUNC u32 FUN_020C6130(u16 *ptr){ u16 temp = *ptr; *ptr = 0; gUnk021D33C4.var00 |= temp; @@ -405,55 +405,55 @@ u32 FUN_020C6130(u16 *ptr){ return temp; } -u32 GX_ResetBankForBG(){ +ARM_FUNC u32 GX_ResetBankForBG(){ return FUN_020C6130(&gUnk021D33C4.var02); } -u32 GX_ResetBankForOBJ(){ +ARM_FUNC u32 GX_ResetBankForOBJ(){ return FUN_020C6130(&gUnk021D33C4.var04); } -u32 GX_ResetBankForBGExtPltt(){ +ARM_FUNC u32 GX_ResetBankForBGExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); return FUN_020C6130(&gUnk021D33C4.var0E); } -u32 GX_ResetBankForOBJExtPltt(){ +ARM_FUNC u32 GX_ResetBankForOBJExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); return FUN_020C6130(&gUnk021D33C4.var10); } -u32 GX_ResetBankForTex(){ +ARM_FUNC u32 GX_ResetBankForTex(){ return FUN_020C6130(&gUnk021D33C4.var08); } -u32 GX_ResetBankForTexPltt(){ +ARM_FUNC u32 GX_ResetBankForTexPltt(){ return FUN_020C6130(&gUnk021D33C4.var0A); } -u32 GX_ResetBankForClearImage(){ +ARM_FUNC u32 GX_ResetBankForClearImage(){ return FUN_020C6130(&gUnk021D33C4.var0C); } -u32 GX_ResetBankForSubBG(){ +ARM_FUNC u32 GX_ResetBankForSubBG(){ return FUN_020C6130(&gUnk021D33C4.var12); } -u32 FUN_020C605C(){ +ARM_FUNC u32 FUN_020C605C(){ return FUN_020C6130(&gUnk021D33C4.var14); } -u32 FUN_020C6034(){ +ARM_FUNC u32 FUN_020C6034(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); return FUN_020C6130(&gUnk021D33C4.var16); } -u32 GX_ResetBankForSubOBJ(){ +ARM_FUNC u32 GX_ResetBankForSubOBJ(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); return FUN_020C6130(&gUnk021D33C4.var18); } -u32 FUN_020C5F28(u16 *ptr){ +ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ u32 temp = *ptr; *ptr = 0; if (temp & (0x1 << 0)) @@ -478,102 +478,102 @@ u32 FUN_020C5F28(u16 *ptr){ return temp; } -u32 disableBankForX_(){ +ARM_FUNC u32 disableBankForX_(){ return FUN_020C5F28(&gUnk021D33C4.var02); } -u32 GX_DisableBankForOBJExtPltt_2(){ +ARM_FUNC u32 GX_DisableBankForOBJExtPltt_2(){ return FUN_020C5F28(&gUnk021D33C4.var04); } -u32 GX_DisableBankForBGExtPltt(){ +ARM_FUNC u32 GX_DisableBankForBGExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); return FUN_020C5F28(&gUnk021D33C4.var0E); } -u32 GX_DisableBankForOBJExtPltt(){ +ARM_FUNC u32 GX_DisableBankForOBJExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); return FUN_020C5F28(&gUnk021D33C4.var10); } -u32 GX_DisableBankForTexPltt_2(){ +ARM_FUNC u32 GX_DisableBankForTexPltt_2(){ return FUN_020C5F28(&gUnk021D33C4.var08); } -u32 GX_DisableBankForTexPltt(){ +ARM_FUNC u32 GX_DisableBankForTexPltt(){ return FUN_020C5F28(&gUnk021D33C4.var0A); } -u32 GX_DisableBankForClearImage(){ +ARM_FUNC u32 GX_DisableBankForClearImage(){ return FUN_020C5F28(&gUnk021D33C4.var0C); } -u32 GX_DisableBankForARM7(){ +ARM_FUNC u32 GX_DisableBankForARM7(){ return FUN_020C5F28(&gUnk021D33C4.var06); } -u32 GX_DisableBankForLCDC(){ +ARM_FUNC u32 GX_DisableBankForLCDC(){ return FUN_020C5F28(&gUnk021D33C4.var00); } -u32 GX_DisableBankForSubBGExtPltt(){ +ARM_FUNC u32 GX_DisableBankForSubBGExtPltt(){ return FUN_020C5F28(&gUnk021D33C4.var12); } -u32 GX_DisableBankForSubOBJExtPltt_2(){ +ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt_2(){ return FUN_020C5F28(&gUnk021D33C4.var14); } -u32 FUN_020C5E04(){ +ARM_FUNC u32 FUN_020C5E04(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); return FUN_020C5F28(&gUnk021D33C4.var16); } -u32 GX_DisableBankForSubOBJExtPltt(){ +ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); return FUN_020C5F28(&gUnk021D33C4.var18); } -u32 GX_GetBankForBGExtPltt_2(){ +ARM_FUNC u32 GX_GetBankForBGExtPltt_2(){ return gUnk021D33C4.var02; } -u32 GX_GetBankForOBJ(){ +ARM_FUNC u32 GX_GetBankForOBJ(){ return gUnk021D33C4.var04; } -u32 GX_GetBankForBGExtPltt(){ +ARM_FUNC u32 GX_GetBankForBGExtPltt(){ return gUnk021D33C4.var0E; } -u32 GX_GetBankForOBJExtPltt(){ +ARM_FUNC u32 GX_GetBankForOBJExtPltt(){ return gUnk021D33C4.var10; } -u32 FUN_020C5D8C(){ +ARM_FUNC u32 FUN_020C5D8C(){ return gUnk021D33C4.var08; } -u32 GX_GetBankForTexPltt(){ +ARM_FUNC u32 GX_GetBankForTexPltt(){ return gUnk021D33C4.var0A; } -u32 GX_GetBankForLCDC(){ +ARM_FUNC u32 GX_GetBankForLCDC(){ return gUnk021D33C4.var00; } -u32 GX_GetBankForSubBGExtPltt_2(){ +ARM_FUNC u32 GX_GetBankForSubBGExtPltt_2(){ return gUnk021D33C4.var12; } -u32 GX_GetBankForSubOBJ(){ +ARM_FUNC u32 GX_GetBankForSubOBJ(){ return gUnk021D33C4.var14; } -u32 GX_GetBankForSubBGExtPltt(){ +ARM_FUNC u32 GX_GetBankForSubBGExtPltt(){ return gUnk021D33C4.var16; } -u32 GX_GetBankForSubOBJExtPltt(){ +ARM_FUNC u32 GX_GetBankForSubOBJExtPltt(){ return gUnk021D33C4.var18; } -- cgit v1.2.3 From f34db9ec15de8a39989afc722286844ac5fe252b Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 04:54:46 +0200 Subject: Correct global symbol names --- arm9/lib/src/GX.c | 36 +++++------ arm9/lib/src/GX_g3x.c | 8 +-- arm9/lib/src/GX_load2d.c | 138 ++++++++++++++++++++--------------------- arm9/lib/src/GX_load3d.c | 112 +++++++++++++++++----------------- arm9/lib/src/GX_state.c | 28 ++++----- arm9/lib/src/GX_vramcnt.c | 152 +++++++++++++++++++++++----------------------- 6 files changed, 237 insertions(+), 237 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index bae16fca..ca3e4604 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -2,10 +2,10 @@ #include "main.h" #include "gx.h" -extern u16 gUnk021D33BC; -extern u16 gUnk021D33C0; -extern u32 gUnk02106814; -extern u16 gUnk02106810; +extern u16 UNK_021D33BC; +extern u16 UNK_021D33C0; +extern u32 UNK_02106814; +extern u16 UNK_02106810; ARM_FUNC void GX_Init(){ SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000); @@ -13,22 +13,22 @@ ARM_FUNC void GX_Init(){ SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x1); GX_InitGXState(); u32 temp; - while (gUnk021D33BC == 0) + while (UNK_021D33BC == 0) { temp = OS_GetLockID(); if (temp == -3) { OS_Terminate(); } - gUnk021D33BC = temp; + UNK_021D33BC = temp; } SETREG16(HW_REG_DISPSTAT, 0x0); SETREG32(HW_REG_DISPCNT, 0x0); - if (gUnk02106814 != -1) + if (UNK_02106814 != -1) { - MI_DmaFill32(gUnk02106814, (void *)HW_REG_BG0CNT_A, 0x0, 0x60); + MI_DmaFill32(UNK_02106814, (void *)HW_REG_BG0CNT_A, 0x0, 0x60); SETREG16(HW_REG_MASTER_BRIGHT, 0x0); - MI_DmaFill32(gUnk02106814, (void *)HW_REG_DISPCNT_2D, 0x0, 0x70); + MI_DmaFill32(UNK_02106814, (void *)HW_REG_DISPCNT_2D, 0x0, 0x70); } else { @@ -74,16 +74,16 @@ ARM_FUNC u32 GX_VBlankIntr(u32 enable){ ARM_FUNC void GX_DispOff(){ u32 temp = READREG32(HW_REG_DISPCNT); - gUnk02106810 = 0x0; - gUnk021D33C0 = (temp & 0x30000) >> 0x10; + UNK_02106810 = 0x0; + UNK_021D33C0 = (temp & 0x30000) >> 0x10; SETREG32(HW_REG_DISPCNT, temp & ~0x30000); } ARM_FUNC void GX_DispOn(){ - gUnk02106810 = 0x1; - if (gUnk021D33C0) + UNK_02106810 = 0x1; + if (UNK_021D33C0) { - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x30000 | (gUnk021D33C0 << 0x10)); + SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x30000 | (UNK_021D33C0 << 0x10)); } else @@ -94,12 +94,12 @@ ARM_FUNC void GX_DispOn(){ ARM_FUNC void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ u32 temp2 = READREG32(HW_REG_DISPCNT); - gUnk021D33C0 = mode1; - if (!gUnk02106810) + UNK_021D33C0 = mode1; + if (!UNK_02106810) mode1 = 0; SETREG32(HW_REG_DISPCNT, (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3)); - if (!gUnk021D33C0) - gUnk02106810 = 0x0; + if (!UNK_021D33C0) + UNK_02106810 = 0x0; } ARM_FUNC void GXS_SetGraphicsMode(u32 mode){ diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index 7ced9de6..e76adce7 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -2,7 +2,7 @@ #include "main.h" #include "gx.h" -extern u32 gUnk02106814; +extern u32 UNK_02106814; ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){ mov r1, #0x0 @@ -178,10 +178,10 @@ ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u } ARM_FUNC void G3X_InitTable(){ - if (gUnk02106814 != -1) + if (UNK_02106814 != -1) { - MI_DmaFill32Async(gUnk02106814, (void *)HW_REG_EDGE_COLOR, 0x0, 0x10, 0x0, 0x0); - MI_DmaFill32(gUnk02106814, (void *)HW_REG_FOG_TABLE, 0x0, 0x60); + MI_DmaFill32Async(UNK_02106814, (void *)HW_REG_EDGE_COLOR, 0x0, 0x10, 0x0, 0x0); + MI_DmaFill32(UNK_02106814, (void *)HW_REG_FOG_TABLE, 0x0, 0x60); } else { diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index 972babad..c0139c41 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -2,15 +2,15 @@ #include "main.h" #include "gx.h" -extern u32 gUnk02106814; +extern u32 UNK_02106814; -extern s32 gUnk021D33F8; -extern s32 gUnk021D33F4; -extern u32 gUnk021D33F0; -extern u32 gUnk021D33EC; -extern s32 gUnk021D33E8; -extern u32 gUnk021D33E4; -extern s32 gUnk021D33E0; +extern s32 UNK_021D33F8; +extern s32 UNK_021D33F4; +extern u32 UNK_021D33F0; +extern u32 UNK_021D33EC; +extern s32 UNK_021D33E8; +extern u32 UNK_021D33E4; +extern s32 UNK_021D33E0; static inline void *_GX_OBJ_PTR(){ @@ -21,207 +21,207 @@ static inline void *_GXS_OBJ_PTR(){ } ARM_FUNC void GX_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(gUnk02106814, src, (void *)(0x5000000 + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(0x5000000 + offset), size); } ARM_FUNC void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(gUnk02106814, src, (void *)(0x5000400 + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(0x5000400 + offset), size); } ARM_FUNC void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(gUnk02106814, src, (void *)(0x5000200 + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(0x5000200 + offset), size); } ARM_FUNC void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(gUnk02106814, src, (void *)(0x5000600 + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(0x5000600 + offset), size); } ARM_FUNC void GX_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(gUnk02106814, src, (void *)(0x7000000 + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(0x7000000 + offset), size); } ARM_FUNC void GXS_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(gUnk02106814, src, (void *)(0x7000400 + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(0x7000400 + offset), size); } ARM_FUNC void GX_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GX_OBJ_PTR(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GXS_OBJ_PTR(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3ScrPtr(); - _GX_Load_16(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3CharPtr(); - _GX_Load_32(gUnk02106814, src, (void *)(base + offset), size); + _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_BeginLoadBGExtPltt(){ - gUnk021D33F4 = GX_ResetBankForBGExtPltt(); - switch (gUnk021D33F4) + UNK_021D33F4 = GX_ResetBankForBGExtPltt(); + switch (UNK_021D33F4) { case 0: //needed to match break; case 0x10: - gUnk021D33F0 = 0x06880000; - gUnk021D33EC = 0x0; + UNK_021D33F0 = 0x06880000; + UNK_021D33EC = 0x0; break; case 0x40: - gUnk021D33F0 = 0x06894000; - gUnk021D33EC = 0x4000; + UNK_021D33F0 = 0x06894000; + UNK_021D33EC = 0x4000; break; case 0x20: case 0x60: - gUnk021D33F0 = 0x06890000; - gUnk021D33EC = 0x0; + UNK_021D33F0 = 0x06890000; + UNK_021D33EC = 0x0; break; } } ARM_FUNC void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33F0 + offset - gUnk021D33EC), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D33F0 + offset - UNK_021D33EC), size, NULL, NULL); } ARM_FUNC void GX_EndLoadBGExtPltt(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForBGExtPltt(gUnk021D33F4); - gUnk021D33F4 = 0x0; - gUnk021D33F0 = 0x0; - gUnk021D33EC = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForBGExtPltt(UNK_021D33F4); + UNK_021D33F4 = 0x0; + UNK_021D33F0 = 0x0; + UNK_021D33EC = 0x0; } ARM_FUNC void GX_BeginLoadOBJExtPltt(){ - gUnk021D33E8 = GX_ResetBankForOBJExtPltt(); - switch (gUnk021D33E8) + UNK_021D33E8 = GX_ResetBankForOBJExtPltt(); + switch (UNK_021D33E8) { case 0: //needed to match break; case 0x40: - gUnk021D33E4 = 0x06894000; + UNK_021D33E4 = 0x06894000; break; case 0x20: - gUnk021D33E4 = 0x06890000; + UNK_021D33E4 = 0x06890000; break; } } ARM_FUNC void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D33E4 + offset), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D33E4 + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadOBJExtPltt(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForOBJExtPltt(gUnk021D33E8); - gUnk021D33E8 = 0x0; - gUnk021D33E4 = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForOBJExtPltt(UNK_021D33E8); + UNK_021D33E8 = 0x0; + UNK_021D33E4 = 0x0; } ARM_FUNC void GXS_BeginLoadBGExtPltt(){ - gUnk021D33E0 = FUN_020C6034(); + UNK_021D33E0 = FUN_020C6034(); } ARM_FUNC void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadBGExtPltt(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForSubBGExtPltt(gUnk021D33E0); - gUnk021D33E0 = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForSubBGExtPltt(UNK_021D33E0); + UNK_021D33E0 = 0x0; } ARM_FUNC void GXS_BeginLoadOBJExtPltt(){ - gUnk021D33F8 = GX_ResetBankForSubOBJ(); + UNK_021D33F8 = GX_ResetBankForSubOBJ(); } ARM_FUNC void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadOBJExtPltt(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForSubOBJExtPltt(gUnk021D33F8); - gUnk021D33F8 = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForSubOBJExtPltt(UNK_021D33F8); + UNK_021D33F8 = 0x0; } diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index ee7502db..3a8a8c1d 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -2,123 +2,123 @@ #include "main.h" #include "gx.h" -extern u32 gUnk02106814; +extern u32 UNK_02106814; -extern u32 gUnk021D3410; -extern u32 gUnk021D3400; -extern u32 gUnk021D3414; -extern u32 gUnk021D3418; +extern u32 UNK_021D3410; +extern u32 UNK_021D3400; +extern u32 UNK_021D3414; +extern u32 UNK_021D3418; //probably structs of length 0x6 -extern u16 gUnk02103B4C[]; -extern u16 gUnk02103B4E[]; -extern u16 gUnk02103B50[]; +extern u16 UNK_02103B4C[]; +extern u16 UNK_02103B4E[]; +extern u16 UNK_02103B50[]; -extern u32 gUnk021D3408; -extern u32 gUnk021D3404; -extern u16 gUnk02103B3C[]; +extern u32 UNK_021D3408; +extern u32 UNK_021D3404; +extern u16 UNK_02103B3C[]; -extern s32 gUnk021D33FC; -extern u32 gUnk021D340C; +extern s32 UNK_021D33FC; +extern u32 UNK_021D340C; ARM_FUNC void GX_BeginLoadTex(){ u32 temp = GX_ResetBankForTex(); - gUnk021D3410 = temp; - gUnk021D3400 = gUnk02103B4C[temp * 3] << 0xC; - gUnk021D3414 = gUnk02103B4E[temp * 3] << 0xC; - gUnk021D3418 = gUnk02103B50[temp * 3] << 0xC; + UNK_021D3410 = temp; + UNK_021D3400 = UNK_02103B4C[temp * 3] << 0xC; + UNK_021D3414 = UNK_02103B4E[temp * 3] << 0xC; + UNK_021D3418 = UNK_02103B50[temp * 3] << 0xC; } ARM_FUNC void GX_LoadTex(void *src, u32 offset, u32 size){ void *temp; - if (!gUnk021D3414) + if (!UNK_021D3414) { - temp = (void *)(gUnk021D3400 + offset); + temp = (void *)(UNK_021D3400 + offset); } else { - if ((offset + size) < gUnk021D3418) + if ((offset + size) < UNK_021D3418) { - temp = (void *)(gUnk021D3400 + offset); + temp = (void *)(UNK_021D3400 + offset); } - else if (offset >= gUnk021D3418) + else if (offset >= UNK_021D3418) { - temp = (void *)(gUnk021D3414 + offset - gUnk021D3418); + temp = (void *)(UNK_021D3414 + offset - UNK_021D3418); } else { - void *temp2 = (void *)gUnk021D3414; - u32 temp1 = gUnk021D3418 - offset; - temp = (void *)(gUnk021D3400 + offset); - _GX_Load_32(gUnk02106814, src, temp, temp1); - _GX_Load_32_Async(gUnk02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); + void *temp2 = (void *)UNK_021D3414; + u32 temp1 = UNK_021D3418 - offset; + temp = (void *)(UNK_021D3400 + offset); + _GX_Load_32(UNK_02106814, src, temp, temp1); + _GX_Load_32_Async(UNK_02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); return; } } - _GX_Load_32_Async(gUnk02106814, src, temp, size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, temp, size, NULL, NULL); } ARM_FUNC void GX_EndLoadTex(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForTex(gUnk021D3410); - gUnk021D3418 = 0x0; - gUnk021D3414 = 0x0; - gUnk021D3400 = 0x0; - gUnk021D3410 = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForTex(UNK_021D3410); + UNK_021D3418 = 0x0; + UNK_021D3414 = 0x0; + UNK_021D3400 = 0x0; + UNK_021D3410 = 0x0; } ARM_FUNC void GX_BeginLoadTexPltt(){ s32 temp = GX_ResetBankForTexPltt(); - gUnk021D3408 = temp; - gUnk021D3404 = gUnk02103B3C[temp >> 4] << 0xC; + UNK_021D3408 = temp; + UNK_021D3404 = UNK_02103B3C[temp >> 4] << 0xC; } ARM_FUNC void GX_LoadTexPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D3404 + offset), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D3404 + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadTexPltt(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForTexPltt(gUnk021D3408); - gUnk021D3408 = 0x0; - gUnk021D3404 = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForTexPltt(UNK_021D3408); + UNK_021D3408 = 0x0; + UNK_021D3404 = 0x0; } ARM_FUNC void GX_BeginLoadClearImage(){ s32 temp = GX_ResetBankForClearImage(); - gUnk021D33FC = temp; + UNK_021D33FC = temp; switch (temp) { case 2: case 3: - gUnk021D340C = 0x6800000; + UNK_021D340C = 0x6800000; return; case 8: case 12: - gUnk021D340C = 0x6840000; + UNK_021D340C = 0x6840000; return; case 1: - gUnk021D340C = 0x67E0000; + UNK_021D340C = 0x67E0000; return; case 4: - gUnk021D340C = 0x6820000; + UNK_021D340C = 0x6820000; } } ARM_FUNC void GX_LoadClearImageColor(void *src, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D340C), size, NULL, NULL); } ARM_FUNC void GX_LoadClearImageDepth(void *src, u32 size){ - _GX_Load_32_Async(gUnk02106814, src, (void *)(gUnk021D340C + 0x20000), size, NULL, NULL); + _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D340C + 0x20000), size, NULL, NULL); } ARM_FUNC void GX_EndLoadClearImage(){ - if (gUnk02106814 != -1) - MI_WaitDma(gUnk02106814); - GX_SetBankForClearImage(gUnk021D33FC); - gUnk021D33FC = 0x0; - gUnk021D340C = 0x0; + if (UNK_02106814 != -1) + MI_WaitDma(UNK_02106814); + GX_SetBankForClearImage(UNK_021D33FC); + UNK_021D33FC = 0x0; + UNK_021D340C = 0x0; } diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c index 38968523..79a53ee7 100644 --- a/arm9/lib/src/GX_state.c +++ b/arm9/lib/src/GX_state.c @@ -2,22 +2,22 @@ #include "main.h" #include "gx.h" -extern struct VRAM_banks gUnk021D33C4; +extern struct VRAM_banks UNK_021D33C4; ARM_FUNC void GX_InitGXState(){ - gUnk021D33C4.var00 = 0x0; - gUnk021D33C4.var02 = 0x0; - gUnk021D33C4.var04 = 0x0; - gUnk021D33C4.var06 = 0x0; - gUnk021D33C4.var08 = 0x0; - gUnk021D33C4.var0A = 0x0; - gUnk021D33C4.var0C = 0x0; - gUnk021D33C4.var0E = 0x0; - gUnk021D33C4.var10 = 0x0; - gUnk021D33C4.var12 = 0x0; - gUnk021D33C4.var14 = 0x0; - gUnk021D33C4.var16 = 0x0; - gUnk021D33C4.var18 = 0x0; + UNK_021D33C4.var00 = 0x0; + UNK_021D33C4.var02 = 0x0; + UNK_021D33C4.var04 = 0x0; + UNK_021D33C4.var06 = 0x0; + UNK_021D33C4.var08 = 0x0; + UNK_021D33C4.var0A = 0x0; + UNK_021D33C4.var0C = 0x0; + UNK_021D33C4.var0E = 0x0; + UNK_021D33C4.var10 = 0x0; + UNK_021D33C4.var12 = 0x0; + UNK_021D33C4.var14 = 0x0; + UNK_021D33C4.var16 = 0x0; + UNK_021D33C4.var18 = 0x0; SETREG32(HW_REG_VRAMCNT_A, 0x0); SETREG8(HW_REG_VRAMCNT_E, 0x0); SETREG8(HW_REG_VRAMCNT_F, 0x0); diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index 24862470..fdedca46 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -2,8 +2,8 @@ #include "main.h" #include "gx.h" -extern u16 gUnk021D33BC; -extern struct VRAM_banks gUnk021D33C4; +extern u16 UNK_021D33BC; +extern struct VRAM_banks UNK_021D33C4; ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ if (mask & (0x1 << 0)) @@ -27,8 +27,8 @@ ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ } ARM_FUNC void GX_SetBankForBG(s32 bg){ - gUnk021D33C4.var00 = (u16)(~bg & (gUnk021D33C4.var00 | gUnk021D33C4.var02)); - gUnk021D33C4.var02 = bg; + UNK_021D33C4.var00 = (u16)(~bg & (UNK_021D33C4.var00 | UNK_021D33C4.var02)); + UNK_021D33C4.var02 = bg; switch (bg) { case 8: @@ -96,12 +96,12 @@ ARM_FUNC void GX_SetBankForBG(s32 bg){ default: break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForOBJ(s32 obj){ - gUnk021D33C4.var00 = (u16)(~obj & (gUnk021D33C4.var00 | gUnk021D33C4.var04)); - gUnk021D33C4.var04 = obj; + UNK_021D33C4.var00 = (u16)(~obj & (UNK_021D33C4.var00 | UNK_021D33C4.var04)); + UNK_021D33C4.var04 = obj; switch (obj) { case 3: @@ -135,12 +135,12 @@ ARM_FUNC void GX_SetBankForOBJ(s32 obj){ default: break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ - gUnk021D33C4.var00 = (u16)(~bgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0E)); - gUnk021D33C4.var0E = bgextpltt; + UNK_021D33C4.var00 = (u16)(~bgextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var0E)); + UNK_021D33C4.var0E = bgextpltt; switch (bgextpltt) { case 0x10: @@ -161,12 +161,12 @@ ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ - gUnk021D33C4.var00 = (u16)(~objextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var10)); - gUnk021D33C4.var10 = objextpltt; + UNK_021D33C4.var00 = (u16)(~objextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var10)); + UNK_021D33C4.var10 = objextpltt; switch (objextpltt) { case 32: @@ -181,12 +181,12 @@ ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForTex(s32 tex){ - gUnk021D33C4.var00 = (u16)(~tex & (gUnk021D33C4.var00 | gUnk021D33C4.var08)); - gUnk021D33C4.var08 = tex; + UNK_021D33C4.var00 = (u16)(~tex & (UNK_021D33C4.var00 | UNK_021D33C4.var08)); + UNK_021D33C4.var08 = tex; if (tex == 0) { SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & 0x0000CFFE); @@ -244,12 +244,12 @@ ARM_FUNC void GX_SetBankForTex(s32 tex){ break; } } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ - gUnk021D33C4.var00 = (u16)(~texpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var0A)); - gUnk021D33C4.var0A = texpltt; + UNK_021D33C4.var00 = (u16)(~texpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var0A)); + UNK_021D33C4.var0A = texpltt; switch (texpltt) { case 0: //needed to match @@ -270,12 +270,12 @@ ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ SETREG8(HW_REG_VRAMCNT_G, 0x83); break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ - gUnk021D33C4.var00 = (u16)(~clearimage & (gUnk021D33C4.var00 | gUnk021D33C4.var0C)); - gUnk021D33C4.var0C = clearimage; + UNK_021D33C4.var00 = (u16)(~clearimage & (UNK_021D33C4.var00 | UNK_021D33C4.var0C)); + UNK_021D33C4.var0C = clearimage; switch (clearimage) { case 3: @@ -301,12 +301,12 @@ ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ SETREG8(HW_REG_VRAMCNT_C, 0x9B); SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForARM7(s32 arm7){ - gUnk021D33C4.var00 = (u16)(~arm7 & (gUnk021D33C4.var00 | gUnk021D33C4.var06)); - gUnk021D33C4.var06 = arm7; + UNK_021D33C4.var00 = (u16)(~arm7 & (UNK_021D33C4.var00 | UNK_021D33C4.var06)); + UNK_021D33C4.var06 = arm7; switch (arm7) { case 0: //needed to match @@ -321,17 +321,17 @@ ARM_FUNC void GX_SetBankForARM7(s32 arm7){ case 8: SETREG8(HW_REG_VRAMCNT_D, 0x82); } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForLCDC(s32 lcdc){ - gUnk021D33C4.var00 |= lcdc; + UNK_021D33C4.var00 |= lcdc; GX_VRAMCNT_SetLCDC_(lcdc); } ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ - gUnk021D33C4.var00 = (u16)(~subbg & (gUnk021D33C4.var00 | gUnk021D33C4.var12)); - gUnk021D33C4.var12 = subbg; + UNK_021D33C4.var00 = (u16)(~subbg & (UNK_021D33C4.var00 | UNK_021D33C4.var12)); + UNK_021D33C4.var12 = subbg; switch (subbg) { case 0: //needed to match @@ -344,13 +344,13 @@ ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ case 128: SETREG8(HW_REG_VRAMCNT_H, 0x81); } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ - gUnk021D33C4.var00 = (u16)(~subobj & (gUnk021D33C4.var00 | gUnk021D33C4.var14)); - gUnk021D33C4.var14 = subobj; + UNK_021D33C4.var00 = (u16)(~subobj & (UNK_021D33C4.var00 | UNK_021D33C4.var14)); + UNK_021D33C4.var14 = subobj; switch (subobj) { case 8: @@ -362,12 +362,12 @@ ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ case 0: //needed to match break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ - gUnk021D33C4.var00 = (u16)(~subbgextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var16)); - gUnk021D33C4.var16 = subbgextpltt; + UNK_021D33C4.var00 = (u16)(~subbgextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var16)); + UNK_021D33C4.var16 = subbgextpltt; switch (subbgextpltt) { case 128: @@ -378,12 +378,12 @@ ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ - gUnk021D33C4.var00 = (u16)(~subobjextpltt & (gUnk021D33C4.var00 | gUnk021D33C4.var18)); - gUnk021D33C4.var18 = subobjextpltt; + UNK_021D33C4.var00 = (u16)(~subobjextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var18)); + UNK_021D33C4.var18 = subobjextpltt; switch (subobjextpltt) { case 256: @@ -394,63 +394,63 @@ ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); break; } - GX_VRAMCNT_SetLCDC_(gUnk021D33C4.var00); + GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } ARM_FUNC u32 FUN_020C6130(u16 *ptr){ u16 temp = *ptr; *ptr = 0; - gUnk021D33C4.var00 |= temp; + UNK_021D33C4.var00 |= temp; GX_VRAMCNT_SetLCDC_(temp); return temp; } ARM_FUNC u32 GX_ResetBankForBG(){ - return FUN_020C6130(&gUnk021D33C4.var02); + return FUN_020C6130(&UNK_021D33C4.var02); } ARM_FUNC u32 GX_ResetBankForOBJ(){ - return FUN_020C6130(&gUnk021D33C4.var04); + return FUN_020C6130(&UNK_021D33C4.var04); } ARM_FUNC u32 GX_ResetBankForBGExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); - return FUN_020C6130(&gUnk021D33C4.var0E); + return FUN_020C6130(&UNK_021D33C4.var0E); } ARM_FUNC u32 GX_ResetBankForOBJExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); - return FUN_020C6130(&gUnk021D33C4.var10); + return FUN_020C6130(&UNK_021D33C4.var10); } ARM_FUNC u32 GX_ResetBankForTex(){ - return FUN_020C6130(&gUnk021D33C4.var08); + return FUN_020C6130(&UNK_021D33C4.var08); } ARM_FUNC u32 GX_ResetBankForTexPltt(){ - return FUN_020C6130(&gUnk021D33C4.var0A); + return FUN_020C6130(&UNK_021D33C4.var0A); } ARM_FUNC u32 GX_ResetBankForClearImage(){ - return FUN_020C6130(&gUnk021D33C4.var0C); + return FUN_020C6130(&UNK_021D33C4.var0C); } ARM_FUNC u32 GX_ResetBankForSubBG(){ - return FUN_020C6130(&gUnk021D33C4.var12); + return FUN_020C6130(&UNK_021D33C4.var12); } ARM_FUNC u32 FUN_020C605C(){ - return FUN_020C6130(&gUnk021D33C4.var14); + return FUN_020C6130(&UNK_021D33C4.var14); } ARM_FUNC u32 FUN_020C6034(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); - return FUN_020C6130(&gUnk021D33C4.var16); + return FUN_020C6130(&UNK_021D33C4.var16); } ARM_FUNC u32 GX_ResetBankForSubOBJ(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); - return FUN_020C6130(&gUnk021D33C4.var18); + return FUN_020C6130(&UNK_021D33C4.var18); } ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ @@ -474,106 +474,106 @@ ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ SETREG8(HW_REG_VRAMCNT_H, 0x0); if (temp & (0x1 << 8)) SETREG8(HW_REG_VRAMCNT_I, 0x0); - OSi_UnlockVram((u16)temp, gUnk021D33BC); + OSi_UnlockVram((u16)temp, UNK_021D33BC); return temp; } ARM_FUNC u32 disableBankForX_(){ - return FUN_020C5F28(&gUnk021D33C4.var02); + return FUN_020C5F28(&UNK_021D33C4.var02); } ARM_FUNC u32 GX_DisableBankForOBJExtPltt_2(){ - return FUN_020C5F28(&gUnk021D33C4.var04); + return FUN_020C5F28(&UNK_021D33C4.var04); } ARM_FUNC u32 GX_DisableBankForBGExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); - return FUN_020C5F28(&gUnk021D33C4.var0E); + return FUN_020C5F28(&UNK_021D33C4.var0E); } ARM_FUNC u32 GX_DisableBankForOBJExtPltt(){ SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); - return FUN_020C5F28(&gUnk021D33C4.var10); + return FUN_020C5F28(&UNK_021D33C4.var10); } ARM_FUNC u32 GX_DisableBankForTexPltt_2(){ - return FUN_020C5F28(&gUnk021D33C4.var08); + return FUN_020C5F28(&UNK_021D33C4.var08); } ARM_FUNC u32 GX_DisableBankForTexPltt(){ - return FUN_020C5F28(&gUnk021D33C4.var0A); + return FUN_020C5F28(&UNK_021D33C4.var0A); } ARM_FUNC u32 GX_DisableBankForClearImage(){ - return FUN_020C5F28(&gUnk021D33C4.var0C); + return FUN_020C5F28(&UNK_021D33C4.var0C); } ARM_FUNC u32 GX_DisableBankForARM7(){ - return FUN_020C5F28(&gUnk021D33C4.var06); + return FUN_020C5F28(&UNK_021D33C4.var06); } ARM_FUNC u32 GX_DisableBankForLCDC(){ - return FUN_020C5F28(&gUnk021D33C4.var00); + return FUN_020C5F28(&UNK_021D33C4.var00); } ARM_FUNC u32 GX_DisableBankForSubBGExtPltt(){ - return FUN_020C5F28(&gUnk021D33C4.var12); + return FUN_020C5F28(&UNK_021D33C4.var12); } ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt_2(){ - return FUN_020C5F28(&gUnk021D33C4.var14); + return FUN_020C5F28(&UNK_021D33C4.var14); } ARM_FUNC u32 FUN_020C5E04(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); - return FUN_020C5F28(&gUnk021D33C4.var16); + return FUN_020C5F28(&UNK_021D33C4.var16); } ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt(){ SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); - return FUN_020C5F28(&gUnk021D33C4.var18); + return FUN_020C5F28(&UNK_021D33C4.var18); } ARM_FUNC u32 GX_GetBankForBGExtPltt_2(){ - return gUnk021D33C4.var02; + return UNK_021D33C4.var02; } ARM_FUNC u32 GX_GetBankForOBJ(){ - return gUnk021D33C4.var04; + return UNK_021D33C4.var04; } ARM_FUNC u32 GX_GetBankForBGExtPltt(){ - return gUnk021D33C4.var0E; + return UNK_021D33C4.var0E; } ARM_FUNC u32 GX_GetBankForOBJExtPltt(){ - return gUnk021D33C4.var10; + return UNK_021D33C4.var10; } ARM_FUNC u32 FUN_020C5D8C(){ - return gUnk021D33C4.var08; + return UNK_021D33C4.var08; } ARM_FUNC u32 GX_GetBankForTexPltt(){ - return gUnk021D33C4.var0A; + return UNK_021D33C4.var0A; } ARM_FUNC u32 GX_GetBankForLCDC(){ - return gUnk021D33C4.var00; + return UNK_021D33C4.var00; } ARM_FUNC u32 GX_GetBankForSubBGExtPltt_2(){ - return gUnk021D33C4.var12; + return UNK_021D33C4.var12; } ARM_FUNC u32 GX_GetBankForSubOBJ(){ - return gUnk021D33C4.var14; + return UNK_021D33C4.var14; } ARM_FUNC u32 GX_GetBankForSubBGExtPltt(){ - return gUnk021D33C4.var16; + return UNK_021D33C4.var16; } ARM_FUNC u32 GX_GetBankForSubOBJExtPltt(){ - return gUnk021D33C4.var18; + return UNK_021D33C4.var18; } -- cgit v1.2.3 From 929c523340dfecbd0e3313e25d36abe47e1cc63e Mon Sep 17 00:00:00 2001 From: Made Date: Fri, 15 May 2020 06:46:25 +0200 Subject: Replace register access macros with variables --- arm9/lib/src/GX.c | 65 ++++++----- arm9/lib/src/GX_bgcnt.c | 64 +++++------ arm9/lib/src/GX_g3_util.c | 34 +++--- arm9/lib/src/GX_g3imm.c | 12 +-- arm9/lib/src/GX_g3x.c | 140 ++++++++++++------------ arm9/lib/src/GX_state.c | 10 +- arm9/lib/src/GX_vramcnt.c | 268 +++++++++++++++++++++++----------------------- 7 files changed, 296 insertions(+), 297 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index ca3e4604..883dfe69 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -8,9 +8,9 @@ extern u32 UNK_02106814; extern u16 UNK_02106810; ARM_FUNC void GX_Init(){ - SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000); - SETREG16(HW_REG_POWCNT1, (READREG16(HW_REG_POWCNT1) & ~0x20E) | 0x20E); - SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x1); + reg_GX_POWCNT |= 0x8000; + reg_GX_POWCNT = (reg_GX_POWCNT & ~0x20E) | 0x20E; + reg_GX_POWCNT = reg_GX_POWCNT | 0x1; GX_InitGXState(); u32 temp; while (UNK_021D33BC == 0) @@ -22,88 +22,87 @@ ARM_FUNC void GX_Init(){ } UNK_021D33BC = temp; } - SETREG16(HW_REG_DISPSTAT, 0x0); - SETREG32(HW_REG_DISPCNT, 0x0); + reg_GX_DISPSTAT = 0x0; + reg_GX_DISPCNT = 0x0; if (UNK_02106814 != -1) { - MI_DmaFill32(UNK_02106814, (void *)HW_REG_BG0CNT_A, 0x0, 0x60); - SETREG16(HW_REG_MASTER_BRIGHT, 0x0); - MI_DmaFill32(UNK_02106814, (void *)HW_REG_DISPCNT_2D, 0x0, 0x70); + MI_DmaFill32(UNK_02106814, (void *)®_G2_BG0CNT, 0x0, 0x60); + reg_GX_MASTER_BRIGHT = 0x0; + MI_DmaFill32(UNK_02106814, (void *)®_GXS_DB_DISPCNT, 0x0, 0x70); } else { - MIi_CpuClear32(0x0, (void *)HW_REG_BG0CNT_A, 0x60); - SETREG16(HW_REG_MASTER_BRIGHT, 0x0); - MIi_CpuClear32(0x0, (void *)HW_REG_DISPCNT_2D, 0x70); + MIi_CpuClear32(0x0, (void *)®_G2_BG0CNT, 0x60); + reg_GX_MASTER_BRIGHT = 0x0; + MIi_CpuClear32(0x0, (void *)®_GXS_DB_DISPCNT, 0x70); } - SETREG16(HW_REG_BG2PA_A, 0x100); - SETREG16(HW_REG_BG2PD_A, 0x100); - SETREG16(HW_REG_BG3PA_A, 0x100); - SETREG16(HW_REG_BG3PD_A, 0x100); - SETREG16(HW_REG_BG2PA_B, 0x100); - SETREG16(HW_REG_BG2PD_B, 0x100); - SETREG16(HW_REG_BG3PA_B, 0x100); - SETREG16(HW_REG_BG3PD_B, 0x100); + reg_G2_BG2PA = 0x100; + reg_G2_BG2PD = 0x100; + reg_G2_BG3PA = 0x100; + reg_G2_BG3PD = 0x100; + reg_G2S_DB_BG2PA = 0x100; + reg_G2S_DB_BG2PD = 0x100; + reg_G2S_DB_BG3PA = 0x100; + reg_G2S_DB_BG3PD = 0x100; } ARM_FUNC u32 GX_HBlankIntr(u32 enable){ - u32 temp = READREG16(HW_REG_DISPSTAT) & 0x10; + u32 temp = reg_GX_DISPSTAT & 0x10; if (enable) { - SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x10); + reg_GX_DISPSTAT |= 0x10; } else { - SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x10); + reg_GX_DISPSTAT &= ~0x10; } return temp; } ARM_FUNC u32 GX_VBlankIntr(u32 enable){ - u32 temp = READREG16(HW_REG_DISPSTAT) & 0x8; + u32 temp = reg_GX_DISPSTAT & 0x8; if (enable) { - SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x8); + reg_GX_DISPSTAT |= 0x8; } else { - SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x8); + reg_GX_DISPSTAT &= ~0x8; } return temp; } ARM_FUNC void GX_DispOff(){ - u32 temp = READREG32(HW_REG_DISPCNT); + u32 temp = reg_GX_DISPCNT; UNK_02106810 = 0x0; UNK_021D33C0 = (temp & 0x30000) >> 0x10; - SETREG32(HW_REG_DISPCNT, temp & ~0x30000); + reg_GX_DISPCNT = temp & ~0x30000; } ARM_FUNC void GX_DispOn(){ UNK_02106810 = 0x1; if (UNK_021D33C0) { - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x30000 | (UNK_021D33C0 << 0x10)); - + reg_GX_DISPCNT = reg_GX_DISPCNT & ~0x30000 | (UNK_021D33C0 << 0x10); } else { - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x10000); + reg_GX_DISPCNT = reg_GX_DISPCNT | 0x10000; } } ARM_FUNC void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ - u32 temp2 = READREG32(HW_REG_DISPCNT); + u32 temp2 = reg_GX_DISPCNT; UNK_021D33C0 = mode1; if (!UNK_02106810) mode1 = 0; - SETREG32(HW_REG_DISPCNT, (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3)); + reg_GX_DISPCNT = (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3); if (!UNK_021D33C0) UNK_02106810 = 0x0; } ARM_FUNC void GXS_SetGraphicsMode(u32 mode){ - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x7 | mode); + reg_GXS_DB_DISPCNT = reg_GXS_DB_DISPCNT & ~0x7 | mode; } ARM_FUNC void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ diff --git a/arm9/lib/src/GX_bgcnt.c b/arm9/lib/src/GX_bgcnt.c index 1eeffab6..63fe87b1 100644 --- a/arm9/lib/src/GX_bgcnt.c +++ b/arm9/lib/src/GX_bgcnt.c @@ -3,27 +3,27 @@ #include "gx.h" ARM_FUNC void *G2_GetBG0ScrPtr(){ - u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x1F00) >> 0x8) << 0xB); - return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); + u32 temp = (((reg_G2_BG0CNT & 0x1F00) >> 0x8) << 0xB); + return (void *)(0x6000000 + (((reg_GX_DISPCNT & 0x38000000) >> 0x1B) << 0x10) + temp); } ARM_FUNC void *G2S_GetBG0ScrPtr(){ - return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x1F00) >> 0x8) << 0xB)); + return (void *)(0x6200000 + (((reg_G2S_DB_BG0CNT & 0x1F00) >> 0x8) << 0xB)); } ARM_FUNC void *G2_GetBG1ScrPtr(){ - u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x1F00) >> 0x8) << 0xB); - return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10) + temp); + u32 temp = (((reg_G2_BG1CNT & 0x1F00) >> 0x8) << 0xB); + return (void *)(0x6000000 + (((reg_GX_DISPCNT & 0x38000000) >> 0x1B) << 0x10) + temp); } ARM_FUNC void *G2S_GetBG1ScrPtr(){ - return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x1F00) >> 0x8) << 0xB)); + return (void *)(0x6200000 + (((reg_G2S_DB_BG1CNT & 0x1F00) >> 0x8) << 0xB)); } ARM_FUNC void *G2_GetBG2ScrPtr(){ - u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); - u32 temp3 = READREG16(HW_REG_BG2CNT_A); - u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); + u32 temp12 = (reg_GX_DISPCNT & 0x7); + u32 temp3 = reg_G2_BG2CNT; + u32 temp2 = (((reg_GX_DISPCNT & 0x38000000) >> 0x1B) << 0x10); u32 temp1 = ((temp3 & 0x1F00) >> 0x8); switch (temp12) { @@ -46,8 +46,8 @@ ARM_FUNC void *G2_GetBG2ScrPtr(){ } ARM_FUNC void *G2S_GetBG2ScrPtr(){ - u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); - u32 temp3 = READREG16(HW_REG_BG2CNT_B); + u32 temp12 = (reg_GXS_DB_DISPCNT & 0x7); + u32 temp3 = reg_G2S_DB_BG2CNT; u32 temp1 = ((temp3 & 0x1F00) >> 0x8); switch (temp12) { @@ -70,9 +70,9 @@ ARM_FUNC void *G2S_GetBG2ScrPtr(){ } ARM_FUNC void *G2_GetBG3ScrPtr(){ - u32 temp12 = (READREG32(HW_REG_DISPCNT_A) & 0x7); - u32 temp3 = READREG16(HW_REG_BG3CNT_A); - u32 temp2 = (((READREG32(HW_REG_DISPCNT_A) & 0x38000000) >> 0x1B) << 0x10); + u32 temp12 = (reg_GX_DISPCNT & 0x7); + u32 temp3 = reg_G2_BG3CNT; + u32 temp2 = (((reg_GX_DISPCNT & 0x38000000) >> 0x1B) << 0x10); u32 temp1 = ((temp3 & 0x1F00) >> 0x8); switch (temp12) { @@ -95,8 +95,8 @@ ARM_FUNC void *G2_GetBG3ScrPtr(){ } ARM_FUNC void *G2S_GetBG3ScrPtr(){ - u32 temp12 = (READREG32(HW_REG_DISPCNT_B) & 0x7); - u32 temp3 = READREG16(HW_REG_BG3CNT_B); + u32 temp12 = (reg_GXS_DB_DISPCNT & 0x7); + u32 temp3 = reg_G2S_DB_BG3CNT; u32 temp1 = ((temp3 & 0x1F00) >> 0x8); switch (temp12) { @@ -119,29 +119,29 @@ ARM_FUNC void *G2S_GetBG3ScrPtr(){ } ARM_FUNC void *G2_GetBG0CharPtr(){ - u32 temp = (((READREG16(HW_REG_BG0CNT_A) & 0x3C) >> 0x2) << 0xE); - return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); + u32 temp = (((reg_G2_BG0CNT & 0x3C) >> 0x2) << 0xE); + return (void *)(0x6000000 + (((reg_GX_DISPCNT & 0x7000000) >> 0x18) << 0x10) + temp); } ARM_FUNC void *G2S_GetBG0CharPtr(){ - return (void *)(0x6200000 + (((READREG16(HW_REG_BG0CNT_B) & 0x3C) >> 0x2) << 0xE)); + return (void *)(0x6200000 + (((reg_G2S_DB_BG0CNT & 0x3C) >> 0x2) << 0xE)); } ARM_FUNC void *G2_GetBG1CharPtr(){ - u32 temp = (((READREG16(HW_REG_BG1CNT_A) & 0x3C) >> 0x2) << 0xE); - return (void *)(0x6000000 + (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10) + temp); + u32 temp = (((reg_G2_BG1CNT & 0x3C) >> 0x2) << 0xE); + return (void *)(0x6000000 + (((reg_GX_DISPCNT & 0x7000000) >> 0x18) << 0x10) + temp); } ARM_FUNC void *G2S_GetBG1CharPtr(){ - return (void *)(0x6200000 + (((READREG16(HW_REG_BG1CNT_B) & 0x3C) >> 0x2) << 0xE)); + return (void *)(0x6200000 + (((reg_G2S_DB_BG1CNT & 0x3C) >> 0x2) << 0xE)); } ARM_FUNC void *G2_GetBG2CharPtr(){ - s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); - u32 temp = READREG16(HW_REG_BG2CNT_A); + s32 temp1 = (reg_GX_DISPCNT & 0x7); + u32 temp = reg_G2_BG2CNT; if (temp1 < 5 || !(temp & 0x80)) { - u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10); + u32 temp1 = (((reg_GX_DISPCNT & 0x7000000) >> 0x18) << 0x10); u32 temp2 = (temp & 0x3C) >> 2; return (void *)(0x6000000 + temp1 + (temp2 << 0xE)); } @@ -152,8 +152,8 @@ ARM_FUNC void *G2_GetBG2CharPtr(){ } ARM_FUNC void *G2S_GetBG2CharPtr(){ - s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); - u32 temp = READREG16(HW_REG_BG2CNT_B); + s32 temp1 = (reg_GXS_DB_DISPCNT & 0x7); + u32 temp = reg_G2S_DB_BG2CNT; if (temp1 < 5 || !(temp & 0x80)) { u32 temp2 = ((temp & 0x3C) >> 2) << 0xE; @@ -166,11 +166,11 @@ ARM_FUNC void *G2S_GetBG2CharPtr(){ } ARM_FUNC void *G2_GetBG3CharPtr(){ - s32 temp1 = (READREG32(HW_REG_DISPCNT_A) & 0x7); - u32 temp = READREG16(HW_REG_BG3CNT_A); + s32 temp1 = (reg_GX_DISPCNT & 0x7); + u32 temp = reg_G2_BG3CNT; if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) { - u32 temp1 = (((READREG32(HW_REG_DISPCNT_A) & 0x7000000) >> 0x18) << 0x10); + u32 temp1 = (((reg_GX_DISPCNT & 0x7000000) >> 0x18) << 0x10); u32 temp2 = (temp & 0x3C) >> 2; return (void *)(0x6000000 + temp1 + (temp2 << 0xE)); } @@ -181,8 +181,8 @@ ARM_FUNC void *G2_GetBG3CharPtr(){ } ARM_FUNC void *G2S_GetBG3CharPtr(){ - s32 temp1 = (READREG32(HW_REG_DISPCNT_B) & 0x7); - u32 temp = READREG16(HW_REG_BG3CNT_B); + s32 temp1 = (reg_GXS_DB_DISPCNT & 0x7); + u32 temp = reg_G2S_DB_BG3CNT; if (temp1 < 3 || (temp1 < 6 && !(temp & 0x80))) { u32 temp2 = ((temp & 0x3C) >> 2) << 0xE; diff --git a/arm9/lib/src/GX_g3_util.c b/arm9/lib/src/GX_g3_util.c index 75e18589..f34e23ed 100644 --- a/arm9/lib/src/GX_g3_util.c +++ b/arm9/lib/src/GX_g3_util.c @@ -11,12 +11,12 @@ ARM_FUNC void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fovcot = FX_Div(fovcos, fovsin); if (scale != 0x1000) //!= 1.0 fovcot = (fovcot * scale) / 0x1000; - SETREG64(HW_REG_DIV_NUMER, (s64)fovcot << 0x20); - SETREG64(HW_REG_DIV_DENOM, (u32)ratio); + reg_CP_DIV_NUMER = (s64)fovcot << 0x20; + reg_CP_DIV_DENOM = (u32)ratio; if (load) { - SETREG32(HW_REG_MTX_MODE, 0x0); - reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x4; + reg_G3_MTX_MODE = 0x0; + reg_ptr = (vu32 *)®_G3_MTX_LOAD_4x4; } if (mtx) { @@ -34,8 +34,8 @@ ARM_FUNC void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, mtx->_[15] = 0x0; } temp1 = FX_GetDivResult(); - SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); - SETREG64(HW_REG_DIV_DENOM, (u32)(near - far)); + reg_CP_DIV_NUMER = (s64)0x1000 << 0x20; + reg_CP_DIV_DENOM = (u32)(near - far); if (load) { *reg_ptr = temp1; @@ -83,8 +83,8 @@ ARM_FUNC void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 nea FX_InvAsync(right - left); if (load) { - SETREG32(HW_REG_MTX_MODE, 0x0); - reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x4; + reg_G3_MTX_MODE = 0x0; + reg_ptr = (vu32 *)®_G3_MTX_LOAD_4x4; } if (mtx) { @@ -100,8 +100,8 @@ ARM_FUNC void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 nea mtx->_[15] = scale; } temp1 = FX_GetDivResultFx64c(); - SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); - SETREG64(HW_REG_DIV_DENOM, (u32)(top - bottom)); + reg_CP_DIV_NUMER = (s64)0x1000 << 0x20; + reg_CP_DIV_DENOM = (u32)(top - bottom); if (scale != 0x1000) temp1 = (temp1 * scale) / 0x1000; temp0 = (0x2000 * temp1 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; @@ -118,8 +118,8 @@ ARM_FUNC void G3i_OrthoW_(fx32 top, fx32 bottom, fx32 left, fx32 right, fx32 nea mtx->_[0] = temp0; } temp2 = FX_GetDivResultFx64c(); - SETREG64(HW_REG_DIV_NUMER, (s64)0x1000 << 0x20); - SETREG64(HW_REG_DIV_DENOM, (u32)(near - far)); + reg_CP_DIV_NUMER = (s64)0x1000 << 0x20; + reg_CP_DIV_DENOM = (u32)(near - far); if (scale != 0x1000) temp2 = (temp2 * scale) / 0x1000; temp0 = (0x2000 * temp2 + ((fx64)1 << (FX64C_INT_SHIFT - 1))) >> FX64C_INT_SHIFT; @@ -179,8 +179,8 @@ ARM_FUNC void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, VEC_CrossProduct(&temp, &temp1, &temp2); if (load) { - SETREG32(HW_REG_MTX_MODE, 0x2); - reg_ptr = (vu32 *)HW_REG_MTX_LOAD_4x3; + reg_G3_MTX_MODE = 0x2; + reg_ptr = (vu32 *)®_G3_MTX_LOAD_4x3; *reg_ptr = temp1.x; *reg_ptr = temp2.x; *reg_ptr = temp.x; @@ -219,7 +219,7 @@ ARM_FUNC void G3i_LookAt_(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *c, ARM_FUNC void G3_RotX(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; - reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + reg_ptr = (vu32 *)®_G3_MTX_MULT_3x3; *reg_ptr = 0x1000; *reg_ptr = 0x0; *reg_ptr = 0x0; @@ -233,7 +233,7 @@ ARM_FUNC void G3_RotX(fx32 sinphi, fx32 cosphi){ ARM_FUNC void G3_RotY(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; - reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + reg_ptr = (vu32 *)®_G3_MTX_MULT_3x3; *reg_ptr = cosphi; *reg_ptr = 0x0; *reg_ptr = -sinphi; @@ -247,7 +247,7 @@ ARM_FUNC void G3_RotY(fx32 sinphi, fx32 cosphi){ ARM_FUNC void G3_RotZ(fx32 sinphi, fx32 cosphi){ vu32 *reg_ptr; - reg_ptr = (vu32 *)HW_REG_MTX_MULT_3x3; + reg_ptr = (vu32 *)®_G3_MTX_MULT_3x3; *reg_ptr = cosphi; *reg_ptr = sinphi; *reg_ptr = 0x0; diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c index f11e2927..a5c62c26 100644 --- a/arm9/lib/src/GX_g3imm.c +++ b/arm9/lib/src/GX_g3imm.c @@ -3,16 +3,16 @@ #include "gx.h" ARM_FUNC void G3_LoadMtx43(struct Mtx43 *mtx){ - SETREG32(HW_REG_GXFIFO, 0x17); - GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); + reg_G3X_GXFIFO = 0x17; + GX_SendFifo48B(mtx, (void *)®_G3X_GXFIFO); } ARM_FUNC void G3_MultMtx43(struct Mtx43 *mtx){ - SETREG32(HW_REG_GXFIFO, 0x19); - GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO); + reg_G3X_GXFIFO = 0x19; + GX_SendFifo48B(mtx, (void *)®_G3X_GXFIFO); } ARM_FUNC void G3_MultMtx33(struct Mtx33 *mtx){ - SETREG32(HW_REG_GXFIFO, 0x1A); - MI_Copy36B(mtx, (void *)HW_REG_GXFIFO); + reg_G3X_GXFIFO = 0x1A; + MI_Copy36B(mtx, (void *)®_G3X_GXFIFO); } diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index e76adce7..5a03c4ca 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -46,190 +46,190 @@ ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){ ARM_FUNC void G3X_Init(){ G3X_ClearFifo(); - SETREG32(HW_REG_END_VTXS, 0x0); - while (READREG32(HW_REG_GXSTAT) & 0x8000000); //wait for geometry engine to not be busy - SETREG16(HW_REG_DISP3DCNT, 0x0); - SETREG32(HW_REG_GXSTAT, 0x0); - SETREG32(HW_REG_BG0HOFS, 0x0); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x2000); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x1000); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x3002); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x3000 | 0x10); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & (u16)~0x3004); - SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); - SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) & ~0xC0000000 | 0x80000000); + reg_G3_END_VTXS = 0x0; + while (reg_G3X_GXSTAT & 0x8000000); //wait for geometry engine to not be busy + reg_G3X_DISP3DCNT = 0x0; + reg_G3X_GXSTAT = 0x0; + reg_G2_BG0OFS = 0x0; + reg_G3X_DISP3DCNT |= 0x2000; + reg_G3X_DISP3DCNT |= 0x1000; + reg_G3X_DISP3DCNT &= ~0x3002; + reg_G3X_DISP3DCNT = reg_G3X_DISP3DCNT & ~0x3000 | 0x10; + reg_G3X_DISP3DCNT = reg_G3X_DISP3DCNT & (u16)~0x3004; + reg_G3X_GXSTAT |= 0x8000; + reg_G3X_GXSTAT = reg_G3X_GXSTAT & ~0xC0000000 | 0x80000000; G3X_InitMtxStack(); - SETREG32(HW_REG_CLEAR_COLOR, 0x0); - SETREG16(HW_REG_CLEAR_DEPTH, 0x7FFF); - SETREG16(HW_REG_CLRIMAGE_OFFSET, 0x0); - SETREG32(HW_REG_FOG_COLOR, 0x0); - SETREG16(HW_REG_FOG_OFFSET, 0x0); - SETREG16(HW_REG_BG0CNT, READREG16(HW_REG_BG0CNT) & ~0x3); + reg_G3X_CLEAR_COLOR = 0x0; + reg_G3X_CLEAR_DEPTH = 0x7FFF; + reg_G3X_CLRIMAGE_OFFSET = 0x0; + reg_G3X_FOG_COLOR = 0x0; + reg_G3X_FOG_OFFSET = 0x0; + reg_G2_BG0CNT &= ~0x3; G3X_InitTable(); - SETREG32(HW_REG_POLYGON_ATTR, 0x1F0080); - SETREG32(HW_REG_TEXIMAGE_PARAM, 0x0); - SETREG32(HW_REG_PLTT_BASE, 0x0); + reg_G3_POLYGON_ATTR = 0x1F0080; + reg_G3_TEXIMAGE_PARAM = 0x0; + reg_G3_TEXPLTT_BASE = 0x0; } ARM_FUNC void G3X_ResetMtxStack(){ - while (READREG32(HW_REG_GXSTAT) & 0x8000000); - SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x2000); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x1000); + while (reg_G3X_GXSTAT & 0x8000000); + reg_G3X_GXSTAT |= 0x8000; + reg_G3X_DISP3DCNT |= 0x2000; + reg_G3X_DISP3DCNT |= 0x1000; G3X_ResetMtxStack_2(); - SETREG32(HW_REG_POLYGON_ATTR, 0x1F0080); - SETREG32(HW_REG_TEXIMAGE_PARAM, 0x0); - SETREG32(HW_REG_PLTT_BASE, 0x0); + reg_G3_POLYGON_ATTR = 0x1F0080; + reg_G3_TEXIMAGE_PARAM = 0x0; + reg_G3_TEXPLTT_BASE = 0x0; } ARM_FUNC void G3X_ClearFifo(){ - GXi_NopClearFifo128_((void *)HW_REG_GXFIFO); - while (READREG32(HW_REG_GXSTAT) & 0x8000000); + GXi_NopClearFifo128_((void *)®_G3X_GXFIFO); + while (reg_G3X_GXSTAT & 0x8000000); } ARM_FUNC void G3X_InitMtxStack(){ u32 PV_level, PJ_level; - SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + reg_G3X_GXSTAT |= 0x8000; while (G3X_GetMtxStackLevelPV(&PV_level)); while (G3X_GetMtxStackLevelPJ(&PJ_level)); - SETREG32(HW_REG_MTX_MODE, 0x3); - SETREG32(HW_REG_MTX_IDENTITY, 0x0); - SETREG32(HW_REG_MTX_MODE, 0x0); + reg_G3_MTX_MODE = 0x3; + reg_G3_MTX_IDENTITY = 0x0; + reg_G3_MTX_MODE = 0x0; if (PJ_level) { - SETREG32(HW_REG_MTX_POP, PJ_level); + reg_G3_MTX_POP = PJ_level; } - SETREG32(HW_REG_MTX_IDENTITY, 0x0); - SETREG32(HW_REG_MTX_MODE, 0x2); - SETREG32(HW_REG_MTX_POP, PV_level); - SETREG32(HW_REG_MTX_IDENTITY, 0x0); + reg_G3_MTX_IDENTITY = 0x0; + reg_G3_MTX_MODE = 0x2; + reg_G3_MTX_POP = PV_level; + reg_G3_MTX_IDENTITY = 0x0; } ARM_FUNC void G3X_ResetMtxStack_2(){ u32 PV_level, PJ_level; - SETREG32(HW_REG_GXSTAT, READREG32(HW_REG_GXSTAT) | 0x8000); + reg_G3X_GXSTAT |= 0x8000; while (G3X_GetMtxStackLevelPV(&PV_level)); while (G3X_GetMtxStackLevelPJ(&PJ_level)); - SETREG32(HW_REG_MTX_MODE, 0x3); - SETREG32(HW_REG_MTX_IDENTITY, 0x0); - SETREG32(HW_REG_MTX_MODE, 0x0); + reg_G3_MTX_MODE = 0x3; + reg_G3_MTX_IDENTITY = 0x0; + reg_G3_MTX_MODE = 0x0; if (PJ_level) { - SETREG32(HW_REG_MTX_POP, PJ_level); + reg_G3_MTX_POP = PJ_level; } - SETREG32(HW_REG_MTX_MODE, 0x2); - SETREG32(HW_REG_MTX_POP, PV_level); - SETREG32(HW_REG_MTX_IDENTITY, 0x0); + reg_G3_MTX_MODE = 0x2; + reg_G3_MTX_POP = PV_level; + reg_G3_MTX_IDENTITY = 0x0; } ARM_FUNC void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){ if (enable) { - SETREG16(HW_REG_FOG_OFFSET, offset); - SETREG16(HW_REG_DISP3DCNT, (READREG16(HW_REG_DISP3DCNT) &~0x3f40) | (((depth << 0x8)| (alphamode << 0x6)|0x80 ))); + reg_G3X_FOG_OFFSET = offset; + reg_G3X_DISP3DCNT = (reg_G3X_DISP3DCNT &~0x3f40) | (((depth << 0x8)| (alphamode << 0x6)|0x80 )); } else { - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & (u16)~0x3080); + reg_G3X_DISP3DCNT = reg_G3X_DISP3DCNT & (u16)~0x3080; } } ARM_FUNC u32 G3X_GetClipMtx(struct Mtx44 *dst){ - if (READREG32(HW_REG_GXSTAT) & 0x8000000) + if (reg_G3X_GXSTAT & 0x8000000) { return -1; } else { - MI_Copy64B((void *)HW_REG_CLIPMTX_RESULT, dst); + MI_Copy64B((void *)®_G3X_CLIPMTX_RESULT_0, dst); return 0; } } ARM_FUNC u32 G3X_GetVectorMtx(struct Mtx33 *dst){ - if (READREG32(HW_REG_GXSTAT) & 0x8000000) + if (reg_G3X_GXSTAT & 0x8000000) { return -1; } else { - MI_Copy36B((void *)HW_REG_VECMTX_RESULT, dst); + MI_Copy36B((void *)®_G3X_VECMTX_RESULT_0, dst); return 0; } } ARM_FUNC void G3X_SetEdgeColorTable(void *tbl_ptr){ - MIi_CpuCopy16(tbl_ptr, (void *)HW_REG_EDGE_COLOR, 0x10); + MIi_CpuCopy16(tbl_ptr, (void *)®_G3X_EDGE_COLOR_0, 0x10); } ARM_FUNC void G3X_SetFogTable(void *tbl_ptr){ - MI_Copy16B(tbl_ptr, (void *)HW_REG_FOG_TABLE); + MI_Copy16B(tbl_ptr, (void *)®_G3X_FOG_TABLE_0); } ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){ u32 temp = col | (alpha << 0x10) | (polygon_id << 0x18); if (enable_fog) temp |= 0x8000; - SETREG32(HW_REG_CLEAR_COLOR, temp); - SETREG16(HW_REG_CLEAR_DEPTH, depth); + reg_G3X_CLEAR_COLOR = temp; + reg_G3X_CLEAR_DEPTH = depth; } ARM_FUNC void G3X_InitTable(){ if (UNK_02106814 != -1) { - MI_DmaFill32Async(UNK_02106814, (void *)HW_REG_EDGE_COLOR, 0x0, 0x10, 0x0, 0x0); - MI_DmaFill32(UNK_02106814, (void *)HW_REG_FOG_TABLE, 0x0, 0x60); + MI_DmaFill32Async(UNK_02106814, (void *)®_G3X_EDGE_COLOR_0, 0x0, 0x10, 0x0, 0x0); + MI_DmaFill32(UNK_02106814, (void *)®_G3X_FOG_TABLE_0, 0x0, 0x60); } else { - MIi_CpuClear32(0x0, (void *)HW_REG_EDGE_COLOR, 0x10); - MIi_CpuClear32(0x0, (void *)HW_REG_FOG_TABLE, 0x60); + MIi_CpuClear32(0x0, (void *)®_G3X_EDGE_COLOR_0, 0x10); + MIi_CpuClear32(0x0, (void *)®_G3X_FOG_TABLE_0, 0x60); } for (int i = 0; i < 0x20; i++) { - SETREG32(HW_REG_SHININESS, 0x0); + reg_G3_SHININESS = 0x0; } } ARM_FUNC u32 G3X_GetMtxStackLevelPV(u32 *level){ - if (READREG32(HW_REG_GXSTAT) & 0x4000) + if (reg_G3X_GXSTAT & 0x4000) { return -1; } else { - *level = (READREG32(HW_REG_GXSTAT) & 0x1F00) >> 0x8; + *level = (reg_G3X_GXSTAT & 0x1F00) >> 0x8; return 0; } } ARM_FUNC u32 G3X_GetMtxStackLevelPJ(u32 *level){ - if (READREG32(HW_REG_GXSTAT) & 0x4000) + if (reg_G3X_GXSTAT & 0x4000) { return -1; } else { - *level = (READREG32(HW_REG_GXSTAT) & 0x2000) >> 0xD; + *level = (reg_G3X_GXSTAT & 0x2000) >> 0xD; return 0; } } ARM_FUNC u32 G3X_GetBoxTestResult(u32 *result){ - if (READREG32(HW_REG_GXSTAT) & 0x1) + if (reg_G3X_GXSTAT & 0x1) { return -1; } else { - *result = (READREG32(HW_REG_GXSTAT) & 0x2); + *result = (reg_G3X_GXSTAT & 0x2); return 0; } } ARM_FUNC void G3X_SetHOffset(u32 offset){ - SETREG32(HW_REG_BG0HOFS, offset); + reg_G2_BG0OFS = offset; } diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c index 79a53ee7..7da3e1b4 100644 --- a/arm9/lib/src/GX_state.c +++ b/arm9/lib/src/GX_state.c @@ -18,9 +18,9 @@ ARM_FUNC void GX_InitGXState(){ UNK_021D33C4.var14 = 0x0; UNK_021D33C4.var16 = 0x0; UNK_021D33C4.var18 = 0x0; - SETREG32(HW_REG_VRAMCNT_A, 0x0); - SETREG8(HW_REG_VRAMCNT_E, 0x0); - SETREG8(HW_REG_VRAMCNT_F, 0x0); - SETREG8(HW_REG_VRAMCNT_G, 0x0); - SETREG16(HW_REG_VRAMCNT_H, 0x0); + reg_GX_VRAMCNT = 0x0; + reg_GX_VRAMCNT_E = 0x0; + reg_GX_VRAMCNT_F = 0x0; + reg_GX_VRAMCNT_G = 0x0; + reg_GX_VRAM_HI_CNT = 0x0; } diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index fdedca46..18507fa4 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -7,23 +7,23 @@ extern struct VRAM_banks UNK_021D33C4; ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ if (mask & (0x1 << 0)) - SETREG8(HW_REG_VRAMCNT_A, 0x80); + reg_GX_VRAMCNT_A = 0x80; if (mask & (0x1 << 1)) - SETREG8(HW_REG_VRAMCNT_B, 0x80); + reg_GX_VRAMCNT_B = 0x80; if (mask & (0x1 << 2)) - SETREG8(HW_REG_VRAMCNT_C, 0x80); + reg_GX_VRAMCNT_C = 0x80; if (mask & (0x1 << 3)) - SETREG8(HW_REG_VRAMCNT_D, 0x80); + reg_GX_VRAMCNT_D = 0x80; if (mask & (0x1 << 4)) - SETREG8(HW_REG_VRAMCNT_E, 0x80); + reg_GX_VRAMCNT_E = 0x80; if (mask & (0x1 << 5)) - SETREG8(HW_REG_VRAMCNT_F, 0x80); + reg_GX_VRAMCNT_F = 0x80; if (mask & (0x1 << 6)) - SETREG8(HW_REG_VRAMCNT_G, 0x80); + reg_GX_VRAMCNT_G = 0x80; if (mask & (0x1 << 7)) - SETREG8(HW_REG_VRAMCNT_H, 0x80); + reg_GX_VRAMCNT_H = 0x80; if (mask & (0x1 << 8)) - SETREG8(HW_REG_VRAMCNT_I, 0x80); + reg_GX_VRAMCNT_I = 0x80; } ARM_FUNC void GX_SetBankForBG(s32 bg){ @@ -32,66 +32,66 @@ ARM_FUNC void GX_SetBankForBG(s32 bg){ switch (bg) { case 8: - SETREG8(HW_REG_VRAMCNT_D, 0x81); + reg_GX_VRAMCNT_D = 0x81; break; case 12: - SETREG8(HW_REG_VRAMCNT_D, 0x89); + reg_GX_VRAMCNT_D = 0x89; case 4: - SETREG8(HW_REG_VRAMCNT_C, 0x81); + reg_GX_VRAMCNT_C = 0x81; break; case 14: - SETREG8(HW_REG_VRAMCNT_D, 0x91); + reg_GX_VRAMCNT_D = 0x91; case 6: - SETREG8(HW_REG_VRAMCNT_C, 0x89); + reg_GX_VRAMCNT_C = 0x89; case 2: - SETREG8(HW_REG_VRAMCNT_B, 0x81); + reg_GX_VRAMCNT_B = 0x81; break; case 15: - SETREG8(HW_REG_VRAMCNT_D, 0x99); + reg_GX_VRAMCNT_D = 0x99; case 7: - SETREG8(HW_REG_VRAMCNT_C, 0x91); + reg_GX_VRAMCNT_C = 0x91; case 3: - SETREG8(HW_REG_VRAMCNT_B, 0x89); + reg_GX_VRAMCNT_B = 0x89; case 1: - SETREG8(HW_REG_VRAMCNT_A, 0x81); + reg_GX_VRAMCNT_A = 0x81; break; case 11: - SETREG8(HW_REG_VRAMCNT_A, 0x81); - SETREG8(HW_REG_VRAMCNT_B, 0x89); - SETREG8(HW_REG_VRAMCNT_D, 0x91); + reg_GX_VRAMCNT_A = 0x81; + reg_GX_VRAMCNT_B = 0x89; + reg_GX_VRAMCNT_D = 0x91; break; case 13: - SETREG8(HW_REG_VRAMCNT_D, 0x91); + reg_GX_VRAMCNT_D = 0x91; case 5: - SETREG8(HW_REG_VRAMCNT_A, 0x81); - SETREG8(HW_REG_VRAMCNT_C, 0x89); + reg_GX_VRAMCNT_A = 0x81; + reg_GX_VRAMCNT_C = 0x89; break; case 9: - SETREG8(HW_REG_VRAMCNT_A, 0x81); - SETREG8(HW_REG_VRAMCNT_D, 0x89); + reg_GX_VRAMCNT_A = 0x81; + reg_GX_VRAMCNT_D = 0x89; break; case 10: - SETREG8(HW_REG_VRAMCNT_B, 0x81); - SETREG8(HW_REG_VRAMCNT_D, 0x89); + reg_GX_VRAMCNT_B = 0x81; + reg_GX_VRAMCNT_D = 0x89; break; case 112: - SETREG8(HW_REG_VRAMCNT_G, 0x99); + reg_GX_VRAMCNT_G = 0x99; case 48: - SETREG8(HW_REG_VRAMCNT_F, 0x91); + reg_GX_VRAMCNT_F = 0x91; case 16: - SETREG8(HW_REG_VRAMCNT_E, 0x81); + reg_GX_VRAMCNT_E = 0x81; break; case 80: - SETREG8(HW_REG_VRAMCNT_G, 0x91); - SETREG8(HW_REG_VRAMCNT_E, 0x81); + reg_GX_VRAMCNT_G = 0x91; + reg_GX_VRAMCNT_E = 0x81; break; case 96: - SETREG8(HW_REG_VRAMCNT_G, 0x89); + reg_GX_VRAMCNT_G = 0x89; case 32: - SETREG8(HW_REG_VRAMCNT_F, 0x81); + reg_GX_VRAMCNT_F = 0x81; break; case 64: - SETREG8(HW_REG_VRAMCNT_G, 0x81); + reg_GX_VRAMCNT_G = 0x81; break; default: break; @@ -105,32 +105,32 @@ ARM_FUNC void GX_SetBankForOBJ(s32 obj){ switch (obj) { case 3: - SETREG8(HW_REG_VRAMCNT_B, 0x8A); + reg_GX_VRAMCNT_B = 0x8A; case 1: - SETREG8(HW_REG_VRAMCNT_A, 0x82); + reg_GX_VRAMCNT_A = 0x82; case 0: //needed to match break; case 2: - SETREG8(HW_REG_VRAMCNT_B, 0x82); + reg_GX_VRAMCNT_B = 0x82; break; case 112: - SETREG8(HW_REG_VRAMCNT_G, 0x9A); + reg_GX_VRAMCNT_G = 0x9A; case 48: - SETREG8(HW_REG_VRAMCNT_F, 0x92); + reg_GX_VRAMCNT_F = 0x92; case 16: - SETREG8(HW_REG_VRAMCNT_E, 0x82); + reg_GX_VRAMCNT_E = 0x82; break; case 80: - SETREG8(HW_REG_VRAMCNT_G, 0x92); - SETREG8(HW_REG_VRAMCNT_E, 0x82); + reg_GX_VRAMCNT_G = 0x92; + reg_GX_VRAMCNT_E = 0x82; break; case 96: - SETREG8(HW_REG_VRAMCNT_G, 0x8A); + reg_GX_VRAMCNT_G = 0x8A; case 32: - SETREG8(HW_REG_VRAMCNT_F, 0x82); + reg_GX_VRAMCNT_F = 0x82; break; case 64: - SETREG8(HW_REG_VRAMCNT_G, 0x82); + reg_GX_VRAMCNT_G = 0x82; break; default: break; @@ -144,21 +144,21 @@ ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ switch (bgextpltt) { case 0x10: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); - SETREG8(HW_REG_VRAMCNT_E, 0x84); + reg_GX_DISPCNT |= 0x40000000; + reg_GX_VRAMCNT_E = 0x84; break; case 0x40: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); - SETREG8(HW_REG_VRAMCNT_G, 0x8C); + reg_GX_DISPCNT |= 0x40000000; + reg_GX_VRAMCNT_G = 0x8C; break; case 0x60: - SETREG8(HW_REG_VRAMCNT_G, 0x8C); + reg_GX_VRAMCNT_G = 0x8C; case 0x20: - SETREG8(HW_REG_VRAMCNT_F, 0x84); - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x40000000); + reg_GX_VRAMCNT_F = 0x84; + reg_GX_DISPCNT |= 0x40000000; break; case 0: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + reg_GX_DISPCNT &= ~0x40000000; break; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); @@ -170,15 +170,15 @@ ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ switch (objextpltt) { case 32: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x80000000); - SETREG8(HW_REG_VRAMCNT_F, 0x85); + reg_GX_DISPCNT |= 0x80000000; + reg_GX_VRAMCNT_F = 0x85; break; case 64: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x80000000); - SETREG8(HW_REG_VRAMCNT_G, 0x85); + reg_GX_DISPCNT |= 0x80000000; + reg_GX_VRAMCNT_G = 0x85; break; case 0: - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + reg_GX_DISPCNT &= ~0x80000000; break; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); @@ -189,58 +189,58 @@ ARM_FUNC void GX_SetBankForTex(s32 tex){ UNK_021D33C4.var08 = tex; if (tex == 0) { - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & 0x0000CFFE); + reg_G3X_DISP3DCNT &= 0x0000CFFE; } else { - SETREG16(HW_REG_DISP3DCNT, (READREG16(HW_REG_DISP3DCNT) & ~0x3000) | 0x1); + reg_G3X_DISP3DCNT = (reg_G3X_DISP3DCNT & ~0x3000) | 0x1; switch (tex) { case 5: - SETREG8(HW_REG_VRAMCNT_A, 0x83); - SETREG8(HW_REG_VRAMCNT_C, 0x8B); + reg_GX_VRAMCNT_A = 0x83; + reg_GX_VRAMCNT_C = 0x8B; break; case 9: - SETREG8(HW_REG_VRAMCNT_A, 0x83); - SETREG8(HW_REG_VRAMCNT_D, 0x8B); + reg_GX_VRAMCNT_A = 0x83; + reg_GX_VRAMCNT_D = 0x8B; break; case 10: - SETREG8(HW_REG_VRAMCNT_B, 0x83); - SETREG8(HW_REG_VRAMCNT_D, 0x8B); + reg_GX_VRAMCNT_B = 0x83; + reg_GX_VRAMCNT_D = 0x8B; break; case 11: - SETREG8(HW_REG_VRAMCNT_A, 0x83); - SETREG8(HW_REG_VRAMCNT_B, 0x8B); - SETREG8(HW_REG_VRAMCNT_D, 0x93); + reg_GX_VRAMCNT_A = 0x83; + reg_GX_VRAMCNT_B = 0x8B; + reg_GX_VRAMCNT_D = 0x93; break; case 13: - SETREG8(HW_REG_VRAMCNT_A, 0x83); - SETREG8(HW_REG_VRAMCNT_C, 0x8B); - SETREG8(HW_REG_VRAMCNT_D, 0x93); + reg_GX_VRAMCNT_A = 0x83; + reg_GX_VRAMCNT_C = 0x8B; + reg_GX_VRAMCNT_D = 0x93; break; case 8: - SETREG8(HW_REG_VRAMCNT_D, 0x83); + reg_GX_VRAMCNT_D = 0x83; break; case 12: - SETREG8(HW_REG_VRAMCNT_D, 0x8B); + reg_GX_VRAMCNT_D = 0x8B; case 4: - SETREG8(HW_REG_VRAMCNT_C, 0x83); + reg_GX_VRAMCNT_C = 0x83; break; case 14: - SETREG8(HW_REG_VRAMCNT_D, 0x93); + reg_GX_VRAMCNT_D = 0x93; case 6: - SETREG8(HW_REG_VRAMCNT_C, 0x8B); + reg_GX_VRAMCNT_C = 0x8B; case 2: - SETREG8(HW_REG_VRAMCNT_B, 0x83); + reg_GX_VRAMCNT_B = 0x83; break; case 15: - SETREG8(HW_REG_VRAMCNT_D, 0x9B); + reg_GX_VRAMCNT_D = 0x9B; case 7: - SETREG8(HW_REG_VRAMCNT_C, 0x93); + reg_GX_VRAMCNT_C = 0x93; case 3: - SETREG8(HW_REG_VRAMCNT_B, 0x8B); + reg_GX_VRAMCNT_B = 0x8B; case 1: - SETREG8(HW_REG_VRAMCNT_A, 0x83); + reg_GX_VRAMCNT_A = 0x83; break; } } @@ -255,19 +255,19 @@ ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ case 0: //needed to match break; case 96: - SETREG8(HW_REG_VRAMCNT_G, 0x8B); + reg_GX_VRAMCNT_G = 0x8B; case 32: - SETREG8(HW_REG_VRAMCNT_F, 0x83); + reg_GX_VRAMCNT_F = 0x83; break; case 112: - SETREG8(HW_REG_VRAMCNT_G, 0x9B); + reg_GX_VRAMCNT_G = 0x9B; case 48: - SETREG8(HW_REG_VRAMCNT_F, 0x93); + reg_GX_VRAMCNT_F = 0x93; case 16: - SETREG8(HW_REG_VRAMCNT_E, 0x83); + reg_GX_VRAMCNT_E = 0x83; break; case 64: - SETREG8(HW_REG_VRAMCNT_G, 0x83); + reg_GX_VRAMCNT_G = 0x83; break; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); @@ -279,27 +279,27 @@ ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ switch (clearimage) { case 3: - SETREG8(HW_REG_VRAMCNT_A, 0x93); + reg_GX_VRAMCNT_A = 0x93; case 2: - SETREG8(HW_REG_VRAMCNT_B, 0x9B); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + reg_GX_VRAMCNT_B = 0x9B; + reg_G3X_DISP3DCNT |= 0x4000; break; case 12: - SETREG8(HW_REG_VRAMCNT_C, 0x93); + reg_GX_VRAMCNT_C = 0x93; case 8: - SETREG8(HW_REG_VRAMCNT_D, 0x9B); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + reg_GX_VRAMCNT_D = 0x9B; + reg_G3X_DISP3DCNT |= 0x4000; break; case 0: - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) & ~0x4000); + reg_G3X_DISP3DCNT &= ~0x4000; break; case 1: - SETREG8(HW_REG_VRAMCNT_A, 0x9B); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + reg_GX_VRAMCNT_A = 0x9B; + reg_G3X_DISP3DCNT |= 0x4000; break; case 4: - SETREG8(HW_REG_VRAMCNT_C, 0x9B); - SETREG16(HW_REG_DISP3DCNT, READREG16(HW_REG_DISP3DCNT) | 0x4000); + reg_GX_VRAMCNT_C = 0x9B; + reg_G3X_DISP3DCNT |= 0x4000; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } @@ -312,14 +312,14 @@ ARM_FUNC void GX_SetBankForARM7(s32 arm7){ case 0: //needed to match break; case 12: - SETREG8(HW_REG_VRAMCNT_D, 0x8A); - SETREG8(HW_REG_VRAMCNT_C, 0x82); + reg_GX_VRAMCNT_D = 0x8A; + reg_GX_VRAMCNT_C = 0x82; break; case 4: - SETREG8(HW_REG_VRAMCNT_C, 0x82); + reg_GX_VRAMCNT_C = 0x82; break; case 8: - SETREG8(HW_REG_VRAMCNT_D, 0x82); + reg_GX_VRAMCNT_D = 0x82; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } @@ -337,12 +337,12 @@ ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ case 0: //needed to match break; case 4: - SETREG8(HW_REG_VRAMCNT_C, 0x84); + reg_GX_VRAMCNT_C = 0x84; break; case 384: - SETREG8(HW_REG_VRAMCNT_I, 0x81); + reg_GX_VRAMCNT_I = 0x81; case 128: - SETREG8(HW_REG_VRAMCNT_H, 0x81); + reg_GX_VRAMCNT_H = 0x81; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); } @@ -354,10 +354,10 @@ ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ switch (subobj) { case 8: - SETREG8(HW_REG_VRAMCNT_D, 0x84); + reg_GX_VRAMCNT_D = 0x84; break; case 256: - SETREG8(HW_REG_VRAMCNT_I, 0x82); + reg_GX_VRAMCNT_I = 0x82; break; case 0: //needed to match break; @@ -371,11 +371,11 @@ ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ switch (subbgextpltt) { case 128: - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) | 0x40000000); - SETREG8(HW_REG_VRAMCNT_H, 0x82); + reg_GXS_DB_DISPCNT |= 0x40000000; + reg_GX_VRAMCNT_H = 0x82; break; case 0: - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + reg_GXS_DB_DISPCNT &= ~0x40000000; break; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); @@ -387,11 +387,11 @@ ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ switch (subobjextpltt) { case 256: - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) | 0x80000000); - SETREG8(HW_REG_VRAMCNT_I, 0x83); + reg_GXS_DB_DISPCNT |= 0x80000000; + reg_GX_VRAMCNT_I = 0x83; break; case 0: - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + reg_GXS_DB_DISPCNT &= ~0x80000000; break; } GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); @@ -414,12 +414,12 @@ ARM_FUNC u32 GX_ResetBankForOBJ(){ } ARM_FUNC u32 GX_ResetBankForBGExtPltt(){ - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + reg_GX_DISPCNT &= ~0x40000000; return FUN_020C6130(&UNK_021D33C4.var0E); } ARM_FUNC u32 GX_ResetBankForOBJExtPltt(){ - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + reg_GX_DISPCNT &= ~0x80000000; return FUN_020C6130(&UNK_021D33C4.var10); } @@ -444,12 +444,12 @@ ARM_FUNC u32 FUN_020C605C(){ } ARM_FUNC u32 FUN_020C6034(){ - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + reg_GXS_DB_DISPCNT &= ~0x40000000; return FUN_020C6130(&UNK_021D33C4.var16); } ARM_FUNC u32 GX_ResetBankForSubOBJ(){ - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + reg_GXS_DB_DISPCNT &= ~0x80000000; return FUN_020C6130(&UNK_021D33C4.var18); } @@ -457,23 +457,23 @@ ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ u32 temp = *ptr; *ptr = 0; if (temp & (0x1 << 0)) - SETREG8(HW_REG_VRAMCNT_A, 0x0); + reg_GX_VRAMCNT_A = 0x0; if (temp & (0x1 << 1)) - SETREG8(HW_REG_VRAMCNT_B, 0x0); + reg_GX_VRAMCNT_B = 0x0; if (temp & (0x1 << 2)) - SETREG8(HW_REG_VRAMCNT_C, 0x0); + reg_GX_VRAMCNT_C = 0x0; if (temp & (0x1 << 3)) - SETREG8(HW_REG_VRAMCNT_D, 0x0); + reg_GX_VRAMCNT_D = 0x0; if (temp & (0x1 << 4)) - SETREG8(HW_REG_VRAMCNT_E, 0x0); + reg_GX_VRAMCNT_E = 0x0; if (temp & (0x1 << 5)) - SETREG8(HW_REG_VRAMCNT_F, 0x0); + reg_GX_VRAMCNT_F = 0x0; if (temp & (0x1 << 6)) - SETREG8(HW_REG_VRAMCNT_G, 0x0); + reg_GX_VRAMCNT_G = 0x0; if (temp & (0x1 << 7)) - SETREG8(HW_REG_VRAMCNT_H, 0x0); + reg_GX_VRAMCNT_H = 0x0; if (temp & (0x1 << 8)) - SETREG8(HW_REG_VRAMCNT_I, 0x0); + reg_GX_VRAMCNT_I = 0x0; OSi_UnlockVram((u16)temp, UNK_021D33BC); return temp; } @@ -487,12 +487,12 @@ ARM_FUNC u32 GX_DisableBankForOBJExtPltt_2(){ } ARM_FUNC u32 GX_DisableBankForBGExtPltt(){ - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x40000000); + reg_GX_DISPCNT &= ~0x40000000; return FUN_020C5F28(&UNK_021D33C4.var0E); } ARM_FUNC u32 GX_DisableBankForOBJExtPltt(){ - SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x80000000); + reg_GX_DISPCNT &= ~0x80000000; return FUN_020C5F28(&UNK_021D33C4.var10); } @@ -525,12 +525,12 @@ ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt_2(){ } ARM_FUNC u32 FUN_020C5E04(){ - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x40000000); + reg_GXS_DB_DISPCNT &= ~0x40000000; return FUN_020C5F28(&UNK_021D33C4.var16); } ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt(){ - SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x80000000); + reg_GXS_DB_DISPCNT &= ~0x80000000; return FUN_020C5F28(&UNK_021D33C4.var18); } -- cgit v1.2.3 From 2e1c3ccd3ff3035acc98b34c2b29ba5c865e6194 Mon Sep 17 00:00:00 2001 From: Made Date: Sun, 17 May 2020 01:40:01 +0200 Subject: struct defs --- arm9/lib/src/GX_g3.c | 36 +++++------ arm9/lib/src/GX_g3b.c | 130 ++++++++++++++++++++-------------------- arm9/lib/src/GX_state.c | 28 ++++----- arm9/lib/src/GX_vramcnt.c | 148 +++++++++++++++++++++++----------------------- 4 files changed, 171 insertions(+), 171 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_g3.c b/arm9/lib/src/GX_g3.c index eb01453d..379ee52b 100644 --- a/arm9/lib/src/GX_g3.c +++ b/arm9/lib/src/GX_g3.c @@ -3,34 +3,34 @@ #include "gx.h" -ARM_FUNC void G3_BeginMakeDL(struct DL *displaylist, void *r1, u32 r2){ - displaylist->var0C = r2; - displaylist->var08 = r1; - displaylist->var00 = r1; - displaylist->var04 = (u32 *)r1 + 1; - displaylist->var10 = 0x0; +ARM_FUNC void G3_BeginMakeDL(struct GXDLInfo *displaylist, void *r1, u32 r2){ + displaylist->length = r2; + displaylist->bottom = r1; + displaylist->curr_cmd = r1; + displaylist->curr_param = (u32 *)r1 + 1; + displaylist->param0_cmd_flg = 0x0; } -ARM_FUNC s32 G3_EndMakeDL(struct DL *displaylist){ - if (displaylist->var08 == displaylist->var00) +ARM_FUNC s32 G3_EndMakeDL(struct GXDLInfo *displaylist){ + if (displaylist->bottom == (u32 *)displaylist->curr_cmd) return 0; //pads the buffer with 0 to 4byte alignment if needed - switch((u32)displaylist->var00 & 0x3) + switch((u32)displaylist->curr_cmd & 0x3) { case 0: - return displaylist->var00 - displaylist->var08; + return displaylist->curr_cmd - (u8 *)displaylist->bottom; case 1: - *displaylist->var00++ = 0x0; + *displaylist->curr_cmd++ = 0x0; case 2: - *displaylist->var00++ = 0x0; + *displaylist->curr_cmd++ = 0x0; case 3: - *displaylist->var00++ = 0x0; + *displaylist->curr_cmd++ = 0x0; } - if (displaylist->var10) + if (displaylist->param0_cmd_flg) { - *displaylist->var04++ = 0x0; - displaylist->var10 = 0x0; + *displaylist->curr_param++ = 0x0; + displaylist->param0_cmd_flg = 0x0; } - displaylist->var00 = (u8 *)displaylist->var04; - return displaylist->var00 - displaylist->var08; + displaylist->curr_cmd = (u8 *)displaylist->curr_param; + return displaylist->curr_cmd - (u8 *)displaylist->bottom; } diff --git a/arm9/lib/src/GX_g3b.c b/arm9/lib/src/GX_g3b.c index 50281ec0..9a943bce 100644 --- a/arm9/lib/src/GX_g3b.c +++ b/arm9/lib/src/GX_g3b.c @@ -3,36 +3,36 @@ #include "gx.h" -ARM_FUNC void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ - *(u32 *)displaylist->var00 = 0x16; - MI_Copy64B(mtx, displaylist->var04); +ARM_FUNC void G3BS_LoadMtx44(struct GXDLInfo *displaylist, struct Mtx44 *mtx){ + *(u32 *)displaylist->curr_cmd = 0x16; + MI_Copy64B(mtx, displaylist->curr_param); } -ARM_FUNC void G3B_PushMtx(struct DL *displaylist){ - *(u32 *)displaylist->var00 = 0x11; - displaylist->var00 = (u8 *)displaylist->var04; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_PushMtx(struct GXDLInfo *displaylist){ + *(u32 *)displaylist->curr_cmd = 0x11; + displaylist->curr_cmd = (u8 *)displaylist->curr_param; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_PopMtx(struct DL *displaylist, void *mtx){ - *(u32 *)displaylist->var00 = 0x12; - *displaylist->var04 = (u32)mtx; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_PopMtx(struct GXDLInfo *displaylist, void *mtx){ + *(u32 *)displaylist->curr_cmd = 0x12; + *displaylist->curr_param = (u32)mtx; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx){ +ARM_FUNC void G3B_LoadMtx44(struct GXDLInfo *displaylist, struct Mtx44 *mtx){ G3BS_LoadMtx44(displaylist, mtx); - displaylist->var00 = (u8 *)displaylist->var04 + sizeof(struct Mtx44); - displaylist->var04 = (u32 *)displaylist->var00 + 1; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + sizeof(struct Mtx44); + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } //color format is RGB555, stored in the lower bits -ARM_FUNC void G3B_Color(struct DL * displaylist, u32 vtx_col){ - *(u32 *)displaylist->var00 = 0x20; - *displaylist->var04 = vtx_col; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_Color(struct GXDLInfo * displaylist, u32 vtx_col){ + *(u32 *)displaylist->curr_cmd = 0x20; + *displaylist->curr_param = vtx_col; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } /* @@ -40,51 +40,51 @@ Only feed normalized Vectors only the fractional part and the sign, which is in the first nonfraction bit since the vector is assumed to be normalized, are used */ -ARM_FUNC void G3B_Normal(struct DL * displaylist, fx16 x, fx16 y, fx16 z){ - *(u32 *)displaylist->var00 = 0x21; - *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) ; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_Normal(struct GXDLInfo * displaylist, fx16 x, fx16 y, fx16 z){ + *(u32 *)displaylist->curr_cmd = 0x21; + *displaylist->curr_param = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) ; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_Vtx(struct DL * displaylist, fx32 x, fx32 y, fx32 z){ - *(u32 *)displaylist->var00 = 0x23; - displaylist->var04[0] = (u32)(u16)x | (u32)(u16)y << 0x10; - displaylist->var04[1] = (u32)(u16)z; - displaylist->var00 = (u8 *)displaylist->var04 + 0x8; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_Vtx(struct GXDLInfo * displaylist, fx32 x, fx32 y, fx32 z){ + *(u32 *)displaylist->curr_cmd = 0x23; + displaylist->curr_param[0] = (u32)(u16)x | (u32)(u16)y << 0x10; + displaylist->curr_param[1] = (u32)(u16)z; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x8; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } //TODO: name arguments -ARM_FUNC void G3B_PolygonAttr(struct DL *displaylist, u32 r1, u32 r2, u32 r3, u32 r4, u32 r5, u32 r6){ - *(u32 *)displaylist->var00 = 0x29; - *displaylist->var04 = r1 | r2 << 0x4 | r3 << 0x6 | r6 | r4 << 0x18 | r5 << 0x10; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_PolygonAttr(struct GXDLInfo *displaylist, u32 r1, u32 r2, u32 r3, u32 r4, u32 r5, u32 r6){ + *(u32 *)displaylist->curr_cmd = 0x29; + *displaylist->curr_param = r1 | r2 << 0x4 | r3 << 0x6 | r6 | r4 << 0x18 | r5 << 0x10; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_MaterialColorDiffAmb(struct DL *displaylist, u32 diffuse_col, u32 ambient_col, u32 replace){ - *(u32 *)displaylist->var00 = 0x30; +ARM_FUNC void G3B_MaterialColorDiffAmb(struct GXDLInfo *displaylist, u32 diffuse_col, u32 ambient_col, u32 replace){ + *(u32 *)displaylist->curr_cmd = 0x30; u32 replace_vtx_color_with_diffuse; if (replace) replace_vtx_color_with_diffuse = TRUE; else replace_vtx_color_with_diffuse = FALSE; - *displaylist->var04 = diffuse_col | ambient_col << 0x10 | replace_vtx_color_with_diffuse << 0xF; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; + *displaylist->curr_param = diffuse_col | ambient_col << 0x10 | replace_vtx_color_with_diffuse << 0xF; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_MaterialColorSpecEmi(struct DL *displaylist, u32 specular_col, u32 emission_col, u32 shiny_table){ - *(u32 *)displaylist->var00 = 0x31; +ARM_FUNC void G3B_MaterialColorSpecEmi(struct GXDLInfo *displaylist, u32 specular_col, u32 emission_col, u32 shiny_table){ + *(u32 *)displaylist->curr_cmd = 0x31; u32 enable_shininess_table; if (shiny_table) enable_shininess_table = TRUE; else enable_shininess_table = FALSE; - *displaylist->var04 = specular_col | emission_col << 0x10 | enable_shininess_table << 0xF; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; + *displaylist->curr_param = specular_col | emission_col << 0x10 | enable_shininess_table << 0xF; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } /* @@ -92,29 +92,29 @@ Only feed normalized Vectors only the fractional part and the sign, which is in the first nonfraction bit since the vector is assumed to be normalized, are used */ -ARM_FUNC void G3B_LightVector(struct DL * displaylist, u32 light_num, fx16 x, fx16 y, fx16 z){ - *(u32 *)displaylist->var00 = 0x32; - *displaylist->var04 = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) | light_num << 0x1E; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_LightVector(struct GXDLInfo * displaylist, u32 light_num, fx16 x, fx16 y, fx16 z){ + *(u32 *)displaylist->curr_cmd = 0x32; + *displaylist->curr_param = ((x >> 3) & 0x3FF) | (((y >> 3) & 0x3FF) << 0xA) | (((z >> 3) & 0x3FF) << 0x14) | light_num << 0x1E; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_LightColor(struct DL * displaylist, u32 light_num, u32 col){ - *(u32 *)displaylist->var00 = 0x33; - *displaylist->var04 = col | light_num << 0x1E; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_LightColor(struct GXDLInfo * displaylist, u32 light_num, u32 col){ + *(u32 *)displaylist->curr_cmd = 0x33; + *displaylist->curr_param = col | light_num << 0x1E; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_Begin(struct DL * displaylist, u32 type){ - *(u32 *)displaylist->var00 = 0x40; - *displaylist->var04 = type; - displaylist->var00 = (u8 *)displaylist->var04 + 0x4; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_Begin(struct GXDLInfo * displaylist, u32 type){ + *(u32 *)displaylist->curr_cmd = 0x40; + *displaylist->curr_param = type; + displaylist->curr_cmd = (u8 *)displaylist->curr_param + 0x4; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } -ARM_FUNC void G3B_End(struct DL * displaylist){ - *(u32 *)displaylist->var00 = 0x41; - displaylist->var00 = (u8 *)displaylist->var04; - displaylist->var04 = (u32 *)displaylist->var00 + 1; +ARM_FUNC void G3B_End(struct GXDLInfo * displaylist){ + *(u32 *)displaylist->curr_cmd = 0x41; + displaylist->curr_cmd = (u8 *)displaylist->curr_param; + displaylist->curr_param = (u32 *)displaylist->curr_cmd + 1; } diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c index 7da3e1b4..db313c31 100644 --- a/arm9/lib/src/GX_state.c +++ b/arm9/lib/src/GX_state.c @@ -2,22 +2,22 @@ #include "main.h" #include "gx.h" -extern struct VRAM_banks UNK_021D33C4; +extern struct GX_State gGXState; ARM_FUNC void GX_InitGXState(){ - UNK_021D33C4.var00 = 0x0; - UNK_021D33C4.var02 = 0x0; - UNK_021D33C4.var04 = 0x0; - UNK_021D33C4.var06 = 0x0; - UNK_021D33C4.var08 = 0x0; - UNK_021D33C4.var0A = 0x0; - UNK_021D33C4.var0C = 0x0; - UNK_021D33C4.var0E = 0x0; - UNK_021D33C4.var10 = 0x0; - UNK_021D33C4.var12 = 0x0; - UNK_021D33C4.var14 = 0x0; - UNK_021D33C4.var16 = 0x0; - UNK_021D33C4.var18 = 0x0; + gGXState.lcdc = 0x0; + gGXState.bg = 0x0; + gGXState.obj = 0x0; + gGXState.arm7 = 0x0; + gGXState.tex = 0x0; + gGXState.texPltt = 0x0; + gGXState.clrImg = 0x0; + gGXState.bgExtPltt = 0x0; + gGXState.objExtPltt = 0x0; + gGXState.sub_bg = 0x0; + gGXState.sub_obj = 0x0; + gGXState.sub_bgExtPltt = 0x0; + gGXState.sub_objExtPltt = 0x0; reg_GX_VRAMCNT = 0x0; reg_GX_VRAMCNT_E = 0x0; reg_GX_VRAMCNT_F = 0x0; diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index 18507fa4..da55d806 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -3,7 +3,7 @@ #include "gx.h" extern u16 UNK_021D33BC; -extern struct VRAM_banks UNK_021D33C4; +extern struct GX_State gGXState; ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ if (mask & (0x1 << 0)) @@ -27,8 +27,8 @@ ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ } ARM_FUNC void GX_SetBankForBG(s32 bg){ - UNK_021D33C4.var00 = (u16)(~bg & (UNK_021D33C4.var00 | UNK_021D33C4.var02)); - UNK_021D33C4.var02 = bg; + gGXState.lcdc = (u16)(~bg & (gGXState.lcdc | gGXState.bg)); + gGXState.bg = bg; switch (bg) { case 8: @@ -96,12 +96,12 @@ ARM_FUNC void GX_SetBankForBG(s32 bg){ default: break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForOBJ(s32 obj){ - UNK_021D33C4.var00 = (u16)(~obj & (UNK_021D33C4.var00 | UNK_021D33C4.var04)); - UNK_021D33C4.var04 = obj; + gGXState.lcdc = (u16)(~obj & (gGXState.lcdc | gGXState.obj)); + gGXState.obj = obj; switch (obj) { case 3: @@ -135,12 +135,12 @@ ARM_FUNC void GX_SetBankForOBJ(s32 obj){ default: break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ - UNK_021D33C4.var00 = (u16)(~bgextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var0E)); - UNK_021D33C4.var0E = bgextpltt; + gGXState.lcdc = (u16)(~bgextpltt & (gGXState.lcdc | gGXState.bgExtPltt)); + gGXState.bgExtPltt = bgextpltt; switch (bgextpltt) { case 0x10: @@ -161,12 +161,12 @@ ARM_FUNC void GX_SetBankForBGExtPltt(s32 bgextpltt){ reg_GX_DISPCNT &= ~0x40000000; break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ - UNK_021D33C4.var00 = (u16)(~objextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var10)); - UNK_021D33C4.var10 = objextpltt; + gGXState.lcdc = (u16)(~objextpltt & (gGXState.lcdc | gGXState.objExtPltt)); + gGXState.objExtPltt = objextpltt; switch (objextpltt) { case 32: @@ -181,12 +181,12 @@ ARM_FUNC void GX_SetBankForOBJExtPltt(s32 objextpltt){ reg_GX_DISPCNT &= ~0x80000000; break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForTex(s32 tex){ - UNK_021D33C4.var00 = (u16)(~tex & (UNK_021D33C4.var00 | UNK_021D33C4.var08)); - UNK_021D33C4.var08 = tex; + gGXState.lcdc = (u16)(~tex & (gGXState.lcdc | gGXState.tex)); + gGXState.tex = tex; if (tex == 0) { reg_G3X_DISP3DCNT &= 0x0000CFFE; @@ -244,12 +244,12 @@ ARM_FUNC void GX_SetBankForTex(s32 tex){ break; } } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ - UNK_021D33C4.var00 = (u16)(~texpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var0A)); - UNK_021D33C4.var0A = texpltt; + gGXState.lcdc = (u16)(~texpltt & (gGXState.lcdc | gGXState.texPltt)); + gGXState.texPltt = texpltt; switch (texpltt) { case 0: //needed to match @@ -270,12 +270,12 @@ ARM_FUNC void GX_SetBankForTexPltt(s32 texpltt){ reg_GX_VRAMCNT_G = 0x83; break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ - UNK_021D33C4.var00 = (u16)(~clearimage & (UNK_021D33C4.var00 | UNK_021D33C4.var0C)); - UNK_021D33C4.var0C = clearimage; + gGXState.lcdc = (u16)(~clearimage & (gGXState.lcdc | gGXState.clrImg)); + gGXState.clrImg = clearimage; switch (clearimage) { case 3: @@ -301,12 +301,12 @@ ARM_FUNC void GX_SetBankForClearImage(s32 clearimage){ reg_GX_VRAMCNT_C = 0x9B; reg_G3X_DISP3DCNT |= 0x4000; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForARM7(s32 arm7){ - UNK_021D33C4.var00 = (u16)(~arm7 & (UNK_021D33C4.var00 | UNK_021D33C4.var06)); - UNK_021D33C4.var06 = arm7; + gGXState.lcdc = (u16)(~arm7 & (gGXState.lcdc | gGXState.arm7)); + gGXState.arm7 = arm7; switch (arm7) { case 0: //needed to match @@ -321,17 +321,17 @@ ARM_FUNC void GX_SetBankForARM7(s32 arm7){ case 8: reg_GX_VRAMCNT_D = 0x82; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForLCDC(s32 lcdc){ - UNK_021D33C4.var00 |= lcdc; + gGXState.lcdc |= lcdc; GX_VRAMCNT_SetLCDC_(lcdc); } ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ - UNK_021D33C4.var00 = (u16)(~subbg & (UNK_021D33C4.var00 | UNK_021D33C4.var12)); - UNK_021D33C4.var12 = subbg; + gGXState.lcdc = (u16)(~subbg & (gGXState.lcdc | gGXState.sub_bg)); + gGXState.sub_bg = subbg; switch (subbg) { case 0: //needed to match @@ -344,13 +344,13 @@ ARM_FUNC void GX_SetBankForSubBG(s32 subbg){ case 128: reg_GX_VRAMCNT_H = 0x81; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ - UNK_021D33C4.var00 = (u16)(~subobj & (UNK_021D33C4.var00 | UNK_021D33C4.var14)); - UNK_021D33C4.var14 = subobj; + gGXState.lcdc = (u16)(~subobj & (gGXState.lcdc | gGXState.sub_obj)); + gGXState.sub_obj = subobj; switch (subobj) { case 8: @@ -362,12 +362,12 @@ ARM_FUNC void GX_SetBankForSubOBJ(s32 subobj){ case 0: //needed to match break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ - UNK_021D33C4.var00 = (u16)(~subbgextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var16)); - UNK_021D33C4.var16 = subbgextpltt; + gGXState.lcdc = (u16)(~subbgextpltt & (gGXState.lcdc | gGXState.sub_bgExtPltt)); + gGXState.sub_bgExtPltt = subbgextpltt; switch (subbgextpltt) { case 128: @@ -378,12 +378,12 @@ ARM_FUNC void GX_SetBankForSubBGExtPltt(s32 subbgextpltt){ reg_GXS_DB_DISPCNT &= ~0x40000000; break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ - UNK_021D33C4.var00 = (u16)(~subobjextpltt & (UNK_021D33C4.var00 | UNK_021D33C4.var18)); - UNK_021D33C4.var18 = subobjextpltt; + gGXState.lcdc = (u16)(~subobjextpltt & (gGXState.lcdc | gGXState.sub_objExtPltt)); + gGXState.sub_objExtPltt = subobjextpltt; switch (subobjextpltt) { case 256: @@ -394,63 +394,63 @@ ARM_FUNC void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt){ reg_GXS_DB_DISPCNT &= ~0x80000000; break; } - GX_VRAMCNT_SetLCDC_(UNK_021D33C4.var00); + GX_VRAMCNT_SetLCDC_(gGXState.lcdc); } ARM_FUNC u32 FUN_020C6130(u16 *ptr){ u16 temp = *ptr; *ptr = 0; - UNK_021D33C4.var00 |= temp; + gGXState.lcdc |= temp; GX_VRAMCNT_SetLCDC_(temp); return temp; } ARM_FUNC u32 GX_ResetBankForBG(){ - return FUN_020C6130(&UNK_021D33C4.var02); + return FUN_020C6130(&gGXState.bg); } ARM_FUNC u32 GX_ResetBankForOBJ(){ - return FUN_020C6130(&UNK_021D33C4.var04); + return FUN_020C6130(&gGXState.obj); } ARM_FUNC u32 GX_ResetBankForBGExtPltt(){ reg_GX_DISPCNT &= ~0x40000000; - return FUN_020C6130(&UNK_021D33C4.var0E); + return FUN_020C6130(&gGXState.bgExtPltt); } ARM_FUNC u32 GX_ResetBankForOBJExtPltt(){ reg_GX_DISPCNT &= ~0x80000000; - return FUN_020C6130(&UNK_021D33C4.var10); + return FUN_020C6130(&gGXState.objExtPltt); } ARM_FUNC u32 GX_ResetBankForTex(){ - return FUN_020C6130(&UNK_021D33C4.var08); + return FUN_020C6130(&gGXState.tex); } ARM_FUNC u32 GX_ResetBankForTexPltt(){ - return FUN_020C6130(&UNK_021D33C4.var0A); + return FUN_020C6130(&gGXState.texPltt); } ARM_FUNC u32 GX_ResetBankForClearImage(){ - return FUN_020C6130(&UNK_021D33C4.var0C); + return FUN_020C6130(&gGXState.clrImg); } ARM_FUNC u32 GX_ResetBankForSubBG(){ - return FUN_020C6130(&UNK_021D33C4.var12); + return FUN_020C6130(&gGXState.sub_bg); } ARM_FUNC u32 FUN_020C605C(){ - return FUN_020C6130(&UNK_021D33C4.var14); + return FUN_020C6130(&gGXState.sub_obj); } ARM_FUNC u32 FUN_020C6034(){ reg_GXS_DB_DISPCNT &= ~0x40000000; - return FUN_020C6130(&UNK_021D33C4.var16); + return FUN_020C6130(&gGXState.sub_bgExtPltt); } ARM_FUNC u32 GX_ResetBankForSubOBJ(){ reg_GXS_DB_DISPCNT &= ~0x80000000; - return FUN_020C6130(&UNK_021D33C4.var18); + return FUN_020C6130(&gGXState.sub_objExtPltt); } ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ @@ -479,101 +479,101 @@ ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ } ARM_FUNC u32 disableBankForX_(){ - return FUN_020C5F28(&UNK_021D33C4.var02); + return FUN_020C5F28(&gGXState.bg); } ARM_FUNC u32 GX_DisableBankForOBJExtPltt_2(){ - return FUN_020C5F28(&UNK_021D33C4.var04); + return FUN_020C5F28(&gGXState.obj); } ARM_FUNC u32 GX_DisableBankForBGExtPltt(){ reg_GX_DISPCNT &= ~0x40000000; - return FUN_020C5F28(&UNK_021D33C4.var0E); + return FUN_020C5F28(&gGXState.bgExtPltt); } ARM_FUNC u32 GX_DisableBankForOBJExtPltt(){ reg_GX_DISPCNT &= ~0x80000000; - return FUN_020C5F28(&UNK_021D33C4.var10); + return FUN_020C5F28(&gGXState.objExtPltt); } ARM_FUNC u32 GX_DisableBankForTexPltt_2(){ - return FUN_020C5F28(&UNK_021D33C4.var08); + return FUN_020C5F28(&gGXState.tex); } ARM_FUNC u32 GX_DisableBankForTexPltt(){ - return FUN_020C5F28(&UNK_021D33C4.var0A); + return FUN_020C5F28(&gGXState.texPltt); } ARM_FUNC u32 GX_DisableBankForClearImage(){ - return FUN_020C5F28(&UNK_021D33C4.var0C); + return FUN_020C5F28(&gGXState.clrImg); } ARM_FUNC u32 GX_DisableBankForARM7(){ - return FUN_020C5F28(&UNK_021D33C4.var06); + return FUN_020C5F28(&gGXState.arm7); } ARM_FUNC u32 GX_DisableBankForLCDC(){ - return FUN_020C5F28(&UNK_021D33C4.var00); + return FUN_020C5F28(&gGXState.lcdc); } ARM_FUNC u32 GX_DisableBankForSubBGExtPltt(){ - return FUN_020C5F28(&UNK_021D33C4.var12); + return FUN_020C5F28(&gGXState.sub_bg); } ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt_2(){ - return FUN_020C5F28(&UNK_021D33C4.var14); + return FUN_020C5F28(&gGXState.sub_obj); } ARM_FUNC u32 FUN_020C5E04(){ reg_GXS_DB_DISPCNT &= ~0x40000000; - return FUN_020C5F28(&UNK_021D33C4.var16); + return FUN_020C5F28(&gGXState.sub_bgExtPltt); } ARM_FUNC u32 GX_DisableBankForSubOBJExtPltt(){ reg_GXS_DB_DISPCNT &= ~0x80000000; - return FUN_020C5F28(&UNK_021D33C4.var18); + return FUN_020C5F28(&gGXState.sub_objExtPltt); } ARM_FUNC u32 GX_GetBankForBGExtPltt_2(){ - return UNK_021D33C4.var02; + return gGXState.bg; } ARM_FUNC u32 GX_GetBankForOBJ(){ - return UNK_021D33C4.var04; + return gGXState.obj; } ARM_FUNC u32 GX_GetBankForBGExtPltt(){ - return UNK_021D33C4.var0E; + return gGXState.bgExtPltt; } ARM_FUNC u32 GX_GetBankForOBJExtPltt(){ - return UNK_021D33C4.var10; + return gGXState.objExtPltt; } ARM_FUNC u32 FUN_020C5D8C(){ - return UNK_021D33C4.var08; + return gGXState.tex; } ARM_FUNC u32 GX_GetBankForTexPltt(){ - return UNK_021D33C4.var0A; + return gGXState.texPltt; } ARM_FUNC u32 GX_GetBankForLCDC(){ - return UNK_021D33C4.var00; + return gGXState.lcdc; } ARM_FUNC u32 GX_GetBankForSubBGExtPltt_2(){ - return UNK_021D33C4.var12; + return gGXState.sub_bg; } ARM_FUNC u32 GX_GetBankForSubOBJ(){ - return UNK_021D33C4.var14; + return gGXState.sub_obj; } ARM_FUNC u32 GX_GetBankForSubBGExtPltt(){ - return UNK_021D33C4.var16; + return gGXState.sub_bgExtPltt; } ARM_FUNC u32 GX_GetBankForSubOBJExtPltt(){ - return UNK_021D33C4.var18; + return gGXState.sub_objExtPltt; } -- cgit v1.2.3 From 648c9421d8ecbd8642f4ae393ab8add89fb3dc00 Mon Sep 17 00:00:00 2001 From: Made Date: Mon, 18 May 2020 02:10:36 +0200 Subject: Add enums and some other stuff and split header --- arm9/lib/src/GX_load2d.c | 68 +++++++++++++++++++++++------------------------- arm9/lib/src/GX_load3d.c | 21 +++++++-------- 2 files changed, 41 insertions(+), 48 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index c0139c41..55faa915 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -21,117 +21,117 @@ static inline void *_GXS_OBJ_PTR(){ } ARM_FUNC void GX_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(UNK_02106814, src, (void *)(0x5000000 + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000000 + offset), size); } ARM_FUNC void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(UNK_02106814, src, (void *)(0x5000400 + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000400 + offset), size); } ARM_FUNC void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(UNK_02106814, src, (void *)(0x5000200 + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000200 + offset), size); } ARM_FUNC void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ - _GX_Load_16(UNK_02106814, src, (void *)(0x5000600 + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000600 + offset), size); } ARM_FUNC void GX_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(UNK_02106814, src, (void *)(0x7000000 + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(0x7000000 + offset), size); } ARM_FUNC void GXS_LoadOAM(void *src, u32 offset, u32 size){ - _GX_Load_32(UNK_02106814, src, (void *)(0x7000400 + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(0x7000400 + offset), size); } ARM_FUNC void GX_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GX_OBJ_PTR(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GXS_OBJ_PTR(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3ScrPtr(); - _GX_Load_16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3CharPtr(); - _GX_Load_32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); } ARM_FUNC void GX_BeginLoadBGExtPltt(){ @@ -157,12 +157,11 @@ ARM_FUNC void GX_BeginLoadBGExtPltt(){ } ARM_FUNC void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D33F0 + offset - UNK_021D33EC), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D33F0 + offset - UNK_021D33EC), size, NULL, NULL); } ARM_FUNC void GX_EndLoadBGExtPltt(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForBGExtPltt(UNK_021D33F4); UNK_021D33F4 = 0x0; UNK_021D33F0 = 0x0; @@ -185,12 +184,11 @@ ARM_FUNC void GX_BeginLoadOBJExtPltt(){ } ARM_FUNC void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D33E4 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D33E4 + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadOBJExtPltt(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForOBJExtPltt(UNK_021D33E8); UNK_021D33E8 = 0x0; UNK_021D33E4 = 0x0; @@ -201,12 +199,11 @@ ARM_FUNC void GXS_BeginLoadBGExtPltt(){ } ARM_FUNC void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadBGExtPltt(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForSubBGExtPltt(UNK_021D33E0); UNK_021D33E0 = 0x0; } @@ -216,12 +213,11 @@ ARM_FUNC void GXS_BeginLoadOBJExtPltt(){ } ARM_FUNC void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadOBJExtPltt(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForSubOBJExtPltt(UNK_021D33F8); UNK_021D33F8 = 0x0; } diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index 3a8a8c1d..31ddffc3 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -50,17 +50,16 @@ ARM_FUNC void GX_LoadTex(void *src, u32 offset, u32 size){ void *temp2 = (void *)UNK_021D3414; u32 temp1 = UNK_021D3418 - offset; temp = (void *)(UNK_021D3400 + offset); - _GX_Load_32(UNK_02106814, src, temp, temp1); - _GX_Load_32_Async(UNK_02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); + GXi_DmaCopy32(UNK_02106814, src, temp, temp1); + GXi_DmaCopy32Async(UNK_02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); return; } } - _GX_Load_32_Async(UNK_02106814, src, temp, size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, temp, size, NULL, NULL); } ARM_FUNC void GX_EndLoadTex(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForTex(UNK_021D3410); UNK_021D3418 = 0x0; UNK_021D3414 = 0x0; @@ -75,12 +74,11 @@ ARM_FUNC void GX_BeginLoadTexPltt(){ } ARM_FUNC void GX_LoadTexPltt(void *src, u32 offset, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D3404 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D3404 + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadTexPltt(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForTexPltt(UNK_021D3408); UNK_021D3408 = 0x0; UNK_021D3404 = 0x0; @@ -108,16 +106,15 @@ ARM_FUNC void GX_BeginLoadClearImage(){ } ARM_FUNC void GX_LoadClearImageColor(void *src, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D340C), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D340C), size, NULL, NULL); } ARM_FUNC void GX_LoadClearImageDepth(void *src, u32 size){ - _GX_Load_32_Async(UNK_02106814, src, (void *)(UNK_021D340C + 0x20000), size, NULL, NULL); + GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D340C + 0x20000), size, NULL, NULL); } ARM_FUNC void GX_EndLoadClearImage(){ - if (UNK_02106814 != -1) - MI_WaitDma(UNK_02106814); + GXi_WaitDma(UNK_02106814); GX_SetBankForClearImage(UNK_021D33FC); UNK_021D33FC = 0x0; UNK_021D340C = 0x0; -- cgit v1.2.3 From 8ac22ef273a2863591f7e382d2d8781cc434e8a5 Mon Sep 17 00:00:00 2001 From: Made Date: Mon, 18 May 2020 02:32:07 +0200 Subject: Rename globals --- arm9/lib/src/GX.c | 36 ++++++------- arm9/lib/src/GX_g3x.c | 8 +-- arm9/lib/src/GX_load2d.c | 130 +++++++++++++++++++++++----------------------- arm9/lib/src/GX_load3d.c | 106 ++++++++++++++++++------------------- arm9/lib/src/GX_vramcnt.c | 4 +- 5 files changed, 142 insertions(+), 142 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index 883dfe69..8841d69a 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -2,10 +2,10 @@ #include "main.h" #include "gx.h" -extern u16 UNK_021D33BC; -extern u16 UNK_021D33C0; -extern u32 UNK_02106814; -extern u16 UNK_02106810; +extern u16 GXi_VRamLockId; +extern u16 sDispMode; +extern u32 GXi_DmaId; +extern u16 sIsDispOn; ARM_FUNC void GX_Init(){ reg_GX_POWCNT |= 0x8000; @@ -13,22 +13,22 @@ ARM_FUNC void GX_Init(){ reg_GX_POWCNT = reg_GX_POWCNT | 0x1; GX_InitGXState(); u32 temp; - while (UNK_021D33BC == 0) + while (GXi_VRamLockId == 0) { temp = OS_GetLockID(); if (temp == -3) { OS_Terminate(); } - UNK_021D33BC = temp; + GXi_VRamLockId = temp; } reg_GX_DISPSTAT = 0x0; reg_GX_DISPCNT = 0x0; - if (UNK_02106814 != -1) + if (GXi_DmaId != -1) { - MI_DmaFill32(UNK_02106814, (void *)®_G2_BG0CNT, 0x0, 0x60); + MI_DmaFill32(GXi_DmaId, (void *)®_G2_BG0CNT, 0x0, 0x60); reg_GX_MASTER_BRIGHT = 0x0; - MI_DmaFill32(UNK_02106814, (void *)®_GXS_DB_DISPCNT, 0x0, 0x70); + MI_DmaFill32(GXi_DmaId, (void *)®_GXS_DB_DISPCNT, 0x0, 0x70); } else { @@ -74,16 +74,16 @@ ARM_FUNC u32 GX_VBlankIntr(u32 enable){ ARM_FUNC void GX_DispOff(){ u32 temp = reg_GX_DISPCNT; - UNK_02106810 = 0x0; - UNK_021D33C0 = (temp & 0x30000) >> 0x10; + sIsDispOn = 0x0; + sDispMode = (temp & 0x30000) >> 0x10; reg_GX_DISPCNT = temp & ~0x30000; } ARM_FUNC void GX_DispOn(){ - UNK_02106810 = 0x1; - if (UNK_021D33C0) + sIsDispOn = 0x1; + if (sDispMode) { - reg_GX_DISPCNT = reg_GX_DISPCNT & ~0x30000 | (UNK_021D33C0 << 0x10); + reg_GX_DISPCNT = reg_GX_DISPCNT & ~0x30000 | (sDispMode << 0x10); } else { @@ -93,12 +93,12 @@ ARM_FUNC void GX_DispOn(){ ARM_FUNC void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ u32 temp2 = reg_GX_DISPCNT; - UNK_021D33C0 = mode1; - if (!UNK_02106810) + sDispMode = mode1; + if (!sIsDispOn) mode1 = 0; reg_GX_DISPCNT = (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3); - if (!UNK_021D33C0) - UNK_02106810 = 0x0; + if (!sDispMode) + sIsDispOn = 0x0; } ARM_FUNC void GXS_SetGraphicsMode(u32 mode){ diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index 5a03c4ca..6f968e7e 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -2,7 +2,7 @@ #include "main.h" #include "gx.h" -extern u32 UNK_02106814; +extern u32 GXi_DmaId; ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){ mov r1, #0x0 @@ -178,10 +178,10 @@ ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u } ARM_FUNC void G3X_InitTable(){ - if (UNK_02106814 != -1) + if (GXi_DmaId != -1) { - MI_DmaFill32Async(UNK_02106814, (void *)®_G3X_EDGE_COLOR_0, 0x0, 0x10, 0x0, 0x0); - MI_DmaFill32(UNK_02106814, (void *)®_G3X_FOG_TABLE_0, 0x0, 0x60); + MI_DmaFill32Async(GXi_DmaId, (void *)®_G3X_EDGE_COLOR_0, 0x0, 0x10, 0x0, 0x0); + MI_DmaFill32(GXi_DmaId, (void *)®_G3X_FOG_TABLE_0, 0x0, 0x60); } else { diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index 55faa915..17ab3694 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -2,15 +2,15 @@ #include "main.h" #include "gx.h" -extern u32 UNK_02106814; +extern u32 GXi_DmaId; -extern s32 UNK_021D33F8; -extern s32 UNK_021D33F4; -extern u32 UNK_021D33F0; -extern u32 UNK_021D33EC; -extern s32 UNK_021D33E8; -extern u32 UNK_021D33E4; -extern s32 UNK_021D33E0; +extern s32 sSubOBJExtPltt; +extern s32 sBGExtPltt; +extern u32 sBGExtPlttLCDCBlk; +extern u32 sBGExtPlttLCDCOffset; +extern s32 sOBJExtPltt; +extern u32 sOBJExtPlttLCDCBlk; +extern s32 sSubBGExtPltt; static inline void *_GX_OBJ_PTR(){ @@ -21,203 +21,203 @@ static inline void *_GXS_OBJ_PTR(){ } ARM_FUNC void GX_LoadBGPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000000 + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(0x5000000 + offset), size); } ARM_FUNC void GXS_LoadBGPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000400 + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(0x5000400 + offset), size); } ARM_FUNC void GX_LoadOBJPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000200 + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(0x5000200 + offset), size); } ARM_FUNC void GXS_LoadOBJPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy16(UNK_02106814, src, (void *)(0x5000600 + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(0x5000600 + offset), size); } ARM_FUNC void GX_LoadOAM(void *src, u32 offset, u32 size){ - GXi_DmaCopy32(UNK_02106814, src, (void *)(0x7000000 + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(0x7000000 + offset), size); } ARM_FUNC void GXS_LoadOAM(void *src, u32 offset, u32 size){ - GXi_DmaCopy32(UNK_02106814, src, (void *)(0x7000400 + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(0x7000400 + offset), size); } ARM_FUNC void GX_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GX_OBJ_PTR(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadOBJ(void *src, u32 offset, u32 size){ u32 base = (u32)_GXS_OBJ_PTR(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Scr(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3ScrPtr(); - GXi_DmaCopy16(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy16(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG0CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG0Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG0CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG1CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG1Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG1CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG2CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG2Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG2CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2_GetBG3CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GXS_LoadBG3Char(void *src, u32 offset, u32 size){ u32 base = (u32)G2S_GetBG3CharPtr(); - GXi_DmaCopy32(UNK_02106814, src, (void *)(base + offset), size); + GXi_DmaCopy32(GXi_DmaId, src, (void *)(base + offset), size); } ARM_FUNC void GX_BeginLoadBGExtPltt(){ - UNK_021D33F4 = GX_ResetBankForBGExtPltt(); - switch (UNK_021D33F4) + sBGExtPltt = GX_ResetBankForBGExtPltt(); + switch (sBGExtPltt) { case 0: //needed to match break; case 0x10: - UNK_021D33F0 = 0x06880000; - UNK_021D33EC = 0x0; + sBGExtPlttLCDCBlk = 0x06880000; + sBGExtPlttLCDCOffset = 0x0; break; case 0x40: - UNK_021D33F0 = 0x06894000; - UNK_021D33EC = 0x4000; + sBGExtPlttLCDCBlk = 0x06894000; + sBGExtPlttLCDCOffset = 0x4000; break; case 0x20: case 0x60: - UNK_021D33F0 = 0x06890000; - UNK_021D33EC = 0x0; + sBGExtPlttLCDCBlk = 0x06890000; + sBGExtPlttLCDCOffset = 0x0; break; } } ARM_FUNC void GX_LoadBGExtPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D33F0 + offset - UNK_021D33EC), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(sBGExtPlttLCDCBlk + offset - sBGExtPlttLCDCOffset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadBGExtPltt(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForBGExtPltt(UNK_021D33F4); - UNK_021D33F4 = 0x0; - UNK_021D33F0 = 0x0; - UNK_021D33EC = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForBGExtPltt(sBGExtPltt); + sBGExtPltt = 0x0; + sBGExtPlttLCDCBlk = 0x0; + sBGExtPlttLCDCOffset = 0x0; } ARM_FUNC void GX_BeginLoadOBJExtPltt(){ - UNK_021D33E8 = GX_ResetBankForOBJExtPltt(); - switch (UNK_021D33E8) + sOBJExtPltt = GX_ResetBankForOBJExtPltt(); + switch (sOBJExtPltt) { case 0: //needed to match break; case 0x40: - UNK_021D33E4 = 0x06894000; + sOBJExtPlttLCDCBlk = 0x06894000; break; case 0x20: - UNK_021D33E4 = 0x06890000; + sOBJExtPlttLCDCBlk = 0x06890000; break; } } ARM_FUNC void GX_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D33E4 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(sOBJExtPlttLCDCBlk + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadOBJExtPltt(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForOBJExtPltt(UNK_021D33E8); - UNK_021D33E8 = 0x0; - UNK_021D33E4 = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForOBJExtPltt(sOBJExtPltt); + sOBJExtPltt = 0x0; + sOBJExtPlttLCDCBlk = 0x0; } ARM_FUNC void GXS_BeginLoadBGExtPltt(){ - UNK_021D33E0 = FUN_020C6034(); + sSubBGExtPltt = FUN_020C6034(); } ARM_FUNC void GXS_LoadBGExtPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(0x06898000 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(0x06898000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadBGExtPltt(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForSubBGExtPltt(UNK_021D33E0); - UNK_021D33E0 = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForSubBGExtPltt(sSubBGExtPltt); + sSubBGExtPltt = 0x0; } ARM_FUNC void GXS_BeginLoadOBJExtPltt(){ - UNK_021D33F8 = GX_ResetBankForSubOBJ(); + sSubOBJExtPltt = GX_ResetBankForSubOBJ(); } ARM_FUNC void GXS_LoadOBJExtPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(0x068A0000 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(0x068A0000 + offset), size, NULL, NULL); } ARM_FUNC void GXS_EndLoadOBJExtPltt(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForSubOBJExtPltt(UNK_021D33F8); - UNK_021D33F8 = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForSubOBJExtPltt(sSubOBJExtPltt); + sSubOBJExtPltt = 0x0; } diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index 31ddffc3..db947ec9 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -2,120 +2,120 @@ #include "main.h" #include "gx.h" -extern u32 UNK_02106814; +extern u32 GXi_DmaId; -extern u32 UNK_021D3410; -extern u32 UNK_021D3400; -extern u32 UNK_021D3414; -extern u32 UNK_021D3418; +extern u32 sTex; +extern u32 sTexLCDCBlk1; +extern u32 sTexLCDCBlk2; +extern u32 sSzTexBlk1; //probably structs of length 0x6 -extern u16 UNK_02103B4C[]; -extern u16 UNK_02103B4E[]; -extern u16 UNK_02103B50[]; +extern u16 sTexStartAddrTable[]; +extern u16 sTexStartAddrTable[]; +extern u16 sTexStartAddrTable[]; -extern u32 UNK_021D3408; -extern u32 UNK_021D3404; -extern u16 UNK_02103B3C[]; +extern u32 sTexPltt; +extern u32 sTexPlttLCDCBlk; +extern u16 sTexPlttStartAddrTable[]; -extern s32 UNK_021D33FC; -extern u32 UNK_021D340C; +extern s32 sClrImg; +extern u32 sClrImgLCDCBlk; ARM_FUNC void GX_BeginLoadTex(){ u32 temp = GX_ResetBankForTex(); - UNK_021D3410 = temp; - UNK_021D3400 = UNK_02103B4C[temp * 3] << 0xC; - UNK_021D3414 = UNK_02103B4E[temp * 3] << 0xC; - UNK_021D3418 = UNK_02103B50[temp * 3] << 0xC; + sTex = temp; + sTexLCDCBlk1 = sTexStartAddrTable[temp * 3] << 0xC; + sTexLCDCBlk2 = sTexStartAddrTable[temp * 3] << 0xC; + sSzTexBlk1 = sTexStartAddrTable[temp * 3] << 0xC; } ARM_FUNC void GX_LoadTex(void *src, u32 offset, u32 size){ void *temp; - if (!UNK_021D3414) + if (!sTexLCDCBlk2) { - temp = (void *)(UNK_021D3400 + offset); + temp = (void *)(sTexLCDCBlk1 + offset); } else { - if ((offset + size) < UNK_021D3418) + if ((offset + size) < sSzTexBlk1) { - temp = (void *)(UNK_021D3400 + offset); + temp = (void *)(sTexLCDCBlk1 + offset); } - else if (offset >= UNK_021D3418) + else if (offset >= sSzTexBlk1) { - temp = (void *)(UNK_021D3414 + offset - UNK_021D3418); + temp = (void *)(sTexLCDCBlk2 + offset - sSzTexBlk1); } else { - void *temp2 = (void *)UNK_021D3414; - u32 temp1 = UNK_021D3418 - offset; - temp = (void *)(UNK_021D3400 + offset); - GXi_DmaCopy32(UNK_02106814, src, temp, temp1); - GXi_DmaCopy32Async(UNK_02106814, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); + void *temp2 = (void *)sTexLCDCBlk2; + u32 temp1 = sSzTexBlk1 - offset; + temp = (void *)(sTexLCDCBlk1 + offset); + GXi_DmaCopy32(GXi_DmaId, src, temp, temp1); + GXi_DmaCopy32Async(GXi_DmaId, (void *)((u8 *)src + temp1), temp2, (size - temp1), NULL, NULL); return; } } - GXi_DmaCopy32Async(UNK_02106814, src, temp, size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, temp, size, NULL, NULL); } ARM_FUNC void GX_EndLoadTex(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForTex(UNK_021D3410); - UNK_021D3418 = 0x0; - UNK_021D3414 = 0x0; - UNK_021D3400 = 0x0; - UNK_021D3410 = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForTex(sTex); + sSzTexBlk1 = 0x0; + sTexLCDCBlk2 = 0x0; + sTexLCDCBlk1 = 0x0; + sTex = 0x0; } ARM_FUNC void GX_BeginLoadTexPltt(){ s32 temp = GX_ResetBankForTexPltt(); - UNK_021D3408 = temp; - UNK_021D3404 = UNK_02103B3C[temp >> 4] << 0xC; + sTexPltt = temp; + sTexPlttLCDCBlk = sTexPlttStartAddrTable[temp >> 4] << 0xC; } ARM_FUNC void GX_LoadTexPltt(void *src, u32 offset, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D3404 + offset), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(sTexPlttLCDCBlk + offset), size, NULL, NULL); } ARM_FUNC void GX_EndLoadTexPltt(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForTexPltt(UNK_021D3408); - UNK_021D3408 = 0x0; - UNK_021D3404 = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForTexPltt(sTexPltt); + sTexPltt = 0x0; + sTexPlttLCDCBlk = 0x0; } ARM_FUNC void GX_BeginLoadClearImage(){ s32 temp = GX_ResetBankForClearImage(); - UNK_021D33FC = temp; + sClrImg = temp; switch (temp) { case 2: case 3: - UNK_021D340C = 0x6800000; + sClrImgLCDCBlk = 0x6800000; return; case 8: case 12: - UNK_021D340C = 0x6840000; + sClrImgLCDCBlk = 0x6840000; return; case 1: - UNK_021D340C = 0x67E0000; + sClrImgLCDCBlk = 0x67E0000; return; case 4: - UNK_021D340C = 0x6820000; + sClrImgLCDCBlk = 0x6820000; } } ARM_FUNC void GX_LoadClearImageColor(void *src, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D340C), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(sClrImgLCDCBlk), size, NULL, NULL); } ARM_FUNC void GX_LoadClearImageDepth(void *src, u32 size){ - GXi_DmaCopy32Async(UNK_02106814, src, (void *)(UNK_021D340C + 0x20000), size, NULL, NULL); + GXi_DmaCopy32Async(GXi_DmaId, src, (void *)(sClrImgLCDCBlk + 0x20000), size, NULL, NULL); } ARM_FUNC void GX_EndLoadClearImage(){ - GXi_WaitDma(UNK_02106814); - GX_SetBankForClearImage(UNK_021D33FC); - UNK_021D33FC = 0x0; - UNK_021D340C = 0x0; + GXi_WaitDma(GXi_DmaId); + GX_SetBankForClearImage(sClrImg); + sClrImg = 0x0; + sClrImgLCDCBlk = 0x0; } diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index da55d806..2b785198 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -2,7 +2,7 @@ #include "main.h" #include "gx.h" -extern u16 UNK_021D33BC; +extern u16 GXi_VRamLockId; extern struct GX_State gGXState; ARM_FUNC void GX_VRAMCNT_SetLCDC_(u32 mask){ @@ -474,7 +474,7 @@ ARM_FUNC u32 FUN_020C5F28(u16 *ptr){ reg_GX_VRAMCNT_H = 0x0; if (temp & (0x1 << 8)) reg_GX_VRAMCNT_I = 0x0; - OSi_UnlockVram((u16)temp, UNK_021D33BC); + OSi_UnlockVram((u16)temp, GXi_VRamLockId); return temp; } -- cgit v1.2.3 From 88e486100e449d8960894c9e30c4f21489ccbc31 Mon Sep 17 00:00:00 2001 From: Made Date: Mon, 18 May 2020 02:33:11 +0200 Subject: rename main GX header --- arm9/lib/src/GX.c | 2 +- arm9/lib/src/GX_asm.c | 2 +- arm9/lib/src/GX_bgcnt.c | 2 +- arm9/lib/src/GX_g2.c | 2 +- arm9/lib/src/GX_g3.c | 2 +- arm9/lib/src/GX_g3_util.c | 2 +- arm9/lib/src/GX_g3b.c | 2 +- arm9/lib/src/GX_g3imm.c | 2 +- arm9/lib/src/GX_g3x.c | 2 +- arm9/lib/src/GX_load2d.c | 2 +- arm9/lib/src/GX_load3d.c | 2 +- arm9/lib/src/GX_state.c | 2 +- arm9/lib/src/GX_vramcnt.c | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index 8841d69a..28c3cc01 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern u16 GXi_VRamLockId; extern u16 sDispMode; diff --git a/arm9/lib/src/GX_asm.c b/arm9/lib/src/GX_asm.c index 1eb0a011..f40793d8 100644 --- a/arm9/lib/src/GX_asm.c +++ b/arm9/lib/src/GX_asm.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" //looks like asm and says asm on the tin... ARM_FUNC asm void GX_SendFifo48B(void *src, void *dst){ diff --git a/arm9/lib/src/GX_bgcnt.c b/arm9/lib/src/GX_bgcnt.c index 63fe87b1..2086ad16 100644 --- a/arm9/lib/src/GX_bgcnt.c +++ b/arm9/lib/src/GX_bgcnt.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void *G2_GetBG0ScrPtr(){ u32 temp = (((reg_G2_BG0CNT & 0x1F00) >> 0x8) << 0xB); diff --git a/arm9/lib/src/GX_g2.c b/arm9/lib/src/GX_g2.c index 5bced1ef..66273541 100644 --- a/arm9/lib/src/GX_g2.c +++ b/arm9/lib/src/GX_g2.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void G2x_SetBGyAffine_(u32 *ptr, struct Mtx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 d){ fx32 temp0, temp1, temp2, temp3; diff --git a/arm9/lib/src/GX_g3.c b/arm9/lib/src/GX_g3.c index 379ee52b..2b5f2941 100644 --- a/arm9/lib/src/GX_g3.c +++ b/arm9/lib/src/GX_g3.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void G3_BeginMakeDL(struct GXDLInfo *displaylist, void *r1, u32 r2){ diff --git a/arm9/lib/src/GX_g3_util.c b/arm9/lib/src/GX_g3_util.c index f34e23ed..c40a3848 100644 --- a/arm9/lib/src/GX_g3_util.c +++ b/arm9/lib/src/GX_g3_util.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void G3i_PerspectiveW_(fx32 fovsin, fx32 fovcos, fx32 ratio, fx32 near, fx32 far, fx32 scale, u32 load, struct Mtx44 *mtx){ diff --git a/arm9/lib/src/GX_g3b.c b/arm9/lib/src/GX_g3b.c index 9a943bce..21698547 100644 --- a/arm9/lib/src/GX_g3b.c +++ b/arm9/lib/src/GX_g3b.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void G3BS_LoadMtx44(struct GXDLInfo *displaylist, struct Mtx44 *mtx){ diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c index a5c62c26..579032a6 100644 --- a/arm9/lib/src/GX_g3imm.c +++ b/arm9/lib/src/GX_g3imm.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" ARM_FUNC void G3_LoadMtx43(struct Mtx43 *mtx){ reg_G3X_GXFIFO = 0x17; diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c index 6f968e7e..31508e06 100644 --- a/arm9/lib/src/GX_g3x.c +++ b/arm9/lib/src/GX_g3x.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern u32 GXi_DmaId; diff --git a/arm9/lib/src/GX_load2d.c b/arm9/lib/src/GX_load2d.c index 17ab3694..d4def461 100644 --- a/arm9/lib/src/GX_load2d.c +++ b/arm9/lib/src/GX_load2d.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern u32 GXi_DmaId; diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index db947ec9..5f13deda 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern u32 GXi_DmaId; diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c index db313c31..3ca3b266 100644 --- a/arm9/lib/src/GX_state.c +++ b/arm9/lib/src/GX_state.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern struct GX_State gGXState; diff --git a/arm9/lib/src/GX_vramcnt.c b/arm9/lib/src/GX_vramcnt.c index 2b785198..67749301 100644 --- a/arm9/lib/src/GX_vramcnt.c +++ b/arm9/lib/src/GX_vramcnt.c @@ -1,6 +1,6 @@ #include "global.h" #include "main.h" -#include "gx.h" +#include "GX.h" extern u16 GXi_VRamLockId; extern struct GX_State gGXState; -- cgit v1.2.3 From 02abe0000a06299e32557591fa9e3396a6135242 Mon Sep 17 00:00:00 2001 From: Made Date: Mon, 18 May 2020 02:58:04 +0200 Subject: Add proper struct for static data --- arm9/lib/src/GX_load3d.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'arm9/lib/src') diff --git a/arm9/lib/src/GX_load3d.c b/arm9/lib/src/GX_load3d.c index 5f13deda..5aa15581 100644 --- a/arm9/lib/src/GX_load3d.c +++ b/arm9/lib/src/GX_load3d.c @@ -9,14 +9,18 @@ extern u32 sTexLCDCBlk1; extern u32 sTexLCDCBlk2; extern u32 sSzTexBlk1; -//probably structs of length 0x6 -extern u16 sTexStartAddrTable[]; -extern u16 sTexStartAddrTable[]; -extern u16 sTexStartAddrTable[]; +static const struct _TexStartAddrTable +{ + u16 blk1; // 12 bit shift + u16 blk2; // 12 bit shift + u16 szBlk1; // 12 bit shift +}; +extern struct _TexStartAddrTable sTexStartAddrTable[16]; + extern u32 sTexPltt; extern u32 sTexPlttLCDCBlk; -extern u16 sTexPlttStartAddrTable[]; +extern u16 sTexPlttStartAddrTable[8]; extern s32 sClrImg; extern u32 sClrImgLCDCBlk; @@ -24,9 +28,9 @@ extern u32 sClrImgLCDCBlk; ARM_FUNC void GX_BeginLoadTex(){ u32 temp = GX_ResetBankForTex(); sTex = temp; - sTexLCDCBlk1 = sTexStartAddrTable[temp * 3] << 0xC; - sTexLCDCBlk2 = sTexStartAddrTable[temp * 3] << 0xC; - sSzTexBlk1 = sTexStartAddrTable[temp * 3] << 0xC; + sTexLCDCBlk1 = sTexStartAddrTable[temp].blk1 << 0xC; + sTexLCDCBlk2 = sTexStartAddrTable[temp].blk2 << 0xC; + sSzTexBlk1 = sTexStartAddrTable[temp].szBlk1 << 0xC; } ARM_FUNC void GX_LoadTex(void *src, u32 offset, u32 size){ -- cgit v1.2.3