diff options
Diffstat (limited to 'asm/MSL_C/MSL_Common_Embedded')
27 files changed, 6216 insertions, 0 deletions
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_acos.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_acos.s new file mode 100644 index 0000000..a7aa083 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_acos.s @@ -0,0 +1,190 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_acos
+__ieee754_acos:
+/* 801D0BFC 001CC85C 94 21 FF C0 */ stwu r1, -0x40(r1)
+/* 801D0C00 001CC860 7C 08 02 A6 */ mflr r0
+/* 801D0C04 001CC864 90 01 00 44 */ stw r0, 0x44(r1)
+/* 801D0C08 001CC868 DB E1 00 30 */ stfd f31, 0x30(r1)
+/* 801D0C0C 001CC86C F3 E1 00 38 */ psq_st f31, 56(r1), 0, qr0
+/* 801D0C10 001CC870 DB C1 00 20 */ stfd f30, 0x20(r1)
+/* 801D0C14 001CC874 F3 C1 00 28 */ psq_st f30, 40(r1), 0, qr0
+/* 801D0C18 001CC878 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D0C1C 001CC87C 3C 00 3F F0 */ lis r0, 0x3ff0
+/* 801D0C20 001CC880 80 81 00 08 */ lwz r4, 8(r1)
+/* 801D0C24 001CC884 54 83 00 7E */ clrlwi r3, r4, 1
+/* 801D0C28 001CC888 7C 03 00 00 */ cmpw r3, r0
+/* 801D0C2C 001CC88C 41 80 00 38 */ blt lbl_801D0C64
+/* 801D0C30 001CC890 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D0C34 001CC894 3C 63 C0 10 */ addis r3, r3, 0xc010
+/* 801D0C38 001CC898 7C 60 03 79 */ or. r0, r3, r0
+/* 801D0C3C 001CC89C 40 82 00 1C */ bne lbl_801D0C58
+/* 801D0C40 001CC8A0 2C 04 00 00 */ cmpwi r4, 0
+/* 801D0C44 001CC8A4 40 81 00 0C */ ble lbl_801D0C50
+/* 801D0C48 001CC8A8 C8 22 91 90 */ lfd f1, lbl_80641790-_SDA2_BASE_(r2)
+/* 801D0C4C 001CC8AC 48 00 02 54 */ b lbl_801D0EA0
+lbl_801D0C50:
+/* 801D0C50 001CC8B0 C8 22 91 98 */ lfd f1, lbl_80641798-_SDA2_BASE_(r2)
+/* 801D0C54 001CC8B4 48 00 02 4C */ b lbl_801D0EA0
+lbl_801D0C58:
+/* 801D0C58 001CC8B8 3C 60 80 64 */ lis r3, lbl_8063D6B8@ha
+/* 801D0C5C 001CC8BC C0 23 D6 B8 */ lfs f1, lbl_8063D6B8@l(r3)
+/* 801D0C60 001CC8C0 48 00 02 40 */ b lbl_801D0EA0
+lbl_801D0C64:
+/* 801D0C64 001CC8C4 3C 00 3F E0 */ lis r0, 0x3fe0
+/* 801D0C68 001CC8C8 7C 03 00 00 */ cmpw r3, r0
+/* 801D0C6C 001CC8CC 40 80 00 B4 */ bge lbl_801D0D20
+/* 801D0C70 001CC8D0 3C 00 3C 60 */ lis r0, 0x3c60
+/* 801D0C74 001CC8D4 7C 03 00 00 */ cmpw r3, r0
+/* 801D0C78 001CC8D8 41 81 00 0C */ bgt lbl_801D0C84
+/* 801D0C7C 001CC8DC C8 22 91 A0 */ lfd f1, lbl_806417A0-_SDA2_BASE_(r2)
+/* 801D0C80 001CC8E0 48 00 02 20 */ b lbl_801D0EA0
+lbl_801D0C84:
+/* 801D0C84 001CC8E4 FD 81 00 72 */ fmul f12, f1, f1
+/* 801D0C88 001CC8E8 C8 02 91 D0 */ lfd f0, lbl_806417D0-_SDA2_BASE_(r2)
+/* 801D0C8C 001CC8EC C8 42 91 F8 */ lfd f2, lbl_806417F8-_SDA2_BASE_(r2)
+/* 801D0C90 001CC8F0 C8 62 91 C8 */ lfd f3, lbl_806417C8-_SDA2_BASE_(r2)
+/* 801D0C94 001CC8F4 C9 42 91 C0 */ lfd f10, lbl_806417C0-_SDA2_BASE_(r2)
+/* 801D0C98 001CC8F8 FC 80 03 32 */ fmul f4, f0, f12
+/* 801D0C9C 001CC8FC C8 02 91 F0 */ lfd f0, lbl_806417F0-_SDA2_BASE_(r2)
+/* 801D0CA0 001CC900 FC 42 03 32 */ fmul f2, f2, f12
+/* 801D0CA4 001CC904 C8 A2 91 E8 */ lfd f5, lbl_806417E8-_SDA2_BASE_(r2)
+/* 801D0CA8 001CC908 C9 22 91 B8 */ lfd f9, lbl_806417B8-_SDA2_BASE_(r2)
+/* 801D0CAC 001CC90C FC 63 20 2A */ fadd f3, f3, f4
+/* 801D0CB0 001CC910 C8 82 91 E0 */ lfd f4, lbl_806417E0-_SDA2_BASE_(r2)
+/* 801D0CB4 001CC914 FC 00 10 2A */ fadd f0, f0, f2
+/* 801D0CB8 001CC918 FD 6C 00 F2 */ fmul f11, f12, f3
+/* 801D0CBC 001CC91C C9 02 91 B0 */ lfd f8, lbl_806417B0-_SDA2_BASE_(r2)
+/* 801D0CC0 001CC920 C8 62 91 D8 */ lfd f3, lbl_806417D8-_SDA2_BASE_(r2)
+/* 801D0CC4 001CC924 FC CC 00 32 */ fmul f6, f12, f0
+/* 801D0CC8 001CC928 C8 E2 91 A8 */ lfd f7, lbl_806417A8-_SDA2_BASE_(r2)
+/* 801D0CCC 001CC92C C8 42 92 00 */ lfd f2, lbl_80641800-_SDA2_BASE_(r2)
+/* 801D0CD0 001CC930 FD 4A 58 2A */ fadd f10, f10, f11
+/* 801D0CD4 001CC934 C8 02 91 A0 */ lfd f0, lbl_806417A0-_SDA2_BASE_(r2)
+/* 801D0CD8 001CC938 FC A5 30 2A */ fadd f5, f5, f6
+/* 801D0CDC 001CC93C FC CC 02 B2 */ fmul f6, f12, f10
+/* 801D0CE0 001CC940 FC AC 01 72 */ fmul f5, f12, f5
+/* 801D0CE4 001CC944 FC C9 30 2A */ fadd f6, f9, f6
+/* 801D0CE8 001CC948 FC 84 28 2A */ fadd f4, f4, f5
+/* 801D0CEC 001CC94C FC AC 01 B2 */ fmul f5, f12, f6
+/* 801D0CF0 001CC950 FC 8C 01 32 */ fmul f4, f12, f4
+/* 801D0CF4 001CC954 FC A8 28 2A */ fadd f5, f8, f5
+/* 801D0CF8 001CC958 FC 83 20 2A */ fadd f4, f3, f4
+/* 801D0CFC 001CC95C FC 6C 01 72 */ fmul f3, f12, f5
+/* 801D0D00 001CC960 FC 67 18 2A */ fadd f3, f7, f3
+/* 801D0D04 001CC964 FC 6C 00 F2 */ fmul f3, f12, f3
+/* 801D0D08 001CC968 FC 63 20 24 */ fdiv f3, f3, f4
+/* 801D0D0C 001CC96C FC 61 00 F2 */ fmul f3, f1, f3
+/* 801D0D10 001CC970 FC 42 18 28 */ fsub f2, f2, f3
+/* 801D0D14 001CC974 FC 21 10 28 */ fsub f1, f1, f2
+/* 801D0D18 001CC978 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D0D1C 001CC97C 48 00 01 84 */ b lbl_801D0EA0
+lbl_801D0D20:
+/* 801D0D20 001CC980 2C 04 00 00 */ cmpwi r4, 0
+/* 801D0D24 001CC984 40 80 00 B4 */ bge lbl_801D0DD8
+/* 801D0D28 001CC988 C9 62 91 D8 */ lfd f11, lbl_806417D8-_SDA2_BASE_(r2)
+/* 801D0D2C 001CC98C C8 02 92 08 */ lfd f0, lbl_80641808-_SDA2_BASE_(r2)
+/* 801D0D30 001CC990 FC 2B 08 2A */ fadd f1, f11, f1
+/* 801D0D34 001CC994 C8 82 91 D0 */ lfd f4, lbl_806417D0-_SDA2_BASE_(r2)
+/* 801D0D38 001CC998 C9 22 91 C8 */ lfd f9, lbl_806417C8-_SDA2_BASE_(r2)
+/* 801D0D3C 001CC99C C8 62 91 F0 */ lfd f3, lbl_806417F0-_SDA2_BASE_(r2)
+/* 801D0D40 001CC9A0 FC 20 00 72 */ fmul f1, f0, f1
+/* 801D0D44 001CC9A4 C8 02 91 F8 */ lfd f0, lbl_806417F8-_SDA2_BASE_(r2)
+/* 801D0D48 001CC9A8 C9 02 91 C0 */ lfd f8, lbl_806417C0-_SDA2_BASE_(r2)
+/* 801D0D4C 001CC9AC C8 42 91 E8 */ lfd f2, lbl_806417E8-_SDA2_BASE_(r2)
+/* 801D0D50 001CC9B0 C8 E2 91 B8 */ lfd f7, lbl_806417B8-_SDA2_BASE_(r2)
+/* 801D0D54 001CC9B4 FD 44 00 72 */ fmul f10, f4, f1
+/* 801D0D58 001CC9B8 C8 C2 91 B0 */ lfd f6, lbl_806417B0-_SDA2_BASE_(r2)
+/* 801D0D5C 001CC9BC FC 80 00 72 */ fmul f4, f0, f1
+/* 801D0D60 001CC9C0 C8 02 91 E0 */ lfd f0, lbl_806417E0-_SDA2_BASE_(r2)
+/* 801D0D64 001CC9C4 C8 A2 91 A8 */ lfd f5, lbl_806417A8-_SDA2_BASE_(r2)
+/* 801D0D68 001CC9C8 FD 29 50 2A */ fadd f9, f9, f10
+/* 801D0D6C 001CC9CC FC 63 20 2A */ fadd f3, f3, f4
+/* 801D0D70 001CC9D0 FC 81 02 72 */ fmul f4, f1, f9
+/* 801D0D74 001CC9D4 FC 61 00 F2 */ fmul f3, f1, f3
+/* 801D0D78 001CC9D8 FC 88 20 2A */ fadd f4, f8, f4
+/* 801D0D7C 001CC9DC FC 42 18 2A */ fadd f2, f2, f3
+/* 801D0D80 001CC9E0 FC 61 01 32 */ fmul f3, f1, f4
+/* 801D0D84 001CC9E4 FC 41 00 B2 */ fmul f2, f1, f2
+/* 801D0D88 001CC9E8 FC 67 18 2A */ fadd f3, f7, f3
+/* 801D0D8C 001CC9EC FC 00 10 2A */ fadd f0, f0, f2
+/* 801D0D90 001CC9F0 FC 41 00 F2 */ fmul f2, f1, f3
+/* 801D0D94 001CC9F4 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D0D98 001CC9F8 FC 46 10 2A */ fadd f2, f6, f2
+/* 801D0D9C 001CC9FC FF CB 00 2A */ fadd f30, f11, f0
+/* 801D0DA0 001CCA00 FC 01 00 B2 */ fmul f0, f1, f2
+/* 801D0DA4 001CCA04 FC 05 00 2A */ fadd f0, f5, f0
+/* 801D0DA8 001CCA08 FF E1 00 32 */ fmul f31, f1, f0
+/* 801D0DAC 001CCA0C 48 00 3A 89 */ bl sqrt
+/* 801D0DB0 001CCA10 FC 9F F0 24 */ fdiv f4, f31, f30
+/* 801D0DB4 001CCA14 C8 62 92 00 */ lfd f3, lbl_80641800-_SDA2_BASE_(r2)
+/* 801D0DB8 001CCA18 C8 42 92 10 */ lfd f2, lbl_80641810-_SDA2_BASE_(r2)
+/* 801D0DBC 001CCA1C C8 02 91 98 */ lfd f0, lbl_80641798-_SDA2_BASE_(r2)
+/* 801D0DC0 001CCA20 FC 84 00 72 */ fmul f4, f4, f1
+/* 801D0DC4 001CCA24 FC 64 18 28 */ fsub f3, f4, f3
+/* 801D0DC8 001CCA28 FC 21 18 2A */ fadd f1, f1, f3
+/* 801D0DCC 001CCA2C FC 22 00 72 */ fmul f1, f2, f1
+/* 801D0DD0 001CCA30 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D0DD4 001CCA34 48 00 00 CC */ b lbl_801D0EA0
+lbl_801D0DD8:
+/* 801D0DD8 001CCA38 C8 42 91 D8 */ lfd f2, lbl_806417D8-_SDA2_BASE_(r2)
+/* 801D0DDC 001CCA3C C8 02 92 08 */ lfd f0, lbl_80641808-_SDA2_BASE_(r2)
+/* 801D0DE0 001CCA40 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D0DE4 001CCA44 FF E0 00 72 */ fmul f31, f0, f1
+/* 801D0DE8 001CCA48 FC 20 F8 90 */ fmr f1, f31
+/* 801D0DEC 001CCA4C 48 00 3A 49 */ bl sqrt
+/* 801D0DF0 001CCA50 C8 42 91 D0 */ lfd f2, lbl_806417D0-_SDA2_BASE_(r2)
+/* 801D0DF4 001CCA54 38 00 00 00 */ li r0, 0
+/* 801D0DF8 001CCA58 D8 21 00 10 */ stfd f1, 0x10(r1)
+/* 801D0DFC 001CCA5C FC 82 07 F2 */ fmul f4, f2, f31
+/* 801D0E00 001CCA60 C8 02 91 F8 */ lfd f0, lbl_806417F8-_SDA2_BASE_(r2)
+/* 801D0E04 001CCA64 C8 62 91 C8 */ lfd f3, lbl_806417C8-_SDA2_BASE_(r2)
+/* 801D0E08 001CCA68 FC 40 07 F2 */ fmul f2, f0, f31
+/* 801D0E0C 001CCA6C C8 02 91 F0 */ lfd f0, lbl_806417F0-_SDA2_BASE_(r2)
+/* 801D0E10 001CCA70 90 01 00 14 */ stw r0, 0x14(r1)
+/* 801D0E14 001CCA74 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D0E18 001CCA78 C9 61 00 10 */ lfd f11, 0x10(r1)
+/* 801D0E1C 001CCA7C FC 00 10 2A */ fadd f0, f0, f2
+/* 801D0E20 001CCA80 FD 4B 02 F2 */ fmul f10, f11, f11
+/* 801D0E24 001CCA84 C8 C2 91 C0 */ lfd f6, lbl_806417C0-_SDA2_BASE_(r2)
+/* 801D0E28 001CCA88 C9 02 91 B8 */ lfd f8, lbl_806417B8-_SDA2_BASE_(r2)
+/* 801D0E2C 001CCA8C FC 5F 00 F2 */ fmul f2, f31, f3
+/* 801D0E30 001CCA90 C8 82 91 E8 */ lfd f4, lbl_806417E8-_SDA2_BASE_(r2)
+/* 801D0E34 001CCA94 C8 E2 91 B0 */ lfd f7, lbl_806417B0-_SDA2_BASE_(r2)
+/* 801D0E38 001CCA98 FC BF 00 32 */ fmul f5, f31, f0
+/* 801D0E3C 001CCA9C C8 62 91 E0 */ lfd f3, lbl_806417E0-_SDA2_BASE_(r2)
+/* 801D0E40 001CCAA0 FC 06 10 2A */ fadd f0, f6, f2
+/* 801D0E44 001CCAA4 C8 C2 91 A8 */ lfd f6, lbl_806417A8-_SDA2_BASE_(r2)
+/* 801D0E48 001CCAA8 C8 42 91 D8 */ lfd f2, lbl_806417D8-_SDA2_BASE_(r2)
+/* 801D0E4C 001CCAAC FD 5F 50 28 */ fsub f10, f31, f10
+/* 801D0E50 001CCAB0 FD 3F 00 32 */ fmul f9, f31, f0
+/* 801D0E54 001CCAB4 C8 02 92 10 */ lfd f0, lbl_80641810-_SDA2_BASE_(r2)
+/* 801D0E58 001CCAB8 FC 84 28 2A */ fadd f4, f4, f5
+/* 801D0E5C 001CCABC FC A8 48 2A */ fadd f5, f8, f9
+/* 801D0E60 001CCAC0 FC 9F 01 32 */ fmul f4, f31, f4
+/* 801D0E64 001CCAC4 FC BF 01 72 */ fmul f5, f31, f5
+/* 801D0E68 001CCAC8 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D0E6C 001CCACC FD 01 58 2A */ fadd f8, f1, f11
+/* 801D0E70 001CCAD0 FC 87 28 2A */ fadd f4, f7, f5
+/* 801D0E74 001CCAD4 FC 7F 00 F2 */ fmul f3, f31, f3
+/* 801D0E78 001CCAD8 FC 9F 01 32 */ fmul f4, f31, f4
+/* 801D0E7C 001CCADC FC 62 18 2A */ fadd f3, f2, f3
+/* 801D0E80 001CCAE0 FC AA 40 24 */ fdiv f5, f10, f8
+/* 801D0E84 001CCAE4 FC 46 20 2A */ fadd f2, f6, f4
+/* 801D0E88 001CCAE8 FC 5F 00 B2 */ fmul f2, f31, f2
+/* 801D0E8C 001CCAEC FC 42 18 24 */ fdiv f2, f2, f3
+/* 801D0E90 001CCAF0 FC 22 00 72 */ fmul f1, f2, f1
+/* 801D0E94 001CCAF4 FC 25 08 2A */ fadd f1, f5, f1
+/* 801D0E98 001CCAF8 FC 2B 08 2A */ fadd f1, f11, f1
+/* 801D0E9C 001CCAFC FC 20 00 72 */ fmul f1, f0, f1
+lbl_801D0EA0:
+/* 801D0EA0 001CCB00 E3 E1 00 38 */ psq_l f31, 56(r1), 0, qr0
+/* 801D0EA4 001CCB04 CB E1 00 30 */ lfd f31, 0x30(r1)
+/* 801D0EA8 001CCB08 E3 C1 00 28 */ psq_l f30, 40(r1), 0, qr0
+/* 801D0EAC 001CCB0C 80 01 00 44 */ lwz r0, 0x44(r1)
+/* 801D0EB0 001CCB10 CB C1 00 20 */ lfd f30, 0x20(r1)
+/* 801D0EB4 001CCB14 7C 08 03 A6 */ mtlr r0
+/* 801D0EB8 001CCB18 38 21 00 40 */ addi r1, r1, 0x40
+/* 801D0EBC 001CCB1C 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_asin.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_asin.s new file mode 100644 index 0000000..9737cd4 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_asin.s @@ -0,0 +1,181 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_asin
+__ieee754_asin:
+/* 801D0EC0 001CCB20 94 21 FF B0 */ stwu r1, -0x50(r1)
+/* 801D0EC4 001CCB24 7C 08 02 A6 */ mflr r0
+/* 801D0EC8 001CCB28 90 01 00 54 */ stw r0, 0x54(r1)
+/* 801D0ECC 001CCB2C DB E1 00 40 */ stfd f31, 0x40(r1)
+/* 801D0ED0 001CCB30 F3 E1 00 48 */ psq_st f31, 72(r1), 0, qr0
+/* 801D0ED4 001CCB34 DB C1 00 30 */ stfd f30, 0x30(r1)
+/* 801D0ED8 001CCB38 F3 C1 00 38 */ psq_st f30, 56(r1), 0, qr0
+/* 801D0EDC 001CCB3C DB A1 00 20 */ stfd f29, 0x20(r1)
+/* 801D0EE0 001CCB40 F3 A1 00 28 */ psq_st f29, 40(r1), 0, qr0
+/* 801D0EE4 001CCB44 3C 00 3F F0 */ lis r0, 0x3ff0
+/* 801D0EE8 001CCB48 93 E1 00 1C */ stw r31, 0x1c(r1)
+/* 801D0EEC 001CCB4C D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D0EF0 001CCB50 83 E1 00 08 */ lwz r31, 8(r1)
+/* 801D0EF4 001CCB54 93 C1 00 18 */ stw r30, 0x18(r1)
+/* 801D0EF8 001CCB58 57 FE 00 7E */ clrlwi r30, r31, 1
+/* 801D0EFC 001CCB5C 7C 1E 00 00 */ cmpw r30, r0
+/* 801D0F00 001CCB60 41 80 00 38 */ blt lbl_801D0F38
+/* 801D0F04 001CCB64 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D0F08 001CCB68 3C 7E C0 10 */ addis r3, r30, 0xc010
+/* 801D0F0C 001CCB6C 7C 60 03 79 */ or. r0, r3, r0
+/* 801D0F10 001CCB70 40 82 00 1C */ bne lbl_801D0F2C
+/* 801D0F14 001CCB74 C8 42 92 18 */ lfd f2, lbl_80641818-_SDA2_BASE_(r2)
+/* 801D0F18 001CCB78 C8 02 92 20 */ lfd f0, lbl_80641820-_SDA2_BASE_(r2)
+/* 801D0F1C 001CCB7C FC 42 00 72 */ fmul f2, f2, f1
+/* 801D0F20 001CCB80 FC 00 00 72 */ fmul f0, f0, f1
+/* 801D0F24 001CCB84 FC 22 00 2A */ fadd f1, f2, f0
+/* 801D0F28 001CCB88 48 00 02 00 */ b lbl_801D1128
+lbl_801D0F2C:
+/* 801D0F2C 001CCB8C 3C 60 80 64 */ lis r3, lbl_8063D6B8@ha
+/* 801D0F30 001CCB90 C0 23 D6 B8 */ lfs f1, lbl_8063D6B8@l(r3)
+/* 801D0F34 001CCB94 48 00 01 F4 */ b lbl_801D1128
+lbl_801D0F38:
+/* 801D0F38 001CCB98 3C 00 3F E0 */ lis r0, 0x3fe0
+/* 801D0F3C 001CCB9C 7C 1E 00 00 */ cmpw r30, r0
+/* 801D0F40 001CCBA0 40 80 00 B8 */ bge lbl_801D0FF8
+/* 801D0F44 001CCBA4 3C 00 3E 40 */ lis r0, 0x3e40
+/* 801D0F48 001CCBA8 7C 1E 00 00 */ cmpw r30, r0
+/* 801D0F4C 001CCBAC 40 80 00 1C */ bge lbl_801D0F68
+/* 801D0F50 001CCBB0 C8 42 92 28 */ lfd f2, lbl_80641828-_SDA2_BASE_(r2)
+/* 801D0F54 001CCBB4 C8 02 92 30 */ lfd f0, lbl_80641830-_SDA2_BASE_(r2)
+/* 801D0F58 001CCBB8 FC 42 08 2A */ fadd f2, f2, f1
+/* 801D0F5C 001CCBBC FC 02 00 40 */ fcmpo cr0, f2, f0
+/* 801D0F60 001CCBC0 40 81 00 0C */ ble lbl_801D0F6C
+/* 801D0F64 001CCBC4 48 00 01 C4 */ b lbl_801D1128
+lbl_801D0F68:
+/* 801D0F68 001CCBC8 FF E1 00 72 */ fmul f31, f1, f1
+lbl_801D0F6C:
+/* 801D0F6C 001CCBCC C8 42 92 60 */ lfd f2, lbl_80641860-_SDA2_BASE_(r2)
+/* 801D0F70 001CCBD0 C8 02 92 80 */ lfd f0, lbl_80641880-_SDA2_BASE_(r2)
+/* 801D0F74 001CCBD4 FC 82 07 F2 */ fmul f4, f2, f31
+/* 801D0F78 001CCBD8 C8 62 92 58 */ lfd f3, lbl_80641858-_SDA2_BASE_(r2)
+/* 801D0F7C 001CCBDC C9 02 92 50 */ lfd f8, lbl_80641850-_SDA2_BASE_(r2)
+/* 801D0F80 001CCBE0 FC 40 07 F2 */ fmul f2, f0, f31
+/* 801D0F84 001CCBE4 C8 02 92 78 */ lfd f0, lbl_80641878-_SDA2_BASE_(r2)
+/* 801D0F88 001CCBE8 C8 E2 92 48 */ lfd f7, lbl_80641848-_SDA2_BASE_(r2)
+/* 801D0F8C 001CCBEC FC 83 20 2A */ fadd f4, f3, f4
+/* 801D0F90 001CCBF0 C8 62 92 70 */ lfd f3, lbl_80641870-_SDA2_BASE_(r2)
+/* 801D0F94 001CCBF4 FC 00 10 2A */ fadd f0, f0, f2
+/* 801D0F98 001CCBF8 C8 42 92 68 */ lfd f2, lbl_80641868-_SDA2_BASE_(r2)
+/* 801D0F9C 001CCBFC FD 3F 01 32 */ fmul f9, f31, f4
+/* 801D0FA0 001CCC00 C8 C2 92 40 */ lfd f6, lbl_80641840-_SDA2_BASE_(r2)
+/* 801D0FA4 001CCC04 C8 A2 92 38 */ lfd f5, lbl_80641838-_SDA2_BASE_(r2)
+/* 801D0FA8 001CCC08 FC 9F 00 32 */ fmul f4, f31, f0
+/* 801D0FAC 001CCC0C C8 02 92 30 */ lfd f0, lbl_80641830-_SDA2_BASE_(r2)
+/* 801D0FB0 001CCC10 FD 08 48 2A */ fadd f8, f8, f9
+/* 801D0FB4 001CCC14 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D0FB8 001CCC18 FC 9F 02 32 */ fmul f4, f31, f8
+/* 801D0FBC 001CCC1C FC 7F 00 F2 */ fmul f3, f31, f3
+/* 801D0FC0 001CCC20 FC 87 20 2A */ fadd f4, f7, f4
+/* 801D0FC4 001CCC24 FC 42 18 2A */ fadd f2, f2, f3
+/* 801D0FC8 001CCC28 FC 7F 01 32 */ fmul f3, f31, f4
+/* 801D0FCC 001CCC2C FC 5F 00 B2 */ fmul f2, f31, f2
+/* 801D0FD0 001CCC30 FC 66 18 2A */ fadd f3, f6, f3
+/* 801D0FD4 001CCC34 FC 40 10 2A */ fadd f2, f0, f2
+/* 801D0FD8 001CCC38 FC 1F 00 F2 */ fmul f0, f31, f3
+/* 801D0FDC 001CCC3C FC 05 00 2A */ fadd f0, f5, f0
+/* 801D0FE0 001CCC40 FC 1F 00 32 */ fmul f0, f31, f0
+/* 801D0FE4 001CCC44 FC 40 10 24 */ fdiv f2, f0, f2
+/* 801D0FE8 001CCC48 FC 01 00 B2 */ fmul f0, f1, f2
+/* 801D0FEC 001CCC4C D8 41 00 10 */ stfd f2, 0x10(r1)
+/* 801D0FF0 001CCC50 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D0FF4 001CCC54 48 00 01 34 */ b lbl_801D1128
+lbl_801D0FF8:
+/* 801D0FF8 001CCC58 FC 20 0A 10 */ fabs f1, f1
+/* 801D0FFC 001CCC5C C9 62 92 30 */ lfd f11, lbl_80641830-_SDA2_BASE_(r2)
+/* 801D1000 001CCC60 C8 42 92 88 */ lfd f2, lbl_80641888-_SDA2_BASE_(r2)
+/* 801D1004 001CCC64 C8 02 92 60 */ lfd f0, lbl_80641860-_SDA2_BASE_(r2)
+/* 801D1008 001CCC68 FC 6B 08 28 */ fsub f3, f11, f1
+/* 801D100C 001CCC6C C8 22 92 80 */ lfd f1, lbl_80641880-_SDA2_BASE_(r2)
+/* 801D1010 001CCC70 C9 22 92 58 */ lfd f9, lbl_80641858-_SDA2_BASE_(r2)
+/* 801D1014 001CCC74 C9 02 92 50 */ lfd f8, lbl_80641850-_SDA2_BASE_(r2)
+/* 801D1018 001CCC78 FF E2 00 F2 */ fmul f31, f2, f3
+/* 801D101C 001CCC7C C8 62 92 78 */ lfd f3, lbl_80641878-_SDA2_BASE_(r2)
+/* 801D1020 001CCC80 C8 42 92 70 */ lfd f2, lbl_80641870-_SDA2_BASE_(r2)
+/* 801D1024 001CCC84 C8 E2 92 48 */ lfd f7, lbl_80641848-_SDA2_BASE_(r2)
+/* 801D1028 001CCC88 C8 C2 92 40 */ lfd f6, lbl_80641840-_SDA2_BASE_(r2)
+/* 801D102C 001CCC8C FD 40 07 F2 */ fmul f10, f0, f31
+/* 801D1030 001CCC90 C8 02 92 68 */ lfd f0, lbl_80641868-_SDA2_BASE_(r2)
+/* 801D1034 001CCC94 FC 81 07 F2 */ fmul f4, f1, f31
+/* 801D1038 001CCC98 C8 A2 92 38 */ lfd f5, lbl_80641838-_SDA2_BASE_(r2)
+/* 801D103C 001CCC9C FD 29 50 2A */ fadd f9, f9, f10
+/* 801D1040 001CCCA0 FC 20 F8 90 */ fmr f1, f31
+/* 801D1044 001CCCA4 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D1048 001CCCA8 FC 9F 02 72 */ fmul f4, f31, f9
+/* 801D104C 001CCCAC FC 7F 00 F2 */ fmul f3, f31, f3
+/* 801D1050 001CCCB0 FC 88 20 2A */ fadd f4, f8, f4
+/* 801D1054 001CCCB4 FC 42 18 2A */ fadd f2, f2, f3
+/* 801D1058 001CCCB8 FC 7F 01 32 */ fmul f3, f31, f4
+/* 801D105C 001CCCBC FC 5F 00 B2 */ fmul f2, f31, f2
+/* 801D1060 001CCCC0 FC 67 18 2A */ fadd f3, f7, f3
+/* 801D1064 001CCCC4 FC 00 10 2A */ fadd f0, f0, f2
+/* 801D1068 001CCCC8 FC 5F 00 F2 */ fmul f2, f31, f3
+/* 801D106C 001CCCCC FC 1F 00 32 */ fmul f0, f31, f0
+/* 801D1070 001CCCD0 FC 46 10 2A */ fadd f2, f6, f2
+/* 801D1074 001CCCD4 FF AB 00 2A */ fadd f29, f11, f0
+/* 801D1078 001CCCD8 FC 1F 00 B2 */ fmul f0, f31, f2
+/* 801D107C 001CCCDC FC 05 00 2A */ fadd f0, f5, f0
+/* 801D1080 001CCCE0 FF DF 00 32 */ fmul f30, f31, f0
+/* 801D1084 001CCCE4 48 00 37 B1 */ bl sqrt
+/* 801D1088 001CCCE8 3C 60 3F EF */ lis r3, 0x3FEF3333@ha
+/* 801D108C 001CCCEC 38 03 33 33 */ addi r0, r3, 0x3FEF3333@l
+/* 801D1090 001CCCF0 7C 1E 00 00 */ cmpw r30, r0
+/* 801D1094 001CCCF4 41 80 00 30 */ blt lbl_801D10C4
+/* 801D1098 001CCCF8 FC BE E8 24 */ fdiv f5, f30, f29
+/* 801D109C 001CCCFC C8 62 92 90 */ lfd f3, lbl_80641890-_SDA2_BASE_(r2)
+/* 801D10A0 001CCD00 C8 42 92 20 */ lfd f2, lbl_80641820-_SDA2_BASE_(r2)
+/* 801D10A4 001CCD04 C8 02 92 18 */ lfd f0, lbl_80641818-_SDA2_BASE_(r2)
+/* 801D10A8 001CCD08 FC 81 01 72 */ fmul f4, f1, f5
+/* 801D10AC 001CCD0C D8 A1 00 10 */ stfd f5, 0x10(r1)
+/* 801D10B0 001CCD10 FC 21 20 2A */ fadd f1, f1, f4
+/* 801D10B4 001CCD14 FC 23 00 72 */ fmul f1, f3, f1
+/* 801D10B8 001CCD18 FC 21 10 28 */ fsub f1, f1, f2
+/* 801D10BC 001CCD1C FC 20 08 28 */ fsub f1, f0, f1
+/* 801D10C0 001CCD20 48 00 00 58 */ b lbl_801D1118
+lbl_801D10C4:
+/* 801D10C4 001CCD24 D8 21 00 10 */ stfd f1, 0x10(r1)
+/* 801D10C8 001CCD28 38 00 00 00 */ li r0, 0
+/* 801D10CC 001CCD2C C8 A2 92 90 */ lfd f5, lbl_80641890-_SDA2_BASE_(r2)
+/* 801D10D0 001CCD30 FD 1E E8 24 */ fdiv f8, f30, f29
+/* 801D10D4 001CCD34 90 01 00 14 */ stw r0, 0x14(r1)
+/* 801D10D8 001CCD38 C8 62 92 20 */ lfd f3, lbl_80641820-_SDA2_BASE_(r2)
+/* 801D10DC 001CCD3C C8 E1 00 10 */ lfd f7, 0x10(r1)
+/* 801D10E0 001CCD40 C8 42 92 98 */ lfd f2, lbl_80641898-_SDA2_BASE_(r2)
+/* 801D10E4 001CCD44 FC 85 00 72 */ fmul f4, f5, f1
+/* 801D10E8 001CCD48 FC 07 01 F2 */ fmul f0, f7, f7
+/* 801D10EC 001CCD4C FC C1 38 2A */ fadd f6, f1, f7
+/* 801D10F0 001CCD50 FC 84 02 32 */ fmul f4, f4, f8
+/* 801D10F4 001CCD54 FC 3F 00 28 */ fsub f1, f31, f0
+/* 801D10F8 001CCD58 FC 05 01 F2 */ fmul f0, f5, f7
+/* 801D10FC 001CCD5C FC 21 30 24 */ fdiv f1, f1, f6
+/* 801D1100 001CCD60 FC 25 00 72 */ fmul f1, f5, f1
+/* 801D1104 001CCD64 FC 23 08 28 */ fsub f1, f3, f1
+/* 801D1108 001CCD68 FC 62 00 28 */ fsub f3, f2, f0
+/* 801D110C 001CCD6C FC 04 08 28 */ fsub f0, f4, f1
+/* 801D1110 001CCD70 FC 00 18 28 */ fsub f0, f0, f3
+/* 801D1114 001CCD74 FC 22 00 28 */ fsub f1, f2, f0
+lbl_801D1118:
+/* 801D1118 001CCD78 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D111C 001CCD7C 40 81 00 08 */ ble lbl_801D1124
+/* 801D1120 001CCD80 48 00 00 08 */ b lbl_801D1128
+lbl_801D1124:
+/* 801D1124 001CCD84 FC 20 08 50 */ fneg f1, f1
+lbl_801D1128:
+/* 801D1128 001CCD88 E3 E1 00 48 */ psq_l f31, 72(r1), 0, qr0
+/* 801D112C 001CCD8C CB E1 00 40 */ lfd f31, 0x40(r1)
+/* 801D1130 001CCD90 E3 C1 00 38 */ psq_l f30, 56(r1), 0, qr0
+/* 801D1134 001CCD94 CB C1 00 30 */ lfd f30, 0x30(r1)
+/* 801D1138 001CCD98 E3 A1 00 28 */ psq_l f29, 40(r1), 0, qr0
+/* 801D113C 001CCD9C CB A1 00 20 */ lfd f29, 0x20(r1)
+/* 801D1140 001CCDA0 83 E1 00 1C */ lwz r31, 0x1c(r1)
+/* 801D1144 001CCDA4 80 01 00 54 */ lwz r0, 0x54(r1)
+/* 801D1148 001CCDA8 83 C1 00 18 */ lwz r30, 0x18(r1)
+/* 801D114C 001CCDAC 7C 08 03 A6 */ mtlr r0
+/* 801D1150 001CCDB0 38 21 00 50 */ addi r1, r1, 0x50
+/* 801D1154 001CCDB4 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_atan2.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_atan2.s new file mode 100644 index 0000000..817db98 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_atan2.s @@ -0,0 +1,193 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_atan2
+__ieee754_atan2:
+/* 801D1158 001CCDB8 94 21 FF D0 */ stwu r1, -0x30(r1)
+/* 801D115C 001CCDBC 7C 08 02 A6 */ mflr r0
+/* 801D1160 001CCDC0 3C 60 7F F0 */ lis r3, 0x7ff0
+/* 801D1164 001CCDC4 D8 41 00 10 */ stfd f2, 0x10(r1)
+/* 801D1168 001CCDC8 81 01 00 14 */ lwz r8, 0x14(r1)
+/* 801D116C 001CCDCC 90 01 00 34 */ stw r0, 0x34(r1)
+/* 801D1170 001CCDD0 7C 08 00 D0 */ neg r0, r8
+/* 801D1174 001CCDD4 80 81 00 10 */ lwz r4, 0x10(r1)
+/* 801D1178 001CCDD8 7D 00 03 78 */ or r0, r8, r0
+/* 801D117C 001CCDDC D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D1180 001CCDE0 54 86 00 7E */ clrlwi r6, r4, 1
+/* 801D1184 001CCDE4 54 00 0F FE */ srwi r0, r0, 0x1f
+/* 801D1188 001CCDE8 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D118C 001CCDEC 7C C0 03 78 */ or r0, r6, r0
+/* 801D1190 001CCDF0 93 E1 00 2C */ stw r31, 0x2c(r1)
+/* 801D1194 001CCDF4 7C 00 18 40 */ cmplw r0, r3
+/* 801D1198 001CCDF8 81 21 00 0C */ lwz r9, 0xc(r1)
+/* 801D119C 001CCDFC 54 A7 00 7E */ clrlwi r7, r5, 1
+/* 801D11A0 001CCE00 41 81 00 1C */ bgt lbl_801D11BC
+/* 801D11A4 001CCE04 7C 09 00 D0 */ neg r0, r9
+/* 801D11A8 001CCE08 7D 20 03 78 */ or r0, r9, r0
+/* 801D11AC 001CCE0C 54 00 0F FE */ srwi r0, r0, 0x1f
+/* 801D11B0 001CCE10 7C E0 03 78 */ or r0, r7, r0
+/* 801D11B4 001CCE14 7C 00 18 40 */ cmplw r0, r3
+/* 801D11B8 001CCE18 40 81 00 0C */ ble lbl_801D11C4
+lbl_801D11BC:
+/* 801D11BC 001CCE1C FC 22 08 2A */ fadd f1, f2, f1
+/* 801D11C0 001CCE20 48 00 01 F4 */ b lbl_801D13B4
+lbl_801D11C4:
+/* 801D11C4 001CCE24 3C 04 C0 10 */ addis r0, r4, 0xc010
+/* 801D11C8 001CCE28 7C 00 43 79 */ or. r0, r0, r8
+/* 801D11CC 001CCE2C 40 82 00 0C */ bne lbl_801D11D8
+/* 801D11D0 001CCE30 48 00 2C 3D */ bl atan
+/* 801D11D4 001CCE34 48 00 01 E0 */ b lbl_801D13B4
+lbl_801D11D8:
+/* 801D11D8 001CCE38 7C E0 4B 79 */ or. r0, r7, r9
+/* 801D11DC 001CCE3C 54 9F 17 BC */ rlwinm r31, r4, 2, 0x1e, 0x1e
+/* 801D11E0 001CCE40 50 BF 0F FE */ rlwimi r31, r5, 1, 0x1f, 0x1f
+/* 801D11E4 001CCE44 40 82 00 3C */ bne lbl_801D1220
+/* 801D11E8 001CCE48 2C 1F 00 02 */ cmpwi r31, 2
+/* 801D11EC 001CCE4C 41 82 00 24 */ beq lbl_801D1210
+/* 801D11F0 001CCE50 40 80 00 10 */ bge lbl_801D1200
+/* 801D11F4 001CCE54 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D11F8 001CCE58 40 80 01 BC */ bge lbl_801D13B4
+/* 801D11FC 001CCE5C 48 00 00 24 */ b lbl_801D1220
+lbl_801D1200:
+/* 801D1200 001CCE60 2C 1F 00 04 */ cmpwi r31, 4
+/* 801D1204 001CCE64 40 80 00 1C */ bge lbl_801D1220
+/* 801D1208 001CCE68 48 00 00 10 */ b lbl_801D1218
+/* 801D120C 001CCE6C 48 00 01 A8 */ b lbl_801D13B4
+lbl_801D1210:
+/* 801D1210 001CCE70 C8 22 92 A0 */ lfd f1, lbl_806418A0-_SDA2_BASE_(r2)
+/* 801D1214 001CCE74 48 00 01 A0 */ b lbl_801D13B4
+lbl_801D1218:
+/* 801D1218 001CCE78 C8 22 92 A8 */ lfd f1, lbl_806418A8-_SDA2_BASE_(r2)
+/* 801D121C 001CCE7C 48 00 01 98 */ b lbl_801D13B4
+lbl_801D1220:
+/* 801D1220 001CCE80 7C C0 43 79 */ or. r0, r6, r8
+/* 801D1224 001CCE84 40 82 00 1C */ bne lbl_801D1240
+/* 801D1228 001CCE88 2C 05 00 00 */ cmpwi r5, 0
+/* 801D122C 001CCE8C 40 80 00 0C */ bge lbl_801D1238
+/* 801D1230 001CCE90 C8 22 92 B0 */ lfd f1, lbl_806418B0-_SDA2_BASE_(r2)
+/* 801D1234 001CCE94 48 00 01 80 */ b lbl_801D13B4
+lbl_801D1238:
+/* 801D1238 001CCE98 C8 22 92 B8 */ lfd f1, lbl_806418B8-_SDA2_BASE_(r2)
+/* 801D123C 001CCE9C 48 00 01 78 */ b lbl_801D13B4
+lbl_801D1240:
+/* 801D1240 001CCEA0 3C 06 80 10 */ addis r0, r6, 0x8010
+/* 801D1244 001CCEA4 28 00 00 00 */ cmplwi r0, 0
+/* 801D1248 001CCEA8 40 82 00 A0 */ bne lbl_801D12E8
+/* 801D124C 001CCEAC 3C 07 80 10 */ addis r0, r7, 0x8010
+/* 801D1250 001CCEB0 28 00 00 00 */ cmplwi r0, 0
+/* 801D1254 001CCEB4 40 82 00 4C */ bne lbl_801D12A0
+/* 801D1258 001CCEB8 2C 1F 00 02 */ cmpwi r31, 2
+/* 801D125C 001CCEBC 41 82 00 34 */ beq lbl_801D1290
+/* 801D1260 001CCEC0 40 80 00 14 */ bge lbl_801D1274
+/* 801D1264 001CCEC4 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D1268 001CCEC8 41 82 00 18 */ beq lbl_801D1280
+/* 801D126C 001CCECC 40 80 00 1C */ bge lbl_801D1288
+/* 801D1270 001CCED0 48 00 00 78 */ b lbl_801D12E8
+lbl_801D1274:
+/* 801D1274 001CCED4 2C 1F 00 04 */ cmpwi r31, 4
+/* 801D1278 001CCED8 40 80 00 70 */ bge lbl_801D12E8
+/* 801D127C 001CCEDC 48 00 00 1C */ b lbl_801D1298
+lbl_801D1280:
+/* 801D1280 001CCEE0 C8 22 92 C0 */ lfd f1, lbl_806418C0-_SDA2_BASE_(r2)
+/* 801D1284 001CCEE4 48 00 01 30 */ b lbl_801D13B4
+lbl_801D1288:
+/* 801D1288 001CCEE8 C8 22 92 C8 */ lfd f1, lbl_806418C8-_SDA2_BASE_(r2)
+/* 801D128C 001CCEEC 48 00 01 28 */ b lbl_801D13B4
+lbl_801D1290:
+/* 801D1290 001CCEF0 C8 22 92 D0 */ lfd f1, lbl_806418D0-_SDA2_BASE_(r2)
+/* 801D1294 001CCEF4 48 00 01 20 */ b lbl_801D13B4
+lbl_801D1298:
+/* 801D1298 001CCEF8 C8 22 92 D8 */ lfd f1, lbl_806418D8-_SDA2_BASE_(r2)
+/* 801D129C 001CCEFC 48 00 01 18 */ b lbl_801D13B4
+lbl_801D12A0:
+/* 801D12A0 001CCF00 2C 1F 00 02 */ cmpwi r31, 2
+/* 801D12A4 001CCF04 41 82 00 34 */ beq lbl_801D12D8
+/* 801D12A8 001CCF08 40 80 00 14 */ bge lbl_801D12BC
+/* 801D12AC 001CCF0C 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D12B0 001CCF10 41 82 00 18 */ beq lbl_801D12C8
+/* 801D12B4 001CCF14 40 80 00 1C */ bge lbl_801D12D0
+/* 801D12B8 001CCF18 48 00 00 30 */ b lbl_801D12E8
+lbl_801D12BC:
+/* 801D12BC 001CCF1C 2C 1F 00 04 */ cmpwi r31, 4
+/* 801D12C0 001CCF20 40 80 00 28 */ bge lbl_801D12E8
+/* 801D12C4 001CCF24 48 00 00 1C */ b lbl_801D12E0
+lbl_801D12C8:
+/* 801D12C8 001CCF28 C8 22 92 E0 */ lfd f1, lbl_806418E0-_SDA2_BASE_(r2)
+/* 801D12CC 001CCF2C 48 00 00 E8 */ b lbl_801D13B4
+lbl_801D12D0:
+/* 801D12D0 001CCF30 C8 22 92 E8 */ lfd f1, lbl_806418E8-_SDA2_BASE_(r2)
+/* 801D12D4 001CCF34 48 00 00 E0 */ b lbl_801D13B4
+lbl_801D12D8:
+/* 801D12D8 001CCF38 C8 22 92 A0 */ lfd f1, lbl_806418A0-_SDA2_BASE_(r2)
+/* 801D12DC 001CCF3C 48 00 00 D8 */ b lbl_801D13B4
+lbl_801D12E0:
+/* 801D12E0 001CCF40 C8 22 92 A8 */ lfd f1, lbl_806418A8-_SDA2_BASE_(r2)
+/* 801D12E4 001CCF44 48 00 00 D0 */ b lbl_801D13B4
+lbl_801D12E8:
+/* 801D12E8 001CCF48 3C 07 80 10 */ addis r0, r7, 0x8010
+/* 801D12EC 001CCF4C 28 00 00 00 */ cmplwi r0, 0
+/* 801D12F0 001CCF50 40 82 00 1C */ bne lbl_801D130C
+/* 801D12F4 001CCF54 2C 05 00 00 */ cmpwi r5, 0
+/* 801D12F8 001CCF58 40 80 00 0C */ bge lbl_801D1304
+/* 801D12FC 001CCF5C C8 22 92 B0 */ lfd f1, lbl_806418B0-_SDA2_BASE_(r2)
+/* 801D1300 001CCF60 48 00 00 B4 */ b lbl_801D13B4
+lbl_801D1304:
+/* 801D1304 001CCF64 C8 22 92 B8 */ lfd f1, lbl_806418B8-_SDA2_BASE_(r2)
+/* 801D1308 001CCF68 48 00 00 AC */ b lbl_801D13B4
+lbl_801D130C:
+/* 801D130C 001CCF6C 7C 06 38 50 */ subf r0, r6, r7
+/* 801D1310 001CCF70 7C 00 A6 70 */ srawi r0, r0, 0x14
+/* 801D1314 001CCF74 2C 00 00 3C */ cmpwi r0, 0x3c
+/* 801D1318 001CCF78 40 81 00 10 */ ble lbl_801D1328
+/* 801D131C 001CCF7C C8 22 92 B8 */ lfd f1, lbl_806418B8-_SDA2_BASE_(r2)
+/* 801D1320 001CCF80 D8 21 00 18 */ stfd f1, 0x18(r1)
+/* 801D1324 001CCF84 48 00 00 30 */ b lbl_801D1354
+lbl_801D1328:
+/* 801D1328 001CCF88 2C 04 00 00 */ cmpwi r4, 0
+/* 801D132C 001CCF8C 40 80 00 18 */ bge lbl_801D1344
+/* 801D1330 001CCF90 2C 00 FF C4 */ cmpwi r0, -60
+/* 801D1334 001CCF94 40 80 00 10 */ bge lbl_801D1344
+/* 801D1338 001CCF98 C8 22 92 E0 */ lfd f1, lbl_806418E0-_SDA2_BASE_(r2)
+/* 801D133C 001CCF9C D8 21 00 18 */ stfd f1, 0x18(r1)
+/* 801D1340 001CCFA0 48 00 00 14 */ b lbl_801D1354
+lbl_801D1344:
+/* 801D1344 001CCFA4 FC 01 10 24 */ fdiv f0, f1, f2
+/* 801D1348 001CCFA8 FC 20 02 10 */ fabs f1, f0
+/* 801D134C 001CCFAC 48 00 2A C1 */ bl atan
+/* 801D1350 001CCFB0 D8 21 00 18 */ stfd f1, 0x18(r1)
+lbl_801D1354:
+/* 801D1354 001CCFB4 2C 1F 00 01 */ cmpwi r31, 1
+/* 801D1358 001CCFB8 41 82 00 24 */ beq lbl_801D137C
+/* 801D135C 001CCFBC 40 80 00 10 */ bge lbl_801D136C
+/* 801D1360 001CCFC0 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D1364 001CCFC4 40 80 00 50 */ bge lbl_801D13B4
+/* 801D1368 001CCFC8 48 00 00 3C */ b lbl_801D13A4
+lbl_801D136C:
+/* 801D136C 001CCFCC 2C 1F 00 03 */ cmpwi r31, 3
+/* 801D1370 001CCFD0 40 80 00 34 */ bge lbl_801D13A4
+/* 801D1374 001CCFD4 48 00 00 1C */ b lbl_801D1390
+/* 801D1378 001CCFD8 48 00 00 3C */ b lbl_801D13B4
+lbl_801D137C:
+/* 801D137C 001CCFDC 80 01 00 18 */ lwz r0, 0x18(r1)
+/* 801D1380 001CCFE0 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D1384 001CCFE4 90 01 00 18 */ stw r0, 0x18(r1)
+/* 801D1388 001CCFE8 C8 21 00 18 */ lfd f1, 0x18(r1)
+/* 801D138C 001CCFEC 48 00 00 28 */ b lbl_801D13B4
+lbl_801D1390:
+/* 801D1390 001CCFF0 C8 42 92 F0 */ lfd f2, lbl_806418F0-_SDA2_BASE_(r2)
+/* 801D1394 001CCFF4 C8 02 92 A0 */ lfd f0, lbl_806418A0-_SDA2_BASE_(r2)
+/* 801D1398 001CCFF8 FC 21 10 28 */ fsub f1, f1, f2
+/* 801D139C 001CCFFC FC 20 08 28 */ fsub f1, f0, f1
+/* 801D13A0 001CD000 48 00 00 14 */ b lbl_801D13B4
+lbl_801D13A4:
+/* 801D13A4 001CD004 C8 42 92 F0 */ lfd f2, lbl_806418F0-_SDA2_BASE_(r2)
+/* 801D13A8 001CD008 C8 02 92 A0 */ lfd f0, lbl_806418A0-_SDA2_BASE_(r2)
+/* 801D13AC 001CD00C FC 21 10 28 */ fsub f1, f1, f2
+/* 801D13B0 001CD010 FC 21 00 28 */ fsub f1, f1, f0
+lbl_801D13B4:
+/* 801D13B4 001CD014 80 01 00 34 */ lwz r0, 0x34(r1)
+/* 801D13B8 001CD018 83 E1 00 2C */ lwz r31, 0x2c(r1)
+/* 801D13BC 001CD01C 7C 08 03 A6 */ mtlr r0
+/* 801D13C0 001CD020 38 21 00 30 */ addi r1, r1, 0x30
+/* 801D13C4 001CD024 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_fmod.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_fmod.s new file mode 100644 index 0000000..7b25558 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_fmod.s @@ -0,0 +1,251 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_fmod
+__ieee754_fmod:
+/* 801D13C8 001CD028 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D13CC 001CD02C D8 41 00 10 */ stfd f2, 0x10(r1)
+/* 801D13D0 001CD030 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D13D4 001CD034 80 01 00 10 */ lwz r0, 0x10(r1)
+/* 801D13D8 001CD038 80 E1 00 08 */ lwz r7, 8(r1)
+/* 801D13DC 001CD03C 80 C1 00 14 */ lwz r6, 0x14(r1)
+/* 801D13E0 001CD040 54 00 00 7E */ clrlwi r0, r0, 1
+/* 801D13E4 001CD044 54 E4 00 00 */ rlwinm r4, r7, 0, 0, 0
+/* 801D13E8 001CD048 80 A1 00 0C */ lwz r5, 0xc(r1)
+/* 801D13EC 001CD04C 7C 03 33 79 */ or. r3, r0, r6
+/* 801D13F0 001CD050 7C E8 22 78 */ xor r8, r7, r4
+/* 801D13F4 001CD054 41 82 00 28 */ beq lbl_801D141C
+/* 801D13F8 001CD058 3C E0 7F F0 */ lis r7, 0x7ff0
+/* 801D13FC 001CD05C 7C 08 38 00 */ cmpw r8, r7
+/* 801D1400 001CD060 40 80 00 1C */ bge lbl_801D141C
+/* 801D1404 001CD064 7C 66 00 D0 */ neg r3, r6
+/* 801D1408 001CD068 7C C3 1B 78 */ or r3, r6, r3
+/* 801D140C 001CD06C 54 63 0F FE */ srwi r3, r3, 0x1f
+/* 801D1410 001CD070 7C 03 1B 78 */ or r3, r0, r3
+/* 801D1414 001CD074 7C 03 38 40 */ cmplw r3, r7
+/* 801D1418 001CD078 40 81 00 10 */ ble lbl_801D1428
+lbl_801D141C:
+/* 801D141C 001CD07C FC 01 00 B2 */ fmul f0, f1, f2
+/* 801D1420 001CD080 FC 20 00 24 */ fdiv f1, f0, f0
+/* 801D1424 001CD084 48 00 02 CC */ b lbl_801D16F0
+lbl_801D1428:
+/* 801D1428 001CD088 7C 08 00 00 */ cmpw r8, r0
+/* 801D142C 001CD08C 41 81 00 2C */ bgt lbl_801D1458
+/* 801D1430 001CD090 41 80 02 C0 */ blt lbl_801D16F0
+/* 801D1434 001CD094 7C 05 30 40 */ cmplw r5, r6
+/* 801D1438 001CD098 40 80 00 08 */ bge lbl_801D1440
+/* 801D143C 001CD09C 48 00 02 B4 */ b lbl_801D16F0
+lbl_801D1440:
+/* 801D1440 001CD0A0 40 82 00 18 */ bne lbl_801D1458
+/* 801D1444 001CD0A4 3C 60 80 40 */ lis r3, lbl_803FD328@ha
+/* 801D1448 001CD0A8 54 80 27 38 */ rlwinm r0, r4, 4, 0x1c, 0x1c
+/* 801D144C 001CD0AC 38 63 D3 28 */ addi r3, r3, lbl_803FD328@l
+/* 801D1450 001CD0B0 7C 23 04 AE */ lfdx f1, r3, r0
+/* 801D1454 001CD0B4 48 00 02 9C */ b lbl_801D16F0
+lbl_801D1458:
+/* 801D1458 001CD0B8 3C 60 00 10 */ lis r3, 0x10
+/* 801D145C 001CD0BC 7C 08 18 00 */ cmpw r8, r3
+/* 801D1460 001CD0C0 40 80 00 4C */ bge lbl_801D14AC
+/* 801D1464 001CD0C4 2C 08 00 00 */ cmpwi r8, 0
+/* 801D1468 001CD0C8 40 82 00 24 */ bne lbl_801D148C
+/* 801D146C 001CD0CC 7C A3 2B 78 */ mr r3, r5
+/* 801D1470 001CD0D0 39 60 FB ED */ li r11, -1043
+/* 801D1474 001CD0D4 48 00 00 0C */ b lbl_801D1480
+lbl_801D1478:
+/* 801D1478 001CD0D8 54 63 08 3C */ slwi r3, r3, 1
+/* 801D147C 001CD0DC 39 6B FF FF */ addi r11, r11, -1
+lbl_801D1480:
+/* 801D1480 001CD0E0 2C 03 00 00 */ cmpwi r3, 0
+/* 801D1484 001CD0E4 41 81 FF F4 */ bgt lbl_801D1478
+/* 801D1488 001CD0E8 48 00 00 2C */ b lbl_801D14B4
+lbl_801D148C:
+/* 801D148C 001CD0EC 55 03 58 28 */ slwi r3, r8, 0xb
+/* 801D1490 001CD0F0 39 60 FC 02 */ li r11, -1022
+/* 801D1494 001CD0F4 48 00 00 0C */ b lbl_801D14A0
+lbl_801D1498:
+/* 801D1498 001CD0F8 54 63 08 3C */ slwi r3, r3, 1
+/* 801D149C 001CD0FC 39 6B FF FF */ addi r11, r11, -1
+lbl_801D14A0:
+/* 801D14A0 001CD100 2C 03 00 00 */ cmpwi r3, 0
+/* 801D14A4 001CD104 41 81 FF F4 */ bgt lbl_801D1498
+/* 801D14A8 001CD108 48 00 00 0C */ b lbl_801D14B4
+lbl_801D14AC:
+/* 801D14AC 001CD10C 7D 03 A6 70 */ srawi r3, r8, 0x14
+/* 801D14B0 001CD110 39 63 FC 01 */ addi r11, r3, -1023
+lbl_801D14B4:
+/* 801D14B4 001CD114 3C 60 00 10 */ lis r3, 0x10
+/* 801D14B8 001CD118 7C 00 18 00 */ cmpw r0, r3
+/* 801D14BC 001CD11C 40 80 00 4C */ bge lbl_801D1508
+/* 801D14C0 001CD120 2C 00 00 00 */ cmpwi r0, 0
+/* 801D14C4 001CD124 40 82 00 24 */ bne lbl_801D14E8
+/* 801D14C8 001CD128 7C C7 33 78 */ mr r7, r6
+/* 801D14CC 001CD12C 38 60 FB ED */ li r3, -1043
+/* 801D14D0 001CD130 48 00 00 0C */ b lbl_801D14DC
+lbl_801D14D4:
+/* 801D14D4 001CD134 54 E7 08 3C */ slwi r7, r7, 1
+/* 801D14D8 001CD138 38 63 FF FF */ addi r3, r3, -1
+lbl_801D14DC:
+/* 801D14DC 001CD13C 2C 07 00 00 */ cmpwi r7, 0
+/* 801D14E0 001CD140 41 81 FF F4 */ bgt lbl_801D14D4
+/* 801D14E4 001CD144 48 00 00 2C */ b lbl_801D1510
+lbl_801D14E8:
+/* 801D14E8 001CD148 54 07 58 28 */ slwi r7, r0, 0xb
+/* 801D14EC 001CD14C 38 60 FC 02 */ li r3, -1022
+/* 801D14F0 001CD150 48 00 00 0C */ b lbl_801D14FC
+lbl_801D14F4:
+/* 801D14F4 001CD154 54 E7 08 3C */ slwi r7, r7, 1
+/* 801D14F8 001CD158 38 63 FF FF */ addi r3, r3, -1
+lbl_801D14FC:
+/* 801D14FC 001CD15C 2C 07 00 00 */ cmpwi r7, 0
+/* 801D1500 001CD160 41 81 FF F4 */ bgt lbl_801D14F4
+/* 801D1504 001CD164 48 00 00 0C */ b lbl_801D1510
+lbl_801D1508:
+/* 801D1508 001CD168 7C 03 A6 70 */ srawi r3, r0, 0x14
+/* 801D150C 001CD16C 38 63 FC 01 */ addi r3, r3, -1023
+lbl_801D1510:
+/* 801D1510 001CD170 2C 0B FC 02 */ cmpwi r11, -1022
+/* 801D1514 001CD174 41 80 00 10 */ blt lbl_801D1524
+/* 801D1518 001CD178 55 07 03 3E */ clrlwi r7, r8, 0xc
+/* 801D151C 001CD17C 64 E9 00 10 */ oris r9, r7, 0x10
+/* 801D1520 001CD180 48 00 00 34 */ b lbl_801D1554
+lbl_801D1524:
+/* 801D1524 001CD184 21 2B FC 02 */ subfic r9, r11, -1022
+/* 801D1528 001CD188 2C 09 00 1F */ cmpwi r9, 0x1f
+/* 801D152C 001CD18C 41 81 00 1C */ bgt lbl_801D1548
+/* 801D1530 001CD190 20 E9 00 20 */ subfic r7, r9, 0x20
+/* 801D1534 001CD194 7D 08 48 30 */ slw r8, r8, r9
+/* 801D1538 001CD198 7C A7 3C 30 */ srw r7, r5, r7
+/* 801D153C 001CD19C 7C A5 48 30 */ slw r5, r5, r9
+/* 801D1540 001CD1A0 7D 09 3B 78 */ or r9, r8, r7
+/* 801D1544 001CD1A4 48 00 00 10 */ b lbl_801D1554
+lbl_801D1548:
+/* 801D1548 001CD1A8 38 E9 FF E0 */ addi r7, r9, -32
+/* 801D154C 001CD1AC 7C A9 38 30 */ slw r9, r5, r7
+/* 801D1550 001CD1B0 38 A0 00 00 */ li r5, 0
+lbl_801D1554:
+/* 801D1554 001CD1B4 2C 03 FC 02 */ cmpwi r3, -1022
+/* 801D1558 001CD1B8 41 80 00 10 */ blt lbl_801D1568
+/* 801D155C 001CD1BC 54 00 03 3E */ clrlwi r0, r0, 0xc
+/* 801D1560 001CD1C0 64 08 00 10 */ oris r8, r0, 0x10
+/* 801D1564 001CD1C4 48 00 00 34 */ b lbl_801D1598
+lbl_801D1568:
+/* 801D1568 001CD1C8 21 43 FC 02 */ subfic r10, r3, -1022
+/* 801D156C 001CD1CC 2C 0A 00 1F */ cmpwi r10, 0x1f
+/* 801D1570 001CD1D0 41 81 00 1C */ bgt lbl_801D158C
+/* 801D1574 001CD1D4 20 EA 00 20 */ subfic r7, r10, 0x20
+/* 801D1578 001CD1D8 7C 08 50 30 */ slw r8, r0, r10
+/* 801D157C 001CD1DC 7C C0 3C 30 */ srw r0, r6, r7
+/* 801D1580 001CD1E0 7C C6 50 30 */ slw r6, r6, r10
+/* 801D1584 001CD1E4 7D 08 03 78 */ or r8, r8, r0
+/* 801D1588 001CD1E8 48 00 00 10 */ b lbl_801D1598
+lbl_801D158C:
+/* 801D158C 001CD1EC 38 0A FF E0 */ addi r0, r10, -32
+/* 801D1590 001CD1F0 7C C8 00 30 */ slw r8, r6, r0
+/* 801D1594 001CD1F4 38 C0 00 00 */ li r6, 0
+lbl_801D1598:
+/* 801D1598 001CD1F8 7C 03 58 51 */ subf. r0, r3, r11
+/* 801D159C 001CD1FC 7C 09 03 A6 */ mtctr r0
+/* 801D15A0 001CD200 41 82 00 64 */ beq lbl_801D1604
+lbl_801D15A4:
+/* 801D15A4 001CD204 7C 05 30 40 */ cmplw r5, r6
+/* 801D15A8 001CD208 7C E8 48 50 */ subf r7, r8, r9
+/* 801D15AC 001CD20C 7D 46 28 50 */ subf r10, r6, r5
+/* 801D15B0 001CD210 40 80 00 08 */ bge lbl_801D15B8
+/* 801D15B4 001CD214 38 E7 FF FF */ addi r7, r7, -1
+lbl_801D15B8:
+/* 801D15B8 001CD218 2C 07 00 00 */ cmpwi r7, 0
+/* 801D15BC 001CD21C 40 80 00 18 */ bge lbl_801D15D4
+/* 801D15C0 001CD220 54 A7 0F FE */ srwi r7, r5, 0x1f
+/* 801D15C4 001CD224 55 20 08 3C */ slwi r0, r9, 1
+/* 801D15C8 001CD228 7D 27 02 14 */ add r9, r7, r0
+/* 801D15CC 001CD22C 7C A5 2A 14 */ add r5, r5, r5
+/* 801D15D0 001CD230 48 00 00 30 */ b lbl_801D1600
+lbl_801D15D4:
+/* 801D15D4 001CD234 7C E0 53 79 */ or. r0, r7, r10
+/* 801D15D8 001CD238 40 82 00 18 */ bne lbl_801D15F0
+/* 801D15DC 001CD23C 3C 60 80 40 */ lis r3, lbl_803FD328@ha
+/* 801D15E0 001CD240 54 80 27 38 */ rlwinm r0, r4, 4, 0x1c, 0x1c
+/* 801D15E4 001CD244 38 63 D3 28 */ addi r3, r3, lbl_803FD328@l
+/* 801D15E8 001CD248 7C 23 04 AE */ lfdx f1, r3, r0
+/* 801D15EC 001CD24C 48 00 01 04 */ b lbl_801D16F0
+lbl_801D15F0:
+/* 801D15F0 001CD250 55 45 0F FE */ srwi r5, r10, 0x1f
+/* 801D15F4 001CD254 54 E0 08 3C */ slwi r0, r7, 1
+/* 801D15F8 001CD258 7D 25 02 14 */ add r9, r5, r0
+/* 801D15FC 001CD25C 55 45 08 3C */ slwi r5, r10, 1
+lbl_801D1600:
+/* 801D1600 001CD260 42 00 FF A4 */ bdnz lbl_801D15A4
+lbl_801D1604:
+/* 801D1604 001CD264 7C 05 30 40 */ cmplw r5, r6
+/* 801D1608 001CD268 7C E8 48 50 */ subf r7, r8, r9
+/* 801D160C 001CD26C 7C 06 28 50 */ subf r0, r6, r5
+/* 801D1610 001CD270 40 80 00 08 */ bge lbl_801D1618
+/* 801D1614 001CD274 38 E7 FF FF */ addi r7, r7, -1
+lbl_801D1618:
+/* 801D1618 001CD278 2C 07 00 00 */ cmpwi r7, 0
+/* 801D161C 001CD27C 41 80 00 0C */ blt lbl_801D1628
+/* 801D1620 001CD280 7C E9 3B 78 */ mr r9, r7
+/* 801D1624 001CD284 7C 05 03 78 */ mr r5, r0
+lbl_801D1628:
+/* 801D1628 001CD288 7D 20 2B 79 */ or. r0, r9, r5
+/* 801D162C 001CD28C 40 82 00 18 */ bne lbl_801D1644
+/* 801D1630 001CD290 3C 60 80 40 */ lis r3, lbl_803FD328@ha
+/* 801D1634 001CD294 54 80 27 38 */ rlwinm r0, r4, 4, 0x1c, 0x1c
+/* 801D1638 001CD298 38 63 D3 28 */ addi r3, r3, lbl_803FD328@l
+/* 801D163C 001CD29C 7C 23 04 AE */ lfdx f1, r3, r0
+/* 801D1640 001CD2A0 48 00 00 B0 */ b lbl_801D16F0
+lbl_801D1644:
+/* 801D1644 001CD2A4 3C 00 00 10 */ lis r0, 0x10
+/* 801D1648 001CD2A8 48 00 00 18 */ b lbl_801D1660
+lbl_801D164C:
+/* 801D164C 001CD2AC 54 A7 0F FE */ srwi r7, r5, 0x1f
+/* 801D1650 001CD2B0 55 26 08 3C */ slwi r6, r9, 1
+/* 801D1654 001CD2B4 7D 27 32 14 */ add r9, r7, r6
+/* 801D1658 001CD2B8 7C A5 2A 14 */ add r5, r5, r5
+/* 801D165C 001CD2BC 38 63 FF FF */ addi r3, r3, -1
+lbl_801D1660:
+/* 801D1660 001CD2C0 7C 09 00 00 */ cmpw r9, r0
+/* 801D1664 001CD2C4 41 80 FF E8 */ blt lbl_801D164C
+/* 801D1668 001CD2C8 2C 03 FC 02 */ cmpwi r3, -1022
+/* 801D166C 001CD2CC 41 80 00 24 */ blt lbl_801D1690
+/* 801D1670 001CD2D0 38 03 03 FF */ addi r0, r3, 0x3ff
+/* 801D1674 001CD2D4 3C 69 FF F0 */ addis r3, r9, 0xfff0
+/* 801D1678 001CD2D8 54 00 A0 16 */ slwi r0, r0, 0x14
+/* 801D167C 001CD2DC 90 A1 00 0C */ stw r5, 0xc(r1)
+/* 801D1680 001CD2E0 7C 60 03 78 */ or r0, r3, r0
+/* 801D1684 001CD2E4 7C 00 23 78 */ or r0, r0, r4
+/* 801D1688 001CD2E8 90 01 00 08 */ stw r0, 8(r1)
+/* 801D168C 001CD2EC 48 00 00 60 */ b lbl_801D16EC
+lbl_801D1690:
+/* 801D1690 001CD2F0 20 C3 FC 02 */ subfic r6, r3, -1022
+/* 801D1694 001CD2F4 2C 06 00 14 */ cmpwi r6, 0x14
+/* 801D1698 001CD2F8 41 81 00 1C */ bgt lbl_801D16B4
+/* 801D169C 001CD2FC 20 06 00 20 */ subfic r0, r6, 0x20
+/* 801D16A0 001CD300 7C A3 34 30 */ srw r3, r5, r6
+/* 801D16A4 001CD304 7D 20 00 30 */ slw r0, r9, r0
+/* 801D16A8 001CD308 7D 29 36 30 */ sraw r9, r9, r6
+/* 801D16AC 001CD30C 7C 63 03 78 */ or r3, r3, r0
+/* 801D16B0 001CD310 48 00 00 30 */ b lbl_801D16E0
+lbl_801D16B4:
+/* 801D16B4 001CD314 2C 06 00 1F */ cmpwi r6, 0x1f
+/* 801D16B8 001CD318 41 81 00 1C */ bgt lbl_801D16D4
+/* 801D16BC 001CD31C 20 66 00 20 */ subfic r3, r6, 0x20
+/* 801D16C0 001CD320 7C A0 34 30 */ srw r0, r5, r6
+/* 801D16C4 001CD324 7D 23 18 30 */ slw r3, r9, r3
+/* 801D16C8 001CD328 7C 89 23 78 */ mr r9, r4
+/* 801D16CC 001CD32C 7C 63 03 78 */ or r3, r3, r0
+/* 801D16D0 001CD330 48 00 00 10 */ b lbl_801D16E0
+lbl_801D16D4:
+/* 801D16D4 001CD334 38 06 FF E0 */ addi r0, r6, -32
+/* 801D16D8 001CD338 7D 23 06 30 */ sraw r3, r9, r0
+/* 801D16DC 001CD33C 7C 89 23 78 */ mr r9, r4
+lbl_801D16E0:
+/* 801D16E0 001CD340 7D 20 23 78 */ or r0, r9, r4
+/* 801D16E4 001CD344 90 61 00 0C */ stw r3, 0xc(r1)
+/* 801D16E8 001CD348 90 01 00 08 */ stw r0, 8(r1)
+lbl_801D16EC:
+/* 801D16EC 001CD34C C8 21 00 08 */ lfd f1, 8(r1)
+lbl_801D16F0:
+/* 801D16F0 001CD350 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D16F4 001CD354 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_pow.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_pow.s new file mode 100644 index 0000000..0e021ff --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_pow.s @@ -0,0 +1,581 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_pow
+__ieee754_pow:
+/* 801D16F8 001CD358 94 21 FF 40 */ stwu r1, -0xc0(r1)
+/* 801D16FC 001CD35C 7C 08 02 A6 */ mflr r0
+/* 801D1700 001CD360 90 01 00 C4 */ stw r0, 0xc4(r1)
+/* 801D1704 001CD364 DB E1 00 B0 */ stfd f31, 0xb0(r1)
+/* 801D1708 001CD368 F3 E1 00 B8 */ psq_st f31, 184(r1), 0, qr0
+/* 801D170C 001CD36C DB C1 00 A0 */ stfd f30, 0xa0(r1)
+/* 801D1710 001CD370 F3 C1 00 A8 */ psq_st f30, 168(r1), 0, qr0
+/* 801D1714 001CD374 DB A1 00 90 */ stfd f29, 0x90(r1)
+/* 801D1718 001CD378 F3 A1 00 98 */ psq_st f29, 152(r1), 0, qr0
+/* 801D171C 001CD37C DB 81 00 80 */ stfd f28, 0x80(r1)
+/* 801D1720 001CD380 F3 81 00 88 */ psq_st f28, 136(r1), 0, qr0
+/* 801D1724 001CD384 DB 61 00 70 */ stfd f27, 0x70(r1)
+/* 801D1728 001CD388 F3 61 00 78 */ psq_st f27, 120(r1), 0, qr0
+/* 801D172C 001CD38C DB 41 00 60 */ stfd f26, 0x60(r1)
+/* 801D1730 001CD390 F3 41 00 68 */ psq_st f26, 104(r1), 0, qr0
+/* 801D1734 001CD394 D8 41 00 10 */ stfd f2, 0x10(r1)
+/* 801D1738 001CD398 3C 60 80 40 */ lis r3, lbl_803FD338@ha
+/* 801D173C 001CD39C 38 63 D3 38 */ addi r3, r3, lbl_803FD338@l
+/* 801D1740 001CD3A0 80 A1 00 10 */ lwz r5, 0x10(r1)
+/* 801D1744 001CD3A4 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D1748 001CD3A8 81 61 00 14 */ lwz r11, 0x14(r1)
+/* 801D174C 001CD3AC 54 A7 00 7E */ clrlwi r7, r5, 1
+/* 801D1750 001CD3B0 81 21 00 08 */ lwz r9, 8(r1)
+/* 801D1754 001CD3B4 7C E0 5B 79 */ or. r0, r7, r11
+/* 801D1758 001CD3B8 81 41 00 0C */ lwz r10, 0xc(r1)
+/* 801D175C 001CD3BC 55 26 00 7E */ clrlwi r6, r9, 1
+/* 801D1760 001CD3C0 40 82 00 0C */ bne lbl_801D176C
+/* 801D1764 001CD3C4 C8 22 92 F8 */ lfd f1, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1768 001CD3C8 48 00 07 98 */ b lbl_801D1F00
+lbl_801D176C:
+/* 801D176C 001CD3CC 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D1770 001CD3D0 7C 06 00 00 */ cmpw r6, r0
+/* 801D1774 001CD3D4 41 81 00 38 */ bgt lbl_801D17AC
+/* 801D1778 001CD3D8 3C 06 80 10 */ addis r0, r6, 0x8010
+/* 801D177C 001CD3DC 28 00 00 00 */ cmplwi r0, 0
+/* 801D1780 001CD3E0 40 82 00 0C */ bne lbl_801D178C
+/* 801D1784 001CD3E4 2C 0A 00 00 */ cmpwi r10, 0
+/* 801D1788 001CD3E8 40 82 00 24 */ bne lbl_801D17AC
+lbl_801D178C:
+/* 801D178C 001CD3EC 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D1790 001CD3F0 7C 07 00 00 */ cmpw r7, r0
+/* 801D1794 001CD3F4 41 81 00 18 */ bgt lbl_801D17AC
+/* 801D1798 001CD3F8 3C 07 80 10 */ addis r0, r7, 0x8010
+/* 801D179C 001CD3FC 28 00 00 00 */ cmplwi r0, 0
+/* 801D17A0 001CD400 40 82 00 14 */ bne lbl_801D17B4
+/* 801D17A4 001CD404 2C 0B 00 00 */ cmpwi r11, 0
+/* 801D17A8 001CD408 41 82 00 0C */ beq lbl_801D17B4
+lbl_801D17AC:
+/* 801D17AC 001CD40C FC 21 10 2A */ fadd f1, f1, f2
+/* 801D17B0 001CD410 48 00 07 50 */ b lbl_801D1F00
+lbl_801D17B4:
+/* 801D17B4 001CD414 2C 09 00 00 */ cmpwi r9, 0
+/* 801D17B8 001CD418 38 80 00 00 */ li r4, 0
+/* 801D17BC 001CD41C 40 80 00 78 */ bge lbl_801D1834
+/* 801D17C0 001CD420 3C 00 43 40 */ lis r0, 0x4340
+/* 801D17C4 001CD424 7C 07 00 00 */ cmpw r7, r0
+/* 801D17C8 001CD428 41 80 00 0C */ blt lbl_801D17D4
+/* 801D17CC 001CD42C 38 80 00 02 */ li r4, 2
+/* 801D17D0 001CD430 48 00 00 64 */ b lbl_801D1834
+lbl_801D17D4:
+/* 801D17D4 001CD434 3C 00 3F F0 */ lis r0, 0x3ff0
+/* 801D17D8 001CD438 7C 07 00 00 */ cmpw r7, r0
+/* 801D17DC 001CD43C 41 80 00 58 */ blt lbl_801D1834
+/* 801D17E0 001CD440 7C E8 A6 70 */ srawi r8, r7, 0x14
+/* 801D17E4 001CD444 38 08 FC 01 */ addi r0, r8, -1023
+/* 801D17E8 001CD448 2C 00 00 14 */ cmpwi r0, 0x14
+/* 801D17EC 001CD44C 40 81 00 24 */ ble lbl_801D1810
+/* 801D17F0 001CD450 20 00 00 34 */ subfic r0, r0, 0x34
+/* 801D17F4 001CD454 7D 68 04 30 */ srw r8, r11, r0
+/* 801D17F8 001CD458 7D 00 00 30 */ slw r0, r8, r0
+/* 801D17FC 001CD45C 7C 0B 00 40 */ cmplw r11, r0
+/* 801D1800 001CD460 40 82 00 34 */ bne lbl_801D1834
+/* 801D1804 001CD464 55 00 07 FE */ clrlwi r0, r8, 0x1f
+/* 801D1808 001CD468 20 80 00 02 */ subfic r4, r0, 2
+/* 801D180C 001CD46C 48 00 00 28 */ b lbl_801D1834
+lbl_801D1810:
+/* 801D1810 001CD470 2C 0B 00 00 */ cmpwi r11, 0
+/* 801D1814 001CD474 40 82 00 20 */ bne lbl_801D1834
+/* 801D1818 001CD478 20 00 00 14 */ subfic r0, r0, 0x14
+/* 801D181C 001CD47C 7C E8 06 30 */ sraw r8, r7, r0
+/* 801D1820 001CD480 7D 00 00 30 */ slw r0, r8, r0
+/* 801D1824 001CD484 7C 07 00 00 */ cmpw r7, r0
+/* 801D1828 001CD488 40 82 00 0C */ bne lbl_801D1834
+/* 801D182C 001CD48C 55 00 07 FE */ clrlwi r0, r8, 0x1f
+/* 801D1830 001CD490 20 80 00 02 */ subfic r4, r0, 2
+lbl_801D1834:
+/* 801D1834 001CD494 2C 0B 00 00 */ cmpwi r11, 0
+/* 801D1838 001CD498 40 82 00 B0 */ bne lbl_801D18E8
+/* 801D183C 001CD49C 3C 07 80 10 */ addis r0, r7, 0x8010
+/* 801D1840 001CD4A0 28 00 00 00 */ cmplwi r0, 0
+/* 801D1844 001CD4A4 40 82 00 54 */ bne lbl_801D1898
+/* 801D1848 001CD4A8 3C 06 C0 10 */ addis r0, r6, 0xc010
+/* 801D184C 001CD4AC 7C 00 53 79 */ or. r0, r0, r10
+/* 801D1850 001CD4B0 40 82 00 0C */ bne lbl_801D185C
+/* 801D1854 001CD4B4 FC 22 10 28 */ fsub f1, f2, f2
+/* 801D1858 001CD4B8 48 00 06 A8 */ b lbl_801D1F00
+lbl_801D185C:
+/* 801D185C 001CD4BC 3C 00 3F F0 */ lis r0, 0x3ff0
+/* 801D1860 001CD4C0 7C 06 00 00 */ cmpw r6, r0
+/* 801D1864 001CD4C4 41 80 00 1C */ blt lbl_801D1880
+/* 801D1868 001CD4C8 2C 05 00 00 */ cmpwi r5, 0
+/* 801D186C 001CD4CC 41 80 00 0C */ blt lbl_801D1878
+/* 801D1870 001CD4D0 FC 20 10 90 */ fmr f1, f2
+/* 801D1874 001CD4D4 48 00 06 8C */ b lbl_801D1F00
+lbl_801D1878:
+/* 801D1878 001CD4D8 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D187C 001CD4DC 48 00 06 84 */ b lbl_801D1F00
+lbl_801D1880:
+/* 801D1880 001CD4E0 2C 05 00 00 */ cmpwi r5, 0
+/* 801D1884 001CD4E4 40 80 00 0C */ bge lbl_801D1890
+/* 801D1888 001CD4E8 FC 20 10 50 */ fneg f1, f2
+/* 801D188C 001CD4EC 48 00 06 74 */ b lbl_801D1F00
+lbl_801D1890:
+/* 801D1890 001CD4F0 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D1894 001CD4F4 48 00 06 6C */ b lbl_801D1F00
+lbl_801D1898:
+/* 801D1898 001CD4F8 3C 07 C0 10 */ addis r0, r7, 0xc010
+/* 801D189C 001CD4FC 28 00 00 00 */ cmplwi r0, 0
+/* 801D18A0 001CD500 40 82 00 18 */ bne lbl_801D18B8
+/* 801D18A4 001CD504 2C 05 00 00 */ cmpwi r5, 0
+/* 801D18A8 001CD508 40 80 06 58 */ bge lbl_801D1F00
+/* 801D18AC 001CD50C C8 02 92 F8 */ lfd f0, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D18B0 001CD510 FC 20 08 24 */ fdiv f1, f0, f1
+/* 801D18B4 001CD514 48 00 06 4C */ b lbl_801D1F00
+lbl_801D18B8:
+/* 801D18B8 001CD518 3C 05 C0 00 */ addis r0, r5, 0xc000
+/* 801D18BC 001CD51C 28 00 00 00 */ cmplwi r0, 0
+/* 801D18C0 001CD520 40 82 00 0C */ bne lbl_801D18CC
+/* 801D18C4 001CD524 FC 21 00 72 */ fmul f1, f1, f1
+/* 801D18C8 001CD528 48 00 06 38 */ b lbl_801D1F00
+lbl_801D18CC:
+/* 801D18CC 001CD52C 3C 05 C0 20 */ addis r0, r5, 0xc020
+/* 801D18D0 001CD530 28 00 00 00 */ cmplwi r0, 0
+/* 801D18D4 001CD534 40 82 00 14 */ bne lbl_801D18E8
+/* 801D18D8 001CD538 2C 09 00 00 */ cmpwi r9, 0
+/* 801D18DC 001CD53C 41 80 00 0C */ blt lbl_801D18E8
+/* 801D18E0 001CD540 48 00 2F 55 */ bl sqrt
+/* 801D18E4 001CD544 48 00 06 1C */ b lbl_801D1F00
+lbl_801D18E8:
+/* 801D18E8 001CD548 FC 00 0A 10 */ fabs f0, f1
+/* 801D18EC 001CD54C 2C 0A 00 00 */ cmpwi r10, 0
+/* 801D18F0 001CD550 D8 01 00 48 */ stfd f0, 0x48(r1)
+/* 801D18F4 001CD554 40 82 00 78 */ bne lbl_801D196C
+/* 801D18F8 001CD558 3C 06 80 10 */ addis r0, r6, 0x8010
+/* 801D18FC 001CD55C 28 00 00 00 */ cmplwi r0, 0
+/* 801D1900 001CD560 41 82 00 18 */ beq lbl_801D1918
+/* 801D1904 001CD564 2C 06 00 00 */ cmpwi r6, 0
+/* 801D1908 001CD568 41 82 00 10 */ beq lbl_801D1918
+/* 801D190C 001CD56C 3C 06 C0 10 */ addis r0, r6, 0xc010
+/* 801D1910 001CD570 28 00 00 00 */ cmplwi r0, 0
+/* 801D1914 001CD574 40 82 00 58 */ bne lbl_801D196C
+lbl_801D1918:
+/* 801D1918 001CD578 2C 05 00 00 */ cmpwi r5, 0
+/* 801D191C 001CD57C D8 01 00 50 */ stfd f0, 0x50(r1)
+/* 801D1920 001CD580 40 80 00 10 */ bge lbl_801D1930
+/* 801D1924 001CD584 C8 22 92 F8 */ lfd f1, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1928 001CD588 FC 01 00 24 */ fdiv f0, f1, f0
+/* 801D192C 001CD58C D8 01 00 50 */ stfd f0, 0x50(r1)
+lbl_801D1930:
+/* 801D1930 001CD590 2C 09 00 00 */ cmpwi r9, 0
+/* 801D1934 001CD594 40 80 00 30 */ bge lbl_801D1964
+/* 801D1938 001CD598 3C 06 C0 10 */ addis r0, r6, 0xc010
+/* 801D193C 001CD59C 7C 00 23 79 */ or. r0, r0, r4
+/* 801D1940 001CD5A0 40 82 00 14 */ bne lbl_801D1954
+/* 801D1944 001CD5A4 FC 00 00 28 */ fsub f0, f0, f0
+/* 801D1948 001CD5A8 FC 00 00 24 */ fdiv f0, f0, f0
+/* 801D194C 001CD5AC D8 01 00 50 */ stfd f0, 0x50(r1)
+/* 801D1950 001CD5B0 48 00 00 14 */ b lbl_801D1964
+lbl_801D1954:
+/* 801D1954 001CD5B4 2C 04 00 01 */ cmpwi r4, 1
+/* 801D1958 001CD5B8 40 82 00 0C */ bne lbl_801D1964
+/* 801D195C 001CD5BC FC 00 00 50 */ fneg f0, f0
+/* 801D1960 001CD5C0 D8 01 00 50 */ stfd f0, 0x50(r1)
+lbl_801D1964:
+/* 801D1964 001CD5C4 FC 20 00 90 */ fmr f1, f0
+/* 801D1968 001CD5C8 48 00 05 98 */ b lbl_801D1F00
+lbl_801D196C:
+/* 801D196C 001CD5CC 7D 28 FE 70 */ srawi r8, r9, 0x1f
+/* 801D1970 001CD5D0 38 08 00 01 */ addi r0, r8, 1
+/* 801D1974 001CD5D4 7C 08 23 79 */ or. r8, r0, r4
+/* 801D1978 001CD5D8 40 82 00 18 */ bne lbl_801D1990
+/* 801D197C 001CD5DC 38 00 00 21 */ li r0, 0x21
+/* 801D1980 001CD5E0 3C 60 80 64 */ lis r3, lbl_8063D6B8@ha
+/* 801D1984 001CD5E4 90 0D 9F C8 */ stw r0, lbl_8063F288-_SDA_BASE_(r13)
+/* 801D1988 001CD5E8 C0 23 D6 B8 */ lfs f1, lbl_8063D6B8@l(r3)
+/* 801D198C 001CD5EC 48 00 05 74 */ b lbl_801D1F00
+lbl_801D1990:
+/* 801D1990 001CD5F0 3D 00 41 E0 */ lis r8, 0x41e0
+/* 801D1994 001CD5F4 7C 07 40 00 */ cmpw r7, r8
+/* 801D1998 001CD5F8 40 81 01 0C */ ble lbl_801D1AA4
+/* 801D199C 001CD5FC 3C 60 43 F0 */ lis r3, 0x43f0
+/* 801D19A0 001CD600 7C 07 18 00 */ cmpw r7, r3
+/* 801D19A4 001CD604 40 81 00 4C */ ble lbl_801D19F0
+/* 801D19A8 001CD608 3C 60 3F F0 */ lis r3, 0x3FEFFFFF@ha
+/* 801D19AC 001CD60C 38 E3 FF FF */ addi r7, r3, 0x3FEFFFFF@l
+/* 801D19B0 001CD610 7C 06 38 00 */ cmpw r6, r7
+/* 801D19B4 001CD614 41 81 00 1C */ bgt lbl_801D19D0
+/* 801D19B8 001CD618 2C 05 00 00 */ cmpwi r5, 0
+/* 801D19BC 001CD61C 40 80 00 0C */ bge lbl_801D19C8
+/* 801D19C0 001CD620 C8 22 93 08 */ lfd f1, lbl_80641908-_SDA2_BASE_(r2)
+/* 801D19C4 001CD624 48 00 05 3C */ b lbl_801D1F00
+lbl_801D19C8:
+/* 801D19C8 001CD628 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D19CC 001CD62C 48 00 05 34 */ b lbl_801D1F00
+lbl_801D19D0:
+/* 801D19D0 001CD630 7C 06 18 00 */ cmpw r6, r3
+/* 801D19D4 001CD634 41 80 00 1C */ blt lbl_801D19F0
+/* 801D19D8 001CD638 2C 05 00 00 */ cmpwi r5, 0
+/* 801D19DC 001CD63C 40 81 00 0C */ ble lbl_801D19E8
+/* 801D19E0 001CD640 C8 22 93 08 */ lfd f1, lbl_80641908-_SDA2_BASE_(r2)
+/* 801D19E4 001CD644 48 00 05 1C */ b lbl_801D1F00
+lbl_801D19E8:
+/* 801D19E8 001CD648 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D19EC 001CD64C 48 00 05 14 */ b lbl_801D1F00
+lbl_801D19F0:
+/* 801D19F0 001CD650 3C 60 3F F0 */ lis r3, 0x3FEFFFFF@ha
+/* 801D19F4 001CD654 38 E3 FF FF */ addi r7, r3, 0x3FEFFFFF@l
+/* 801D19F8 001CD658 7C 06 38 00 */ cmpw r6, r7
+/* 801D19FC 001CD65C 40 80 00 1C */ bge lbl_801D1A18
+/* 801D1A00 001CD660 2C 05 00 00 */ cmpwi r5, 0
+/* 801D1A04 001CD664 40 80 00 0C */ bge lbl_801D1A10
+/* 801D1A08 001CD668 C8 22 93 08 */ lfd f1, lbl_80641908-_SDA2_BASE_(r2)
+/* 801D1A0C 001CD66C 48 00 04 F4 */ b lbl_801D1F00
+lbl_801D1A10:
+/* 801D1A10 001CD670 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D1A14 001CD674 48 00 04 EC */ b lbl_801D1F00
+lbl_801D1A18:
+/* 801D1A18 001CD678 7C 06 18 00 */ cmpw r6, r3
+/* 801D1A1C 001CD67C 40 81 00 1C */ ble lbl_801D1A38
+/* 801D1A20 001CD680 2C 05 00 00 */ cmpwi r5, 0
+/* 801D1A24 001CD684 40 81 00 0C */ ble lbl_801D1A30
+/* 801D1A28 001CD688 C8 22 93 08 */ lfd f1, lbl_80641908-_SDA2_BASE_(r2)
+/* 801D1A2C 001CD68C 48 00 04 D4 */ b lbl_801D1F00
+lbl_801D1A30:
+/* 801D1A30 001CD690 C8 22 93 00 */ lfd f1, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D1A34 001CD694 48 00 04 CC */ b lbl_801D1F00
+lbl_801D1A38:
+/* 801D1A38 001CD698 C8 62 92 F8 */ lfd f3, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1A3C 001CD69C 38 60 00 00 */ li r3, 0
+/* 801D1A40 001CD6A0 C8 02 93 20 */ lfd f0, lbl_80641920-_SDA2_BASE_(r2)
+/* 801D1A44 001CD6A4 FD 01 18 28 */ fsub f8, f1, f3
+/* 801D1A48 001CD6A8 C8 22 93 30 */ lfd f1, lbl_80641930-_SDA2_BASE_(r2)
+/* 801D1A4C 001CD6AC C8 A2 93 18 */ lfd f5, lbl_80641918-_SDA2_BASE_(r2)
+/* 801D1A50 001CD6B0 C8 62 93 28 */ lfd f3, lbl_80641928-_SDA2_BASE_(r2)
+/* 801D1A54 001CD6B4 FC C0 02 32 */ fmul f6, f0, f8
+/* 801D1A58 001CD6B8 C8 82 93 10 */ lfd f4, lbl_80641910-_SDA2_BASE_(r2)
+/* 801D1A5C 001CD6BC C8 02 93 38 */ lfd f0, lbl_80641938-_SDA2_BASE_(r2)
+/* 801D1A60 001CD6C0 FC E8 02 32 */ fmul f7, f8, f8
+/* 801D1A64 001CD6C4 D9 01 00 28 */ stfd f8, 0x28(r1)
+/* 801D1A68 001CD6C8 FC A5 30 28 */ fsub f5, f5, f6
+/* 801D1A6C 001CD6CC FC C3 02 32 */ fmul f6, f3, f8
+/* 801D1A70 001CD6D0 FC A8 01 72 */ fmul f5, f8, f5
+/* 801D1A74 001CD6D4 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D1A78 001CD6D8 FC 64 28 28 */ fsub f3, f4, f5
+/* 801D1A7C 001CD6DC FC 67 00 F2 */ fmul f3, f7, f3
+/* 801D1A80 001CD6E0 FC 00 00 F2 */ fmul f0, f0, f3
+/* 801D1A84 001CD6E4 FC 21 00 28 */ fsub f1, f1, f0
+/* 801D1A88 001CD6E8 FC 06 08 2A */ fadd f0, f6, f1
+/* 801D1A8C 001CD6EC D8 01 00 30 */ stfd f0, 0x30(r1)
+/* 801D1A90 001CD6F0 90 61 00 34 */ stw r3, 0x34(r1)
+/* 801D1A94 001CD6F4 C8 01 00 30 */ lfd f0, 0x30(r1)
+/* 801D1A98 001CD6F8 FC 00 30 28 */ fsub f0, f0, f6
+/* 801D1A9C 001CD6FC FC 01 00 28 */ fsub f0, f1, f0
+/* 801D1AA0 001CD700 48 00 02 10 */ b lbl_801D1CB0
+lbl_801D1AA4:
+/* 801D1AA4 001CD704 3C A0 00 10 */ lis r5, 0x10
+/* 801D1AA8 001CD708 39 60 00 00 */ li r11, 0
+/* 801D1AAC 001CD70C 7C 06 28 00 */ cmpw r6, r5
+/* 801D1AB0 001CD710 40 80 00 18 */ bge lbl_801D1AC8
+/* 801D1AB4 001CD714 C8 22 93 40 */ lfd f1, lbl_80641940-_SDA2_BASE_(r2)
+/* 801D1AB8 001CD718 39 60 FF CB */ li r11, -53
+/* 801D1ABC 001CD71C FC 00 00 72 */ fmul f0, f0, f1
+/* 801D1AC0 001CD720 D8 01 00 48 */ stfd f0, 0x48(r1)
+/* 801D1AC4 001CD724 80 C1 00 48 */ lwz r6, 0x48(r1)
+lbl_801D1AC8:
+/* 801D1AC8 001CD728 3C A0 00 04 */ lis r5, 0x0003988E@ha
+/* 801D1ACC 001CD72C 54 C8 03 3E */ clrlwi r8, r6, 0xc
+/* 801D1AD0 001CD730 38 A5 98 8E */ addi r5, r5, 0x0003988E@l
+/* 801D1AD4 001CD734 7C C6 A6 70 */ srawi r6, r6, 0x14
+/* 801D1AD8 001CD738 7C 08 28 00 */ cmpw r8, r5
+/* 801D1ADC 001CD73C 65 07 3F F0 */ oris r7, r8, 0x3ff0
+/* 801D1AE0 001CD740 7C AB 32 14 */ add r5, r11, r6
+/* 801D1AE4 001CD744 39 65 FC 01 */ addi r11, r5, -1023
+/* 801D1AE8 001CD748 41 81 00 0C */ bgt lbl_801D1AF4
+/* 801D1AEC 001CD74C 38 C0 00 00 */ li r6, 0
+/* 801D1AF0 001CD750 48 00 00 28 */ b lbl_801D1B18
+lbl_801D1AF4:
+/* 801D1AF4 001CD754 3C A0 00 0C */ lis r5, 0x000BB67A@ha
+/* 801D1AF8 001CD758 38 A5 B6 7A */ addi r5, r5, 0x000BB67A@l
+/* 801D1AFC 001CD75C 7C 08 28 00 */ cmpw r8, r5
+/* 801D1B00 001CD760 40 80 00 0C */ bge lbl_801D1B0C
+/* 801D1B04 001CD764 38 C0 00 01 */ li r6, 1
+/* 801D1B08 001CD768 48 00 00 10 */ b lbl_801D1B18
+lbl_801D1B0C:
+/* 801D1B0C 001CD76C 3C E7 FF F0 */ addis r7, r7, 0xfff0
+/* 801D1B10 001CD770 38 C0 00 00 */ li r6, 0
+/* 801D1B14 001CD774 39 6B 00 01 */ addi r11, r11, 1
+lbl_801D1B18:
+/* 801D1B18 001CD778 90 E1 00 48 */ stw r7, 0x48(r1)
+/* 801D1B1C 001CD77C 7C E9 0E 70 */ srawi r9, r7, 1
+/* 801D1B20 001CD780 54 CA 18 38 */ slwi r10, r6, 3
+/* 801D1B24 001CD784 38 A3 00 00 */ addi r5, r3, 0
+/* 801D1B28 001CD788 7C E5 54 AE */ lfdx f7, r5, r10
+/* 801D1B2C 001CD78C 54 C8 90 1A */ slwi r8, r6, 0x12
+/* 801D1B30 001CD790 C9 41 00 48 */ lfd f10, 0x48(r1)
+/* 801D1B34 001CD794 6D 66 80 00 */ xoris r6, r11, 0x8000
+/* 801D1B38 001CD798 C8 82 93 00 */ lfd f4, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D1B3C 001CD79C 3C A0 43 30 */ lis r5, 0x4330
+/* 801D1B40 001CD7A0 FC 6A 38 2A */ fadd f3, f10, f7
+/* 801D1B44 001CD7A4 C8 22 92 F8 */ lfd f1, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1B48 001CD7A8 FF 4A 38 28 */ fsub f26, f10, f7
+/* 801D1B4C 001CD7AC D8 81 00 18 */ stfd f4, 0x18(r1)
+/* 801D1B50 001CD7B0 65 29 20 00 */ oris r9, r9, 0x2000
+/* 801D1B54 001CD7B4 3D 08 00 08 */ addis r8, r8, 8
+/* 801D1B58 001CD7B8 FC 21 18 24 */ fdiv f1, f1, f3
+/* 801D1B5C 001CD7BC 7D 09 42 14 */ add r8, r9, r8
+/* 801D1B60 001CD7C0 91 01 00 18 */ stw r8, 0x18(r1)
+/* 801D1B64 001CD7C4 39 20 00 00 */ li r9, 0
+/* 801D1B68 001CD7C8 C8 02 93 70 */ lfd f0, lbl_80641970-_SDA2_BASE_(r2)
+/* 801D1B6C 001CD7CC 38 E3 00 20 */ addi r7, r3, 0x20
+/* 801D1B70 001CD7D0 FC 9A 00 72 */ fmul f4, f26, f1
+/* 801D1B74 001CD7D4 C9 21 00 18 */ lfd f9, 0x18(r1)
+/* 801D1B78 001CD7D8 C8 62 93 68 */ lfd f3, lbl_80641968-_SDA2_BASE_(r2)
+/* 801D1B7C 001CD7DC FD 09 38 28 */ fsub f8, f9, f7
+/* 801D1B80 001CD7E0 C8 C2 93 60 */ lfd f6, lbl_80641960-_SDA2_BASE_(r2)
+/* 801D1B84 001CD7E4 90 C1 00 5C */ stw r6, 0x5c(r1)
+/* 801D1B88 001CD7E8 FC A4 01 32 */ fmul f5, f4, f4
+/* 801D1B8C 001CD7EC D8 81 00 20 */ stfd f4, 0x20(r1)
+/* 801D1B90 001CD7F0 CB C2 93 58 */ lfd f30, lbl_80641958-_SDA2_BASE_(r2)
+/* 801D1B94 001CD7F4 FD 6A 40 28 */ fsub f11, f10, f8
+/* 801D1B98 001CD7F8 90 A1 00 58 */ stw r5, 0x58(r1)
+/* 801D1B9C 001CD7FC CB E2 93 50 */ lfd f31, lbl_80641950-_SDA2_BASE_(r2)
+/* 801D1BA0 001CD800 FC E0 01 72 */ fmul f7, f0, f5
+/* 801D1BA4 001CD804 91 21 00 24 */ stw r9, 0x24(r1)
+/* 801D1BA8 001CD808 C9 A2 93 48 */ lfd f13, lbl_80641948-_SDA2_BASE_(r2)
+/* 801D1BAC 001CD80C C8 01 00 20 */ lfd f0, 0x20(r1)
+/* 801D1BB0 001CD810 C9 82 93 78 */ lfd f12, lbl_80641978-_SDA2_BASE_(r2)
+/* 801D1BB4 001CD814 FC E3 38 2A */ fadd f7, f3, f7
+/* 801D1BB8 001CD818 FF 60 02 72 */ fmul f27, f0, f9
+/* 801D1BBC 001CD81C C9 42 93 88 */ lfd f10, lbl_80641988-_SDA2_BASE_(r2)
+/* 801D1BC0 001CD820 C9 22 93 90 */ lfd f9, lbl_80641990-_SDA2_BASE_(r2)
+/* 801D1BC4 001CD824 FD 05 01 F2 */ fmul f8, f5, f7
+/* 801D1BC8 001CD828 C8 E2 94 00 */ lfd f7, lbl_80641A00-_SDA2_BASE_(r2)
+/* 801D1BCC 001CD82C FF 80 02 F2 */ fmul f28, f0, f11
+/* 801D1BD0 001CD830 C9 62 93 80 */ lfd f11, lbl_80641980-_SDA2_BASE_(r2)
+/* 801D1BD4 001CD834 FF A6 40 2A */ fadd f29, f6, f8
+/* 801D1BD8 001CD838 C8 C1 00 58 */ lfd f6, 0x58(r1)
+/* 801D1BDC 001CD83C FF 7A D8 28 */ fsub f27, f26, f27
+/* 801D1BE0 001CD840 7D 07 54 AE */ lfdx f8, r7, r10
+/* 801D1BE4 001CD844 FC C6 38 28 */ fsub f6, f6, f7
+/* 801D1BE8 001CD848 FF A5 07 72 */ fmul f29, f5, f29
+/* 801D1BEC 001CD84C FF 9B E0 28 */ fsub f28, f27, f28
+/* 801D1BF0 001CD850 D8 C1 00 28 */ stfd f6, 0x28(r1)
+/* 801D1BF4 001CD854 FC 60 00 32 */ fmul f3, f0, f0
+/* 801D1BF8 001CD858 FC FE E8 2A */ fadd f7, f30, f29
+/* 801D1BFC 001CD85C FF 41 07 32 */ fmul f26, f1, f28
+/* 801D1C00 001CD860 FC E5 01 F2 */ fmul f7, f5, f7
+/* 801D1C04 001CD864 FF A5 01 72 */ fmul f29, f5, f5
+/* 801D1C08 001CD868 FF FF 38 2A */ fadd f31, f31, f7
+/* 801D1C0C 001CD86C FC 20 20 2A */ fadd f1, f0, f4
+/* 801D1C10 001CD870 FC A5 07 F2 */ fmul f5, f5, f31
+/* 801D1C14 001CD874 FC FA 00 72 */ fmul f7, f26, f1
+/* 801D1C18 001CD878 FC AD 28 2A */ fadd f5, f13, f5
+/* 801D1C1C 001CD87C FC 2C 18 2A */ fadd f1, f12, f3
+/* 801D1C20 001CD880 FD BD 01 72 */ fmul f13, f29, f5
+/* 801D1C24 001CD884 FD AD 38 2A */ fadd f13, f13, f7
+/* 801D1C28 001CD888 FC 21 68 2A */ fadd f1, f1, f13
+/* 801D1C2C 001CD88C D8 21 00 18 */ stfd f1, 0x18(r1)
+/* 801D1C30 001CD890 91 21 00 1C */ stw r9, 0x1c(r1)
+/* 801D1C34 001CD894 C8 E1 00 18 */ lfd f7, 0x18(r1)
+/* 801D1C38 001CD898 FC A7 60 28 */ fsub f5, f7, f12
+/* 801D1C3C 001CD89C FC 3A 01 F2 */ fmul f1, f26, f7
+/* 801D1C40 001CD8A0 FC 65 18 28 */ fsub f3, f5, f3
+/* 801D1C44 001CD8A4 FC A0 01 F2 */ fmul f5, f0, f7
+/* 801D1C48 001CD8A8 FC 0D 18 28 */ fsub f0, f13, f3
+/* 801D1C4C 001CD8AC FC 00 01 32 */ fmul f0, f0, f4
+/* 801D1C50 001CD8B0 FC 81 00 2A */ fadd f4, f1, f0
+/* 801D1C54 001CD8B4 FC 65 20 2A */ fadd f3, f5, f4
+/* 801D1C58 001CD8B8 D8 61 00 40 */ stfd f3, 0x40(r1)
+/* 801D1C5C 001CD8BC 91 21 00 44 */ stw r9, 0x44(r1)
+/* 801D1C60 001CD8C0 C8 61 00 40 */ lfd f3, 0x40(r1)
+/* 801D1C64 001CD8C4 FC 03 28 28 */ fsub f0, f3, f5
+/* 801D1C68 001CD8C8 FC 2A 00 F2 */ fmul f1, f10, f3
+/* 801D1C6C 001CD8CC FC 04 00 28 */ fsub f0, f4, f0
+/* 801D1C70 001CD8D0 FC 6B 00 F2 */ fmul f3, f11, f3
+/* 801D1C74 001CD8D4 FC 09 00 32 */ fmul f0, f9, f0
+/* 801D1C78 001CD8D8 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D1C7C 001CD8DC FC 88 00 2A */ fadd f4, f8, f0
+/* 801D1C80 001CD8E0 38 63 00 10 */ addi r3, r3, 0x10
+/* 801D1C84 001CD8E4 FC 03 20 2A */ fadd f0, f3, f4
+/* 801D1C88 001CD8E8 7C 23 54 AE */ lfdx f1, r3, r10
+/* 801D1C8C 001CD8EC FC 00 08 2A */ fadd f0, f0, f1
+/* 801D1C90 001CD8F0 FC 06 00 2A */ fadd f0, f6, f0
+/* 801D1C94 001CD8F4 D8 01 00 30 */ stfd f0, 0x30(r1)
+/* 801D1C98 001CD8F8 91 21 00 34 */ stw r9, 0x34(r1)
+/* 801D1C9C 001CD8FC C8 01 00 30 */ lfd f0, 0x30(r1)
+/* 801D1CA0 001CD900 FC 00 30 28 */ fsub f0, f0, f6
+/* 801D1CA4 001CD904 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D1CA8 001CD908 FC 00 18 28 */ fsub f0, f0, f3
+/* 801D1CAC 001CD90C FC 04 00 28 */ fsub f0, f4, f0
+lbl_801D1CB0:
+/* 801D1CB0 001CD910 38 64 FF FF */ addi r3, r4, -1
+/* 801D1CB4 001CD914 CB E2 92 F8 */ lfd f31, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1CB8 001CD918 7C 00 1B 79 */ or. r0, r0, r3
+/* 801D1CBC 001CD91C 40 82 00 08 */ bne lbl_801D1CC4
+/* 801D1CC0 001CD920 CB E2 93 98 */ lfd f31, lbl_80641998-_SDA2_BASE_(r2)
+lbl_801D1CC4:
+/* 801D1CC4 001CD924 D8 41 00 38 */ stfd f2, 0x38(r1)
+/* 801D1CC8 001CD928 38 00 00 00 */ li r0, 0
+/* 801D1CCC 001CD92C FC 02 00 32 */ fmul f0, f2, f0
+/* 801D1CD0 001CD930 C8 21 00 30 */ lfd f1, 0x30(r1)
+/* 801D1CD4 001CD934 90 01 00 3C */ stw r0, 0x3c(r1)
+/* 801D1CD8 001CD938 3C 00 40 90 */ lis r0, 0x4090
+/* 801D1CDC 001CD93C C8 61 00 38 */ lfd f3, 0x38(r1)
+/* 801D1CE0 001CD940 FC 42 18 28 */ fsub f2, f2, f3
+/* 801D1CE4 001CD944 FC 63 00 72 */ fmul f3, f3, f1
+/* 801D1CE8 001CD948 FC 21 00 B2 */ fmul f1, f1, f2
+/* 801D1CEC 001CD94C D8 61 00 40 */ stfd f3, 0x40(r1)
+/* 801D1CF0 001CD950 FD 61 00 2A */ fadd f11, f1, f0
+/* 801D1CF4 001CD954 FC 0B 18 2A */ fadd f0, f11, f3
+/* 801D1CF8 001CD958 D8 01 00 50 */ stfd f0, 0x50(r1)
+/* 801D1CFC 001CD95C 80 C1 00 50 */ lwz r6, 0x50(r1)
+/* 801D1D00 001CD960 80 A1 00 54 */ lwz r5, 0x54(r1)
+/* 801D1D04 001CD964 7C 06 00 00 */ cmpw r6, r0
+/* 801D1D08 001CD968 41 80 00 44 */ blt lbl_801D1D4C
+/* 801D1D0C 001CD96C 3C 06 BF 70 */ addis r0, r6, 0xbf70
+/* 801D1D10 001CD970 7C 00 2B 79 */ or. r0, r0, r5
+/* 801D1D14 001CD974 41 82 00 14 */ beq lbl_801D1D28
+/* 801D1D18 001CD978 C8 22 93 A0 */ lfd f1, lbl_806419A0-_SDA2_BASE_(r2)
+/* 801D1D1C 001CD97C FC 01 07 F2 */ fmul f0, f1, f31
+/* 801D1D20 001CD980 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D1D24 001CD984 48 00 01 DC */ b lbl_801D1F00
+lbl_801D1D28:
+/* 801D1D28 001CD988 C8 22 93 A8 */ lfd f1, lbl_806419A8-_SDA2_BASE_(r2)
+/* 801D1D2C 001CD98C FC 00 18 28 */ fsub f0, f0, f3
+/* 801D1D30 001CD990 FC 21 58 2A */ fadd f1, f1, f11
+/* 801D1D34 001CD994 FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D1D38 001CD998 40 81 00 68 */ ble lbl_801D1DA0
+/* 801D1D3C 001CD99C C8 22 93 A0 */ lfd f1, lbl_806419A0-_SDA2_BASE_(r2)
+/* 801D1D40 001CD9A0 FC 01 07 F2 */ fmul f0, f1, f31
+/* 801D1D44 001CD9A4 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D1D48 001CD9A8 48 00 01 B8 */ b lbl_801D1F00
+lbl_801D1D4C:
+/* 801D1D4C 001CD9AC 3C 60 40 91 */ lis r3, 0x4090CC00@ha
+/* 801D1D50 001CD9B0 54 C4 00 7E */ clrlwi r4, r6, 1
+/* 801D1D54 001CD9B4 38 03 CC 00 */ addi r0, r3, 0x4090CC00@l
+/* 801D1D58 001CD9B8 7C 04 00 00 */ cmpw r4, r0
+/* 801D1D5C 001CD9BC 41 80 00 44 */ blt lbl_801D1DA0
+/* 801D1D60 001CD9C0 3C 66 3F 6F */ addis r3, r6, 0x3f6f
+/* 801D1D64 001CD9C4 38 03 34 00 */ addi r0, r3, 0x3400
+/* 801D1D68 001CD9C8 7C 00 2B 79 */ or. r0, r0, r5
+/* 801D1D6C 001CD9CC 41 82 00 14 */ beq lbl_801D1D80
+/* 801D1D70 001CD9D0 C8 22 93 B0 */ lfd f1, lbl_806419B0-_SDA2_BASE_(r2)
+/* 801D1D74 001CD9D4 FC 01 07 F2 */ fmul f0, f1, f31
+/* 801D1D78 001CD9D8 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D1D7C 001CD9DC 48 00 01 84 */ b lbl_801D1F00
+lbl_801D1D80:
+/* 801D1D80 001CD9E0 FC 00 18 28 */ fsub f0, f0, f3
+/* 801D1D84 001CD9E4 FC 0B 00 40 */ fcmpo cr0, f11, f0
+/* 801D1D88 001CD9E8 4C 40 13 82 */ cror 2, 0, 2
+/* 801D1D8C 001CD9EC 40 82 00 14 */ bne lbl_801D1DA0
+/* 801D1D90 001CD9F0 C8 22 93 B0 */ lfd f1, lbl_806419B0-_SDA2_BASE_(r2)
+/* 801D1D94 001CD9F4 FC 01 07 F2 */ fmul f0, f1, f31
+/* 801D1D98 001CD9F8 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D1D9C 001CD9FC 48 00 01 64 */ b lbl_801D1F00
+lbl_801D1DA0:
+/* 801D1DA0 001CDA00 54 C3 00 7E */ clrlwi r3, r6, 1
+/* 801D1DA4 001CDA04 3C 00 3F E0 */ lis r0, 0x3fe0
+/* 801D1DA8 001CDA08 7C 03 00 00 */ cmpw r3, r0
+/* 801D1DAC 001CDA0C 54 C4 65 7E */ rlwinm r4, r6, 0xc, 0x15, 0x1f
+/* 801D1DB0 001CDA10 38 60 00 00 */ li r3, 0
+/* 801D1DB4 001CDA14 40 81 00 60 */ ble lbl_801D1E14
+/* 801D1DB8 001CDA18 3C 60 00 10 */ lis r3, 0x000FFFFF@ha
+/* 801D1DBC 001CDA1C 38 04 FC 02 */ addi r0, r4, -1022
+/* 801D1DC0 001CDA20 7C 60 06 30 */ sraw r0, r3, r0
+/* 801D1DC4 001CDA24 C8 02 93 00 */ lfd f0, lbl_80641900-_SDA2_BASE_(r2)
+/* 801D1DC8 001CDA28 7C E6 02 14 */ add r7, r6, r0
+/* 801D1DCC 001CDA2C 38 63 FF FF */ addi r3, r3, 0x000FFFFF@l
+/* 801D1DD0 001CDA30 54 E0 00 7E */ clrlwi r0, r7, 1
+/* 801D1DD4 001CDA34 D8 01 00 28 */ stfd f0, 0x28(r1)
+/* 801D1DD8 001CDA38 7C 04 A6 70 */ srawi r4, r0, 0x14
+/* 801D1DDC 001CDA3C 2C 06 00 00 */ cmpwi r6, 0
+/* 801D1DE0 001CDA40 38 A4 FC 01 */ addi r5, r4, -1023
+/* 801D1DE4 001CDA44 54 E0 03 3E */ clrlwi r0, r7, 0xc
+/* 801D1DE8 001CDA48 7C 64 2E 30 */ sraw r4, r3, r5
+/* 801D1DEC 001CDA4C 7C E4 20 78 */ andc r4, r7, r4
+/* 801D1DF0 001CDA50 64 03 00 10 */ oris r3, r0, 0x10
+/* 801D1DF4 001CDA54 20 05 00 14 */ subfic r0, r5, 0x14
+/* 801D1DF8 001CDA58 90 81 00 28 */ stw r4, 0x28(r1)
+/* 801D1DFC 001CDA5C 7C 63 06 30 */ sraw r3, r3, r0
+/* 801D1E00 001CDA60 40 80 00 08 */ bge lbl_801D1E08
+/* 801D1E04 001CDA64 7C 63 00 D0 */ neg r3, r3
+lbl_801D1E08:
+/* 801D1E08 001CDA68 C8 01 00 28 */ lfd f0, 0x28(r1)
+/* 801D1E0C 001CDA6C FC 63 00 28 */ fsub f3, f3, f0
+/* 801D1E10 001CDA70 D8 61 00 40 */ stfd f3, 0x40(r1)
+lbl_801D1E14:
+/* 801D1E14 001CDA74 FC 2B 18 2A */ fadd f1, f11, f3
+/* 801D1E18 001CDA78 38 00 00 00 */ li r0, 0
+/* 801D1E1C 001CDA7C C8 02 93 C8 */ lfd f0, lbl_806419C8-_SDA2_BASE_(r2)
+/* 801D1E20 001CDA80 54 64 A0 16 */ slwi r4, r3, 0x14
+/* 801D1E24 001CDA84 C9 02 93 C0 */ lfd f8, lbl_806419C0-_SDA2_BASE_(r2)
+/* 801D1E28 001CDA88 D8 21 00 28 */ stfd f1, 0x28(r1)
+/* 801D1E2C 001CDA8C C9 42 93 B8 */ lfd f10, lbl_806419B8-_SDA2_BASE_(r2)
+/* 801D1E30 001CDA90 90 01 00 2C */ stw r0, 0x2c(r1)
+/* 801D1E34 001CDA94 C8 C2 93 F0 */ lfd f6, lbl_806419F0-_SDA2_BASE_(r2)
+/* 801D1E38 001CDA98 C9 21 00 28 */ lfd f9, 0x28(r1)
+/* 801D1E3C 001CDA9C C8 22 93 E8 */ lfd f1, lbl_806419E8-_SDA2_BASE_(r2)
+/* 801D1E40 001CDAA0 FC 49 18 28 */ fsub f2, f9, f3
+/* 801D1E44 001CDAA4 C8 A2 93 E0 */ lfd f5, lbl_806419E0-_SDA2_BASE_(r2)
+/* 801D1E48 001CDAA8 FC E0 02 72 */ fmul f7, f0, f9
+/* 801D1E4C 001CDAAC C8 82 93 D8 */ lfd f4, lbl_806419D8-_SDA2_BASE_(r2)
+/* 801D1E50 001CDAB0 C8 62 93 D0 */ lfd f3, lbl_806419D0-_SDA2_BASE_(r2)
+/* 801D1E54 001CDAB4 FC 0B 10 28 */ fsub f0, f11, f2
+/* 801D1E58 001CDAB8 FD 4A 02 72 */ fmul f10, f10, f9
+/* 801D1E5C 001CDABC C8 42 93 F8 */ lfd f2, lbl_806419F8-_SDA2_BASE_(r2)
+/* 801D1E60 001CDAC0 FD 08 00 32 */ fmul f8, f8, f0
+/* 801D1E64 001CDAC4 C8 02 92 F8 */ lfd f0, lbl_806418F8-_SDA2_BASE_(r2)
+/* 801D1E68 001CDAC8 FD 68 38 2A */ fadd f11, f8, f7
+/* 801D1E6C 001CDACC FD 2A 58 2A */ fadd f9, f10, f11
+/* 801D1E70 001CDAD0 FC E9 02 72 */ fmul f7, f9, f9
+/* 801D1E74 001CDAD4 FD 09 50 28 */ fsub f8, f9, f10
+/* 801D1E78 001CDAD8 FC C6 01 F2 */ fmul f6, f6, f7
+/* 801D1E7C 001CDADC D8 E1 00 28 */ stfd f7, 0x28(r1)
+/* 801D1E80 001CDAE0 FD 0B 40 28 */ fsub f8, f11, f8
+/* 801D1E84 001CDAE4 FC C1 30 2A */ fadd f6, f1, f6
+/* 801D1E88 001CDAE8 FC 29 02 32 */ fmul f1, f9, f8
+/* 801D1E8C 001CDAEC FC C7 01 B2 */ fmul f6, f7, f6
+/* 801D1E90 001CDAF0 FC 28 08 2A */ fadd f1, f8, f1
+/* 801D1E94 001CDAF4 FC A5 30 2A */ fadd f5, f5, f6
+/* 801D1E98 001CDAF8 FC A7 01 72 */ fmul f5, f7, f5
+/* 801D1E9C 001CDAFC FC 84 28 2A */ fadd f4, f4, f5
+/* 801D1EA0 001CDB00 FC 87 01 32 */ fmul f4, f7, f4
+/* 801D1EA4 001CDB04 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D1EA8 001CDB08 FC 67 00 F2 */ fmul f3, f7, f3
+/* 801D1EAC 001CDB0C FC 89 18 28 */ fsub f4, f9, f3
+/* 801D1EB0 001CDB10 FC 69 01 32 */ fmul f3, f9, f4
+/* 801D1EB4 001CDB14 D8 81 00 30 */ stfd f4, 0x30(r1)
+/* 801D1EB8 001CDB18 FC 44 10 28 */ fsub f2, f4, f2
+/* 801D1EBC 001CDB1C FC 43 10 24 */ fdiv f2, f3, f2
+/* 801D1EC0 001CDB20 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D1EC4 001CDB24 FC 21 48 28 */ fsub f1, f1, f9
+/* 801D1EC8 001CDB28 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D1ECC 001CDB2C D8 21 00 50 */ stfd f1, 0x50(r1)
+/* 801D1ED0 001CDB30 80 01 00 50 */ lwz r0, 0x50(r1)
+/* 801D1ED4 001CDB34 7C 00 22 14 */ add r0, r0, r4
+/* 801D1ED8 001CDB38 7C 00 A6 71 */ srawi. r0, r0, 0x14
+/* 801D1EDC 001CDB3C 41 81 00 10 */ bgt lbl_801D1EEC
+/* 801D1EE0 001CDB40 4B FF EA E1 */ bl scalbn
+/* 801D1EE4 001CDB44 D8 21 00 50 */ stfd f1, 0x50(r1)
+/* 801D1EE8 001CDB48 48 00 00 10 */ b lbl_801D1EF8
+lbl_801D1EEC:
+/* 801D1EEC 001CDB4C 80 01 00 50 */ lwz r0, 0x50(r1)
+/* 801D1EF0 001CDB50 7C 00 22 14 */ add r0, r0, r4
+/* 801D1EF4 001CDB54 90 01 00 50 */ stw r0, 0x50(r1)
+lbl_801D1EF8:
+/* 801D1EF8 001CDB58 C8 01 00 50 */ lfd f0, 0x50(r1)
+/* 801D1EFC 001CDB5C FC 3F 00 32 */ fmul f1, f31, f0
+lbl_801D1F00:
+/* 801D1F00 001CDB60 E3 E1 00 B8 */ psq_l f31, 184(r1), 0, qr0
+/* 801D1F04 001CDB64 CB E1 00 B0 */ lfd f31, 0xb0(r1)
+/* 801D1F08 001CDB68 E3 C1 00 A8 */ psq_l f30, 168(r1), 0, qr0
+/* 801D1F0C 001CDB6C CB C1 00 A0 */ lfd f30, 0xa0(r1)
+/* 801D1F10 001CDB70 E3 A1 00 98 */ psq_l f29, 152(r1), 0, qr0
+/* 801D1F14 001CDB74 CB A1 00 90 */ lfd f29, 0x90(r1)
+/* 801D1F18 001CDB78 E3 81 00 88 */ psq_l f28, 136(r1), 0, qr0
+/* 801D1F1C 001CDB7C CB 81 00 80 */ lfd f28, 0x80(r1)
+/* 801D1F20 001CDB80 E3 61 00 78 */ psq_l f27, 120(r1), 0, qr0
+/* 801D1F24 001CDB84 CB 61 00 70 */ lfd f27, 0x70(r1)
+/* 801D1F28 001CDB88 E3 41 00 68 */ psq_l f26, 104(r1), 0, qr0
+/* 801D1F2C 001CDB8C 80 01 00 C4 */ lwz r0, 0xc4(r1)
+/* 801D1F30 001CDB90 CB 41 00 60 */ lfd f26, 0x60(r1)
+/* 801D1F34 001CDB94 7C 08 03 A6 */ mtlr r0
+/* 801D1F38 001CDB98 38 21 00 C0 */ addi r1, r1, 0xc0
+/* 801D1F3C 001CDB9C 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_rem_pio2.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_rem_pio2.s new file mode 100644 index 0000000..0ee9c7c --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_rem_pio2.s @@ -0,0 +1,251 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_rem_pio2
+__ieee754_rem_pio2:
+/* 801D1F40 001CDBA0 94 21 FF A0 */ stwu r1, -0x60(r1)
+/* 801D1F44 001CDBA4 7C 08 02 A6 */ mflr r0
+/* 801D1F48 001CDBA8 3C 80 3F E9 */ lis r4, 0x3FE921FB@ha
+/* 801D1F4C 001CDBAC 90 01 00 64 */ stw r0, 0x64(r1)
+/* 801D1F50 001CDBB0 38 04 21 FB */ addi r0, r4, 0x3FE921FB@l
+/* 801D1F54 001CDBB4 93 E1 00 5C */ stw r31, 0x5c(r1)
+/* 801D1F58 001CDBB8 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D1F5C 001CDBBC 83 E1 00 08 */ lwz r31, 8(r1)
+/* 801D1F60 001CDBC0 93 C1 00 58 */ stw r30, 0x58(r1)
+/* 801D1F64 001CDBC4 7C 7E 1B 78 */ mr r30, r3
+/* 801D1F68 001CDBC8 57 E6 00 7E */ clrlwi r6, r31, 1
+/* 801D1F6C 001CDBCC 7C 06 00 00 */ cmpw r6, r0
+/* 801D1F70 001CDBD0 41 81 00 18 */ bgt lbl_801D1F88
+/* 801D1F74 001CDBD4 C8 02 94 08 */ lfd f0, lbl_80641A08-_SDA2_BASE_(r2)
+/* 801D1F78 001CDBD8 D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D1F7C 001CDBDC D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D1F80 001CDBE0 38 60 00 00 */ li r3, 0
+/* 801D1F84 001CDBE4 48 00 03 3C */ b lbl_801D22C0
+lbl_801D1F88:
+/* 801D1F88 001CDBE8 3C 80 40 03 */ lis r4, 0x4002D97C@ha
+/* 801D1F8C 001CDBEC 38 04 D9 7C */ addi r0, r4, 0x4002D97C@l
+/* 801D1F90 001CDBF0 7C 06 00 00 */ cmpw r6, r0
+/* 801D1F94 001CDBF4 40 80 00 CC */ bge lbl_801D2060
+/* 801D1F98 001CDBF8 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D1F9C 001CDBFC 40 81 00 64 */ ble lbl_801D2000
+/* 801D1FA0 001CDC00 C8 02 94 10 */ lfd f0, lbl_80641A10-_SDA2_BASE_(r2)
+/* 801D1FA4 001CDC04 3C 06 C0 07 */ addis r0, r6, 0xc007
+/* 801D1FA8 001CDC08 28 00 21 FB */ cmplwi r0, 0x21fb
+/* 801D1FAC 001CDC0C FC 61 00 28 */ fsub f3, f1, f0
+/* 801D1FB0 001CDC10 D8 61 00 10 */ stfd f3, 0x10(r1)
+/* 801D1FB4 001CDC14 41 82 00 20 */ beq lbl_801D1FD4
+/* 801D1FB8 001CDC18 C8 42 94 18 */ lfd f2, lbl_80641A18-_SDA2_BASE_(r2)
+/* 801D1FBC 001CDC1C FC 23 10 28 */ fsub f1, f3, f2
+/* 801D1FC0 001CDC20 FC 03 08 28 */ fsub f0, f3, f1
+/* 801D1FC4 001CDC24 D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D1FC8 001CDC28 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D1FCC 001CDC2C D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D1FD0 001CDC30 48 00 00 28 */ b lbl_801D1FF8
+lbl_801D1FD4:
+/* 801D1FD4 001CDC34 C8 02 94 20 */ lfd f0, lbl_80641A20-_SDA2_BASE_(r2)
+/* 801D1FD8 001CDC38 C8 42 94 28 */ lfd f2, lbl_80641A28-_SDA2_BASE_(r2)
+/* 801D1FDC 001CDC3C FC 03 00 28 */ fsub f0, f3, f0
+/* 801D1FE0 001CDC40 FC 20 10 28 */ fsub f1, f0, f2
+/* 801D1FE4 001CDC44 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D1FE8 001CDC48 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D1FEC 001CDC4C D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D1FF0 001CDC50 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D1FF4 001CDC54 D8 03 00 08 */ stfd f0, 8(r3)
+lbl_801D1FF8:
+/* 801D1FF8 001CDC58 38 60 00 01 */ li r3, 1
+/* 801D1FFC 001CDC5C 48 00 02 C4 */ b lbl_801D22C0
+lbl_801D2000:
+/* 801D2000 001CDC60 C8 02 94 10 */ lfd f0, lbl_80641A10-_SDA2_BASE_(r2)
+/* 801D2004 001CDC64 3C 06 C0 07 */ addis r0, r6, 0xc007
+/* 801D2008 001CDC68 28 00 21 FB */ cmplwi r0, 0x21fb
+/* 801D200C 001CDC6C FC 60 08 2A */ fadd f3, f0, f1
+/* 801D2010 001CDC70 D8 61 00 10 */ stfd f3, 0x10(r1)
+/* 801D2014 001CDC74 41 82 00 20 */ beq lbl_801D2034
+/* 801D2018 001CDC78 C8 42 94 18 */ lfd f2, lbl_80641A18-_SDA2_BASE_(r2)
+/* 801D201C 001CDC7C FC 22 18 2A */ fadd f1, f2, f3
+/* 801D2020 001CDC80 FC 03 08 28 */ fsub f0, f3, f1
+/* 801D2024 001CDC84 D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D2028 001CDC88 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D202C 001CDC8C D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D2030 001CDC90 48 00 00 28 */ b lbl_801D2058
+lbl_801D2034:
+/* 801D2034 001CDC94 C8 02 94 20 */ lfd f0, lbl_80641A20-_SDA2_BASE_(r2)
+/* 801D2038 001CDC98 C8 42 94 28 */ lfd f2, lbl_80641A28-_SDA2_BASE_(r2)
+/* 801D203C 001CDC9C FC 03 00 2A */ fadd f0, f3, f0
+/* 801D2040 001CDCA0 FC 22 00 2A */ fadd f1, f2, f0
+/* 801D2044 001CDCA4 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D2048 001CDCA8 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D204C 001CDCAC D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D2050 001CDCB0 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D2054 001CDCB4 D8 03 00 08 */ stfd f0, 8(r3)
+lbl_801D2058:
+/* 801D2058 001CDCB8 38 60 FF FF */ li r3, -1
+/* 801D205C 001CDCBC 48 00 02 64 */ b lbl_801D22C0
+lbl_801D2060:
+/* 801D2060 001CDCC0 3C 80 41 39 */ lis r4, 0x413921FB@ha
+/* 801D2064 001CDCC4 38 04 21 FB */ addi r0, r4, 0x413921FB@l
+/* 801D2068 001CDCC8 7C 06 00 00 */ cmpw r6, r0
+/* 801D206C 001CDCCC 41 81 01 48 */ bgt lbl_801D21B4
+/* 801D2070 001CDCD0 FC A0 0A 10 */ fabs f5, f1
+/* 801D2074 001CDCD4 C8 02 94 38 */ lfd f0, lbl_80641A38-_SDA2_BASE_(r2)
+/* 801D2078 001CDCD8 3C 00 43 30 */ lis r0, 0x4330
+/* 801D207C 001CDCDC C8 42 94 30 */ lfd f2, lbl_80641A30-_SDA2_BASE_(r2)
+/* 801D2080 001CDCE0 90 01 00 38 */ stw r0, 0x38(r1)
+/* 801D2084 001CDCE4 FC 80 01 72 */ fmul f4, f0, f5
+/* 801D2088 001CDCE8 C8 62 94 58 */ lfd f3, lbl_80641A58-_SDA2_BASE_(r2)
+/* 801D208C 001CDCEC C8 22 94 10 */ lfd f1, lbl_80641A10-_SDA2_BASE_(r2)
+/* 801D2090 001CDCF0 C8 02 94 18 */ lfd f0, lbl_80641A18-_SDA2_BASE_(r2)
+/* 801D2094 001CDCF4 FC 42 20 2A */ fadd f2, f2, f4
+/* 801D2098 001CDCF8 FC 40 10 1E */ fctiwz f2, f2
+/* 801D209C 001CDCFC D8 41 00 30 */ stfd f2, 0x30(r1)
+/* 801D20A0 001CDD00 80 A1 00 34 */ lwz r5, 0x34(r1)
+/* 801D20A4 001CDD04 6C A0 80 00 */ xoris r0, r5, 0x8000
+/* 801D20A8 001CDD08 2C 05 00 20 */ cmpwi r5, 0x20
+/* 801D20AC 001CDD0C 90 01 00 3C */ stw r0, 0x3c(r1)
+/* 801D20B0 001CDD10 C8 41 00 38 */ lfd f2, 0x38(r1)
+/* 801D20B4 001CDD14 FC C2 18 28 */ fsub f6, f2, f3
+/* 801D20B8 001CDD18 FC 21 01 B2 */ fmul f1, f1, f6
+/* 801D20BC 001CDD1C FC 40 01 B2 */ fmul f2, f0, f6
+/* 801D20C0 001CDD20 FC 85 08 28 */ fsub f4, f5, f1
+/* 801D20C4 001CDD24 40 80 00 2C */ bge lbl_801D20F0
+/* 801D20C8 001CDD28 38 05 FF FF */ addi r0, r5, -1
+/* 801D20CC 001CDD2C 3C 80 80 40 */ lis r4, lbl_803FD470@ha
+/* 801D20D0 001CDD30 54 00 10 3A */ slwi r0, r0, 2
+/* 801D20D4 001CDD34 38 84 D4 70 */ addi r4, r4, lbl_803FD470@l
+/* 801D20D8 001CDD38 7C 04 00 2E */ lwzx r0, r4, r0
+/* 801D20DC 001CDD3C 7C 06 00 00 */ cmpw r6, r0
+/* 801D20E0 001CDD40 41 82 00 10 */ beq lbl_801D20F0
+/* 801D20E4 001CDD44 FC 04 10 28 */ fsub f0, f4, f2
+/* 801D20E8 001CDD48 D8 03 00 00 */ stfd f0, 0(r3)
+/* 801D20EC 001CDD4C 48 00 00 90 */ b lbl_801D217C
+lbl_801D20F0:
+/* 801D20F0 001CDD50 FC 04 10 28 */ fsub f0, f4, f2
+/* 801D20F4 001CDD54 7C C4 A6 70 */ srawi r4, r6, 0x14
+/* 801D20F8 001CDD58 D8 03 00 00 */ stfd f0, 0(r3)
+/* 801D20FC 001CDD5C 80 03 00 00 */ lwz r0, 0(r3)
+/* 801D2100 001CDD60 54 00 65 7E */ rlwinm r0, r0, 0xc, 0x15, 0x1f
+/* 801D2104 001CDD64 7C 00 20 50 */ subf r0, r0, r4
+/* 801D2108 001CDD68 2C 00 00 10 */ cmpwi r0, 0x10
+/* 801D210C 001CDD6C 40 81 00 70 */ ble lbl_801D217C
+/* 801D2110 001CDD70 C8 22 94 20 */ lfd f1, lbl_80641A20-_SDA2_BASE_(r2)
+/* 801D2114 001CDD74 FC 40 20 90 */ fmr f2, f4
+/* 801D2118 001CDD78 C8 02 94 28 */ lfd f0, lbl_80641A28-_SDA2_BASE_(r2)
+/* 801D211C 001CDD7C FC 61 01 B2 */ fmul f3, f1, f6
+/* 801D2120 001CDD80 FC 20 01 B2 */ fmul f1, f0, f6
+/* 801D2124 001CDD84 FC 84 18 28 */ fsub f4, f4, f3
+/* 801D2128 001CDD88 FC 02 20 28 */ fsub f0, f2, f4
+/* 801D212C 001CDD8C FC 00 18 28 */ fsub f0, f0, f3
+/* 801D2130 001CDD90 FC 41 00 28 */ fsub f2, f1, f0
+/* 801D2134 001CDD94 FC 04 10 28 */ fsub f0, f4, f2
+/* 801D2138 001CDD98 D8 03 00 00 */ stfd f0, 0(r3)
+/* 801D213C 001CDD9C 80 03 00 00 */ lwz r0, 0(r3)
+/* 801D2140 001CDDA0 54 00 65 7E */ rlwinm r0, r0, 0xc, 0x15, 0x1f
+/* 801D2144 001CDDA4 7C 00 20 50 */ subf r0, r0, r4
+/* 801D2148 001CDDA8 2C 00 00 31 */ cmpwi r0, 0x31
+/* 801D214C 001CDDAC 40 81 00 30 */ ble lbl_801D217C
+/* 801D2150 001CDDB0 C8 22 94 40 */ lfd f1, lbl_80641A40-_SDA2_BASE_(r2)
+/* 801D2154 001CDDB4 FC 40 20 90 */ fmr f2, f4
+/* 801D2158 001CDDB8 C8 02 94 48 */ lfd f0, lbl_80641A48-_SDA2_BASE_(r2)
+/* 801D215C 001CDDBC FC 61 01 B2 */ fmul f3, f1, f6
+/* 801D2160 001CDDC0 FC 20 01 B2 */ fmul f1, f0, f6
+/* 801D2164 001CDDC4 FC 84 18 28 */ fsub f4, f4, f3
+/* 801D2168 001CDDC8 FC 02 20 28 */ fsub f0, f2, f4
+/* 801D216C 001CDDCC FC 00 18 28 */ fsub f0, f0, f3
+/* 801D2170 001CDDD0 FC 41 00 28 */ fsub f2, f1, f0
+/* 801D2174 001CDDD4 FC 04 10 28 */ fsub f0, f4, f2
+/* 801D2178 001CDDD8 D8 03 00 00 */ stfd f0, 0(r3)
+lbl_801D217C:
+/* 801D217C 001CDDDC C8 23 00 00 */ lfd f1, 0(r3)
+/* 801D2180 001CDDE0 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D2184 001CDDE4 FC 04 08 28 */ fsub f0, f4, f1
+/* 801D2188 001CDDE8 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D218C 001CDDEC D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D2190 001CDDF0 40 80 00 1C */ bge lbl_801D21AC
+/* 801D2194 001CDDF4 FC 20 08 50 */ fneg f1, f1
+/* 801D2198 001CDDF8 FC 00 00 50 */ fneg f0, f0
+/* 801D219C 001CDDFC D8 23 00 00 */ stfd f1, 0(r3)
+/* 801D21A0 001CDE00 D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D21A4 001CDE04 7C 65 00 D0 */ neg r3, r5
+/* 801D21A8 001CDE08 48 00 01 18 */ b lbl_801D22C0
+lbl_801D21AC:
+/* 801D21AC 001CDE0C 7C A3 2B 78 */ mr r3, r5
+/* 801D21B0 001CDE10 48 00 01 10 */ b lbl_801D22C0
+lbl_801D21B4:
+/* 801D21B4 001CDE14 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D21B8 001CDE18 7C 06 00 00 */ cmpw r6, r0
+/* 801D21BC 001CDE1C 41 80 00 18 */ blt lbl_801D21D4
+/* 801D21C0 001CDE20 FC 01 08 28 */ fsub f0, f1, f1
+/* 801D21C4 001CDE24 D8 03 00 08 */ stfd f0, 8(r3)
+/* 801D21C8 001CDE28 D8 03 00 00 */ stfd f0, 0(r3)
+/* 801D21CC 001CDE2C 38 60 00 00 */ li r3, 0
+/* 801D21D0 001CDE30 48 00 00 F0 */ b lbl_801D22C0
+lbl_801D21D4:
+/* 801D21D4 001CDE34 7C C3 A6 70 */ srawi r3, r6, 0x14
+/* 801D21D8 001CDE38 3C 00 43 30 */ lis r0, 0x4330
+/* 801D21DC 001CDE3C 38 A3 FB EA */ addi r5, r3, -1046
+/* 801D21E0 001CDE40 80 81 00 0C */ lwz r4, 0xc(r1)
+/* 801D21E4 001CDE44 54 A3 A0 16 */ slwi r3, r5, 0x14
+/* 801D21E8 001CDE48 90 01 00 30 */ stw r0, 0x30(r1)
+/* 801D21EC 001CDE4C 7C 63 30 50 */ subf r3, r3, r6
+/* 801D21F0 001CDE50 C8 A2 94 58 */ lfd f5, lbl_80641A58-_SDA2_BASE_(r2)
+/* 801D21F4 001CDE54 90 81 00 14 */ stw r4, 0x14(r1)
+/* 801D21F8 001CDE58 38 81 00 30 */ addi r4, r1, 0x30
+/* 801D21FC 001CDE5C C8 82 94 50 */ lfd f4, lbl_80641A50-_SDA2_BASE_(r2)
+/* 801D2200 001CDE60 38 C0 00 03 */ li r6, 3
+/* 801D2204 001CDE64 90 61 00 10 */ stw r3, 0x10(r1)
+/* 801D2208 001CDE68 C8 22 94 08 */ lfd f1, lbl_80641A08-_SDA2_BASE_(r2)
+/* 801D220C 001CDE6C C8 61 00 10 */ lfd f3, 0x10(r1)
+/* 801D2210 001CDE70 90 01 00 48 */ stw r0, 0x48(r1)
+/* 801D2214 001CDE74 FC 00 18 1E */ fctiwz f0, f3
+/* 801D2218 001CDE78 D8 01 00 38 */ stfd f0, 0x38(r1)
+/* 801D221C 001CDE7C 80 01 00 3C */ lwz r0, 0x3c(r1)
+/* 801D2220 001CDE80 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D2224 001CDE84 90 01 00 34 */ stw r0, 0x34(r1)
+/* 801D2228 001CDE88 C8 01 00 30 */ lfd f0, 0x30(r1)
+/* 801D222C 001CDE8C FC 40 28 28 */ fsub f2, f0, f5
+/* 801D2230 001CDE90 FC 03 10 28 */ fsub f0, f3, f2
+/* 801D2234 001CDE94 D8 41 00 18 */ stfd f2, 0x18(r1)
+/* 801D2238 001CDE98 FC 64 00 32 */ fmul f3, f4, f0
+/* 801D223C 001CDE9C FC 00 18 1E */ fctiwz f0, f3
+/* 801D2240 001CDEA0 D8 01 00 40 */ stfd f0, 0x40(r1)
+/* 801D2244 001CDEA4 80 01 00 44 */ lwz r0, 0x44(r1)
+/* 801D2248 001CDEA8 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D224C 001CDEAC 90 01 00 4C */ stw r0, 0x4c(r1)
+/* 801D2250 001CDEB0 C8 01 00 48 */ lfd f0, 0x48(r1)
+/* 801D2254 001CDEB4 FC 40 28 28 */ fsub f2, f0, f5
+/* 801D2258 001CDEB8 FC 03 10 28 */ fsub f0, f3, f2
+/* 801D225C 001CDEBC D8 41 00 20 */ stfd f2, 0x20(r1)
+/* 801D2260 001CDEC0 FC 04 00 32 */ fmul f0, f4, f0
+/* 801D2264 001CDEC4 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D2268 001CDEC8 D8 01 00 28 */ stfd f0, 0x28(r1)
+/* 801D226C 001CDECC 48 00 00 0C */ b lbl_801D2278
+lbl_801D2270:
+/* 801D2270 001CDED0 38 84 FF F8 */ addi r4, r4, -8
+/* 801D2274 001CDED4 38 C6 FF FF */ addi r6, r6, -1
+lbl_801D2278:
+/* 801D2278 001CDED8 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D227C 001CDEDC FC 01 00 00 */ fcmpu cr0, f1, f0
+/* 801D2280 001CDEE0 41 82 FF F0 */ beq lbl_801D2270
+/* 801D2284 001CDEE4 3D 00 80 40 */ lis r8, lbl_803FD368@ha
+/* 801D2288 001CDEE8 7F C4 F3 78 */ mr r4, r30
+/* 801D228C 001CDEEC 38 61 00 18 */ addi r3, r1, 0x18
+/* 801D2290 001CDEF0 38 E0 00 02 */ li r7, 2
+/* 801D2294 001CDEF4 39 08 D3 68 */ addi r8, r8, lbl_803FD368@l
+/* 801D2298 001CDEF8 48 00 01 51 */ bl __kernel_rem_pio2
+/* 801D229C 001CDEFC 2C 1F 00 00 */ cmpwi r31, 0
+/* 801D22A0 001CDF00 40 80 00 20 */ bge lbl_801D22C0
+/* 801D22A4 001CDF04 C8 3E 00 00 */ lfd f1, 0(r30)
+/* 801D22A8 001CDF08 7C 63 00 D0 */ neg r3, r3
+/* 801D22AC 001CDF0C C8 1E 00 08 */ lfd f0, 8(r30)
+/* 801D22B0 001CDF10 FC 20 08 50 */ fneg f1, f1
+/* 801D22B4 001CDF14 FC 00 00 50 */ fneg f0, f0
+/* 801D22B8 001CDF18 D8 3E 00 00 */ stfd f1, 0(r30)
+/* 801D22BC 001CDF1C D8 1E 00 08 */ stfd f0, 8(r30)
+lbl_801D22C0:
+/* 801D22C0 001CDF20 80 01 00 64 */ lwz r0, 0x64(r1)
+/* 801D22C4 001CDF24 83 E1 00 5C */ lwz r31, 0x5c(r1)
+/* 801D22C8 001CDF28 83 C1 00 58 */ lwz r30, 0x58(r1)
+/* 801D22CC 001CDF2C 7C 08 03 A6 */ mtlr r0
+/* 801D22D0 001CDF30 38 21 00 60 */ addi r1, r1, 0x60
+/* 801D22D4 001CDF34 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/e_sqrt.s b/asm/MSL_C/MSL_Common_Embedded/Math/e_sqrt.s new file mode 100644 index 0000000..d86b67f --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/e_sqrt.s @@ -0,0 +1,176 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ieee754_sqrt
+__ieee754_sqrt:
+/* 801D45E8 001D0248 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D45EC 001D024C D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D45F0 001D0250 80 C1 00 08 */ lwz r6, 8(r1)
+/* 801D45F4 001D0254 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D45F8 001D0258 54 C3 00 56 */ rlwinm r3, r6, 0, 1, 0xb
+/* 801D45FC 001D025C 3C 63 80 10 */ addis r3, r3, 0x8010
+/* 801D4600 001D0260 28 03 00 00 */ cmplwi r3, 0
+/* 801D4604 001D0264 40 82 00 18 */ bne lbl_801D461C
+/* 801D4608 001D0268 FC 01 00 72 */ fmul f0, f1, f1
+/* 801D460C 001D026C 38 00 00 21 */ li r0, 0x21
+/* 801D4610 001D0270 90 0D 9F C8 */ stw r0, lbl_8063F288-_SDA_BASE_(r13)
+/* 801D4614 001D0274 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D4618 001D0278 48 00 02 10 */ b lbl_801D4828
+lbl_801D461C:
+/* 801D461C 001D027C 2C 86 00 00 */ cmpwi cr1, r6, 0
+/* 801D4620 001D0280 41 85 00 2C */ bgt cr1, lbl_801D464C
+/* 801D4624 001D0284 54 C3 00 7E */ clrlwi r3, r6, 1
+/* 801D4628 001D0288 7C 03 1B 79 */ or. r3, r0, r3
+/* 801D462C 001D028C 40 82 00 08 */ bne lbl_801D4634
+/* 801D4630 001D0290 48 00 01 F8 */ b lbl_801D4828
+lbl_801D4634:
+/* 801D4634 001D0294 40 84 00 18 */ bge cr1, lbl_801D464C
+/* 801D4638 001D0298 38 00 00 21 */ li r0, 0x21
+/* 801D463C 001D029C 3C 60 80 64 */ lis r3, lbl_8063D6B8@ha
+/* 801D4640 001D02A0 90 0D 9F C8 */ stw r0, lbl_8063F288-_SDA_BASE_(r13)
+/* 801D4644 001D02A4 C0 23 D6 B8 */ lfs f1, lbl_8063D6B8@l(r3)
+/* 801D4648 001D02A8 48 00 01 E0 */ b lbl_801D4828
+lbl_801D464C:
+/* 801D464C 001D02AC 7C C3 A6 71 */ srawi. r3, r6, 0x14
+/* 801D4650 001D02B0 40 82 00 50 */ bne lbl_801D46A0
+/* 801D4654 001D02B4 48 00 00 14 */ b lbl_801D4668
+lbl_801D4658:
+/* 801D4658 001D02B8 54 04 AA FE */ srwi r4, r0, 0xb
+/* 801D465C 001D02BC 54 00 A8 14 */ slwi r0, r0, 0x15
+/* 801D4660 001D02C0 7C C6 23 78 */ or r6, r6, r4
+/* 801D4664 001D02C4 38 63 FF EB */ addi r3, r3, -21
+lbl_801D4668:
+/* 801D4668 001D02C8 2C 06 00 00 */ cmpwi r6, 0
+/* 801D466C 001D02CC 41 82 FF EC */ beq lbl_801D4658
+/* 801D4670 001D02D0 38 E0 00 00 */ li r7, 0
+/* 801D4674 001D02D4 48 00 00 0C */ b lbl_801D4680
+lbl_801D4678:
+/* 801D4678 001D02D8 54 C6 08 3C */ slwi r6, r6, 1
+/* 801D467C 001D02DC 38 E7 00 01 */ addi r7, r7, 1
+lbl_801D4680:
+/* 801D4680 001D02E0 54 C4 02 D7 */ rlwinm. r4, r6, 0, 0xb, 0xb
+/* 801D4684 001D02E4 41 82 FF F4 */ beq lbl_801D4678
+/* 801D4688 001D02E8 20 87 00 20 */ subfic r4, r7, 0x20
+/* 801D468C 001D02EC 38 A7 FF FF */ addi r5, r7, -1
+/* 801D4690 001D02F0 7C 04 24 30 */ srw r4, r0, r4
+/* 801D4694 001D02F4 7C 00 38 30 */ slw r0, r0, r7
+/* 801D4698 001D02F8 7C 65 18 50 */ subf r3, r5, r3
+/* 801D469C 001D02FC 7C C6 23 78 */ or r6, r6, r4
+lbl_801D46A0:
+/* 801D46A0 001D0300 38 83 FC 01 */ addi r4, r3, -1023
+/* 801D46A4 001D0304 54 C5 03 3E */ clrlwi r5, r6, 0xc
+/* 801D46A8 001D0308 54 84 07 FF */ clrlwi. r4, r4, 0x1f
+/* 801D46AC 001D030C 64 A6 00 10 */ oris r6, r5, 0x10
+/* 801D46B0 001D0310 41 82 00 14 */ beq lbl_801D46C4
+/* 801D46B4 001D0314 54 05 0F FE */ srwi r5, r0, 0x1f
+/* 801D46B8 001D0318 7C 86 32 14 */ add r4, r6, r6
+/* 801D46BC 001D031C 7C C5 22 14 */ add r6, r5, r4
+/* 801D46C0 001D0320 7C 00 02 14 */ add r0, r0, r0
+lbl_801D46C4:
+/* 801D46C4 001D0324 54 05 0F FE */ srwi r5, r0, 0x1f
+/* 801D46C8 001D0328 7C 86 32 14 */ add r4, r6, r6
+/* 801D46CC 001D032C 7C C5 22 14 */ add r6, r5, r4
+/* 801D46D0 001D0330 7C 00 02 14 */ add r0, r0, r0
+/* 801D46D4 001D0334 39 20 00 00 */ li r9, 0
+/* 801D46D8 001D0338 39 60 00 00 */ li r11, 0
+/* 801D46DC 001D033C 39 40 00 00 */ li r10, 0
+/* 801D46E0 001D0340 39 80 00 00 */ li r12, 0
+/* 801D46E4 001D0344 3C E0 00 20 */ lis r7, 0x20
+/* 801D46E8 001D0348 48 00 00 30 */ b lbl_801D4718
+lbl_801D46EC:
+/* 801D46EC 001D034C 7C 8B 3A 14 */ add r4, r11, r7
+/* 801D46F0 001D0350 7C 04 30 00 */ cmpw r4, r6
+/* 801D46F4 001D0354 41 81 00 10 */ bgt lbl_801D4704
+/* 801D46F8 001D0358 7D 64 3A 14 */ add r11, r4, r7
+/* 801D46FC 001D035C 7C C4 30 50 */ subf r6, r4, r6
+/* 801D4700 001D0360 7D 8C 3A 14 */ add r12, r12, r7
+lbl_801D4704:
+/* 801D4704 001D0364 54 05 0F FE */ srwi r5, r0, 0x1f
+/* 801D4708 001D0368 7C 86 32 14 */ add r4, r6, r6
+/* 801D470C 001D036C 7C C5 22 14 */ add r6, r5, r4
+/* 801D4710 001D0370 7C 00 02 14 */ add r0, r0, r0
+/* 801D4714 001D0374 54 E7 F8 7E */ srwi r7, r7, 1
+lbl_801D4718:
+/* 801D4718 001D0378 2C 07 00 00 */ cmpwi r7, 0
+/* 801D471C 001D037C 40 82 FF D0 */ bne lbl_801D46EC
+/* 801D4720 001D0380 3C E0 80 00 */ lis r7, 0x8000
+/* 801D4724 001D0384 48 00 00 6C */ b lbl_801D4790
+lbl_801D4728:
+/* 801D4728 001D0388 7C 0B 30 00 */ cmpw r11, r6
+/* 801D472C 001D038C 7D 65 5B 78 */ mr r5, r11
+/* 801D4730 001D0390 7D 09 3A 14 */ add r8, r9, r7
+/* 801D4734 001D0394 41 80 00 10 */ blt lbl_801D4744
+/* 801D4738 001D0398 40 82 00 44 */ bne lbl_801D477C
+/* 801D473C 001D039C 7C 08 00 40 */ cmplw r8, r0
+/* 801D4740 001D03A0 41 81 00 3C */ bgt lbl_801D477C
+lbl_801D4744:
+/* 801D4744 001D03A4 55 04 00 00 */ rlwinm r4, r8, 0, 0, 0
+/* 801D4748 001D03A8 7D 28 3A 14 */ add r9, r8, r7
+/* 801D474C 001D03AC 3C 84 80 00 */ addis r4, r4, 0x8000
+/* 801D4750 001D03B0 28 04 00 00 */ cmplwi r4, 0
+/* 801D4754 001D03B4 40 82 00 10 */ bne lbl_801D4764
+/* 801D4758 001D03B8 55 24 00 01 */ rlwinm. r4, r9, 0, 0, 0
+/* 801D475C 001D03BC 40 82 00 08 */ bne lbl_801D4764
+/* 801D4760 001D03C0 39 6B 00 01 */ addi r11, r11, 1
+lbl_801D4764:
+/* 801D4764 001D03C4 7C 00 40 40 */ cmplw r0, r8
+/* 801D4768 001D03C8 7C C5 30 50 */ subf r6, r5, r6
+/* 801D476C 001D03CC 40 80 00 08 */ bge lbl_801D4774
+/* 801D4770 001D03D0 38 C6 FF FF */ addi r6, r6, -1
+lbl_801D4774:
+/* 801D4774 001D03D4 7C 08 00 50 */ subf r0, r8, r0
+/* 801D4778 001D03D8 7D 4A 3A 14 */ add r10, r10, r7
+lbl_801D477C:
+/* 801D477C 001D03DC 54 05 0F FE */ srwi r5, r0, 0x1f
+/* 801D4780 001D03E0 7C 86 32 14 */ add r4, r6, r6
+/* 801D4784 001D03E4 7C C5 22 14 */ add r6, r5, r4
+/* 801D4788 001D03E8 7C 00 02 14 */ add r0, r0, r0
+/* 801D478C 001D03EC 54 E7 F8 7E */ srwi r7, r7, 1
+lbl_801D4790:
+/* 801D4790 001D03F0 2C 07 00 00 */ cmpwi r7, 0
+/* 801D4794 001D03F4 40 82 FF 94 */ bne lbl_801D4728
+/* 801D4798 001D03F8 7C C0 03 79 */ or. r0, r6, r0
+/* 801D479C 001D03FC 41 82 00 58 */ beq lbl_801D47F4
+/* 801D47A0 001D0400 C8 02 95 D8 */ lfd f0, lbl_80641BD8-_SDA2_BASE_(r2)
+/* 801D47A4 001D0404 FC 00 00 40 */ fcmpo cr0, f0, f0
+/* 801D47A8 001D0408 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D47AC 001D040C 4C 41 13 82 */ cror 2, 1, 2
+/* 801D47B0 001D0410 40 82 00 44 */ bne lbl_801D47F4
+/* 801D47B4 001D0414 3C 0A 00 01 */ addis r0, r10, 1
+/* 801D47B8 001D0418 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D47BC 001D041C 28 00 FF FF */ cmplwi r0, 0xffff
+/* 801D47C0 001D0420 40 82 00 10 */ bne lbl_801D47D0
+/* 801D47C4 001D0424 39 40 00 00 */ li r10, 0
+/* 801D47C8 001D0428 39 8C 00 01 */ addi r12, r12, 1
+/* 801D47CC 001D042C 48 00 00 28 */ b lbl_801D47F4
+lbl_801D47D0:
+/* 801D47D0 001D0430 FC 00 00 40 */ fcmpo cr0, f0, f0
+/* 801D47D4 001D0434 40 81 00 18 */ ble lbl_801D47EC
+/* 801D47D8 001D0438 28 00 FF FE */ cmplwi r0, 0xfffe
+/* 801D47DC 001D043C 40 82 00 08 */ bne lbl_801D47E4
+/* 801D47E0 001D0440 39 8C 00 01 */ addi r12, r12, 1
+lbl_801D47E4:
+/* 801D47E4 001D0444 39 4A 00 02 */ addi r10, r10, 2
+/* 801D47E8 001D0448 48 00 00 0C */ b lbl_801D47F4
+lbl_801D47EC:
+/* 801D47EC 001D044C 55 40 07 FE */ clrlwi r0, r10, 0x1f
+/* 801D47F0 001D0450 7D 4A 02 14 */ add r10, r10, r0
+lbl_801D47F4:
+/* 801D47F4 001D0454 55 80 07 FE */ clrlwi r0, r12, 0x1f
+/* 801D47F8 001D0458 7D 84 0E 70 */ srawi r4, r12, 1
+/* 801D47FC 001D045C 2C 00 00 01 */ cmpwi r0, 1
+/* 801D4800 001D0460 55 45 F8 7E */ srwi r5, r10, 1
+/* 801D4804 001D0464 3C 84 3F E0 */ addis r4, r4, 0x3fe0
+/* 801D4808 001D0468 40 82 00 08 */ bne lbl_801D4810
+/* 801D480C 001D046C 64 A5 80 00 */ oris r5, r5, 0x8000
+lbl_801D4810:
+/* 801D4810 001D0470 38 03 FC 01 */ addi r0, r3, -1023
+/* 801D4814 001D0474 90 A1 00 14 */ stw r5, 0x14(r1)
+/* 801D4818 001D0478 54 00 98 16 */ rlwinm r0, r0, 0x13, 0, 0xb
+/* 801D481C 001D047C 7C 84 02 14 */ add r4, r4, r0
+/* 801D4820 001D0480 90 81 00 10 */ stw r4, 0x10(r1)
+/* 801D4824 001D0484 C8 21 00 10 */ lfd f1, 0x10(r1)
+lbl_801D4828:
+/* 801D4828 001D0488 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D482C 001D048C 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/k_cos.s b/asm/MSL_C/MSL_Common_Embedded/Math/k_cos.s new file mode 100644 index 0000000..72b5f0b --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/k_cos.s @@ -0,0 +1,79 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __kernel_cos
+__kernel_cos:
+/* 801D22D8 001CDF38 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D22DC 001CDF3C 3C 00 3E 40 */ lis r0, 0x3e40
+/* 801D22E0 001CDF40 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D22E4 001CDF44 80 61 00 08 */ lwz r3, 8(r1)
+/* 801D22E8 001CDF48 54 64 00 7E */ clrlwi r4, r3, 1
+/* 801D22EC 001CDF4C 7C 04 00 00 */ cmpw r4, r0
+/* 801D22F0 001CDF50 40 80 00 20 */ bge lbl_801D2310
+/* 801D22F4 001CDF54 FC 00 08 1E */ fctiwz f0, f1
+/* 801D22F8 001CDF58 D8 01 00 18 */ stfd f0, 0x18(r1)
+/* 801D22FC 001CDF5C 80 01 00 1C */ lwz r0, 0x1c(r1)
+/* 801D2300 001CDF60 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2304 001CDF64 40 82 00 0C */ bne lbl_801D2310
+/* 801D2308 001CDF68 C8 22 94 60 */ lfd f1, lbl_80641A60-_SDA2_BASE_(r2)
+/* 801D230C 001CDF6C 48 00 00 D4 */ b lbl_801D23E0
+lbl_801D2310:
+/* 801D2310 001CDF70 FD 01 00 72 */ fmul f8, f1, f1
+/* 801D2314 001CDF74 C8 02 94 90 */ lfd f0, lbl_80641A90-_SDA2_BASE_(r2)
+/* 801D2318 001CDF78 3C 60 3F D3 */ lis r3, 0x3FD33333@ha
+/* 801D231C 001CDF7C C8 C2 94 88 */ lfd f6, lbl_80641A88-_SDA2_BASE_(r2)
+/* 801D2320 001CDF80 38 03 33 33 */ addi r0, r3, 0x3FD33333@l
+/* 801D2324 001CDF84 C8 A2 94 80 */ lfd f5, lbl_80641A80-_SDA2_BASE_(r2)
+/* 801D2328 001CDF88 FC E0 02 32 */ fmul f7, f0, f8
+/* 801D232C 001CDF8C C8 82 94 78 */ lfd f4, lbl_80641A78-_SDA2_BASE_(r2)
+/* 801D2330 001CDF90 C8 62 94 70 */ lfd f3, lbl_80641A70-_SDA2_BASE_(r2)
+/* 801D2334 001CDF94 7C 04 00 00 */ cmpw r4, r0
+/* 801D2338 001CDF98 C8 02 94 68 */ lfd f0, lbl_80641A68-_SDA2_BASE_(r2)
+/* 801D233C 001CDF9C FC C6 38 2A */ fadd f6, f6, f7
+/* 801D2340 001CDFA0 FC C8 01 B2 */ fmul f6, f8, f6
+/* 801D2344 001CDFA4 FC A5 30 2A */ fadd f5, f5, f6
+/* 801D2348 001CDFA8 FC A8 01 72 */ fmul f5, f8, f5
+/* 801D234C 001CDFAC FC 84 28 2A */ fadd f4, f4, f5
+/* 801D2350 001CDFB0 FC 88 01 32 */ fmul f4, f8, f4
+/* 801D2354 001CDFB4 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D2358 001CDFB8 FC 68 00 F2 */ fmul f3, f8, f3
+/* 801D235C 001CDFBC FC 00 18 2A */ fadd f0, f0, f3
+/* 801D2360 001CDFC0 FC 68 00 32 */ fmul f3, f8, f0
+/* 801D2364 001CDFC4 40 80 00 28 */ bge lbl_801D238C
+/* 801D2368 001CDFC8 FC 68 00 F2 */ fmul f3, f8, f3
+/* 801D236C 001CDFCC C8 82 94 98 */ lfd f4, lbl_80641A98-_SDA2_BASE_(r2)
+/* 801D2370 001CDFD0 C8 02 94 60 */ lfd f0, lbl_80641A60-_SDA2_BASE_(r2)
+/* 801D2374 001CDFD4 FC 21 00 B2 */ fmul f1, f1, f2
+/* 801D2378 001CDFD8 FC 44 02 32 */ fmul f2, f4, f8
+/* 801D237C 001CDFDC FC 23 08 28 */ fsub f1, f3, f1
+/* 801D2380 001CDFE0 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D2384 001CDFE4 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D2388 001CDFE8 48 00 00 58 */ b lbl_801D23E0
+lbl_801D238C:
+/* 801D238C 001CDFEC 3C 00 3F E9 */ lis r0, 0x3fe9
+/* 801D2390 001CDFF0 7C 04 00 00 */ cmpw r4, r0
+/* 801D2394 001CDFF4 40 81 00 10 */ ble lbl_801D23A4
+/* 801D2398 001CDFF8 C8 02 94 A0 */ lfd f0, lbl_80641AA0-_SDA2_BASE_(r2)
+/* 801D239C 001CDFFC D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D23A0 001CE000 48 00 00 14 */ b lbl_801D23B4
+lbl_801D23A4:
+/* 801D23A4 001CE004 3C 64 FF E0 */ addis r3, r4, 0xffe0
+/* 801D23A8 001CE008 38 00 00 00 */ li r0, 0
+/* 801D23AC 001CE00C 90 61 00 10 */ stw r3, 0x10(r1)
+/* 801D23B0 001CE010 90 01 00 14 */ stw r0, 0x14(r1)
+lbl_801D23B4:
+/* 801D23B4 001CE014 C8 02 94 98 */ lfd f0, lbl_80641A98-_SDA2_BASE_(r2)
+/* 801D23B8 001CE018 FC 68 00 F2 */ fmul f3, f8, f3
+/* 801D23BC 001CE01C C8 A1 00 10 */ lfd f5, 0x10(r1)
+/* 801D23C0 001CE020 FC C0 02 32 */ fmul f6, f0, f8
+/* 801D23C4 001CE024 C8 82 94 60 */ lfd f4, lbl_80641A60-_SDA2_BASE_(r2)
+/* 801D23C8 001CE028 FC 01 00 B2 */ fmul f0, f1, f2
+/* 801D23CC 001CE02C FC 46 28 28 */ fsub f2, f6, f5
+/* 801D23D0 001CE030 FC 24 28 28 */ fsub f1, f4, f5
+/* 801D23D4 001CE034 FC 03 00 28 */ fsub f0, f3, f0
+/* 801D23D8 001CE038 FC 02 00 28 */ fsub f0, f2, f0
+/* 801D23DC 001CE03C FC 21 00 28 */ fsub f1, f1, f0
+lbl_801D23E0:
+/* 801D23E0 001CE040 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D23E4 001CE044 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/k_rem_pio2.s b/asm/MSL_C/MSL_Common_Embedded/Math/k_rem_pio2.s new file mode 100644 index 0000000..6a91b78 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/k_rem_pio2.s @@ -0,0 +1,1607 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __kernel_rem_pio2
+__kernel_rem_pio2:
+/* 801D23E8 001CE048 94 21 FC 90 */ stwu r1, -0x370(r1)
+/* 801D23EC 001CE04C 7C 08 02 A6 */ mflr r0
+/* 801D23F0 001CE050 90 01 03 74 */ stw r0, 0x374(r1)
+/* 801D23F4 001CE054 39 61 03 70 */ addi r11, r1, 0x370
+/* 801D23F8 001CE058 4B FF 4C 89 */ bl _savefpr_23
+/* 801D23FC 001CE05C BD C1 02 E0 */ stmw r14, 0x2e0(r1)
+/* 801D2400 001CE060 3D 20 2A AB */ lis r9, 0x2AAAAAAB@ha
+/* 801D2404 001CE064 3D 80 43 30 */ lis r12, 0x4330
+/* 801D2408 001CE068 38 05 FF FD */ addi r0, r5, -3
+/* 801D240C 001CE06C 3D 40 80 40 */ lis r10, lbl_803FD4F0@ha
+/* 801D2410 001CE070 39 29 AA AB */ addi r9, r9, 0x2AAAAAAB@l
+/* 801D2414 001CE074 54 EB 10 3A */ slwi r11, r7, 2
+/* 801D2418 001CE078 7C 09 00 96 */ mulhw r0, r9, r0
+/* 801D241C 001CE07C 39 4A D4 F0 */ addi r10, r10, lbl_803FD4F0@l
+/* 801D2420 001CE080 7C 91 23 78 */ mr r17, r4
+/* 801D2424 001CE084 7E AA 58 2E */ lwzx r21, r10, r11
+/* 801D2428 001CE088 91 81 02 40 */ stw r12, 0x240(r1)
+/* 801D242C 001CE08C 7C 70 1B 78 */ mr r16, r3
+/* 801D2430 001CE090 7C 00 16 70 */ srawi r0, r0, 2
+/* 801D2434 001CE094 91 81 02 48 */ stw r12, 0x248(r1)
+/* 801D2438 001CE098 54 04 0F FE */ srwi r4, r0, 0x1f
+/* 801D243C 001CE09C 3A C6 FF FF */ addi r22, r6, -1
+/* 801D2440 001CE0A0 7D 40 22 15 */ add. r10, r0, r4
+/* 801D2444 001CE0A4 90 E1 00 08 */ stw r7, 8(r1)
+/* 801D2448 001CE0A8 40 80 00 08 */ bge lbl_801D2450
+/* 801D244C 001CE0AC 39 40 00 00 */ li r10, 0
+lbl_801D2450:
+/* 801D2450 001CE0B0 38 0A 00 01 */ addi r0, r10, 1
+/* 801D2454 001CE0B4 7D 36 AA 15 */ add. r9, r22, r21
+/* 801D2458 001CE0B8 1C C0 00 18 */ mulli r6, r0, 0x18
+/* 801D245C 001CE0BC 7C F6 50 50 */ subf r7, r22, r10
+/* 801D2460 001CE0C0 C8 22 94 E0 */ lfd f1, lbl_80641AE0-_SDA2_BASE_(r2)
+/* 801D2464 001CE0C4 54 E4 10 3A */ slwi r4, r7, 2
+/* 801D2468 001CE0C8 7E 66 28 50 */ subf r19, r6, r5
+/* 801D246C 001CE0CC 38 09 00 01 */ addi r0, r9, 1
+/* 801D2470 001CE0D0 7C 88 22 14 */ add r4, r8, r4
+/* 801D2474 001CE0D4 38 A1 01 A0 */ addi r5, r1, 0x1a0
+/* 801D2478 001CE0D8 7C 09 03 A6 */ mtctr r0
+/* 801D247C 001CE0DC 41 80 00 3C */ blt lbl_801D24B8
+lbl_801D2480:
+/* 801D2480 001CE0E0 2C 07 00 00 */ cmpwi r7, 0
+/* 801D2484 001CE0E4 40 80 00 0C */ bge lbl_801D2490
+/* 801D2488 001CE0E8 C8 02 94 A8 */ lfd f0, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D248C 001CE0EC 48 00 00 18 */ b lbl_801D24A4
+lbl_801D2490:
+/* 801D2490 001CE0F0 80 04 00 00 */ lwz r0, 0(r4)
+/* 801D2494 001CE0F4 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D2498 001CE0F8 90 01 02 44 */ stw r0, 0x244(r1)
+/* 801D249C 001CE0FC C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D24A0 001CE100 FC 00 08 28 */ fsub f0, f0, f1
+lbl_801D24A4:
+/* 801D24A4 001CE104 D8 05 00 00 */ stfd f0, 0(r5)
+/* 801D24A8 001CE108 38 A5 00 08 */ addi r5, r5, 8
+/* 801D24AC 001CE10C 38 84 00 04 */ addi r4, r4, 4
+/* 801D24B0 001CE110 38 E7 00 01 */ addi r7, r7, 1
+/* 801D24B4 001CE114 42 00 FF CC */ bdnz lbl_801D2480
+lbl_801D24B8:
+/* 801D24B8 001CE118 38 16 00 01 */ addi r0, r22, 1
+/* 801D24BC 001CE11C 38 A1 00 60 */ addi r5, r1, 0x60
+/* 801D24C0 001CE120 56 D9 00 00 */ rlwinm r25, r22, 0, 0, 0
+/* 801D24C4 001CE124 39 81 01 A0 */ addi r12, r1, 0x1a0
+/* 801D24C8 001CE128 54 18 00 00 */ rlwinm r24, r0, 0, 0, 0
+/* 801D24CC 001CE12C 39 20 00 00 */ li r9, 0
+/* 801D24D0 001CE130 3C 80 80 00 */ lis r4, 0x8000
+/* 801D24D4 001CE134 48 00 01 C8 */ b lbl_801D269C
+lbl_801D24D8:
+/* 801D24D8 001CE138 2C 96 00 00 */ cmpwi cr1, r22, 0
+/* 801D24DC 001CE13C C8 C2 94 A8 */ lfd f6, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D24E0 001CE140 38 E0 00 00 */ li r7, 0
+/* 801D24E4 001CE144 41 84 01 AC */ blt cr1, lbl_801D2690
+/* 801D24E8 001CE148 38 16 00 01 */ addi r0, r22, 1
+/* 801D24EC 001CE14C 39 D6 FF F8 */ addi r14, r22, -8
+/* 801D24F0 001CE150 2C 00 00 08 */ cmpwi r0, 8
+/* 801D24F4 001CE154 40 81 01 58 */ ble lbl_801D264C
+/* 801D24F8 001CE158 38 C0 00 00 */ li r6, 0
+/* 801D24FC 001CE15C 39 60 00 00 */ li r11, 0
+/* 801D2500 001CE160 41 84 00 14 */ blt cr1, lbl_801D2514
+/* 801D2504 001CE164 38 04 FF FE */ addi r0, r4, -2
+/* 801D2508 001CE168 7C 16 00 00 */ cmpw r22, r0
+/* 801D250C 001CE16C 41 81 00 08 */ bgt lbl_801D2514
+/* 801D2510 001CE170 39 60 00 01 */ li r11, 1
+lbl_801D2514:
+/* 801D2514 001CE174 2C 0B 00 00 */ cmpwi r11, 0
+/* 801D2518 001CE178 41 82 00 28 */ beq lbl_801D2540
+/* 801D251C 001CE17C 2C 19 00 00 */ cmpwi r25, 0
+/* 801D2520 001CE180 38 00 00 01 */ li r0, 1
+/* 801D2524 001CE184 40 82 00 10 */ bne lbl_801D2534
+/* 801D2528 001CE188 2C 18 00 00 */ cmpwi r24, 0
+/* 801D252C 001CE18C 41 82 00 08 */ beq lbl_801D2534
+/* 801D2530 001CE190 38 00 00 00 */ li r0, 0
+lbl_801D2534:
+/* 801D2534 001CE194 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2538 001CE198 41 82 00 08 */ beq lbl_801D2540
+/* 801D253C 001CE19C 38 C0 00 01 */ li r6, 1
+lbl_801D2540:
+/* 801D2540 001CE1A0 2C 06 00 00 */ cmpwi r6, 0
+/* 801D2544 001CE1A4 41 82 01 08 */ beq lbl_801D264C
+/* 801D2548 001CE1A8 39 6E 00 08 */ addi r11, r14, 8
+/* 801D254C 001CE1AC 7E 06 83 78 */ mr r6, r16
+/* 801D2550 001CE1B0 55 6B E8 FE */ srwi r11, r11, 3
+/* 801D2554 001CE1B4 7C 16 4A 14 */ add r0, r22, r9
+/* 801D2558 001CE1B8 7D 69 03 A6 */ mtctr r11
+/* 801D255C 001CE1BC 2C 0E 00 00 */ cmpwi r14, 0
+/* 801D2560 001CE1C0 41 80 00 EC */ blt lbl_801D264C
+lbl_801D2564:
+/* 801D2564 001CE1C4 7D 67 00 50 */ subf r11, r7, r0
+/* 801D2568 001CE1C8 39 C7 00 01 */ addi r14, r7, 1
+/* 801D256C 001CE1CC 55 6F 18 38 */ slwi r15, r11, 3
+/* 801D2570 001CE1D0 C8 26 00 00 */ lfd f1, 0(r6)
+/* 801D2574 001CE1D4 7C 0C 7C AE */ lfdx f0, r12, r15
+/* 801D2578 001CE1D8 7D CE 00 50 */ subf r14, r14, r0
+/* 801D257C 001CE1DC 55 CF 18 38 */ slwi r15, r14, 3
+/* 801D2580 001CE1E0 39 67 00 02 */ addi r11, r7, 2
+/* 801D2584 001CE1E4 FC 41 00 32 */ fmul f2, f1, f0
+/* 801D2588 001CE1E8 7D CB 00 50 */ subf r14, r11, r0
+/* 801D258C 001CE1EC 7C 0C 7C AE */ lfdx f0, r12, r15
+/* 801D2590 001CE1F0 55 CF 18 38 */ slwi r15, r14, 3
+/* 801D2594 001CE1F4 C8 26 00 08 */ lfd f1, 8(r6)
+/* 801D2598 001CE1F8 39 67 00 03 */ addi r11, r7, 3
+/* 801D259C 001CE1FC FC 61 00 32 */ fmul f3, f1, f0
+/* 801D25A0 001CE200 7D CB 00 50 */ subf r14, r11, r0
+/* 801D25A4 001CE204 C8 26 00 10 */ lfd f1, 0x10(r6)
+/* 801D25A8 001CE208 55 CE 18 38 */ slwi r14, r14, 3
+/* 801D25AC 001CE20C FC C6 10 2A */ fadd f6, f6, f2
+/* 801D25B0 001CE210 7C 0C 7C AE */ lfdx f0, r12, r15
+/* 801D25B4 001CE214 FC 41 00 32 */ fmul f2, f1, f0
+/* 801D25B8 001CE218 39 67 00 04 */ addi r11, r7, 4
+/* 801D25BC 001CE21C 7C 0C 74 AE */ lfdx f0, r12, r14
+/* 801D25C0 001CE220 7D 6B 00 50 */ subf r11, r11, r0
+/* 801D25C4 001CE224 FC C6 18 2A */ fadd f6, f6, f3
+/* 801D25C8 001CE228 C8 26 00 18 */ lfd f1, 0x18(r6)
+/* 801D25CC 001CE22C 55 72 18 38 */ slwi r18, r11, 3
+/* 801D25D0 001CE230 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D25D4 001CE234 39 67 00 05 */ addi r11, r7, 5
+/* 801D25D8 001CE238 39 C7 00 06 */ addi r14, r7, 6
+/* 801D25DC 001CE23C FC C6 10 2A */ fadd f6, f6, f2
+/* 801D25E0 001CE240 7D 6B 00 50 */ subf r11, r11, r0
+/* 801D25E4 001CE244 55 6F 18 38 */ slwi r15, r11, 3
+/* 801D25E8 001CE248 39 67 00 07 */ addi r11, r7, 7
+/* 801D25EC 001CE24C FC C6 08 2A */ fadd f6, f6, f1
+/* 801D25F0 001CE250 7D CE 00 50 */ subf r14, r14, r0
+/* 801D25F4 001CE254 C8 46 00 20 */ lfd f2, 0x20(r6)
+/* 801D25F8 001CE258 7C 0C 94 AE */ lfdx f0, r12, r18
+/* 801D25FC 001CE25C 7D 6B 00 50 */ subf r11, r11, r0
+/* 801D2600 001CE260 C8 26 00 28 */ lfd f1, 0x28(r6)
+/* 801D2604 001CE264 FC A2 00 32 */ fmul f5, f2, f0
+/* 801D2608 001CE268 7C 0C 7C AE */ lfdx f0, r12, r15
+/* 801D260C 001CE26C 55 CE 18 38 */ slwi r14, r14, 3
+/* 801D2610 001CE270 C8 66 00 30 */ lfd f3, 0x30(r6)
+/* 801D2614 001CE274 FC 81 00 32 */ fmul f4, f1, f0
+/* 801D2618 001CE278 7C 4C 74 AE */ lfdx f2, r12, r14
+/* 801D261C 001CE27C FC C6 28 2A */ fadd f6, f6, f5
+/* 801D2620 001CE280 55 6B 18 38 */ slwi r11, r11, 3
+/* 801D2624 001CE284 C8 26 00 38 */ lfd f1, 0x38(r6)
+/* 801D2628 001CE288 FC 43 00 B2 */ fmul f2, f3, f2
+/* 801D262C 001CE28C 7C 0C 5C AE */ lfdx f0, r12, r11
+/* 801D2630 001CE290 38 E7 00 08 */ addi r7, r7, 8
+/* 801D2634 001CE294 FC C6 20 2A */ fadd f6, f6, f4
+/* 801D2638 001CE298 38 C6 00 40 */ addi r6, r6, 0x40
+/* 801D263C 001CE29C FC 01 00 32 */ fmul f0, f1, f0
+/* 801D2640 001CE2A0 FC C6 10 2A */ fadd f6, f6, f2
+/* 801D2644 001CE2A4 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D2648 001CE2A8 42 00 FF 1C */ bdnz lbl_801D2564
+lbl_801D264C:
+/* 801D264C 001CE2AC 38 16 00 01 */ addi r0, r22, 1
+/* 801D2650 001CE2B0 54 E6 18 38 */ slwi r6, r7, 3
+/* 801D2654 001CE2B4 7C 07 00 50 */ subf r0, r7, r0
+/* 801D2658 001CE2B8 7D 76 4A 14 */ add r11, r22, r9
+/* 801D265C 001CE2BC 7C C3 32 14 */ add r6, r3, r6
+/* 801D2660 001CE2C0 7C 09 03 A6 */ mtctr r0
+/* 801D2664 001CE2C4 7C 07 B0 00 */ cmpw r7, r22
+/* 801D2668 001CE2C8 41 81 00 28 */ bgt lbl_801D2690
+lbl_801D266C:
+/* 801D266C 001CE2CC 7C 07 58 50 */ subf r0, r7, r11
+/* 801D2670 001CE2D0 C8 26 00 00 */ lfd f1, 0(r6)
+/* 801D2674 001CE2D4 54 00 18 38 */ slwi r0, r0, 3
+/* 801D2678 001CE2D8 38 C6 00 08 */ addi r6, r6, 8
+/* 801D267C 001CE2DC 7C 0C 04 AE */ lfdx f0, r12, r0
+/* 801D2680 001CE2E0 38 E7 00 01 */ addi r7, r7, 1
+/* 801D2684 001CE2E4 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D2688 001CE2E8 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D268C 001CE2EC 42 00 FF E0 */ bdnz lbl_801D266C
+lbl_801D2690:
+/* 801D2690 001CE2F0 D8 C5 00 00 */ stfd f6, 0(r5)
+/* 801D2694 001CE2F4 38 A5 00 08 */ addi r5, r5, 8
+/* 801D2698 001CE2F8 39 29 00 01 */ addi r9, r9, 1
+lbl_801D269C:
+/* 801D269C 001CE2FC 7C 09 A8 00 */ cmpw r9, r21
+/* 801D26A0 001CE300 40 81 FE 38 */ ble lbl_801D24D8
+/* 801D26A4 001CE304 23 93 00 18 */ subfic r28, r19, 0x18
+/* 801D26A8 001CE308 7C B5 00 D0 */ neg r5, r21
+/* 801D26AC 001CE30C 20 13 00 17 */ subfic r0, r19, 0x17
+/* 801D26B0 001CE310 55 44 10 3A */ slwi r4, r10, 2
+/* 801D26B4 001CE314 56 C3 18 38 */ slwi r3, r22, 3
+/* 801D26B8 001CE318 3B 41 01 A0 */ addi r26, r1, 0x1a0
+/* 801D26BC 001CE31C CB 02 94 B0 */ lfd f24, lbl_80641AB0-_SDA2_BASE_(r2)
+/* 801D26C0 001CE320 7E B7 AB 78 */ mr r23, r21
+/* 801D26C4 001CE324 CB 22 94 E0 */ lfd f25, lbl_80641AE0-_SDA2_BASE_(r2)
+/* 801D26C8 001CE328 54 AE 00 00 */ rlwinm r14, r5, 0, 0, 0
+/* 801D26CC 001CE32C CB 42 94 B8 */ lfd f26, lbl_80641AB8-_SDA2_BASE_(r2)
+/* 801D26D0 001CE330 7F 68 22 14 */ add r27, r8, r4
+/* 801D26D4 001CE334 90 01 02 D0 */ stw r0, 0x2d0(r1)
+/* 801D26D8 001CE338 7F 5A 1A 14 */ add r26, r26, r3
+/* 801D26DC 001CE33C CB 62 94 C8 */ lfd f27, lbl_80641AC8-_SDA2_BASE_(r2)
+/* 801D26E0 001CE340 3B A1 00 10 */ addi r29, r1, 0x10
+/* 801D26E4 001CE344 CB 82 94 C0 */ lfd f28, lbl_80641AC0-_SDA2_BASE_(r2)
+/* 801D26E8 001CE348 39 E1 01 A0 */ addi r15, r1, 0x1a0
+/* 801D26EC 001CE34C CB A2 94 D0 */ lfd f29, lbl_80641AD0-_SDA2_BASE_(r2)
+/* 801D26F0 001CE350 3F C0 01 00 */ lis r30, 0x100
+/* 801D26F4 001CE354 CB C2 94 D8 */ lfd f30, lbl_80641AD8-_SDA2_BASE_(r2)
+/* 801D26F8 001CE358 3F E0 80 00 */ lis r31, 0x8000
+/* 801D26FC 001CE35C CB E2 94 A8 */ lfd f31, lbl_80641AA8-_SDA2_BASE_(r2)
+lbl_801D2700:
+/* 801D2700 001CE360 56 E0 18 38 */ slwi r0, r23, 3
+/* 801D2704 001CE364 2C 97 00 00 */ cmpwi cr1, r23, 0
+/* 801D2708 001CE368 38 61 00 60 */ addi r3, r1, 0x60
+/* 801D270C 001CE36C 7C 23 04 EE */ lfdux f1, r3, r0
+/* 801D2710 001CE370 7E E4 BB 78 */ mr r4, r23
+/* 801D2714 001CE374 38 A0 00 00 */ li r5, 0
+/* 801D2718 001CE378 38 C0 00 00 */ li r6, 0
+/* 801D271C 001CE37C 40 85 02 F8 */ ble cr1, lbl_801D2A14
+/* 801D2720 001CE380 2C 17 00 08 */ cmpwi r23, 8
+/* 801D2724 001CE384 40 81 02 80 */ ble lbl_801D29A4
+/* 801D2728 001CE388 38 E0 00 00 */ li r7, 0
+/* 801D272C 001CE38C 41 84 00 14 */ blt cr1, lbl_801D2740
+/* 801D2730 001CE390 38 1F 00 01 */ addi r0, r31, 1
+/* 801D2734 001CE394 7C 17 00 00 */ cmpw r23, r0
+/* 801D2738 001CE398 41 80 00 08 */ blt lbl_801D2740
+/* 801D273C 001CE39C 38 E0 00 01 */ li r7, 1
+lbl_801D2740:
+/* 801D2740 001CE3A0 2C 07 00 00 */ cmpwi r7, 0
+/* 801D2744 001CE3A4 41 82 02 60 */ beq lbl_801D29A4
+/* 801D2748 001CE3A8 38 17 FF FF */ addi r0, r23, -1
+/* 801D274C 001CE3AC 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D2750 001CE3B0 7C 09 03 A6 */ mtctr r0
+/* 801D2754 001CE3B4 2C 17 00 08 */ cmpwi r23, 8
+/* 801D2758 001CE3B8 40 81 02 4C */ ble lbl_801D29A4
+lbl_801D275C:
+/* 801D275C 001CE3BC FC 18 00 72 */ fmul f0, f24, f1
+/* 801D2760 001CE3C0 38 05 00 01 */ addi r0, r5, 1
+/* 801D2764 001CE3C4 39 25 00 02 */ addi r9, r5, 2
+/* 801D2768 001CE3C8 39 05 00 03 */ addi r8, r5, 3
+/* 801D276C 001CE3CC 38 E5 00 04 */ addi r7, r5, 4
+/* 801D2770 001CE3D0 C8 83 FF F8 */ lfd f4, -8(r3)
+/* 801D2774 001CE3D4 FC A0 00 1E */ fctiwz f5, f0
+/* 801D2778 001CE3D8 C8 63 FF F0 */ lfd f3, -0x10(r3)
+/* 801D277C 001CE3DC C8 43 FF E8 */ lfd f2, -0x18(r3)
+/* 801D2780 001CE3E0 54 00 10 3A */ slwi r0, r0, 2
+/* 801D2784 001CE3E4 C8 03 FF E0 */ lfd f0, -0x20(r3)
+/* 801D2788 001CE3E8 55 29 10 3A */ slwi r9, r9, 2
+/* 801D278C 001CE3EC D8 A1 02 50 */ stfd f5, 0x250(r1)
+/* 801D2790 001CE3F0 55 08 10 3A */ slwi r8, r8, 2
+/* 801D2794 001CE3F4 54 E7 10 3A */ slwi r7, r7, 2
+/* 801D2798 001CE3F8 81 41 02 54 */ lwz r10, 0x254(r1)
+/* 801D279C 001CE3FC 6D 4A 80 00 */ xoris r10, r10, 0x8000
+/* 801D27A0 001CE400 91 41 02 4C */ stw r10, 0x24c(r1)
+/* 801D27A4 001CE404 C8 A1 02 48 */ lfd f5, 0x248(r1)
+/* 801D27A8 001CE408 FC A5 C8 28 */ fsub f5, f5, f25
+/* 801D27AC 001CE40C FC C5 20 2A */ fadd f6, f5, f4
+/* 801D27B0 001CE410 FC BA 01 72 */ fmul f5, f26, f5
+/* 801D27B4 001CE414 FC 98 01 B2 */ fmul f4, f24, f6
+/* 801D27B8 001CE418 FC A1 28 28 */ fsub f5, f1, f5
+/* 801D27BC 001CE41C FC 20 20 1E */ fctiwz f1, f4
+/* 801D27C0 001CE420 FC 80 28 1E */ fctiwz f4, f5
+/* 801D27C4 001CE424 D8 21 02 60 */ stfd f1, 0x260(r1)
+/* 801D27C8 001CE428 81 41 02 64 */ lwz r10, 0x264(r1)
+/* 801D27CC 001CE42C D8 81 02 58 */ stfd f4, 0x258(r1)
+/* 801D27D0 001CE430 6D 4A 80 00 */ xoris r10, r10, 0x8000
+/* 801D27D4 001CE434 91 41 02 44 */ stw r10, 0x244(r1)
+/* 801D27D8 001CE438 81 41 02 5C */ lwz r10, 0x25c(r1)
+/* 801D27DC 001CE43C C8 21 02 40 */ lfd f1, 0x240(r1)
+/* 801D27E0 001CE440 7D 5D 31 2E */ stwx r10, r29, r6
+/* 801D27E4 001CE444 FC 21 C8 28 */ fsub f1, f1, f25
+/* 801D27E8 001CE448 FC 81 18 2A */ fadd f4, f1, f3
+/* 801D27EC 001CE44C FC 7A 00 72 */ fmul f3, f26, f1
+/* 801D27F0 001CE450 FC 38 01 32 */ fmul f1, f24, f4
+/* 801D27F4 001CE454 FC 66 18 28 */ fsub f3, f6, f3
+/* 801D27F8 001CE458 FC 20 08 1E */ fctiwz f1, f1
+/* 801D27FC 001CE45C FC 60 18 1E */ fctiwz f3, f3
+/* 801D2800 001CE460 D8 21 02 70 */ stfd f1, 0x270(r1)
+/* 801D2804 001CE464 81 41 02 74 */ lwz r10, 0x274(r1)
+/* 801D2808 001CE468 D8 61 02 68 */ stfd f3, 0x268(r1)
+/* 801D280C 001CE46C 6D 4A 80 00 */ xoris r10, r10, 0x8000
+/* 801D2810 001CE470 91 41 02 4C */ stw r10, 0x24c(r1)
+/* 801D2814 001CE474 81 41 02 6C */ lwz r10, 0x26c(r1)
+/* 801D2818 001CE478 C8 21 02 48 */ lfd f1, 0x248(r1)
+/* 801D281C 001CE47C 7D 5D 01 2E */ stwx r10, r29, r0
+/* 801D2820 001CE480 FC 21 C8 28 */ fsub f1, f1, f25
+/* 801D2824 001CE484 FC 61 10 2A */ fadd f3, f1, f2
+/* 801D2828 001CE488 FC 5A 00 72 */ fmul f2, f26, f1
+/* 801D282C 001CE48C FC 38 00 F2 */ fmul f1, f24, f3
+/* 801D2830 001CE490 FC 44 10 28 */ fsub f2, f4, f2
+/* 801D2834 001CE494 FC 20 08 1E */ fctiwz f1, f1
+/* 801D2838 001CE498 FC 40 10 1E */ fctiwz f2, f2
+/* 801D283C 001CE49C D8 21 02 80 */ stfd f1, 0x280(r1)
+/* 801D2840 001CE4A0 80 01 02 84 */ lwz r0, 0x284(r1)
+/* 801D2844 001CE4A4 D8 41 02 78 */ stfd f2, 0x278(r1)
+/* 801D2848 001CE4A8 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D284C 001CE4AC 90 01 02 44 */ stw r0, 0x244(r1)
+/* 801D2850 001CE4B0 80 01 02 7C */ lwz r0, 0x27c(r1)
+/* 801D2854 001CE4B4 C8 21 02 40 */ lfd f1, 0x240(r1)
+/* 801D2858 001CE4B8 7C 1D 49 2E */ stwx r0, r29, r9
+/* 801D285C 001CE4BC FC 21 C8 28 */ fsub f1, f1, f25
+/* 801D2860 001CE4C0 FC 41 00 2A */ fadd f2, f1, f0
+/* 801D2864 001CE4C4 FC 3A 00 72 */ fmul f1, f26, f1
+/* 801D2868 001CE4C8 FC 18 00 B2 */ fmul f0, f24, f2
+/* 801D286C 001CE4CC FC 23 08 28 */ fsub f1, f3, f1
+/* 801D2870 001CE4D0 FC 00 00 1E */ fctiwz f0, f0
+/* 801D2874 001CE4D4 FC 20 08 1E */ fctiwz f1, f1
+/* 801D2878 001CE4D8 D8 01 02 90 */ stfd f0, 0x290(r1)
+/* 801D287C 001CE4DC 80 01 02 94 */ lwz r0, 0x294(r1)
+/* 801D2880 001CE4E0 D8 21 02 88 */ stfd f1, 0x288(r1)
+/* 801D2884 001CE4E4 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D2888 001CE4E8 90 01 02 4C */ stw r0, 0x24c(r1)
+/* 801D288C 001CE4EC 80 01 02 8C */ lwz r0, 0x28c(r1)
+/* 801D2890 001CE4F0 C8 01 02 48 */ lfd f0, 0x248(r1)
+/* 801D2894 001CE4F4 7C 1D 41 2E */ stwx r0, r29, r8
+/* 801D2898 001CE4F8 FC 20 C8 28 */ fsub f1, f0, f25
+/* 801D289C 001CE4FC FC 1A 00 72 */ fmul f0, f26, f1
+/* 801D28A0 001CE500 FC 02 00 28 */ fsub f0, f2, f0
+/* 801D28A4 001CE504 FC 00 00 1E */ fctiwz f0, f0
+/* 801D28A8 001CE508 D8 01 02 98 */ stfd f0, 0x298(r1)
+/* 801D28AC 001CE50C 80 01 02 9C */ lwz r0, 0x29c(r1)
+/* 801D28B0 001CE510 7C 1D 39 2E */ stwx r0, r29, r7
+/* 801D28B4 001CE514 C8 03 FF D8 */ lfd f0, -0x28(r3)
+/* 801D28B8 001CE518 39 05 00 05 */ addi r8, r5, 5
+/* 801D28BC 001CE51C 38 05 00 07 */ addi r0, r5, 7
+/* 801D28C0 001CE520 38 E5 00 06 */ addi r7, r5, 6
+/* 801D28C4 001CE524 FC A1 00 2A */ fadd f5, f1, f0
+/* 801D28C8 001CE528 55 09 10 3A */ slwi r9, r8, 2
+/* 801D28CC 001CE52C 54 E8 10 3A */ slwi r8, r7, 2
+/* 801D28D0 001CE530 C8 43 FF D0 */ lfd f2, -0x30(r3)
+/* 801D28D4 001CE534 C8 23 FF C8 */ lfd f1, -0x38(r3)
+/* 801D28D8 001CE538 54 00 10 3A */ slwi r0, r0, 2
+/* 801D28DC 001CE53C FC 78 01 72 */ fmul f3, f24, f5
+/* 801D28E0 001CE540 CC 03 FF C0 */ lfdu f0, -0x40(r3)
+/* 801D28E4 001CE544 38 A5 00 08 */ addi r5, r5, 8
+/* 801D28E8 001CE548 38 C6 00 20 */ addi r6, r6, 0x20
+/* 801D28EC 001CE54C 38 84 FF F8 */ addi r4, r4, -8
+/* 801D28F0 001CE550 FC 60 18 1E */ fctiwz f3, f3
+/* 801D28F4 001CE554 D8 61 02 A0 */ stfd f3, 0x2a0(r1)
+/* 801D28F8 001CE558 80 E1 02 A4 */ lwz r7, 0x2a4(r1)
+/* 801D28FC 001CE55C 6C E7 80 00 */ xoris r7, r7, 0x8000
+/* 801D2900 001CE560 90 E1 02 44 */ stw r7, 0x244(r1)
+/* 801D2904 001CE564 C8 61 02 40 */ lfd f3, 0x240(r1)
+/* 801D2908 001CE568 FC 63 C8 28 */ fsub f3, f3, f25
+/* 801D290C 001CE56C FC 83 10 2A */ fadd f4, f3, f2
+/* 801D2910 001CE570 FC 7A 00 F2 */ fmul f3, f26, f3
+/* 801D2914 001CE574 FC 58 01 32 */ fmul f2, f24, f4
+/* 801D2918 001CE578 FC 65 18 28 */ fsub f3, f5, f3
+/* 801D291C 001CE57C FC 40 10 1E */ fctiwz f2, f2
+/* 801D2920 001CE580 FC 60 18 1E */ fctiwz f3, f3
+/* 801D2924 001CE584 D8 41 02 B0 */ stfd f2, 0x2b0(r1)
+/* 801D2928 001CE588 80 E1 02 B4 */ lwz r7, 0x2b4(r1)
+/* 801D292C 001CE58C D8 61 02 A8 */ stfd f3, 0x2a8(r1)
+/* 801D2930 001CE590 6C E7 80 00 */ xoris r7, r7, 0x8000
+/* 801D2934 001CE594 90 E1 02 4C */ stw r7, 0x24c(r1)
+/* 801D2938 001CE598 80 E1 02 AC */ lwz r7, 0x2ac(r1)
+/* 801D293C 001CE59C C8 41 02 48 */ lfd f2, 0x248(r1)
+/* 801D2940 001CE5A0 7C FD 49 2E */ stwx r7, r29, r9
+/* 801D2944 001CE5A4 FC 42 C8 28 */ fsub f2, f2, f25
+/* 801D2948 001CE5A8 FC 62 08 2A */ fadd f3, f2, f1
+/* 801D294C 001CE5AC FC 5A 00 B2 */ fmul f2, f26, f2
+/* 801D2950 001CE5B0 FC 38 00 F2 */ fmul f1, f24, f3
+/* 801D2954 001CE5B4 FC 44 10 28 */ fsub f2, f4, f2
+/* 801D2958 001CE5B8 FC 20 08 1E */ fctiwz f1, f1
+/* 801D295C 001CE5BC FC 40 10 1E */ fctiwz f2, f2
+/* 801D2960 001CE5C0 D8 21 02 C0 */ stfd f1, 0x2c0(r1)
+/* 801D2964 001CE5C4 80 E1 02 C4 */ lwz r7, 0x2c4(r1)
+/* 801D2968 001CE5C8 D8 41 02 B8 */ stfd f2, 0x2b8(r1)
+/* 801D296C 001CE5CC 6C E7 80 00 */ xoris r7, r7, 0x8000
+/* 801D2970 001CE5D0 90 E1 02 44 */ stw r7, 0x244(r1)
+/* 801D2974 001CE5D4 80 E1 02 BC */ lwz r7, 0x2bc(r1)
+/* 801D2978 001CE5D8 C8 21 02 40 */ lfd f1, 0x240(r1)
+/* 801D297C 001CE5DC 7C FD 41 2E */ stwx r7, r29, r8
+/* 801D2980 001CE5E0 FC 21 C8 28 */ fsub f1, f1, f25
+/* 801D2984 001CE5E4 FC 5A 00 72 */ fmul f2, f26, f1
+/* 801D2988 001CE5E8 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D298C 001CE5EC FC 03 10 28 */ fsub f0, f3, f2
+/* 801D2990 001CE5F0 FC 00 00 1E */ fctiwz f0, f0
+/* 801D2994 001CE5F4 D8 01 02 C8 */ stfd f0, 0x2c8(r1)
+/* 801D2998 001CE5F8 80 E1 02 CC */ lwz r7, 0x2cc(r1)
+/* 801D299C 001CE5FC 7C FD 01 2E */ stwx r7, r29, r0
+/* 801D29A0 001CE600 42 00 FD BC */ bdnz lbl_801D275C
+lbl_801D29A4:
+/* 801D29A4 001CE604 54 A3 10 3A */ slwi r3, r5, 2
+/* 801D29A8 001CE608 38 A1 00 10 */ addi r5, r1, 0x10
+/* 801D29AC 001CE60C 54 80 18 38 */ slwi r0, r4, 3
+/* 801D29B0 001CE610 38 C1 00 60 */ addi r6, r1, 0x60
+/* 801D29B4 001CE614 7C A5 1A 14 */ add r5, r5, r3
+/* 801D29B8 001CE618 7C C6 02 14 */ add r6, r6, r0
+/* 801D29BC 001CE61C 7C 89 03 A6 */ mtctr r4
+/* 801D29C0 001CE620 2C 04 00 00 */ cmpwi r4, 0
+/* 801D29C4 001CE624 40 81 00 50 */ ble lbl_801D2A14
+lbl_801D29C8:
+/* 801D29C8 001CE628 FC 58 00 72 */ fmul f2, f24, f1
+/* 801D29CC 001CE62C CC 06 FF F8 */ lfdu f0, -8(r6)
+/* 801D29D0 001CE630 38 84 FF FF */ addi r4, r4, -1
+/* 801D29D4 001CE634 FC 40 10 1E */ fctiwz f2, f2
+/* 801D29D8 001CE638 D8 41 02 C8 */ stfd f2, 0x2c8(r1)
+/* 801D29DC 001CE63C 80 01 02 CC */ lwz r0, 0x2cc(r1)
+/* 801D29E0 001CE640 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D29E4 001CE644 90 01 02 4C */ stw r0, 0x24c(r1)
+/* 801D29E8 001CE648 C8 41 02 48 */ lfd f2, 0x248(r1)
+/* 801D29EC 001CE64C FC 62 C8 28 */ fsub f3, f2, f25
+/* 801D29F0 001CE650 FC 5A 00 F2 */ fmul f2, f26, f3
+/* 801D29F4 001CE654 FC 41 10 28 */ fsub f2, f1, f2
+/* 801D29F8 001CE658 FC 23 00 2A */ fadd f1, f3, f0
+/* 801D29FC 001CE65C FC 00 10 1E */ fctiwz f0, f2
+/* 801D2A00 001CE660 D8 01 02 C0 */ stfd f0, 0x2c0(r1)
+/* 801D2A04 001CE664 80 01 02 C4 */ lwz r0, 0x2c4(r1)
+/* 801D2A08 001CE668 90 05 00 00 */ stw r0, 0(r5)
+/* 801D2A0C 001CE66C 38 A5 00 04 */ addi r5, r5, 4
+/* 801D2A10 001CE670 42 00 FF B8 */ bdnz lbl_801D29C8
+lbl_801D2A14:
+/* 801D2A14 001CE674 7E 63 9B 78 */ mr r3, r19
+/* 801D2A18 001CE678 4B FF DF A9 */ bl scalbn
+/* 801D2A1C 001CE67C FE E0 08 90 */ fmr f23, f1
+/* 801D2A20 001CE680 FC 3B 00 72 */ fmul f1, f27, f1
+/* 801D2A24 001CE684 48 00 17 29 */ bl floor
+/* 801D2A28 001CE688 FC 1C 00 72 */ fmul f0, f28, f1
+/* 801D2A2C 001CE68C 2C 13 00 00 */ cmpwi r19, 0
+/* 801D2A30 001CE690 3A 40 00 00 */ li r18, 0
+/* 801D2A34 001CE694 FE F7 00 28 */ fsub f23, f23, f0
+/* 801D2A38 001CE698 FC 00 B8 1E */ fctiwz f0, f23
+/* 801D2A3C 001CE69C D8 01 02 C8 */ stfd f0, 0x2c8(r1)
+/* 801D2A40 001CE6A0 82 81 02 CC */ lwz r20, 0x2cc(r1)
+/* 801D2A44 001CE6A4 6E 80 80 00 */ xoris r0, r20, 0x8000
+/* 801D2A48 001CE6A8 90 01 02 44 */ stw r0, 0x244(r1)
+/* 801D2A4C 001CE6AC C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D2A50 001CE6B0 FC 00 C8 28 */ fsub f0, f0, f25
+/* 801D2A54 001CE6B4 FE F7 00 28 */ fsub f23, f23, f0
+/* 801D2A58 001CE6B8 40 81 00 30 */ ble lbl_801D2A88
+/* 801D2A5C 001CE6BC 56 E0 10 3A */ slwi r0, r23, 2
+/* 801D2A60 001CE6C0 7C 9D 02 14 */ add r4, r29, r0
+/* 801D2A64 001CE6C4 80 64 FF FC */ lwz r3, -4(r4)
+/* 801D2A68 001CE6C8 7C 65 E6 30 */ sraw r5, r3, r28
+/* 801D2A6C 001CE6CC 7C A0 E0 30 */ slw r0, r5, r28
+/* 801D2A70 001CE6D0 7C 60 18 50 */ subf r3, r0, r3
+/* 801D2A74 001CE6D4 80 01 02 D0 */ lwz r0, 0x2d0(r1)
+/* 801D2A78 001CE6D8 90 64 FF FC */ stw r3, -4(r4)
+/* 801D2A7C 001CE6DC 7E 94 2A 14 */ add r20, r20, r5
+/* 801D2A80 001CE6E0 7C 72 06 30 */ sraw r18, r3, r0
+/* 801D2A84 001CE6E4 48 00 00 2C */ b lbl_801D2AB0
+lbl_801D2A88:
+/* 801D2A88 001CE6E8 40 82 00 18 */ bne lbl_801D2AA0
+/* 801D2A8C 001CE6EC 56 E0 10 3A */ slwi r0, r23, 2
+/* 801D2A90 001CE6F0 7C 7D 02 14 */ add r3, r29, r0
+/* 801D2A94 001CE6F4 80 03 FF FC */ lwz r0, -4(r3)
+/* 801D2A98 001CE6F8 7C 12 BE 70 */ srawi r18, r0, 0x17
+/* 801D2A9C 001CE6FC 48 00 00 14 */ b lbl_801D2AB0
+lbl_801D2AA0:
+/* 801D2AA0 001CE700 FC 17 E8 40 */ fcmpo cr0, f23, f29
+/* 801D2AA4 001CE704 4C 41 13 82 */ cror 2, 1, 2
+/* 801D2AA8 001CE708 40 82 00 08 */ bne lbl_801D2AB0
+/* 801D2AAC 001CE70C 3A 40 00 02 */ li r18, 2
+lbl_801D2AB0:
+/* 801D2AB0 001CE710 2C 12 00 00 */ cmpwi r18, 0
+/* 801D2AB4 001CE714 40 81 00 C4 */ ble lbl_801D2B78
+/* 801D2AB8 001CE718 38 A1 00 10 */ addi r5, r1, 0x10
+/* 801D2ABC 001CE71C 38 9E FF FF */ addi r4, r30, -1
+/* 801D2AC0 001CE720 38 00 00 00 */ li r0, 0
+/* 801D2AC4 001CE724 7E E9 03 A6 */ mtctr r23
+/* 801D2AC8 001CE728 2C 17 00 00 */ cmpwi r23, 0
+/* 801D2ACC 001CE72C 3A 94 00 01 */ addi r20, r20, 1
+/* 801D2AD0 001CE730 40 81 00 38 */ ble lbl_801D2B08
+lbl_801D2AD4:
+/* 801D2AD4 001CE734 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2AD8 001CE738 80 65 00 00 */ lwz r3, 0(r5)
+/* 801D2ADC 001CE73C 40 82 00 1C */ bne lbl_801D2AF8
+/* 801D2AE0 001CE740 2C 03 00 00 */ cmpwi r3, 0
+/* 801D2AE4 001CE744 41 82 00 1C */ beq lbl_801D2B00
+/* 801D2AE8 001CE748 7C 63 F0 50 */ subf r3, r3, r30
+/* 801D2AEC 001CE74C 38 00 00 01 */ li r0, 1
+/* 801D2AF0 001CE750 90 65 00 00 */ stw r3, 0(r5)
+/* 801D2AF4 001CE754 48 00 00 0C */ b lbl_801D2B00
+lbl_801D2AF8:
+/* 801D2AF8 001CE758 7C 63 20 50 */ subf r3, r3, r4
+/* 801D2AFC 001CE75C 90 65 00 00 */ stw r3, 0(r5)
+lbl_801D2B00:
+/* 801D2B00 001CE760 38 A5 00 04 */ addi r5, r5, 4
+/* 801D2B04 001CE764 42 00 FF D0 */ bdnz lbl_801D2AD4
+lbl_801D2B08:
+/* 801D2B08 001CE768 2C 13 00 00 */ cmpwi r19, 0
+/* 801D2B0C 001CE76C 40 81 00 48 */ ble lbl_801D2B54
+/* 801D2B10 001CE770 2C 13 00 02 */ cmpwi r19, 2
+/* 801D2B14 001CE774 41 82 00 2C */ beq lbl_801D2B40
+/* 801D2B18 001CE778 40 80 00 3C */ bge lbl_801D2B54
+/* 801D2B1C 001CE77C 2C 13 00 01 */ cmpwi r19, 1
+/* 801D2B20 001CE780 40 80 00 08 */ bge lbl_801D2B28
+/* 801D2B24 001CE784 48 00 00 30 */ b lbl_801D2B54
+lbl_801D2B28:
+/* 801D2B28 001CE788 56 E3 10 3A */ slwi r3, r23, 2
+/* 801D2B2C 001CE78C 7C 9D 1A 14 */ add r4, r29, r3
+/* 801D2B30 001CE790 80 64 FF FC */ lwz r3, -4(r4)
+/* 801D2B34 001CE794 54 63 02 7E */ clrlwi r3, r3, 9
+/* 801D2B38 001CE798 90 64 FF FC */ stw r3, -4(r4)
+/* 801D2B3C 001CE79C 48 00 00 18 */ b lbl_801D2B54
+lbl_801D2B40:
+/* 801D2B40 001CE7A0 56 E3 10 3A */ slwi r3, r23, 2
+/* 801D2B44 001CE7A4 7C 9D 1A 14 */ add r4, r29, r3
+/* 801D2B48 001CE7A8 80 64 FF FC */ lwz r3, -4(r4)
+/* 801D2B4C 001CE7AC 54 63 02 BE */ clrlwi r3, r3, 0xa
+/* 801D2B50 001CE7B0 90 64 FF FC */ stw r3, -4(r4)
+lbl_801D2B54:
+/* 801D2B54 001CE7B4 2C 12 00 02 */ cmpwi r18, 2
+/* 801D2B58 001CE7B8 40 82 00 20 */ bne lbl_801D2B78
+/* 801D2B5C 001CE7BC 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2B60 001CE7C0 FE FE B8 28 */ fsub f23, f30, f23
+/* 801D2B64 001CE7C4 41 82 00 14 */ beq lbl_801D2B78
+/* 801D2B68 001CE7C8 FC 20 F0 90 */ fmr f1, f30
+/* 801D2B6C 001CE7CC 7E 63 9B 78 */ mr r3, r19
+/* 801D2B70 001CE7D0 4B FF DE 51 */ bl scalbn
+/* 801D2B74 001CE7D4 FE F7 08 28 */ fsub f23, f23, f1
+lbl_801D2B78:
+/* 801D2B78 001CE7D8 FC 1F B8 00 */ fcmpu cr0, f31, f23
+/* 801D2B7C 001CE7DC 40 82 03 D4 */ bne lbl_801D2F50
+/* 801D2B80 001CE7E0 39 57 FF FF */ addi r10, r23, -1
+/* 801D2B84 001CE7E4 39 20 00 00 */ li r9, 0
+/* 801D2B88 001CE7E8 7C 8A A8 00 */ cmpw cr1, r10, r21
+/* 801D2B8C 001CE7EC 41 84 01 84 */ blt cr1, lbl_801D2D10
+/* 801D2B90 001CE7F0 7C F5 50 50 */ subf r7, r21, r10
+/* 801D2B94 001CE7F4 38 15 00 08 */ addi r0, r21, 8
+/* 801D2B98 001CE7F8 39 07 00 01 */ addi r8, r7, 1
+/* 801D2B9C 001CE7FC 2C 08 00 08 */ cmpwi r8, 8
+/* 801D2BA0 001CE800 40 81 01 3C */ ble lbl_801D2CDC
+/* 801D2BA4 001CE804 38 60 00 00 */ li r3, 0
+/* 801D2BA8 001CE808 38 80 00 00 */ li r4, 0
+/* 801D2BAC 001CE80C 38 A0 00 00 */ li r5, 0
+/* 801D2BB0 001CE810 38 C0 00 00 */ li r6, 0
+/* 801D2BB4 001CE814 39 80 00 00 */ li r12, 0
+/* 801D2BB8 001CE818 41 84 00 14 */ blt cr1, lbl_801D2BCC
+/* 801D2BBC 001CE81C 39 7F 00 01 */ addi r11, r31, 1
+/* 801D2BC0 001CE820 7C 15 58 00 */ cmpw r21, r11
+/* 801D2BC4 001CE824 41 80 00 08 */ blt lbl_801D2BCC
+/* 801D2BC8 001CE828 39 80 00 01 */ li r12, 1
+lbl_801D2BCC:
+/* 801D2BCC 001CE82C 2C 0C 00 00 */ cmpwi r12, 0
+/* 801D2BD0 001CE830 41 82 00 18 */ beq lbl_801D2BE8
+/* 801D2BD4 001CE834 39 97 FF FF */ addi r12, r23, -1
+/* 801D2BD8 001CE838 39 7F 00 01 */ addi r11, r31, 1
+/* 801D2BDC 001CE83C 7C 0C 58 00 */ cmpw r12, r11
+/* 801D2BE0 001CE840 41 80 00 08 */ blt lbl_801D2BE8
+/* 801D2BE4 001CE844 38 C0 00 01 */ li r6, 1
+lbl_801D2BE8:
+/* 801D2BE8 001CE848 2C 06 00 00 */ cmpwi r6, 0
+/* 801D2BEC 001CE84C 41 82 00 14 */ beq lbl_801D2C00
+/* 801D2BF0 001CE850 3C D5 80 00 */ addis r6, r21, 0x8000
+/* 801D2BF4 001CE854 28 06 00 00 */ cmplwi r6, 0
+/* 801D2BF8 001CE858 41 82 00 08 */ beq lbl_801D2C00
+/* 801D2BFC 001CE85C 38 A0 00 01 */ li r5, 1
+lbl_801D2C00:
+/* 801D2C00 001CE860 2C 05 00 00 */ cmpwi r5, 0
+/* 801D2C04 001CE864 41 82 00 34 */ beq lbl_801D2C38
+/* 801D2C08 001CE868 38 B7 FF FF */ addi r5, r23, -1
+/* 801D2C0C 001CE86C 38 C0 00 01 */ li r6, 1
+/* 801D2C10 001CE870 54 AB 00 00 */ rlwinm r11, r5, 0, 0, 0
+/* 801D2C14 001CE874 7C 0B 70 00 */ cmpw r11, r14
+/* 801D2C18 001CE878 40 82 00 14 */ bne lbl_801D2C2C
+/* 801D2C1C 001CE87C 54 E5 00 00 */ rlwinm r5, r7, 0, 0, 0
+/* 801D2C20 001CE880 7C 0B 28 00 */ cmpw r11, r5
+/* 801D2C24 001CE884 41 82 00 08 */ beq lbl_801D2C2C
+/* 801D2C28 001CE888 38 C0 00 00 */ li r6, 0
+lbl_801D2C2C:
+/* 801D2C2C 001CE88C 2C 06 00 00 */ cmpwi r6, 0
+/* 801D2C30 001CE890 41 82 00 08 */ beq lbl_801D2C38
+/* 801D2C34 001CE894 38 80 00 01 */ li r4, 1
+lbl_801D2C38:
+/* 801D2C38 001CE898 2C 04 00 00 */ cmpwi r4, 0
+/* 801D2C3C 001CE89C 41 82 00 28 */ beq lbl_801D2C64
+/* 801D2C40 001CE8A0 54 E4 00 01 */ rlwinm. r4, r7, 0, 0, 0
+/* 801D2C44 001CE8A4 38 A0 00 01 */ li r5, 1
+/* 801D2C48 001CE8A8 40 82 00 10 */ bne lbl_801D2C58
+/* 801D2C4C 001CE8AC 55 04 00 01 */ rlwinm. r4, r8, 0, 0, 0
+/* 801D2C50 001CE8B0 41 82 00 08 */ beq lbl_801D2C58
+/* 801D2C54 001CE8B4 38 A0 00 00 */ li r5, 0
+lbl_801D2C58:
+/* 801D2C58 001CE8B8 2C 05 00 00 */ cmpwi r5, 0
+/* 801D2C5C 001CE8BC 41 82 00 08 */ beq lbl_801D2C64
+/* 801D2C60 001CE8C0 38 60 00 01 */ li r3, 1
+lbl_801D2C64:
+/* 801D2C64 001CE8C4 2C 03 00 00 */ cmpwi r3, 0
+/* 801D2C68 001CE8C8 41 82 00 74 */ beq lbl_801D2CDC
+/* 801D2C6C 001CE8CC 38 8A 00 08 */ addi r4, r10, 8
+/* 801D2C70 001CE8D0 55 45 10 3A */ slwi r5, r10, 2
+/* 801D2C74 001CE8D4 7C 80 20 50 */ subf r4, r0, r4
+/* 801D2C78 001CE8D8 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D2C7C 001CE8DC 54 84 E8 FE */ srwi r4, r4, 3
+/* 801D2C80 001CE8E0 7C 63 2A 14 */ add r3, r3, r5
+/* 801D2C84 001CE8E4 7C 89 03 A6 */ mtctr r4
+/* 801D2C88 001CE8E8 7C 0A 00 00 */ cmpw r10, r0
+/* 801D2C8C 001CE8EC 41 80 00 50 */ blt lbl_801D2CDC
+lbl_801D2C90:
+/* 801D2C90 001CE8F0 80 83 00 00 */ lwz r4, 0(r3)
+/* 801D2C94 001CE8F4 39 4A FF F8 */ addi r10, r10, -8
+/* 801D2C98 001CE8F8 80 03 FF FC */ lwz r0, -4(r3)
+/* 801D2C9C 001CE8FC 7D 29 23 78 */ or r9, r9, r4
+/* 801D2CA0 001CE900 80 83 FF F8 */ lwz r4, -8(r3)
+/* 801D2CA4 001CE904 7D 29 03 78 */ or r9, r9, r0
+/* 801D2CA8 001CE908 80 03 FF F4 */ lwz r0, -0xc(r3)
+/* 801D2CAC 001CE90C 7D 29 23 78 */ or r9, r9, r4
+/* 801D2CB0 001CE910 80 83 FF F0 */ lwz r4, -0x10(r3)
+/* 801D2CB4 001CE914 7D 29 03 78 */ or r9, r9, r0
+/* 801D2CB8 001CE918 80 03 FF EC */ lwz r0, -0x14(r3)
+/* 801D2CBC 001CE91C 7D 29 23 78 */ or r9, r9, r4
+/* 801D2CC0 001CE920 80 83 FF E8 */ lwz r4, -0x18(r3)
+/* 801D2CC4 001CE924 7D 29 03 78 */ or r9, r9, r0
+/* 801D2CC8 001CE928 80 03 FF E4 */ lwz r0, -0x1c(r3)
+/* 801D2CCC 001CE92C 7D 29 23 78 */ or r9, r9, r4
+/* 801D2CD0 001CE930 38 63 FF E0 */ addi r3, r3, -32
+/* 801D2CD4 001CE934 7D 29 03 78 */ or r9, r9, r0
+/* 801D2CD8 001CE938 42 00 FF B8 */ bdnz lbl_801D2C90
+lbl_801D2CDC:
+/* 801D2CDC 001CE93C 38 0A 00 01 */ addi r0, r10, 1
+/* 801D2CE0 001CE940 55 43 10 3A */ slwi r3, r10, 2
+/* 801D2CE4 001CE944 38 81 00 10 */ addi r4, r1, 0x10
+/* 801D2CE8 001CE948 7C 15 00 50 */ subf r0, r21, r0
+/* 801D2CEC 001CE94C 7C 84 1A 14 */ add r4, r4, r3
+/* 801D2CF0 001CE950 7C 09 03 A6 */ mtctr r0
+/* 801D2CF4 001CE954 7C 0A A8 00 */ cmpw r10, r21
+/* 801D2CF8 001CE958 41 80 00 18 */ blt lbl_801D2D10
+lbl_801D2CFC:
+/* 801D2CFC 001CE95C 80 04 00 00 */ lwz r0, 0(r4)
+/* 801D2D00 001CE960 38 84 FF FC */ addi r4, r4, -4
+/* 801D2D04 001CE964 39 4A FF FF */ addi r10, r10, -1
+/* 801D2D08 001CE968 7D 29 03 78 */ or r9, r9, r0
+/* 801D2D0C 001CE96C 42 00 FF F0 */ bdnz lbl_801D2CFC
+lbl_801D2D10:
+/* 801D2D10 001CE970 2C 09 00 00 */ cmpwi r9, 0
+/* 801D2D14 001CE974 40 82 02 3C */ bne lbl_801D2F50
+/* 801D2D18 001CE978 3A 40 00 01 */ li r18, 1
+/* 801D2D1C 001CE97C 48 00 00 08 */ b lbl_801D2D24
+lbl_801D2D20:
+/* 801D2D20 001CE980 3A 52 00 01 */ addi r18, r18, 1
+lbl_801D2D24:
+/* 801D2D24 001CE984 7C 12 A8 50 */ subf r0, r18, r21
+/* 801D2D28 001CE988 54 00 10 3A */ slwi r0, r0, 2
+/* 801D2D2C 001CE98C 7C 1D 00 2E */ lwzx r0, r29, r0
+/* 801D2D30 001CE990 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2D34 001CE994 41 82 FF EC */ beq lbl_801D2D20
+/* 801D2D38 001CE998 39 97 00 01 */ addi r12, r23, 1
+/* 801D2D3C 001CE99C 38 E1 00 60 */ addi r7, r1, 0x60
+/* 801D2D40 001CE9A0 55 83 18 38 */ slwi r3, r12, 3
+/* 801D2D44 001CE9A4 7D 17 92 14 */ add r8, r23, r18
+/* 801D2D48 001CE9A8 55 80 10 3A */ slwi r0, r12, 2
+/* 801D2D4C 001CE9AC 7C BB 02 14 */ add r5, r27, r0
+/* 801D2D50 001CE9B0 7C DA 1A 14 */ add r6, r26, r3
+/* 801D2D54 001CE9B4 7C E7 1A 14 */ add r7, r7, r3
+/* 801D2D58 001CE9B8 48 00 01 E8 */ b lbl_801D2F40
+lbl_801D2D5C:
+/* 801D2D5C 001CE9BC 80 05 00 00 */ lwz r0, 0(r5)
+/* 801D2D60 001CE9C0 2C 96 00 00 */ cmpwi cr1, r22, 0
+/* 801D2D64 001CE9C4 C8 02 94 A8 */ lfd f0, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D2D68 001CE9C8 39 60 00 00 */ li r11, 0
+/* 801D2D6C 001CE9CC 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D2D70 001CE9D0 90 01 02 4C */ stw r0, 0x24c(r1)
+/* 801D2D74 001CE9D4 C8 21 02 48 */ lfd f1, 0x248(r1)
+/* 801D2D78 001CE9D8 FC 21 C8 28 */ fsub f1, f1, f25
+/* 801D2D7C 001CE9DC D8 26 00 00 */ stfd f1, 0(r6)
+/* 801D2D80 001CE9E0 41 84 01 AC */ blt cr1, lbl_801D2F2C
+/* 801D2D84 001CE9E4 38 16 00 01 */ addi r0, r22, 1
+/* 801D2D88 001CE9E8 38 76 FF F8 */ addi r3, r22, -8
+/* 801D2D8C 001CE9EC 2C 00 00 08 */ cmpwi r0, 8
+/* 801D2D90 001CE9F0 40 81 01 58 */ ble lbl_801D2EE8
+/* 801D2D94 001CE9F4 38 80 00 00 */ li r4, 0
+/* 801D2D98 001CE9F8 39 20 00 00 */ li r9, 0
+/* 801D2D9C 001CE9FC 41 84 00 14 */ blt cr1, lbl_801D2DB0
+/* 801D2DA0 001CEA00 38 1F FF FE */ addi r0, r31, -2
+/* 801D2DA4 001CEA04 7C 16 00 00 */ cmpw r22, r0
+/* 801D2DA8 001CEA08 41 81 00 08 */ bgt lbl_801D2DB0
+/* 801D2DAC 001CEA0C 39 20 00 01 */ li r9, 1
+lbl_801D2DB0:
+/* 801D2DB0 001CEA10 2C 09 00 00 */ cmpwi r9, 0
+/* 801D2DB4 001CEA14 41 82 00 28 */ beq lbl_801D2DDC
+/* 801D2DB8 001CEA18 2C 19 00 00 */ cmpwi r25, 0
+/* 801D2DBC 001CEA1C 38 00 00 01 */ li r0, 1
+/* 801D2DC0 001CEA20 40 82 00 10 */ bne lbl_801D2DD0
+/* 801D2DC4 001CEA24 2C 18 00 00 */ cmpwi r24, 0
+/* 801D2DC8 001CEA28 41 82 00 08 */ beq lbl_801D2DD0
+/* 801D2DCC 001CEA2C 38 00 00 00 */ li r0, 0
+lbl_801D2DD0:
+/* 801D2DD0 001CEA30 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2DD4 001CEA34 41 82 00 08 */ beq lbl_801D2DDC
+/* 801D2DD8 001CEA38 38 80 00 01 */ li r4, 1
+lbl_801D2DDC:
+/* 801D2DDC 001CEA3C 2C 04 00 00 */ cmpwi r4, 0
+/* 801D2DE0 001CEA40 41 82 01 08 */ beq lbl_801D2EE8
+/* 801D2DE4 001CEA44 38 03 00 08 */ addi r0, r3, 8
+/* 801D2DE8 001CEA48 7E 09 83 78 */ mr r9, r16
+/* 801D2DEC 001CEA4C 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D2DF0 001CEA50 7D 56 62 14 */ add r10, r22, r12
+/* 801D2DF4 001CEA54 7C 09 03 A6 */ mtctr r0
+/* 801D2DF8 001CEA58 2C 03 00 00 */ cmpwi r3, 0
+/* 801D2DFC 001CEA5C 41 80 00 EC */ blt lbl_801D2EE8
+lbl_801D2E00:
+/* 801D2E00 001CEA60 7C 0B 50 50 */ subf r0, r11, r10
+/* 801D2E04 001CEA64 38 8B 00 01 */ addi r4, r11, 1
+/* 801D2E08 001CEA68 54 00 18 38 */ slwi r0, r0, 3
+/* 801D2E0C 001CEA6C 38 6B 00 02 */ addi r3, r11, 2
+/* 801D2E10 001CEA70 C8 49 00 00 */ lfd f2, 0(r9)
+/* 801D2E14 001CEA74 7C 63 50 50 */ subf r3, r3, r10
+/* 801D2E18 001CEA78 7C 2F 04 AE */ lfdx f1, r15, r0
+/* 801D2E1C 001CEA7C 7C 84 50 50 */ subf r4, r4, r10
+/* 801D2E20 001CEA80 54 80 18 38 */ slwi r0, r4, 3
+/* 801D2E24 001CEA84 3A 8B 00 07 */ addi r20, r11, 7
+/* 801D2E28 001CEA88 FC 62 00 72 */ fmul f3, f2, f1
+/* 801D2E2C 001CEA8C C8 49 00 08 */ lfd f2, 8(r9)
+/* 801D2E30 001CEA90 7C 2F 04 AE */ lfdx f1, r15, r0
+/* 801D2E34 001CEA94 38 8B 00 03 */ addi r4, r11, 3
+/* 801D2E38 001CEA98 54 63 18 38 */ slwi r3, r3, 3
+/* 801D2E3C 001CEA9C 7E 94 50 50 */ subf r20, r20, r10
+/* 801D2E40 001CEAA0 FC 82 00 72 */ fmul f4, f2, f1
+/* 801D2E44 001CEAA4 7C 04 50 50 */ subf r0, r4, r10
+/* 801D2E48 001CEAA8 7C 2F 1C AE */ lfdx f1, r15, r3
+/* 801D2E4C 001CEAAC 38 8B 00 04 */ addi r4, r11, 4
+/* 801D2E50 001CEAB0 FC 00 18 2A */ fadd f0, f0, f3
+/* 801D2E54 001CEAB4 C8 49 00 10 */ lfd f2, 0x10(r9)
+/* 801D2E58 001CEAB8 FC 62 00 72 */ fmul f3, f2, f1
+/* 801D2E5C 001CEABC 54 00 18 38 */ slwi r0, r0, 3
+/* 801D2E60 001CEAC0 7C 2F 04 AE */ lfdx f1, r15, r0
+/* 801D2E64 001CEAC4 7C 84 50 50 */ subf r4, r4, r10
+/* 801D2E68 001CEAC8 FC 00 20 2A */ fadd f0, f0, f4
+/* 801D2E6C 001CEACC C8 49 00 18 */ lfd f2, 0x18(r9)
+/* 801D2E70 001CEAD0 38 6B 00 05 */ addi r3, r11, 5
+/* 801D2E74 001CEAD4 38 0B 00 06 */ addi r0, r11, 6
+/* 801D2E78 001CEAD8 FC 00 18 2A */ fadd f0, f0, f3
+/* 801D2E7C 001CEADC 7C 63 50 50 */ subf r3, r3, r10
+/* 801D2E80 001CEAE0 FC 42 00 72 */ fmul f2, f2, f1
+/* 801D2E84 001CEAE4 54 84 18 38 */ slwi r4, r4, 3
+/* 801D2E88 001CEAE8 7C 00 50 50 */ subf r0, r0, r10
+/* 801D2E8C 001CEAEC C8 69 00 20 */ lfd f3, 0x20(r9)
+/* 801D2E90 001CEAF0 7C 2F 24 AE */ lfdx f1, r15, r4
+/* 801D2E94 001CEAF4 54 63 18 38 */ slwi r3, r3, 3
+/* 801D2E98 001CEAF8 FC C3 00 72 */ fmul f6, f3, f1
+/* 801D2E9C 001CEAFC 54 00 18 38 */ slwi r0, r0, 3
+/* 801D2EA0 001CEB00 7C 2F 1C AE */ lfdx f1, r15, r3
+/* 801D2EA4 001CEB04 56 94 18 38 */ slwi r20, r20, 3
+/* 801D2EA8 001CEB08 FC 00 10 2A */ fadd f0, f0, f2
+/* 801D2EAC 001CEB0C C8 49 00 28 */ lfd f2, 0x28(r9)
+/* 801D2EB0 001CEB10 FC A2 00 72 */ fmul f5, f2, f1
+/* 801D2EB4 001CEB14 C8 89 00 30 */ lfd f4, 0x30(r9)
+/* 801D2EB8 001CEB18 7C 6F 04 AE */ lfdx f3, r15, r0
+/* 801D2EBC 001CEB1C 39 6B 00 08 */ addi r11, r11, 8
+/* 801D2EC0 001CEB20 FC 00 30 2A */ fadd f0, f0, f6
+/* 801D2EC4 001CEB24 C8 49 00 38 */ lfd f2, 0x38(r9)
+/* 801D2EC8 001CEB28 7C 2F A4 AE */ lfdx f1, r15, r20
+/* 801D2ECC 001CEB2C FC 64 00 F2 */ fmul f3, f4, f3
+/* 801D2ED0 001CEB30 39 29 00 40 */ addi r9, r9, 0x40
+/* 801D2ED4 001CEB34 FC 00 28 2A */ fadd f0, f0, f5
+/* 801D2ED8 001CEB38 FC 22 00 72 */ fmul f1, f2, f1
+/* 801D2EDC 001CEB3C FC 00 18 2A */ fadd f0, f0, f3
+/* 801D2EE0 001CEB40 FC 00 08 2A */ fadd f0, f0, f1
+/* 801D2EE4 001CEB44 42 00 FF 1C */ bdnz lbl_801D2E00
+lbl_801D2EE8:
+/* 801D2EE8 001CEB48 38 96 00 01 */ addi r4, r22, 1
+/* 801D2EEC 001CEB4C 55 63 18 38 */ slwi r3, r11, 3
+/* 801D2EF0 001CEB50 7C 8B 20 50 */ subf r4, r11, r4
+/* 801D2EF4 001CEB54 7C 16 62 14 */ add r0, r22, r12
+/* 801D2EF8 001CEB58 7C 70 1A 14 */ add r3, r16, r3
+/* 801D2EFC 001CEB5C 7C 89 03 A6 */ mtctr r4
+/* 801D2F00 001CEB60 7C 0B B0 00 */ cmpw r11, r22
+/* 801D2F04 001CEB64 41 81 00 28 */ bgt lbl_801D2F2C
+lbl_801D2F08:
+/* 801D2F08 001CEB68 7C 8B 00 50 */ subf r4, r11, r0
+/* 801D2F0C 001CEB6C C8 43 00 00 */ lfd f2, 0(r3)
+/* 801D2F10 001CEB70 54 84 18 38 */ slwi r4, r4, 3
+/* 801D2F14 001CEB74 38 63 00 08 */ addi r3, r3, 8
+/* 801D2F18 001CEB78 7C 2F 24 AE */ lfdx f1, r15, r4
+/* 801D2F1C 001CEB7C 39 6B 00 01 */ addi r11, r11, 1
+/* 801D2F20 001CEB80 FC 22 00 72 */ fmul f1, f2, f1
+/* 801D2F24 001CEB84 FC 00 08 2A */ fadd f0, f0, f1
+/* 801D2F28 001CEB88 42 00 FF E0 */ bdnz lbl_801D2F08
+lbl_801D2F2C:
+/* 801D2F2C 001CEB8C D8 07 00 00 */ stfd f0, 0(r7)
+/* 801D2F30 001CEB90 38 A5 00 04 */ addi r5, r5, 4
+/* 801D2F34 001CEB94 38 C6 00 08 */ addi r6, r6, 8
+/* 801D2F38 001CEB98 38 E7 00 08 */ addi r7, r7, 8
+/* 801D2F3C 001CEB9C 39 8C 00 01 */ addi r12, r12, 1
+lbl_801D2F40:
+/* 801D2F40 001CEBA0 7C 0C 40 00 */ cmpw r12, r8
+/* 801D2F44 001CEBA4 40 81 FE 18 */ ble lbl_801D2D5C
+/* 801D2F48 001CEBA8 7E F7 92 14 */ add r23, r23, r18
+/* 801D2F4C 001CEBAC 4B FF F7 B4 */ b lbl_801D2700
+lbl_801D2F50:
+/* 801D2F50 001CEBB0 C8 02 94 A8 */ lfd f0, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D2F54 001CEBB4 FC 00 B8 00 */ fcmpu cr0, f0, f23
+/* 801D2F58 001CEBB8 40 82 00 38 */ bne lbl_801D2F90
+/* 801D2F5C 001CEBBC 3A F7 FF FF */ addi r23, r23, -1
+/* 801D2F60 001CEBC0 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D2F64 001CEBC4 56 E0 10 3A */ slwi r0, r23, 2
+/* 801D2F68 001CEBC8 3A 73 FF E8 */ addi r19, r19, -24
+/* 801D2F6C 001CEBCC 7C 63 02 14 */ add r3, r3, r0
+/* 801D2F70 001CEBD0 48 00 00 10 */ b lbl_801D2F80
+lbl_801D2F74:
+/* 801D2F74 001CEBD4 38 63 FF FC */ addi r3, r3, -4
+/* 801D2F78 001CEBD8 3A F7 FF FF */ addi r23, r23, -1
+/* 801D2F7C 001CEBDC 3A 73 FF E8 */ addi r19, r19, -24
+lbl_801D2F80:
+/* 801D2F80 001CEBE0 80 03 00 00 */ lwz r0, 0(r3)
+/* 801D2F84 001CEBE4 2C 00 00 00 */ cmpwi r0, 0
+/* 801D2F88 001CEBE8 41 82 FF EC */ beq lbl_801D2F74
+/* 801D2F8C 001CEBEC 48 00 00 A0 */ b lbl_801D302C
+lbl_801D2F90:
+/* 801D2F90 001CEBF0 FC 20 B8 90 */ fmr f1, f23
+/* 801D2F94 001CEBF4 7C 73 00 D0 */ neg r3, r19
+/* 801D2F98 001CEBF8 4B FF DA 29 */ bl scalbn
+/* 801D2F9C 001CEBFC C8 62 94 B8 */ lfd f3, lbl_80641AB8-_SDA2_BASE_(r2)
+/* 801D2FA0 001CEC00 FC 01 18 40 */ fcmpo cr0, f1, f3
+/* 801D2FA4 001CEC04 4C 41 13 82 */ cror 2, 1, 2
+/* 801D2FA8 001CEC08 40 82 00 6C */ bne lbl_801D3014
+/* 801D2FAC 001CEC0C C8 02 94 B0 */ lfd f0, lbl_80641AB0-_SDA2_BASE_(r2)
+/* 801D2FB0 001CEC10 56 E5 10 3A */ slwi r5, r23, 2
+/* 801D2FB4 001CEC14 3A F7 00 01 */ addi r23, r23, 1
+/* 801D2FB8 001CEC18 C8 42 94 E0 */ lfd f2, lbl_80641AE0-_SDA2_BASE_(r2)
+/* 801D2FBC 001CEC1C FC 00 00 72 */ fmul f0, f0, f1
+/* 801D2FC0 001CEC20 38 81 00 10 */ addi r4, r1, 0x10
+/* 801D2FC4 001CEC24 56 E0 10 3A */ slwi r0, r23, 2
+/* 801D2FC8 001CEC28 3A 73 00 18 */ addi r19, r19, 0x18
+/* 801D2FCC 001CEC2C FC 00 00 1E */ fctiwz f0, f0
+/* 801D2FD0 001CEC30 D8 01 02 C8 */ stfd f0, 0x2c8(r1)
+/* 801D2FD4 001CEC34 80 61 02 CC */ lwz r3, 0x2cc(r1)
+/* 801D2FD8 001CEC38 6C 63 80 00 */ xoris r3, r3, 0x8000
+/* 801D2FDC 001CEC3C 90 61 02 44 */ stw r3, 0x244(r1)
+/* 801D2FE0 001CEC40 C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D2FE4 001CEC44 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D2FE8 001CEC48 FC 43 00 32 */ fmul f2, f3, f0
+/* 801D2FEC 001CEC4C FC 00 00 1E */ fctiwz f0, f0
+/* 801D2FF0 001CEC50 FC 21 10 28 */ fsub f1, f1, f2
+/* 801D2FF4 001CEC54 D8 01 02 B8 */ stfd f0, 0x2b8(r1)
+/* 801D2FF8 001CEC58 FC 00 08 1E */ fctiwz f0, f1
+/* 801D2FFC 001CEC5C 80 61 02 BC */ lwz r3, 0x2bc(r1)
+/* 801D3000 001CEC60 D8 01 02 C0 */ stfd f0, 0x2c0(r1)
+/* 801D3004 001CEC64 80 C1 02 C4 */ lwz r6, 0x2c4(r1)
+/* 801D3008 001CEC68 7C C4 29 2E */ stwx r6, r4, r5
+/* 801D300C 001CEC6C 7C 64 01 2E */ stwx r3, r4, r0
+/* 801D3010 001CEC70 48 00 00 1C */ b lbl_801D302C
+lbl_801D3014:
+/* 801D3014 001CEC74 FC 00 08 1E */ fctiwz f0, f1
+/* 801D3018 001CEC78 56 E0 10 3A */ slwi r0, r23, 2
+/* 801D301C 001CEC7C 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D3020 001CEC80 D8 01 02 C8 */ stfd f0, 0x2c8(r1)
+/* 801D3024 001CEC84 80 81 02 CC */ lwz r4, 0x2cc(r1)
+/* 801D3028 001CEC88 7C 83 01 2E */ stwx r4, r3, r0
+lbl_801D302C:
+/* 801D302C 001CEC8C C8 22 94 D8 */ lfd f1, lbl_80641AD8-_SDA2_BASE_(r2)
+/* 801D3030 001CEC90 7E 63 9B 78 */ mr r3, r19
+/* 801D3034 001CEC94 4B FF D9 8D */ bl scalbn
+/* 801D3038 001CEC98 2C 97 00 00 */ cmpwi cr1, r23, 0
+/* 801D303C 001CEC9C 7E E3 BB 78 */ mr r3, r23
+/* 801D3040 001CECA0 41 84 02 04 */ blt cr1, lbl_801D3244
+/* 801D3044 001CECA4 38 17 00 01 */ addi r0, r23, 1
+/* 801D3048 001CECA8 2C 00 00 08 */ cmpwi r0, 8
+/* 801D304C 001CECAC 40 81 01 9C */ ble lbl_801D31E8
+/* 801D3050 001CECB0 38 A0 00 00 */ li r5, 0
+/* 801D3054 001CECB4 38 C0 00 00 */ li r6, 0
+/* 801D3058 001CECB8 41 84 00 18 */ blt cr1, lbl_801D3070
+/* 801D305C 001CECBC 3C 80 80 00 */ lis r4, 0x80000001@ha
+/* 801D3060 001CECC0 38 04 00 01 */ addi r0, r4, 0x80000001@l
+/* 801D3064 001CECC4 7C 17 00 00 */ cmpw r23, r0
+/* 801D3068 001CECC8 41 80 00 08 */ blt lbl_801D3070
+/* 801D306C 001CECCC 38 C0 00 01 */ li r6, 1
+lbl_801D3070:
+/* 801D3070 001CECD0 2C 06 00 00 */ cmpwi r6, 0
+/* 801D3074 001CECD4 41 82 00 2C */ beq lbl_801D30A0
+/* 801D3078 001CECD8 56 E0 00 01 */ rlwinm. r0, r23, 0, 0, 0
+/* 801D307C 001CECDC 38 80 00 01 */ li r4, 1
+/* 801D3080 001CECE0 40 82 00 14 */ bne lbl_801D3094
+/* 801D3084 001CECE4 38 17 00 01 */ addi r0, r23, 1
+/* 801D3088 001CECE8 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D308C 001CECEC 41 82 00 08 */ beq lbl_801D3094
+/* 801D3090 001CECF0 38 80 00 00 */ li r4, 0
+lbl_801D3094:
+/* 801D3094 001CECF4 2C 04 00 00 */ cmpwi r4, 0
+/* 801D3098 001CECF8 41 82 00 08 */ beq lbl_801D30A0
+/* 801D309C 001CECFC 38 A0 00 01 */ li r5, 1
+lbl_801D30A0:
+/* 801D30A0 001CED00 2C 05 00 00 */ cmpwi r5, 0
+/* 801D30A4 001CED04 41 82 01 44 */ beq lbl_801D31E8
+/* 801D30A8 001CED08 56 E5 10 3A */ slwi r5, r23, 2
+/* 801D30AC 001CED0C 38 C1 00 10 */ addi r6, r1, 0x10
+/* 801D30B0 001CED10 56 E4 18 38 */ slwi r4, r23, 3
+/* 801D30B4 001CED14 38 E1 00 60 */ addi r7, r1, 0x60
+/* 801D30B8 001CED18 56 E0 E8 FE */ srwi r0, r23, 3
+/* 801D30BC 001CED1C 7C C6 2A 14 */ add r6, r6, r5
+/* 801D30C0 001CED20 7C E7 22 14 */ add r7, r7, r4
+/* 801D30C4 001CED24 C9 42 94 E0 */ lfd f10, lbl_80641AE0-_SDA2_BASE_(r2)
+/* 801D30C8 001CED28 C9 02 94 B0 */ lfd f8, lbl_80641AB0-_SDA2_BASE_(r2)
+/* 801D30CC 001CED2C 7C 09 03 A6 */ mtctr r0
+/* 801D30D0 001CED30 2C 17 00 08 */ cmpwi r23, 8
+/* 801D30D4 001CED34 41 80 01 14 */ blt lbl_801D31E8
+lbl_801D30D8:
+/* 801D30D8 001CED38 80 86 00 00 */ lwz r4, 0(r6)
+/* 801D30DC 001CED3C 38 63 FF F8 */ addi r3, r3, -8
+/* 801D30E0 001CED40 80 06 FF FC */ lwz r0, -4(r6)
+/* 801D30E4 001CED44 6C 85 80 00 */ xoris r5, r4, 0x8000
+/* 801D30E8 001CED48 80 86 FF F8 */ lwz r4, -8(r6)
+/* 801D30EC 001CED4C 90 A1 02 4C */ stw r5, 0x24c(r1)
+/* 801D30F0 001CED50 6C 05 80 00 */ xoris r5, r0, 0x8000
+/* 801D30F4 001CED54 6C 84 80 00 */ xoris r4, r4, 0x8000
+/* 801D30F8 001CED58 80 06 FF F4 */ lwz r0, -0xc(r6)
+/* 801D30FC 001CED5C C8 01 02 48 */ lfd f0, 0x248(r1)
+/* 801D3100 001CED60 90 A1 02 44 */ stw r5, 0x244(r1)
+/* 801D3104 001CED64 6C 05 80 00 */ xoris r5, r0, 0x8000
+/* 801D3108 001CED68 FC 00 50 28 */ fsub f0, f0, f10
+/* 801D310C 001CED6C 80 06 FF F0 */ lwz r0, -0x10(r6)
+/* 801D3110 001CED70 C8 41 02 40 */ lfd f2, 0x240(r1)
+/* 801D3114 001CED74 90 81 02 4C */ stw r4, 0x24c(r1)
+/* 801D3118 001CED78 6C 04 80 00 */ xoris r4, r0, 0x8000
+/* 801D311C 001CED7C FD 21 00 32 */ fmul f9, f1, f0
+/* 801D3120 001CED80 C8 01 02 48 */ lfd f0, 0x248(r1)
+/* 801D3124 001CED84 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D3128 001CED88 90 A1 02 44 */ stw r5, 0x244(r1)
+/* 801D312C 001CED8C 80 06 FF EC */ lwz r0, -0x14(r6)
+/* 801D3130 001CED90 FC 42 50 28 */ fsub f2, f2, f10
+/* 801D3134 001CED94 FC 60 50 28 */ fsub f3, f0, f10
+/* 801D3138 001CED98 C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D313C 001CED9C FC E1 00 B2 */ fmul f7, f1, f2
+/* 801D3140 001CEDA0 90 81 02 4C */ stw r4, 0x24c(r1)
+/* 801D3144 001CEDA4 6C 05 80 00 */ xoris r5, r0, 0x8000
+/* 801D3148 001CEDA8 80 86 FF E8 */ lwz r4, -0x18(r6)
+/* 801D314C 001CEDAC FC 21 02 32 */ fmul f1, f1, f8
+/* 801D3150 001CEDB0 80 06 FF E4 */ lwz r0, -0x1c(r6)
+/* 801D3154 001CEDB4 C8 41 02 48 */ lfd f2, 0x248(r1)
+/* 801D3158 001CEDB8 FC A0 50 28 */ fsub f5, f0, f10
+/* 801D315C 001CEDBC FC C1 00 F2 */ fmul f6, f1, f3
+/* 801D3160 001CEDC0 90 A1 02 44 */ stw r5, 0x244(r1)
+/* 801D3164 001CEDC4 6C 84 80 00 */ xoris r4, r4, 0x8000
+/* 801D3168 001CEDC8 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D316C 001CEDCC C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D3170 001CEDD0 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D3174 001CEDD4 D9 27 00 00 */ stfd f9, 0(r7)
+/* 801D3178 001CEDD8 FC 82 50 28 */ fsub f4, f2, f10
+/* 801D317C 001CEDDC FC 60 50 28 */ fsub f3, f0, f10
+/* 801D3180 001CEDE0 38 C6 FF E0 */ addi r6, r6, -32
+/* 801D3184 001CEDE4 FC A1 01 72 */ fmul f5, f1, f5
+/* 801D3188 001CEDE8 90 81 02 4C */ stw r4, 0x24c(r1)
+/* 801D318C 001CEDEC FC 21 02 32 */ fmul f1, f1, f8
+/* 801D3190 001CEDF0 C8 01 02 48 */ lfd f0, 0x248(r1)
+/* 801D3194 001CEDF4 D8 E7 FF F8 */ stfd f7, -8(r7)
+/* 801D3198 001CEDF8 FC 40 50 28 */ fsub f2, f0, f10
+/* 801D319C 001CEDFC FC 81 01 32 */ fmul f4, f1, f4
+/* 801D31A0 001CEE00 90 01 02 44 */ stw r0, 0x244(r1)
+/* 801D31A4 001CEE04 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D31A8 001CEE08 D8 C7 FF F0 */ stfd f6, -0x10(r7)
+/* 801D31AC 001CEE0C C8 01 02 40 */ lfd f0, 0x240(r1)
+/* 801D31B0 001CEE10 D8 A7 FF E8 */ stfd f5, -0x18(r7)
+/* 801D31B4 001CEE14 FC 00 50 28 */ fsub f0, f0, f10
+/* 801D31B8 001CEE18 FC 61 00 F2 */ fmul f3, f1, f3
+/* 801D31BC 001CEE1C D8 87 FF E0 */ stfd f4, -0x20(r7)
+/* 801D31C0 001CEE20 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D31C4 001CEE24 D8 67 FF D8 */ stfd f3, -0x28(r7)
+/* 801D31C8 001CEE28 FC 41 00 B2 */ fmul f2, f1, f2
+/* 801D31CC 001CEE2C FC 21 02 32 */ fmul f1, f1, f8
+/* 801D31D0 001CEE30 D8 47 FF D0 */ stfd f2, -0x30(r7)
+/* 801D31D4 001CEE34 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D31D8 001CEE38 FC 21 02 32 */ fmul f1, f1, f8
+/* 801D31DC 001CEE3C D8 07 FF C8 */ stfd f0, -0x38(r7)
+/* 801D31E0 001CEE40 38 E7 FF C0 */ addi r7, r7, -64
+/* 801D31E4 001CEE44 42 00 FE F4 */ bdnz lbl_801D30D8
+lbl_801D31E8:
+/* 801D31E8 001CEE48 54 65 10 3A */ slwi r5, r3, 2
+/* 801D31EC 001CEE4C 38 C1 00 10 */ addi r6, r1, 0x10
+/* 801D31F0 001CEE50 54 64 18 38 */ slwi r4, r3, 3
+/* 801D31F4 001CEE54 38 E1 00 60 */ addi r7, r1, 0x60
+/* 801D31F8 001CEE58 38 03 00 01 */ addi r0, r3, 1
+/* 801D31FC 001CEE5C 7C C6 2A 14 */ add r6, r6, r5
+/* 801D3200 001CEE60 7C E7 22 14 */ add r7, r7, r4
+/* 801D3204 001CEE64 C8 62 94 E0 */ lfd f3, lbl_80641AE0-_SDA2_BASE_(r2)
+/* 801D3208 001CEE68 C8 02 94 B0 */ lfd f0, lbl_80641AB0-_SDA2_BASE_(r2)
+/* 801D320C 001CEE6C 7C 09 03 A6 */ mtctr r0
+/* 801D3210 001CEE70 2C 03 00 00 */ cmpwi r3, 0
+/* 801D3214 001CEE74 41 80 00 30 */ blt lbl_801D3244
+lbl_801D3218:
+/* 801D3218 001CEE78 80 06 00 00 */ lwz r0, 0(r6)
+/* 801D321C 001CEE7C 38 C6 FF FC */ addi r6, r6, -4
+/* 801D3220 001CEE80 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D3224 001CEE84 90 01 02 4C */ stw r0, 0x24c(r1)
+/* 801D3228 001CEE88 C8 41 02 48 */ lfd f2, 0x248(r1)
+/* 801D322C 001CEE8C FC 42 18 28 */ fsub f2, f2, f3
+/* 801D3230 001CEE90 FC 41 00 B2 */ fmul f2, f1, f2
+/* 801D3234 001CEE94 FC 21 00 32 */ fmul f1, f1, f0
+/* 801D3238 001CEE98 D8 47 00 00 */ stfd f2, 0(r7)
+/* 801D323C 001CEE9C 38 E7 FF F8 */ addi r7, r7, -8
+/* 801D3240 001CEEA0 42 00 FF D8 */ bdnz lbl_801D3218
+lbl_801D3244:
+/* 801D3244 001CEEA4 38 17 00 01 */ addi r0, r23, 1
+/* 801D3248 001CEEA8 7E E8 BB 78 */ mr r8, r23
+/* 801D324C 001CEEAC 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3250 001CEEB0 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3254 001CEEB4 3C A0 80 40 */ lis r5, 0x8040
+/* 801D3258 001CEEB8 7C 09 03 A6 */ mtctr r0
+/* 801D325C 001CEEBC 2C 17 00 00 */ cmpwi r23, 0
+/* 801D3260 001CEEC0 41 80 00 60 */ blt lbl_801D32C0
+lbl_801D3264:
+/* 801D3264 001CEEC4 38 C1 00 60 */ addi r6, r1, 0x60
+/* 801D3268 001CEEC8 C8 42 94 A8 */ lfd f2, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D326C 001CEECC 7C C6 1A 14 */ add r6, r6, r3
+/* 801D3270 001CEED0 38 E5 D5 00 */ addi r7, r5, -11008
+/* 801D3274 001CEED4 7C 08 B8 50 */ subf r0, r8, r23
+/* 801D3278 001CEED8 39 20 00 00 */ li r9, 0
+/* 801D327C 001CEEDC 48 00 00 20 */ b lbl_801D329C
+lbl_801D3280:
+/* 801D3280 001CEEE0 C8 27 00 00 */ lfd f1, 0(r7)
+/* 801D3284 001CEEE4 38 E7 00 08 */ addi r7, r7, 8
+/* 801D3288 001CEEE8 C8 06 00 00 */ lfd f0, 0(r6)
+/* 801D328C 001CEEEC 38 C6 00 08 */ addi r6, r6, 8
+/* 801D3290 001CEEF0 39 29 00 01 */ addi r9, r9, 1
+/* 801D3294 001CEEF4 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D3298 001CEEF8 FC 42 00 2A */ fadd f2, f2, f0
+lbl_801D329C:
+/* 801D329C 001CEEFC 7C 09 A8 00 */ cmpw r9, r21
+/* 801D32A0 001CEF00 41 81 00 0C */ bgt lbl_801D32AC
+/* 801D32A4 001CEF04 7C 09 00 00 */ cmpw r9, r0
+/* 801D32A8 001CEF08 40 81 FF D8 */ ble lbl_801D3280
+lbl_801D32AC:
+/* 801D32AC 001CEF0C 54 00 18 38 */ slwi r0, r0, 3
+/* 801D32B0 001CEF10 38 63 FF F8 */ addi r3, r3, -8
+/* 801D32B4 001CEF14 7C 44 05 AE */ stfdx f2, r4, r0
+/* 801D32B8 001CEF18 39 08 FF FF */ addi r8, r8, -1
+/* 801D32BC 001CEF1C 42 00 FF A8 */ bdnz lbl_801D3264
+lbl_801D32C0:
+/* 801D32C0 001CEF20 80 01 00 08 */ lwz r0, 8(r1)
+/* 801D32C4 001CEF24 2C 00 00 03 */ cmpwi r0, 3
+/* 801D32C8 001CEF28 41 82 03 B8 */ beq lbl_801D3680
+/* 801D32CC 001CEF2C 40 80 08 08 */ bge lbl_801D3AD4
+/* 801D32D0 001CEF30 2C 00 00 00 */ cmpwi r0, 0
+/* 801D32D4 001CEF34 41 82 00 0C */ beq lbl_801D32E0
+/* 801D32D8 001CEF38 40 80 01 24 */ bge lbl_801D33FC
+/* 801D32DC 001CEF3C 48 00 07 F8 */ b lbl_801D3AD4
+lbl_801D32E0:
+/* 801D32E0 001CEF40 2C 97 00 00 */ cmpwi cr1, r23, 0
+/* 801D32E4 001CEF44 C8 C2 94 A8 */ lfd f6, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D32E8 001CEF48 41 84 00 FC */ blt cr1, lbl_801D33E4
+/* 801D32EC 001CEF4C 38 17 00 01 */ addi r0, r23, 1
+/* 801D32F0 001CEF50 2C 00 00 08 */ cmpwi r0, 8
+/* 801D32F4 001CEF54 40 81 00 C4 */ ble lbl_801D33B8
+/* 801D32F8 001CEF58 38 80 00 00 */ li r4, 0
+/* 801D32FC 001CEF5C 38 A0 00 00 */ li r5, 0
+/* 801D3300 001CEF60 41 84 00 18 */ blt cr1, lbl_801D3318
+/* 801D3304 001CEF64 3C 60 80 00 */ lis r3, 0x80000001@ha
+/* 801D3308 001CEF68 38 03 00 01 */ addi r0, r3, 0x80000001@l
+/* 801D330C 001CEF6C 7C 17 00 00 */ cmpw r23, r0
+/* 801D3310 001CEF70 41 80 00 08 */ blt lbl_801D3318
+/* 801D3314 001CEF74 38 A0 00 01 */ li r5, 1
+lbl_801D3318:
+/* 801D3318 001CEF78 2C 05 00 00 */ cmpwi r5, 0
+/* 801D331C 001CEF7C 41 82 00 2C */ beq lbl_801D3348
+/* 801D3320 001CEF80 56 E0 00 01 */ rlwinm. r0, r23, 0, 0, 0
+/* 801D3324 001CEF84 38 60 00 01 */ li r3, 1
+/* 801D3328 001CEF88 40 82 00 14 */ bne lbl_801D333C
+/* 801D332C 001CEF8C 38 17 00 01 */ addi r0, r23, 1
+/* 801D3330 001CEF90 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D3334 001CEF94 41 82 00 08 */ beq lbl_801D333C
+/* 801D3338 001CEF98 38 60 00 00 */ li r3, 0
+lbl_801D333C:
+/* 801D333C 001CEF9C 2C 03 00 00 */ cmpwi r3, 0
+/* 801D3340 001CEFA0 41 82 00 08 */ beq lbl_801D3348
+/* 801D3344 001CEFA4 38 80 00 01 */ li r4, 1
+lbl_801D3348:
+/* 801D3348 001CEFA8 2C 04 00 00 */ cmpwi r4, 0
+/* 801D334C 001CEFAC 41 82 00 6C */ beq lbl_801D33B8
+/* 801D3350 001CEFB0 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3354 001CEFB4 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3358 001CEFB8 56 E0 E8 FE */ srwi r0, r23, 3
+/* 801D335C 001CEFBC 7C 84 1A 14 */ add r4, r4, r3
+/* 801D3360 001CEFC0 7C 09 03 A6 */ mtctr r0
+/* 801D3364 001CEFC4 2C 17 00 08 */ cmpwi r23, 8
+/* 801D3368 001CEFC8 41 80 00 50 */ blt lbl_801D33B8
+lbl_801D336C:
+/* 801D336C 001CEFCC C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D3370 001CEFD0 3A F7 FF F8 */ addi r23, r23, -8
+/* 801D3374 001CEFD4 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D3378 001CEFD8 FC C6 08 2A */ fadd f6, f6, f1
+/* 801D337C 001CEFDC C8 A4 FF F0 */ lfd f5, -0x10(r4)
+/* 801D3380 001CEFE0 C8 84 FF E8 */ lfd f4, -0x18(r4)
+/* 801D3384 001CEFE4 C8 64 FF E0 */ lfd f3, -0x20(r4)
+/* 801D3388 001CEFE8 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D338C 001CEFEC C8 44 FF D8 */ lfd f2, -0x28(r4)
+/* 801D3390 001CEFF0 C8 24 FF D0 */ lfd f1, -0x30(r4)
+/* 801D3394 001CEFF4 C8 04 FF C8 */ lfd f0, -0x38(r4)
+/* 801D3398 001CEFF8 38 84 FF C0 */ addi r4, r4, -64
+/* 801D339C 001CEFFC FC C6 28 2A */ fadd f6, f6, f5
+/* 801D33A0 001CF000 FC C6 20 2A */ fadd f6, f6, f4
+/* 801D33A4 001CF004 FC C6 18 2A */ fadd f6, f6, f3
+/* 801D33A8 001CF008 FC C6 10 2A */ fadd f6, f6, f2
+/* 801D33AC 001CF00C FC C6 08 2A */ fadd f6, f6, f1
+/* 801D33B0 001CF010 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D33B4 001CF014 42 00 FF B8 */ bdnz lbl_801D336C
+lbl_801D33B8:
+/* 801D33B8 001CF018 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D33BC 001CF01C 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D33C0 001CF020 38 17 00 01 */ addi r0, r23, 1
+/* 801D33C4 001CF024 7C 84 1A 14 */ add r4, r4, r3
+/* 801D33C8 001CF028 7C 09 03 A6 */ mtctr r0
+/* 801D33CC 001CF02C 2C 17 00 00 */ cmpwi r23, 0
+/* 801D33D0 001CF030 41 80 00 14 */ blt lbl_801D33E4
+lbl_801D33D4:
+/* 801D33D4 001CF034 C8 04 00 00 */ lfd f0, 0(r4)
+/* 801D33D8 001CF038 38 84 FF F8 */ addi r4, r4, -8
+/* 801D33DC 001CF03C FC C6 00 2A */ fadd f6, f6, f0
+/* 801D33E0 001CF040 42 00 FF F4 */ bdnz lbl_801D33D4
+lbl_801D33E4:
+/* 801D33E4 001CF044 2C 12 00 00 */ cmpwi r18, 0
+/* 801D33E8 001CF048 40 82 00 08 */ bne lbl_801D33F0
+/* 801D33EC 001CF04C 48 00 00 08 */ b lbl_801D33F4
+lbl_801D33F0:
+/* 801D33F0 001CF050 FC C0 30 50 */ fneg f6, f6
+lbl_801D33F4:
+/* 801D33F4 001CF054 D8 D1 00 00 */ stfd f6, 0(r17)
+/* 801D33F8 001CF058 48 00 06 DC */ b lbl_801D3AD4
+lbl_801D33FC:
+/* 801D33FC 001CF05C 2C 97 00 00 */ cmpwi cr1, r23, 0
+/* 801D3400 001CF060 C8 C2 94 A8 */ lfd f6, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D3404 001CF064 7E E6 BB 78 */ mr r6, r23
+/* 801D3408 001CF068 41 84 00 FC */ blt cr1, lbl_801D3504
+/* 801D340C 001CF06C 38 17 00 01 */ addi r0, r23, 1
+/* 801D3410 001CF070 2C 00 00 08 */ cmpwi r0, 8
+/* 801D3414 001CF074 40 81 00 C4 */ ble lbl_801D34D8
+/* 801D3418 001CF078 38 80 00 00 */ li r4, 0
+/* 801D341C 001CF07C 38 A0 00 00 */ li r5, 0
+/* 801D3420 001CF080 41 84 00 18 */ blt cr1, lbl_801D3438
+/* 801D3424 001CF084 3C 60 80 00 */ lis r3, 0x80000001@ha
+/* 801D3428 001CF088 38 03 00 01 */ addi r0, r3, 0x80000001@l
+/* 801D342C 001CF08C 7C 17 00 00 */ cmpw r23, r0
+/* 801D3430 001CF090 41 80 00 08 */ blt lbl_801D3438
+/* 801D3434 001CF094 38 A0 00 01 */ li r5, 1
+lbl_801D3438:
+/* 801D3438 001CF098 2C 05 00 00 */ cmpwi r5, 0
+/* 801D343C 001CF09C 41 82 00 2C */ beq lbl_801D3468
+/* 801D3440 001CF0A0 56 E0 00 01 */ rlwinm. r0, r23, 0, 0, 0
+/* 801D3444 001CF0A4 38 60 00 01 */ li r3, 1
+/* 801D3448 001CF0A8 40 82 00 14 */ bne lbl_801D345C
+/* 801D344C 001CF0AC 38 17 00 01 */ addi r0, r23, 1
+/* 801D3450 001CF0B0 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D3454 001CF0B4 41 82 00 08 */ beq lbl_801D345C
+/* 801D3458 001CF0B8 38 60 00 00 */ li r3, 0
+lbl_801D345C:
+/* 801D345C 001CF0BC 2C 03 00 00 */ cmpwi r3, 0
+/* 801D3460 001CF0C0 41 82 00 08 */ beq lbl_801D3468
+/* 801D3464 001CF0C4 38 80 00 01 */ li r4, 1
+lbl_801D3468:
+/* 801D3468 001CF0C8 2C 04 00 00 */ cmpwi r4, 0
+/* 801D346C 001CF0CC 41 82 00 6C */ beq lbl_801D34D8
+/* 801D3470 001CF0D0 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3474 001CF0D4 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3478 001CF0D8 56 E0 E8 FE */ srwi r0, r23, 3
+/* 801D347C 001CF0DC 7C 84 1A 14 */ add r4, r4, r3
+/* 801D3480 001CF0E0 7C 09 03 A6 */ mtctr r0
+/* 801D3484 001CF0E4 2C 17 00 08 */ cmpwi r23, 8
+/* 801D3488 001CF0E8 41 80 00 50 */ blt lbl_801D34D8
+lbl_801D348C:
+/* 801D348C 001CF0EC C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D3490 001CF0F0 38 C6 FF F8 */ addi r6, r6, -8
+/* 801D3494 001CF0F4 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D3498 001CF0F8 FC C6 08 2A */ fadd f6, f6, f1
+/* 801D349C 001CF0FC C8 A4 FF F0 */ lfd f5, -0x10(r4)
+/* 801D34A0 001CF100 C8 84 FF E8 */ lfd f4, -0x18(r4)
+/* 801D34A4 001CF104 C8 64 FF E0 */ lfd f3, -0x20(r4)
+/* 801D34A8 001CF108 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D34AC 001CF10C C8 44 FF D8 */ lfd f2, -0x28(r4)
+/* 801D34B0 001CF110 C8 24 FF D0 */ lfd f1, -0x30(r4)
+/* 801D34B4 001CF114 C8 04 FF C8 */ lfd f0, -0x38(r4)
+/* 801D34B8 001CF118 38 84 FF C0 */ addi r4, r4, -64
+/* 801D34BC 001CF11C FC C6 28 2A */ fadd f6, f6, f5
+/* 801D34C0 001CF120 FC C6 20 2A */ fadd f6, f6, f4
+/* 801D34C4 001CF124 FC C6 18 2A */ fadd f6, f6, f3
+/* 801D34C8 001CF128 FC C6 10 2A */ fadd f6, f6, f2
+/* 801D34CC 001CF12C FC C6 08 2A */ fadd f6, f6, f1
+/* 801D34D0 001CF130 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D34D4 001CF134 42 00 FF B8 */ bdnz lbl_801D348C
+lbl_801D34D8:
+/* 801D34D8 001CF138 54 C3 18 38 */ slwi r3, r6, 3
+/* 801D34DC 001CF13C 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D34E0 001CF140 38 06 00 01 */ addi r0, r6, 1
+/* 801D34E4 001CF144 7C 84 1A 14 */ add r4, r4, r3
+/* 801D34E8 001CF148 7C 09 03 A6 */ mtctr r0
+/* 801D34EC 001CF14C 2C 06 00 00 */ cmpwi r6, 0
+/* 801D34F0 001CF150 41 80 00 14 */ blt lbl_801D3504
+lbl_801D34F4:
+/* 801D34F4 001CF154 C8 04 00 00 */ lfd f0, 0(r4)
+/* 801D34F8 001CF158 38 84 FF F8 */ addi r4, r4, -8
+/* 801D34FC 001CF15C FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3500 001CF160 42 00 FF F4 */ bdnz lbl_801D34F4
+lbl_801D3504:
+/* 801D3504 001CF164 2C 12 00 00 */ cmpwi r18, 0
+/* 801D3508 001CF168 40 82 00 0C */ bne lbl_801D3514
+/* 801D350C 001CF16C FC 20 30 90 */ fmr f1, f6
+/* 801D3510 001CF170 48 00 00 08 */ b lbl_801D3518
+lbl_801D3514:
+/* 801D3514 001CF174 FC 20 30 50 */ fneg f1, f6
+lbl_801D3518:
+/* 801D3518 001CF178 C8 01 01 00 */ lfd f0, 0x100(r1)
+/* 801D351C 001CF17C 2C 97 00 01 */ cmpwi cr1, r23, 1
+/* 801D3520 001CF180 D8 31 00 00 */ stfd f1, 0(r17)
+/* 801D3524 001CF184 39 00 00 01 */ li r8, 1
+/* 801D3528 001CF188 FC C0 30 28 */ fsub f6, f0, f6
+/* 801D352C 001CF18C 41 84 01 3C */ blt cr1, lbl_801D3668
+/* 801D3530 001CF190 2C 17 00 08 */ cmpwi r23, 8
+/* 801D3534 001CF194 38 97 FF F8 */ addi r4, r23, -8
+/* 801D3538 001CF198 40 81 01 00 */ ble lbl_801D3638
+/* 801D353C 001CF19C 38 A0 00 00 */ li r5, 0
+/* 801D3540 001CF1A0 38 C0 00 00 */ li r6, 0
+/* 801D3544 001CF1A4 38 E0 00 00 */ li r7, 0
+/* 801D3548 001CF1A8 41 84 00 18 */ blt cr1, lbl_801D3560
+/* 801D354C 001CF1AC 3C 60 80 00 */ lis r3, 0x7FFFFFFE@ha
+/* 801D3550 001CF1B0 38 03 FF FE */ addi r0, r3, 0x7FFFFFFE@l
+/* 801D3554 001CF1B4 7C 17 00 00 */ cmpw r23, r0
+/* 801D3558 001CF1B8 41 81 00 08 */ bgt lbl_801D3560
+/* 801D355C 001CF1BC 38 E0 00 01 */ li r7, 1
+lbl_801D3560:
+/* 801D3560 001CF1C0 2C 07 00 00 */ cmpwi r7, 0
+/* 801D3564 001CF1C4 41 82 00 38 */ beq lbl_801D359C
+/* 801D3568 001CF1C8 56 E7 00 00 */ rlwinm r7, r23, 0, 0, 0
+/* 801D356C 001CF1CC 38 60 00 01 */ li r3, 1
+/* 801D3570 001CF1D0 3C 07 80 00 */ addis r0, r7, 0x8000
+/* 801D3574 001CF1D4 28 00 00 00 */ cmplwi r0, 0
+/* 801D3578 001CF1D8 40 82 00 18 */ bne lbl_801D3590
+/* 801D357C 001CF1DC 38 17 FF FF */ addi r0, r23, -1
+/* 801D3580 001CF1E0 54 00 00 00 */ rlwinm r0, r0, 0, 0, 0
+/* 801D3584 001CF1E4 7C 07 00 00 */ cmpw r7, r0
+/* 801D3588 001CF1E8 41 82 00 08 */ beq lbl_801D3590
+/* 801D358C 001CF1EC 38 60 00 00 */ li r3, 0
+lbl_801D3590:
+/* 801D3590 001CF1F0 2C 03 00 00 */ cmpwi r3, 0
+/* 801D3594 001CF1F4 41 82 00 08 */ beq lbl_801D359C
+/* 801D3598 001CF1F8 38 C0 00 01 */ li r6, 1
+lbl_801D359C:
+/* 801D359C 001CF1FC 2C 06 00 00 */ cmpwi r6, 0
+/* 801D35A0 001CF200 41 82 00 2C */ beq lbl_801D35CC
+/* 801D35A4 001CF204 38 17 FF FF */ addi r0, r23, -1
+/* 801D35A8 001CF208 38 60 00 01 */ li r3, 1
+/* 801D35AC 001CF20C 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D35B0 001CF210 40 82 00 10 */ bne lbl_801D35C0
+/* 801D35B4 001CF214 56 E0 00 01 */ rlwinm. r0, r23, 0, 0, 0
+/* 801D35B8 001CF218 41 82 00 08 */ beq lbl_801D35C0
+/* 801D35BC 001CF21C 38 60 00 00 */ li r3, 0
+lbl_801D35C0:
+/* 801D35C0 001CF220 2C 03 00 00 */ cmpwi r3, 0
+/* 801D35C4 001CF224 41 82 00 08 */ beq lbl_801D35CC
+/* 801D35C8 001CF228 38 A0 00 01 */ li r5, 1
+lbl_801D35CC:
+/* 801D35CC 001CF22C 2C 05 00 00 */ cmpwi r5, 0
+/* 801D35D0 001CF230 41 82 00 68 */ beq lbl_801D3638
+/* 801D35D4 001CF234 38 04 00 07 */ addi r0, r4, 7
+/* 801D35D8 001CF238 38 61 01 08 */ addi r3, r1, 0x108
+/* 801D35DC 001CF23C 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D35E0 001CF240 7C 09 03 A6 */ mtctr r0
+/* 801D35E4 001CF244 2C 04 00 01 */ cmpwi r4, 1
+/* 801D35E8 001CF248 41 80 00 50 */ blt lbl_801D3638
+lbl_801D35EC:
+/* 801D35EC 001CF24C C8 23 00 00 */ lfd f1, 0(r3)
+/* 801D35F0 001CF250 39 08 00 08 */ addi r8, r8, 8
+/* 801D35F4 001CF254 C8 03 00 08 */ lfd f0, 8(r3)
+/* 801D35F8 001CF258 FC C6 08 2A */ fadd f6, f6, f1
+/* 801D35FC 001CF25C C8 A3 00 10 */ lfd f5, 0x10(r3)
+/* 801D3600 001CF260 C8 83 00 18 */ lfd f4, 0x18(r3)
+/* 801D3604 001CF264 C8 63 00 20 */ lfd f3, 0x20(r3)
+/* 801D3608 001CF268 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D360C 001CF26C C8 43 00 28 */ lfd f2, 0x28(r3)
+/* 801D3610 001CF270 C8 23 00 30 */ lfd f1, 0x30(r3)
+/* 801D3614 001CF274 C8 03 00 38 */ lfd f0, 0x38(r3)
+/* 801D3618 001CF278 38 63 00 40 */ addi r3, r3, 0x40
+/* 801D361C 001CF27C FC C6 28 2A */ fadd f6, f6, f5
+/* 801D3620 001CF280 FC C6 20 2A */ fadd f6, f6, f4
+/* 801D3624 001CF284 FC C6 18 2A */ fadd f6, f6, f3
+/* 801D3628 001CF288 FC C6 10 2A */ fadd f6, f6, f2
+/* 801D362C 001CF28C FC C6 08 2A */ fadd f6, f6, f1
+/* 801D3630 001CF290 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3634 001CF294 42 00 FF B8 */ bdnz lbl_801D35EC
+lbl_801D3638:
+/* 801D3638 001CF298 38 17 00 01 */ addi r0, r23, 1
+/* 801D363C 001CF29C 55 03 18 38 */ slwi r3, r8, 3
+/* 801D3640 001CF2A0 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3644 001CF2A4 7C 08 00 50 */ subf r0, r8, r0
+/* 801D3648 001CF2A8 7C 84 1A 14 */ add r4, r4, r3
+/* 801D364C 001CF2AC 7C 09 03 A6 */ mtctr r0
+/* 801D3650 001CF2B0 7C 08 B8 00 */ cmpw r8, r23
+/* 801D3654 001CF2B4 41 81 00 14 */ bgt lbl_801D3668
+lbl_801D3658:
+/* 801D3658 001CF2B8 C8 04 00 00 */ lfd f0, 0(r4)
+/* 801D365C 001CF2BC 38 84 00 08 */ addi r4, r4, 8
+/* 801D3660 001CF2C0 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3664 001CF2C4 42 00 FF F4 */ bdnz lbl_801D3658
+lbl_801D3668:
+/* 801D3668 001CF2C8 2C 12 00 00 */ cmpwi r18, 0
+/* 801D366C 001CF2CC 40 82 00 08 */ bne lbl_801D3674
+/* 801D3670 001CF2D0 48 00 00 08 */ b lbl_801D3678
+lbl_801D3674:
+/* 801D3674 001CF2D4 FC C0 30 50 */ fneg f6, f6
+lbl_801D3678:
+/* 801D3678 001CF2D8 D8 D1 00 08 */ stfd f6, 8(r17)
+/* 801D367C 001CF2DC 48 00 04 58 */ b lbl_801D3AD4
+lbl_801D3680:
+/* 801D3680 001CF2E0 2C 97 00 00 */ cmpwi cr1, r23, 0
+/* 801D3684 001CF2E4 7E E5 BB 78 */ mr r5, r23
+/* 801D3688 001CF2E8 40 85 01 38 */ ble cr1, lbl_801D37C0
+/* 801D368C 001CF2EC 2C 17 00 08 */ cmpwi r23, 8
+/* 801D3690 001CF2F0 40 81 00 F8 */ ble lbl_801D3788
+/* 801D3694 001CF2F4 38 80 00 00 */ li r4, 0
+/* 801D3698 001CF2F8 41 84 00 18 */ blt cr1, lbl_801D36B0
+/* 801D369C 001CF2FC 3C 60 80 00 */ lis r3, 0x80000001@ha
+/* 801D36A0 001CF300 38 03 00 01 */ addi r0, r3, 0x80000001@l
+/* 801D36A4 001CF304 7C 17 00 00 */ cmpw r23, r0
+/* 801D36A8 001CF308 41 80 00 08 */ blt lbl_801D36B0
+/* 801D36AC 001CF30C 38 80 00 01 */ li r4, 1
+lbl_801D36B0:
+/* 801D36B0 001CF310 2C 04 00 00 */ cmpwi r4, 0
+/* 801D36B4 001CF314 41 82 00 D4 */ beq lbl_801D3788
+/* 801D36B8 001CF318 38 17 FF FF */ addi r0, r23, -1
+/* 801D36BC 001CF31C 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D36C0 001CF320 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D36C4 001CF324 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D36C8 001CF328 7C 84 1A 14 */ add r4, r4, r3
+/* 801D36CC 001CF32C 7C 09 03 A6 */ mtctr r0
+/* 801D36D0 001CF330 2C 17 00 08 */ cmpwi r23, 8
+/* 801D36D4 001CF334 40 81 00 B4 */ ble lbl_801D3788
+lbl_801D36D8:
+/* 801D36D8 001CF338 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D36DC 001CF33C 38 A5 FF F8 */ addi r5, r5, -8
+/* 801D36E0 001CF340 C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D36E4 001CF344 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D36E8 001CF348 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D36EC 001CF34C FC 01 00 2A */ fadd f0, f1, f0
+/* 801D36F0 001CF350 D8 04 00 00 */ stfd f0, 0(r4)
+/* 801D36F4 001CF354 C8 04 FF F0 */ lfd f0, -0x10(r4)
+/* 801D36F8 001CF358 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D36FC 001CF35C FC 00 08 28 */ fsub f0, f0, f1
+/* 801D3700 001CF360 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D3704 001CF364 D8 04 FF F8 */ stfd f0, -8(r4)
+/* 801D3708 001CF368 C8 04 FF E8 */ lfd f0, -0x18(r4)
+/* 801D370C 001CF36C FC 40 08 2A */ fadd f2, f0, f1
+/* 801D3710 001CF370 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3714 001CF374 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D3718 001CF378 D8 04 FF F0 */ stfd f0, -0x10(r4)
+/* 801D371C 001CF37C C8 04 FF E0 */ lfd f0, -0x20(r4)
+/* 801D3720 001CF380 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D3724 001CF384 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D3728 001CF388 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D372C 001CF38C D8 04 FF E8 */ stfd f0, -0x18(r4)
+/* 801D3730 001CF390 C8 04 FF D8 */ lfd f0, -0x28(r4)
+/* 801D3734 001CF394 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D3738 001CF398 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D373C 001CF39C FC 01 00 2A */ fadd f0, f1, f0
+/* 801D3740 001CF3A0 D8 04 FF E0 */ stfd f0, -0x20(r4)
+/* 801D3744 001CF3A4 C8 04 FF D0 */ lfd f0, -0x30(r4)
+/* 801D3748 001CF3A8 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D374C 001CF3AC FC 00 08 28 */ fsub f0, f0, f1
+/* 801D3750 001CF3B0 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D3754 001CF3B4 D8 04 FF D8 */ stfd f0, -0x28(r4)
+/* 801D3758 001CF3B8 C8 04 FF C8 */ lfd f0, -0x38(r4)
+/* 801D375C 001CF3BC FC 40 08 2A */ fadd f2, f0, f1
+/* 801D3760 001CF3C0 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3764 001CF3C4 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D3768 001CF3C8 D8 04 FF D0 */ stfd f0, -0x30(r4)
+/* 801D376C 001CF3CC C8 04 FF C0 */ lfd f0, -0x40(r4)
+/* 801D3770 001CF3D0 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D3774 001CF3D4 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D3778 001CF3D8 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D377C 001CF3DC D8 04 FF C8 */ stfd f0, -0x38(r4)
+/* 801D3780 001CF3E0 DC 24 FF C0 */ stfdu f1, -0x40(r4)
+/* 801D3784 001CF3E4 42 00 FF 54 */ bdnz lbl_801D36D8
+lbl_801D3788:
+/* 801D3788 001CF3E8 54 A0 18 38 */ slwi r0, r5, 3
+/* 801D378C 001CF3EC 38 61 01 00 */ addi r3, r1, 0x100
+/* 801D3790 001CF3F0 7C 63 02 14 */ add r3, r3, r0
+/* 801D3794 001CF3F4 7C A9 03 A6 */ mtctr r5
+/* 801D3798 001CF3F8 2C 05 00 00 */ cmpwi r5, 0
+/* 801D379C 001CF3FC 40 81 00 24 */ ble lbl_801D37C0
+lbl_801D37A0:
+/* 801D37A0 001CF400 C8 03 FF F8 */ lfd f0, -8(r3)
+/* 801D37A4 001CF404 C8 23 00 00 */ lfd f1, 0(r3)
+/* 801D37A8 001CF408 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D37AC 001CF40C FC 00 10 28 */ fsub f0, f0, f2
+/* 801D37B0 001CF410 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D37B4 001CF414 D8 03 00 00 */ stfd f0, 0(r3)
+/* 801D37B8 001CF418 DC 43 FF F8 */ stfdu f2, -8(r3)
+/* 801D37BC 001CF41C 42 00 FF E4 */ bdnz lbl_801D37A0
+lbl_801D37C0:
+/* 801D37C0 001CF420 2C 97 00 01 */ cmpwi cr1, r23, 1
+/* 801D37C4 001CF424 7E E6 BB 78 */ mr r6, r23
+/* 801D37C8 001CF428 40 85 01 80 */ ble cr1, lbl_801D3948
+/* 801D37CC 001CF42C 38 17 FF FF */ addi r0, r23, -1
+/* 801D37D0 001CF430 2C 00 00 08 */ cmpwi r0, 8
+/* 801D37D4 001CF434 40 81 01 38 */ ble lbl_801D390C
+/* 801D37D8 001CF438 38 80 00 00 */ li r4, 0
+/* 801D37DC 001CF43C 38 A0 00 00 */ li r5, 0
+/* 801D37E0 001CF440 41 84 00 18 */ blt cr1, lbl_801D37F8
+/* 801D37E4 001CF444 3C 60 80 00 */ lis r3, 0x80000001@ha
+/* 801D37E8 001CF448 38 03 00 01 */ addi r0, r3, 0x80000001@l
+/* 801D37EC 001CF44C 7C 17 00 00 */ cmpw r23, r0
+/* 801D37F0 001CF450 41 80 00 08 */ blt lbl_801D37F8
+/* 801D37F4 001CF454 38 A0 00 01 */ li r5, 1
+lbl_801D37F8:
+/* 801D37F8 001CF458 2C 05 00 00 */ cmpwi r5, 0
+/* 801D37FC 001CF45C 41 82 00 38 */ beq lbl_801D3834
+/* 801D3800 001CF460 56 E5 00 00 */ rlwinm r5, r23, 0, 0, 0
+/* 801D3804 001CF464 38 60 00 01 */ li r3, 1
+/* 801D3808 001CF468 3C 05 80 00 */ addis r0, r5, 0x8000
+/* 801D380C 001CF46C 28 00 00 00 */ cmplwi r0, 0
+/* 801D3810 001CF470 40 82 00 18 */ bne lbl_801D3828
+/* 801D3814 001CF474 38 17 FF FF */ addi r0, r23, -1
+/* 801D3818 001CF478 54 00 00 00 */ rlwinm r0, r0, 0, 0, 0
+/* 801D381C 001CF47C 7C 05 00 00 */ cmpw r5, r0
+/* 801D3820 001CF480 41 82 00 08 */ beq lbl_801D3828
+/* 801D3824 001CF484 38 60 00 00 */ li r3, 0
+lbl_801D3828:
+/* 801D3828 001CF488 2C 03 00 00 */ cmpwi r3, 0
+/* 801D382C 001CF48C 41 82 00 08 */ beq lbl_801D3834
+/* 801D3830 001CF490 38 80 00 01 */ li r4, 1
+lbl_801D3834:
+/* 801D3834 001CF494 2C 04 00 00 */ cmpwi r4, 0
+/* 801D3838 001CF498 41 82 00 D4 */ beq lbl_801D390C
+/* 801D383C 001CF49C 38 17 FF FE */ addi r0, r23, -2
+/* 801D3840 001CF4A0 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3844 001CF4A4 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3848 001CF4A8 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D384C 001CF4AC 7C 84 1A 14 */ add r4, r4, r3
+/* 801D3850 001CF4B0 7C 09 03 A6 */ mtctr r0
+/* 801D3854 001CF4B4 2C 17 00 09 */ cmpwi r23, 9
+/* 801D3858 001CF4B8 40 81 00 B4 */ ble lbl_801D390C
+lbl_801D385C:
+/* 801D385C 001CF4BC C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D3860 001CF4C0 38 C6 FF F8 */ addi r6, r6, -8
+/* 801D3864 001CF4C4 C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D3868 001CF4C8 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D386C 001CF4CC FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3870 001CF4D0 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D3874 001CF4D4 D8 04 00 00 */ stfd f0, 0(r4)
+/* 801D3878 001CF4D8 C8 04 FF F0 */ lfd f0, -0x10(r4)
+/* 801D387C 001CF4DC FC 20 10 2A */ fadd f1, f0, f2
+/* 801D3880 001CF4E0 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D3884 001CF4E4 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D3888 001CF4E8 D8 04 FF F8 */ stfd f0, -8(r4)
+/* 801D388C 001CF4EC C8 04 FF E8 */ lfd f0, -0x18(r4)
+/* 801D3890 001CF4F0 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D3894 001CF4F4 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3898 001CF4F8 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D389C 001CF4FC D8 04 FF F0 */ stfd f0, -0x10(r4)
+/* 801D38A0 001CF500 C8 04 FF E0 */ lfd f0, -0x20(r4)
+/* 801D38A4 001CF504 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D38A8 001CF508 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D38AC 001CF50C FC 02 00 2A */ fadd f0, f2, f0
+/* 801D38B0 001CF510 D8 04 FF E8 */ stfd f0, -0x18(r4)
+/* 801D38B4 001CF514 C8 04 FF D8 */ lfd f0, -0x28(r4)
+/* 801D38B8 001CF518 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D38BC 001CF51C FC 00 10 28 */ fsub f0, f0, f2
+/* 801D38C0 001CF520 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D38C4 001CF524 D8 04 FF E0 */ stfd f0, -0x20(r4)
+/* 801D38C8 001CF528 C8 04 FF D0 */ lfd f0, -0x30(r4)
+/* 801D38CC 001CF52C FC 20 10 2A */ fadd f1, f0, f2
+/* 801D38D0 001CF530 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D38D4 001CF534 FC 02 00 2A */ fadd f0, f2, f0
+/* 801D38D8 001CF538 D8 04 FF D8 */ stfd f0, -0x28(r4)
+/* 801D38DC 001CF53C C8 04 FF C8 */ lfd f0, -0x38(r4)
+/* 801D38E0 001CF540 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D38E4 001CF544 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D38E8 001CF548 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D38EC 001CF54C D8 04 FF D0 */ stfd f0, -0x30(r4)
+/* 801D38F0 001CF550 C8 04 FF C0 */ lfd f0, -0x40(r4)
+/* 801D38F4 001CF554 FC 20 10 2A */ fadd f1, f0, f2
+/* 801D38F8 001CF558 FC 00 08 28 */ fsub f0, f0, f1
+/* 801D38FC 001CF55C FC 02 00 2A */ fadd f0, f2, f0
+/* 801D3900 001CF560 D8 04 FF C8 */ stfd f0, -0x38(r4)
+/* 801D3904 001CF564 DC 24 FF C0 */ stfdu f1, -0x40(r4)
+/* 801D3908 001CF568 42 00 FF 54 */ bdnz lbl_801D385C
+lbl_801D390C:
+/* 801D390C 001CF56C 54 C3 18 38 */ slwi r3, r6, 3
+/* 801D3910 001CF570 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3914 001CF574 38 06 FF FF */ addi r0, r6, -1
+/* 801D3918 001CF578 7C 84 1A 14 */ add r4, r4, r3
+/* 801D391C 001CF57C 7C 09 03 A6 */ mtctr r0
+/* 801D3920 001CF580 2C 06 00 01 */ cmpwi r6, 1
+/* 801D3924 001CF584 40 81 00 24 */ ble lbl_801D3948
+lbl_801D3928:
+/* 801D3928 001CF588 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D392C 001CF58C C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D3930 001CF590 FC 40 08 2A */ fadd f2, f0, f1
+/* 801D3934 001CF594 FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3938 001CF598 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D393C 001CF59C D8 04 00 00 */ stfd f0, 0(r4)
+/* 801D3940 001CF5A0 DC 44 FF F8 */ stfdu f2, -8(r4)
+/* 801D3944 001CF5A4 42 00 FF E4 */ bdnz lbl_801D3928
+lbl_801D3948:
+/* 801D3948 001CF5A8 2C 97 00 02 */ cmpwi cr1, r23, 2
+/* 801D394C 001CF5AC C8 C2 94 A8 */ lfd f6, lbl_80641AA8-_SDA2_BASE_(r2)
+/* 801D3950 001CF5B0 41 84 01 44 */ blt cr1, lbl_801D3A94
+/* 801D3954 001CF5B4 38 17 FF FF */ addi r0, r23, -1
+/* 801D3958 001CF5B8 2C 00 00 08 */ cmpwi r0, 8
+/* 801D395C 001CF5BC 40 81 01 0C */ ble lbl_801D3A68
+/* 801D3960 001CF5C0 38 80 00 00 */ li r4, 0
+/* 801D3964 001CF5C4 38 A0 00 00 */ li r5, 0
+/* 801D3968 001CF5C8 38 C0 00 00 */ li r6, 0
+/* 801D396C 001CF5CC 41 84 00 18 */ blt cr1, lbl_801D3984
+/* 801D3970 001CF5D0 3C 60 80 00 */ lis r3, 0x80000001@ha
+/* 801D3974 001CF5D4 38 03 00 01 */ addi r0, r3, 0x80000001@l
+/* 801D3978 001CF5D8 7C 17 00 00 */ cmpw r23, r0
+/* 801D397C 001CF5DC 41 80 00 08 */ blt lbl_801D3984
+/* 801D3980 001CF5E0 38 C0 00 01 */ li r6, 1
+lbl_801D3984:
+/* 801D3984 001CF5E4 2C 06 00 00 */ cmpwi r6, 0
+/* 801D3988 001CF5E8 41 82 00 38 */ beq lbl_801D39C0
+/* 801D398C 001CF5EC 56 E6 00 00 */ rlwinm r6, r23, 0, 0, 0
+/* 801D3990 001CF5F0 38 60 00 01 */ li r3, 1
+/* 801D3994 001CF5F4 3C 06 80 00 */ addis r0, r6, 0x8000
+/* 801D3998 001CF5F8 28 00 00 00 */ cmplwi r0, 0
+/* 801D399C 001CF5FC 40 82 00 18 */ bne lbl_801D39B4
+/* 801D39A0 001CF600 38 17 FF FE */ addi r0, r23, -2
+/* 801D39A4 001CF604 54 00 00 00 */ rlwinm r0, r0, 0, 0, 0
+/* 801D39A8 001CF608 7C 06 00 00 */ cmpw r6, r0
+/* 801D39AC 001CF60C 41 82 00 08 */ beq lbl_801D39B4
+/* 801D39B0 001CF610 38 60 00 00 */ li r3, 0
+lbl_801D39B4:
+/* 801D39B4 001CF614 2C 03 00 00 */ cmpwi r3, 0
+/* 801D39B8 001CF618 41 82 00 08 */ beq lbl_801D39C0
+/* 801D39BC 001CF61C 38 A0 00 01 */ li r5, 1
+lbl_801D39C0:
+/* 801D39C0 001CF620 2C 05 00 00 */ cmpwi r5, 0
+/* 801D39C4 001CF624 41 82 00 30 */ beq lbl_801D39F4
+/* 801D39C8 001CF628 38 17 FF FE */ addi r0, r23, -2
+/* 801D39CC 001CF62C 38 60 00 01 */ li r3, 1
+/* 801D39D0 001CF630 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D39D4 001CF634 40 82 00 14 */ bne lbl_801D39E8
+/* 801D39D8 001CF638 38 17 FF FF */ addi r0, r23, -1
+/* 801D39DC 001CF63C 54 00 00 01 */ rlwinm. r0, r0, 0, 0, 0
+/* 801D39E0 001CF640 41 82 00 08 */ beq lbl_801D39E8
+/* 801D39E4 001CF644 38 60 00 00 */ li r3, 0
+lbl_801D39E8:
+/* 801D39E8 001CF648 2C 03 00 00 */ cmpwi r3, 0
+/* 801D39EC 001CF64C 41 82 00 08 */ beq lbl_801D39F4
+/* 801D39F0 001CF650 38 80 00 01 */ li r4, 1
+lbl_801D39F4:
+/* 801D39F4 001CF654 2C 04 00 00 */ cmpwi r4, 0
+/* 801D39F8 001CF658 41 82 00 70 */ beq lbl_801D3A68
+/* 801D39FC 001CF65C 38 17 FF FE */ addi r0, r23, -2
+/* 801D3A00 001CF660 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3A04 001CF664 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3A08 001CF668 54 00 E8 FE */ srwi r0, r0, 3
+/* 801D3A0C 001CF66C 7C 84 1A 14 */ add r4, r4, r3
+/* 801D3A10 001CF670 7C 09 03 A6 */ mtctr r0
+/* 801D3A14 001CF674 2C 17 00 0A */ cmpwi r23, 0xa
+/* 801D3A18 001CF678 41 80 00 50 */ blt lbl_801D3A68
+lbl_801D3A1C:
+/* 801D3A1C 001CF67C C8 24 00 00 */ lfd f1, 0(r4)
+/* 801D3A20 001CF680 3A F7 FF F8 */ addi r23, r23, -8
+/* 801D3A24 001CF684 C8 04 FF F8 */ lfd f0, -8(r4)
+/* 801D3A28 001CF688 FC C6 08 2A */ fadd f6, f6, f1
+/* 801D3A2C 001CF68C C8 A4 FF F0 */ lfd f5, -0x10(r4)
+/* 801D3A30 001CF690 C8 84 FF E8 */ lfd f4, -0x18(r4)
+/* 801D3A34 001CF694 C8 64 FF E0 */ lfd f3, -0x20(r4)
+/* 801D3A38 001CF698 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3A3C 001CF69C C8 44 FF D8 */ lfd f2, -0x28(r4)
+/* 801D3A40 001CF6A0 C8 24 FF D0 */ lfd f1, -0x30(r4)
+/* 801D3A44 001CF6A4 C8 04 FF C8 */ lfd f0, -0x38(r4)
+/* 801D3A48 001CF6A8 38 84 FF C0 */ addi r4, r4, -64
+/* 801D3A4C 001CF6AC FC C6 28 2A */ fadd f6, f6, f5
+/* 801D3A50 001CF6B0 FC C6 20 2A */ fadd f6, f6, f4
+/* 801D3A54 001CF6B4 FC C6 18 2A */ fadd f6, f6, f3
+/* 801D3A58 001CF6B8 FC C6 10 2A */ fadd f6, f6, f2
+/* 801D3A5C 001CF6BC FC C6 08 2A */ fadd f6, f6, f1
+/* 801D3A60 001CF6C0 FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3A64 001CF6C4 42 00 FF B8 */ bdnz lbl_801D3A1C
+lbl_801D3A68:
+/* 801D3A68 001CF6C8 56 E3 18 38 */ slwi r3, r23, 3
+/* 801D3A6C 001CF6CC 38 81 01 00 */ addi r4, r1, 0x100
+/* 801D3A70 001CF6D0 38 17 FF FF */ addi r0, r23, -1
+/* 801D3A74 001CF6D4 7C 84 1A 14 */ add r4, r4, r3
+/* 801D3A78 001CF6D8 7C 09 03 A6 */ mtctr r0
+/* 801D3A7C 001CF6DC 2C 17 00 02 */ cmpwi r23, 2
+/* 801D3A80 001CF6E0 41 80 00 14 */ blt lbl_801D3A94
+lbl_801D3A84:
+/* 801D3A84 001CF6E4 C8 04 00 00 */ lfd f0, 0(r4)
+/* 801D3A88 001CF6E8 38 84 FF F8 */ addi r4, r4, -8
+/* 801D3A8C 001CF6EC FC C6 00 2A */ fadd f6, f6, f0
+/* 801D3A90 001CF6F0 42 00 FF F4 */ bdnz lbl_801D3A84
+lbl_801D3A94:
+/* 801D3A94 001CF6F4 2C 12 00 00 */ cmpwi r18, 0
+/* 801D3A98 001CF6F8 40 82 00 1C */ bne lbl_801D3AB4
+/* 801D3A9C 001CF6FC C8 21 01 00 */ lfd f1, 0x100(r1)
+/* 801D3AA0 001CF700 C8 01 01 08 */ lfd f0, 0x108(r1)
+/* 801D3AA4 001CF704 D8 31 00 00 */ stfd f1, 0(r17)
+/* 801D3AA8 001CF708 D8 11 00 08 */ stfd f0, 8(r17)
+/* 801D3AAC 001CF70C D8 D1 00 10 */ stfd f6, 0x10(r17)
+/* 801D3AB0 001CF710 48 00 00 24 */ b lbl_801D3AD4
+lbl_801D3AB4:
+/* 801D3AB4 001CF714 C8 41 01 00 */ lfd f2, 0x100(r1)
+/* 801D3AB8 001CF718 FC 00 30 50 */ fneg f0, f6
+/* 801D3ABC 001CF71C C8 21 01 08 */ lfd f1, 0x108(r1)
+/* 801D3AC0 001CF720 FC 40 10 50 */ fneg f2, f2
+/* 801D3AC4 001CF724 FC 20 08 50 */ fneg f1, f1
+/* 801D3AC8 001CF728 D8 11 00 10 */ stfd f0, 0x10(r17)
+/* 801D3ACC 001CF72C D8 51 00 00 */ stfd f2, 0(r17)
+/* 801D3AD0 001CF730 D8 31 00 08 */ stfd f1, 8(r17)
+lbl_801D3AD4:
+/* 801D3AD4 001CF734 39 61 03 70 */ addi r11, r1, 0x370
+/* 801D3AD8 001CF738 56 83 07 7E */ clrlwi r3, r20, 0x1d
+/* 801D3ADC 001CF73C 4B FF 35 F1 */ bl _restfpr_23
+/* 801D3AE0 001CF740 B9 C1 02 E0 */ lmw r14, 0x2e0(r1)
+/* 801D3AE4 001CF744 80 01 03 74 */ lwz r0, 0x374(r1)
+/* 801D3AE8 001CF748 7C 08 03 A6 */ mtlr r0
+/* 801D3AEC 001CF74C 38 21 03 70 */ addi r1, r1, 0x370
+/* 801D3AF0 001CF750 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/k_sin.s b/asm/MSL_C/MSL_Common_Embedded/Math/k_sin.s new file mode 100644 index 0000000..8f1e58a --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/k_sin.s @@ -0,0 +1,57 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __kernel_sin
+__kernel_sin:
+/* 801D3AF4 001CF754 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D3AF8 001CF758 3C 00 3E 40 */ lis r0, 0x3e40
+/* 801D3AFC 001CF75C D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3B00 001CF760 80 81 00 08 */ lwz r4, 8(r1)
+/* 801D3B04 001CF764 54 84 00 7E */ clrlwi r4, r4, 1
+/* 801D3B08 001CF768 7C 04 00 00 */ cmpw r4, r0
+/* 801D3B0C 001CF76C 40 80 00 1C */ bge lbl_801D3B28
+/* 801D3B10 001CF770 FC 00 08 1E */ fctiwz f0, f1
+/* 801D3B14 001CF774 D8 01 00 10 */ stfd f0, 0x10(r1)
+/* 801D3B18 001CF778 80 01 00 14 */ lwz r0, 0x14(r1)
+/* 801D3B1C 001CF77C 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3B20 001CF780 40 82 00 08 */ bne lbl_801D3B28
+/* 801D3B24 001CF784 48 00 00 88 */ b lbl_801D3BAC
+lbl_801D3B28:
+/* 801D3B28 001CF788 FC E1 00 72 */ fmul f7, f1, f1
+/* 801D3B2C 001CF78C C8 02 95 08 */ lfd f0, lbl_80641B08-_SDA2_BASE_(r2)
+/* 801D3B30 001CF790 C8 A2 95 00 */ lfd f5, lbl_80641B00-_SDA2_BASE_(r2)
+/* 801D3B34 001CF794 2C 03 00 00 */ cmpwi r3, 0
+/* 801D3B38 001CF798 C8 82 94 F8 */ lfd f4, lbl_80641AF8-_SDA2_BASE_(r2)
+/* 801D3B3C 001CF79C C8 62 94 F0 */ lfd f3, lbl_80641AF0-_SDA2_BASE_(r2)
+/* 801D3B40 001CF7A0 FC C0 01 F2 */ fmul f6, f0, f7
+/* 801D3B44 001CF7A4 C8 02 94 E8 */ lfd f0, lbl_80641AE8-_SDA2_BASE_(r2)
+/* 801D3B48 001CF7A8 FD 07 00 72 */ fmul f8, f7, f1
+/* 801D3B4C 001CF7AC FC A5 30 2A */ fadd f5, f5, f6
+/* 801D3B50 001CF7B0 FC A7 01 72 */ fmul f5, f7, f5
+/* 801D3B54 001CF7B4 FC 84 28 2A */ fadd f4, f4, f5
+/* 801D3B58 001CF7B8 FC 87 01 32 */ fmul f4, f7, f4
+/* 801D3B5C 001CF7BC FC 63 20 2A */ fadd f3, f3, f4
+/* 801D3B60 001CF7C0 FC 67 00 F2 */ fmul f3, f7, f3
+/* 801D3B64 001CF7C4 FC 00 18 2A */ fadd f0, f0, f3
+/* 801D3B68 001CF7C8 40 82 00 1C */ bne lbl_801D3B84
+/* 801D3B6C 001CF7CC FC 47 00 32 */ fmul f2, f7, f0
+/* 801D3B70 001CF7D0 C8 02 95 10 */ lfd f0, lbl_80641B10-_SDA2_BASE_(r2)
+/* 801D3B74 001CF7D4 FC 00 10 2A */ fadd f0, f0, f2
+/* 801D3B78 001CF7D8 FC 08 00 32 */ fmul f0, f8, f0
+/* 801D3B7C 001CF7DC FC 21 00 2A */ fadd f1, f1, f0
+/* 801D3B80 001CF7E0 48 00 00 2C */ b lbl_801D3BAC
+lbl_801D3B84:
+/* 801D3B84 001CF7E4 C8 82 95 18 */ lfd f4, lbl_80641B18-_SDA2_BASE_(r2)
+/* 801D3B88 001CF7E8 FC 68 00 32 */ fmul f3, f8, f0
+/* 801D3B8C 001CF7EC C8 02 95 10 */ lfd f0, lbl_80641B10-_SDA2_BASE_(r2)
+/* 801D3B90 001CF7F0 FC 84 00 B2 */ fmul f4, f4, f2
+/* 801D3B94 001CF7F4 FC 00 02 32 */ fmul f0, f0, f8
+/* 801D3B98 001CF7F8 FC 64 18 28 */ fsub f3, f4, f3
+/* 801D3B9C 001CF7FC FC 67 00 F2 */ fmul f3, f7, f3
+/* 801D3BA0 001CF800 FC 43 10 28 */ fsub f2, f3, f2
+/* 801D3BA4 001CF804 FC 02 00 28 */ fsub f0, f2, f0
+/* 801D3BA8 001CF808 FC 21 00 28 */ fsub f1, f1, f0
+lbl_801D3BAC:
+/* 801D3BAC 001CF80C 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D3BB0 001CF810 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/k_tan.s b/asm/MSL_C/MSL_Common_Embedded/Math/k_tan.s new file mode 100644 index 0000000..b410c78 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/k_tan.s @@ -0,0 +1,164 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __kernel_tan
+__kernel_tan:
+/* 801D3BB4 001CF814 94 21 FF B0 */ stwu r1, -0x50(r1)
+/* 801D3BB8 001CF818 DB E1 00 40 */ stfd f31, 0x40(r1)
+/* 801D3BBC 001CF81C F3 E1 00 48 */ psq_st f31, 72(r1), 0, qr0
+/* 801D3BC0 001CF820 DB C1 00 30 */ stfd f30, 0x30(r1)
+/* 801D3BC4 001CF824 F3 C1 00 38 */ psq_st f30, 56(r1), 0, qr0
+/* 801D3BC8 001CF828 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3BCC 001CF82C 3C 00 3E 30 */ lis r0, 0x3e30
+/* 801D3BD0 001CF830 81 01 00 08 */ lwz r8, 8(r1)
+/* 801D3BD4 001CF834 55 07 00 7E */ clrlwi r7, r8, 1
+/* 801D3BD8 001CF838 7C 07 00 00 */ cmpw r7, r0
+/* 801D3BDC 001CF83C 40 80 00 54 */ bge lbl_801D3C30
+/* 801D3BE0 001CF840 FC 00 08 1E */ fctiwz f0, f1
+/* 801D3BE4 001CF844 D8 01 00 20 */ stfd f0, 0x20(r1)
+/* 801D3BE8 001CF848 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D3BEC 001CF84C 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3BF0 001CF850 40 82 00 40 */ bne lbl_801D3C30
+/* 801D3BF4 001CF854 38 83 00 01 */ addi r4, r3, 1
+/* 801D3BF8 001CF858 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D3BFC 001CF85C 7C 84 3B 78 */ or r4, r4, r7
+/* 801D3C00 001CF860 7C 80 03 79 */ or. r0, r4, r0
+/* 801D3C04 001CF864 40 82 00 14 */ bne lbl_801D3C18
+/* 801D3C08 001CF868 FC 20 0A 10 */ fabs f1, f1
+/* 801D3C0C 001CF86C C8 02 95 20 */ lfd f0, lbl_80641B20-_SDA2_BASE_(r2)
+/* 801D3C10 001CF870 FC 20 08 24 */ fdiv f1, f0, f1
+/* 801D3C14 001CF874 48 00 01 E0 */ b lbl_801D3DF4
+lbl_801D3C18:
+/* 801D3C18 001CF878 2C 03 00 01 */ cmpwi r3, 1
+/* 801D3C1C 001CF87C 40 82 00 08 */ bne lbl_801D3C24
+/* 801D3C20 001CF880 48 00 01 D4 */ b lbl_801D3DF4
+lbl_801D3C24:
+/* 801D3C24 001CF884 C8 02 95 28 */ lfd f0, lbl_80641B28-_SDA2_BASE_(r2)
+/* 801D3C28 001CF888 FC 20 08 24 */ fdiv f1, f0, f1
+/* 801D3C2C 001CF88C 48 00 01 C8 */ b lbl_801D3DF4
+lbl_801D3C30:
+/* 801D3C30 001CF890 3C 80 3F E6 */ lis r4, 0x3FE59428@ha
+/* 801D3C34 001CF894 38 04 94 28 */ addi r0, r4, 0x3FE59428@l
+/* 801D3C38 001CF898 7C 07 00 00 */ cmpw r7, r0
+/* 801D3C3C 001CF89C 41 80 00 30 */ blt lbl_801D3C6C
+/* 801D3C40 001CF8A0 2C 08 00 00 */ cmpwi r8, 0
+/* 801D3C44 001CF8A4 40 80 00 0C */ bge lbl_801D3C50
+/* 801D3C48 001CF8A8 FC 20 08 50 */ fneg f1, f1
+/* 801D3C4C 001CF8AC FC 40 10 50 */ fneg f2, f2
+lbl_801D3C50:
+/* 801D3C50 001CF8B0 C8 62 95 30 */ lfd f3, lbl_80641B30-_SDA2_BASE_(r2)
+/* 801D3C54 001CF8B4 C8 02 95 38 */ lfd f0, lbl_80641B38-_SDA2_BASE_(r2)
+/* 801D3C58 001CF8B8 FC 23 08 28 */ fsub f1, f3, f1
+/* 801D3C5C 001CF8BC FC 00 10 28 */ fsub f0, f0, f2
+/* 801D3C60 001CF8C0 C8 42 95 40 */ lfd f2, lbl_80641B40-_SDA2_BASE_(r2)
+/* 801D3C64 001CF8C4 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D3C68 001CF8C8 D8 21 00 08 */ stfd f1, 8(r1)
+lbl_801D3C6C:
+/* 801D3C6C 001CF8CC FC 01 00 72 */ fmul f0, f1, f1
+/* 801D3C70 001CF8D0 3C C0 80 40 */ lis r6, lbl_803FD540@ha
+/* 801D3C74 001CF8D4 38 A6 D5 40 */ addi r5, r6, lbl_803FD540@l
+/* 801D3C78 001CF8D8 3C 80 3F E6 */ lis r4, 0x3FE59428@ha
+/* 801D3C7C 001CF8DC 38 04 94 28 */ addi r0, r4, 0x3FE59428@l
+/* 801D3C80 001CF8E0 C8 A5 00 60 */ lfd f5, 0x60(r5)
+/* 801D3C84 001CF8E4 FC 60 00 32 */ fmul f3, f0, f0
+/* 801D3C88 001CF8E8 C9 05 00 58 */ lfd f8, 0x58(r5)
+/* 801D3C8C 001CF8EC C8 C5 00 50 */ lfd f6, 0x50(r5)
+/* 801D3C90 001CF8F0 7C 07 00 00 */ cmpw r7, r0
+/* 801D3C94 001CF8F4 C9 45 00 48 */ lfd f10, 0x48(r5)
+/* 801D3C98 001CF8F8 FC 80 00 72 */ fmul f4, f0, f1
+/* 801D3C9C 001CF8FC FC E3 01 72 */ fmul f7, f3, f5
+/* 801D3CA0 001CF900 C8 A6 D5 40 */ lfd f5, -0x2ac0(r6)
+/* 801D3CA4 001CF904 C9 25 00 40 */ lfd f9, 0x40(r5)
+/* 801D3CA8 001CF908 FD 63 02 32 */ fmul f11, f3, f8
+/* 801D3CAC 001CF90C CB E5 00 38 */ lfd f31, 0x38(r5)
+/* 801D3CB0 001CF910 C9 05 00 30 */ lfd f8, 0x30(r5)
+/* 801D3CB4 001CF914 FC C6 38 2A */ fadd f6, f6, f7
+/* 801D3CB8 001CF918 C9 A5 00 28 */ lfd f13, 0x28(r5)
+/* 801D3CBC 001CF91C FF CA 58 2A */ fadd f30, f10, f11
+/* 801D3CC0 001CF920 C8 E5 00 20 */ lfd f7, 0x20(r5)
+/* 801D3CC4 001CF924 FC A5 01 32 */ fmul f5, f5, f4
+/* 801D3CC8 001CF928 C9 85 00 18 */ lfd f12, 0x18(r5)
+/* 801D3CCC 001CF92C FD 43 01 B2 */ fmul f10, f3, f6
+/* 801D3CD0 001CF930 C8 C5 00 10 */ lfd f6, 0x10(r5)
+/* 801D3CD4 001CF934 C9 65 00 08 */ lfd f11, 8(r5)
+/* 801D3CD8 001CF938 FF C3 07 B2 */ fmul f30, f3, f30
+/* 801D3CDC 001CF93C D8 01 00 18 */ stfd f0, 0x18(r1)
+/* 801D3CE0 001CF940 FD 29 50 2A */ fadd f9, f9, f10
+/* 801D3CE4 001CF944 FD 5F F0 2A */ fadd f10, f31, f30
+/* 801D3CE8 001CF948 FD 23 02 72 */ fmul f9, f3, f9
+/* 801D3CEC 001CF94C FD 43 02 B2 */ fmul f10, f3, f10
+/* 801D3CF0 001CF950 FD 08 48 2A */ fadd f8, f8, f9
+/* 801D3CF4 001CF954 FD 2D 50 2A */ fadd f9, f13, f10
+/* 801D3CF8 001CF958 FD 03 02 32 */ fmul f8, f3, f8
+/* 801D3CFC 001CF95C FD 23 02 72 */ fmul f9, f3, f9
+/* 801D3D00 001CF960 FC E7 40 2A */ fadd f7, f7, f8
+/* 801D3D04 001CF964 FD 0C 48 2A */ fadd f8, f12, f9
+/* 801D3D08 001CF968 FC E3 01 F2 */ fmul f7, f3, f7
+/* 801D3D0C 001CF96C FD 03 02 32 */ fmul f8, f3, f8
+/* 801D3D10 001CF970 FC 66 38 2A */ fadd f3, f6, f7
+/* 801D3D14 001CF974 FC CB 40 2A */ fadd f6, f11, f8
+/* 801D3D18 001CF978 FC 60 00 F2 */ fmul f3, f0, f3
+/* 801D3D1C 001CF97C FC 66 18 2A */ fadd f3, f6, f3
+/* 801D3D20 001CF980 FC 64 00 F2 */ fmul f3, f4, f3
+/* 801D3D24 001CF984 FC 62 18 2A */ fadd f3, f2, f3
+/* 801D3D28 001CF988 FC 00 00 F2 */ fmul f0, f0, f3
+/* 801D3D2C 001CF98C FC C2 00 2A */ fadd f6, f2, f0
+/* 801D3D30 001CF990 FC C6 28 2A */ fadd f6, f6, f5
+/* 801D3D34 001CF994 FC 81 30 2A */ fadd f4, f1, f6
+/* 801D3D38 001CF998 41 80 00 64 */ blt lbl_801D3D9C
+/* 801D3D3C 001CF99C 3C 80 43 30 */ lis r4, 0x4330
+/* 801D3D40 001CF9A0 6C 60 80 00 */ xoris r0, r3, 0x8000
+/* 801D3D44 001CF9A4 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D3D48 001CF9A8 55 00 17 BC */ rlwinm r0, r8, 2, 0x1e, 0x1e
+/* 801D3D4C 001CF9AC 20 00 00 01 */ subfic r0, r0, 1
+/* 801D3D50 001CF9B0 C8 A2 95 50 */ lfd f5, lbl_80641B50-_SDA2_BASE_(r2)
+/* 801D3D54 001CF9B4 90 81 00 20 */ stw r4, 0x20(r1)
+/* 801D3D58 001CF9B8 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801D3D5C 001CF9BC FC 64 01 32 */ fmul f3, f4, f4
+/* 801D3D60 001CF9C0 C8 02 95 48 */ lfd f0, lbl_80641B48-_SDA2_BASE_(r2)
+/* 801D3D64 001CF9C4 C8 41 00 20 */ lfd f2, 0x20(r1)
+/* 801D3D68 001CF9C8 90 01 00 2C */ stw r0, 0x2c(r1)
+/* 801D3D6C 001CF9CC FC E2 28 28 */ fsub f7, f2, f5
+/* 801D3D70 001CF9D0 90 81 00 28 */ stw r4, 0x28(r1)
+/* 801D3D74 001CF9D4 FC 44 38 2A */ fadd f2, f4, f7
+/* 801D3D78 001CF9D8 C8 81 00 28 */ lfd f4, 0x28(r1)
+/* 801D3D7C 001CF9DC FC 84 28 28 */ fsub f4, f4, f5
+/* 801D3D80 001CF9E0 FC 43 10 24 */ fdiv f2, f3, f2
+/* 801D3D84 001CF9E4 FC 42 30 28 */ fsub f2, f2, f6
+/* 801D3D88 001CF9E8 FC 21 10 28 */ fsub f1, f1, f2
+/* 801D3D8C 001CF9EC FC 00 00 72 */ fmul f0, f0, f1
+/* 801D3D90 001CF9F0 FC 07 00 28 */ fsub f0, f7, f0
+/* 801D3D94 001CF9F4 FC 24 00 32 */ fmul f1, f4, f0
+/* 801D3D98 001CF9F8 48 00 00 5C */ b lbl_801D3DF4
+lbl_801D3D9C:
+/* 801D3D9C 001CF9FC 2C 03 00 01 */ cmpwi r3, 1
+/* 801D3DA0 001CFA00 40 82 00 0C */ bne lbl_801D3DAC
+/* 801D3DA4 001CFA04 FC 20 20 90 */ fmr f1, f4
+/* 801D3DA8 001CFA08 48 00 00 4C */ b lbl_801D3DF4
+lbl_801D3DAC:
+/* 801D3DAC 001CFA0C C8 02 95 28 */ lfd f0, lbl_80641B28-_SDA2_BASE_(r2)
+/* 801D3DB0 001CFA10 38 00 00 00 */ li r0, 0
+/* 801D3DB4 001CFA14 D8 81 00 18 */ stfd f4, 0x18(r1)
+/* 801D3DB8 001CFA18 FC A0 20 24 */ fdiv f5, f0, f4
+/* 801D3DBC 001CFA1C C8 42 95 20 */ lfd f2, lbl_80641B20-_SDA2_BASE_(r2)
+/* 801D3DC0 001CFA20 90 01 00 1C */ stw r0, 0x1c(r1)
+/* 801D3DC4 001CFA24 C8 81 00 18 */ lfd f4, 0x18(r1)
+/* 801D3DC8 001CFA28 D8 A1 00 10 */ stfd f5, 0x10(r1)
+/* 801D3DCC 001CFA2C FC 04 08 28 */ fsub f0, f4, f1
+/* 801D3DD0 001CFA30 90 01 00 14 */ stw r0, 0x14(r1)
+/* 801D3DD4 001CFA34 FC 06 00 28 */ fsub f0, f6, f0
+/* 801D3DD8 001CFA38 C8 61 00 10 */ lfd f3, 0x10(r1)
+/* 801D3DDC 001CFA3C FC 23 01 32 */ fmul f1, f3, f4
+/* 801D3DE0 001CFA40 FC 03 00 32 */ fmul f0, f3, f0
+/* 801D3DE4 001CFA44 FC 22 08 2A */ fadd f1, f2, f1
+/* 801D3DE8 001CFA48 FC 01 00 2A */ fadd f0, f1, f0
+/* 801D3DEC 001CFA4C FC 05 00 32 */ fmul f0, f5, f0
+/* 801D3DF0 001CFA50 FC 23 00 2A */ fadd f1, f3, f0
+lbl_801D3DF4:
+/* 801D3DF4 001CFA54 E3 E1 00 48 */ psq_l f31, 72(r1), 0, qr0
+/* 801D3DF8 001CFA58 CB E1 00 40 */ lfd f31, 0x40(r1)
+/* 801D3DFC 001CFA5C E3 C1 00 38 */ psq_l f30, 56(r1), 0, qr0
+/* 801D3E00 001CFA60 CB C1 00 30 */ lfd f30, 0x30(r1)
+/* 801D3E04 001CFA64 38 21 00 50 */ addi r1, r1, 0x50
+/* 801D3E08 001CFA68 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_atan.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_atan.s new file mode 100644 index 0000000..15a3fe0 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_atan.s @@ -0,0 +1,162 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global atan
+atan:
+/* 801D3E0C 001CFA6C 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801D3E10 001CFA70 3C A0 80 40 */ lis r5, lbl_803FD5A8@ha
+/* 801D3E14 001CFA74 3C 00 44 10 */ lis r0, 0x4410
+/* 801D3E18 001CFA78 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3E1C 001CFA7C 38 A5 D5 A8 */ addi r5, r5, lbl_803FD5A8@l
+/* 801D3E20 001CFA80 80 C1 00 08 */ lwz r6, 8(r1)
+/* 801D3E24 001CFA84 54 C4 00 7E */ clrlwi r4, r6, 1
+/* 801D3E28 001CFA88 7C 04 00 00 */ cmpw r4, r0
+/* 801D3E2C 001CFA8C 41 80 00 6C */ blt lbl_801D3E98
+/* 801D3E30 001CFA90 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D3E34 001CFA94 7C 04 00 00 */ cmpw r4, r0
+/* 801D3E38 001CFA98 41 81 00 1C */ bgt lbl_801D3E54
+/* 801D3E3C 001CFA9C 3C 04 80 10 */ addis r0, r4, 0x8010
+/* 801D3E40 001CFAA0 28 00 00 00 */ cmplwi r0, 0
+/* 801D3E44 001CFAA4 40 82 00 18 */ bne lbl_801D3E5C
+/* 801D3E48 001CFAA8 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D3E4C 001CFAAC 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3E50 001CFAB0 41 82 00 0C */ beq lbl_801D3E5C
+lbl_801D3E54:
+/* 801D3E54 001CFAB4 FC 21 08 2A */ fadd f1, f1, f1
+/* 801D3E58 001CFAB8 48 00 01 EC */ b lbl_801D4044
+lbl_801D3E5C:
+/* 801D3E5C 001CFABC 2C 06 00 00 */ cmpwi r6, 0
+/* 801D3E60 001CFAC0 40 81 00 1C */ ble lbl_801D3E7C
+/* 801D3E64 001CFAC4 38 85 00 00 */ addi r4, r5, 0
+/* 801D3E68 001CFAC8 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D3E6C 001CFACC C8 24 00 18 */ lfd f1, 0x18(r4)
+/* 801D3E70 001CFAD0 C8 03 00 18 */ lfd f0, 0x18(r3)
+/* 801D3E74 001CFAD4 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D3E78 001CFAD8 48 00 01 CC */ b lbl_801D4044
+lbl_801D3E7C:
+/* 801D3E7C 001CFADC 38 85 00 00 */ addi r4, r5, 0
+/* 801D3E80 001CFAE0 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D3E84 001CFAE4 C8 24 00 18 */ lfd f1, 0x18(r4)
+/* 801D3E88 001CFAE8 C8 03 00 18 */ lfd f0, 0x18(r3)
+/* 801D3E8C 001CFAEC FC 20 08 50 */ fneg f1, f1
+/* 801D3E90 001CFAF0 FC 21 00 28 */ fsub f1, f1, f0
+/* 801D3E94 001CFAF4 48 00 01 B0 */ b lbl_801D4044
+lbl_801D3E98:
+/* 801D3E98 001CFAF8 3C 00 3F DC */ lis r0, 0x3fdc
+/* 801D3E9C 001CFAFC 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EA0 001CFB00 40 80 00 30 */ bge lbl_801D3ED0
+/* 801D3EA4 001CFB04 3C 00 3E 20 */ lis r0, 0x3e20
+/* 801D3EA8 001CFB08 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EAC 001CFB0C 40 80 00 1C */ bge lbl_801D3EC8
+/* 801D3EB0 001CFB10 C8 42 95 58 */ lfd f2, lbl_80641B58-_SDA2_BASE_(r2)
+/* 801D3EB4 001CFB14 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3EB8 001CFB18 FC 42 08 2A */ fadd f2, f2, f1
+/* 801D3EBC 001CFB1C FC 02 00 40 */ fcmpo cr0, f2, f0
+/* 801D3EC0 001CFB20 40 81 00 08 */ ble lbl_801D3EC8
+/* 801D3EC4 001CFB24 48 00 01 80 */ b lbl_801D4044
+lbl_801D3EC8:
+/* 801D3EC8 001CFB28 38 00 FF FF */ li r0, -1
+/* 801D3ECC 001CFB2C 48 00 00 A4 */ b lbl_801D3F70
+lbl_801D3ED0:
+/* 801D3ED0 001CFB30 3C 00 3F F3 */ lis r0, 0x3ff3
+/* 801D3ED4 001CFB34 FC 60 0A 10 */ fabs f3, f1
+/* 801D3ED8 001CFB38 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EDC 001CFB3C 40 80 00 50 */ bge lbl_801D3F2C
+/* 801D3EE0 001CFB40 3C 00 3F E6 */ lis r0, 0x3fe6
+/* 801D3EE4 001CFB44 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EE8 001CFB48 40 80 00 28 */ bge lbl_801D3F10
+/* 801D3EEC 001CFB4C C8 02 95 68 */ lfd f0, lbl_80641B68-_SDA2_BASE_(r2)
+/* 801D3EF0 001CFB50 38 00 00 00 */ li r0, 0
+/* 801D3EF4 001CFB54 C8 22 95 60 */ lfd f1, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3EF8 001CFB58 FC 40 00 F2 */ fmul f2, f0, f3
+/* 801D3EFC 001CFB5C FC 00 18 2A */ fadd f0, f0, f3
+/* 801D3F00 001CFB60 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D3F04 001CFB64 FC 21 00 24 */ fdiv f1, f1, f0
+/* 801D3F08 001CFB68 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F0C 001CFB6C 48 00 00 64 */ b lbl_801D3F70
+lbl_801D3F10:
+/* 801D3F10 001CFB70 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3F14 001CFB74 38 00 00 01 */ li r0, 1
+/* 801D3F18 001CFB78 FC 23 00 28 */ fsub f1, f3, f0
+/* 801D3F1C 001CFB7C FC 00 18 2A */ fadd f0, f0, f3
+/* 801D3F20 001CFB80 FC 21 00 24 */ fdiv f1, f1, f0
+/* 801D3F24 001CFB84 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F28 001CFB88 48 00 00 48 */ b lbl_801D3F70
+lbl_801D3F2C:
+/* 801D3F2C 001CFB8C 3C 60 40 04 */ lis r3, 0x40038000@ha
+/* 801D3F30 001CFB90 38 03 80 00 */ addi r0, r3, 0x40038000@l
+/* 801D3F34 001CFB94 7C 04 00 00 */ cmpw r4, r0
+/* 801D3F38 001CFB98 40 80 00 28 */ bge lbl_801D3F60
+/* 801D3F3C 001CFB9C C8 42 95 70 */ lfd f2, lbl_80641B70-_SDA2_BASE_(r2)
+/* 801D3F40 001CFBA0 38 00 00 02 */ li r0, 2
+/* 801D3F44 001CFBA4 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3F48 001CFBA8 FC 22 00 F2 */ fmul f1, f2, f3
+/* 801D3F4C 001CFBAC FC 43 10 28 */ fsub f2, f3, f2
+/* 801D3F50 001CFBB0 FC 00 08 2A */ fadd f0, f0, f1
+/* 801D3F54 001CFBB4 FC 22 00 24 */ fdiv f1, f2, f0
+/* 801D3F58 001CFBB8 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F5C 001CFBBC 48 00 00 14 */ b lbl_801D3F70
+lbl_801D3F60:
+/* 801D3F60 001CFBC0 C8 02 95 78 */ lfd f0, lbl_80641B78-_SDA2_BASE_(r2)
+/* 801D3F64 001CFBC4 38 00 00 03 */ li r0, 3
+/* 801D3F68 001CFBC8 FC 20 18 24 */ fdiv f1, f0, f3
+/* 801D3F6C 001CFBCC D8 21 00 08 */ stfd f1, 8(r1)
+lbl_801D3F70:
+/* 801D3F70 001CFBD0 FC 01 00 72 */ fmul f0, f1, f1
+/* 801D3F74 001CFBD4 38 65 00 40 */ addi r3, r5, 0x40
+/* 801D3F78 001CFBD8 C8 63 00 50 */ lfd f3, 0x50(r3)
+/* 801D3F7C 001CFBDC 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3F80 001CFBE0 C8 43 00 48 */ lfd f2, 0x48(r3)
+/* 801D3F84 001CFBE4 C9 63 00 40 */ lfd f11, 0x40(r3)
+/* 801D3F88 001CFBE8 FD A0 00 32 */ fmul f13, f0, f0
+/* 801D3F8C 001CFBEC C8 A3 00 38 */ lfd f5, 0x38(r3)
+/* 801D3F90 001CFBF0 C9 43 00 30 */ lfd f10, 0x30(r3)
+/* 801D3F94 001CFBF4 C8 83 00 28 */ lfd f4, 0x28(r3)
+/* 801D3F98 001CFBF8 C9 23 00 20 */ lfd f9, 0x20(r3)
+/* 801D3F9C 001CFBFC FD 8D 00 F2 */ fmul f12, f13, f3
+/* 801D3FA0 001CFC00 C8 63 00 18 */ lfd f3, 0x18(r3)
+/* 801D3FA4 001CFC04 FC CD 00 B2 */ fmul f6, f13, f2
+/* 801D3FA8 001CFC08 C9 03 00 10 */ lfd f8, 0x10(r3)
+/* 801D3FAC 001CFC0C C8 43 00 08 */ lfd f2, 8(r3)
+/* 801D3FB0 001CFC10 FD 6B 60 2A */ fadd f11, f11, f12
+/* 801D3FB4 001CFC14 C8 E5 00 40 */ lfd f7, 0x40(r5)
+/* 801D3FB8 001CFC18 FC A5 30 2A */ fadd f5, f5, f6
+/* 801D3FBC 001CFC1C FC CD 02 F2 */ fmul f6, f13, f11
+/* 801D3FC0 001CFC20 FC AD 01 72 */ fmul f5, f13, f5
+/* 801D3FC4 001CFC24 FC CA 30 2A */ fadd f6, f10, f6
+/* 801D3FC8 001CFC28 FC 84 28 2A */ fadd f4, f4, f5
+/* 801D3FCC 001CFC2C FC AD 01 B2 */ fmul f5, f13, f6
+/* 801D3FD0 001CFC30 FC 8D 01 32 */ fmul f4, f13, f4
+/* 801D3FD4 001CFC34 FC A9 28 2A */ fadd f5, f9, f5
+/* 801D3FD8 001CFC38 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D3FDC 001CFC3C FC 8D 01 72 */ fmul f4, f13, f5
+/* 801D3FE0 001CFC40 FC 6D 00 F2 */ fmul f3, f13, f3
+/* 801D3FE4 001CFC44 FC 88 20 2A */ fadd f4, f8, f4
+/* 801D3FE8 001CFC48 FC 42 18 2A */ fadd f2, f2, f3
+/* 801D3FEC 001CFC4C FC 6D 01 32 */ fmul f3, f13, f4
+/* 801D3FF0 001CFC50 FC 8D 00 B2 */ fmul f4, f13, f2
+/* 801D3FF4 001CFC54 FC 47 18 2A */ fadd f2, f7, f3
+/* 801D3FF8 001CFC58 FC 00 00 B2 */ fmul f0, f0, f2
+/* 801D3FFC 001CFC5C 40 80 00 14 */ bge lbl_801D4010
+/* 801D4000 001CFC60 FC 00 20 2A */ fadd f0, f0, f4
+/* 801D4004 001CFC64 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D4008 001CFC68 FC 21 00 28 */ fsub f1, f1, f0
+/* 801D400C 001CFC6C 48 00 00 38 */ b lbl_801D4044
+lbl_801D4010:
+/* 801D4010 001CFC70 FC 00 20 2A */ fadd f0, f0, f4
+/* 801D4014 001CFC74 54 00 18 38 */ slwi r0, r0, 3
+/* 801D4018 001CFC78 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D401C 001CFC7C 38 85 00 00 */ addi r4, r5, 0
+/* 801D4020 001CFC80 7C 43 04 AE */ lfdx f2, r3, r0
+/* 801D4024 001CFC84 2C 06 00 00 */ cmpwi r6, 0
+/* 801D4028 001CFC88 FC 61 00 32 */ fmul f3, f1, f0
+/* 801D402C 001CFC8C 7C 04 04 AE */ lfdx f0, r4, r0
+/* 801D4030 001CFC90 FC 43 10 28 */ fsub f2, f3, f2
+/* 801D4034 001CFC94 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D4038 001CFC98 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D403C 001CFC9C 40 80 00 08 */ bge lbl_801D4044
+/* 801D4040 001CFCA0 FC 20 08 50 */ fneg f1, f1
+lbl_801D4044:
+/* 801D4044 001CFCA4 38 21 00 10 */ addi r1, r1, 0x10
+/* 801D4048 001CFCA8 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_copysign.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_copysign.s new file mode 100644 index 0000000..8e53a18 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_copysign.s @@ -0,0 +1,17 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global copysign
+copysign:
+/* 801D404C 001CFCAC 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D4050 001CFCB0 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4054 001CFCB4 D8 41 00 10 */ stfd f2, 0x10(r1)
+/* 801D4058 001CFCB8 80 61 00 08 */ lwz r3, 8(r1)
+/* 801D405C 001CFCBC 80 01 00 10 */ lwz r0, 0x10(r1)
+/* 801D4060 001CFCC0 54 00 00 00 */ rlwinm r0, r0, 0, 0, 0
+/* 801D4064 001CFCC4 50 60 00 7E */ rlwimi r0, r3, 0, 1, 0x1f
+/* 801D4068 001CFCC8 90 01 00 08 */ stw r0, 8(r1)
+/* 801D406C 001CFCCC C8 21 00 08 */ lfd f1, 8(r1)
+/* 801D4070 001CFCD0 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D4074 001CFCD4 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_cos.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_cos.s new file mode 100644 index 0000000..5f733c3 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_cos.s @@ -0,0 +1,67 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global cos
+cos:
+/* 801D4078 001CFCD8 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D407C 001CFCDC 7C 08 02 A6 */ mflr r0
+/* 801D4080 001CFCE0 3C 60 3F E9 */ lis r3, 0x3FE921FB@ha
+/* 801D4084 001CFCE4 C8 42 95 80 */ lfd f2, lbl_80641B80-_SDA2_BASE_(r2)
+/* 801D4088 001CFCE8 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D408C 001CFCEC 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D4090 001CFCF0 38 03 21 FB */ addi r0, r3, 0x3FE921FB@l
+/* 801D4094 001CFCF4 80 61 00 08 */ lwz r3, 8(r1)
+/* 801D4098 001CFCF8 54 63 00 7E */ clrlwi r3, r3, 1
+/* 801D409C 001CFCFC 7C 03 00 00 */ cmpw r3, r0
+/* 801D40A0 001CFD00 41 81 00 0C */ bgt lbl_801D40AC
+/* 801D40A4 001CFD04 4B FF E2 35 */ bl __kernel_cos
+/* 801D40A8 001CFD08 48 00 00 94 */ b lbl_801D413C
+lbl_801D40AC:
+/* 801D40AC 001CFD0C 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D40B0 001CFD10 7C 03 00 00 */ cmpw r3, r0
+/* 801D40B4 001CFD14 41 80 00 0C */ blt lbl_801D40C0
+/* 801D40B8 001CFD18 FC 21 08 28 */ fsub f1, f1, f1
+/* 801D40BC 001CFD1C 48 00 00 80 */ b lbl_801D413C
+lbl_801D40C0:
+/* 801D40C0 001CFD20 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D40C4 001CFD24 4B FF DE 7D */ bl __ieee754_rem_pio2
+/* 801D40C8 001CFD28 54 60 07 BE */ clrlwi r0, r3, 0x1e
+/* 801D40CC 001CFD2C 2C 00 00 01 */ cmpwi r0, 1
+/* 801D40D0 001CFD30 41 82 00 30 */ beq lbl_801D4100
+/* 801D40D4 001CFD34 40 80 00 10 */ bge lbl_801D40E4
+/* 801D40D8 001CFD38 2C 00 00 00 */ cmpwi r0, 0
+/* 801D40DC 001CFD3C 40 80 00 14 */ bge lbl_801D40F0
+/* 801D40E0 001CFD40 48 00 00 4C */ b lbl_801D412C
+lbl_801D40E4:
+/* 801D40E4 001CFD44 2C 00 00 03 */ cmpwi r0, 3
+/* 801D40E8 001CFD48 40 80 00 44 */ bge lbl_801D412C
+/* 801D40EC 001CFD4C 48 00 00 2C */ b lbl_801D4118
+lbl_801D40F0:
+/* 801D40F0 001CFD50 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D40F4 001CFD54 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D40F8 001CFD58 4B FF E1 E1 */ bl __kernel_cos
+/* 801D40FC 001CFD5C 48 00 00 40 */ b lbl_801D413C
+lbl_801D4100:
+/* 801D4100 001CFD60 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4104 001CFD64 38 60 00 01 */ li r3, 1
+/* 801D4108 001CFD68 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D410C 001CFD6C 4B FF F9 E9 */ bl __kernel_sin
+/* 801D4110 001CFD70 FC 20 08 50 */ fneg f1, f1
+/* 801D4114 001CFD74 48 00 00 28 */ b lbl_801D413C
+lbl_801D4118:
+/* 801D4118 001CFD78 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D411C 001CFD7C C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D4120 001CFD80 4B FF E1 B9 */ bl __kernel_cos
+/* 801D4124 001CFD84 FC 20 08 50 */ fneg f1, f1
+/* 801D4128 001CFD88 48 00 00 14 */ b lbl_801D413C
+lbl_801D412C:
+/* 801D412C 001CFD8C C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4130 001CFD90 38 60 00 01 */ li r3, 1
+/* 801D4134 001CFD94 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D4138 001CFD98 4B FF F9 BD */ bl __kernel_sin
+lbl_801D413C:
+/* 801D413C 001CFD9C 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D4140 001CFDA0 7C 08 03 A6 */ mtlr r0
+/* 801D4144 001CFDA4 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D4148 001CFDA8 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_floor.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_floor.s new file mode 100644 index 0000000..aed6568 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_floor.s @@ -0,0 +1,99 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global floor
+floor:
+/* 801D414C 001CFDAC 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801D4150 001CFDB0 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4154 001CFDB4 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D4158 001CFDB8 80 C1 00 0C */ lwz r6, 0xc(r1)
+/* 801D415C 001CFDBC 54 A3 65 7E */ rlwinm r3, r5, 0xc, 0x15, 0x1f
+/* 801D4160 001CFDC0 38 E3 FC 01 */ addi r7, r3, -1023
+/* 801D4164 001CFDC4 2C 87 00 14 */ cmpwi cr1, r7, 0x14
+/* 801D4168 001CFDC8 40 84 00 98 */ bge cr1, lbl_801D4200
+/* 801D416C 001CFDCC 2C 07 00 00 */ cmpwi r7, 0
+/* 801D4170 001CFDD0 40 80 00 44 */ bge lbl_801D41B4
+/* 801D4174 001CFDD4 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D4178 001CFDD8 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D417C 001CFDDC FC 22 08 2A */ fadd f1, f2, f1
+/* 801D4180 001CFDE0 FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D4184 001CFDE4 40 81 00 F8 */ ble lbl_801D427C
+/* 801D4188 001CFDE8 2C 05 00 00 */ cmpwi r5, 0
+/* 801D418C 001CFDEC 41 80 00 10 */ blt lbl_801D419C
+/* 801D4190 001CFDF0 38 C0 00 00 */ li r6, 0
+/* 801D4194 001CFDF4 38 A0 00 00 */ li r5, 0
+/* 801D4198 001CFDF8 48 00 00 E4 */ b lbl_801D427C
+lbl_801D419C:
+/* 801D419C 001CFDFC 54 A0 00 7E */ clrlwi r0, r5, 1
+/* 801D41A0 001CFE00 7C 00 33 79 */ or. r0, r0, r6
+/* 801D41A4 001CFE04 41 82 00 D8 */ beq lbl_801D427C
+/* 801D41A8 001CFE08 3C A0 BF F0 */ lis r5, 0xbff0
+/* 801D41AC 001CFE0C 38 C0 00 00 */ li r6, 0
+/* 801D41B0 001CFE10 48 00 00 CC */ b lbl_801D427C
+lbl_801D41B4:
+/* 801D41B4 001CFE14 3C 60 00 10 */ lis r3, 0x000FFFFF@ha
+/* 801D41B8 001CFE18 38 03 FF FF */ addi r0, r3, 0x000FFFFF@l
+/* 801D41BC 001CFE1C 7C 04 3E 30 */ sraw r4, r0, r7
+/* 801D41C0 001CFE20 7C A0 20 38 */ and r0, r5, r4
+/* 801D41C4 001CFE24 7C C0 03 79 */ or. r0, r6, r0
+/* 801D41C8 001CFE28 40 82 00 08 */ bne lbl_801D41D0
+/* 801D41CC 001CFE2C 48 00 00 BC */ b lbl_801D4288
+lbl_801D41D0:
+/* 801D41D0 001CFE30 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D41D4 001CFE34 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D41D8 001CFE38 FC 22 08 2A */ fadd f1, f2, f1
+/* 801D41DC 001CFE3C FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D41E0 001CFE40 40 81 00 9C */ ble lbl_801D427C
+/* 801D41E4 001CFE44 2C 05 00 00 */ cmpwi r5, 0
+/* 801D41E8 001CFE48 40 80 00 0C */ bge lbl_801D41F4
+/* 801D41EC 001CFE4C 7C 60 3E 30 */ sraw r0, r3, r7
+/* 801D41F0 001CFE50 7C A5 02 14 */ add r5, r5, r0
+lbl_801D41F4:
+/* 801D41F4 001CFE54 7C A5 20 78 */ andc r5, r5, r4
+/* 801D41F8 001CFE58 38 C0 00 00 */ li r6, 0
+/* 801D41FC 001CFE5C 48 00 00 80 */ b lbl_801D427C
+lbl_801D4200:
+/* 801D4200 001CFE60 2C 07 00 33 */ cmpwi r7, 0x33
+/* 801D4204 001CFE64 40 81 00 14 */ ble lbl_801D4218
+/* 801D4208 001CFE68 2C 07 04 00 */ cmpwi r7, 0x400
+/* 801D420C 001CFE6C 40 82 00 7C */ bne lbl_801D4288
+/* 801D4210 001CFE70 FC 21 08 2A */ fadd f1, f1, f1
+/* 801D4214 001CFE74 48 00 00 74 */ b lbl_801D4288
+lbl_801D4218:
+/* 801D4218 001CFE78 38 07 FF EC */ addi r0, r7, -20
+/* 801D421C 001CFE7C 38 60 FF FF */ li r3, -1
+/* 801D4220 001CFE80 7C 64 04 30 */ srw r4, r3, r0
+/* 801D4224 001CFE84 7C C0 20 39 */ and. r0, r6, r4
+/* 801D4228 001CFE88 40 82 00 08 */ bne lbl_801D4230
+/* 801D422C 001CFE8C 48 00 00 5C */ b lbl_801D4288
+lbl_801D4230:
+/* 801D4230 001CFE90 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D4234 001CFE94 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D4238 001CFE98 FC 22 08 2A */ fadd f1, f2, f1
+/* 801D423C 001CFE9C FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D4240 001CFEA0 40 81 00 3C */ ble lbl_801D427C
+/* 801D4244 001CFEA4 2C 05 00 00 */ cmpwi r5, 0
+/* 801D4248 001CFEA8 40 80 00 30 */ bge lbl_801D4278
+/* 801D424C 001CFEAC 40 86 00 0C */ bne cr1, lbl_801D4258
+/* 801D4250 001CFEB0 38 A5 00 01 */ addi r5, r5, 1
+/* 801D4254 001CFEB4 48 00 00 24 */ b lbl_801D4278
+lbl_801D4258:
+/* 801D4258 001CFEB8 20 07 00 34 */ subfic r0, r7, 0x34
+/* 801D425C 001CFEBC 38 60 00 01 */ li r3, 1
+/* 801D4260 001CFEC0 7C 60 00 30 */ slw r0, r3, r0
+/* 801D4264 001CFEC4 7C 06 02 14 */ add r0, r6, r0
+/* 801D4268 001CFEC8 7C 00 30 40 */ cmplw r0, r6
+/* 801D426C 001CFECC 40 80 00 08 */ bge lbl_801D4274
+/* 801D4270 001CFED0 38 A5 00 01 */ addi r5, r5, 1
+lbl_801D4274:
+/* 801D4274 001CFED4 7C 06 03 78 */ mr r6, r0
+lbl_801D4278:
+/* 801D4278 001CFED8 7C C6 20 78 */ andc r6, r6, r4
+lbl_801D427C:
+/* 801D427C 001CFEDC 90 A1 00 08 */ stw r5, 8(r1)
+/* 801D4280 001CFEE0 90 C1 00 0C */ stw r6, 0xc(r1)
+/* 801D4284 001CFEE4 C8 21 00 08 */ lfd f1, 8(r1)
+lbl_801D4288:
+/* 801D4288 001CFEE8 38 21 00 10 */ addi r1, r1, 0x10
+/* 801D428C 001CFEEC 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_frexp.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_frexp.s new file mode 100644 index 0000000..44e4b71 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_frexp.s @@ -0,0 +1,43 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global frexp
+frexp:
+/* 801D4290 001CFEF0 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801D4294 001CFEF4 38 80 00 00 */ li r4, 0
+/* 801D4298 001CFEF8 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D429C 001CFEFC D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D42A0 001CFF00 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D42A4 001CFF04 90 83 00 00 */ stw r4, 0(r3)
+/* 801D42A8 001CFF08 54 A4 00 7E */ clrlwi r4, r5, 1
+/* 801D42AC 001CFF0C 80 C1 00 0C */ lwz r6, 0xc(r1)
+/* 801D42B0 001CFF10 7C 04 00 00 */ cmpw r4, r0
+/* 801D42B4 001CFF14 40 80 00 5C */ bge lbl_801D4310
+/* 801D42B8 001CFF18 7C 80 33 79 */ or. r0, r4, r6
+/* 801D42BC 001CFF1C 40 82 00 08 */ bne lbl_801D42C4
+/* 801D42C0 001CFF20 48 00 00 50 */ b lbl_801D4310
+lbl_801D42C4:
+/* 801D42C4 001CFF24 3C 00 00 10 */ lis r0, 0x10
+/* 801D42C8 001CFF28 7C 04 00 00 */ cmpw r4, r0
+/* 801D42CC 001CFF2C 40 80 00 20 */ bge lbl_801D42EC
+/* 801D42D0 001CFF30 C8 02 95 98 */ lfd f0, lbl_80641B98-_SDA2_BASE_(r2)
+/* 801D42D4 001CFF34 38 00 FF CA */ li r0, -54
+/* 801D42D8 001CFF38 90 03 00 00 */ stw r0, 0(r3)
+/* 801D42DC 001CFF3C FC 21 00 32 */ fmul f1, f1, f0
+/* 801D42E0 001CFF40 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D42E4 001CFF44 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D42E8 001CFF48 54 A4 00 7E */ clrlwi r4, r5, 1
+lbl_801D42EC:
+/* 801D42EC 001CFF4C 54 A0 03 00 */ rlwinm r0, r5, 0, 0xc, 0
+/* 801D42F0 001CFF50 80 A3 00 00 */ lwz r5, 0(r3)
+/* 801D42F4 001CFF54 7C 84 A6 70 */ srawi r4, r4, 0x14
+/* 801D42F8 001CFF58 64 00 3F E0 */ oris r0, r0, 0x3fe0
+/* 801D42FC 001CFF5C 90 01 00 08 */ stw r0, 8(r1)
+/* 801D4300 001CFF60 7C 84 2A 14 */ add r4, r4, r5
+/* 801D4304 001CFF64 38 04 FC 02 */ addi r0, r4, -1022
+/* 801D4308 001CFF68 90 03 00 00 */ stw r0, 0(r3)
+/* 801D430C 001CFF6C C8 21 00 08 */ lfd f1, 8(r1)
+lbl_801D4310:
+/* 801D4310 001CFF70 38 21 00 10 */ addi r1, r1, 0x10
+/* 801D4314 001CFF74 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_ldexp.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_ldexp.s new file mode 100644 index 0000000..8d0c624 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_ldexp.s @@ -0,0 +1,107 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global ldexp
+ldexp:
+/* 801D4318 001CFF78 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D431C 001CFF7C 7C 08 02 A6 */ mflr r0
+/* 801D4320 001CFF80 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D4324 001CFF84 DB E1 00 18 */ stfd f31, 0x18(r1)
+/* 801D4328 001CFF88 FF E0 08 90 */ fmr f31, f1
+/* 801D432C 001CFF8C 93 E1 00 14 */ stw r31, 0x14(r1)
+/* 801D4330 001CFF90 7C 7F 1B 78 */ mr r31, r3
+/* 801D4334 001CFF94 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4338 001CFF98 4B FF 63 F9 */ bl __fpclassifyd
+/* 801D433C 001CFF9C 2C 03 00 02 */ cmpwi r3, 2
+/* 801D4340 001CFFA0 40 81 00 10 */ ble lbl_801D4350
+/* 801D4344 001CFFA4 C8 02 95 A0 */ lfd f0, lbl_80641BA0-_SDA2_BASE_(r2)
+/* 801D4348 001CFFA8 FC 00 F8 00 */ fcmpu cr0, f0, f31
+/* 801D434C 001CFFAC 40 82 00 0C */ bne lbl_801D4358
+lbl_801D4350:
+/* 801D4350 001CFFB0 FC 20 F8 90 */ fmr f1, f31
+/* 801D4354 001CFFB4 48 00 01 18 */ b lbl_801D446C
+lbl_801D4358:
+/* 801D4358 001CFFB8 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D435C 001CFFBC 80 61 00 0C */ lwz r3, 0xc(r1)
+/* 801D4360 001CFFC0 54 A4 65 7F */ rlwinm. r4, r5, 0xc, 0x15, 0x1f
+/* 801D4364 001CFFC4 40 82 00 4C */ bne lbl_801D43B0
+/* 801D4368 001CFFC8 54 A0 00 7E */ clrlwi r0, r5, 1
+/* 801D436C 001CFFCC 7C 60 03 79 */ or. r0, r3, r0
+/* 801D4370 001CFFD0 40 82 00 0C */ bne lbl_801D437C
+/* 801D4374 001CFFD4 FC 20 F8 90 */ fmr f1, f31
+/* 801D4378 001CFFD8 48 00 00 F4 */ b lbl_801D446C
+lbl_801D437C:
+/* 801D437C 001CFFDC C8 02 95 A8 */ lfd f0, lbl_80641BA8-_SDA2_BASE_(r2)
+/* 801D4380 001CFFE0 3C 60 FF FF */ lis r3, 0xFFFF3CB0@ha
+/* 801D4384 001CFFE4 38 03 3C B0 */ addi r0, r3, 0xFFFF3CB0@l
+/* 801D4388 001CFFE8 FF FF 00 32 */ fmul f31, f31, f0
+/* 801D438C 001CFFEC 7C 1F 00 00 */ cmpw r31, r0
+/* 801D4390 001CFFF0 DB E1 00 08 */ stfd f31, 8(r1)
+/* 801D4394 001CFFF4 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D4398 001CFFF8 54 A3 65 7E */ rlwinm r3, r5, 0xc, 0x15, 0x1f
+/* 801D439C 001CFFFC 38 83 FF CA */ addi r4, r3, -54
+/* 801D43A0 001D0000 40 80 00 10 */ bge lbl_801D43B0
+/* 801D43A4 001D0004 C8 02 95 B0 */ lfd f0, lbl_80641BB0-_SDA2_BASE_(r2)
+/* 801D43A8 001D0008 FC 20 07 F2 */ fmul f1, f0, f31
+/* 801D43AC 001D000C 48 00 00 C0 */ b lbl_801D446C
+lbl_801D43B0:
+/* 801D43B0 001D0010 2C 04 07 FF */ cmpwi r4, 0x7ff
+/* 801D43B4 001D0014 40 82 00 0C */ bne lbl_801D43C0
+/* 801D43B8 001D0018 FC 3F F8 2A */ fadd f1, f31, f31
+/* 801D43BC 001D001C 48 00 00 B0 */ b lbl_801D446C
+lbl_801D43C0:
+/* 801D43C0 001D0020 7C 84 FA 14 */ add r4, r4, r31
+/* 801D43C4 001D0024 2C 04 07 FE */ cmpwi r4, 0x7fe
+/* 801D43C8 001D0028 40 81 00 1C */ ble lbl_801D43E4
+/* 801D43CC 001D002C FC 40 F8 90 */ fmr f2, f31
+/* 801D43D0 001D0030 C8 22 95 B8 */ lfd f1, lbl_80641BB8-_SDA2_BASE_(r2)
+/* 801D43D4 001D0034 4B FF FC 79 */ bl copysign
+/* 801D43D8 001D0038 C8 02 95 B8 */ lfd f0, lbl_80641BB8-_SDA2_BASE_(r2)
+/* 801D43DC 001D003C FC 20 00 72 */ fmul f1, f0, f1
+/* 801D43E0 001D0040 48 00 00 8C */ b lbl_801D446C
+lbl_801D43E4:
+/* 801D43E4 001D0044 2C 04 00 00 */ cmpwi r4, 0
+/* 801D43E8 001D0048 40 81 00 1C */ ble lbl_801D4404
+/* 801D43EC 001D004C 54 A3 03 00 */ rlwinm r3, r5, 0, 0xc, 0
+/* 801D43F0 001D0050 54 80 A0 16 */ slwi r0, r4, 0x14
+/* 801D43F4 001D0054 7C 60 03 78 */ or r0, r3, r0
+/* 801D43F8 001D0058 90 01 00 08 */ stw r0, 8(r1)
+/* 801D43FC 001D005C C8 21 00 08 */ lfd f1, 8(r1)
+/* 801D4400 001D0060 48 00 00 6C */ b lbl_801D446C
+lbl_801D4404:
+/* 801D4404 001D0064 2C 04 FF CA */ cmpwi r4, -54
+/* 801D4408 001D0068 41 81 00 44 */ bgt lbl_801D444C
+/* 801D440C 001D006C 3C 60 00 01 */ lis r3, 0x0000C350@ha
+/* 801D4410 001D0070 38 03 C3 50 */ addi r0, r3, 0x0000C350@l
+/* 801D4414 001D0074 7C 1F 00 00 */ cmpw r31, r0
+/* 801D4418 001D0078 40 81 00 1C */ ble lbl_801D4434
+/* 801D441C 001D007C FC 40 F8 90 */ fmr f2, f31
+/* 801D4420 001D0080 C8 22 95 B8 */ lfd f1, lbl_80641BB8-_SDA2_BASE_(r2)
+/* 801D4424 001D0084 4B FF FC 29 */ bl copysign
+/* 801D4428 001D0088 C8 02 95 B8 */ lfd f0, lbl_80641BB8-_SDA2_BASE_(r2)
+/* 801D442C 001D008C FC 20 00 72 */ fmul f1, f0, f1
+/* 801D4430 001D0090 48 00 00 3C */ b lbl_801D446C
+lbl_801D4434:
+/* 801D4434 001D0094 FC 40 F8 90 */ fmr f2, f31
+/* 801D4438 001D0098 C8 22 95 B0 */ lfd f1, lbl_80641BB0-_SDA2_BASE_(r2)
+/* 801D443C 001D009C 4B FF FC 11 */ bl copysign
+/* 801D4440 001D00A0 C8 02 95 B0 */ lfd f0, lbl_80641BB0-_SDA2_BASE_(r2)
+/* 801D4444 001D00A4 FC 20 00 72 */ fmul f1, f0, f1
+/* 801D4448 001D00A8 48 00 00 24 */ b lbl_801D446C
+lbl_801D444C:
+/* 801D444C 001D00AC 38 04 00 36 */ addi r0, r4, 0x36
+/* 801D4450 001D00B0 54 A3 03 00 */ rlwinm r3, r5, 0, 0xc, 0
+/* 801D4454 001D00B4 54 00 A0 16 */ slwi r0, r0, 0x14
+/* 801D4458 001D00B8 C8 22 95 C0 */ lfd f1, lbl_80641BC0-_SDA2_BASE_(r2)
+/* 801D445C 001D00BC 7C 60 03 78 */ or r0, r3, r0
+/* 801D4460 001D00C0 90 01 00 08 */ stw r0, 8(r1)
+/* 801D4464 001D00C4 C8 01 00 08 */ lfd f0, 8(r1)
+/* 801D4468 001D00C8 FC 21 00 32 */ fmul f1, f1, f0
+lbl_801D446C:
+/* 801D446C 001D00CC 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D4470 001D00D0 CB E1 00 18 */ lfd f31, 0x18(r1)
+/* 801D4474 001D00D4 83 E1 00 14 */ lwz r31, 0x14(r1)
+/* 801D4478 001D00D8 7C 08 03 A6 */ mtlr r0
+/* 801D447C 001D00DC 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D4480 001D00E0 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_sin.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_sin.s new file mode 100644 index 0000000..082eba7 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_sin.s @@ -0,0 +1,68 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global sin
+sin:
+/* 801D4484 001D00E4 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D4488 001D00E8 7C 08 02 A6 */ mflr r0
+/* 801D448C 001D00EC 3C 60 3F E9 */ lis r3, 0x3FE921FB@ha
+/* 801D4490 001D00F0 C8 42 95 C8 */ lfd f2, lbl_80641BC8-_SDA2_BASE_(r2)
+/* 801D4494 001D00F4 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4498 001D00F8 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D449C 001D00FC 38 03 21 FB */ addi r0, r3, 0x3FE921FB@l
+/* 801D44A0 001D0100 80 61 00 08 */ lwz r3, 8(r1)
+/* 801D44A4 001D0104 54 63 00 7E */ clrlwi r3, r3, 1
+/* 801D44A8 001D0108 7C 03 00 00 */ cmpw r3, r0
+/* 801D44AC 001D010C 41 81 00 10 */ bgt lbl_801D44BC
+/* 801D44B0 001D0110 38 60 00 00 */ li r3, 0
+/* 801D44B4 001D0114 4B FF F6 41 */ bl __kernel_sin
+/* 801D44B8 001D0118 48 00 00 94 */ b lbl_801D454C
+lbl_801D44BC:
+/* 801D44BC 001D011C 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D44C0 001D0120 7C 03 00 00 */ cmpw r3, r0
+/* 801D44C4 001D0124 41 80 00 0C */ blt lbl_801D44D0
+/* 801D44C8 001D0128 FC 21 08 28 */ fsub f1, f1, f1
+/* 801D44CC 001D012C 48 00 00 80 */ b lbl_801D454C
+lbl_801D44D0:
+/* 801D44D0 001D0130 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D44D4 001D0134 4B FF DA 6D */ bl __ieee754_rem_pio2
+/* 801D44D8 001D0138 54 60 07 BE */ clrlwi r0, r3, 0x1e
+/* 801D44DC 001D013C 2C 00 00 01 */ cmpwi r0, 1
+/* 801D44E0 001D0140 41 82 00 34 */ beq lbl_801D4514
+/* 801D44E4 001D0144 40 80 00 10 */ bge lbl_801D44F4
+/* 801D44E8 001D0148 2C 00 00 00 */ cmpwi r0, 0
+/* 801D44EC 001D014C 40 80 00 14 */ bge lbl_801D4500
+/* 801D44F0 001D0150 48 00 00 4C */ b lbl_801D453C
+lbl_801D44F4:
+/* 801D44F4 001D0154 2C 00 00 03 */ cmpwi r0, 3
+/* 801D44F8 001D0158 40 80 00 44 */ bge lbl_801D453C
+/* 801D44FC 001D015C 48 00 00 28 */ b lbl_801D4524
+lbl_801D4500:
+/* 801D4500 001D0160 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4504 001D0164 38 60 00 01 */ li r3, 1
+/* 801D4508 001D0168 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D450C 001D016C 4B FF F5 E9 */ bl __kernel_sin
+/* 801D4510 001D0170 48 00 00 3C */ b lbl_801D454C
+lbl_801D4514:
+/* 801D4514 001D0174 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4518 001D0178 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D451C 001D017C 4B FF DD BD */ bl __kernel_cos
+/* 801D4520 001D0180 48 00 00 2C */ b lbl_801D454C
+lbl_801D4524:
+/* 801D4524 001D0184 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4528 001D0188 38 60 00 01 */ li r3, 1
+/* 801D452C 001D018C C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D4530 001D0190 4B FF F5 C5 */ bl __kernel_sin
+/* 801D4534 001D0194 FC 20 08 50 */ fneg f1, f1
+/* 801D4538 001D0198 48 00 00 14 */ b lbl_801D454C
+lbl_801D453C:
+/* 801D453C 001D019C C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D4540 001D01A0 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D4544 001D01A4 4B FF DD 95 */ bl __kernel_cos
+/* 801D4548 001D01A8 FC 20 08 50 */ fneg f1, f1
+lbl_801D454C:
+/* 801D454C 001D01AC 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D4550 001D01B0 7C 08 03 A6 */ mtlr r0
+/* 801D4554 001D01B4 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D4558 001D01B8 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/s_tan.s b/asm/MSL_C/MSL_Common_Embedded/Math/s_tan.s new file mode 100644 index 0000000..e7443cd --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/s_tan.s @@ -0,0 +1,39 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global tan
+tan:
+/* 801D455C 001D01BC 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D4560 001D01C0 7C 08 02 A6 */ mflr r0
+/* 801D4564 001D01C4 3C 60 3F E9 */ lis r3, 0x3FE921FB@ha
+/* 801D4568 001D01C8 C8 42 95 D0 */ lfd f2, lbl_80641BD0-_SDA2_BASE_(r2)
+/* 801D456C 001D01CC D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4570 001D01D0 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D4574 001D01D4 38 03 21 FB */ addi r0, r3, 0x3FE921FB@l
+/* 801D4578 001D01D8 80 61 00 08 */ lwz r3, 8(r1)
+/* 801D457C 001D01DC 54 63 00 7E */ clrlwi r3, r3, 1
+/* 801D4580 001D01E0 7C 03 00 00 */ cmpw r3, r0
+/* 801D4584 001D01E4 41 81 00 10 */ bgt lbl_801D4594
+/* 801D4588 001D01E8 38 60 00 01 */ li r3, 1
+/* 801D458C 001D01EC 4B FF F6 29 */ bl __kernel_tan
+/* 801D4590 001D01F0 48 00 00 34 */ b lbl_801D45C4
+lbl_801D4594:
+/* 801D4594 001D01F4 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D4598 001D01F8 7C 03 00 00 */ cmpw r3, r0
+/* 801D459C 001D01FC 41 80 00 0C */ blt lbl_801D45A8
+/* 801D45A0 001D0200 FC 21 08 28 */ fsub f1, f1, f1
+/* 801D45A4 001D0204 48 00 00 20 */ b lbl_801D45C4
+lbl_801D45A8:
+/* 801D45A8 001D0208 38 61 00 10 */ addi r3, r1, 0x10
+/* 801D45AC 001D020C 4B FF D9 95 */ bl __ieee754_rem_pio2
+/* 801D45B0 001D0210 54 60 0F BC */ rlwinm r0, r3, 1, 0x1e, 0x1e
+/* 801D45B4 001D0214 C8 21 00 10 */ lfd f1, 0x10(r1)
+/* 801D45B8 001D0218 C8 41 00 18 */ lfd f2, 0x18(r1)
+/* 801D45BC 001D021C 20 60 00 01 */ subfic r3, r0, 1
+/* 801D45C0 001D0220 4B FF F5 F5 */ bl __kernel_tan
+lbl_801D45C4:
+/* 801D45C4 001D0224 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D45C8 001D0228 7C 08 03 A6 */ mtlr r0
+/* 801D45CC 001D022C 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D45D0 001D0230 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_acos.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_acos.s new file mode 100644 index 0000000..cd1f558 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_acos.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global acos
+acos:
+/* 801D45D4 001D0234 4B FF C6 28 */ b __ieee754_acos
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_asin.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_asin.s new file mode 100644 index 0000000..d9aff7a --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_asin.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global asin
+asin:
+/* 801D45D8 001D0238 4B FF C8 E8 */ b __ieee754_asin
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_atan2.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_atan2.s new file mode 100644 index 0000000..f729248 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_atan2.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global atan2
+atan2:
+/* 801D45DC 001D023C 4B FF CB 7C */ b __ieee754_atan2
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_fmod.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_fmod.s new file mode 100644 index 0000000..abaa3fb --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_fmod.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global fmod
+fmod:
+/* 801D45E0 001D0240 4B FF CD E8 */ b __ieee754_fmod
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_pow.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_pow.s new file mode 100644 index 0000000..cd9f837 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_pow.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global pow
+pow:
+/* 801D45E4 001D0244 4B FF D1 14 */ b __ieee754_pow
diff --git a/asm/MSL_C/MSL_Common_Embedded/Math/w_sqrt.s b/asm/MSL_C/MSL_Common_Embedded/Math/w_sqrt.s new file mode 100644 index 0000000..6ad6bf8 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/Math/w_sqrt.s @@ -0,0 +1,7 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global sqrt
+sqrt:
+/* 801D4834 001D0494 4B FF FD B4 */ b __ieee754_sqrt
diff --git a/asm/MSL_C/MSL_Common_Embedded/ansi_fp.s b/asm/MSL_C/MSL_Common_Embedded/ansi_fp.s new file mode 100644 index 0000000..9104000 --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/ansi_fp.s @@ -0,0 +1,1820 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global __ull2dec
+__ull2dec:
+/* 801C7A28 001C3688 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801C7A2C 001C368C 7C 08 02 A6 */ mflr r0
+/* 801C7A30 001C3690 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801C7A34 001C3694 38 00 00 00 */ li r0, 0
+/* 801C7A38 001C3698 93 E1 00 1C */ stw r31, 0x1c(r1)
+/* 801C7A3C 001C369C 7C BF 2B 78 */ mr r31, r5
+/* 801C7A40 001C36A0 93 C1 00 18 */ stw r30, 0x18(r1)
+/* 801C7A44 001C36A4 7C DE 33 78 */ mr r30, r6
+/* 801C7A48 001C36A8 93 A1 00 14 */ stw r29, 0x14(r1)
+/* 801C7A4C 001C36AC 7C 7D 1B 78 */ mr r29, r3
+/* 801C7A50 001C36B0 98 03 00 00 */ stb r0, 0(r3)
+/* 801C7A54 001C36B4 98 03 00 04 */ stb r0, 4(r3)
+/* 801C7A58 001C36B8 48 00 00 48 */ b lbl_801C7AA0
+lbl_801C7A5C:
+/* 801C7A5C 001C36BC 7F E3 FB 78 */ mr r3, r31
+/* 801C7A60 001C36C0 7F C4 F3 78 */ mr r4, r30
+/* 801C7A64 001C36C4 38 C0 00 0A */ li r6, 0xa
+/* 801C7A68 001C36C8 38 A0 00 00 */ li r5, 0
+/* 801C7A6C 001C36CC 4B FF F9 45 */ bl __mod2u
+/* 801C7A70 001C36D0 89 1D 00 04 */ lbz r8, 4(r29)
+/* 801C7A74 001C36D4 7F E3 FB 78 */ mr r3, r31
+/* 801C7A78 001C36D8 38 C0 00 0A */ li r6, 0xa
+/* 801C7A7C 001C36DC 38 A0 00 00 */ li r5, 0
+/* 801C7A80 001C36E0 7C FD 42 14 */ add r7, r29, r8
+/* 801C7A84 001C36E4 38 08 00 01 */ addi r0, r8, 1
+/* 801C7A88 001C36E8 98 87 00 05 */ stb r4, 5(r7)
+/* 801C7A8C 001C36EC 7F C4 F3 78 */ mr r4, r30
+/* 801C7A90 001C36F0 98 1D 00 04 */ stb r0, 4(r29)
+/* 801C7A94 001C36F4 4B FF F6 F9 */ bl __div2u
+/* 801C7A98 001C36F8 7C 9E 23 78 */ mr r30, r4
+/* 801C7A9C 001C36FC 7C 7F 1B 78 */ mr r31, r3
+lbl_801C7AA0:
+/* 801C7AA0 001C3700 7F C0 FB 79 */ or. r0, r30, r31
+/* 801C7AA4 001C3704 40 82 FF B8 */ bne lbl_801C7A5C
+/* 801C7AA8 001C3708 88 1D 00 04 */ lbz r0, 4(r29)
+/* 801C7AAC 001C370C 38 9D 00 05 */ addi r4, r29, 5
+/* 801C7AB0 001C3710 7C 7D 02 14 */ add r3, r29, r0
+/* 801C7AB4 001C3714 38 63 00 05 */ addi r3, r3, 5
+/* 801C7AB8 001C3718 48 00 00 18 */ b lbl_801C7AD0
+lbl_801C7ABC:
+/* 801C7ABC 001C371C 88 A4 00 00 */ lbz r5, 0(r4)
+/* 801C7AC0 001C3720 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C7AC4 001C3724 98 04 00 00 */ stb r0, 0(r4)
+/* 801C7AC8 001C3728 38 84 00 01 */ addi r4, r4, 1
+/* 801C7ACC 001C372C 98 A3 00 00 */ stb r5, 0(r3)
+lbl_801C7AD0:
+/* 801C7AD0 001C3730 38 63 FF FF */ addi r3, r3, -1
+/* 801C7AD4 001C3734 7C 04 18 40 */ cmplw r4, r3
+/* 801C7AD8 001C3738 41 80 FF E4 */ blt lbl_801C7ABC
+/* 801C7ADC 001C373C 88 7D 00 04 */ lbz r3, 4(r29)
+/* 801C7AE0 001C3740 38 03 FF FF */ addi r0, r3, -1
+/* 801C7AE4 001C3744 B0 1D 00 02 */ sth r0, 2(r29)
+/* 801C7AE8 001C3748 83 E1 00 1C */ lwz r31, 0x1c(r1)
+/* 801C7AEC 001C374C 83 C1 00 18 */ lwz r30, 0x18(r1)
+/* 801C7AF0 001C3750 83 A1 00 14 */ lwz r29, 0x14(r1)
+/* 801C7AF4 001C3754 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801C7AF8 001C3758 7C 08 03 A6 */ mtlr r0
+/* 801C7AFC 001C375C 38 21 00 20 */ addi r1, r1, 0x20
+/* 801C7B00 001C3760 4E 80 00 20 */ blr
+
+.global __timesdec
+__timesdec:
+/* 801C7B04 001C3764 94 21 FF A0 */ stwu r1, -0x60(r1)
+/* 801C7B08 001C3768 3C C0 CC CD */ lis r6, 0xCCCCCCCD@ha
+/* 801C7B0C 001C376C 89 04 00 04 */ lbz r8, 4(r4)
+/* 801C7B10 001C3770 39 60 00 00 */ li r11, 0
+/* 801C7B14 001C3774 93 E1 00 5C */ stw r31, 0x5c(r1)
+/* 801C7B18 001C3778 38 01 00 08 */ addi r0, r1, 8
+/* 801C7B1C 001C377C 88 E5 00 04 */ lbz r7, 4(r5)
+/* 801C7B20 001C3780 39 26 CC CD */ addi r9, r6, 0xCCCCCCCD@l
+/* 801C7B24 001C3784 93 C1 00 58 */ stw r30, 0x58(r1)
+/* 801C7B28 001C3788 7D 88 3A 14 */ add r12, r8, r7
+/* 801C7B2C 001C378C 93 A1 00 54 */ stw r29, 0x54(r1)
+/* 801C7B30 001C3790 39 8C FF FF */ addi r12, r12, -1
+/* 801C7B34 001C3794 7C C0 62 14 */ add r6, r0, r12
+/* 801C7B38 001C3798 38 C6 00 01 */ addi r6, r6, 1
+/* 801C7B3C 001C379C 99 63 00 00 */ stb r11, 0(r3)
+/* 801C7B40 001C37A0 7C C0 33 78 */ mr r0, r6
+/* 801C7B44 001C37A4 48 00 01 30 */ b lbl_801C7C74
+lbl_801C7B48:
+/* 801C7B48 001C37A8 88 E5 00 04 */ lbz r7, 4(r5)
+/* 801C7B4C 001C37AC 3B E7 FF FF */ addi r31, r7, -1
+/* 801C7B50 001C37B0 7C FF 60 50 */ subf r7, r31, r12
+/* 801C7B54 001C37B4 37 C7 FF FF */ addic. r30, r7, -1
+/* 801C7B58 001C37B8 40 80 00 0C */ bge lbl_801C7B64
+/* 801C7B5C 001C37BC 3B C0 00 00 */ li r30, 0
+/* 801C7B60 001C37C0 3B EC FF FF */ addi r31, r12, -1
+lbl_801C7B64:
+/* 801C7B64 001C37C4 88 E4 00 04 */ lbz r7, 4(r4)
+/* 801C7B68 001C37C8 7D 05 FA 14 */ add r8, r5, r31
+/* 801C7B6C 001C37CC 3B FF 00 01 */ addi r31, r31, 1
+/* 801C7B70 001C37D0 7D 44 F2 14 */ add r10, r4, r30
+/* 801C7B74 001C37D4 7C FE 38 50 */ subf r7, r30, r7
+/* 801C7B78 001C37D8 3B A8 00 05 */ addi r29, r8, 5
+/* 801C7B7C 001C37DC 7C 1F 38 00 */ cmpw r31, r7
+/* 801C7B80 001C37E0 3B CA 00 05 */ addi r30, r10, 5
+/* 801C7B84 001C37E4 40 81 00 08 */ ble lbl_801C7B8C
+/* 801C7B88 001C37E8 7C FF 3B 78 */ mr r31, r7
+lbl_801C7B8C:
+/* 801C7B8C 001C37EC 2C 1F 00 00 */ cmpwi r31, 0
+/* 801C7B90 001C37F0 40 81 00 C4 */ ble lbl_801C7C54
+/* 801C7B94 001C37F4 57 E7 E8 FF */ rlwinm. r7, r31, 0x1d, 3, 0x1f
+/* 801C7B98 001C37F8 7C E9 03 A6 */ mtctr r7
+/* 801C7B9C 001C37FC 41 82 00 98 */ beq lbl_801C7C34
+lbl_801C7BA0:
+/* 801C7BA0 001C3800 89 5E 00 00 */ lbz r10, 0(r30)
+/* 801C7BA4 001C3804 89 1D 00 00 */ lbz r8, 0(r29)
+/* 801C7BA8 001C3808 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BAC 001C380C 89 5E 00 01 */ lbz r10, 1(r30)
+/* 801C7BB0 001C3810 89 1D FF FF */ lbz r8, -1(r29)
+/* 801C7BB4 001C3814 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7BB8 001C3818 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BBC 001C381C 89 5E 00 02 */ lbz r10, 2(r30)
+/* 801C7BC0 001C3820 89 1D FF FE */ lbz r8, -2(r29)
+/* 801C7BC4 001C3824 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7BC8 001C3828 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BCC 001C382C 89 5E 00 03 */ lbz r10, 3(r30)
+/* 801C7BD0 001C3830 89 1D FF FD */ lbz r8, -3(r29)
+/* 801C7BD4 001C3834 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7BD8 001C3838 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BDC 001C383C 89 5E 00 04 */ lbz r10, 4(r30)
+/* 801C7BE0 001C3840 89 1D FF FC */ lbz r8, -4(r29)
+/* 801C7BE4 001C3844 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7BE8 001C3848 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BEC 001C384C 89 5E 00 05 */ lbz r10, 5(r30)
+/* 801C7BF0 001C3850 89 1D FF FB */ lbz r8, -5(r29)
+/* 801C7BF4 001C3854 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7BF8 001C3858 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7BFC 001C385C 89 5E 00 06 */ lbz r10, 6(r30)
+/* 801C7C00 001C3860 89 1D FF FA */ lbz r8, -6(r29)
+/* 801C7C04 001C3864 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7C08 001C3868 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7C0C 001C386C 89 5E 00 07 */ lbz r10, 7(r30)
+/* 801C7C10 001C3870 89 1D FF F9 */ lbz r8, -7(r29)
+/* 801C7C14 001C3874 3B DE 00 08 */ addi r30, r30, 8
+/* 801C7C18 001C3878 3B BD FF F8 */ addi r29, r29, -8
+/* 801C7C1C 001C387C 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7C20 001C3880 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7C24 001C3884 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7C28 001C3888 42 00 FF 78 */ bdnz lbl_801C7BA0
+/* 801C7C2C 001C388C 73 FF 00 07 */ andi. r31, r31, 7
+/* 801C7C30 001C3890 41 82 00 24 */ beq lbl_801C7C54
+lbl_801C7C34:
+/* 801C7C34 001C3894 7F E9 03 A6 */ mtctr r31
+lbl_801C7C38:
+/* 801C7C38 001C3898 89 5E 00 00 */ lbz r10, 0(r30)
+/* 801C7C3C 001C389C 3B DE 00 01 */ addi r30, r30, 1
+/* 801C7C40 001C38A0 89 1D 00 00 */ lbz r8, 0(r29)
+/* 801C7C44 001C38A4 3B BD FF FF */ addi r29, r29, -1
+/* 801C7C48 001C38A8 7C EA 41 D6 */ mullw r7, r10, r8
+/* 801C7C4C 001C38AC 7D 6B 3A 14 */ add r11, r11, r7
+/* 801C7C50 001C38B0 42 00 FF E8 */ bdnz lbl_801C7C38
+lbl_801C7C54:
+/* 801C7C54 001C38B4 7D 09 58 16 */ mulhwu r8, r9, r11
+/* 801C7C58 001C38B8 39 8C FF FF */ addi r12, r12, -1
+/* 801C7C5C 001C38BC 7D 07 43 78 */ mr r7, r8
+/* 801C7C60 001C38C0 55 08 E8 FE */ srwi r8, r8, 3
+/* 801C7C64 001C38C4 1D 08 00 0A */ mulli r8, r8, 0xa
+/* 801C7C68 001C38C8 7D 08 58 50 */ subf r8, r8, r11
+/* 801C7C6C 001C38CC 54 EB E8 FE */ srwi r11, r7, 3
+/* 801C7C70 001C38D0 9D 06 FF FF */ stbu r8, -1(r6)
+lbl_801C7C74:
+/* 801C7C74 001C38D4 2C 0C 00 00 */ cmpwi r12, 0
+/* 801C7C78 001C38D8 41 81 FE D0 */ bgt lbl_801C7B48
+/* 801C7C7C 001C38DC A8 E4 00 02 */ lha r7, 2(r4)
+/* 801C7C80 001C38E0 2C 0B 00 00 */ cmpwi r11, 0
+/* 801C7C84 001C38E4 A8 85 00 02 */ lha r4, 2(r5)
+/* 801C7C88 001C38E8 7C 87 22 14 */ add r4, r7, r4
+/* 801C7C8C 001C38EC B0 83 00 02 */ sth r4, 2(r3)
+/* 801C7C90 001C38F0 41 82 00 14 */ beq lbl_801C7CA4
+/* 801C7C94 001C38F4 9D 66 FF FF */ stbu r11, -1(r6)
+/* 801C7C98 001C38F8 A8 83 00 02 */ lha r4, 2(r3)
+/* 801C7C9C 001C38FC 38 84 00 01 */ addi r4, r4, 1
+/* 801C7CA0 001C3900 B0 83 00 02 */ sth r4, 2(r3)
+lbl_801C7CA4:
+/* 801C7CA4 001C3904 38 E0 00 00 */ li r7, 0
+/* 801C7CA8 001C3908 48 00 00 18 */ b lbl_801C7CC0
+lbl_801C7CAC:
+/* 801C7CAC 001C390C 88 A6 00 00 */ lbz r5, 0(r6)
+/* 801C7CB0 001C3910 7C 83 3A 14 */ add r4, r3, r7
+/* 801C7CB4 001C3914 38 E7 00 01 */ addi r7, r7, 1
+/* 801C7CB8 001C3918 38 C6 00 01 */ addi r6, r6, 1
+/* 801C7CBC 001C391C 98 A4 00 05 */ stb r5, 5(r4)
+lbl_801C7CC0:
+/* 801C7CC0 001C3920 2C 07 00 24 */ cmpwi r7, 0x24
+/* 801C7CC4 001C3924 40 80 00 0C */ bge lbl_801C7CD0
+/* 801C7CC8 001C3928 7C 06 00 40 */ cmplw r6, r0
+/* 801C7CCC 001C392C 41 80 FF E0 */ blt lbl_801C7CAC
+lbl_801C7CD0:
+/* 801C7CD0 001C3930 7C 06 00 40 */ cmplw r6, r0
+/* 801C7CD4 001C3934 98 E3 00 04 */ stb r7, 4(r3)
+/* 801C7CD8 001C3938 40 80 00 A0 */ bge lbl_801C7D78
+/* 801C7CDC 001C393C 88 86 00 00 */ lbz r4, 0(r6)
+/* 801C7CE0 001C3940 28 04 00 05 */ cmplwi r4, 5
+/* 801C7CE4 001C3944 41 80 00 94 */ blt lbl_801C7D78
+/* 801C7CE8 001C3948 40 82 00 38 */ bne lbl_801C7D20
+/* 801C7CEC 001C394C 38 A6 00 01 */ addi r5, r6, 1
+/* 801C7CF0 001C3950 7C 85 00 50 */ subf r4, r5, r0
+/* 801C7CF4 001C3954 7C 89 03 A6 */ mtctr r4
+/* 801C7CF8 001C3958 7C 05 00 40 */ cmplw r5, r0
+/* 801C7CFC 001C395C 40 80 00 18 */ bge lbl_801C7D14
+lbl_801C7D00:
+/* 801C7D00 001C3960 88 05 00 00 */ lbz r0, 0(r5)
+/* 801C7D04 001C3964 2C 00 00 00 */ cmpwi r0, 0
+/* 801C7D08 001C3968 40 82 00 18 */ bne lbl_801C7D20
+/* 801C7D0C 001C396C 38 A5 00 01 */ addi r5, r5, 1
+/* 801C7D10 001C3970 42 00 FF F0 */ bdnz lbl_801C7D00
+lbl_801C7D14:
+/* 801C7D14 001C3974 88 06 FF FF */ lbz r0, -1(r6)
+/* 801C7D18 001C3978 54 00 07 FF */ clrlwi. r0, r0, 0x1f
+/* 801C7D1C 001C397C 41 82 00 5C */ beq lbl_801C7D78
+lbl_801C7D20:
+/* 801C7D20 001C3980 88 83 00 04 */ lbz r4, 4(r3)
+/* 801C7D24 001C3984 38 C3 00 05 */ addi r6, r3, 5
+/* 801C7D28 001C3988 38 00 00 00 */ li r0, 0
+/* 801C7D2C 001C398C 7C A6 22 14 */ add r5, r6, r4
+/* 801C7D30 001C3990 38 A5 FF FF */ addi r5, r5, -1
+lbl_801C7D34:
+/* 801C7D34 001C3994 88 85 00 00 */ lbz r4, 0(r5)
+/* 801C7D38 001C3998 28 04 00 09 */ cmplwi r4, 9
+/* 801C7D3C 001C399C 40 80 00 10 */ bge lbl_801C7D4C
+/* 801C7D40 001C39A0 38 04 00 01 */ addi r0, r4, 1
+/* 801C7D44 001C39A4 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7D48 001C39A8 48 00 00 30 */ b lbl_801C7D78
+lbl_801C7D4C:
+/* 801C7D4C 001C39AC 7C 05 30 40 */ cmplw r5, r6
+/* 801C7D50 001C39B0 40 82 00 1C */ bne lbl_801C7D6C
+/* 801C7D54 001C39B4 38 00 00 01 */ li r0, 1
+/* 801C7D58 001C39B8 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7D5C 001C39BC A8 83 00 02 */ lha r4, 2(r3)
+/* 801C7D60 001C39C0 38 04 00 01 */ addi r0, r4, 1
+/* 801C7D64 001C39C4 B0 03 00 02 */ sth r0, 2(r3)
+/* 801C7D68 001C39C8 48 00 00 10 */ b lbl_801C7D78
+lbl_801C7D6C:
+/* 801C7D6C 001C39CC 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7D70 001C39D0 38 A5 FF FF */ addi r5, r5, -1
+/* 801C7D74 001C39D4 4B FF FF C0 */ b lbl_801C7D34
+lbl_801C7D78:
+/* 801C7D78 001C39D8 83 E1 00 5C */ lwz r31, 0x5c(r1)
+/* 801C7D7C 001C39DC 83 C1 00 58 */ lwz r30, 0x58(r1)
+/* 801C7D80 001C39E0 83 A1 00 54 */ lwz r29, 0x54(r1)
+/* 801C7D84 001C39E4 38 21 00 60 */ addi r1, r1, 0x60
+/* 801C7D88 001C39E8 4E 80 00 20 */ blr
+
+.global __str2dec
+__str2dec:
+/* 801C7D8C 001C39EC 38 00 00 00 */ li r0, 0
+/* 801C7D90 001C39F0 B0 A3 00 02 */ sth r5, 2(r3)
+/* 801C7D94 001C39F4 38 E0 00 00 */ li r7, 0
+/* 801C7D98 001C39F8 98 03 00 00 */ stb r0, 0(r3)
+/* 801C7D9C 001C39FC 48 00 00 1C */ b lbl_801C7DB8
+lbl_801C7DA0:
+/* 801C7DA0 001C3A00 88 C4 00 00 */ lbz r6, 0(r4)
+/* 801C7DA4 001C3A04 7C A3 3A 14 */ add r5, r3, r7
+/* 801C7DA8 001C3A08 38 84 00 01 */ addi r4, r4, 1
+/* 801C7DAC 001C3A0C 38 E7 00 01 */ addi r7, r7, 1
+/* 801C7DB0 001C3A10 38 06 FF D0 */ addi r0, r6, -48
+/* 801C7DB4 001C3A14 98 05 00 05 */ stb r0, 5(r5)
+lbl_801C7DB8:
+/* 801C7DB8 001C3A18 2C 07 00 24 */ cmpwi r7, 0x24
+/* 801C7DBC 001C3A1C 40 80 00 10 */ bge lbl_801C7DCC
+/* 801C7DC0 001C3A20 88 04 00 00 */ lbz r0, 0(r4)
+/* 801C7DC4 001C3A24 7C 00 07 75 */ extsb. r0, r0
+/* 801C7DC8 001C3A28 40 82 FF D8 */ bne lbl_801C7DA0
+lbl_801C7DCC:
+/* 801C7DCC 001C3A2C 88 04 00 00 */ lbz r0, 0(r4)
+/* 801C7DD0 001C3A30 98 E3 00 04 */ stb r7, 4(r3)
+/* 801C7DD4 001C3A34 7C 00 07 75 */ extsb. r0, r0
+/* 801C7DD8 001C3A38 4D 82 00 20 */ beqlr
+/* 801C7DDC 001C3A3C 2C 00 00 05 */ cmpwi r0, 5
+/* 801C7DE0 001C3A40 4D 80 00 20 */ bltlr
+/* 801C7DE4 001C3A44 41 81 00 38 */ bgt lbl_801C7E1C
+/* 801C7DE8 001C3A48 38 A4 00 01 */ addi r5, r4, 1
+/* 801C7DEC 001C3A4C 48 00 00 14 */ b lbl_801C7E00
+lbl_801C7DF0:
+/* 801C7DF0 001C3A50 7C 80 07 74 */ extsb r0, r4
+/* 801C7DF4 001C3A54 2C 00 00 30 */ cmpwi r0, 0x30
+/* 801C7DF8 001C3A58 40 82 00 24 */ bne lbl_801C7E1C
+/* 801C7DFC 001C3A5C 38 A5 00 01 */ addi r5, r5, 1
+lbl_801C7E00:
+/* 801C7E00 001C3A60 88 85 00 00 */ lbz r4, 0(r5)
+/* 801C7E04 001C3A64 7C 80 07 75 */ extsb. r0, r4
+/* 801C7E08 001C3A68 40 82 FF E8 */ bne lbl_801C7DF0
+/* 801C7E0C 001C3A6C 7C 87 1A 14 */ add r4, r7, r3
+/* 801C7E10 001C3A70 88 04 00 04 */ lbz r0, 4(r4)
+/* 801C7E14 001C3A74 54 00 07 FF */ clrlwi. r0, r0, 0x1f
+/* 801C7E18 001C3A78 4D 82 00 20 */ beqlr
+lbl_801C7E1C:
+/* 801C7E1C 001C3A7C 88 83 00 04 */ lbz r4, 4(r3)
+/* 801C7E20 001C3A80 38 C3 00 05 */ addi r6, r3, 5
+/* 801C7E24 001C3A84 38 00 00 00 */ li r0, 0
+/* 801C7E28 001C3A88 7C A6 22 14 */ add r5, r6, r4
+/* 801C7E2C 001C3A8C 38 A5 FF FF */ addi r5, r5, -1
+lbl_801C7E30:
+/* 801C7E30 001C3A90 88 85 00 00 */ lbz r4, 0(r5)
+/* 801C7E34 001C3A94 28 04 00 09 */ cmplwi r4, 9
+/* 801C7E38 001C3A98 40 80 00 10 */ bge lbl_801C7E48
+/* 801C7E3C 001C3A9C 38 04 00 01 */ addi r0, r4, 1
+/* 801C7E40 001C3AA0 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7E44 001C3AA4 4E 80 00 20 */ blr
+lbl_801C7E48:
+/* 801C7E48 001C3AA8 7C 05 30 40 */ cmplw r5, r6
+/* 801C7E4C 001C3AAC 40 82 00 1C */ bne lbl_801C7E68
+/* 801C7E50 001C3AB0 38 00 00 01 */ li r0, 1
+/* 801C7E54 001C3AB4 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7E58 001C3AB8 A8 83 00 02 */ lha r4, 2(r3)
+/* 801C7E5C 001C3ABC 38 04 00 01 */ addi r0, r4, 1
+/* 801C7E60 001C3AC0 B0 03 00 02 */ sth r0, 2(r3)
+/* 801C7E64 001C3AC4 4E 80 00 20 */ blr
+lbl_801C7E68:
+/* 801C7E68 001C3AC8 98 05 00 00 */ stb r0, 0(r5)
+/* 801C7E6C 001C3ACC 38 A5 FF FF */ addi r5, r5, -1
+/* 801C7E70 001C3AD0 4B FF FF C0 */ b lbl_801C7E30
+/* 801C7E74 001C3AD4 4E 80 00 20 */ blr
+
+.global __two_exp
+__two_exp:
+/* 801C7E78 001C3AD8 94 21 FF 90 */ stwu r1, -0x70(r1)
+/* 801C7E7C 001C3ADC 7C 08 02 A6 */ mflr r0
+/* 801C7E80 001C3AE0 90 01 00 74 */ stw r0, 0x74(r1)
+/* 801C7E84 001C3AE4 38 04 00 40 */ addi r0, r4, 0x40
+/* 801C7E88 001C3AE8 28 00 00 48 */ cmplwi r0, 0x48
+/* 801C7E8C 001C3AEC 93 E1 00 6C */ stw r31, 0x6c(r1)
+/* 801C7E90 001C3AF0 7C 7F 1B 78 */ mr r31, r3
+/* 801C7E94 001C3AF4 93 C1 00 68 */ stw r30, 0x68(r1)
+/* 801C7E98 001C3AF8 7C 9E 23 78 */ mr r30, r4
+/* 801C7E9C 001C3AFC 41 81 02 10 */ bgt lbl_801C80AC
+/* 801C7EA0 001C3B00 3C A0 80 42 */ lis r5, lbl_80422A30@ha
+/* 801C7EA4 001C3B04 54 00 10 3A */ slwi r0, r0, 2
+/* 801C7EA8 001C3B08 38 A5 2A 30 */ addi r5, r5, lbl_80422A30@l
+/* 801C7EAC 001C3B0C 7C A5 00 2E */ lwzx r5, r5, r0
+/* 801C7EB0 001C3B10 7C A9 03 A6 */ mtctr r5
+/* 801C7EB4 001C3B14 4E 80 04 20 */ bctr
+/* 801C7EB8 001C3B18 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7EBC 001C3B1C 38 A0 FF EC */ li r5, -20
+/* 801C7EC0 001C3B20 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7EC4 001C3B24 4B FF FE C9 */ bl __str2dec
+/* 801C7EC8 001C3B28 48 00 03 04 */ b lbl_801C81CC
+/* 801C7ECC 001C3B2C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7ED0 001C3B30 38 A0 FF F0 */ li r5, -16
+/* 801C7ED4 001C3B34 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7ED8 001C3B38 38 84 00 2E */ addi r4, r4, 0x2e
+/* 801C7EDC 001C3B3C 4B FF FE B1 */ bl __str2dec
+/* 801C7EE0 001C3B40 48 00 02 EC */ b lbl_801C81CC
+/* 801C7EE4 001C3B44 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7EE8 001C3B48 38 A0 FF F6 */ li r5, -10
+/* 801C7EEC 001C3B4C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7EF0 001C3B50 38 84 00 55 */ addi r4, r4, 0x55
+/* 801C7EF4 001C3B54 4B FF FE 99 */ bl __str2dec
+/* 801C7EF8 001C3B58 48 00 02 D4 */ b lbl_801C81CC
+/* 801C7EFC 001C3B5C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F00 001C3B60 38 A0 FF FB */ li r5, -5
+/* 801C7F04 001C3B64 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F08 001C3B68 38 84 00 6D */ addi r4, r4, 0x6d
+/* 801C7F0C 001C3B6C 4B FF FE 81 */ bl __str2dec
+/* 801C7F10 001C3B70 48 00 02 BC */ b lbl_801C81CC
+/* 801C7F14 001C3B74 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F18 001C3B78 38 A0 FF FD */ li r5, -3
+/* 801C7F1C 001C3B7C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F20 001C3B80 38 84 00 7A */ addi r4, r4, 0x7a
+/* 801C7F24 001C3B84 4B FF FE 69 */ bl __str2dec
+/* 801C7F28 001C3B88 48 00 02 A4 */ b lbl_801C81CC
+/* 801C7F2C 001C3B8C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F30 001C3B90 38 A0 FF FD */ li r5, -3
+/* 801C7F34 001C3B94 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F38 001C3B98 38 84 00 81 */ addi r4, r4, 0x81
+/* 801C7F3C 001C3B9C 4B FF FE 51 */ bl __str2dec
+/* 801C7F40 001C3BA0 48 00 02 8C */ b lbl_801C81CC
+/* 801C7F44 001C3BA4 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F48 001C3BA8 38 A0 FF FE */ li r5, -2
+/* 801C7F4C 001C3BAC 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F50 001C3BB0 38 84 00 87 */ addi r4, r4, 0x87
+/* 801C7F54 001C3BB4 4B FF FE 39 */ bl __str2dec
+/* 801C7F58 001C3BB8 48 00 02 74 */ b lbl_801C81CC
+/* 801C7F5C 001C3BBC 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F60 001C3BC0 38 A0 FF FE */ li r5, -2
+/* 801C7F64 001C3BC4 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F68 001C3BC8 38 84 00 8D */ addi r4, r4, 0x8d
+/* 801C7F6C 001C3BCC 4B FF FE 21 */ bl __str2dec
+/* 801C7F70 001C3BD0 48 00 02 5C */ b lbl_801C81CC
+/* 801C7F74 001C3BD4 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F78 001C3BD8 38 A0 FF FE */ li r5, -2
+/* 801C7F7C 001C3BDC 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F80 001C3BE0 38 84 00 92 */ addi r4, r4, 0x92
+/* 801C7F84 001C3BE4 4B FF FE 09 */ bl __str2dec
+/* 801C7F88 001C3BE8 48 00 02 44 */ b lbl_801C81CC
+/* 801C7F8C 001C3BEC 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7F90 001C3BF0 38 A0 FF FF */ li r5, -1
+/* 801C7F94 001C3BF4 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7F98 001C3BF8 38 84 00 96 */ addi r4, r4, 0x96
+/* 801C7F9C 001C3BFC 4B FF FD F1 */ bl __str2dec
+/* 801C7FA0 001C3C00 48 00 02 2C */ b lbl_801C81CC
+/* 801C7FA4 001C3C04 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7FA8 001C3C08 38 A0 FF FF */ li r5, -1
+/* 801C7FAC 001C3C0C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7FB0 001C3C10 38 84 00 9A */ addi r4, r4, 0x9a
+/* 801C7FB4 001C3C14 4B FF FD D9 */ bl __str2dec
+/* 801C7FB8 001C3C18 48 00 02 14 */ b lbl_801C81CC
+/* 801C7FBC 001C3C1C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7FC0 001C3C20 38 A0 FF FF */ li r5, -1
+/* 801C7FC4 001C3C24 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7FC8 001C3C28 38 84 00 9D */ addi r4, r4, 0x9d
+/* 801C7FCC 001C3C2C 4B FF FD C1 */ bl __str2dec
+/* 801C7FD0 001C3C30 48 00 01 FC */ b lbl_801C81CC
+/* 801C7FD4 001C3C34 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7FD8 001C3C38 38 A0 00 00 */ li r5, 0
+/* 801C7FDC 001C3C3C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7FE0 001C3C40 38 84 00 9F */ addi r4, r4, 0x9f
+/* 801C7FE4 001C3C44 4B FF FD A9 */ bl __str2dec
+/* 801C7FE8 001C3C48 48 00 01 E4 */ b lbl_801C81CC
+/* 801C7FEC 001C3C4C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C7FF0 001C3C50 38 A0 00 00 */ li r5, 0
+/* 801C7FF4 001C3C54 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C7FF8 001C3C58 38 84 00 A1 */ addi r4, r4, 0xa1
+/* 801C7FFC 001C3C5C 4B FF FD 91 */ bl __str2dec
+/* 801C8000 001C3C60 48 00 01 CC */ b lbl_801C81CC
+/* 801C8004 001C3C64 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8008 001C3C68 38 A0 00 00 */ li r5, 0
+/* 801C800C 001C3C6C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8010 001C3C70 38 84 00 A3 */ addi r4, r4, 0xa3
+/* 801C8014 001C3C74 4B FF FD 79 */ bl __str2dec
+/* 801C8018 001C3C78 48 00 01 B4 */ b lbl_801C81CC
+/* 801C801C 001C3C7C 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8020 001C3C80 38 A0 00 00 */ li r5, 0
+/* 801C8024 001C3C84 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8028 001C3C88 38 84 00 A5 */ addi r4, r4, 0xa5
+/* 801C802C 001C3C8C 4B FF FD 61 */ bl __str2dec
+/* 801C8030 001C3C90 48 00 01 9C */ b lbl_801C81CC
+/* 801C8034 001C3C94 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8038 001C3C98 38 A0 00 01 */ li r5, 1
+/* 801C803C 001C3C9C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8040 001C3CA0 38 84 00 A7 */ addi r4, r4, 0xa7
+/* 801C8044 001C3CA4 4B FF FD 49 */ bl __str2dec
+/* 801C8048 001C3CA8 48 00 01 84 */ b lbl_801C81CC
+/* 801C804C 001C3CAC 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8050 001C3CB0 38 A0 00 01 */ li r5, 1
+/* 801C8054 001C3CB4 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8058 001C3CB8 38 84 00 AA */ addi r4, r4, 0xaa
+/* 801C805C 001C3CBC 4B FF FD 31 */ bl __str2dec
+/* 801C8060 001C3CC0 48 00 01 6C */ b lbl_801C81CC
+/* 801C8064 001C3CC4 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8068 001C3CC8 38 A0 00 01 */ li r5, 1
+/* 801C806C 001C3CCC 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8070 001C3CD0 38 84 00 AD */ addi r4, r4, 0xad
+/* 801C8074 001C3CD4 4B FF FD 19 */ bl __str2dec
+/* 801C8078 001C3CD8 48 00 01 54 */ b lbl_801C81CC
+/* 801C807C 001C3CDC 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8080 001C3CE0 38 A0 00 02 */ li r5, 2
+/* 801C8084 001C3CE4 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8088 001C3CE8 38 84 00 B0 */ addi r4, r4, 0xb0
+/* 801C808C 001C3CEC 4B FF FD 01 */ bl __str2dec
+/* 801C8090 001C3CF0 48 00 01 3C */ b lbl_801C81CC
+/* 801C8094 001C3CF4 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8098 001C3CF8 38 A0 00 02 */ li r5, 2
+/* 801C809C 001C3CFC 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C80A0 001C3D00 38 84 00 B4 */ addi r4, r4, 0xb4
+/* 801C80A4 001C3D04 4B FF FC E9 */ bl __str2dec
+/* 801C80A8 001C3D08 48 00 01 24 */ b lbl_801C81CC
+lbl_801C80AC:
+/* 801C80AC 001C3D0C 54 80 0F FE */ srwi r0, r4, 0x1f
+/* 801C80B0 001C3D10 38 61 00 34 */ addi r3, r1, 0x34
+/* 801C80B4 001C3D14 7C 00 22 14 */ add r0, r0, r4
+/* 801C80B8 001C3D18 7C 04 0E 70 */ srawi r4, r0, 1
+/* 801C80BC 001C3D1C 4B FF FD BD */ bl __two_exp
+/* 801C80C0 001C3D20 38 81 00 34 */ addi r4, r1, 0x34
+/* 801C80C4 001C3D24 7F E3 FB 78 */ mr r3, r31
+/* 801C80C8 001C3D28 7C 85 23 78 */ mr r5, r4
+/* 801C80CC 001C3D2C 4B FF FA 39 */ bl __timesdec
+/* 801C80D0 001C3D30 57 C0 07 FF */ clrlwi. r0, r30, 0x1f
+/* 801C80D4 001C3D34 41 82 00 F8 */ beq lbl_801C81CC
+/* 801C80D8 001C3D38 A0 7F 00 00 */ lhz r3, 0(r31)
+/* 801C80DC 001C3D3C 2C 1E 00 00 */ cmpwi r30, 0
+/* 801C80E0 001C3D40 A0 1F 00 02 */ lhz r0, 2(r31)
+/* 801C80E4 001C3D44 B0 61 00 08 */ sth r3, 8(r1)
+/* 801C80E8 001C3D48 B0 01 00 0A */ sth r0, 0xa(r1)
+/* 801C80EC 001C3D4C A0 7F 00 04 */ lhz r3, 4(r31)
+/* 801C80F0 001C3D50 A0 1F 00 06 */ lhz r0, 6(r31)
+/* 801C80F4 001C3D54 B0 61 00 0C */ sth r3, 0xc(r1)
+/* 801C80F8 001C3D58 B0 01 00 0E */ sth r0, 0xe(r1)
+/* 801C80FC 001C3D5C A0 7F 00 08 */ lhz r3, 8(r31)
+/* 801C8100 001C3D60 A0 1F 00 0A */ lhz r0, 0xa(r31)
+/* 801C8104 001C3D64 B0 61 00 10 */ sth r3, 0x10(r1)
+/* 801C8108 001C3D68 B0 01 00 12 */ sth r0, 0x12(r1)
+/* 801C810C 001C3D6C A0 7F 00 0C */ lhz r3, 0xc(r31)
+/* 801C8110 001C3D70 A0 1F 00 0E */ lhz r0, 0xe(r31)
+/* 801C8114 001C3D74 B0 61 00 14 */ sth r3, 0x14(r1)
+/* 801C8118 001C3D78 B0 01 00 16 */ sth r0, 0x16(r1)
+/* 801C811C 001C3D7C A0 7F 00 10 */ lhz r3, 0x10(r31)
+/* 801C8120 001C3D80 A0 1F 00 12 */ lhz r0, 0x12(r31)
+/* 801C8124 001C3D84 B0 61 00 18 */ sth r3, 0x18(r1)
+/* 801C8128 001C3D88 B0 01 00 1A */ sth r0, 0x1a(r1)
+/* 801C812C 001C3D8C A0 7F 00 14 */ lhz r3, 0x14(r31)
+/* 801C8130 001C3D90 A0 1F 00 16 */ lhz r0, 0x16(r31)
+/* 801C8134 001C3D94 B0 61 00 1C */ sth r3, 0x1c(r1)
+/* 801C8138 001C3D98 B0 01 00 1E */ sth r0, 0x1e(r1)
+/* 801C813C 001C3D9C A0 7F 00 18 */ lhz r3, 0x18(r31)
+/* 801C8140 001C3DA0 A0 1F 00 1A */ lhz r0, 0x1a(r31)
+/* 801C8144 001C3DA4 B0 61 00 20 */ sth r3, 0x20(r1)
+/* 801C8148 001C3DA8 B0 01 00 22 */ sth r0, 0x22(r1)
+/* 801C814C 001C3DAC A0 7F 00 1C */ lhz r3, 0x1c(r31)
+/* 801C8150 001C3DB0 A0 1F 00 1E */ lhz r0, 0x1e(r31)
+/* 801C8154 001C3DB4 B0 61 00 24 */ sth r3, 0x24(r1)
+/* 801C8158 001C3DB8 B0 01 00 26 */ sth r0, 0x26(r1)
+/* 801C815C 001C3DBC A0 7F 00 20 */ lhz r3, 0x20(r31)
+/* 801C8160 001C3DC0 A0 1F 00 22 */ lhz r0, 0x22(r31)
+/* 801C8164 001C3DC4 B0 61 00 28 */ sth r3, 0x28(r1)
+/* 801C8168 001C3DC8 B0 01 00 2A */ sth r0, 0x2a(r1)
+/* 801C816C 001C3DCC A0 7F 00 24 */ lhz r3, 0x24(r31)
+/* 801C8170 001C3DD0 A0 1F 00 26 */ lhz r0, 0x26(r31)
+/* 801C8174 001C3DD4 B0 61 00 2C */ sth r3, 0x2c(r1)
+/* 801C8178 001C3DD8 B0 01 00 2E */ sth r0, 0x2e(r1)
+/* 801C817C 001C3DDC A0 1F 00 28 */ lhz r0, 0x28(r31)
+/* 801C8180 001C3DE0 B0 01 00 30 */ sth r0, 0x30(r1)
+/* 801C8184 001C3DE4 40 81 00 20 */ ble lbl_801C81A4
+/* 801C8188 001C3DE8 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C818C 001C3DEC 38 61 00 34 */ addi r3, r1, 0x34
+/* 801C8190 001C3DF0 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8194 001C3DF4 38 A0 00 00 */ li r5, 0
+/* 801C8198 001C3DF8 38 84 00 A1 */ addi r4, r4, 0xa1
+/* 801C819C 001C3DFC 4B FF FB F1 */ bl __str2dec
+/* 801C81A0 001C3E00 48 00 00 1C */ b lbl_801C81BC
+lbl_801C81A4:
+/* 801C81A4 001C3E04 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C81A8 001C3E08 38 61 00 34 */ addi r3, r1, 0x34
+/* 801C81AC 001C3E0C 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C81B0 001C3E10 38 A0 FF FF */ li r5, -1
+/* 801C81B4 001C3E14 38 84 00 9D */ addi r4, r4, 0x9d
+/* 801C81B8 001C3E18 4B FF FB D5 */ bl __str2dec
+lbl_801C81BC:
+/* 801C81BC 001C3E1C 7F E3 FB 78 */ mr r3, r31
+/* 801C81C0 001C3E20 38 81 00 08 */ addi r4, r1, 8
+/* 801C81C4 001C3E24 38 A1 00 34 */ addi r5, r1, 0x34
+/* 801C81C8 001C3E28 4B FF F9 3D */ bl __timesdec
+lbl_801C81CC:
+/* 801C81CC 001C3E2C 80 01 00 74 */ lwz r0, 0x74(r1)
+/* 801C81D0 001C3E30 83 E1 00 6C */ lwz r31, 0x6c(r1)
+/* 801C81D4 001C3E34 83 C1 00 68 */ lwz r30, 0x68(r1)
+/* 801C81D8 001C3E38 7C 08 03 A6 */ mtlr r0
+/* 801C81DC 001C3E3C 38 21 00 70 */ addi r1, r1, 0x70
+/* 801C81E0 001C3E40 4E 80 00 20 */ blr
+
+.global __equals_dec
+__equals_dec:
+/* 801C81E4 001C3E44 88 A3 00 05 */ lbz r5, 5(r3)
+/* 801C81E8 001C3E48 2C 05 00 00 */ cmpwi r5, 0
+/* 801C81EC 001C3E4C 40 82 00 14 */ bne lbl_801C8200
+/* 801C81F0 001C3E50 88 04 00 05 */ lbz r0, 5(r4)
+/* 801C81F4 001C3E54 7C 00 00 34 */ cntlzw r0, r0
+/* 801C81F8 001C3E58 54 03 D9 7E */ srwi r3, r0, 5
+/* 801C81FC 001C3E5C 4E 80 00 20 */ blr
+lbl_801C8200:
+/* 801C8200 001C3E60 88 04 00 05 */ lbz r0, 5(r4)
+/* 801C8204 001C3E64 2C 00 00 00 */ cmpwi r0, 0
+/* 801C8208 001C3E68 40 82 00 10 */ bne lbl_801C8218
+/* 801C820C 001C3E6C 7C A0 00 34 */ cntlzw r0, r5
+/* 801C8210 001C3E70 54 03 D9 7E */ srwi r3, r0, 5
+/* 801C8214 001C3E74 4E 80 00 20 */ blr
+lbl_801C8218:
+/* 801C8218 001C3E78 A8 A3 00 02 */ lha r5, 2(r3)
+/* 801C821C 001C3E7C A8 04 00 02 */ lha r0, 2(r4)
+/* 801C8220 001C3E80 7C 05 00 00 */ cmpw r5, r0
+/* 801C8224 001C3E84 40 82 00 9C */ bne lbl_801C82C0
+/* 801C8228 001C3E88 88 E3 00 04 */ lbz r7, 4(r3)
+/* 801C822C 001C3E8C 88 04 00 04 */ lbz r0, 4(r4)
+/* 801C8230 001C3E90 7C E9 3B 78 */ mr r9, r7
+/* 801C8234 001C3E94 7C 07 00 00 */ cmpw r7, r0
+/* 801C8238 001C3E98 40 81 00 08 */ ble lbl_801C8240
+/* 801C823C 001C3E9C 7C 09 03 78 */ mr r9, r0
+lbl_801C8240:
+/* 801C8240 001C3EA0 39 00 00 00 */ li r8, 0
+/* 801C8244 001C3EA4 7D 29 03 A6 */ mtctr r9
+/* 801C8248 001C3EA8 2C 09 00 00 */ cmpwi r9, 0
+/* 801C824C 001C3EAC 40 81 00 2C */ ble lbl_801C8278
+lbl_801C8250:
+/* 801C8250 001C3EB0 7C C3 42 14 */ add r6, r3, r8
+/* 801C8254 001C3EB4 7C A4 42 14 */ add r5, r4, r8
+/* 801C8258 001C3EB8 88 C6 00 05 */ lbz r6, 5(r6)
+/* 801C825C 001C3EBC 88 05 00 05 */ lbz r0, 5(r5)
+/* 801C8260 001C3EC0 7C 06 00 40 */ cmplw r6, r0
+/* 801C8264 001C3EC4 41 82 00 0C */ beq lbl_801C8270
+/* 801C8268 001C3EC8 38 60 00 00 */ li r3, 0
+/* 801C826C 001C3ECC 4E 80 00 20 */ blr
+lbl_801C8270:
+/* 801C8270 001C3ED0 39 08 00 01 */ addi r8, r8, 1
+/* 801C8274 001C3ED4 42 00 FF DC */ bdnz lbl_801C8250
+lbl_801C8278:
+/* 801C8278 001C3ED8 7C 09 38 00 */ cmpw r9, r7
+/* 801C827C 001C3EDC 40 82 00 08 */ bne lbl_801C8284
+/* 801C8280 001C3EE0 7C 83 23 78 */ mr r3, r4
+lbl_801C8284:
+/* 801C8284 001C3EE4 88 83 00 04 */ lbz r4, 4(r3)
+/* 801C8288 001C3EE8 7C 08 20 50 */ subf r0, r8, r4
+/* 801C828C 001C3EEC 7C 09 03 A6 */ mtctr r0
+/* 801C8290 001C3EF0 7C 08 20 00 */ cmpw r8, r4
+/* 801C8294 001C3EF4 40 80 00 24 */ bge lbl_801C82B8
+lbl_801C8298:
+/* 801C8298 001C3EF8 7C 83 42 14 */ add r4, r3, r8
+/* 801C829C 001C3EFC 88 04 00 05 */ lbz r0, 5(r4)
+/* 801C82A0 001C3F00 2C 00 00 00 */ cmpwi r0, 0
+/* 801C82A4 001C3F04 41 82 00 0C */ beq lbl_801C82B0
+/* 801C82A8 001C3F08 38 60 00 00 */ li r3, 0
+/* 801C82AC 001C3F0C 4E 80 00 20 */ blr
+lbl_801C82B0:
+/* 801C82B0 001C3F10 39 08 00 01 */ addi r8, r8, 1
+/* 801C82B4 001C3F14 42 00 FF E4 */ bdnz lbl_801C8298
+lbl_801C82B8:
+/* 801C82B8 001C3F18 38 60 00 01 */ li r3, 1
+/* 801C82BC 001C3F1C 4E 80 00 20 */ blr
+lbl_801C82C0:
+/* 801C82C0 001C3F20 38 60 00 00 */ li r3, 0
+/* 801C82C4 001C3F24 4E 80 00 20 */ blr
+
+.global __less_dec
+__less_dec:
+/* 801C82C8 001C3F28 88 03 00 05 */ lbz r0, 5(r3)
+/* 801C82CC 001C3F2C 2C 00 00 00 */ cmpwi r0, 0
+/* 801C82D0 001C3F30 40 82 00 18 */ bne lbl_801C82E8
+/* 801C82D4 001C3F34 88 64 00 05 */ lbz r3, 5(r4)
+/* 801C82D8 001C3F38 7C 03 00 D0 */ neg r0, r3
+/* 801C82DC 001C3F3C 7C 00 1B 78 */ or r0, r0, r3
+/* 801C82E0 001C3F40 54 03 0F FE */ srwi r3, r0, 0x1f
+/* 801C82E4 001C3F44 4E 80 00 20 */ blr
+lbl_801C82E8:
+/* 801C82E8 001C3F48 88 04 00 05 */ lbz r0, 5(r4)
+/* 801C82EC 001C3F4C 2C 00 00 00 */ cmpwi r0, 0
+/* 801C82F0 001C3F50 40 82 00 0C */ bne lbl_801C82FC
+/* 801C82F4 001C3F54 38 60 00 00 */ li r3, 0
+/* 801C82F8 001C3F58 4E 80 00 20 */ blr
+lbl_801C82FC:
+/* 801C82FC 001C3F5C A8 A4 00 02 */ lha r5, 2(r4)
+/* 801C8300 001C3F60 A8 03 00 02 */ lha r0, 2(r3)
+/* 801C8304 001C3F64 7C 00 28 00 */ cmpw r0, r5
+/* 801C8308 001C3F68 40 82 00 A8 */ bne lbl_801C83B0
+/* 801C830C 001C3F6C 88 E3 00 04 */ lbz r7, 4(r3)
+/* 801C8310 001C3F70 88 04 00 04 */ lbz r0, 4(r4)
+/* 801C8314 001C3F74 7C E9 3B 78 */ mr r9, r7
+/* 801C8318 001C3F78 7C 07 00 00 */ cmpw r7, r0
+/* 801C831C 001C3F7C 40 81 00 08 */ ble lbl_801C8324
+/* 801C8320 001C3F80 7C 09 03 78 */ mr r9, r0
+lbl_801C8324:
+/* 801C8324 001C3F84 39 00 00 00 */ li r8, 0
+/* 801C8328 001C3F88 7D 29 03 A6 */ mtctr r9
+/* 801C832C 001C3F8C 2C 09 00 00 */ cmpwi r9, 0
+/* 801C8330 001C3F90 40 81 00 3C */ ble lbl_801C836C
+lbl_801C8334:
+/* 801C8334 001C3F94 7C C4 42 14 */ add r6, r4, r8
+/* 801C8338 001C3F98 7C A3 42 14 */ add r5, r3, r8
+/* 801C833C 001C3F9C 88 C6 00 05 */ lbz r6, 5(r6)
+/* 801C8340 001C3FA0 88 05 00 05 */ lbz r0, 5(r5)
+/* 801C8344 001C3FA4 7C 00 30 40 */ cmplw r0, r6
+/* 801C8348 001C3FA8 40 80 00 0C */ bge lbl_801C8354
+/* 801C834C 001C3FAC 38 60 00 01 */ li r3, 1
+/* 801C8350 001C3FB0 4E 80 00 20 */ blr
+lbl_801C8354:
+/* 801C8354 001C3FB4 7C 06 00 40 */ cmplw r6, r0
+/* 801C8358 001C3FB8 40 80 00 0C */ bge lbl_801C8364
+/* 801C835C 001C3FBC 38 60 00 00 */ li r3, 0
+/* 801C8360 001C3FC0 4E 80 00 20 */ blr
+lbl_801C8364:
+/* 801C8364 001C3FC4 39 08 00 01 */ addi r8, r8, 1
+/* 801C8368 001C3FC8 42 00 FF CC */ bdnz lbl_801C8334
+lbl_801C836C:
+/* 801C836C 001C3FCC 7C 09 38 00 */ cmpw r9, r7
+/* 801C8370 001C3FD0 40 82 00 38 */ bne lbl_801C83A8
+/* 801C8374 001C3FD4 88 64 00 04 */ lbz r3, 4(r4)
+/* 801C8378 001C3FD8 7C 08 18 50 */ subf r0, r8, r3
+/* 801C837C 001C3FDC 7C 09 03 A6 */ mtctr r0
+/* 801C8380 001C3FE0 7C 08 18 00 */ cmpw r8, r3
+/* 801C8384 001C3FE4 40 80 00 24 */ bge lbl_801C83A8
+lbl_801C8388:
+/* 801C8388 001C3FE8 7C 64 42 14 */ add r3, r4, r8
+/* 801C838C 001C3FEC 88 03 00 05 */ lbz r0, 5(r3)
+/* 801C8390 001C3FF0 2C 00 00 00 */ cmpwi r0, 0
+/* 801C8394 001C3FF4 41 82 00 0C */ beq lbl_801C83A0
+/* 801C8398 001C3FF8 38 60 00 01 */ li r3, 1
+/* 801C839C 001C3FFC 4E 80 00 20 */ blr
+lbl_801C83A0:
+/* 801C83A0 001C4000 39 08 00 01 */ addi r8, r8, 1
+/* 801C83A4 001C4004 42 00 FF E4 */ bdnz lbl_801C8388
+lbl_801C83A8:
+/* 801C83A8 001C4008 38 60 00 00 */ li r3, 0
+/* 801C83AC 001C400C 4E 80 00 20 */ blr
+lbl_801C83B0:
+/* 801C83B0 001C4010 7C A0 02 78 */ xor r0, r5, r0
+/* 801C83B4 001C4014 7C 03 0E 70 */ srawi r3, r0, 1
+/* 801C83B8 001C4018 7C 00 28 38 */ and r0, r0, r5
+/* 801C83BC 001C401C 7C 00 18 50 */ subf r0, r0, r3
+/* 801C83C0 001C4020 54 03 0F FE */ srwi r3, r0, 0x1f
+/* 801C83C4 001C4024 4E 80 00 20 */ blr
+
+.global __minus_dec
+__minus_dec:
+/* 801C83C8 001C4028 94 21 FF C0 */ stwu r1, -0x40(r1)
+/* 801C83CC 001C402C A1 84 00 1A */ lhz r12, 0x1a(r4)
+/* 801C83D0 001C4030 BE 61 00 0C */ stmw r19, 0xc(r1)
+/* 801C83D4 001C4034 A2 64 00 00 */ lhz r19, 0(r4)
+/* 801C83D8 001C4038 A2 84 00 02 */ lhz r20, 2(r4)
+/* 801C83DC 001C403C A2 A4 00 04 */ lhz r21, 4(r4)
+/* 801C83E0 001C4040 A2 C4 00 06 */ lhz r22, 6(r4)
+/* 801C83E4 001C4044 A2 E4 00 08 */ lhz r23, 8(r4)
+/* 801C83E8 001C4048 A3 04 00 0A */ lhz r24, 0xa(r4)
+/* 801C83EC 001C404C A3 24 00 0C */ lhz r25, 0xc(r4)
+/* 801C83F0 001C4050 A3 44 00 0E */ lhz r26, 0xe(r4)
+/* 801C83F4 001C4054 A3 64 00 10 */ lhz r27, 0x10(r4)
+/* 801C83F8 001C4058 A3 84 00 12 */ lhz r28, 0x12(r4)
+/* 801C83FC 001C405C A3 A4 00 14 */ lhz r29, 0x14(r4)
+/* 801C8400 001C4060 A3 C4 00 16 */ lhz r30, 0x16(r4)
+/* 801C8404 001C4064 A3 E4 00 18 */ lhz r31, 0x18(r4)
+/* 801C8408 001C4068 A1 64 00 1C */ lhz r11, 0x1c(r4)
+/* 801C840C 001C406C A1 44 00 1E */ lhz r10, 0x1e(r4)
+/* 801C8410 001C4070 A1 24 00 20 */ lhz r9, 0x20(r4)
+/* 801C8414 001C4074 A1 04 00 22 */ lhz r8, 0x22(r4)
+/* 801C8418 001C4078 A0 E4 00 24 */ lhz r7, 0x24(r4)
+/* 801C841C 001C407C A0 C4 00 26 */ lhz r6, 0x26(r4)
+/* 801C8420 001C4080 A0 04 00 28 */ lhz r0, 0x28(r4)
+/* 801C8424 001C4084 B2 63 00 00 */ sth r19, 0(r3)
+/* 801C8428 001C4088 B2 83 00 02 */ sth r20, 2(r3)
+/* 801C842C 001C408C B2 A3 00 04 */ sth r21, 4(r3)
+/* 801C8430 001C4090 B2 C3 00 06 */ sth r22, 6(r3)
+/* 801C8434 001C4094 B2 E3 00 08 */ sth r23, 8(r3)
+/* 801C8438 001C4098 B3 03 00 0A */ sth r24, 0xa(r3)
+/* 801C843C 001C409C B3 23 00 0C */ sth r25, 0xc(r3)
+/* 801C8440 001C40A0 B3 43 00 0E */ sth r26, 0xe(r3)
+/* 801C8444 001C40A4 B3 63 00 10 */ sth r27, 0x10(r3)
+/* 801C8448 001C40A8 B3 83 00 12 */ sth r28, 0x12(r3)
+/* 801C844C 001C40AC B3 A3 00 14 */ sth r29, 0x14(r3)
+/* 801C8450 001C40B0 B3 C3 00 16 */ sth r30, 0x16(r3)
+/* 801C8454 001C40B4 B3 E3 00 18 */ sth r31, 0x18(r3)
+/* 801C8458 001C40B8 B1 83 00 1A */ sth r12, 0x1a(r3)
+/* 801C845C 001C40BC B1 63 00 1C */ sth r11, 0x1c(r3)
+/* 801C8460 001C40C0 B1 43 00 1E */ sth r10, 0x1e(r3)
+/* 801C8464 001C40C4 B1 23 00 20 */ sth r9, 0x20(r3)
+/* 801C8468 001C40C8 B1 03 00 22 */ sth r8, 0x22(r3)
+/* 801C846C 001C40CC B0 E3 00 24 */ sth r7, 0x24(r3)
+/* 801C8470 001C40D0 B0 C3 00 26 */ sth r6, 0x26(r3)
+/* 801C8474 001C40D4 B0 03 00 28 */ sth r0, 0x28(r3)
+/* 801C8478 001C40D8 88 05 00 05 */ lbz r0, 5(r5)
+/* 801C847C 001C40DC 2C 00 00 00 */ cmpwi r0, 0
+/* 801C8480 001C40E0 41 82 04 58 */ beq lbl_801C88D8
+/* 801C8484 001C40E4 89 03 00 04 */ lbz r8, 4(r3)
+/* 801C8488 001C40E8 88 05 00 04 */ lbz r0, 4(r5)
+/* 801C848C 001C40EC 7C 08 00 00 */ cmpw r8, r0
+/* 801C8490 001C40F0 40 80 00 08 */ bge lbl_801C8498
+/* 801C8494 001C40F4 7C 08 03 78 */ mr r8, r0
+lbl_801C8498:
+/* 801C8498 001C40F8 A8 85 00 02 */ lha r4, 2(r5)
+/* 801C849C 001C40FC A8 03 00 02 */ lha r0, 2(r3)
+/* 801C84A0 001C4100 7C 04 00 50 */ subf r0, r4, r0
+/* 801C84A4 001C4104 7D 08 02 14 */ add r8, r8, r0
+/* 801C84A8 001C4108 2C 08 00 24 */ cmpwi r8, 0x24
+/* 801C84AC 001C410C 40 81 00 08 */ ble lbl_801C84B4
+/* 801C84B0 001C4110 39 00 00 24 */ li r8, 0x24
+lbl_801C84B4:
+/* 801C84B4 001C4114 38 E0 00 00 */ li r7, 0
+/* 801C84B8 001C4118 48 00 00 18 */ b lbl_801C84D0
+lbl_801C84BC:
+/* 801C84BC 001C411C 88 C3 00 04 */ lbz r6, 4(r3)
+/* 801C84C0 001C4120 7C 83 32 14 */ add r4, r3, r6
+/* 801C84C4 001C4124 38 C6 00 01 */ addi r6, r6, 1
+/* 801C84C8 001C4128 98 E4 00 05 */ stb r7, 5(r4)
+/* 801C84CC 001C412C 98 C3 00 04 */ stb r6, 4(r3)
+lbl_801C84D0:
+/* 801C84D0 001C4130 88 83 00 04 */ lbz r4, 4(r3)
+/* 801C84D4 001C4134 7C 04 40 00 */ cmpw r4, r8
+/* 801C84D8 001C4138 41 80 FF E4 */ blt lbl_801C84BC
+/* 801C84DC 001C413C 88 E5 00 04 */ lbz r7, 4(r5)
+/* 801C84E0 001C4140 38 83 00 05 */ addi r4, r3, 5
+/* 801C84E4 001C4144 7C C4 42 14 */ add r6, r4, r8
+/* 801C84E8 001C4148 7C E7 02 14 */ add r7, r7, r0
+/* 801C84EC 001C414C 7C 07 40 00 */ cmpw r7, r8
+/* 801C84F0 001C4150 40 80 00 08 */ bge lbl_801C84F8
+/* 801C84F4 001C4154 7C C4 3A 14 */ add r6, r4, r7
+lbl_801C84F8:
+/* 801C84F8 001C4158 7C E4 30 50 */ subf r7, r4, r6
+/* 801C84FC 001C415C 39 25 00 05 */ addi r9, r5, 5
+/* 801C8500 001C4160 7C E0 38 50 */ subf r7, r0, r7
+/* 801C8504 001C4164 7D 49 3A 14 */ add r10, r9, r7
+/* 801C8508 001C4168 7D 4B 53 78 */ mr r11, r10
+/* 801C850C 001C416C 48 00 01 24 */ b lbl_801C8630
+lbl_801C8510:
+/* 801C8510 001C4170 8D 06 FF FF */ lbzu r8, -1(r6)
+/* 801C8514 001C4174 8C EA FF FF */ lbzu r7, -1(r10)
+/* 801C8518 001C4178 7C 08 38 40 */ cmplw r8, r7
+/* 801C851C 001C417C 40 80 01 04 */ bge lbl_801C8620
+/* 801C8520 001C4180 39 86 FF FF */ addi r12, r6, -1
+/* 801C8524 001C4184 48 00 00 08 */ b lbl_801C852C
+lbl_801C8528:
+/* 801C8528 001C4188 39 8C FF FF */ addi r12, r12, -1
+lbl_801C852C:
+/* 801C852C 001C418C 88 EC 00 00 */ lbz r7, 0(r12)
+/* 801C8530 001C4190 2C 07 00 00 */ cmpwi r7, 0
+/* 801C8534 001C4194 41 82 FF F4 */ beq lbl_801C8528
+/* 801C8538 001C4198 7C 0C 30 40 */ cmplw r12, r6
+/* 801C853C 001C419C 7D 0C 30 50 */ subf r8, r12, r6
+/* 801C8540 001C41A0 41 82 00 E0 */ beq lbl_801C8620
+/* 801C8544 001C41A4 55 07 E8 FF */ rlwinm. r7, r8, 0x1d, 3, 0x1f
+/* 801C8548 001C41A8 7C E9 03 A6 */ mtctr r7
+/* 801C854C 001C41AC 41 82 00 B4 */ beq lbl_801C8600
+lbl_801C8550:
+/* 801C8550 001C41B0 88 EC 00 00 */ lbz r7, 0(r12)
+/* 801C8554 001C41B4 38 E7 FF FF */ addi r7, r7, -1
+/* 801C8558 001C41B8 98 EC 00 00 */ stb r7, 0(r12)
+/* 801C855C 001C41BC 88 EC 00 01 */ lbz r7, 1(r12)
+/* 801C8560 001C41C0 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C8564 001C41C4 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C8568 001C41C8 38 E7 FF FF */ addi r7, r7, -1
+/* 801C856C 001C41CC 98 EC 00 01 */ stb r7, 1(r12)
+/* 801C8570 001C41D0 88 EC 00 02 */ lbz r7, 2(r12)
+/* 801C8574 001C41D4 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C8578 001C41D8 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C857C 001C41DC 38 E7 FF FF */ addi r7, r7, -1
+/* 801C8580 001C41E0 98 EC 00 02 */ stb r7, 2(r12)
+/* 801C8584 001C41E4 88 EC 00 03 */ lbz r7, 3(r12)
+/* 801C8588 001C41E8 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C858C 001C41EC 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C8590 001C41F0 38 E7 FF FF */ addi r7, r7, -1
+/* 801C8594 001C41F4 98 EC 00 03 */ stb r7, 3(r12)
+/* 801C8598 001C41F8 88 EC 00 04 */ lbz r7, 4(r12)
+/* 801C859C 001C41FC 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C85A0 001C4200 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C85A4 001C4204 38 E7 FF FF */ addi r7, r7, -1
+/* 801C85A8 001C4208 98 EC 00 04 */ stb r7, 4(r12)
+/* 801C85AC 001C420C 88 EC 00 05 */ lbz r7, 5(r12)
+/* 801C85B0 001C4210 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C85B4 001C4214 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C85B8 001C4218 38 E7 FF FF */ addi r7, r7, -1
+/* 801C85BC 001C421C 98 EC 00 05 */ stb r7, 5(r12)
+/* 801C85C0 001C4220 88 EC 00 06 */ lbz r7, 6(r12)
+/* 801C85C4 001C4224 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C85C8 001C4228 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C85CC 001C422C 38 E7 FF FF */ addi r7, r7, -1
+/* 801C85D0 001C4230 98 EC 00 06 */ stb r7, 6(r12)
+/* 801C85D4 001C4234 88 EC 00 07 */ lbz r7, 7(r12)
+/* 801C85D8 001C4238 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C85DC 001C423C 54 E7 06 3E */ clrlwi r7, r7, 0x18
+/* 801C85E0 001C4240 38 E7 FF FF */ addi r7, r7, -1
+/* 801C85E4 001C4244 98 EC 00 07 */ stb r7, 7(r12)
+/* 801C85E8 001C4248 88 EC 00 08 */ lbz r7, 8(r12)
+/* 801C85EC 001C424C 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C85F0 001C4250 9C EC 00 08 */ stbu r7, 8(r12)
+/* 801C85F4 001C4254 42 00 FF 5C */ bdnz lbl_801C8550
+/* 801C85F8 001C4258 71 08 00 07 */ andi. r8, r8, 7
+/* 801C85FC 001C425C 41 82 00 24 */ beq lbl_801C8620
+lbl_801C8600:
+/* 801C8600 001C4260 7D 09 03 A6 */ mtctr r8
+lbl_801C8604:
+/* 801C8604 001C4264 88 EC 00 00 */ lbz r7, 0(r12)
+/* 801C8608 001C4268 38 E7 FF FF */ addi r7, r7, -1
+/* 801C860C 001C426C 98 EC 00 00 */ stb r7, 0(r12)
+/* 801C8610 001C4270 88 EC 00 01 */ lbz r7, 1(r12)
+/* 801C8614 001C4274 38 E7 00 0A */ addi r7, r7, 0xa
+/* 801C8618 001C4278 9C EC 00 01 */ stbu r7, 1(r12)
+/* 801C861C 001C427C 42 00 FF E8 */ bdnz lbl_801C8604
+lbl_801C8620:
+/* 801C8620 001C4280 89 0A 00 00 */ lbz r8, 0(r10)
+/* 801C8624 001C4284 88 E6 00 00 */ lbz r7, 0(r6)
+/* 801C8628 001C4288 7C E8 38 50 */ subf r7, r8, r7
+/* 801C862C 001C428C 98 E6 00 00 */ stb r7, 0(r6)
+lbl_801C8630:
+/* 801C8630 001C4290 7C 06 20 40 */ cmplw r6, r4
+/* 801C8634 001C4294 40 81 00 0C */ ble lbl_801C8640
+/* 801C8638 001C4298 7C 0A 48 40 */ cmplw r10, r9
+/* 801C863C 001C429C 41 81 FE D4 */ bgt lbl_801C8510
+lbl_801C8640:
+/* 801C8640 001C42A0 89 05 00 04 */ lbz r8, 4(r5)
+/* 801C8644 001C42A4 7D 29 58 50 */ subf r9, r9, r11
+/* 801C8648 001C42A8 7C 09 40 00 */ cmpw r9, r8
+/* 801C864C 001C42AC 40 80 01 88 */ bge lbl_801C87D4
+/* 801C8650 001C42B0 88 EB 00 00 */ lbz r7, 0(r11)
+/* 801C8654 001C42B4 39 40 00 00 */ li r10, 0
+/* 801C8658 001C42B8 28 07 00 05 */ cmplwi r7, 5
+/* 801C865C 001C42BC 40 80 00 0C */ bge lbl_801C8668
+/* 801C8660 001C42C0 39 40 00 01 */ li r10, 1
+/* 801C8664 001C42C4 48 00 00 50 */ b lbl_801C86B4
+lbl_801C8668:
+/* 801C8668 001C42C8 40 82 00 4C */ bne lbl_801C86B4
+/* 801C866C 001C42CC 7C A5 42 14 */ add r5, r5, r8
+/* 801C8670 001C42D0 38 CB 00 01 */ addi r6, r11, 1
+/* 801C8674 001C42D4 38 E5 00 05 */ addi r7, r5, 5
+/* 801C8678 001C42D8 7C A6 38 50 */ subf r5, r6, r7
+/* 801C867C 001C42DC 7C A9 03 A6 */ mtctr r5
+/* 801C8680 001C42E0 7C 06 38 40 */ cmplw r6, r7
+/* 801C8684 001C42E4 40 80 00 18 */ bge lbl_801C869C
+lbl_801C8688:
+/* 801C8688 001C42E8 88 A6 00 00 */ lbz r5, 0(r6)
+/* 801C868C 001C42EC 2C 05 00 00 */ cmpwi r5, 0
+/* 801C8690 001C42F0 40 82 01 44 */ bne lbl_801C87D4
+/* 801C8694 001C42F4 38 C6 00 01 */ addi r6, r6, 1
+/* 801C8698 001C42F8 42 00 FF F0 */ bdnz lbl_801C8688
+lbl_801C869C:
+/* 801C869C 001C42FC 7C A4 4A 14 */ add r5, r4, r9
+/* 801C86A0 001C4300 7C C0 2A 14 */ add r6, r0, r5
+/* 801C86A4 001C4304 8C 06 FF FF */ lbzu r0, -1(r6)
+/* 801C86A8 001C4308 54 00 07 FF */ clrlwi. r0, r0, 0x1f
+/* 801C86AC 001C430C 41 82 00 08 */ beq lbl_801C86B4
+/* 801C86B0 001C4310 39 40 00 01 */ li r10, 1
+lbl_801C86B4:
+/* 801C86B4 001C4314 2C 0A 00 00 */ cmpwi r10, 0
+/* 801C86B8 001C4318 41 82 01 1C */ beq lbl_801C87D4
+/* 801C86BC 001C431C 88 06 00 00 */ lbz r0, 0(r6)
+/* 801C86C0 001C4320 28 00 00 01 */ cmplwi r0, 1
+/* 801C86C4 001C4324 40 80 01 04 */ bge lbl_801C87C8
+/* 801C86C8 001C4328 39 06 FF FF */ addi r8, r6, -1
+/* 801C86CC 001C432C 48 00 00 08 */ b lbl_801C86D4
+lbl_801C86D0:
+/* 801C86D0 001C4330 39 08 FF FF */ addi r8, r8, -1
+lbl_801C86D4:
+/* 801C86D4 001C4334 88 08 00 00 */ lbz r0, 0(r8)
+/* 801C86D8 001C4338 2C 00 00 00 */ cmpwi r0, 0
+/* 801C86DC 001C433C 41 82 FF F4 */ beq lbl_801C86D0
+/* 801C86E0 001C4340 7C 08 30 40 */ cmplw r8, r6
+/* 801C86E4 001C4344 7C A8 30 50 */ subf r5, r8, r6
+/* 801C86E8 001C4348 41 82 00 E0 */ beq lbl_801C87C8
+/* 801C86EC 001C434C 54 A0 E8 FF */ rlwinm. r0, r5, 0x1d, 3, 0x1f
+/* 801C86F0 001C4350 7C 09 03 A6 */ mtctr r0
+/* 801C86F4 001C4354 41 82 00 B4 */ beq lbl_801C87A8
+lbl_801C86F8:
+/* 801C86F8 001C4358 88 E8 00 00 */ lbz r7, 0(r8)
+/* 801C86FC 001C435C 38 07 FF FF */ addi r0, r7, -1
+/* 801C8700 001C4360 98 08 00 00 */ stb r0, 0(r8)
+/* 801C8704 001C4364 88 E8 00 01 */ lbz r7, 1(r8)
+/* 801C8708 001C4368 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C870C 001C436C 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8710 001C4370 38 07 FF FF */ addi r0, r7, -1
+/* 801C8714 001C4374 98 08 00 01 */ stb r0, 1(r8)
+/* 801C8718 001C4378 88 E8 00 02 */ lbz r7, 2(r8)
+/* 801C871C 001C437C 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8720 001C4380 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8724 001C4384 38 07 FF FF */ addi r0, r7, -1
+/* 801C8728 001C4388 98 08 00 02 */ stb r0, 2(r8)
+/* 801C872C 001C438C 88 E8 00 03 */ lbz r7, 3(r8)
+/* 801C8730 001C4390 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8734 001C4394 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8738 001C4398 38 07 FF FF */ addi r0, r7, -1
+/* 801C873C 001C439C 98 08 00 03 */ stb r0, 3(r8)
+/* 801C8740 001C43A0 88 E8 00 04 */ lbz r7, 4(r8)
+/* 801C8744 001C43A4 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8748 001C43A8 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C874C 001C43AC 38 07 FF FF */ addi r0, r7, -1
+/* 801C8750 001C43B0 98 08 00 04 */ stb r0, 4(r8)
+/* 801C8754 001C43B4 88 E8 00 05 */ lbz r7, 5(r8)
+/* 801C8758 001C43B8 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C875C 001C43BC 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8760 001C43C0 38 07 FF FF */ addi r0, r7, -1
+/* 801C8764 001C43C4 98 08 00 05 */ stb r0, 5(r8)
+/* 801C8768 001C43C8 88 E8 00 06 */ lbz r7, 6(r8)
+/* 801C876C 001C43CC 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8770 001C43D0 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8774 001C43D4 38 07 FF FF */ addi r0, r7, -1
+/* 801C8778 001C43D8 98 08 00 06 */ stb r0, 6(r8)
+/* 801C877C 001C43DC 88 E8 00 07 */ lbz r7, 7(r8)
+/* 801C8780 001C43E0 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8784 001C43E4 54 07 06 3E */ clrlwi r7, r0, 0x18
+/* 801C8788 001C43E8 38 07 FF FF */ addi r0, r7, -1
+/* 801C878C 001C43EC 98 08 00 07 */ stb r0, 7(r8)
+/* 801C8790 001C43F0 88 E8 00 08 */ lbz r7, 8(r8)
+/* 801C8794 001C43F4 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C8798 001C43F8 9C 08 00 08 */ stbu r0, 8(r8)
+/* 801C879C 001C43FC 42 00 FF 5C */ bdnz lbl_801C86F8
+/* 801C87A0 001C4400 70 A5 00 07 */ andi. r5, r5, 7
+/* 801C87A4 001C4404 41 82 00 24 */ beq lbl_801C87C8
+lbl_801C87A8:
+/* 801C87A8 001C4408 7C A9 03 A6 */ mtctr r5
+lbl_801C87AC:
+/* 801C87AC 001C440C 88 E8 00 00 */ lbz r7, 0(r8)
+/* 801C87B0 001C4410 38 07 FF FF */ addi r0, r7, -1
+/* 801C87B4 001C4414 98 08 00 00 */ stb r0, 0(r8)
+/* 801C87B8 001C4418 88 E8 00 01 */ lbz r7, 1(r8)
+/* 801C87BC 001C441C 38 07 00 0A */ addi r0, r7, 0xa
+/* 801C87C0 001C4420 9C 08 00 01 */ stbu r0, 1(r8)
+/* 801C87C4 001C4424 42 00 FF E8 */ bdnz lbl_801C87AC
+lbl_801C87C8:
+/* 801C87C8 001C4428 88 A6 00 00 */ lbz r5, 0(r6)
+/* 801C87CC 001C442C 38 05 FF FF */ addi r0, r5, -1
+/* 801C87D0 001C4430 98 06 00 00 */ stb r0, 0(r6)
+lbl_801C87D4:
+/* 801C87D4 001C4434 7C 87 23 78 */ mr r7, r4
+/* 801C87D8 001C4438 48 00 00 08 */ b lbl_801C87E0
+lbl_801C87DC:
+/* 801C87DC 001C443C 38 E7 00 01 */ addi r7, r7, 1
+lbl_801C87E0:
+/* 801C87E0 001C4440 88 07 00 00 */ lbz r0, 0(r7)
+/* 801C87E4 001C4444 2C 00 00 00 */ cmpwi r0, 0
+/* 801C87E8 001C4448 41 82 FF F4 */ beq lbl_801C87DC
+/* 801C87EC 001C444C 7C 07 20 40 */ cmplw r7, r4
+/* 801C87F0 001C4450 40 81 00 B0 */ ble lbl_801C88A0
+/* 801C87F4 001C4454 88 03 00 04 */ lbz r0, 4(r3)
+/* 801C87F8 001C4458 7C C4 38 50 */ subf r6, r4, r7
+/* 801C87FC 001C445C A8 A3 00 02 */ lha r5, 2(r3)
+/* 801C8800 001C4460 54 C8 06 3E */ clrlwi r8, r6, 0x18
+/* 801C8804 001C4464 7C C4 02 14 */ add r6, r4, r0
+/* 801C8808 001C4468 7C 08 28 50 */ subf r0, r8, r5
+/* 801C880C 001C446C 7C 07 30 40 */ cmplw r7, r6
+/* 801C8810 001C4470 B0 03 00 02 */ sth r0, 2(r3)
+/* 801C8814 001C4474 7C A7 30 50 */ subf r5, r7, r6
+/* 801C8818 001C4478 40 80 00 7C */ bge lbl_801C8894
+/* 801C881C 001C447C 54 A0 E8 FF */ rlwinm. r0, r5, 0x1d, 3, 0x1f
+/* 801C8820 001C4480 7C 09 03 A6 */ mtctr r0
+/* 801C8824 001C4484 41 82 00 58 */ beq lbl_801C887C
+lbl_801C8828:
+/* 801C8828 001C4488 88 07 00 00 */ lbz r0, 0(r7)
+/* 801C882C 001C448C 98 04 00 00 */ stb r0, 0(r4)
+/* 801C8830 001C4490 88 07 00 01 */ lbz r0, 1(r7)
+/* 801C8834 001C4494 98 04 00 01 */ stb r0, 1(r4)
+/* 801C8838 001C4498 88 07 00 02 */ lbz r0, 2(r7)
+/* 801C883C 001C449C 98 04 00 02 */ stb r0, 2(r4)
+/* 801C8840 001C44A0 88 07 00 03 */ lbz r0, 3(r7)
+/* 801C8844 001C44A4 98 04 00 03 */ stb r0, 3(r4)
+/* 801C8848 001C44A8 88 07 00 04 */ lbz r0, 4(r7)
+/* 801C884C 001C44AC 98 04 00 04 */ stb r0, 4(r4)
+/* 801C8850 001C44B0 88 07 00 05 */ lbz r0, 5(r7)
+/* 801C8854 001C44B4 98 04 00 05 */ stb r0, 5(r4)
+/* 801C8858 001C44B8 88 07 00 06 */ lbz r0, 6(r7)
+/* 801C885C 001C44BC 98 04 00 06 */ stb r0, 6(r4)
+/* 801C8860 001C44C0 88 07 00 07 */ lbz r0, 7(r7)
+/* 801C8864 001C44C4 38 E7 00 08 */ addi r7, r7, 8
+/* 801C8868 001C44C8 98 04 00 07 */ stb r0, 7(r4)
+/* 801C886C 001C44CC 38 84 00 08 */ addi r4, r4, 8
+/* 801C8870 001C44D0 42 00 FF B8 */ bdnz lbl_801C8828
+/* 801C8874 001C44D4 70 A5 00 07 */ andi. r5, r5, 7
+/* 801C8878 001C44D8 41 82 00 1C */ beq lbl_801C8894
+lbl_801C887C:
+/* 801C887C 001C44DC 7C A9 03 A6 */ mtctr r5
+lbl_801C8880:
+/* 801C8880 001C44E0 88 07 00 00 */ lbz r0, 0(r7)
+/* 801C8884 001C44E4 38 E7 00 01 */ addi r7, r7, 1
+/* 801C8888 001C44E8 98 04 00 00 */ stb r0, 0(r4)
+/* 801C888C 001C44EC 38 84 00 01 */ addi r4, r4, 1
+/* 801C8890 001C44F0 42 00 FF F0 */ bdnz lbl_801C8880
+lbl_801C8894:
+/* 801C8894 001C44F4 88 03 00 04 */ lbz r0, 4(r3)
+/* 801C8898 001C44F8 7C 08 00 50 */ subf r0, r8, r0
+/* 801C889C 001C44FC 98 03 00 04 */ stb r0, 4(r3)
+lbl_801C88A0:
+/* 801C88A0 001C4500 88 03 00 04 */ lbz r0, 4(r3)
+/* 801C88A4 001C4504 38 83 00 05 */ addi r4, r3, 5
+/* 801C88A8 001C4508 7C A4 02 14 */ add r5, r4, r0
+/* 801C88AC 001C450C 7C 04 28 50 */ subf r0, r4, r5
+/* 801C88B0 001C4510 7C 09 03 A6 */ mtctr r0
+/* 801C88B4 001C4514 7C 05 20 40 */ cmplw r5, r4
+/* 801C88B8 001C4518 40 81 00 14 */ ble lbl_801C88CC
+lbl_801C88BC:
+/* 801C88BC 001C451C 8C 05 FF FF */ lbzu r0, -1(r5)
+/* 801C88C0 001C4520 2C 00 00 00 */ cmpwi r0, 0
+/* 801C88C4 001C4524 40 82 00 08 */ bne lbl_801C88CC
+/* 801C88C8 001C4528 42 00 FF F4 */ bdnz lbl_801C88BC
+lbl_801C88CC:
+/* 801C88CC 001C452C 7C 84 28 50 */ subf r4, r4, r5
+/* 801C88D0 001C4530 38 04 00 01 */ addi r0, r4, 1
+/* 801C88D4 001C4534 98 03 00 04 */ stb r0, 4(r3)
+lbl_801C88D8:
+/* 801C88D8 001C4538 BA 61 00 0C */ lmw r19, 0xc(r1)
+/* 801C88DC 001C453C 38 21 00 40 */ addi r1, r1, 0x40
+/* 801C88E0 001C4540 4E 80 00 20 */ blr
+
+.global __num2dec_internal
+__num2dec_internal:
+/* 801C88E4 001C4544 94 21 FF 70 */ stwu r1, -0x90(r1)
+/* 801C88E8 001C4548 7C 08 02 A6 */ mflr r0
+/* 801C88EC 001C454C 90 01 00 94 */ stw r0, 0x94(r1)
+/* 801C88F0 001C4550 DB E1 00 88 */ stfd f31, 0x88(r1)
+/* 801C88F4 001C4554 FF E0 08 90 */ fmr f31, f1
+/* 801C88F8 001C4558 93 E1 00 84 */ stw r31, 0x84(r1)
+/* 801C88FC 001C455C 93 C1 00 80 */ stw r30, 0x80(r1)
+/* 801C8900 001C4560 7C 7E 1B 78 */ mr r30, r3
+/* 801C8904 001C4564 93 A1 00 7C */ stw r29, 0x7c(r1)
+/* 801C8908 001C4568 48 00 1E 11 */ bl __signbitd
+/* 801C890C 001C456C C8 02 90 F8 */ lfd f0, lbl_806416F8-_SDA2_BASE_(r2)
+/* 801C8910 001C4570 7C 03 00 D0 */ neg r0, r3
+/* 801C8914 001C4574 7C 00 1B 78 */ or r0, r0, r3
+/* 801C8918 001C4578 FC 00 F8 00 */ fcmpu cr0, f0, f31
+/* 801C891C 001C457C 54 00 0F FE */ srwi r0, r0, 0x1f
+/* 801C8920 001C4580 7C 1F 07 74 */ extsb r31, r0
+/* 801C8924 001C4584 40 82 00 20 */ bne lbl_801C8944
+/* 801C8928 001C4588 38 60 00 00 */ li r3, 0
+/* 801C892C 001C458C 38 00 00 01 */ li r0, 1
+/* 801C8930 001C4590 9B FE 00 00 */ stb r31, 0(r30)
+/* 801C8934 001C4594 B0 7E 00 02 */ sth r3, 2(r30)
+/* 801C8938 001C4598 98 1E 00 04 */ stb r0, 4(r30)
+/* 801C893C 001C459C 98 7E 00 05 */ stb r3, 5(r30)
+/* 801C8940 001C45A0 48 00 00 E8 */ b lbl_801C8A28
+lbl_801C8944:
+/* 801C8944 001C45A4 FC 20 F8 90 */ fmr f1, f31
+/* 801C8948 001C45A8 48 00 1D E9 */ bl __fpclassifyd
+/* 801C894C 001C45AC 2C 03 00 02 */ cmpwi r3, 2
+/* 801C8950 001C45B0 41 81 00 38 */ bgt lbl_801C8988
+/* 801C8954 001C45B4 38 60 00 00 */ li r3, 0
+/* 801C8958 001C45B8 38 00 00 01 */ li r0, 1
+/* 801C895C 001C45BC FC 20 F8 90 */ fmr f1, f31
+/* 801C8960 001C45C0 9B FE 00 00 */ stb r31, 0(r30)
+/* 801C8964 001C45C4 B0 7E 00 02 */ sth r3, 2(r30)
+/* 801C8968 001C45C8 98 1E 00 04 */ stb r0, 4(r30)
+/* 801C896C 001C45CC 48 00 1D C5 */ bl __fpclassifyd
+/* 801C8970 001C45D0 2C 03 00 01 */ cmpwi r3, 1
+/* 801C8974 001C45D4 38 00 00 49 */ li r0, 0x49
+/* 801C8978 001C45D8 40 82 00 08 */ bne lbl_801C8980
+/* 801C897C 001C45DC 38 00 00 4E */ li r0, 0x4e
+lbl_801C8980:
+/* 801C8980 001C45E0 98 1E 00 05 */ stb r0, 5(r30)
+/* 801C8984 001C45E4 48 00 00 A4 */ b lbl_801C8A28
+lbl_801C8988:
+/* 801C8988 001C45E8 2C 1F 00 00 */ cmpwi r31, 0
+/* 801C898C 001C45EC 41 82 00 08 */ beq lbl_801C8994
+/* 801C8990 001C45F0 FF E0 F8 50 */ fneg f31, f31
+lbl_801C8994:
+/* 801C8994 001C45F4 FC 20 F8 90 */ fmr f1, f31
+/* 801C8998 001C45F8 38 61 00 08 */ addi r3, r1, 8
+/* 801C899C 001C45FC 48 00 B8 F5 */ bl frexp
+/* 801C89A0 001C4600 D8 21 00 10 */ stfd f1, 0x10(r1)
+/* 801C89A4 001C4604 FF E0 08 90 */ fmr f31, f1
+/* 801C89A8 001C4608 80 81 00 14 */ lwz r4, 0x14(r1)
+/* 801C89AC 001C460C 80 61 00 10 */ lwz r3, 0x10(r1)
+/* 801C89B0 001C4610 38 04 FF FF */ addi r0, r4, -1
+/* 801C89B4 001C4614 2C 04 00 00 */ cmpwi r4, 0
+/* 801C89B8 001C4618 7C 00 20 78 */ andc r0, r0, r4
+/* 801C89BC 001C461C 64 63 00 10 */ oris r3, r3, 0x10
+/* 801C89C0 001C4620 7C 00 00 34 */ cntlzw r0, r0
+/* 801C89C4 001C4624 20 80 00 20 */ subfic r4, r0, 0x20
+/* 801C89C8 001C4628 40 82 00 18 */ bne lbl_801C89E0
+/* 801C89CC 001C462C 38 03 FF FF */ addi r0, r3, -1
+/* 801C89D0 001C4630 7C 00 18 78 */ andc r0, r0, r3
+/* 801C89D4 001C4634 7C 00 00 34 */ cntlzw r0, r0
+/* 801C89D8 001C4638 20 60 00 20 */ subfic r3, r0, 0x20
+/* 801C89DC 001C463C 38 83 00 20 */ addi r4, r3, 0x20
+lbl_801C89E0:
+/* 801C89E0 001C4640 80 01 00 08 */ lwz r0, 8(r1)
+/* 801C89E4 001C4644 23 A4 00 35 */ subfic r29, r4, 0x35
+/* 801C89E8 001C4648 38 61 00 18 */ addi r3, r1, 0x18
+/* 801C89EC 001C464C 7C 9D 00 50 */ subf r4, r29, r0
+/* 801C89F0 001C4650 4B FF F4 89 */ bl __two_exp
+/* 801C89F4 001C4654 FC 20 F8 90 */ fmr f1, f31
+/* 801C89F8 001C4658 7F A3 EB 78 */ mr r3, r29
+/* 801C89FC 001C465C 48 00 B9 1D */ bl ldexp
+/* 801C8A00 001C4660 4B FF ED 19 */ bl __cvt_dbl_ull
+/* 801C8A04 001C4664 7C 65 1B 78 */ mr r5, r3
+/* 801C8A08 001C4668 7C 86 23 78 */ mr r6, r4
+/* 801C8A0C 001C466C 38 61 00 44 */ addi r3, r1, 0x44
+/* 801C8A10 001C4670 4B FF F0 19 */ bl __ull2dec
+/* 801C8A14 001C4674 7F C3 F3 78 */ mr r3, r30
+/* 801C8A18 001C4678 38 81 00 44 */ addi r4, r1, 0x44
+/* 801C8A1C 001C467C 38 A1 00 18 */ addi r5, r1, 0x18
+/* 801C8A20 001C4680 4B FF F0 E5 */ bl __timesdec
+/* 801C8A24 001C4684 9B FE 00 00 */ stb r31, 0(r30)
+lbl_801C8A28:
+/* 801C8A28 001C4688 80 01 00 94 */ lwz r0, 0x94(r1)
+/* 801C8A2C 001C468C CB E1 00 88 */ lfd f31, 0x88(r1)
+/* 801C8A30 001C4690 83 E1 00 84 */ lwz r31, 0x84(r1)
+/* 801C8A34 001C4694 83 C1 00 80 */ lwz r30, 0x80(r1)
+/* 801C8A38 001C4698 83 A1 00 7C */ lwz r29, 0x7c(r1)
+/* 801C8A3C 001C469C 7C 08 03 A6 */ mtlr r0
+/* 801C8A40 001C46A0 38 21 00 90 */ addi r1, r1, 0x90
+/* 801C8A44 001C46A4 4E 80 00 20 */ blr
+
+.global __num2dec
+__num2dec:
+/* 801C8A48 001C46A8 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801C8A4C 001C46AC 7C 08 02 A6 */ mflr r0
+/* 801C8A50 001C46B0 90 01 00 14 */ stw r0, 0x14(r1)
+/* 801C8A54 001C46B4 93 E1 00 0C */ stw r31, 0xc(r1)
+/* 801C8A58 001C46B8 AB E3 00 02 */ lha r31, 2(r3)
+/* 801C8A5C 001C46BC 93 C1 00 08 */ stw r30, 8(r1)
+/* 801C8A60 001C46C0 7C 9E 23 78 */ mr r30, r4
+/* 801C8A64 001C46C4 7F C3 F3 78 */ mr r3, r30
+/* 801C8A68 001C46C8 4B FF FE 7D */ bl __num2dec_internal
+/* 801C8A6C 001C46CC 88 1E 00 05 */ lbz r0, 5(r30)
+/* 801C8A70 001C46D0 28 00 00 09 */ cmplwi r0, 9
+/* 801C8A74 001C46D4 41 81 01 5C */ bgt lbl_801C8BD0
+/* 801C8A78 001C46D8 2C 1F 00 24 */ cmpwi r31, 0x24
+/* 801C8A7C 001C46DC 40 81 00 08 */ ble lbl_801C8A84
+/* 801C8A80 001C46E0 3B E0 00 24 */ li r31, 0x24
+lbl_801C8A84:
+/* 801C8A84 001C46E4 2C 1F 00 00 */ cmpwi r31, 0
+/* 801C8A88 001C46E8 40 81 00 E8 */ ble lbl_801C8B70
+/* 801C8A8C 001C46EC 88 1E 00 04 */ lbz r0, 4(r30)
+/* 801C8A90 001C46F0 7C 1F 00 00 */ cmpw r31, r0
+/* 801C8A94 001C46F4 40 80 00 DC */ bge lbl_801C8B70
+/* 801C8A98 001C46F8 38 9E 00 05 */ addi r4, r30, 5
+/* 801C8A9C 001C46FC 7C 04 F8 AE */ lbzx r0, r4, r31
+/* 801C8AA0 001C4700 7C 64 FA 14 */ add r3, r4, r31
+/* 801C8AA4 001C4704 28 00 00 05 */ cmplwi r0, 5
+/* 801C8AA8 001C4708 40 81 00 0C */ ble lbl_801C8AB4
+/* 801C8AAC 001C470C 38 80 00 01 */ li r4, 1
+/* 801C8AB0 001C4710 48 00 00 60 */ b lbl_801C8B10
+lbl_801C8AB4:
+/* 801C8AB4 001C4714 40 80 00 0C */ bge lbl_801C8AC0
+/* 801C8AB8 001C4718 38 80 FF FF */ li r4, -1
+/* 801C8ABC 001C471C 48 00 00 54 */ b lbl_801C8B10
+lbl_801C8AC0:
+/* 801C8AC0 001C4720 88 1E 00 04 */ lbz r0, 4(r30)
+/* 801C8AC4 001C4724 38 63 00 01 */ addi r3, r3, 1
+/* 801C8AC8 001C4728 7C 84 02 14 */ add r4, r4, r0
+/* 801C8ACC 001C472C 7C 03 20 50 */ subf r0, r3, r4
+/* 801C8AD0 001C4730 7C 09 03 A6 */ mtctr r0
+/* 801C8AD4 001C4734 7C 03 20 40 */ cmplw r3, r4
+/* 801C8AD8 001C4738 40 80 00 20 */ bge lbl_801C8AF8
+lbl_801C8ADC:
+/* 801C8ADC 001C473C 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C8AE0 001C4740 2C 00 00 00 */ cmpwi r0, 0
+/* 801C8AE4 001C4744 41 82 00 0C */ beq lbl_801C8AF0
+/* 801C8AE8 001C4748 38 80 00 01 */ li r4, 1
+/* 801C8AEC 001C474C 48 00 00 24 */ b lbl_801C8B10
+lbl_801C8AF0:
+/* 801C8AF0 001C4750 38 63 00 01 */ addi r3, r3, 1
+/* 801C8AF4 001C4754 42 00 FF E8 */ bdnz lbl_801C8ADC
+lbl_801C8AF8:
+/* 801C8AF8 001C4758 7C 7F F2 14 */ add r3, r31, r30
+/* 801C8AFC 001C475C 38 80 FF FF */ li r4, -1
+/* 801C8B00 001C4760 88 03 00 04 */ lbz r0, 4(r3)
+/* 801C8B04 001C4764 54 00 07 FF */ clrlwi. r0, r0, 0x1f
+/* 801C8B08 001C4768 41 82 00 08 */ beq lbl_801C8B10
+/* 801C8B0C 001C476C 38 80 00 01 */ li r4, 1
+lbl_801C8B10:
+/* 801C8B10 001C4770 2C 04 00 00 */ cmpwi r4, 0
+/* 801C8B14 001C4774 9B FE 00 04 */ stb r31, 4(r30)
+/* 801C8B18 001C4778 41 80 00 58 */ blt lbl_801C8B70
+/* 801C8B1C 001C477C 38 9E 00 05 */ addi r4, r30, 5
+/* 801C8B20 001C4780 38 00 00 00 */ li r0, 0
+/* 801C8B24 001C4784 7C A4 FA 14 */ add r5, r4, r31
+/* 801C8B28 001C4788 38 A5 FF FF */ addi r5, r5, -1
+lbl_801C8B2C:
+/* 801C8B2C 001C478C 88 65 00 00 */ lbz r3, 0(r5)
+/* 801C8B30 001C4790 28 03 00 09 */ cmplwi r3, 9
+/* 801C8B34 001C4794 40 80 00 10 */ bge lbl_801C8B44
+/* 801C8B38 001C4798 38 03 00 01 */ addi r0, r3, 1
+/* 801C8B3C 001C479C 98 05 00 00 */ stb r0, 0(r5)
+/* 801C8B40 001C47A0 48 00 00 30 */ b lbl_801C8B70
+lbl_801C8B44:
+/* 801C8B44 001C47A4 7C 05 20 40 */ cmplw r5, r4
+/* 801C8B48 001C47A8 40 82 00 1C */ bne lbl_801C8B64
+/* 801C8B4C 001C47AC 38 00 00 01 */ li r0, 1
+/* 801C8B50 001C47B0 98 05 00 00 */ stb r0, 0(r5)
+/* 801C8B54 001C47B4 A8 7E 00 02 */ lha r3, 2(r30)
+/* 801C8B58 001C47B8 38 03 00 01 */ addi r0, r3, 1
+/* 801C8B5C 001C47BC B0 1E 00 02 */ sth r0, 2(r30)
+/* 801C8B60 001C47C0 48 00 00 10 */ b lbl_801C8B70
+lbl_801C8B64:
+/* 801C8B64 001C47C4 98 05 00 00 */ stb r0, 0(r5)
+/* 801C8B68 001C47C8 38 A5 FF FF */ addi r5, r5, -1
+/* 801C8B6C 001C47CC 4B FF FF C0 */ b lbl_801C8B2C
+lbl_801C8B70:
+/* 801C8B70 001C47D0 38 A0 00 00 */ li r5, 0
+/* 801C8B74 001C47D4 48 00 00 18 */ b lbl_801C8B8C
+lbl_801C8B78:
+/* 801C8B78 001C47D8 88 9E 00 04 */ lbz r4, 4(r30)
+/* 801C8B7C 001C47DC 7C 7E 22 14 */ add r3, r30, r4
+/* 801C8B80 001C47E0 38 04 00 01 */ addi r0, r4, 1
+/* 801C8B84 001C47E4 98 A3 00 05 */ stb r5, 5(r3)
+/* 801C8B88 001C47E8 98 1E 00 04 */ stb r0, 4(r30)
+lbl_801C8B8C:
+/* 801C8B8C 001C47EC 88 7E 00 04 */ lbz r3, 4(r30)
+/* 801C8B90 001C47F0 7C 03 F8 00 */ cmpw r3, r31
+/* 801C8B94 001C47F4 41 80 FF E4 */ blt lbl_801C8B78
+/* 801C8B98 001C47F8 A8 1E 00 02 */ lha r0, 2(r30)
+/* 801C8B9C 001C47FC 38 63 FF FF */ addi r3, r3, -1
+/* 801C8BA0 001C4800 38 A0 00 00 */ li r5, 0
+/* 801C8BA4 001C4804 7C 03 00 50 */ subf r0, r3, r0
+/* 801C8BA8 001C4808 B0 1E 00 02 */ sth r0, 2(r30)
+/* 801C8BAC 001C480C 48 00 00 18 */ b lbl_801C8BC4
+lbl_801C8BB0:
+/* 801C8BB0 001C4810 7C 9E 2A 14 */ add r4, r30, r5
+/* 801C8BB4 001C4814 38 A5 00 01 */ addi r5, r5, 1
+/* 801C8BB8 001C4818 88 64 00 05 */ lbz r3, 5(r4)
+/* 801C8BBC 001C481C 38 03 00 30 */ addi r0, r3, 0x30
+/* 801C8BC0 001C4820 98 04 00 05 */ stb r0, 5(r4)
+lbl_801C8BC4:
+/* 801C8BC4 001C4824 88 1E 00 04 */ lbz r0, 4(r30)
+/* 801C8BC8 001C4828 7C 05 00 00 */ cmpw r5, r0
+/* 801C8BCC 001C482C 41 80 FF E4 */ blt lbl_801C8BB0
+lbl_801C8BD0:
+/* 801C8BD0 001C4830 80 01 00 14 */ lwz r0, 0x14(r1)
+/* 801C8BD4 001C4834 83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 801C8BD8 001C4838 83 C1 00 08 */ lwz r30, 8(r1)
+/* 801C8BDC 001C483C 7C 08 03 A6 */ mtlr r0
+/* 801C8BE0 001C4840 38 21 00 10 */ addi r1, r1, 0x10
+/* 801C8BE4 001C4844 4E 80 00 20 */ blr
+
+.global __dec2num
+__dec2num:
+/* 801C8BE8 001C4848 94 21 FE 80 */ stwu r1, -0x180(r1)
+/* 801C8BEC 001C484C 7C 08 02 A6 */ mflr r0
+/* 801C8BF0 001C4850 90 01 01 84 */ stw r0, 0x184(r1)
+/* 801C8BF4 001C4854 DB E1 01 70 */ stfd f31, 0x170(r1)
+/* 801C8BF8 001C4858 F3 E1 01 78 */ psq_st f31, 376(r1), 0, qr0
+/* 801C8BFC 001C485C 39 61 01 70 */ addi r11, r1, 0x170
+/* 801C8C00 001C4860 4B FF E5 09 */ bl _savegpr_19
+/* 801C8C04 001C4864 88 03 00 04 */ lbz r0, 4(r3)
+/* 801C8C08 001C4868 3C 80 43 30 */ lis r4, 0x4330
+/* 801C8C0C 001C486C 90 81 01 28 */ stw r4, 0x128(r1)
+/* 801C8C10 001C4870 7C 7B 1B 78 */ mr r27, r3
+/* 801C8C14 001C4874 2C 00 00 00 */ cmpwi r0, 0
+/* 801C8C18 001C4878 90 81 01 30 */ stw r4, 0x130(r1)
+/* 801C8C1C 001C487C 40 82 00 28 */ bne lbl_801C8C44
+/* 801C8C20 001C4880 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C8C24 001C4884 7C 00 07 75 */ extsb. r0, r0
+/* 801C8C28 001C4888 40 82 00 0C */ bne lbl_801C8C34
+/* 801C8C2C 001C488C C8 42 91 00 */ lfd f2, lbl_80641700-_SDA2_BASE_(r2)
+/* 801C8C30 001C4890 48 00 00 08 */ b lbl_801C8C38
+lbl_801C8C34:
+/* 801C8C34 001C4894 C8 42 91 08 */ lfd f2, lbl_80641708-_SDA2_BASE_(r2)
+lbl_801C8C38:
+/* 801C8C38 001C4898 C8 22 90 F8 */ lfd f1, lbl_806416F8-_SDA2_BASE_(r2)
+/* 801C8C3C 001C489C 48 00 B4 11 */ bl copysign
+/* 801C8C40 001C48A0 48 00 07 38 */ b lbl_801C9378
+lbl_801C8C44:
+/* 801C8C44 001C48A4 88 03 00 05 */ lbz r0, 5(r3)
+/* 801C8C48 001C48A8 2C 00 00 49 */ cmpwi r0, 0x49
+/* 801C8C4C 001C48AC 41 82 00 44 */ beq lbl_801C8C90
+/* 801C8C50 001C48B0 40 80 00 10 */ bge lbl_801C8C60
+/* 801C8C54 001C48B4 2C 00 00 30 */ cmpwi r0, 0x30
+/* 801C8C58 001C48B8 41 82 00 14 */ beq lbl_801C8C6C
+/* 801C8C5C 001C48BC 48 00 00 A0 */ b lbl_801C8CFC
+lbl_801C8C60:
+/* 801C8C60 001C48C0 2C 00 00 4E */ cmpwi r0, 0x4e
+/* 801C8C64 001C48C4 41 82 00 54 */ beq lbl_801C8CB8
+/* 801C8C68 001C48C8 48 00 00 94 */ b lbl_801C8CFC
+lbl_801C8C6C:
+/* 801C8C6C 001C48CC 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C8C70 001C48D0 7C 00 07 75 */ extsb. r0, r0
+/* 801C8C74 001C48D4 40 82 00 0C */ bne lbl_801C8C80
+/* 801C8C78 001C48D8 C8 42 91 00 */ lfd f2, lbl_80641700-_SDA2_BASE_(r2)
+/* 801C8C7C 001C48DC 48 00 00 08 */ b lbl_801C8C84
+lbl_801C8C80:
+/* 801C8C80 001C48E0 C8 42 91 08 */ lfd f2, lbl_80641708-_SDA2_BASE_(r2)
+lbl_801C8C84:
+/* 801C8C84 001C48E4 C8 22 90 F8 */ lfd f1, lbl_806416F8-_SDA2_BASE_(r2)
+/* 801C8C88 001C48E8 48 00 B3 C5 */ bl copysign
+/* 801C8C8C 001C48EC 48 00 06 EC */ b lbl_801C9378
+lbl_801C8C90:
+/* 801C8C90 001C48F0 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C8C94 001C48F4 7C 00 07 75 */ extsb. r0, r0
+/* 801C8C98 001C48F8 40 82 00 0C */ bne lbl_801C8CA4
+/* 801C8C9C 001C48FC C8 42 91 00 */ lfd f2, lbl_80641700-_SDA2_BASE_(r2)
+/* 801C8CA0 001C4900 48 00 00 08 */ b lbl_801C8CA8
+lbl_801C8CA4:
+/* 801C8CA4 001C4904 C8 42 91 08 */ lfd f2, lbl_80641708-_SDA2_BASE_(r2)
+lbl_801C8CA8:
+/* 801C8CA8 001C4908 3C 60 80 64 */ lis r3, lbl_8063D6BC@ha
+/* 801C8CAC 001C490C C0 23 D6 BC */ lfs f1, lbl_8063D6BC@l(r3)
+/* 801C8CB0 001C4910 48 00 B3 9D */ bl copysign
+/* 801C8CB4 001C4914 48 00 06 C4 */ b lbl_801C9378
+lbl_801C8CB8:
+/* 801C8CB8 001C4918 88 03 00 00 */ lbz r0, 0(r3)
+/* 801C8CBC 001C491C 38 80 00 00 */ li r4, 0
+/* 801C8CC0 001C4920 3C 60 7F F0 */ lis r3, 0x7ff0
+/* 801C8CC4 001C4924 90 81 00 1C */ stw r4, 0x1c(r1)
+/* 801C8CC8 001C4928 7C 00 07 75 */ extsb. r0, r0
+/* 801C8CCC 001C492C 90 61 00 18 */ stw r3, 0x18(r1)
+/* 801C8CD0 001C4930 41 82 00 18 */ beq lbl_801C8CE8
+/* 801C8CD4 001C4934 3C 00 80 00 */ lis r0, 0x8000
+/* 801C8CD8 001C4938 38 60 00 00 */ li r3, 0
+/* 801C8CDC 001C493C 64 00 7F F0 */ oris r0, r0, 0x7ff0
+/* 801C8CE0 001C4940 90 61 00 1C */ stw r3, 0x1c(r1)
+/* 801C8CE4 001C4944 90 01 00 18 */ stw r0, 0x18(r1)
+lbl_801C8CE8:
+/* 801C8CE8 001C4948 80 01 00 18 */ lwz r0, 0x18(r1)
+/* 801C8CEC 001C494C 64 00 00 08 */ oris r0, r0, 8
+/* 801C8CF0 001C4950 90 01 00 18 */ stw r0, 0x18(r1)
+/* 801C8CF4 001C4954 C8 21 00 18 */ lfd f1, 0x18(r1)
+/* 801C8CF8 001C4958 48 00 06 80 */ b lbl_801C9378
+lbl_801C8CFC:
+/* 801C8CFC 001C495C A0 03 00 04 */ lhz r0, 4(r3)
+/* 801C8D00 001C4960 38 81 01 01 */ addi r4, r1, 0x101
+/* 801C8D04 001C4964 A2 63 00 00 */ lhz r19, 0(r3)
+/* 801C8D08 001C4968 B0 01 01 00 */ sth r0, 0x100(r1)
+/* 801C8D0C 001C496C A2 83 00 02 */ lhz r20, 2(r3)
+/* 801C8D10 001C4970 88 01 01 00 */ lbz r0, 0x100(r1)
+/* 801C8D14 001C4974 A3 E3 00 06 */ lhz r31, 6(r3)
+/* 801C8D18 001C4978 7F 84 02 14 */ add r28, r4, r0
+/* 801C8D1C 001C497C A3 C3 00 08 */ lhz r30, 8(r3)
+/* 801C8D20 001C4980 A3 A3 00 0A */ lhz r29, 0xa(r3)
+/* 801C8D24 001C4984 7C 84 E0 40 */ cmplw cr1, r4, r28
+/* 801C8D28 001C4988 A3 43 00 0C */ lhz r26, 0xc(r3)
+/* 801C8D2C 001C498C A3 23 00 0E */ lhz r25, 0xe(r3)
+/* 801C8D30 001C4990 A3 03 00 10 */ lhz r24, 0x10(r3)
+/* 801C8D34 001C4994 A2 E3 00 12 */ lhz r23, 0x12(r3)
+/* 801C8D38 001C4998 A2 C3 00 14 */ lhz r22, 0x14(r3)
+/* 801C8D3C 001C499C A2 A3 00 16 */ lhz r21, 0x16(r3)
+/* 801C8D40 001C49A0 A1 83 00 18 */ lhz r12, 0x18(r3)
+/* 801C8D44 001C49A4 A1 63 00 1A */ lhz r11, 0x1a(r3)
+/* 801C8D48 001C49A8 A1 43 00 1C */ lhz r10, 0x1c(r3)
+/* 801C8D4C 001C49AC A1 23 00 1E */ lhz r9, 0x1e(r3)
+/* 801C8D50 001C49B0 A1 03 00 20 */ lhz r8, 0x20(r3)
+/* 801C8D54 001C49B4 A0 E3 00 22 */ lhz r7, 0x22(r3)
+/* 801C8D58 001C49B8 A0 C3 00 24 */ lhz r6, 0x24(r3)
+/* 801C8D5C 001C49BC A0 A3 00 26 */ lhz r5, 0x26(r3)
+/* 801C8D60 001C49C0 A0 03 00 28 */ lhz r0, 0x28(r3)
+/* 801C8D64 001C49C4 B2 61 00 FC */ sth r19, 0xfc(r1)
+/* 801C8D68 001C49C8 B2 81 00 FE */ sth r20, 0xfe(r1)
+/* 801C8D6C 001C49CC B3 E1 01 02 */ sth r31, 0x102(r1)
+/* 801C8D70 001C49D0 B3 C1 01 04 */ sth r30, 0x104(r1)
+/* 801C8D74 001C49D4 B3 A1 01 06 */ sth r29, 0x106(r1)
+/* 801C8D78 001C49D8 B3 41 01 08 */ sth r26, 0x108(r1)
+/* 801C8D7C 001C49DC B3 21 01 0A */ sth r25, 0x10a(r1)
+/* 801C8D80 001C49E0 B3 01 01 0C */ sth r24, 0x10c(r1)
+/* 801C8D84 001C49E4 B2 E1 01 0E */ sth r23, 0x10e(r1)
+/* 801C8D88 001C49E8 B2 C1 01 10 */ sth r22, 0x110(r1)
+/* 801C8D8C 001C49EC B2 A1 01 12 */ sth r21, 0x112(r1)
+/* 801C8D90 001C49F0 B1 81 01 14 */ sth r12, 0x114(r1)
+/* 801C8D94 001C49F4 B1 61 01 16 */ sth r11, 0x116(r1)
+/* 801C8D98 001C49F8 B1 41 01 18 */ sth r10, 0x118(r1)
+/* 801C8D9C 001C49FC B1 21 01 1A */ sth r9, 0x11a(r1)
+/* 801C8DA0 001C4A00 B1 01 01 1C */ sth r8, 0x11c(r1)
+/* 801C8DA4 001C4A04 B0 E1 01 1E */ sth r7, 0x11e(r1)
+/* 801C8DA8 001C4A08 B0 C1 01 20 */ sth r6, 0x120(r1)
+/* 801C8DAC 001C4A0C B0 A1 01 22 */ sth r5, 0x122(r1)
+/* 801C8DB0 001C4A10 B0 01 01 24 */ sth r0, 0x124(r1)
+/* 801C8DB4 001C4A14 40 84 00 BC */ bge cr1, lbl_801C8E70
+/* 801C8DB8 001C4A18 7C 04 E0 50 */ subf r0, r4, r28
+/* 801C8DBC 001C4A1C 38 7C FF F8 */ addi r3, r28, -8
+/* 801C8DC0 001C4A20 2C 00 00 08 */ cmpwi r0, 8
+/* 801C8DC4 001C4A24 40 81 00 88 */ ble lbl_801C8E4C
+/* 801C8DC8 001C4A28 41 85 00 84 */ bgt cr1, lbl_801C8E4C
+/* 801C8DCC 001C4A2C 38 03 00 07 */ addi r0, r3, 7
+/* 801C8DD0 001C4A30 7C 04 00 50 */ subf r0, r4, r0
+/* 801C8DD4 001C4A34 54 00 E8 FE */ srwi r0, r0, 3
+/* 801C8DD8 001C4A38 7C 09 03 A6 */ mtctr r0
+/* 801C8DDC 001C4A3C 7C 04 18 40 */ cmplw r4, r3
+/* 801C8DE0 001C4A40 40 80 00 6C */ bge lbl_801C8E4C
+lbl_801C8DE4:
+/* 801C8DE4 001C4A44 88 64 00 00 */ lbz r3, 0(r4)
+/* 801C8DE8 001C4A48 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8DEC 001C4A4C 98 04 00 00 */ stb r0, 0(r4)
+/* 801C8DF0 001C4A50 88 64 00 01 */ lbz r3, 1(r4)
+/* 801C8DF4 001C4A54 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8DF8 001C4A58 98 04 00 01 */ stb r0, 1(r4)
+/* 801C8DFC 001C4A5C 88 64 00 02 */ lbz r3, 2(r4)
+/* 801C8E00 001C4A60 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E04 001C4A64 98 04 00 02 */ stb r0, 2(r4)
+/* 801C8E08 001C4A68 88 64 00 03 */ lbz r3, 3(r4)
+/* 801C8E0C 001C4A6C 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E10 001C4A70 98 04 00 03 */ stb r0, 3(r4)
+/* 801C8E14 001C4A74 88 64 00 04 */ lbz r3, 4(r4)
+/* 801C8E18 001C4A78 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E1C 001C4A7C 98 04 00 04 */ stb r0, 4(r4)
+/* 801C8E20 001C4A80 88 64 00 05 */ lbz r3, 5(r4)
+/* 801C8E24 001C4A84 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E28 001C4A88 98 04 00 05 */ stb r0, 5(r4)
+/* 801C8E2C 001C4A8C 88 64 00 06 */ lbz r3, 6(r4)
+/* 801C8E30 001C4A90 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E34 001C4A94 98 04 00 06 */ stb r0, 6(r4)
+/* 801C8E38 001C4A98 88 64 00 07 */ lbz r3, 7(r4)
+/* 801C8E3C 001C4A9C 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E40 001C4AA0 98 04 00 07 */ stb r0, 7(r4)
+/* 801C8E44 001C4AA4 38 84 00 08 */ addi r4, r4, 8
+/* 801C8E48 001C4AA8 42 00 FF 9C */ bdnz lbl_801C8DE4
+lbl_801C8E4C:
+/* 801C8E4C 001C4AAC 7C 04 E0 50 */ subf r0, r4, r28
+/* 801C8E50 001C4AB0 7C 09 03 A6 */ mtctr r0
+/* 801C8E54 001C4AB4 7C 04 E0 40 */ cmplw r4, r28
+/* 801C8E58 001C4AB8 40 80 00 18 */ bge lbl_801C8E70
+lbl_801C8E5C:
+/* 801C8E5C 001C4ABC 88 64 00 00 */ lbz r3, 0(r4)
+/* 801C8E60 001C4AC0 38 03 FF D0 */ addi r0, r3, -48
+/* 801C8E64 001C4AC4 98 04 00 00 */ stb r0, 0(r4)
+/* 801C8E68 001C4AC8 38 84 00 01 */ addi r4, r4, 1
+/* 801C8E6C 001C4ACC 42 00 FF F0 */ bdnz lbl_801C8E5C
+lbl_801C8E70:
+/* 801C8E70 001C4AD0 A8 A1 00 FE */ lha r5, 0xfe(r1)
+/* 801C8E74 001C4AD4 3C 80 80 40 */ lis r4, lbl_803FC6D8@ha
+/* 801C8E78 001C4AD8 88 01 01 00 */ lbz r0, 0x100(r1)
+/* 801C8E7C 001C4ADC 38 84 C6 D8 */ addi r4, r4, lbl_803FC6D8@l
+/* 801C8E80 001C4AE0 38 61 00 D0 */ addi r3, r1, 0xd0
+/* 801C8E84 001C4AE4 7C A0 2A 14 */ add r5, r0, r5
+/* 801C8E88 001C4AE8 38 84 00 B8 */ addi r4, r4, 0xb8
+/* 801C8E8C 001C4AEC 38 05 FF FF */ addi r0, r5, -1
+/* 801C8E90 001C4AF0 B0 01 00 FE */ sth r0, 0xfe(r1)
+/* 801C8E94 001C4AF4 38 A0 01 34 */ li r5, 0x134
+/* 801C8E98 001C4AF8 7C 1D 07 34 */ extsh r29, r0
+/* 801C8E9C 001C4AFC 4B FF EE F1 */ bl __str2dec
+/* 801C8EA0 001C4B00 38 61 00 D0 */ addi r3, r1, 0xd0
+/* 801C8EA4 001C4B04 38 81 00 FC */ addi r4, r1, 0xfc
+/* 801C8EA8 001C4B08 4B FF F4 21 */ bl __less_dec
+/* 801C8EAC 001C4B0C 2C 03 00 00 */ cmpwi r3, 0
+/* 801C8EB0 001C4B10 41 82 00 2C */ beq lbl_801C8EDC
+/* 801C8EB4 001C4B14 88 1B 00 00 */ lbz r0, 0(r27)
+/* 801C8EB8 001C4B18 7C 00 07 75 */ extsb. r0, r0
+/* 801C8EBC 001C4B1C 40 82 00 0C */ bne lbl_801C8EC8
+/* 801C8EC0 001C4B20 C8 42 91 00 */ lfd f2, lbl_80641700-_SDA2_BASE_(r2)
+/* 801C8EC4 001C4B24 48 00 00 08 */ b lbl_801C8ECC
+lbl_801C8EC8:
+/* 801C8EC8 001C4B28 C8 42 91 08 */ lfd f2, lbl_80641708-_SDA2_BASE_(r2)
+lbl_801C8ECC:
+/* 801C8ECC 001C4B2C 3C 60 80 64 */ lis r3, lbl_8063D6BC@ha
+/* 801C8ED0 001C4B30 C0 23 D6 BC */ lfs f1, lbl_8063D6BC@l(r3)
+/* 801C8ED4 001C4B34 48 00 B1 79 */ bl copysign
+/* 801C8ED8 001C4B38 48 00 04 A0 */ b lbl_801C9378
+lbl_801C8EDC:
+/* 801C8EDC 001C4B3C 88 01 01 01 */ lbz r0, 0x101(r1)
+/* 801C8EE0 001C4B40 3C E0 80 42 */ lis r7, lbl_80422B58@ha
+/* 801C8EE4 001C4B44 C8 42 91 20 */ lfd f2, lbl_80641720-_SDA2_BASE_(r2)
+/* 801C8EE8 001C4B48 38 81 01 02 */ addi r4, r1, 0x102
+/* 801C8EEC 001C4B4C 90 01 01 2C */ stw r0, 0x12c(r1)
+/* 801C8EF0 001C4B50 38 E7 2B 58 */ addi r7, r7, lbl_80422B58@l
+/* 801C8EF4 001C4B54 3C 60 80 00 */ lis r3, 0x8000
+/* 801C8EF8 001C4B58 C8 01 01 28 */ lfd f0, 0x128(r1)
+/* 801C8EFC 001C4B5C FF E0 10 28 */ fsub f31, f0, f2
+/* 801C8F00 001C4B60 48 00 01 40 */ b lbl_801C9040
+lbl_801C8F04:
+/* 801C8F04 001C4B64 7C A4 E0 50 */ subf r5, r4, r28
+/* 801C8F08 001C4B68 39 40 00 00 */ li r10, 0
+/* 801C8F0C 001C4B6C 54 A0 E8 04 */ slwi r0, r5, 0x1d
+/* 801C8F10 001C4B70 54 A5 0F FE */ srwi r5, r5, 0x1f
+/* 801C8F14 001C4B74 7C 05 00 50 */ subf r0, r5, r0
+/* 801C8F18 001C4B78 54 00 18 3E */ rotlwi r0, r0, 3
+/* 801C8F1C 001C4B7C 7C C0 2A 15 */ add. r6, r0, r5
+/* 801C8F20 001C4B80 40 82 00 08 */ bne lbl_801C8F28
+/* 801C8F24 001C4B84 38 C0 00 08 */ li r6, 8
+lbl_801C8F28:
+/* 801C8F28 001C4B88 2C 86 00 00 */ cmpwi cr1, r6, 0
+/* 801C8F2C 001C4B8C 38 A0 00 00 */ li r5, 0
+/* 801C8F30 001C4B90 40 85 00 D8 */ ble cr1, lbl_801C9008
+/* 801C8F34 001C4B94 2C 06 00 08 */ cmpwi r6, 8
+/* 801C8F38 001C4B98 39 06 FF F8 */ addi r8, r6, -8
+/* 801C8F3C 001C4B9C 40 81 00 A4 */ ble lbl_801C8FE0
+/* 801C8F40 001C4BA0 39 20 00 00 */ li r9, 0
+/* 801C8F44 001C4BA4 41 84 00 14 */ blt cr1, lbl_801C8F58
+/* 801C8F48 001C4BA8 38 03 FF FE */ addi r0, r3, -2
+/* 801C8F4C 001C4BAC 7C 06 00 00 */ cmpw r6, r0
+/* 801C8F50 001C4BB0 41 81 00 08 */ bgt lbl_801C8F58
+/* 801C8F54 001C4BB4 39 20 00 01 */ li r9, 1
+lbl_801C8F58:
+/* 801C8F58 001C4BB8 2C 09 00 00 */ cmpwi r9, 0
+/* 801C8F5C 001C4BBC 41 82 00 84 */ beq lbl_801C8FE0
+/* 801C8F60 001C4BC0 38 08 00 07 */ addi r0, r8, 7
+/* 801C8F64 001C4BC4 54 00 E8 FE */ srwi r0, r0, 3
+/* 801C8F68 001C4BC8 7C 09 03 A6 */ mtctr r0
+/* 801C8F6C 001C4BCC 2C 08 00 00 */ cmpwi r8, 0
+/* 801C8F70 001C4BD0 40 81 00 70 */ ble lbl_801C8FE0
+lbl_801C8F74:
+/* 801C8F74 001C4BD4 1C 0A 00 0A */ mulli r0, r10, 0xa
+/* 801C8F78 001C4BD8 89 24 00 00 */ lbz r9, 0(r4)
+/* 801C8F7C 001C4BDC 89 04 00 01 */ lbz r8, 1(r4)
+/* 801C8F80 001C4BE0 38 A5 00 08 */ addi r5, r5, 8
+/* 801C8F84 001C4BE4 8A A4 00 02 */ lbz r21, 2(r4)
+/* 801C8F88 001C4BE8 7C 09 02 14 */ add r0, r9, r0
+/* 801C8F8C 001C4BEC 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8F90 001C4BF0 89 84 00 03 */ lbz r12, 3(r4)
+/* 801C8F94 001C4BF4 89 64 00 04 */ lbz r11, 4(r4)
+/* 801C8F98 001C4BF8 89 44 00 05 */ lbz r10, 5(r4)
+/* 801C8F9C 001C4BFC 7C 08 02 14 */ add r0, r8, r0
+/* 801C8FA0 001C4C00 89 24 00 06 */ lbz r9, 6(r4)
+/* 801C8FA4 001C4C04 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FA8 001C4C08 89 04 00 07 */ lbz r8, 7(r4)
+/* 801C8FAC 001C4C0C 38 84 00 08 */ addi r4, r4, 8
+/* 801C8FB0 001C4C10 7C 15 02 14 */ add r0, r21, r0
+/* 801C8FB4 001C4C14 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FB8 001C4C18 7C 0C 02 14 */ add r0, r12, r0
+/* 801C8FBC 001C4C1C 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FC0 001C4C20 7C 0B 02 14 */ add r0, r11, r0
+/* 801C8FC4 001C4C24 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FC8 001C4C28 7C 0A 02 14 */ add r0, r10, r0
+/* 801C8FCC 001C4C2C 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FD0 001C4C30 7C 09 02 14 */ add r0, r9, r0
+/* 801C8FD4 001C4C34 1C 00 00 0A */ mulli r0, r0, 0xa
+/* 801C8FD8 001C4C38 7D 48 02 14 */ add r10, r8, r0
+/* 801C8FDC 001C4C3C 42 00 FF 98 */ bdnz lbl_801C8F74
+lbl_801C8FE0:
+/* 801C8FE0 001C4C40 7C 05 30 50 */ subf r0, r5, r6
+/* 801C8FE4 001C4C44 7C 09 03 A6 */ mtctr r0
+/* 801C8FE8 001C4C48 7C 05 30 00 */ cmpw r5, r6
+/* 801C8FEC 001C4C4C 40 80 00 1C */ bge lbl_801C9008
+lbl_801C8FF0:
+/* 801C8FF0 001C4C50 1C 0A 00 0A */ mulli r0, r10, 0xa
+/* 801C8FF4 001C4C54 89 04 00 00 */ lbz r8, 0(r4)
+/* 801C8FF8 001C4C58 38 A5 00 01 */ addi r5, r5, 1
+/* 801C8FFC 001C4C5C 38 84 00 01 */ addi r4, r4, 1
+/* 801C9000 001C4C60 7D 48 02 14 */ add r10, r8, r0
+/* 801C9004 001C4C64 42 00 FF EC */ bdnz lbl_801C8FF0
+lbl_801C9008:
+/* 801C9008 001C4C68 54 C0 18 38 */ slwi r0, r6, 3
+/* 801C900C 001C4C6C 91 41 01 34 */ stw r10, 0x134(r1)
+/* 801C9010 001C4C70 7C A7 02 14 */ add r5, r7, r0
+/* 801C9014 001C4C74 2C 0A 00 00 */ cmpwi r10, 0
+/* 801C9018 001C4C78 C8 25 FF F8 */ lfd f1, -8(r5)
+/* 801C901C 001C4C7C C8 01 01 30 */ lfd f0, 0x130(r1)
+/* 801C9020 001C4C80 FC 3F 00 72 */ fmul f1, f31, f1
+/* 801C9024 001C4C84 FC 00 10 28 */ fsub f0, f0, f2
+/* 801C9028 001C4C88 FC 01 00 2A */ fadd f0, f1, f0
+/* 801C902C 001C4C8C 41 82 00 0C */ beq lbl_801C9038
+/* 801C9030 001C4C90 FC 01 00 00 */ fcmpu cr0, f1, f0
+/* 801C9034 001C4C94 41 82 00 14 */ beq lbl_801C9048
+lbl_801C9038:
+/* 801C9038 001C4C98 FF E0 00 90 */ fmr f31, f0
+/* 801C903C 001C4C9C 7F A6 E8 50 */ subf r29, r6, r29
+lbl_801C9040:
+/* 801C9040 001C4CA0 7C 04 E0 40 */ cmplw r4, r28
+/* 801C9044 001C4CA4 41 80 FE C0 */ blt lbl_801C8F04
+lbl_801C9048:
+/* 801C9048 001C4CA8 2C 1D 00 00 */ cmpwi r29, 0
+/* 801C904C 001C4CAC 40 80 00 2C */ bge lbl_801C9078
+/* 801C9050 001C4CB0 7C 1D 00 D0 */ neg r0, r29
+/* 801C9054 001C4CB4 C8 42 91 28 */ lfd f2, lbl_80641728-_SDA2_BASE_(r2)
+/* 801C9058 001C4CB8 6C 00 80 00 */ xoris r0, r0, 0x8000
+/* 801C905C 001C4CBC C8 22 91 10 */ lfd f1, lbl_80641710-_SDA2_BASE_(r2)
+/* 801C9060 001C4CC0 90 01 01 2C */ stw r0, 0x12c(r1)
+/* 801C9064 001C4CC4 C8 01 01 28 */ lfd f0, 0x128(r1)
+/* 801C9068 001C4CC8 FC 40 10 28 */ fsub f2, f0, f2
+/* 801C906C 001C4CCC 48 00 B5 79 */ bl pow
+/* 801C9070 001C4CD0 FF FF 08 24 */ fdiv f31, f31, f1
+/* 801C9074 001C4CD4 48 00 00 24 */ b lbl_801C9098
+lbl_801C9078:
+/* 801C9078 001C4CD8 6F A0 80 00 */ xoris r0, r29, 0x8000
+/* 801C907C 001C4CDC C8 42 91 28 */ lfd f2, lbl_80641728-_SDA2_BASE_(r2)
+/* 801C9080 001C4CE0 90 01 01 34 */ stw r0, 0x134(r1)
+/* 801C9084 001C4CE4 C8 22 91 10 */ lfd f1, lbl_80641710-_SDA2_BASE_(r2)
+/* 801C9088 001C4CE8 C8 01 01 30 */ lfd f0, 0x130(r1)
+/* 801C908C 001C4CEC FC 40 10 28 */ fsub f2, f0, f2
+/* 801C9090 001C4CF0 48 00 B5 55 */ bl pow
+/* 801C9094 001C4CF4 FF FF 00 72 */ fmul f31, f31, f1
+lbl_801C9098:
+/* 801C9098 001C4CF8 FC 20 F8 90 */ fmr f1, f31
+/* 801C909C 001C4CFC 7F A3 EB 78 */ mr r3, r29
+/* 801C90A0 001C4D00 48 00 B2 79 */ bl ldexp
+/* 801C90A4 001C4D04 FF E0 08 90 */ fmr f31, f1
+/* 801C90A8 001C4D08 D8 21 00 10 */ stfd f1, 0x10(r1)
+/* 801C90AC 001C4D0C 48 00 16 85 */ bl __fpclassifyd
+/* 801C90B0 001C4D10 2C 03 00 02 */ cmpwi r3, 2
+/* 801C90B4 001C4D14 40 82 00 0C */ bne lbl_801C90C0
+/* 801C90B8 001C4D18 CB E2 91 18 */ lfd f31, lbl_80641718-_SDA2_BASE_(r2)
+/* 801C90BC 001C4D1C DB E1 00 10 */ stfd f31, 0x10(r1)
+lbl_801C90C0:
+/* 801C90C0 001C4D20 FC 20 F8 90 */ fmr f1, f31
+/* 801C90C4 001C4D24 38 61 00 A4 */ addi r3, r1, 0xa4
+/* 801C90C8 001C4D28 3B 60 00 00 */ li r27, 0
+/* 801C90CC 001C4D2C 4B FF F8 19 */ bl __num2dec_internal
+/* 801C90D0 001C4D30 38 61 00 A4 */ addi r3, r1, 0xa4
+/* 801C90D4 001C4D34 38 81 00 FC */ addi r4, r1, 0xfc
+/* 801C90D8 001C4D38 4B FF F1 0D */ bl __equals_dec
+/* 801C90DC 001C4D3C 2C 03 00 00 */ cmpwi r3, 0
+/* 801C90E0 001C4D40 40 82 02 80 */ bne lbl_801C9360
+/* 801C90E4 001C4D44 38 61 00 A4 */ addi r3, r1, 0xa4
+/* 801C90E8 001C4D48 38 81 00 FC */ addi r4, r1, 0xfc
+/* 801C90EC 001C4D4C 4B FF F1 DD */ bl __less_dec
+/* 801C90F0 001C4D50 2C 03 00 00 */ cmpwi r3, 0
+/* 801C90F4 001C4D54 41 82 00 08 */ beq lbl_801C90FC
+/* 801C90F8 001C4D58 3B 60 00 01 */ li r27, 1
+lbl_801C90FC:
+/* 801C90FC 001C4D5C 7F 60 00 34 */ cntlzw r0, r27
+/* 801C9100 001C4D60 DB E1 00 08 */ stfd f31, 8(r1)
+/* 801C9104 001C4D64 54 1C D9 7E */ srwi r28, r0, 5
+/* 801C9108 001C4D68 3B A0 00 01 */ li r29, 1
+/* 801C910C 001C4D6C 3B C0 00 00 */ li r30, 0
+/* 801C9110 001C4D70 3B E0 FF FF */ li r31, -1
+lbl_801C9114:
+/* 801C9114 001C4D74 2C 1C 00 00 */ cmpwi r28, 0
+/* 801C9118 001C4D78 40 82 00 30 */ bne lbl_801C9148
+/* 801C911C 001C4D7C 80 61 00 0C */ lwz r3, 0xc(r1)
+/* 801C9120 001C4D80 80 01 00 08 */ lwz r0, 8(r1)
+/* 801C9124 001C4D84 7C 63 E8 14 */ addc r3, r3, r29
+/* 801C9128 001C4D88 7C 00 F1 14 */ adde r0, r0, r30
+/* 801C912C 001C4D8C 90 61 00 0C */ stw r3, 0xc(r1)
+/* 801C9130 001C4D90 90 01 00 08 */ stw r0, 8(r1)
+/* 801C9134 001C4D94 C8 21 00 08 */ lfd f1, 8(r1)
+/* 801C9138 001C4D98 48 00 15 F9 */ bl __fpclassifyd
+/* 801C913C 001C4D9C 2C 03 00 02 */ cmpwi r3, 2
+/* 801C9140 001C4DA0 41 82 02 20 */ beq lbl_801C9360
+/* 801C9144 001C4DA4 48 00 00 1C */ b lbl_801C9160
+lbl_801C9148:
+/* 801C9148 001C4DA8 80 61 00 0C */ lwz r3, 0xc(r1)
+/* 801C914C 001C4DAC 80 01 00 08 */ lwz r0, 8(r1)
+/* 801C9150 001C4DB0 7C 63 F8 14 */ addc r3, r3, r31
+/* 801C9154 001C4DB4 7C 00 F9 14 */ adde r0, r0, r31
+/* 801C9158 001C4DB8 90 61 00 0C */ stw r3, 0xc(r1)
+/* 801C915C 001C4DBC 90 01 00 08 */ stw r0, 8(r1)
+lbl_801C9160:
+/* 801C9160 001C4DC0 C8 21 00 08 */ lfd f1, 8(r1)
+/* 801C9164 001C4DC4 38 61 00 78 */ addi r3, r1, 0x78
+/* 801C9168 001C4DC8 4B FF F7 7D */ bl __num2dec_internal
+/* 801C916C 001C4DCC 2C 1B 00 00 */ cmpwi r27, 0
+/* 801C9170 001C4DD0 41 82 00 18 */ beq lbl_801C9188
+/* 801C9174 001C4DD4 38 61 00 78 */ addi r3, r1, 0x78
+/* 801C9178 001C4DD8 38 81 00 FC */ addi r4, r1, 0xfc
+/* 801C917C 001C4DDC 4B FF F1 4D */ bl __less_dec
+/* 801C9180 001C4DE0 2C 03 00 00 */ cmpwi r3, 0
+/* 801C9184 001C4DE4 41 82 01 74 */ beq lbl_801C92F8
+lbl_801C9188:
+/* 801C9188 001C4DE8 2C 1B 00 00 */ cmpwi r27, 0
+/* 801C918C 001C4DEC 40 82 01 08 */ bne lbl_801C9294
+/* 801C9190 001C4DF0 38 61 00 FC */ addi r3, r1, 0xfc
+/* 801C9194 001C4DF4 38 81 00 78 */ addi r4, r1, 0x78
+/* 801C9198 001C4DF8 4B FF F1 31 */ bl __less_dec
+/* 801C919C 001C4DFC 2C 03 00 00 */ cmpwi r3, 0
+/* 801C91A0 001C4E00 40 82 00 F4 */ bne lbl_801C9294
+/* 801C91A4 001C4E04 FC 00 F8 90 */ fmr f0, f31
+/* 801C91A8 001C4E08 CB E1 00 08 */ lfd f31, 8(r1)
+/* 801C91AC 001C4E0C 82 A1 00 A4 */ lwz r21, 0xa4(r1)
+/* 801C91B0 001C4E10 81 81 00 78 */ lwz r12, 0x78(r1)
+/* 801C91B4 001C4E14 82 C1 00 A8 */ lwz r22, 0xa8(r1)
+/* 801C91B8 001C4E18 81 61 00 7C */ lwz r11, 0x7c(r1)
+/* 801C91BC 001C4E1C 82 E1 00 AC */ lwz r23, 0xac(r1)
+/* 801C91C0 001C4E20 81 41 00 80 */ lwz r10, 0x80(r1)
+/* 801C91C4 001C4E24 83 01 00 B0 */ lwz r24, 0xb0(r1)
+/* 801C91C8 001C4E28 81 21 00 84 */ lwz r9, 0x84(r1)
+/* 801C91CC 001C4E2C 83 21 00 B4 */ lwz r25, 0xb4(r1)
+/* 801C91D0 001C4E30 81 01 00 88 */ lwz r8, 0x88(r1)
+/* 801C91D4 001C4E34 83 41 00 B8 */ lwz r26, 0xb8(r1)
+/* 801C91D8 001C4E38 80 E1 00 8C */ lwz r7, 0x8c(r1)
+/* 801C91DC 001C4E3C 83 E1 00 BC */ lwz r31, 0xbc(r1)
+/* 801C91E0 001C4E40 80 C1 00 90 */ lwz r6, 0x90(r1)
+/* 801C91E4 001C4E44 83 C1 00 C0 */ lwz r30, 0xc0(r1)
+/* 801C91E8 001C4E48 80 A1 00 94 */ lwz r5, 0x94(r1)
+/* 801C91EC 001C4E4C 83 A1 00 C4 */ lwz r29, 0xc4(r1)
+/* 801C91F0 001C4E50 80 81 00 98 */ lwz r4, 0x98(r1)
+/* 801C91F4 001C4E54 83 81 00 C8 */ lwz r28, 0xc8(r1)
+/* 801C91F8 001C4E58 80 61 00 9C */ lwz r3, 0x9c(r1)
+/* 801C91FC 001C4E5C A3 61 00 CC */ lhz r27, 0xcc(r1)
+/* 801C9200 001C4E60 A0 01 00 A0 */ lhz r0, 0xa0(r1)
+/* 801C9204 001C4E64 92 A1 00 4C */ stw r21, 0x4c(r1)
+/* 801C9208 001C4E68 92 C1 00 50 */ stw r22, 0x50(r1)
+/* 801C920C 001C4E6C 92 E1 00 54 */ stw r23, 0x54(r1)
+/* 801C9210 001C4E70 93 01 00 58 */ stw r24, 0x58(r1)
+/* 801C9214 001C4E74 93 21 00 5C */ stw r25, 0x5c(r1)
+/* 801C9218 001C4E78 93 41 00 60 */ stw r26, 0x60(r1)
+/* 801C921C 001C4E7C 93 E1 00 64 */ stw r31, 0x64(r1)
+/* 801C9220 001C4E80 93 C1 00 68 */ stw r30, 0x68(r1)
+/* 801C9224 001C4E84 93 A1 00 6C */ stw r29, 0x6c(r1)
+/* 801C9228 001C4E88 93 81 00 70 */ stw r28, 0x70(r1)
+/* 801C922C 001C4E8C B3 61 00 74 */ sth r27, 0x74(r1)
+/* 801C9230 001C4E90 91 81 00 A4 */ stw r12, 0xa4(r1)
+/* 801C9234 001C4E94 91 61 00 A8 */ stw r11, 0xa8(r1)
+/* 801C9238 001C4E98 91 41 00 AC */ stw r10, 0xac(r1)
+/* 801C923C 001C4E9C 91 21 00 B0 */ stw r9, 0xb0(r1)
+/* 801C9240 001C4EA0 91 01 00 B4 */ stw r8, 0xb4(r1)
+/* 801C9244 001C4EA4 90 E1 00 B8 */ stw r7, 0xb8(r1)
+/* 801C9248 001C4EA8 90 C1 00 BC */ stw r6, 0xbc(r1)
+/* 801C924C 001C4EAC 90 A1 00 C0 */ stw r5, 0xc0(r1)
+/* 801C9250 001C4EB0 90 81 00 C4 */ stw r4, 0xc4(r1)
+/* 801C9254 001C4EB4 90 61 00 C8 */ stw r3, 0xc8(r1)
+/* 801C9258 001C4EB8 B0 01 00 CC */ sth r0, 0xcc(r1)
+/* 801C925C 001C4EBC 92 A1 00 78 */ stw r21, 0x78(r1)
+/* 801C9260 001C4EC0 92 C1 00 7C */ stw r22, 0x7c(r1)
+/* 801C9264 001C4EC4 92 E1 00 80 */ stw r23, 0x80(r1)
+/* 801C9268 001C4EC8 93 01 00 84 */ stw r24, 0x84(r1)
+/* 801C926C 001C4ECC 93 21 00 88 */ stw r25, 0x88(r1)
+/* 801C9270 001C4ED0 93 41 00 8C */ stw r26, 0x8c(r1)
+/* 801C9274 001C4ED4 93 E1 00 90 */ stw r31, 0x90(r1)
+/* 801C9278 001C4ED8 93 C1 00 94 */ stw r30, 0x94(r1)
+/* 801C927C 001C4EDC 93 A1 00 98 */ stw r29, 0x98(r1)
+/* 801C9280 001C4EE0 93 81 00 9C */ stw r28, 0x9c(r1)
+/* 801C9284 001C4EE4 B3 61 00 A0 */ sth r27, 0xa0(r1)
+/* 801C9288 001C4EE8 DB E1 00 10 */ stfd f31, 0x10(r1)
+/* 801C928C 001C4EEC D8 01 00 08 */ stfd f0, 8(r1)
+/* 801C9290 001C4EF0 48 00 00 68 */ b lbl_801C92F8
+lbl_801C9294:
+/* 801C9294 001C4EF4 81 81 00 78 */ lwz r12, 0x78(r1)
+/* 801C9298 001C4EF8 81 61 00 7C */ lwz r11, 0x7c(r1)
+/* 801C929C 001C4EFC 81 41 00 80 */ lwz r10, 0x80(r1)
+/* 801C92A0 001C4F00 81 21 00 84 */ lwz r9, 0x84(r1)
+/* 801C92A4 001C4F04 81 01 00 88 */ lwz r8, 0x88(r1)
+/* 801C92A8 001C4F08 80 E1 00 8C */ lwz r7, 0x8c(r1)
+/* 801C92AC 001C4F0C 80 C1 00 90 */ lwz r6, 0x90(r1)
+/* 801C92B0 001C4F10 80 A1 00 94 */ lwz r5, 0x94(r1)
+/* 801C92B4 001C4F14 80 81 00 98 */ lwz r4, 0x98(r1)
+/* 801C92B8 001C4F18 80 61 00 9C */ lwz r3, 0x9c(r1)
+/* 801C92BC 001C4F1C A0 01 00 A0 */ lhz r0, 0xa0(r1)
+/* 801C92C0 001C4F20 CB E1 00 08 */ lfd f31, 8(r1)
+/* 801C92C4 001C4F24 91 81 00 A4 */ stw r12, 0xa4(r1)
+/* 801C92C8 001C4F28 91 61 00 A8 */ stw r11, 0xa8(r1)
+/* 801C92CC 001C4F2C 91 41 00 AC */ stw r10, 0xac(r1)
+/* 801C92D0 001C4F30 91 21 00 B0 */ stw r9, 0xb0(r1)
+/* 801C92D4 001C4F34 91 01 00 B4 */ stw r8, 0xb4(r1)
+/* 801C92D8 001C4F38 90 E1 00 B8 */ stw r7, 0xb8(r1)
+/* 801C92DC 001C4F3C 90 C1 00 BC */ stw r6, 0xbc(r1)
+/* 801C92E0 001C4F40 90 A1 00 C0 */ stw r5, 0xc0(r1)
+/* 801C92E4 001C4F44 90 81 00 C4 */ stw r4, 0xc4(r1)
+/* 801C92E8 001C4F48 90 61 00 C8 */ stw r3, 0xc8(r1)
+/* 801C92EC 001C4F4C B0 01 00 CC */ sth r0, 0xcc(r1)
+/* 801C92F0 001C4F50 DB E1 00 10 */ stfd f31, 0x10(r1)
+/* 801C92F4 001C4F54 4B FF FE 20 */ b lbl_801C9114
+lbl_801C92F8:
+/* 801C92F8 001C4F58 38 61 00 4C */ addi r3, r1, 0x4c
+/* 801C92FC 001C4F5C 38 81 00 FC */ addi r4, r1, 0xfc
+/* 801C9300 001C4F60 38 A1 00 A4 */ addi r5, r1, 0xa4
+/* 801C9304 001C4F64 4B FF F0 C5 */ bl __minus_dec
+/* 801C9308 001C4F68 38 61 00 20 */ addi r3, r1, 0x20
+/* 801C930C 001C4F6C 38 81 00 78 */ addi r4, r1, 0x78
+/* 801C9310 001C4F70 38 A1 00 FC */ addi r5, r1, 0xfc
+/* 801C9314 001C4F74 4B FF F0 B5 */ bl __minus_dec
+/* 801C9318 001C4F78 38 61 00 4C */ addi r3, r1, 0x4c
+/* 801C931C 001C4F7C 38 81 00 20 */ addi r4, r1, 0x20
+/* 801C9320 001C4F80 4B FF EE C5 */ bl __equals_dec
+/* 801C9324 001C4F84 2C 03 00 00 */ cmpwi r3, 0
+/* 801C9328 001C4F88 41 82 00 1C */ beq lbl_801C9344
+/* 801C932C 001C4F8C 80 01 00 14 */ lwz r0, 0x14(r1)
+/* 801C9330 001C4F90 54 00 07 FF */ clrlwi. r0, r0, 0x1f
+/* 801C9334 001C4F94 41 82 00 2C */ beq lbl_801C9360
+/* 801C9338 001C4F98 CB E1 00 08 */ lfd f31, 8(r1)
+/* 801C933C 001C4F9C DB E1 00 10 */ stfd f31, 0x10(r1)
+/* 801C9340 001C4FA0 48 00 00 20 */ b lbl_801C9360
+lbl_801C9344:
+/* 801C9344 001C4FA4 38 61 00 4C */ addi r3, r1, 0x4c
+/* 801C9348 001C4FA8 38 81 00 20 */ addi r4, r1, 0x20
+/* 801C934C 001C4FAC 4B FF EF 7D */ bl __less_dec
+/* 801C9350 001C4FB0 2C 03 00 00 */ cmpwi r3, 0
+/* 801C9354 001C4FB4 40 82 00 0C */ bne lbl_801C9360
+/* 801C9358 001C4FB8 CB E1 00 08 */ lfd f31, 8(r1)
+/* 801C935C 001C4FBC DB E1 00 10 */ stfd f31, 0x10(r1)
+lbl_801C9360:
+/* 801C9360 001C4FC0 88 01 00 FC */ lbz r0, 0xfc(r1)
+/* 801C9364 001C4FC4 7C 00 07 75 */ extsb. r0, r0
+/* 801C9368 001C4FC8 41 82 00 0C */ beq lbl_801C9374
+/* 801C936C 001C4FCC FF E0 F8 50 */ fneg f31, f31
+/* 801C9370 001C4FD0 DB E1 00 10 */ stfd f31, 0x10(r1)
+lbl_801C9374:
+/* 801C9374 001C4FD4 FC 20 F8 90 */ fmr f1, f31
+lbl_801C9378:
+/* 801C9378 001C4FD8 E3 E1 01 78 */ psq_l f31, 376(r1), 0, qr0
+/* 801C937C 001C4FDC 39 61 01 70 */ addi r11, r1, 0x170
+/* 801C9380 001C4FE0 CB E1 01 70 */ lfd f31, 0x170(r1)
+/* 801C9384 001C4FE4 4B FF DD D1 */ bl _restgpr_19
+/* 801C9388 001C4FE8 80 01 01 84 */ lwz r0, 0x184(r1)
+/* 801C938C 001C4FEC 7C 08 03 A6 */ mtlr r0
+/* 801C9390 001C4FF0 38 21 01 80 */ addi r1, r1, 0x180
+/* 801C9394 001C4FF4 4E 80 00 20 */ blr
diff --git a/asm/MSL_C/MSL_Common_Embedded/math_sun.s b/asm/MSL_C/MSL_Common_Embedded/math_sun.s new file mode 100644 index 0000000..ce06b2a --- /dev/null +++ b/asm/MSL_C/MSL_Common_Embedded/math_sun.s @@ -0,0 +1,22 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global scalbn
+scalbn:
+/* 801D09C0 001CC620 94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 801D09C4 001CC624 7C 08 02 A6 */ mflr r0
+/* 801D09C8 001CC628 90 01 00 24 */ stw r0, 0x24(r1)
+/* 801D09CC 001CC62C 93 E1 00 1C */ stw r31, 0x1c(r1)
+/* 801D09D0 001CC630 7C 7F 1B 78 */ mr r31, r3
+/* 801D09D4 001CC634 38 61 00 08 */ addi r3, r1, 8
+/* 801D09D8 001CC638 48 00 38 B9 */ bl frexp
+/* 801D09DC 001CC63C 80 01 00 08 */ lwz r0, 8(r1)
+/* 801D09E0 001CC640 7C 60 FA 14 */ add r3, r0, r31
+/* 801D09E4 001CC644 90 61 00 08 */ stw r3, 8(r1)
+/* 801D09E8 001CC648 48 00 39 31 */ bl ldexp
+/* 801D09EC 001CC64C 80 01 00 24 */ lwz r0, 0x24(r1)
+/* 801D09F0 001CC650 83 E1 00 1C */ lwz r31, 0x1c(r1)
+/* 801D09F4 001CC654 7C 08 03 A6 */ mtlr r0
+/* 801D09F8 001CC658 38 21 00 20 */ addi r1, r1, 0x20
+/* 801D09FC 001CC65C 4E 80 00 20 */ blr
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