.include "macros.inc"

.section .text, "ax"  # 0x80006980 - 0x803E1E60

.global WBT_ExtCreateRecord
WBT_ExtCreateRecord:
/* 802CEB50 002CA7B0  94 21 FE E0 */	stwu r1, -0x120(r1)
/* 802CEB54 002CA7B4  7C 08 02 A6 */	mflr r0
/* 802CEB58 002CA7B8  90 01 01 24 */	stw r0, 0x124(r1)
/* 802CEB5C 002CA7BC  38 00 10 02 */	li r0, 0x1002
/* 802CEB60 002CA7C0  38 61 00 14 */	addi r3, r1, 0x14
/* 802CEB64 002CA7C4  38 81 00 10 */	addi r4, r1, 0x10
/* 802CEB68 002CA7C8  93 E1 01 1C */	stw r31, 0x11c(r1)
/* 802CEB6C 002CA7CC  3B E0 00 00 */	li r31, 0
/* 802CEB70 002CA7D0  93 C1 01 18 */	stw r30, 0x118(r1)
/* 802CEB74 002CA7D4  93 E1 00 10 */	stw r31, 0x10(r1)
/* 802CEB78 002CA7D8  B0 01 00 08 */	sth r0, 8(r1)
/* 802CEB7C 002CA7DC  48 01 3C 01 */	bl SDP_GetLocalDiRecord
/* 802CEB80 002CA7E0  54 60 04 3F */	clrlwi. r0, r3, 0x10
/* 802CEB84 002CA7E4  41 82 00 4C */	beq lbl_802CEBD0
/* 802CEB88 002CA7E8  3B C1 00 16 */	addi r30, r1, 0x16
/* 802CEB8C 002CA7EC  38 80 00 00 */	li r4, 0
/* 802CEB90 002CA7F0  7F C3 F3 78 */	mr r3, r30
/* 802CEB94 002CA7F4  38 A0 00 FA */	li r5, 0xfa
/* 802CEB98 002CA7F8  4B D3 55 6D */	bl memset
/* 802CEB9C 002CA7FC  38 00 00 01 */	li r0, 1
/* 802CEBA0 002CA800  38 60 00 0F */	li r3, 0xf
/* 802CEBA4 002CA804  B0 61 00 16 */	sth r3, 0x16(r1)
/* 802CEBA8 002CA808  7F C3 F3 78 */	mr r3, r30
/* 802CEBAC 002CA80C  38 81 00 10 */	addi r4, r1, 0x10
/* 802CEBB0 002CA810  B0 01 00 18 */	sth r0, 0x18(r1)
/* 802CEBB4 002CA814  98 01 00 1E */	stb r0, 0x1e(r1)
/* 802CEBB8 002CA818  48 01 38 65 */	bl SDP_SetLocalDiRecord
/* 802CEBBC 002CA81C  54 60 04 3F */	clrlwi. r0, r3, 0x10
/* 802CEBC0 002CA820  41 82 00 10 */	beq lbl_802CEBD0
/* 802CEBC4 002CA824  93 E1 00 10 */	stw r31, 0x10(r1)
/* 802CEBC8 002CA828  38 60 00 00 */	li r3, 0
/* 802CEBCC 002CA82C  48 00 00 4C */	b lbl_802CEC18
lbl_802CEBD0:
/* 802CEBD0 002CA830  80 61 00 10 */	lwz r3, 0x10(r1)
/* 802CEBD4 002CA834  38 C1 00 08 */	addi r6, r1, 8
/* 802CEBD8 002CA838  38 80 00 05 */	li r4, 5
/* 802CEBDC 002CA83C  38 A0 00 01 */	li r5, 1
/* 802CEBE0 002CA840  48 01 48 AD */	bl SDP_AddUuidSequence
/* 802CEBE4 002CA844  38 00 00 00 */	li r0, 0
/* 802CEBE8 002CA848  38 80 00 01 */	li r4, 1
/* 802CEBEC 002CA84C  3C 60 00 01 */	lis r3, 0x00008001@ha
/* 802CEBF0 002CA850  98 01 00 0C */	stb r0, 0xc(r1)
/* 802CEBF4 002CA854  38 03 80 01 */	addi r0, r3, 0x00008001@l
/* 802CEBF8 002CA858  80 61 00 10 */	lwz r3, 0x10(r1)
/* 802CEBFC 002CA85C  98 81 00 0D */	stb r4, 0xd(r1)
/* 802CEC00 002CA860  54 04 04 3E */	clrlwi r4, r0, 0x10
/* 802CEC04 002CA864  38 E1 00 0C */	addi r7, r1, 0xc
/* 802CEC08 002CA868  38 A0 00 01 */	li r5, 1
/* 802CEC0C 002CA86C  38 C0 00 02 */	li r6, 2
/* 802CEC10 002CA870  48 01 44 E5 */	bl SDP_AddAttribute
/* 802CEC14 002CA874  38 60 00 01 */	li r3, 1
lbl_802CEC18:
/* 802CEC18 002CA878  80 01 01 24 */	lwz r0, 0x124(r1)
/* 802CEC1C 002CA87C  83 E1 01 1C */	lwz r31, 0x11c(r1)
/* 802CEC20 002CA880  83 C1 01 18 */	lwz r30, 0x118(r1)
/* 802CEC24 002CA884  7C 08 03 A6 */	mtlr r0
/* 802CEC28 002CA888  38 21 01 20 */	addi r1, r1, 0x120
/* 802CEC2C 002CA88C  4E 80 00 20 */	blr