.include "macros.inc" .section .text, "ax" # 0x80006980 - 0x803E1E60 cbForNandClose: /* 8028CBE4 00288844 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CBE8 00288848 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CBEC 0028884C 4D 82 00 20 */ beqlr /* 8028CBF0 00288850 7C 60 00 34 */ cntlzw r0, r3 /* 8028CBF4 00288854 38 80 00 00 */ li r4, 0 /* 8028CBF8 00288858 54 00 DF FE */ rlwinm r0, r0, 0x1b, 0x1f, 0x1f /* 8028CBFC 0028885C 7C 60 00 D0 */ neg r3, r0 /* 8028CC00 00288860 38 63 00 02 */ addi r3, r3, 2 /* 8028CC04 00288864 7D 89 03 A6 */ mtctr r12 /* 8028CC08 00288868 4E 80 04 20 */ bctr /* 8028CC0C 0028886C 4E 80 00 20 */ blr cbForNandWrite: /* 8028CC10 00288870 94 21 FF F0 */ stwu r1, -0x10(r1) /* 8028CC14 00288874 7C 08 02 A6 */ mflr r0 /* 8028CC18 00288878 3C 60 80 52 */ lis r3, lbl_8051B580@ha /* 8028CC1C 0028887C 3C 80 80 29 */ lis r4, cbForNandClose@ha /* 8028CC20 00288880 3C A0 80 52 */ lis r5, lbl_8051B610@ha /* 8028CC24 00288884 90 01 00 14 */ stw r0, 0x14(r1) /* 8028CC28 00288888 38 63 B5 80 */ addi r3, r3, lbl_8051B580@l /* 8028CC2C 0028888C 38 84 CB E4 */ addi r4, r4, cbForNandClose@l /* 8028CC30 00288890 38 A5 B6 10 */ addi r5, r5, lbl_8051B610@l /* 8028CC34 00288894 48 05 BA C1 */ bl NANDCloseAsync /* 8028CC38 00288898 2C 03 00 00 */ cmpwi r3, 0 /* 8028CC3C 0028889C 41 82 00 20 */ beq lbl_8028CC5C /* 8028CC40 002888A0 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CC44 002888A4 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CC48 002888A8 41 82 00 14 */ beq lbl_8028CC5C /* 8028CC4C 002888AC 38 60 00 02 */ li r3, 2 /* 8028CC50 002888B0 38 80 00 00 */ li r4, 0 /* 8028CC54 002888B4 7D 89 03 A6 */ mtctr r12 /* 8028CC58 002888B8 4E 80 04 21 */ bctrl lbl_8028CC5C: /* 8028CC5C 002888BC 80 01 00 14 */ lwz r0, 0x14(r1) /* 8028CC60 002888C0 7C 08 03 A6 */ mtlr r0 /* 8028CC64 002888C4 38 21 00 10 */ addi r1, r1, 0x10 /* 8028CC68 002888C8 4E 80 00 20 */ blr .global cbForNandOpen cbForNandOpen: /* 8028CC6C 002888CC 94 21 FF F0 */ stwu r1, -0x10(r1) /* 8028CC70 002888D0 7C 08 02 A6 */ mflr r0 /* 8028CC74 002888D4 2C 03 00 00 */ cmpwi r3, 0 /* 8028CC78 002888D8 90 01 00 14 */ stw r0, 0x14(r1) /* 8028CC7C 002888DC 93 E1 00 0C */ stw r31, 0xc(r1) /* 8028CC80 002888E0 3F E0 80 52 */ lis r31, lbl_8051B580@ha /* 8028CC84 002888E4 3B FF B5 80 */ addi r31, r31, lbl_8051B580@l /* 8028CC88 002888E8 40 82 00 64 */ bne lbl_8028CCEC /* 8028CC8C 002888EC 3C C0 80 29 */ lis r6, cbForNandWrite@ha /* 8028CC90 002888F0 38 7F 00 00 */ addi r3, r31, 0 /* 8028CC94 002888F4 38 9F 01 60 */ addi r4, r31, 0x160 /* 8028CC98 002888F8 38 FF 00 90 */ addi r7, r31, 0x90 /* 8028CC9C 002888FC 38 C6 CC 10 */ addi r6, r6, cbForNandWrite@l /* 8028CCA0 00288900 38 A0 00 80 */ li r5, 0x80 /* 8028CCA4 00288904 48 05 AD 65 */ bl NANDWriteAsync /* 8028CCA8 00288908 2C 03 00 00 */ cmpwi r3, 0 /* 8028CCAC 0028890C 41 82 00 5C */ beq lbl_8028CD08 /* 8028CCB0 00288910 3C 80 80 29 */ lis r4, cbForNandClose@ha /* 8028CCB4 00288914 38 7F 00 00 */ addi r3, r31, 0 /* 8028CCB8 00288918 38 84 CB E4 */ addi r4, r4, cbForNandClose@l /* 8028CCBC 0028891C 38 BF 00 90 */ addi r5, r31, 0x90 /* 8028CCC0 00288920 48 05 BA 35 */ bl NANDCloseAsync /* 8028CCC4 00288924 2C 03 00 00 */ cmpwi r3, 0 /* 8028CCC8 00288928 41 82 00 40 */ beq lbl_8028CD08 /* 8028CCCC 0028892C 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CCD0 00288930 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CCD4 00288934 41 82 00 34 */ beq lbl_8028CD08 /* 8028CCD8 00288938 38 60 00 02 */ li r3, 2 /* 8028CCDC 0028893C 38 80 00 00 */ li r4, 0 /* 8028CCE0 00288940 7D 89 03 A6 */ mtctr r12 /* 8028CCE4 00288944 4E 80 04 21 */ bctrl /* 8028CCE8 00288948 48 00 00 20 */ b lbl_8028CD08 lbl_8028CCEC: /* 8028CCEC 0028894C 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CCF0 00288950 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CCF4 00288954 41 82 00 14 */ beq lbl_8028CD08 /* 8028CCF8 00288958 38 60 00 02 */ li r3, 2 /* 8028CCFC 0028895C 38 80 00 00 */ li r4, 0 /* 8028CD00 00288960 7D 89 03 A6 */ mtctr r12 /* 8028CD04 00288964 4E 80 04 21 */ bctrl lbl_8028CD08: /* 8028CD08 00288968 80 01 00 14 */ lwz r0, 0x14(r1) /* 8028CD0C 0028896C 83 E1 00 0C */ lwz r31, 0xc(r1) /* 8028CD10 00288970 7C 08 03 A6 */ mtlr r0 /* 8028CD14 00288974 38 21 00 10 */ addi r1, r1, 0x10 /* 8028CD18 00288978 4E 80 00 20 */ blr cbForNandCreate: /* 8028CD1C 0028897C 94 21 FF F0 */ stwu r1, -0x10(r1) /* 8028CD20 00288980 7C 08 02 A6 */ mflr r0 /* 8028CD24 00288984 2C 03 00 00 */ cmpwi r3, 0 /* 8028CD28 00288988 90 01 00 14 */ stw r0, 0x14(r1) /* 8028CD2C 0028898C 41 82 00 0C */ beq lbl_8028CD38 /* 8028CD30 00288990 2C 03 FF FA */ cmpwi r3, -6 /* 8028CD34 00288994 40 82 00 54 */ bne lbl_8028CD88 lbl_8028CD38: /* 8028CD38 00288998 3C 60 80 43 */ lis r3, lbl_804361C0@ha /* 8028CD3C 0028899C 3C 80 80 52 */ lis r4, lbl_8051B580@ha /* 8028CD40 002889A0 3C C0 80 29 */ lis r6, cbForNandOpen@ha /* 8028CD44 002889A4 3C E0 80 52 */ lis r7, lbl_8051B610@ha /* 8028CD48 002889A8 38 63 61 C0 */ addi r3, r3, lbl_804361C0@l /* 8028CD4C 002889AC 38 84 B5 80 */ addi r4, r4, lbl_8051B580@l /* 8028CD50 002889B0 38 C6 CC 6C */ addi r6, r6, cbForNandOpen@l /* 8028CD54 002889B4 38 E7 B6 10 */ addi r7, r7, lbl_8051B610@l /* 8028CD58 002889B8 38 A0 00 02 */ li r5, 2 /* 8028CD5C 002889BC 48 05 B8 3D */ bl NANDPrivateOpenAsync /* 8028CD60 002889C0 2C 03 00 00 */ cmpwi r3, 0 /* 8028CD64 002889C4 41 82 00 40 */ beq lbl_8028CDA4 /* 8028CD68 002889C8 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CD6C 002889CC 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CD70 002889D0 41 82 00 34 */ beq lbl_8028CDA4 /* 8028CD74 002889D4 38 60 00 02 */ li r3, 2 /* 8028CD78 002889D8 38 80 00 00 */ li r4, 0 /* 8028CD7C 002889DC 7D 89 03 A6 */ mtctr r12 /* 8028CD80 002889E0 4E 80 04 21 */ bctrl /* 8028CD84 002889E4 48 00 00 20 */ b lbl_8028CDA4 lbl_8028CD88: /* 8028CD88 002889E8 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CD8C 002889EC 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CD90 002889F0 41 82 00 14 */ beq lbl_8028CDA4 /* 8028CD94 002889F4 38 60 00 02 */ li r3, 2 /* 8028CD98 002889F8 38 80 00 00 */ li r4, 0 /* 8028CD9C 002889FC 7D 89 03 A6 */ mtctr r12 /* 8028CDA0 00288A00 4E 80 04 21 */ bctrl lbl_8028CDA4: /* 8028CDA4 00288A04 80 01 00 14 */ lwz r0, 0x14(r1) /* 8028CDA8 00288A08 7C 08 03 A6 */ mtlr r0 /* 8028CDAC 00288A0C 38 21 00 10 */ addi r1, r1, 0x10 /* 8028CDB0 00288A10 4E 80 00 20 */ blr cbForNandCreateDir: /* 8028CDB4 00288A14 94 21 FF F0 */ stwu r1, -0x10(r1) /* 8028CDB8 00288A18 7C 08 02 A6 */ mflr r0 /* 8028CDBC 00288A1C 2C 03 00 00 */ cmpwi r3, 0 /* 8028CDC0 00288A20 90 01 00 14 */ stw r0, 0x14(r1) /* 8028CDC4 00288A24 41 82 00 0C */ beq lbl_8028CDD0 /* 8028CDC8 00288A28 2C 03 FF FA */ cmpwi r3, -6 /* 8028CDCC 00288A2C 40 82 00 50 */ bne lbl_8028CE1C lbl_8028CDD0: /* 8028CDD0 00288A30 3C 60 80 43 */ lis r3, lbl_804361C0@ha /* 8028CDD4 00288A34 3C C0 80 29 */ lis r6, cbForNandCreate@ha /* 8028CDD8 00288A38 3C E0 80 52 */ lis r7, lbl_8051B610@ha /* 8028CDDC 00288A3C 38 80 00 3F */ li r4, 0x3f /* 8028CDE0 00288A40 38 63 61 C0 */ addi r3, r3, lbl_804361C0@l /* 8028CDE4 00288A44 38 C6 CD 1C */ addi r6, r6, cbForNandCreate@l /* 8028CDE8 00288A48 38 E7 B6 10 */ addi r7, r7, lbl_8051B610@l /* 8028CDEC 00288A4C 38 A0 00 00 */ li r5, 0 /* 8028CDF0 00288A50 48 05 A8 E9 */ bl NANDPrivateCreateAsync /* 8028CDF4 00288A54 2C 03 00 00 */ cmpwi r3, 0 /* 8028CDF8 00288A58 41 82 00 40 */ beq lbl_8028CE38 /* 8028CDFC 00288A5C 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CE00 00288A60 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CE04 00288A64 41 82 00 34 */ beq lbl_8028CE38 /* 8028CE08 00288A68 38 60 00 02 */ li r3, 2 /* 8028CE0C 00288A6C 38 80 00 00 */ li r4, 0 /* 8028CE10 00288A70 7D 89 03 A6 */ mtctr r12 /* 8028CE14 00288A74 4E 80 04 21 */ bctrl /* 8028CE18 00288A78 48 00 00 20 */ b lbl_8028CE38 lbl_8028CE1C: /* 8028CE1C 00288A7C 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CE20 00288A80 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CE24 00288A84 41 82 00 14 */ beq lbl_8028CE38 /* 8028CE28 00288A88 38 60 00 02 */ li r3, 2 /* 8028CE2C 00288A8C 38 80 00 00 */ li r4, 0 /* 8028CE30 00288A90 7D 89 03 A6 */ mtctr r12 /* 8028CE34 00288A94 4E 80 04 21 */ bctrl lbl_8028CE38: /* 8028CE38 00288A98 80 01 00 14 */ lwz r0, 0x14(r1) /* 8028CE3C 00288A9C 7C 08 03 A6 */ mtlr r0 /* 8028CE40 00288AA0 38 21 00 10 */ addi r1, r1, 0x10 /* 8028CE44 00288AA4 4E 80 00 20 */ blr .global __DVDStoreErrorCode __DVDStoreErrorCode: /* 8028CE48 00288AA8 94 21 FF F0 */ stwu r1, -0x10(r1) /* 8028CE4C 00288AAC 7C 08 02 A6 */ mflr r0 /* 8028CE50 00288AB0 90 01 00 14 */ stw r0, 0x14(r1) /* 8028CE54 00288AB4 93 E1 00 0C */ stw r31, 0xc(r1) /* 8028CE58 00288AB8 3F E0 80 52 */ lis r31, lbl_8051B6E0@ha /* 8028CE5C 00288ABC 3B FF B6 E0 */ addi r31, r31, lbl_8051B6E0@l /* 8028CE60 00288AC0 93 C1 00 08 */ stw r30, 8(r1) /* 8028CE64 00288AC4 7C 9E 23 78 */ mr r30, r4 /* 8028CE68 00288AC8 90 7F 00 08 */ stw r3, 8(r31) /* 8028CE6C 00288ACC 4B FE 59 4D */ bl OSGetTime /* 8028CE70 00288AD0 3C C0 80 00 */ lis r6, 0x800000F8@ha /* 8028CE74 00288AD4 38 A0 00 00 */ li r5, 0 /* 8028CE78 00288AD8 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6) /* 8028CE7C 00288ADC 54 06 F0 BE */ srwi r6, r0, 2 /* 8028CE80 00288AE0 4B F3 A3 F9 */ bl __div2i /* 8028CE84 00288AE4 90 9F 00 0C */ stw r4, 0xc(r31) /* 8028CE88 00288AE8 3C 60 80 43 */ lis r3, lbl_804361DC@ha /* 8028CE8C 00288AEC 3C C0 80 29 */ lis r6, cbForNandCreateDir@ha /* 8028CE90 00288AF0 3C E0 80 52 */ lis r7, lbl_8051B610@ha /* 8028CE94 00288AF4 93 CD AA 98 */ stw r30, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CE98 00288AF8 38 63 61 DC */ addi r3, r3, lbl_804361DC@l /* 8028CE9C 00288AFC 38 C6 CD B4 */ addi r6, r6, cbForNandCreateDir@l /* 8028CEA0 00288B00 38 E7 B6 10 */ addi r7, r7, lbl_8051B610@l /* 8028CEA4 00288B04 38 80 00 3F */ li r4, 0x3f /* 8028CEA8 00288B08 38 A0 00 00 */ li r5, 0 /* 8028CEAC 00288B0C 48 05 AF A9 */ bl NANDPrivateCreateDirAsync /* 8028CEB0 00288B10 2C 03 00 00 */ cmpwi r3, 0 /* 8028CEB4 00288B14 41 82 00 20 */ beq lbl_8028CED4 /* 8028CEB8 00288B18 81 8D AA 98 */ lwz r12, lbl_8063FD58-_SDA_BASE_(r13) /* 8028CEBC 00288B1C 2C 0C 00 00 */ cmpwi r12, 0 /* 8028CEC0 00288B20 41 82 00 14 */ beq lbl_8028CED4 /* 8028CEC4 00288B24 38 60 00 02 */ li r3, 2 /* 8028CEC8 00288B28 38 80 00 00 */ li r4, 0 /* 8028CECC 00288B2C 7D 89 03 A6 */ mtctr r12 /* 8028CED0 00288B30 4E 80 04 21 */ bctrl lbl_8028CED4: /* 8028CED4 00288B34 80 01 00 14 */ lwz r0, 0x14(r1) /* 8028CED8 00288B38 83 E1 00 0C */ lwz r31, 0xc(r1) /* 8028CEDC 00288B3C 83 C1 00 08 */ lwz r30, 8(r1) /* 8028CEE0 00288B40 7C 08 03 A6 */ mtlr r0 /* 8028CEE4 00288B44 38 21 00 10 */ addi r1, r1, 0x10 /* 8028CEE8 00288B48 4E 80 00 20 */ blr