From 32b02147925566bac93bf71b002860335583574c Mon Sep 17 00:00:00 2001 From: ElectroDeoxys Date: Thu, 9 Sep 2021 08:51:12 +0100 Subject: Split home bank --- src/home/setup.asm | 158 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 src/home/setup.asm (limited to 'src/home/setup.asm') diff --git a/src/home/setup.asm b/src/home/setup.asm new file mode 100644 index 0000000..bf58452 --- /dev/null +++ b/src/home/setup.asm @@ -0,0 +1,158 @@ +; initialize scroll, window, and lcdc registers, set trampoline functions +; for the lcdc and vblank interrupts, latch clock data, and enable SRAM/RTC +SetupRegisters: ; 030b (0:030b) + xor a + ldh [rSCY], a + ldh [rSCX], a + ldh [rWY], a + ldh [rWX], a + ld [wcab0], a + ld [wcab1], a + ld [wcab2], a + ldh [hSCX], a + ldh [hSCY], a + ldh [hWX], a + ldh [hWY], a + xor a + ld [wReentrancyFlag], a + ld a, $c3 ; $c3 = jp nn + ld [wLCDCFunctionTrampoline], a + ld [wVBlankFunctionTrampoline], a + ld hl, wVBlankFunctionTrampoline + 1 + ld [hl], LOW(NoOp) ; + inc hl ; load `jp NoOp` + ld [hl], HIGH(NoOp) ; + ld a, LCDC_BGON | LCDC_OBJON | LCDC_OBJ16 | LCDC_WIN9C00 + ld [wLCDC], a + ld a, $1 + ld [MBC3LatchClock], a + ld a, SRAM_ENABLE + ld [MBC3SRamEnable], a +NoOp: ; 0348 (0:0348) + ret + +; sets wConsole and, if CGB, selects WRAM bank 1 and switches to double speed mode +DetectConsole: ; 0349 (0:0349) + ld b, CONSOLE_CGB + cp GBC + jr z, .got_console + call DetectSGB + ld b, CONSOLE_DMG + jr nc, .got_console + call InitSGB + ld b, CONSOLE_SGB +.got_console + ld a, b + ld [wConsole], a + cp CONSOLE_CGB + ret nz + ld a, $01 + ldh [rSVBK], a + call SwitchToCGBDoubleSpeed + ret + +; initialize the palettes (both monochrome and color) +SetupPalettes: ; 036a (0:036a) + ld hl, wBGP + ld a, %11100100 + ldh [rBGP], a + ld [hli], a ; wBGP + ldh [rOBP0], a + ldh [rOBP1], a + ld [hli], a ; wOBP0 + ld [hl], a ; wOBP1 + xor a + ld [wFlushPaletteFlags], a + ld a, [wConsole] + cp CONSOLE_CGB + ret nz + ld de, wBackgroundPalettesCGB + ld c, 16 +.copy_pals_loop + ld hl, InitialPalette + ld b, CGB_PAL_SIZE +.copy_bytes_loop + ld a, [hli] + ld [de], a + inc de + dec b + jr nz, .copy_bytes_loop + dec c + jr nz, .copy_pals_loop + call FlushAllCGBPalettes + ret + +InitialPalette: ; 0399 (0:0399) + rgb 28, 28, 24 + rgb 21, 21, 16 + rgb 10, 10, 08 + rgb 00, 00, 00 + +; clear VRAM tile data ([wTileMapFill] should be an empty tile) +SetupVRAM: ; 03a1 (0:03a1) + call FillTileMap + call CheckForCGB + jr c, .vram0 + call BankswitchVRAM1 + call .vram0 + call BankswitchVRAM0 +.vram0 + ld hl, v0Tiles0 + ld bc, v0BGMap0 - v0Tiles0 +.loop + xor a + ld [hli], a + dec bc + ld a, b + or c + jr nz, .loop + ret + +; fill VRAM0 BG map 0 with [wTileMapFill] and VRAM1 BG map 0 with $00 +FillTileMap: ; 03c0 (0:03c0) + call BankswitchVRAM0 + ld hl, v0BGMap0 + ld bc, v0BGMap1 - v0BGMap0 +.vram0_loop + ld a, [wTileMapFill] + ld [hli], a + dec bc + ld a, c + or b + jr nz, .vram0_loop + ld a, [wConsole] + cp CONSOLE_CGB + ret nz + call BankswitchVRAM1 + ld hl, v1BGMap0 + ld bc, v1BGMap1 - v1BGMap0 +.vram1_loop + xor a + ld [hli], a + dec bc + ld a, c + or b + jr nz, .vram1_loop + call BankswitchVRAM0 + ret + +; zero work RAM, stack area, and high RAM ($C000-$DFFF, $FF80-$FFEF) +ZeroRAM: ; 03ec (0:03ec) + ld hl, $c000 + ld bc, $e000 - $c000 +.zero_wram_loop + xor a + ld [hli], a + dec bc + ld a, c + or b + jr nz, .zero_wram_loop + ld c, LOW($ff80) + ld b, $fff0 - $ff80 + xor a +.zero_hram_loop + ld [$ff00+c], a + inc c + dec b + jr nz, .zero_hram_loop + ret -- cgit v1.2.3 From 0017fc2d171c87d7bab4c9be90e1069ae95a8071 Mon Sep 17 00:00:00 2001 From: ElectroDeoxys Date: Thu, 9 Sep 2021 08:54:29 +0100 Subject: Remove home bank address comments --- src/home/setup.asm | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/home/setup.asm') diff --git a/src/home/setup.asm b/src/home/setup.asm index bf58452..10ecc70 100644 --- a/src/home/setup.asm +++ b/src/home/setup.asm @@ -1,6 +1,6 @@ ; initialize scroll, window, and lcdc registers, set trampoline functions ; for the lcdc and vblank interrupts, latch clock data, and enable SRAM/RTC -SetupRegisters: ; 030b (0:030b) +SetupRegisters: xor a ldh [rSCY], a ldh [rSCX], a @@ -28,11 +28,11 @@ SetupRegisters: ; 030b (0:030b) ld [MBC3LatchClock], a ld a, SRAM_ENABLE ld [MBC3SRamEnable], a -NoOp: ; 0348 (0:0348) +NoOp: ret ; sets wConsole and, if CGB, selects WRAM bank 1 and switches to double speed mode -DetectConsole: ; 0349 (0:0349) +DetectConsole: ld b, CONSOLE_CGB cp GBC jr z, .got_console @@ -52,7 +52,7 @@ DetectConsole: ; 0349 (0:0349) ret ; initialize the palettes (both monochrome and color) -SetupPalettes: ; 036a (0:036a) +SetupPalettes: ld hl, wBGP ld a, %11100100 ldh [rBGP], a @@ -82,14 +82,14 @@ SetupPalettes: ; 036a (0:036a) call FlushAllCGBPalettes ret -InitialPalette: ; 0399 (0:0399) +InitialPalette: rgb 28, 28, 24 rgb 21, 21, 16 rgb 10, 10, 08 rgb 00, 00, 00 ; clear VRAM tile data ([wTileMapFill] should be an empty tile) -SetupVRAM: ; 03a1 (0:03a1) +SetupVRAM: call FillTileMap call CheckForCGB jr c, .vram0 @@ -109,7 +109,7 @@ SetupVRAM: ; 03a1 (0:03a1) ret ; fill VRAM0 BG map 0 with [wTileMapFill] and VRAM1 BG map 0 with $00 -FillTileMap: ; 03c0 (0:03c0) +FillTileMap: call BankswitchVRAM0 ld hl, v0BGMap0 ld bc, v0BGMap1 - v0BGMap0 @@ -137,7 +137,7 @@ FillTileMap: ; 03c0 (0:03c0) ret ; zero work RAM, stack area, and high RAM ($C000-$DFFF, $FF80-$FFEF) -ZeroRAM: ; 03ec (0:03ec) +ZeroRAM: ld hl, $c000 ld bc, $e000 - $c000 .zero_wram_loop -- cgit v1.2.3