CPU and GPU Reg Funcs Decomp (#16)

* decomp/doc cpu funcs and gpu reg funcs

* use Cpu32 macro funcs

* address review comments

* decomp SetBGOBJEnableFlags

6 files changed, 9 insertions, 468 deletions

diff --git a/asm/code_800B540.s b/asm/code_800B540.s
deleted file mode 100644
index 2ac2395..0000000
--- a/asm/code_800B540.s
+++ /dev/null
@@ -1,88 +0,0 @@
-	.include "constants/gba_constants.inc"
-	.include "asm/macros.inc"
-
-	.syntax unified
-
-	.text
-
-	thumb_func_start sub_800B540
-sub_800B540:
-	push {r4,lr}
-	ldr r1, _0800B5C8
-	movs r2, 0
-	adds r0, r1, 0
-	adds r0, 0x14
-_0800B54A:
-	str r2, [r0]
-	subs r0, 0x4
-	cmp r0, r1
-	bge _0800B54A
-	bl nullsub_17
-	bl sub_800BD08
-	ldr r1, _0800B5CC
-_0800B55C:
-	ldrh r0, [r1]
-	cmp r0, 0x9F
-	bls _0800B55C
-	ldr r4, _0800B5D0
-	ldrh r0, [r4]
-	movs r1, 0x45
-	eors r0, r1
-	strh r0, [r4]
-	movs r2, 0x80
-	lsls r2, 19
-	ldrb r0, [r2]
-	movs r1, 0x80
-	orrs r0, r1
-	strb r0, [r2]
-	ldr r0, _0800B5D4
-	bl sub_800B6B0
-	ldr r1, _0800B5D8
-	movs r0, 0xC1
-	lsls r0, 16
-	str r0, [r1]
-	ldrh r0, [r4]
-	ldr r2, _0800B5DC
-	adds r1, r2, 0
-	orrs r0, r1
-	strh r0, [r4]
-	ldr r1, _0800B5E0
-	movs r0, 0x28
-	strh r0, [r1]
-	ldr r1, _0800B5E4
-	movs r2, 0x1
-	negs r2, r2
-	adds r0, r2, 0
-	strh r0, [r1]
-	ldr r1, _0800B5E8
-	movs r0, 0
-	strh r0, [r1]
-	bl sub_800D6AC
-	bl sub_800D7D0
-	ldr r1, _0800B5EC
-	movs r0, 0x1
-	strb r0, [r1]
-	bl EnableInterrupts
-	ldr r1, _0800B5CC
-_0800B5BA:
-	ldrh r0, [r1]
-	cmp r0, 0x9F
-	bls _0800B5BA
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_0800B5C8: .4byte gUnknown_202D5F0
-_0800B5CC: .4byte 0x04000006
-_0800B5D0: .4byte 0x04000200
-_0800B5D4: .4byte gUnknown_80B9C00
-_0800B5D8: .4byte 0x0400010c
-_0800B5DC: .4byte 0x00002045
-_0800B5E0: .4byte 0x04000004
-_0800B5E4: .4byte gUnknown_203B0AE
-_0800B5E8: .4byte gUnknown_203B0AC
-_0800B5EC: .4byte gInterruptsEnabled
-	thumb_func_end sub_800B540
-
-
-	.align 2, 0 @ Don't pad with nop.
diff --git a/asm/code_800B5F0.s b/asm/code_800B5F0.s
index cb44c31..b30e371 100644
--- a/asm/code_800B5F0.s
+++ b/asm/code_800B5F0.s
@@ -651,126 +651,4 @@ _0800BC08: .4byte 0x00008304
 _0800BC0C: .4byte 0x04000208
 	thumb_func_end sub_800BB44
 
-	thumb_func_start nullsub_17
-nullsub_17:
-	bx lr
-	thumb_func_end nullsub_17
-
-	thumb_func_start UpdateBGControlRegisters
-UpdateBGControlRegisters:
-	push {r4,lr}
-	sub sp, 0x10
-	ldr r0, _0800BC2C
-	ldrb r0, [r0]
-	cmp r0, 0x1
-	bne _0800BC30
-	str r0, [sp]
-	movs r0, 0x2
-	str r0, [sp, 0x4]
-	movs r0, 0
-	b _0800BC3A
-	.align 2, 0
-_0800BC2C: .4byte gUnknown_202D7FE
-_0800BC30:
-	movs r0, 0
-	str r0, [sp]
-	movs r0, 0x1
-	str r0, [sp, 0x4]
-	movs r0, 0x2
-_0800BC3A:
-	str r0, [sp, 0x8]
-	movs r0, 0x3
-	str r0, [sp, 0xC]
-	ldr r1, _0800BCA8
-	ldr r2, _0800BCAC
-	ldrh r0, [r2, 0x4]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldrh r0, [r2, 0x6]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldr r2, _0800BCB0
-	ldrh r0, [r2, 0x4]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldrh r0, [r2, 0x6]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldr r3, _0800BCB4
-	ldrh r0, [r3, 0x4]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldrh r0, [r3, 0x6]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldr r2, _0800BCB8
-	ldrh r0, [r2, 0x4]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldrh r0, [r2, 0x6]
-	strh r0, [r1]
-	ldr r2, _0800BCBC
-	ldr r0, [sp]
-	movs r4, 0xB0
-	lsls r4, 6
-	adds r1, r4, 0
-	orrs r0, r1
-	strh r0, [r2]
-	adds r2, 0x2
-	ldr r0, [sp, 0x4]
-	movs r4, 0xB4
-	lsls r4, 6
-	adds r1, r4, 0
-	orrs r0, r1
-	strh r0, [r2]
-	ldrh r1, [r3, 0x2]
-	movs r0, 0x80
-	lsls r0, 8
-	cmp r1, r0
-	bne _0800BCC8
-	ldr r0, _0800BCC0
-	ldr r1, [sp, 0x8]
-	ldr r3, _0800BCC4
-	adds r2, r3, 0
-	b _0800BCD2
-	.align 2, 0
-_0800BCA8: .4byte 0x04000010
-_0800BCAC: .4byte gUnknown_202D698
-_0800BCB0: .4byte gUnknown_202D6A0
-_0800BCB4: .4byte gUnknown_202D6A8
-_0800BCB8: .4byte gUnknown_202D6B0
-_0800BCBC: .4byte 0x04000008
-_0800BCC0: .4byte 0x0400000c
-_0800BCC4: .4byte 0x00002e08
-_0800BCC8:
-	ldr r0, _0800BCF4
-	ldr r1, [sp, 0x8]
-	movs r4, 0xB8
-	lsls r4, 6
-	adds r2, r4, 0
-_0800BCD2:
-	orrs r1, r2
-	strh r1, [r0]
-	ldr r2, _0800BCF8
-	ldr r0, [sp, 0xC]
-	ldr r3, _0800BCFC
-	adds r1, r3, 0
-	orrs r0, r1
-	strh r0, [r2]
-	ldr r1, _0800BD00
-	ldr r0, _0800BD04
-	ldrh r0, [r0]
-	strh r0, [r1]
-	add sp, 0x10
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_0800BCF4: .4byte 0x0400000c
-_0800BCF8: .4byte 0x0400000e
-_0800BCFC: .4byte 0x00002f08
-_0800BD00: .4byte 0x04000050
-_0800BD04: .4byte gUnknown_202D7FC
-	thumb_func_end UpdateBGControlRegisters
-
 	.align 2, 0 @ Don't pad with nop.
diff --git a/asm/code_800C9CC.s b/asm/code_800C9CC.s
deleted file mode 100644
index 8f34a57..0000000
--- a/asm/code_800C9CC.s
+++ /dev/null
@@ -1,249 +0,0 @@
-	.include "constants/gba_constants.inc"
-	.include "asm/macros.inc"
-
-	.syntax unified
-
-	.text	
-
-	thumb_func_start sub_800CD64
-sub_800CD64:
-	ldr r2, _0800CD7C
-	strb r1, [r2]
-	ldr r2, _0800CD80
-	negs r1, r0
-	orrs r1, r0
-	asrs r1, 31
-	movs r3, 0x80
-	lsls r3, 8
-	adds r0, r3, 0
-	ands r1, r0
-	strh r1, [r2, 0x2]
-	bx lr
-	.align 2, 0
-_0800CD7C: .4byte gUnknown_202D7FE
-_0800CD80: .4byte gUnknown_202D6A8
-	thumb_func_end sub_800CD64
-
-	thumb_func_start SetBGOBJEnableFlags
-SetBGOBJEnableFlags:
-	push {r4,lr}
-	movs r3, 0x80
-	lsls r3, 19
-	ldrh r1, [r3]
-	ldr r2, _0800CDA4
-	ands r2, r1
-	lsls r0, 8
-	movs r4, 0xF8
-	lsls r4, 5
-	adds r1, r4, 0
-	bics r1, r0
-	orrs r2, r1
-	strh r2, [r3]
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_0800CDA4: .4byte 0x0000e0ff
-	thumb_func_end SetBGOBJEnableFlags
-
-	thumb_func_start sub_800CDA8
-sub_800CDA8:
-	ldr r1, _0800CDBC
-	str r0, [r1]
-	ldr r2, _0800CDC0
-	ldr r1, _0800CDC4
-	lsls r0, 1
-	adds r0, r1
-	ldrh r0, [r0]
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_0800CDBC: .4byte gUnknown_202D800
-_0800CDC0: .4byte gUnknown_202D7FC
-_0800CDC4: .4byte gUnknown_203B0BE
-	thumb_func_end sub_800CDA8
-
-	thumb_func_start sub_800CDC8
-sub_800CDC8:
-	ldr r0, _0800CDD0
-	ldr r0, [r0]
-	bx lr
-	.align 2, 0
-_0800CDD0: .4byte gUnknown_202D800
-	thumb_func_end sub_800CDC8
-
-	thumb_func_start SetWindowTitle
-SetWindowTitle:
-	bx lr
-	thumb_func_end SetWindowTitle
-
-	thumb_func_start nullsub_23
-nullsub_23:
-	bx lr
-	thumb_func_end nullsub_23
-
-	thumb_func_start nullsub_182
-nullsub_182:
-	bx lr
-	thumb_func_end nullsub_182
-
-	thumb_func_start sub_800CDE0
-sub_800CDE0:
-	movs r0, 0x1
-	bx lr
-	thumb_func_end sub_800CDE0
-
-	thumb_func_start CpuCopy
-CpuCopy:
-	push {lr}
-	adds r3, r0, 0
-	cmp r2, 0
-	bge _0800CDEE
-	adds r2, 0x3
-_0800CDEE:
-	lsls r2, 9
-	lsrs r2, 11
-	movs r0, 0x80
-	lsls r0, 19
-	orrs r2, r0
-	adds r0, r1, 0
-	adds r1, r3, 0
-	bl CpuSet
-	pop {r0}
-	bx r0
-	thumb_func_end CpuCopy
-
-	thumb_func_start CpuClear
-CpuClear:
-	push {lr}
-	sub sp, 0x4
-	adds r3, r0, 0
-	movs r0, 0
-	str r0, [sp]
-	cmp r1, 0
-	bge _0800CE14
-	adds r1, 0x3
-_0800CE14:
-	lsls r2, r1, 9
-	lsrs r2, 11
-	movs r0, 0xA0
-	lsls r0, 19
-	orrs r2, r0
-	mov r0, sp
-	adds r1, r3, 0
-	bl CpuSet
-	add sp, 0x4
-	pop {r0}
-	bx r0
-	thumb_func_end CpuClear
-
-	thumb_func_start CpuFill
-CpuFill:
-	push {lr}
-	sub sp, 0x4
-	adds r3, r0, 0
-	str r1, [sp]
-	cmp r2, 0
-	bge _0800CE3A
-	adds r2, 0x3
-_0800CE3A:
-	lsls r2, 9
-	lsrs r2, 11
-	movs r0, 0xA0
-	lsls r0, 19
-	orrs r2, r0
-	mov r0, sp
-	adds r1, r3, 0
-	bl CpuSet
-	add sp, 0x4
-	pop {r0}
-	bx r0
-	thumb_func_end CpuFill
-
-	thumb_func_start sub_800CE54
-sub_800CE54:
-	push {lr}
-	ldr r2, _0800CEC0
-	ldrh r0, [r2]
-	movs r3, 0x80
-	lsls r3, 8
-	adds r1, r3, 0
-	orrs r0, r1
-	ldr r1, _0800CEC4
-	ands r0, r1
-	strh r0, [r2]
-	mov r8, r8
-	mov r8, r8
-	mov r8, r8
-	mov r8, r8
-	ldr r1, _0800CEC8
-	ands r0, r1
-	strh r0, [r2]
-	ldr r1, _0800CECC
-	ldr r2, _0800CED0
-	adds r0, r2, 0
-	strh r0, [r1]
-	adds r1, 0x2
-	movs r0, 0x3D
-	strh r0, [r1]
-	adds r1, 0x6
-	ldr r0, _0800CED4
-	ldrh r0, [r0]
-	strh r0, [r1]
-	adds r1, 0x2
-	ldr r0, _0800CED8
-	ldrh r0, [r0]
-	strh r0, [r1]
-	ldr r0, _0800CEDC
-	ldrb r1, [r0]
-	cmp r1, 0
-	beq _0800CEF4
-	ldr r1, _0800CEE0
-	ldr r0, _0800CEE4
-	ldr r2, [r0]
-	adds r0, r2, 0x4
-	str r0, [r1]
-	ldr r3, _0800CEE8
-	str r3, [r1, 0x4]
-	ldr r0, _0800CEEC
-	str r0, [r1, 0x8]
-	ldr r0, [r1, 0x8]
-	ldrh r0, [r2]
-	strh r0, [r3]
-	subs r1, 0x6E
-	ldrh r0, [r2, 0x2]
-	strh r0, [r1]
-	ldr r0, _0800CEF0
-	movs r1, 0xA0
-	b _0800CEFE
-	.align 2, 0
-_0800CEC0: .4byte 0x040000ba
-_0800CEC4: .4byte 0x0000cdff
-_0800CEC8: .4byte 0x00007fff
-_0800CECC: .4byte 0x04000048
-_0800CED0: .4byte 0x00003f3f
-_0800CED4: .4byte gUnknown_202D7FC
-_0800CED8: .4byte gUnknown_202D7FA
-_0800CEDC: .4byte gUnknown_2026E38
-_0800CEE0: .4byte 0x040000b0
-_0800CEE4: .4byte gUnknown_2026E3C
-_0800CEE8: .4byte 0x04000040
-_0800CEEC: .4byte 0xa2600002
-_0800CEF0: .4byte 0x04000044
-_0800CEF4:
-	ldr r0, _0800CF08
-	strh r1, [r0]
-	adds r0, 0x2
-	strh r1, [r0]
-	adds r0, 0x2
-_0800CEFE:
-	strh r1, [r0]
-	adds r0, 0x2
-	strh r1, [r0]
-	pop {r0}
-	bx r0
-	.align 2, 0
-_0800CF08: .4byte 0x04000040
-	thumb_func_end sub_800CE54
-
-        .align 2,0
diff --git a/asm/code_800D090.s b/asm/code_800D090.s
index a77aeab..3fd539a 100644
--- a/asm/code_800D090.s
+++ b/asm/code_800D090.s
@@ -7522,7 +7522,7 @@ sub_8010960:
 	adds r1, r5
 	movs r2, 0
 	ldrsh r1, [r1, r2]
-	bl sub_800CCA0
+	bl SetBG2RegOffsets
 	ldr r1, [r6]
 	adds r4, r1, r4
 	movs r2, 0
@@ -7530,7 +7530,7 @@ sub_8010960:
 	adds r1, r5
 	movs r2, 0
 	ldrsh r1, [r1, r2]
-	bl sub_800CCAC
+	bl SetBG3RegOffsets
 	movs r0, 0x1
 	bl sub_8010A88
 	bl sub_8010A00
@@ -9139,7 +9139,7 @@ sub_801169C:
 	adds r1, r6
 	movs r3, 0
 	ldrsh r1, [r1, r3]
-	bl sub_800CCA0
+	bl SetBG2RegOffsets
 	ldr r1, [r5]
 	adds r4, r1, r4
 	movs r2, 0
@@ -9147,7 +9147,7 @@ sub_801169C:
 	adds r1, r6
 	movs r3, 0
 	ldrsh r1, [r1, r3]
-	bl sub_800CCAC
+	bl SetBG3RegOffsets
 	bl sub_8010F28
 	bl sub_80111C4
 	lsls r0, 24
diff --git a/asm/code_803D110.s b/asm/code_803D110.s
index 55aaf57..f5f9425 100644
--- a/asm/code_803D110.s
+++ b/asm/code_803D110.s
@@ -2567,7 +2567,7 @@ sub_803E490:
 	adds r1, r4
 	movs r2, 0
 	ldrsh r1, [r1, r2]
-	bl sub_800CCA0
+	bl SetBG2RegOffsets
 	b _0803E4FC
 	.align 2, 0
 _0803E4D8: .4byte gUnknown_202EDD4
@@ -2582,7 +2582,7 @@ _0803E4EC:
 	strb r0, [r1]
 	movs r0, 0
 	movs r1, 0
-	bl sub_800CCA0
+	bl SetBG2RegOffsets
 _0803E4FC:
 	ldr r4, _0803E62C
 	ldr r2, [r4]
@@ -2598,7 +2598,7 @@ _0803E4FC:
 	adds r2, r3
 	ldr r2, [r2]
 	subs r1, r2
-	bl sub_800CCAC
+	bl SetBG3RegOffsets
 	bl sub_806CC10
 	bl sub_804522C
 	bl sub_803F9CC
diff --git a/asm/code_80A26CC.s b/asm/code_80A26CC.s
index ebc16bc..20676d2 100644
--- a/asm/code_80A26CC.s
+++ b/asm/code_80A26CC.s
@@ -4386,12 +4386,12 @@ _080A4998: .4byte 0x00000536
 _080A499C:
 	ldr r0, [r4, 0x48]
 	ldr r1, [r4, 0x4C]
-	bl sub_800CCA0
+	bl SetBG2RegOffsets
 	b _080A49AE
 _080A49A6:
 	ldr r0, [r4, 0x48]
 	ldr r1, [r4, 0x4C]
-	bl sub_800CCAC
+	bl SetBG3RegOffsets
 _080A49AE:
 	adds r6, 0x1
 	adds r5, 0x1