summaryrefslogtreecommitdiff
path: root/src/code_800B5F0.c
blob: 35b52823d54a44c587f3c0e06b7d70a7a09b45b8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
#include "global.h"

extern bool8 gInterruptsEnabled;
extern u32 gIntrTable[];
extern u32 IntrMain;
extern u8 gUnknown_202D4B8;
extern u32 gUnknown_202D5F0[];

bool8 EnableInterrupts(void)
{
    if(gInterruptsEnabled == FALSE)
    {
        return FALSE;
    }

    if((REG_IME & 1) != 0)
    {
        return FALSE;
    }
    else
    {
        REG_IME = 1;
        return TRUE;
    }
}

bool8 DisableInterrupts(void)
{
    if(gInterruptsEnabled == 0)
    {
        return FALSE;
    }

    if((REG_IME & 1) == 0)
    {
        return FALSE;
    }
    else
    {
        REG_IME = 0;
        return TRUE;
    }

}

bool8 sub_800B650(void)
{
    if(gInterruptsEnabled == FALSE)
    {
        return FALSE;
    }

    if((REG_IME & 1) != 0)
    {
        return FALSE;
    }
    else
    {
        return TRUE;
    }
}

void SetInterruptFlag(u16 flag)
{
    if(gInterruptsEnabled == FALSE)
    {
        return;
    }

    REG_IME = 0;
    INTR_CHECK |= flag;
    REG_IME = 1;
}

void sub_800B6B0(const u32 *r0)
{
    CpuCopy32(r0, &gIntrTable, 0x18); // 0x18 = 0x6 * 4 (0x4f00 is 32 bits)
    CpuCopy32(&IntrMain, &gUnknown_202D4B8, 0x120); // 0x120 = 0x48 * 4 (0x4f00 is 32 bits)
    INTR_VECTOR = &gUnknown_202D4B8;
}

u32 *sub_800B6E8(u32 r0)
{
    return &gIntrTable[r0];
}

u32 sub_800B6F4(u32 r0, u32 r1)
{
    u32 temp;
    u32 interrupt_var;

    interrupt_var = DisableInterrupts();
    temp = gUnknown_202D5F0[r0];
    gUnknown_202D5F0[r0] = r1;
    if(interrupt_var != FALSE){
        EnableInterrupts();
    }
    return temp;
}