Add or subtract the carry flag from a 16-bit register

1 files changed, 92 insertions, 0 deletions

diff --git a/Optimizing-assembly-code.md b/Optimizing-assembly-code.md
index a2d3e98..b11fe35 100644
--- a/Optimizing-assembly-code.md
+++ b/Optimizing-assembly-code.md
@@ -38,6 +38,7 @@ WikiTI's advice fully applies here:
   - [Set a 16-bit register to `a` plus a constant](#set-a-16-bit-register-to-a-plus-a-constant)
   - [Set a 16-bit register to `a` \* 16](#set-a-16-bit-register-to-a--16)
   - [Increment or decrement a 16-bit register](#increment-or-decrement-a-16-bit-register)
+  - [Add or subtract the carry flag from a 16-bit register](#add-or-subtract-the-carry-flag-from-a-16-bit-register)
   - [Load from an address to `hl`](#load-from-an-address-to-hl)
   - [Exchange two 16-bit registers](#exchange-two-16-bit-registers)
   - [Load two constants into a register pair](#load-two-constants-into-a-register-pair)
@@ -1080,6 +1081,97 @@ If the low byte *definitely* won't overflow, then do:
 This is applicable, for instance, if you're reading a data table via `hl` one byte at a time, it has no more than 256 entries, and it's in its own `SECTION` which has been `ALIGN`ed to 8 bits. It's unlikely to apply to pokecrystal's existing systems.
 
 
+### Add or subtract the carry flag from a 16-bit register
+
+(The example uses `hl`, but `bc` or `de` would also work.)
+
+Don't do:
+
+```asm
+	; 8 bytes, 8 cycles
+	ld a, e
+	adc 0
+	ld e, a
+	ld a, d
+	adc 0
+	ld d, a
+```
+
+```asm
+	; 8 bytes, 8 cycles
+	ld a, e
+	sbc 0
+	ld e, a
+	ld a, d
+	sbc 0
+	ld d, a
+```
+
+And don't do:
+
+```asm
+	; 7 bytes, 7 cycles
+	ld a, e
+	adc 0
+	ld e, a
+	adc d
+	sub e
+	ld d, a
+```
+
+```asm
+	; 7 bytes, 7 cycles
+	ld a, e
+	sbc 0
+	ld e, a
+	sbc d
+	add e
+	ld d, a
+```
+
+(That would be applying the "[Set `a` to some value plus or minus carry](#set-a-to-some-value-plus-or-minus-carry)" optimization to part of the first way.)
+
+And don't do:
+
+```asm
+	; 7 bytes, 7 or 8 cycles
+	ld a, e
+	adc 0
+	ld e, a
+	jr nc, .no_carry_3
+	inc d
+.no_carry_3
+```
+
+```asm
+	; 7 bytes, 7 or 8 cycles
+	ld a, e
+	sbc 0
+	ld e, a
+	jr nc, .no_carry_3
+	dec d
+.no_carry_3
+```
+
+(That would be applying the "[Add or subtract the carry flag from a register besides `a`](#add-or-subtract-the-carry-flag-from-a-register-besides-a)" optimization to part of the first way.)
+
+But do:
+
+```asm
+	; 3 bytes, 4 or 5 cycles
+	jr nc, .no_carry
+	inc de
+.no_carry
+```
+
+```asm
+	; 3 bytes, 4 or 5 cycles
+	jr nc, .no_carry
+	dec de
+.no_carry
+```
+
+
 ### Load from an address to `hl`
 
 Don't do: