Merge branch 'master' into refactor-preprocessor

Conflicts:
	preprocessor.py

Also bump the extras submodule to a version of pokemontools with a
suitable version of the preprocessor. The changes from 'master' for
preprocessor.py have been inserted into pokemontools prior to the
submodule bump.

1 files changed, 81 insertions, 0 deletions

diff --git a/engine/lcd.asm b/engine/lcd.asm
new file mode 100644
index 000000000..9c86eaa5c
--- /dev/null
+++ b/engine/lcd.asm
@@ -0,0 +1,81 @@
+; LCD handling
+
+
+Function547: ; 547
+	ld a, [hLCDStatCustom]
+	cp rSCX & $ff
+	ret nz
+	ld c, a
+	ld a, [LYOverrides]
+	ld [$ff00+c], a
+	ret
+; 552
+
+
+LCD: ; 552
+	push af
+	ld a, [hLCDStatCustom]
+	and a
+	jr z, .done
+
+; At this point it's assumed we're in WRAM bank 5!
+	push bc
+	ld a, [rLY]
+	ld c, a
+	ld b, LYOverrides >> 8
+	ld a, [bc]
+	ld b, a
+	ld a, [hLCDStatCustom]
+	ld c, a
+	ld a, b
+	ld [$ff00+c], a
+	pop bc
+
+.done
+	pop af
+	reti
+; 568
+
+
+DisableLCD: ; 568
+; Turn the LCD off
+
+; Don't need to do anything if the LCD is already off
+	ld a, [rLCDC]
+	bit 7, a ; lcd enable
+	ret z
+
+	xor a
+	ld [rIF], a
+	ld a, [rIE]
+	ld b, a
+	
+; Disable VBlank
+	res 0, a ; vblank
+	ld [rIE], a
+
+.wait
+; Wait until VBlank would normally happen
+	ld a, [rLY]
+	cp 145
+	jr nz, .wait
+
+	ld a, [rLCDC]
+	and %01111111 ; lcd enable off
+	ld [rLCDC], a
+
+	xor a
+	ld [rIF], a
+	ld a, b
+	ld [rIE], a
+	ret
+; 58a
+
+
+EnableLCD: ; 58a
+	ld a, [rLCDC]
+	set 7, a ; lcd enable
+	ld [rLCDC], a
+	ret
+; 591
+