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| author | Rangi <35663410+Rangi42@users.noreply.github.com> | 2021-03-08 07:01:31 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-03-08 07:01:31 -0800 |
| commit | e791c5392b19f589c51afd98666d19e778278847 (patch) | |
| tree | 4392cbecdd5166484f3a8ec8799939434159bae3 /home/map.asm | |
| parent | fb35fe6aba5e4e4ce7edf5b345fdf2afec4b6b49 (diff) | |
| parent | 98da09b3e90b6a132ce6d2431999485593aef0c9 (diff) | |
Merge pull request #806 from Rangi42/tables
Verify data table sizes with table_width and assert_table_length macros
Diffstat (limited to 'home/map.asm')
| -rw-r--r-- | home/map.asm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/home/map.asm b/home/map.asm index 6e99237e0..29593add0 100644 --- a/home/map.asm +++ b/home/map.asm @@ -2285,12 +2285,12 @@ LoadMapTileset:: push bc ld hl, Tilesets - ld bc, wTilesetEnd - wTileset + ld bc, TILESET_LENGTH ld a, [wMapTileset] call AddNTimes ld de, wTilesetBank - ld bc, wTilesetEnd - wTileset + ld bc, TILESET_LENGTH ld a, BANK(Tilesets) call FarCopyBytes |