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| author | Thomas Winwood <twwinwood@gmail.com> | 2018-07-21 02:06:31 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-07-21 02:06:31 +0100 |
| commit | 23ef2f50a7b94c23b50e9e690a7482ac349c9ef3 (patch) | |
| tree | 63c20c67efbdf8334c6e273f78065b83135e3886 /home/sram.asm | |
| parent | 17a4d0540acc00e3f5ad260009115eb36e72b7d2 (diff) | |
| parent | 2d73d040d16a7836f935a7a6cb2a311aed2ca5a2 (diff) | |
Merge branch 'master' into the-diffening
Diffstat (limited to 'home/sram.asm')
| -rw-r--r-- | home/sram.asm | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/home/sram.asm b/home/sram.asm index 4cfe14cf9..1b1a4f318 100644 --- a/home/sram.asm +++ b/home/sram.asm @@ -1,12 +1,11 @@ -GetSRAMBank:: ; 2fcb +GetSRAMBank:: ; load sram bank a ; if invalid bank, sram is disabled cp NUM_SRAM_BANKS jr c, OpenSRAM jr CloseSRAM -; 2fd1 -OpenSRAM:: ; 2fd1 +OpenSRAM:: ; switch to sram bank a push af ; latch clock data @@ -19,9 +18,8 @@ OpenSRAM:: ; 2fd1 pop af ld [MBC3SRamBank], a ret -; 2fe1 -CloseSRAM:: ; 2fe1 +CloseSRAM:: push af ld a, SRAM_DISABLE ; reset clock latch for next time @@ -30,4 +28,3 @@ CloseSRAM:: ; 2fe1 ld [MBC3SRamEnable], a pop af ret -; 2fec |