diff options
author | red031000 <rubenru09@aol.com> | 2021-08-16 17:59:53 +0100 |
---|---|---|
committer | red031000 <rubenru09@aol.com> | 2021-08-16 17:59:53 +0100 |
commit | bdd8885a810c5027e729c6bba3b8a1e61ef9c6ca (patch) | |
tree | 46ef7f1638b81262eef437ec7cc6c3e56ae01ef7 | |
parent | 496ab2d25dd76329ef5bb95090291e237a56f474 (diff) |
m
-rw-r--r-- | arm9/arm9.lsf | 1 | ||||
-rw-r--r-- | arm9/modules/04/asm/arm_04.s | 244 | ||||
-rw-r--r-- | arm9/modules/04/asm/mod04_021DD36C.s | 248 |
3 files changed, 249 insertions, 244 deletions
diff --git a/arm9/arm9.lsf b/arm9/arm9.lsf index e8652298..fe408d4a 100644 --- a/arm9/arm9.lsf +++ b/arm9/arm9.lsf @@ -664,6 +664,7 @@ Overlay MODULE_04 Object mod04_021DB730.o Object mod04_021DC8A4.o Object mod04_021DCCC8.o + Object mod04_021DD36C.o Object arm_04.o } diff --git a/arm9/modules/04/asm/arm_04.s b/arm9/modules/04/asm/arm_04.s index 43c06600..9aa15f74 100644 --- a/arm9/modules/04/asm/arm_04.s +++ b/arm9/modules/04/asm/arm_04.s @@ -3,238 +3,6 @@ .section .text .balign 4, 0 - arm_func_start MOD04_021DD36C -MOD04_021DD36C: ; 0x021DD36C - stmdb sp!, {r4, r5, r6, r7, r8, lr} - sub sp, sp, #8 - ands r4, r1, #3 - addne sp, sp, #8 - mvnne r0, #0 - ldmneia sp!, {r4, r5, r6, r7, r8, pc} - mov r6, #0 - mov r5, r6 - cmp r1, #0 - bls _021DD3AC -_021DD394: - ldrsb r4, [r0, r5] - add r5, r5, #1 - cmp r4, #0x2a - addne r6, r6, #6 - cmp r5, r1 - blo _021DD394 -_021DD3AC: - cmp r2, #0 - moveq r0, r6, asr #2 - addeq r0, r6, r0, lsr #29 - addeq sp, sp, #8 - moveq r0, r0, asr #3 - ldmeqia sp!, {r4, r5, r6, r7, r8, pc} - mov r4, r6, asr #2 - add r4, r6, r4, lsr #29 - mov r4, r4, asr #3 - cmp r3, r4 - addlo sp, sp, #8 - mvnlo r0, #0 - ldmloia sp!, {r4, r5, r6, r7, r8, pc} - cmp r1, #0 - moveq r0, #0 - streqb r0, [r2] - addeq sp, sp, #8 - ldmeqia sp!, {r4, r5, r6, r7, r8, pc} - mov r6, r2 - add ip, sp, #0 - mov lr, #0 - mov r1, #0x3f - mov r3, #0x3e -_021DD408: - mov r8, lr - mov r5, ip -_021DD410: - ldrsb r7, [r0, r8] - cmp r7, #0x41 - blt _021DD42C - cmp r7, #0x5a - suble r7, r7, #0x41 - strleb r7, [r5] - ble _021DD474 -_021DD42C: - cmp r7, #0x61 - blt _021DD444 - cmp r7, #0x7a - suble r7, r7, #0x47 - strleb r7, [r5] - ble _021DD474 -_021DD444: - cmp r7, #0x30 - blt _021DD45C - cmp r7, #0x39 - addle r7, r7, #4 - strleb r7, [r5] - ble _021DD474 -_021DD45C: - cmp r7, #0x2e - streqb r3, [r5] - beq _021DD474 - cmp r7, #0x2d - streqb r1, [r5] - strneb lr, [r5] -_021DD474: - add r8, r8, #1 - cmp r8, #4 - add r5, r5, #1 - blt _021DD410 - ldrsb r8, [sp] - ldrsb r7, [sp, #1] - add r5, r6, #1 - mov r8, r8, lsl #2 - orr r7, r8, r7, asr #4 - sub r5, r5, r2 - strb r7, [r6] - cmp r5, r4 - add r0, r0, #4 - bge _021DD4F0 - ldrsb r8, [sp, #1] - ldrsb r7, [sp, #2] - add r5, r6, #2 - mov r8, r8, lsl #4 - orr r7, r8, r7, asr #2 - sub r5, r5, r2 - strb r7, [r6, #1] - cmp r5, r4 - bge _021DD4F0 - ldrsb r7, [sp, #2] - ldrsb r5, [sp, #3] - orr r5, r5, r7, lsl #6 - strb r5, [r6, #2] - add r6, r6, #3 - sub r5, r6, r2 - cmp r5, r4 - blt _021DD408 -_021DD4F0: - mov r0, r5 - add sp, sp, #8 - ldmia sp!, {r4, r5, r6, r7, r8, pc} - arm_func_end MOD04_021DD36C - - arm_func_start MOD04_021DD4FC -MOD04_021DD4FC: ; 0x021DD4FC - stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr} - sub sp, sp, #0xc - ldr r4, _021DD69C ; =0xAAAAAAAB - str r2, [sp] - umull r4, r5, r1, r4 - ldr r6, _021DD6A0 ; =0x00000003 - mov r5, r5, lsr #1 - umull r4, r5, r6, r5 - mov sl, r0 - subs r5, r1, r4 - movne r4, #4 - ldr r2, _021DD69C ; =0xAAAAAAAB - ldr r0, [sp] - moveq r4, #0 - cmp r0, #0 - umull r0, r2, r1, r2 - mov r2, r2, lsr #1 - addeq sp, sp, #0xc - add r0, r4, r2, lsl #2 - ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} - cmp r3, r0 - addlo sp, sp, #0xc - mvnlo r0, #0 - ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} - add r7, sl, r1 - ldr r6, [sp] - cmp sl, r7 - beq _021DD68C - mov r0, #1 - mov r5, #0 - str r0, [sp, #4] - mov fp, #3 - mov r4, #0x2a -_021DD580: - sub sb, r7, sl - ldr r1, _021DD6A4 ; =0x2AAAAAAB - mov r0, sb, lsl #3 - smull r2, r3, r1, r0 - ldr r1, _021DD6A8 ; =0x00000006 - add r3, r3, r0, lsr #31 - smull r2, r3, r1, r3 - subs r3, r0, r2 - ldr r1, _021DD6A4 ; =0x2AAAAAAB - ldrne r8, [sp, #4] - smull r2, r3, r1, r0 - moveq r8, r5 - add r3, r3, r0, lsr #31 - cmp sb, #3 - movge sb, fp - add r0, sp, #8 - mov r1, r5 - mov r2, fp - add r8, r3, r8 - bl MI_CpuFill8 - mov r0, sl - add r1, sp, #8 - mov r2, sb - bl MI_CpuCopy8 - ldr r0, _021DD6AC ; =UNK04_0220C638 - cmp r8, #2 - ldr r1, [r0] - ldrb r0, [sp, #8] - mov r0, r0, asr #2 - ldrsb r0, [r1, r0] - strb r0, [r6] - strltb r4, [r6, #1] - blt _021DD628 - ldrb r2, [sp, #8] - ldr r0, _021DD6AC ; =UNK04_0220C638 - ldrb r1, [sp, #9] - mov r2, r2, lsl #4 - and r2, r2, #0x3f - ldr r0, [r0] - orr r1, r2, r1, asr #4 - ldrsb r0, [r0, r1] - strb r0, [r6, #1] -_021DD628: - cmp r8, #3 - strltb r4, [r6, #2] - blt _021DD658 - ldrb r2, [sp, #9] - ldr r0, _021DD6AC ; =UNK04_0220C638 - ldrb r1, [sp, #0xa] - mov r2, r2, lsl #2 - and r2, r2, #0x3f - ldr r0, [r0] - orr r1, r2, r1, asr #6 - ldrsb r0, [r0, r1] - strb r0, [r6, #2] -_021DD658: - cmp r8, #4 - strltb r4, [r6, #3] - blt _021DD67C - ldr r0, _021DD6AC ; =UNK04_0220C638 - ldrb r1, [sp, #0xa] - ldr r2, [r0] - and r0, r1, #0x3f - ldrsb r0, [r2, r0] - strb r0, [r6, #3] -_021DD67C: - add sl, sl, sb - cmp sl, r7 - add r6, r6, #4 - bne _021DD580 -_021DD68C: - ldr r0, [sp] - sub r0, r6, r0 - add sp, sp, #0xc - ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} - .align 2, 0 -_021DD69C: .word 0xAAAAAAAB -_021DD6A0: .word 0x00000003 -_021DD6A4: .word 0x2AAAAAAB -_021DD6A8: .word 0x00000006 -_021DD6AC: .word UNK04_0220C638 - arm_func_end MOD04_021DD4FC - arm_func_start MOD04_021DD6B0 MOD04_021DD6B0: ; 0x021DD6B0 ldr r3, _021DD6CC ; =UNK04_02210508 @@ -55189,18 +54957,6 @@ UNK04_0220BE70: ; 0x0220BE70 .section .data - .global UNK_0220C638 -UNK04_0220C638: ; 0x0220C638 - .word UNK04_0220C63C - - .global UNK_0220C63C -UNK04_0220C63C: ; 0x0220C63C - .byte 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C - .byte 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x61, 0x62 - .byte 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72 - .byte 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37 - .byte 0x38, 0x39, 0x2E, 0x2D, 0x00, 0x00, 0x00, 0x00 - .global UNK_0220C680 UNK04_0220C680: ; 0x0220C680 .byte 0x01, 0x00, 0x01, 0x00 diff --git a/arm9/modules/04/asm/mod04_021DD36C.s b/arm9/modules/04/asm/mod04_021DD36C.s new file mode 100644 index 00000000..19966827 --- /dev/null +++ b/arm9/modules/04/asm/mod04_021DD36C.s @@ -0,0 +1,248 @@ + .include "asm/macros.inc" + .include "global.inc" + .section .text + .balign 4, 0 + + arm_func_start MOD04_021DD36C +MOD04_021DD36C: ; 0x021DD36C + stmdb sp!, {r4, r5, r6, r7, r8, lr} + sub sp, sp, #8 + ands r4, r1, #3 + addne sp, sp, #8 + mvnne r0, #0 + ldmneia sp!, {r4, r5, r6, r7, r8, pc} + mov r6, #0 + mov r5, r6 + cmp r1, #0 + bls _021DD3AC +_021DD394: + ldrsb r4, [r0, r5] + add r5, r5, #1 + cmp r4, #0x2a + addne r6, r6, #6 + cmp r5, r1 + blo _021DD394 +_021DD3AC: + cmp r2, #0 + moveq r0, r6, asr #2 + addeq r0, r6, r0, lsr #29 + addeq sp, sp, #8 + moveq r0, r0, asr #3 + ldmeqia sp!, {r4, r5, r6, r7, r8, pc} + mov r4, r6, asr #2 + add r4, r6, r4, lsr #29 + mov r4, r4, asr #3 + cmp r3, r4 + addlo sp, sp, #8 + mvnlo r0, #0 + ldmloia sp!, {r4, r5, r6, r7, r8, pc} + cmp r1, #0 + moveq r0, #0 + streqb r0, [r2] + addeq sp, sp, #8 + ldmeqia sp!, {r4, r5, r6, r7, r8, pc} + mov r6, r2 + add ip, sp, #0 + mov lr, #0 + mov r1, #0x3f + mov r3, #0x3e +_021DD408: + mov r8, lr + mov r5, ip +_021DD410: + ldrsb r7, [r0, r8] + cmp r7, #0x41 + blt _021DD42C + cmp r7, #0x5a + suble r7, r7, #0x41 + strleb r7, [r5] + ble _021DD474 +_021DD42C: + cmp r7, #0x61 + blt _021DD444 + cmp r7, #0x7a + suble r7, r7, #0x47 + strleb r7, [r5] + ble _021DD474 +_021DD444: + cmp r7, #0x30 + blt _021DD45C + cmp r7, #0x39 + addle r7, r7, #4 + strleb r7, [r5] + ble _021DD474 +_021DD45C: + cmp r7, #0x2e + streqb r3, [r5] + beq _021DD474 + cmp r7, #0x2d + streqb r1, [r5] + strneb lr, [r5] +_021DD474: + add r8, r8, #1 + cmp r8, #4 + add r5, r5, #1 + blt _021DD410 + ldrsb r8, [sp] + ldrsb r7, [sp, #1] + add r5, r6, #1 + mov r8, r8, lsl #2 + orr r7, r8, r7, asr #4 + sub r5, r5, r2 + strb r7, [r6] + cmp r5, r4 + add r0, r0, #4 + bge _021DD4F0 + ldrsb r8, [sp, #1] + ldrsb r7, [sp, #2] + add r5, r6, #2 + mov r8, r8, lsl #4 + orr r7, r8, r7, asr #2 + sub r5, r5, r2 + strb r7, [r6, #1] + cmp r5, r4 + bge _021DD4F0 + ldrsb r7, [sp, #2] + ldrsb r5, [sp, #3] + orr r5, r5, r7, lsl #6 + strb r5, [r6, #2] + add r6, r6, #3 + sub r5, r6, r2 + cmp r5, r4 + blt _021DD408 +_021DD4F0: + mov r0, r5 + add sp, sp, #8 + ldmia sp!, {r4, r5, r6, r7, r8, pc} + arm_func_end MOD04_021DD36C + + arm_func_start MOD04_021DD4FC +MOD04_021DD4FC: ; 0x021DD4FC + stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr} + sub sp, sp, #0xc + ldr r4, _021DD69C ; =0xAAAAAAAB + str r2, [sp] + umull r4, r5, r1, r4 + ldr r6, _021DD6A0 ; =0x00000003 + mov r5, r5, lsr #1 + umull r4, r5, r6, r5 + mov sl, r0 + subs r5, r1, r4 + movne r4, #4 + ldr r2, _021DD69C ; =0xAAAAAAAB + ldr r0, [sp] + moveq r4, #0 + cmp r0, #0 + umull r0, r2, r1, r2 + mov r2, r2, lsr #1 + addeq sp, sp, #0xc + add r0, r4, r2, lsl #2 + ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} + cmp r3, r0 + addlo sp, sp, #0xc + mvnlo r0, #0 + ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} + add r7, sl, r1 + ldr r6, [sp] + cmp sl, r7 + beq _021DD68C + mov r0, #1 + mov r5, #0 + str r0, [sp, #4] + mov fp, #3 + mov r4, #0x2a +_021DD580: + sub sb, r7, sl + ldr r1, _021DD6A4 ; =0x2AAAAAAB + mov r0, sb, lsl #3 + smull r2, r3, r1, r0 + ldr r1, _021DD6A8 ; =0x00000006 + add r3, r3, r0, lsr #31 + smull r2, r3, r1, r3 + subs r3, r0, r2 + ldr r1, _021DD6A4 ; =0x2AAAAAAB + ldrne r8, [sp, #4] + smull r2, r3, r1, r0 + moveq r8, r5 + add r3, r3, r0, lsr #31 + cmp sb, #3 + movge sb, fp + add r0, sp, #8 + mov r1, r5 + mov r2, fp + add r8, r3, r8 + bl MI_CpuFill8 + mov r0, sl + add r1, sp, #8 + mov r2, sb + bl MI_CpuCopy8 + ldr r0, _021DD6AC ; =UNK04_0220C638 + cmp r8, #2 + ldr r1, [r0] + ldrb r0, [sp, #8] + mov r0, r0, asr #2 + ldrsb r0, [r1, r0] + strb r0, [r6] + strltb r4, [r6, #1] + blt _021DD628 + ldrb r2, [sp, #8] + ldr r0, _021DD6AC ; =UNK04_0220C638 + ldrb r1, [sp, #9] + mov r2, r2, lsl #4 + and r2, r2, #0x3f + ldr r0, [r0] + orr r1, r2, r1, asr #4 + ldrsb r0, [r0, r1] + strb r0, [r6, #1] +_021DD628: + cmp r8, #3 + strltb r4, [r6, #2] + blt _021DD658 + ldrb r2, [sp, #9] + ldr r0, _021DD6AC ; =UNK04_0220C638 + ldrb r1, [sp, #0xa] + mov r2, r2, lsl #2 + and r2, r2, #0x3f + ldr r0, [r0] + orr r1, r2, r1, asr #6 + ldrsb r0, [r0, r1] + strb r0, [r6, #2] +_021DD658: + cmp r8, #4 + strltb r4, [r6, #3] + blt _021DD67C + ldr r0, _021DD6AC ; =UNK04_0220C638 + ldrb r1, [sp, #0xa] + ldr r2, [r0] + and r0, r1, #0x3f + ldrsb r0, [r2, r0] + strb r0, [r6, #3] +_021DD67C: + add sl, sl, sb + cmp sl, r7 + add r6, r6, #4 + bne _021DD580 +_021DD68C: + ldr r0, [sp] + sub r0, r6, r0 + add sp, sp, #0xc + ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc} + .align 2, 0 +_021DD69C: .word 0xAAAAAAAB +_021DD6A0: .word 0x00000003 +_021DD6A4: .word 0x2AAAAAAB +_021DD6A8: .word 0x00000006 +_021DD6AC: .word UNK04_0220C638 + arm_func_end MOD04_021DD4FC + + .section .data + + .global UNK04_0220C638 +UNK04_0220C638: ; 0x0220C638 + .word UNK04_0220C63C + + .global UNK04_0220C63C +UNK04_0220C63C: ; 0x0220C63C + .asciz "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789.-" + + .balign 4, 0 |