split valarm and decomp system

4 files changed, 158 insertions, 3 deletions

diff --git a/arm7/lib/include/OS_init.h b/arm7/lib/include/OS_init.h
index 5b3dfcc1..1416fe8c 100644
--- a/arm7/lib/include/OS_init.h
+++ b/arm7/lib/include/OS_init.h
@@ -1,6 +1,9 @@
-#ifndef POKEDIAMOND_OS_INIT_H
-#define POKEDIAMOND_OS_INIT_H
+#ifndef POKEDIAMOND_ARM7_OS_INIT_H
+#define POKEDIAMOND_ARM7_OS_INIT_H
+
+#include "types.h"
+#include "OS_system.h"
 
 void OS_Init(void);
 
-#endif //POKEDIAMOND_OS_INIT_H
+#endif //POKEDIAMOND_ARM7_OS_INIT_H
diff --git a/arm7/lib/include/OS_system.h b/arm7/lib/include/OS_system.h
new file mode 100644
index 00000000..b6c81ab4
--- /dev/null
+++ b/arm7/lib/include/OS_system.h
@@ -0,0 +1,37 @@
+#ifndef POKEDIAMOND_ARM7_OS_SYSTEM_H
+#define POKEDIAMOND_ARM7_OS_SYSTEM_H
+
+#include "types.h"
+
+//todo consts.h
+#define HW_PSR_CPU_MODE_MASK       0x1f // CPU mode
+
+#define HW_PSR_DISABLE_FIQ         0x40 // Disable FIQ
+#define HW_PSR_DISABLE_IRQ         0x80 // Disable IRQ
+#define HW_PSR_DISABLE_IRQ_FIQ     0xc0 // Disable FIQ and IRQ
+
+typedef enum {
+    OS_PROCMODE_USER=16,
+    OS_PROCMODE_FIQ=17,
+    OS_PROCMODE_IRQ=18,
+    OS_PROCMODE_SVC=19,
+    OS_PROCMODE_ABORT=23,
+    OS_PROCMODE_UNDEF=27,
+    OS_PROCMODE_SYS=31
+} OSProcMode;
+
+typedef enum {
+    OS_INTRMODE_DISABLE_IRQ = HW_PSR_DISABLE_IRQ,
+    OS_INTRMODE_DISABLE_FIQ = HW_PSR_DISABLE_FIQ,
+    OS_INTRMODE_ENABLE = 0
+} OSIntrMode;
+
+OSIntrMode OS_EnableInterrupts(void);
+OSIntrMode OS_DisableInterrupts(void);
+OSIntrMode OS_RestoreInterrupts(register OSIntrMode state);
+OSIntrMode OS_DisableInterrupts_IrqAndFiq(void);
+OSIntrMode OS_RestoreInterrupts_IrqAndFiq(register OSIntrMode state);
+OSProcMode OS_GetProcMode(void);
+void OS_SpinWait(u32 cycle);
+
+#endif //POKEDIAMOND_ARM7_OS_SYSTEM_H
diff --git a/arm7/lib/include/types.h b/arm7/lib/include/types.h
new file mode 100644
index 00000000..3a497c56
--- /dev/null
+++ b/arm7/lib/include/types.h
@@ -0,0 +1,50 @@
+#ifndef POKEDIAMOND_ARM7_TYPES_H
+#define POKEDIAMOND_ARM7_TYPES_H
+
+typedef unsigned char u8;
+typedef unsigned short int u16;
+typedef unsigned long u32;
+
+typedef signed char s8;
+typedef signed short int s16;
+typedef signed long s32;
+
+typedef unsigned long long int u64;
+typedef signed long long int s64;
+
+typedef volatile u8 vu8;
+typedef volatile u16 vu16;
+typedef volatile u32 vu32;
+typedef volatile u64 vu64;
+
+typedef volatile s8 vs8;
+typedef volatile s16 vs16;
+typedef volatile s32 vs32;
+typedef volatile s64 vs64;
+
+typedef float f32;
+typedef volatile f32 vf32;
+
+typedef u8 REGType8;
+typedef u16 REGType16;
+typedef u32 REGType32;
+typedef u64 REGType64;
+
+typedef vu8 REGType8v;
+typedef vu16 REGType16v;
+typedef vu32 REGType32v;
+typedef vu64 REGType64v;
+
+typedef int BOOL;
+#define TRUE 1
+#define FALSE 0
+
+#ifndef NULL
+#ifdef  __cplusplus
+#define NULL 0
+#else  // __cplusplus
+#define NULL ((void *)0)
+#endif // __cplusplus
+#endif
+
+#endif //POKEDIAMOND_NITRO_TYPES_H
diff --git a/arm7/lib/src/OS_system.c b/arm7/lib/src/OS_system.c
new file mode 100644
index 00000000..120eddbf
--- /dev/null
+++ b/arm7/lib/src/OS_system.c
@@ -0,0 +1,65 @@
+#include "function_target.h"
+#include "OS_system.h"
+
+#pragma optimize_for_size on
+
+extern void FUN_037F8CB4(s32 count);
+
+ARM_FUNC asm OSIntrMode OS_EnableInterrupts(void)
+{
+    mrs	r0, CPSR
+    bic	r1, r0, #HW_PSR_DISABLE_IRQ
+    msr	CPSR_c, r1
+    and	r0, r0, #HW_PSR_DISABLE_IRQ
+    bx	lr
+}
+
+ARM_FUNC asm OSIntrMode OS_DisableInterrupts(void)
+{
+    mrs	r0, CPSR
+    orr	r1, r0, #HW_PSR_DISABLE_IRQ
+    msr	CPSR_c, r1
+    and	r0, r0, #HW_PSR_DISABLE_IRQ
+    bx	lr
+}
+
+ARM_FUNC asm OSIntrMode OS_RestoreInterrupts(register OSIntrMode state)
+{
+    mrs	r1, CPSR
+    bic	r2, r1, #HW_PSR_DISABLE_IRQ
+    orr	r2, r2, r0
+    msr	CPSR_c, r2
+    and	r0, r1, #HW_PSR_DISABLE_IRQ
+    bx	lr
+}
+
+ARM_FUNC asm OSIntrMode OS_DisableInterrupts_IrqAndFiq(void)
+{
+    mrs	r0, CPSR
+    orr	r1, r0, #HW_PSR_DISABLE_IRQ_FIQ
+    msr	CPSR_c, r1
+    and	r0, r0, #HW_PSR_DISABLE_IRQ_FIQ
+    bx	lr
+}
+
+ARM_FUNC asm OSIntrMode OS_RestoreInterrupts_IrqAndFiq(register OSIntrMode state)
+{
+    mrs	r1, CPSR
+    bic	r2, r1, #HW_PSR_DISABLE_IRQ_FIQ
+    orr	r2, r2, r0
+    msr	CPSR_c, r2
+    and	r0, r1, #HW_PSR_DISABLE_IRQ_FIQ
+    bx	lr
+}
+
+ARM_FUNC asm OSProcMode OS_GetProcMode(void)
+{
+    mrs	r0, CPSR
+    and	r0, r0, #HW_PSR_CPU_MODE_MASK
+    bx	lr
+}
+
+ARM_FUNC void OS_SpinWait(u32 cycle)
+{
+    FUN_037F8CB4((s32)cycle / 4);
+}