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author | Revo <projectrevotpp@hotmail.com> | 2021-07-22 20:46:10 -0400 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-07-22 20:46:10 -0400 |
commit | b5b9e57dcb55ee1a69ca86c30e90475bb80e3c28 (patch) | |
tree | 2e91e60bdb7a9174b16d8ca1b532809d4ae2e5b6 /arm9/lib/NitroSDK/src/OS_system.c | |
parent | c2d91a2d997afd01fa4f40e1e16d5ee85557c9a8 (diff) | |
parent | 5bf13c7f48fe91c7902ce50250bc1a5a2398a2ae (diff) |
Merge pull request #435 from red031000/master
separate out libs to libc, libnns and NitroSDK
Diffstat (limited to 'arm9/lib/NitroSDK/src/OS_system.c')
-rw-r--r-- | arm9/lib/NitroSDK/src/OS_system.c | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/arm9/lib/NitroSDK/src/OS_system.c b/arm9/lib/NitroSDK/src/OS_system.c new file mode 100644 index 00000000..f5f5faba --- /dev/null +++ b/arm9/lib/NitroSDK/src/OS_system.c @@ -0,0 +1,77 @@ +#include "OS_system.h" +#include "OS_irqHandler.h" +#include "syscall.h" + +ARM_FUNC asm OSIntrMode OS_EnableInterrupts(void) +{ + mrs r0, cpsr + bic r1, r0, #HW_PSR_DISABLE_IRQ + msr cpsr_c, r1 + and r0, r0, #HW_PSR_DISABLE_IRQ + bx lr +} + +ARM_FUNC asm OSIntrMode OS_DisableInterrupts(void) +{ + mrs r0, cpsr + orr r1, r0, #HW_PSR_DISABLE_IRQ + msr cpsr_c, r1 + and r0, r0, #HW_PSR_DISABLE_IRQ + bx lr +} + +ARM_FUNC asm OSIntrMode OS_RestoreInterrupts(OSIntrMode state) +{ + mrs r1, cpsr + bic r2, r1, #HW_PSR_DISABLE_IRQ + orr r2, r2, r0 + msr cpsr_c, r2 + and r0, r1, #HW_PSR_DISABLE_IRQ + bx lr +} + +ARM_FUNC asm OSIntrMode OS_DisableInterrupts_IrqAndFiq(void) +{ + mrs r0, cpsr + orr r1, r0, #HW_PSR_DISABLE_IRQ_FIQ + msr cpsr_c, r1 + and r0, r0, #HW_PSR_DISABLE_IRQ_FIQ + bx lr +} + +ARM_FUNC asm OSIntrMode OS_RestoreInterrupts_IrqAndFiq(OSIntrMode state) +{ + mrs r1, cpsr + bic r2, r1, #HW_PSR_DISABLE_IRQ_FIQ + orr r2, r2, r0 + msr cpsr_c, r2 + and r0, r1, #HW_PSR_DISABLE_IRQ_FIQ + bx lr +} + +ARM_FUNC asm OSIntrMode OS_GetCpsrIrq(void) +{ + mrs r0, cpsr + and r0, r0, #HW_PSR_DISABLE_IRQ + bx lr +} + +ARM_FUNC asm OSProcMode OS_GetProcMode(void) +{ + mrs r0, cpsr + and r0, r0, #HW_PSR_CPU_MODE_MASK + bx lr +} + +ARM_FUNC asm void OS_SpinWait(u32 cycles) +{ + subs r0, r0, #0x4 + bhs OS_SpinWait + bx lr +} + +ARM_FUNC void OS_WaitVBlankIntr(void) +{ + SVC_WaitByLoop(0x1); + OS_WaitIrq(TRUE, OS_IE_V_BLANK); +} |