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authorred031000 <rubenru09@aol.com>2020-05-24 20:59:13 +0100
committerred031000 <rubenru09@aol.com>2020-05-24 20:59:13 +0100
commit7fc5b85153fd60c9115ce36c6210a253abb4ae50 (patch)
treedbeb6d38d265af7535329aca3f34b6ddc1c5cd64 /arm9/lib/src
parentcf80ce7a82b3193261a76caeefd009ca5e862ac5 (diff)
fix more warnings
Diffstat (limited to 'arm9/lib/src')
-rw-r--r--arm9/lib/src/FX_vec.c54
1 files changed, 27 insertions, 27 deletions
diff --git a/arm9/lib/src/FX_vec.c b/arm9/lib/src/FX_vec.c
index 95805f33..891b980a 100644
--- a/arm9/lib/src/FX_vec.c
+++ b/arm9/lib/src/FX_vec.c
@@ -15,13 +15,13 @@ ARM_FUNC void VEC_Subtract(struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *ds
}
ARM_FUNC void VEC_Fx16Add(struct Vecx16 *a, struct Vecx16 *b, struct Vecx16 *dst){
- dst->x = a->x + b->x;
- dst->y = a->y + b->y;
- dst->z = a->z + b->z;
+ dst->x = (s16)(a->x + b->x);
+ dst->y = (s16)(a->y + b->y);
+ dst->z = (s16)(a->z + b->z);
}
ARM_FUNC fx32 VEC_DotProduct(struct Vecx32 *a, struct Vecx32 *b){
- return ((fx64)a->x * b->x + (fx64)a->y * b->y + (fx64)a->z * b->z + (1 << (FX64_INT_SHIFT - 1))) >> FX64_INT_SHIFT;
+ return (fx32)(((fx64)a->x * b->x + (fx64)a->y * b->y + (fx64)a->z * b->z + (1 << (FX64_INT_SHIFT - 1))) >> FX64_INT_SHIFT);
}
ARM_FUNC fx32 VEC_Fx16DotProduct(struct Vecx16 *a, struct Vecx16 *b){
@@ -46,9 +46,9 @@ ARM_FUNC void VEC_Fx16CrossProduct(struct Vecx16 *a, struct Vecx16 *b, struct Ve
x = ((a->y * b->z - a->z * b->y + (1 << (FX64_INT_SHIFT - 1))) >> FX64_INT_SHIFT);
y = ((a->z * b->x - a->x * b->z + (1 << (FX64_INT_SHIFT - 1))) >> FX64_INT_SHIFT);
z = ((a->x * b->y - a->y * b->x + (1 << (FX64_INT_SHIFT - 1))) >> FX64_INT_SHIFT);
- dst->x = x;
- dst->y = y;
- dst->z = z;
+ dst->x = (fx16)x;
+ dst->y = (fx16)y;
+ dst->z = (fx16)z;
}
ARM_FUNC fx32 VEC_Mag(struct Vecx32 *a){
@@ -56,8 +56,8 @@ ARM_FUNC fx32 VEC_Mag(struct Vecx32 *a){
l2 += (fx64)a->y * a->y;
l2 += (fx64)a->z * a->z;
reg_CP_SQRTCNT = 0x1;
- reg_CP_SQRT_PARAM = l2 * 4;
- while (reg_CP_SQRTCNT & 0x8000); //wait for coprocessor to finish
+ reg_CP_SQRT_PARAM = (u64)(l2 * 4);
+ while (reg_CP_SQRTCNT & 0x8000) {} //wait for coprocessor to finish
return ((fx32)reg_CP_SQRT_RESULT + 1) >> 1;
}
@@ -68,17 +68,17 @@ ARM_FUNC void VEC_Normalize(struct Vecx32 *a, struct Vecx32 *dst){
//1/sqrt(l) is computed by calculating sqrt(l)*(1/l)
reg_CP_DIVCNT = 0x2;
reg_CP_DIV_NUMER = 0x0100000000000000;
- reg_CP_DIV_DENOM = l2;
+ reg_CP_DIV_DENOM = (u64)l2;
reg_CP_SQRTCNT = 0x1;
- reg_CP_SQRT_PARAM = l2 * 4;
- while (reg_CP_SQRTCNT & 0x8000); //wait for sqrt to finish
- fx32 sqrtresult = reg_CP_SQRT_RESULT;
- while (reg_CP_DIVCNT & 0x8000); //wait for division to finish
- l2 = reg_CP_DIV_RESULT;
+ reg_CP_SQRT_PARAM = (u64)(l2 * 4);
+ while (reg_CP_SQRTCNT & 0x8000) {} //wait for sqrt to finish
+ fx32 sqrtresult = (fx32)reg_CP_SQRT_RESULT;
+ while (reg_CP_DIVCNT & 0x8000) {} //wait for division to finish
+ l2 = (fx64)reg_CP_DIV_RESULT;
l2 = sqrtresult * l2;
- dst->x = (l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D;
- dst->y = (l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D;
- dst->z = (l2 * a->z + (1LL << (0x2D - 1))) >> 0x2D;
+ dst->x = (fx32)((l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D);
+ dst->y = (fx32)((l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D);
+ dst->z = (fx32)((l2 * a->z + (1LL << (0x2D - 1))) >> 0x2D);
}
ARM_FUNC void VEC_Fx16Normalize(struct Vecx16 *a, struct Vecx16 *dst){
@@ -88,17 +88,17 @@ ARM_FUNC void VEC_Fx16Normalize(struct Vecx16 *a, struct Vecx16 *dst){
//1/sqrt(l) is computed by calculating sqrt(l)*(1/l)
reg_CP_DIVCNT = 0x2;
reg_CP_DIV_NUMER = 0x0100000000000000;
- reg_CP_DIV_DENOM = l2;
+ reg_CP_DIV_DENOM = (u64)l2;
reg_CP_SQRTCNT = 0x1;
- reg_CP_SQRT_PARAM = l2 * 4;
- while (reg_CP_SQRTCNT & 0x8000); //wait for sqrt to finish
- fx32 sqrtresult = reg_CP_SQRT_RESULT;
- while (reg_CP_DIVCNT & 0x8000); //wait for division to finish
- l2 = reg_CP_DIV_RESULT;
+ reg_CP_SQRT_PARAM = (u64)(l2 * 4);
+ while (reg_CP_SQRTCNT & 0x8000) {} //wait for sqrt to finish
+ fx32 sqrtresult = (fx32)reg_CP_SQRT_RESULT;
+ while (reg_CP_DIVCNT & 0x8000) {} //wait for division to finish
+ l2 = (fx64)reg_CP_DIV_RESULT;
l2 = sqrtresult * l2;
- dst->x = (l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D;
- dst->y = (l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D;
- dst->z = (l2 * a->z + (1LL << (0x2D - 1))) >> 0x2D;
+ dst->x = (fx16)((l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D);
+ dst->y = (fx16)((l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D);
+ dst->z = (fx16)((l2 * a->z + (1LL << (0x2D - 1))) >> 0x2D);
}
ARM_FUNC void VEC_MultAdd(fx32 factor, struct Vecx32 *a, struct Vecx32 *b, struct Vecx32 *dst){