Decompile FX_cp.s

2 files changed, 74 insertions, 17 deletions

diff --git a/arm9/lib/src/FX_cp.c b/arm9/lib/src/FX_cp.c
new file mode 100644
index 00000000..a8da0a8f
--- /dev/null
+++ b/arm9/lib/src/FX_cp.c
@@ -0,0 +1,74 @@
+#include "global.h"
+#include "main.h"
+#include "fx.h"
+
+s32 FX_GetDivResult();
+s32 FX_GetSqrtResult();
+void FX_DivAsync(s32 numerator, s32 denominator);
+void FX_InvAsync(s32 x);
+
+s32 FX_Div(s32 numerator, s32 denominator){
+    FX_DivAsync(numerator, denominator);
+    return FX_GetDivResult();
+}
+
+s32 FX_Inv(s32 x){
+    FX_InvAsync(x);
+    return FX_GetDivResult();
+}
+
+s32 FX_Sqrt(s32 x){
+    if (x > 0)
+    {
+        SETREG16(HW_REG_SQRTCNT, 0x1);
+        SETREG64(HW_REG_SQRT_PARAM, (s64)x << 32);
+        return FX_GetSqrtResult();
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+s64 FX_GetDivResultFx64c(){
+    while (READREG16(HW_REG_DIVCNT) & 0x8000);
+    return READREG64(HW_REG_DIV_RESULT);
+}
+
+s32 FX_GetDivResult(){
+    while (READREG16(HW_REG_DIVCNT) & 0x8000);
+    return (READREG64(HW_REG_DIV_RESULT) + (1 << (0x14 - 1))) >> 0x14;
+}
+
+void FX_InvAsync(s32 x){
+    SETREG16(HW_REG_DIVCNT, 0x1);
+    SETREG64(HW_REG_DIV_NUMER, (s64)0x00001000 << 32);
+    SETREG64(HW_REG_DIV_DENOM, (u32)x);
+}
+
+s32 FX_GetSqrtResult(){
+    while (READREG16(HW_REG_SQRTCNT) & 0x8000);
+    return (READREG32(HW_REG_SQRT_RESULT) + (1 << (0xA - 1))) >> 0xA;
+}
+
+void FX_DivAsync(s32 numerator, s32 denominator){
+    SETREG16(HW_REG_DIVCNT, 0x1);
+    SETREG64(HW_REG_DIV_NUMER, (s64)numerator << 32);
+    SETREG64(HW_REG_DIV_DENOM, (u32)denominator);
+}
+
+ s32 FX_DivS32(s32 numerator, s32 denominator){
+     SETREG16(HW_REG_DIVCNT, 0x0);
+     SETREG32(HW_REG_DIV_NUMER, (u32)numerator); //32bit write for some reason
+     SETREG64(HW_REG_DIV_DENOM, (u32)denominator);
+     while (READREG16(HW_REG_DIVCNT) & 0x8000);
+     return READREG32(HW_REG_DIV_RESULT);
+ }
+
+ s32 FX_ModS32(s32 num, s32 mod){
+     SETREG16(HW_REG_DIVCNT, 0x0);
+     SETREG32(HW_REG_DIV_NUMER, (u32)num); //32bit write for some reason
+     SETREG64(HW_REG_DIV_DENOM, (u32)mod);
+     while (READREG16(HW_REG_DIVCNT) & 0x8000);
+     return READREG32(HW_REG_DIVREM_RESULT);
+ }
diff --git a/arm9/lib/src/FX_vec.c b/arm9/lib/src/FX_vec.c
index dc28bedf..7b838829 100644
--- a/arm9/lib/src/FX_vec.c
+++ b/arm9/lib/src/FX_vec.c
@@ -51,23 +51,6 @@ void VEC_Fx16CrossProduct(struct Vecx16 *a, struct Vecx16 *b, struct Vecx16 *dst
     dst->z = z;
 }
 
-#define HW_REG_DIVCNT              0x04000280
-#define HW_REG_DIV_NUMER           0x04000290
-#define HW_REG_DIV_DENOM           0x04000298
-#define HW_REG_DIV_RESULT          0x040002A0
-#define HW_REG_DIVREM_RESULT       0x040002A8
-
-#define HW_REG_SQRTCNT             0x040002B0
-#define HW_REG_SQRT_RESULT         0x040002B4
-#define HW_REG_SQRT_PARAM          0x040002B8
-
-#define SETREG16(x, y)             ((*(vu16 *)x) = y)
-#define SETREG32(x, y)             ((*(vu32 *)x) = y)
-#define SETREG64(x, y)             ((*(vu64 *)x) = y)
-#define READREG16(x)               (*(vu16 *)x)
-#define READREG32(x)               (*(vu32 *)x)
-#define READREG64(x)               (*(vu64 *)x)
-
 s32 VEC_Mag(struct Vecx32 *a){
     s64 l2 = (s64)a->x * a->x;
     l2 += (s64)a->y * a->y;