Decompile GX.s

2 files changed, 150 insertions, 1 deletions

diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h
index edb6f122..f3016f44 100644
--- a/arm9/lib/include/gx.h
+++ b/arm9/lib/include/gx.h
@@ -21,6 +21,8 @@
 #define HW_REG_TEXIMAGE_PARAM  0x040004A8
 #define HW_REG_PLTT_BASE       0x040004AC
 
+#define HW_REG_POWCNT1         0x04000304
+
 #define HW_REG_GXFIFO          0x04000400
 #define HW_REG_MTX_IDENTITY    0x04000454
 #define HW_REG_MTX_POP         0x04000448
@@ -34,6 +36,7 @@
 
 #define HW_REG_SHININESS       0x040004D0
 
+#define HW_REG_MASTER_BRIGHT   0x0400006C
 
 #define HW_REG_VRAMCNT_A       0x04000240
 #define HW_REG_VRAMCNT_B       0x04000241
@@ -47,10 +50,20 @@
 #define HW_REG_VRAMCNT_I       0x04000249
 
 #define HW_REG_DISPCNT         0x04000000
+#define HW_REG_DISPSTAT        0x04000004
 #define HW_REG_DISPCNT_2D      0x04001000
 
 #define HW_REG_DISP3DCNT       0x04000060
 
+#define HW_REG_BG2PA_A   0x04000020
+#define HW_REG_BG2PD_A   0x04000026
+#define HW_REG_BG3PA_A   0x04000030
+#define HW_REG_BG3PD_A   0x04000036
+#define HW_REG_BG2PA_B   0x04001020
+#define HW_REG_BG2PD_B   0x04001026
+#define HW_REG_BG3PA_B   0x04001030
+#define HW_REG_BG3PD_B   0x04001036
+
 #define HW_REG_BG0CNT_A 0x04000008
 #define HW_REG_BG1CNT_A 0x0400000A
 #define HW_REG_BG2CNT_A 0x0400000C
@@ -136,7 +149,6 @@ u32 G3X_GetMtxStackLevelPJ(u32 *level);
 u32 G3X_GetBoxTestResult(u32 *result);
 void G3X_SetHOffset(u32 offset);
 
-
 //GX_g3b
 void G3BS_LoadMtx44(struct DL *displaylist, struct Mtx44 *mtx);
 void G3B_PushMtx(struct DL *displaylist);
@@ -278,6 +290,16 @@ void GX_LoadClearImageColor(void *src, u32 size);
 void GX_LoadClearImageDepth(void *src, u32 size);
 void GX_EndLoadClearImage();
 
+//GX
+void GX_Init();
+u32 GX_HBlankIntr(u32 enable);
+u32 GX_VBlankIntr(u32 enable);
+void GX_DispOff();
+void GX_DispOn();
+void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3);
+void GXS_SetGraphicsMode(u32 mode);
+void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness);
+
 //GXi_NopClearFifo128_ probably asm
 
 #endif //GUARD_GX_H
diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c
new file mode 100644
index 00000000..6d979139
--- /dev/null
+++ b/arm9/lib/src/GX.c
@@ -0,0 +1,127 @@
+#include "global.h"
+#include "main.h"
+#include "gx.h"
+
+extern u16 gUnk021D33BC;
+extern u16 gUnk021D33C0;
+extern u32 gUnk02106814;
+extern u16 gUnk02106810;
+
+void GX_InitGXState();
+
+void MI_DmaFill32(u32, void *, u32, u32);
+void MIi_CpuClear32(u32, void *, u32);
+
+void GX_Init(){
+    SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x8000);
+    SETREG16(HW_REG_POWCNT1, (READREG16(HW_REG_POWCNT1) & ~0x20E) | 0x20E);
+    SETREG16(HW_REG_POWCNT1, READREG16(HW_REG_POWCNT1) | 0x1);
+    GX_InitGXState();
+    u32 temp;
+    while (gUnk021D33BC == 0)
+    {
+        temp = OS_GetLockID();
+        if (temp == -3)
+        {
+            OS_Terminate();
+        }
+        gUnk021D33BC = temp;
+    }
+    SETREG16(HW_REG_DISPSTAT, 0x0);
+    SETREG32(HW_REG_DISPCNT, 0x0);
+    if (gUnk02106814 != -1)
+    {
+        MI_DmaFill32(gUnk02106814, (void *)HW_REG_BG0CNT_A, 0x0, 0x60);
+        SETREG16(HW_REG_MASTER_BRIGHT, 0x0);
+        MI_DmaFill32(gUnk02106814, (void *)HW_REG_DISPCNT_2D, 0x0, 0x70);
+    }
+    else
+    {
+        MIi_CpuClear32(0x0, (void *)HW_REG_BG0CNT_A, 0x60);
+        SETREG16(HW_REG_MASTER_BRIGHT, 0x0);
+        MIi_CpuClear32(0x0, (void *)HW_REG_DISPCNT_2D, 0x70);
+    }
+    SETREG16(HW_REG_BG2PA_A, 0x100);
+    SETREG16(HW_REG_BG2PD_A, 0x100);
+    SETREG16(HW_REG_BG3PA_A, 0x100);
+    SETREG16(HW_REG_BG3PD_A, 0x100);
+    SETREG16(HW_REG_BG2PA_B, 0x100);
+    SETREG16(HW_REG_BG2PD_B, 0x100);
+    SETREG16(HW_REG_BG3PA_B, 0x100);
+    SETREG16(HW_REG_BG3PD_B, 0x100);
+}
+
+u32 GX_HBlankIntr(u32 enable){
+    u32 temp = READREG16(HW_REG_DISPSTAT) & 0x10;
+    if (enable)
+    {
+        SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x10);
+    }
+    else
+    {
+        SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x10);
+    }
+    return temp;
+}
+
+u32 GX_VBlankIntr(u32 enable){
+    u32 temp = READREG16(HW_REG_DISPSTAT) & 0x8;
+    if (enable)
+    {
+        SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) | 0x8);
+    }
+    else
+    {
+        SETREG16(HW_REG_DISPSTAT, READREG16(HW_REG_DISPSTAT) & ~0x8);
+    }
+    return temp;
+}
+
+void GX_DispOff(){
+    u32 temp = READREG32(HW_REG_DISPCNT);
+    gUnk02106810 = 0x0;
+    gUnk021D33C0 = (temp & 0x30000) >> 0x10;
+    SETREG32(HW_REG_DISPCNT, temp & ~0x30000);
+}
+
+void GX_DispOn(){
+    gUnk02106810 = 0x1;
+    if (gUnk021D33C0)
+    {
+        SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) & ~0x30000 | (gUnk021D33C0 << 0x10));
+
+    }
+    else
+    {
+        SETREG32(HW_REG_DISPCNT, READREG32(HW_REG_DISPCNT) | 0x10000);
+    }
+}
+
+void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){
+    u32 temp2 = READREG32(HW_REG_DISPCNT);
+    gUnk021D33C0 = mode1;
+    if (!gUnk02106810)
+        mode1 = 0;
+    SETREG32(HW_REG_DISPCNT, (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3));
+    if (!gUnk021D33C0)
+        gUnk02106810 = 0x0;
+}
+
+void GXS_SetGraphicsMode(u32 mode){
+    SETREG32(HW_REG_DISPCNT_2D, READREG32(HW_REG_DISPCNT_2D) & ~0x7 | mode);
+}
+
+void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){
+    if (!brightness)
+    {
+        *dst = 0x0;
+    }
+    else if (brightness > 0)
+    {
+        *dst = 0x4000 | brightness;
+    }
+    else
+    {
+        *dst = 0x8000 | -brightness;
+    }
+}