Merge pull request #320 from red031000/master

partial CTRDG_flash_AT29LV512.o decomp

5 files changed, 166 insertions, 0 deletions

diff --git a/arm9/lib/include/CTRDG_backup.h b/arm9/lib/include/CTRDG_backup.h
index d248b7a1..272744ad 100644
--- a/arm9/lib/include/CTRDG_backup.h
+++ b/arm9/lib/include/CTRDG_backup.h
@@ -5,6 +5,10 @@
 #include "CTRDG_flash.h"
 #include "CTRDG_task.h"
 
+#define CTRDG_BACKUP_PHASE_PROGRAM          0x0001
+#define CTRDG_BACKUP_PHASE_SECTOR_ERASE     0x0002
+#define CTRDG_BACKUP_PHASE_CHIP_ERASE       0x0003
+
 typedef struct CTRDGiFlashTypePlusTag
 {
     u16 (*CTRDGi_WriteAgbFlashSector)(u16 secNo, u8 *src);
diff --git a/arm9/lib/include/CTRDG_flash.h b/arm9/lib/include/CTRDG_flash.h
index 9a4aff41..aa02d951 100644
--- a/arm9/lib/include/CTRDG_flash.h
+++ b/arm9/lib/include/CTRDG_flash.h
@@ -4,6 +4,8 @@
 #include "nitro/types.h"
 #include "MI_exMemory.h"
 
+#define CTRDG_AGB_FLASH_ADR  0x0A000000
+
 typedef struct CTRDGiFlashSectorTag
 {
     u32 size;
diff --git a/arm9/lib/include/CTRDG_flash_AT29LV512.h b/arm9/lib/include/CTRDG_flash_AT29LV512.h
new file mode 100644
index 00000000..908dd6cf
--- /dev/null
+++ b/arm9/lib/include/CTRDG_flash_AT29LV512.h
@@ -0,0 +1,10 @@
+#ifndef POKEDIAMOND_CTRDG_FLASH_AT29LV512_H
+#define POKEDIAMOND_CTRDG_FLASH_AT29LV512_H
+
+#include "nitro/types.h"
+#include "CTRDG_task.h"
+
+u32 CTRDGi_EraseFlashChipCoreAT(CTRDGTaskInfo *arg);
+u32 CTRDGi_EraseFlashSectorCoreAT(CTRDGTaskInfo *arg);
+
+#endif //POKEDIAMOND_CTRDG_FLASH_AT29LV512_H
diff --git a/arm9/lib/include/OS_interrupt.h b/arm9/lib/include/OS_interrupt.h
index c3812128..d063b817 100644
--- a/arm9/lib/include/OS_interrupt.h
+++ b/arm9/lib/include/OS_interrupt.h
@@ -43,6 +43,13 @@ static inline BOOL OS_EnableIrq(void)
     return (BOOL)prep;
 }
 
+static inline BOOL OS_RestoreIrq(BOOL enable)
+{
+    u16     prep = reg_OS_IME;
+    reg_OS_IME = (u16)enable;
+    return (BOOL)prep;
+}
+
 static inline OSIrqMask OS_GetIrqMask(void)
 {
     return reg_OS_IE;
diff --git a/arm9/lib/src/CTRDG_flash_AT29LV512.c b/arm9/lib/src/CTRDG_flash_AT29LV512.c
new file mode 100644
index 00000000..8cd90c31
--- /dev/null
+++ b/arm9/lib/src/CTRDG_flash_AT29LV512.c
@@ -0,0 +1,143 @@
+#include "CTRDG_flash_AT29LV512.h"
+#include "function_target.h"
+#include "CTRDG_backup.h"
+#include "CTRDG_flash.h"
+#include "MI_exMemory.h"
+#include "OS_interrupt.h"
+#include "OS_spinLock.h"
+
+#define CTRDG_BACKUP_COM_ADR1   (CTRDG_AGB_FLASH_ADR+0x00005555)
+#define CTRDG_BACKUP_COM_ADR2   (CTRDG_AGB_FLASH_ADR+0x00002aaa)
+
+extern u16 ctrdgi_flash_lock_id;
+extern BOOL ctrdgi_backup_irq;
+
+extern u16 CTRDGi_PollingSR512kCOMMON(u16 phase, u8 *adr, u16 lastData);
+
+extern u16 CTRDGi_EraseFlashChipAT(void);
+extern u16 CTRDGi_EraseFlashSectorAT(u16 p_secNo);
+extern u16 CTRDGi_EraseFlash4KBAT(u16 l_secNo);
+extern u16 CTRDGi_WriteFlashSectorAT(u16 p_secNo, u8 *src);
+extern u16 CTRDGi_WriteFlash4KBAT(u16 l_secNo, u8 *src);
+
+extern void CTRDGi_EraseFlashChipAsyncAT(CTRDG_TASK_FUNC callback);
+extern void CTRDGi_EraseFlash4KBAsyncAT(u16 secNo, CTRDG_TASK_FUNC callback);
+extern void CTRDGi_WriteFlash4KBAsyncAT(u16 secNo, u8 *src, CTRDG_TASK_FUNC callback);
+extern void CTRDGi_EraseFlashSectorAsyncAT(u16 secNo, CTRDG_TASK_FUNC callback);
+extern void CTRDGi_WriteFlashSectorAsyncAT(u16 secNo, u8 *src, CTRDG_TASK_FUNC callback);
+
+static const u16 atMaxTime[] = {
+        10, 40, 0, 40
+};
+
+const CTRDGiFlashTypePlus AT29LV512_lib = {
+        CTRDGi_WriteFlash4KBAT,
+        CTRDGi_EraseFlashChipAT,
+        CTRDGi_EraseFlash4KBAT,
+        CTRDGi_WriteFlash4KBAsyncAT,
+        CTRDGi_EraseFlashChipAsyncAT,
+        CTRDGi_EraseFlash4KBAsyncAT,
+        CTRDGi_PollingSR512kCOMMON,
+        atMaxTime,
+        {
+                0x00010000, //ROM size
+                {0x00001000, 12, 16, 0}, //sector
+                {MI_CTRDG_RAMCYCLE_18, MI_CTRDG_RAMCYCLE_18}, //read cycle and write cycle
+                0x1f, //maker ID
+                0x3d, //device ID
+        }
+};
+
+const CTRDGiFlashTypePlus AT29LV512_org = {
+        CTRDGi_WriteFlashSectorAT,
+        CTRDGi_EraseFlashChipAT,
+        CTRDGi_EraseFlashSectorAT,
+        CTRDGi_WriteFlashSectorAsyncAT,
+        CTRDGi_EraseFlashChipAsyncAT,
+        CTRDGi_EraseFlashSectorAsyncAT,
+        CTRDGi_PollingSR512kCOMMON,
+        atMaxTime,
+        {
+                0x00010000, //ROM size
+                {0x00000080, 7, 512, 0}, //sector
+                {MI_CTRDG_RAMCYCLE_18, MI_CTRDG_RAMCYCLE_18}, //read cycle and write cycle
+                0x1f, //maker ID
+                0x3d, //device ID
+        }
+};
+
+ARM_FUNC u32 CTRDGi_EraseFlashChipCoreAT(CTRDGTaskInfo *arg)
+{
+    MICartridgeRamCycle ram_cycle;
+    u32 result;
+    (void)arg;
+
+    (void)OS_LockCartridge(ctrdgi_flash_lock_id);
+
+    ram_cycle = MI_GetCartridgeRamCycle();
+    MI_SetCartridgeRamCycle(AgbFlash->agbWait[0]);
+
+    ctrdgi_backup_irq = OS_DisableIrq();
+
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR2 = 0x55;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR2 = 0x55;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x10;
+
+    (void)OS_RestoreIrq(ctrdgi_backup_irq);
+
+    result = CTRDGi_PollingSR(CTRDG_BACKUP_PHASE_CHIP_ERASE, (u8 *)CTRDG_AGB_FLASH_ADR, 0xff);
+
+    MI_SetCartridgeRamCycle(ram_cycle);
+
+    (void)OS_UnlockCartridge(ctrdgi_flash_lock_id);
+
+    return result;
+}
+
+ARM_FUNC u32 CTRDGi_EraseFlashSectorCoreAT(CTRDGTaskInfo *arg)
+{
+    u32 i;
+    u8 *dst;
+    BOOL shlet_ime;
+    MICartridgeRamCycle ram_cycle;
+    u32 result;
+    CTRDGTaskInfo p = *arg;
+    u16 p_secNo = p.sec_num;
+
+    dst = (u8 *)(CTRDG_AGB_FLASH_ADR + (p_secNo << AT29LV512_org.type.sector.shift));
+
+    (void)OS_LockCartridge(ctrdgi_flash_lock_id);
+
+    ram_cycle = MI_GetCartridgeRamCycle();
+    MI_SetCartridgeRamCycle(AgbFlash->agbWait[0]);
+
+    shlet_ime = OS_DisableIrq();
+
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR2 = 0x55;
+    *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xa0;
+
+    for (i = AT29LV512_org.type.sector.size; i > 0; i--)
+    {
+        *dst++ = 0xff;
+    }
+    dst--;
+
+    (void)OS_RestoreIrq(shlet_ime);
+
+    result = CTRDGi_PollingSR(CTRDG_BACKUP_PHASE_PROGRAM, dst, 0xff);
+
+    if (result)
+    {
+        result = (u16)((result & 0xff00) | CTRDG_BACKUP_PHASE_SECTOR_ERASE);
+    }
+
+    MI_SetCartridgeRamCycle(ram_cycle);
+
+    (void)OS_UnlockCartridge(ctrdgi_flash_lock_id);
+
+    return result;
+}