summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--arm7/asm/MI_dma.s74
-rw-r--r--arm7/asm/MI_memory.s221
-rw-r--r--arm7/asm/MI_swap.s9
-rw-r--r--arm7/asm/OS_reset.s100
-rw-r--r--arm7/lib/include/MI_dma.h10
-rw-r--r--arm7/lib/include/MI_memory.h15
-rw-r--r--arm7/lib/include/MI_swap.h8
-rw-r--r--arm7/lib/include/OS_init.h2
-rw-r--r--arm7/lib/include/OS_interrupt.h6
-rw-r--r--arm7/lib/include/OS_reset.h14
-rw-r--r--arm7/lib/include/PXI_fifo.h6
-rw-r--r--arm7/lib/src/MI_dma.c36
-rw-r--r--arm7/lib/src/MI_memory.c219
-rw-r--r--arm7/lib/src/MI_swap.c6
-rw-r--r--arm7/lib/src/OS_init.c1
-rw-r--r--arm7/lib/src/OS_reset.c59
-rw-r--r--arm9/asm/OS_irqTable.s163
-rw-r--r--arm9/lib/include/OS_init.h1
-rw-r--r--arm9/lib/include/OS_interrupt.h9
-rw-r--r--arm9/lib/include/OS_irqTable.h23
-rw-r--r--arm9/lib/include/OS_reset.h15
-rw-r--r--arm9/lib/include/PXI_fifo.h35
-rw-r--r--arm9/lib/include/mmap.h1
-rw-r--r--arm9/lib/src/OS_irqTable.c110
-rw-r--r--arm9/lib/src/OS_reset.c4
-rw-r--r--include/nitro/OS_interrupt_shared.h20
-rw-r--r--include/nitro/OS_reset_shared.h20
-rw-r--r--include/nitro/PXI_fifo_shared.h37
-rw-r--r--include/nitro/dma.h25
-rw-r--r--include/nitro/mmap_shared.h1
30 files changed, 630 insertions, 620 deletions
diff --git a/arm7/asm/MI_dma.s b/arm7/asm/MI_dma.s
deleted file mode 100644
index 8cbc8cb5..00000000
--- a/arm7/asm/MI_dma.s
+++ /dev/null
@@ -1,74 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- .text
-
- arm_func_start MI_StopDma
-MI_StopDma: ; 0x037FB20C
- stmdb sp!, {r4, lr}
- mov r4, r0
- bl OS_DisableInterrupts
- mov r1, #6
- mul r1, r4, r1
- add r1, r1, #5
- mov r1, r1, lsl #1
- add r1, r1, #67108864 ; 0x4000000
- ldrh r2, [r1, #176] ; 0xb0
- bic r2, r2, #12800 ; 0x3200
- strh r2, [r1, #176] ; 0xb0
- ldrh r2, [r1, #176] ; 0xb0
- bic r2, r2, #32768 ; 0x8000
- strh r2, [r1, #176] ; 0xb0
- ldrh r2, [r1, #176] ; 0xb0
- ldrh r1, [r1, #176] ; 0xb0
- cmp r4, #0
- bne _037FB27C
- mov r1, #12
- mul r3, r4, r1
- ldr r1, _037FB288 ; =0x040000B0
- add r4, r3, r1
- mov r2, #0
- add r1, r3, #67108864 ; 0x4000000
- str r2, [r1, #176] ; 0xb0
- str r2, [r4, #4]
- ldr r1, _037FB28C ; =0x81400001
- str r1, [r4, #8]
-_037FB27C:
- bl OS_RestoreInterrupts
- ldmia sp!, {r4, lr}
- bx lr
-_037FB288: .word 0x040000B0
-_037FB28C: .word 0x81400001
-
- arm_func_start MI_WaitDma
-MI_WaitDma: ; 0x037FB290
- stmdb sp!, {r4, lr}
- mov r4, r0
- bl OS_DisableInterrupts
- mov r1, #3
- mul r1, r4, r1
- add r2, r1, #2
- ldr r1, _037FB2F8 ; =0x040000B0
- add r2, r1, r2, lsl #2
-_037FB2B0:
- ldr r1, [r2]
- ands r1, r1, #-2147483648 ; 0x80000000
- bne _037FB2B0
- cmp r4, #0
- bne _037FB2EC
- mov r1, #12
- mul r3, r4, r1
- ldr r1, _037FB2F8 ; =0x040000B0
- add r4, r3, r1
- mov r2, #0
- add r1, r3, #67108864 ; 0x4000000
- str r2, [r1, #176] ; 0xb0
- str r2, [r4, #4]
- ldr r1, _037FB2FC ; =0x81400001
- str r1, [r4, #8]
-_037FB2EC:
- bl OS_RestoreInterrupts
- ldmia sp!, {r4, lr}
- bx lr
-_037FB2F8: .word 0x040000B0
-_037FB2FC: .word 0x81400001
diff --git a/arm7/asm/MI_memory.s b/arm7/asm/MI_memory.s
deleted file mode 100644
index 7f3fdef2..00000000
--- a/arm7/asm/MI_memory.s
+++ /dev/null
@@ -1,221 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- .text
-
- arm_func_start MIi_CpuClear16
-MIi_CpuClear16: ; 0x037FB300
- mov r3, #0
-_037FB304:
- cmp r3, r2
- strlth r0, [r1, r3]
- addlt r3, r3, #2
- blt _037FB304
- bx lr
-
- arm_func_start MIi_CpuCopy16
-MIi_CpuCopy16: ; 0x037FB318
- mov ip, #0
-_037FB31C:
- cmp ip, r2
- ldrlth r3, [r0, ip]
- strlth r3, [r1, ip]
- addlt ip, ip, #2
- blt _037FB31C
- bx lr
-
- arm_func_start MIi_CpuClear32
-MIi_CpuClear32: ; 0x037FB334
- add ip, r1, r2
-_037FB338:
- cmp r1, ip
- stmltia r1!, {r0}
- blt _037FB338
- bx lr
-
- arm_func_start MIi_CpuCopy32
-MIi_CpuCopy32: ; 0x037FB348
- add ip, r1, r2
-_037FB34C:
- cmp r1, ip
- ldmltia r0!, {r2}
- stmltia r1!, {r2}
- blt _037FB34C
- bx lr
-
- arm_func_start MIi_CpuClearFast
-MIi_CpuClearFast: ; 0x037FB360
- stmdb sp!, {r4, r5, r6, r7, r8, r9}
- add r9, r1, r2
- mov ip, r2, lsr #5
- add ip, r1, ip, lsl #5
- mov r2, r0
- mov r3, r2
- mov r4, r2
- mov r5, r2
- mov r6, r2
- mov r7, r2
- mov r8, r2
-_037FB38C:
- cmp r1, ip
- stmltia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
- blt _037FB38C
-_037FB398:
- cmp r1, r9
- stmltia r1!, {r0}
- blt _037FB398
- ldmia sp!, {r4, r5, r6, r7, r8, r9}
- bx lr
-
- arm_func_start MIi_CpuCopyFast
-MIi_CpuCopyFast: ; 0x037FB3AC
- stmdb sp!, {r4, r5, r6, r7, r8, r9, sl}
- add sl, r1, r2
- mov ip, r2, lsr #5
- add ip, r1, ip, lsl #5
-_037FB3BC:
- cmp r1, ip
- ldmltia r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
- stmltia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
- blt _037FB3BC
-_037FB3CC:
- cmp r1, sl
- ldmltia r0!, {r2}
- stmltia r1!, {r2}
- blt _037FB3CC
- ldmia sp!, {r4, r5, r6, r7, r8, r9, sl}
- bx lr
-
- arm_func_start MI_CpuFill8
-MI_CpuFill8: ; 0x037FB3E4
- cmp r2, #0
- bxeq lr
- tst r0, #1
- beq _037FB410
- ldrh ip, [r0, #-1]
- and ip, ip, #255 ; 0xff
- orr r3, ip, r1, lsl #8
- strh r3, [r0, #-1]
- add r0, r0, #1
- subs r2, r2, #1
- bxeq lr
-_037FB410:
- cmp r2, #2
- bcc _037FB458
- orr r1, r1, r1, lsl #8
- tst r0, #2
- beq _037FB430
- strh r1, [r0], #2
- subs r2, r2, #2
- bxeq lr
-_037FB430:
- orr r1, r1, r1, lsl #16
- bics r3, r2, #3
- beq _037FB450
- sub r2, r2, r3
- add ip, r3, r0
-_037FB444:
- str r1, [r0], #4
- cmp r0, ip
- bcc _037FB444
-_037FB450:
- tst r2, #2
- strneh r1, [r0], #2
-_037FB458:
- tst r2, #1
- bxeq lr
- ldrh r3, [r0]
- and r3, r3, #65280 ; 0xff00
- and r1, r1, #255 ; 0xff
- orr r1, r1, r3
- strh r1, [r0]
- bx lr
-
- arm_func_start MI_CpuCopy8
-MI_CpuCopy8: ; 0x037FB478
- cmp r2, #0
- bxeq lr
- tst r1, #1
- beq _037FB4B8
- ldrh ip, [r1, #-1]
- and ip, ip, #255 ; 0xff
- tst r0, #1
- ldrneh r3, [r0, #-1]
- movne r3, r3, lsr #8
- ldreqh r3, [r0]
- orr r3, ip, r3, lsl #8
- strh r3, [r1, #-1]
- add r0, r0, #1
- add r1, r1, #1
- subs r2, r2, #1
- bxeq lr
-_037FB4B8:
- eor ip, r1, r0
- tst ip, #1
- beq _037FB50C
- bic r0, r0, #1
- ldrh ip, [r0], #2
- mov r3, ip, lsr #8
- subs r2, r2, #2
- bcc _037FB4F0
-_037FB4D8:
- ldrh ip, [r0], #2
- orr ip, r3, ip, lsl #8
- strh ip, [r1], #2
- mov r3, ip, lsr #16
- subs r2, r2, #2
- bcs _037FB4D8
-_037FB4F0:
- tst r2, #1
- bxeq lr
- ldrh ip, [r1]
- and ip, ip, #65280 ; 0xff00
- orr ip, ip, r3
- strh ip, [r1]
- bx lr
-_037FB50C:
- tst ip, #2
- beq _037FB538
- bics r3, r2, #1
- beq _037FB584
- sub r2, r2, r3
- add ip, r3, r1
-_037FB524:
- ldrh r3, [r0], #2
- strh r3, [r1], #2
- cmp r1, ip
- bcc _037FB524
- b _037FB584
-_037FB538:
- cmp r2, #2
- bcc _037FB584
- tst r1, #2
- beq _037FB558
- ldrh r3, [r0], #2
- strh r3, [r1], #2
- subs r2, r2, #2
- bxeq lr
-_037FB558:
- bics r3, r2, #3
- beq _037FB578
- sub r2, r2, r3
- add ip, r3, r1
-_037FB568:
- ldr r3, [r0], #4
- str r3, [r1], #4
- cmp r1, ip
- bcc _037FB568
-_037FB578:
- tst r2, #2
- ldrneh r3, [r0], #2
- strneh r3, [r1], #2
-_037FB584:
- tst r2, #1
- bxeq lr
- ldrh r2, [r1]
- ldrh r0, [r0]
- and r2, r2, #65280 ; 0xff00
- and r0, r0, #255 ; 0xff
- orr r0, r2, r0
- strh r0, [r1]
- bx lr
diff --git a/arm7/asm/MI_swap.s b/arm7/asm/MI_swap.s
deleted file mode 100644
index a5f08796..00000000
--- a/arm7/asm/MI_swap.s
+++ /dev/null
@@ -1,9 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- .text
-
- arm_func_start MI_SwapWord
-MI_SwapWord: ; 0x037FB5A8
- swp r0, r0, [r1]
- bx lr
diff --git a/arm7/asm/OS_reset.s b/arm7/asm/OS_reset.s
deleted file mode 100644
index b2a8ffe6..00000000
--- a/arm7/asm/OS_reset.s
+++ /dev/null
@@ -1,100 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- .section .bss
-
- .global _03807950
-_03807950: ;0x03807950
- .space 0x03807954 - 0x03807950
-
- .global _03807954
-_03807954: ;0x03807954
- .space 0x03807958 - 0x03807954
-
- .section .text
-
- arm_func_start OS_ResetSystem
-OS_ResetSystem: ; 0x037FB0E0
- stmfd sp!, {lr}
- sub sp, sp, #4
- mov r0, #0
- bl MI_StopDma
- mov r0, #1
- bl MI_StopDma
- mov r0, #2
- bl MI_StopDma
- mov r0, #3
- bl MI_StopDma
- mov r0, #262144 ; 0x40000
- bl OS_SetIrqMask
- mvn r0, #0
- bl OS_ResetRequestIrqMask
- bl SND_Shutdown
- mov r0, #16
- bl OSi_SendToPxi
- bl FUN_038073EC
- add sp, sp, #4
- ldmia sp!, {lr}
- bx lr
-
- arm_func_start OSi_SendToPxi
-OSi_SendToPxi: ; 0x037FB134
- stmdb sp!, {r4, r5, r6, lr}
- mov r6, r0, lsl #8
- mov r5, #12
- mov r4, #0
-_037FB144:
- mov r0, r5
- mov r1, r6
- mov r2, r4
- bl PXI_SendWordByFifo
- cmp r0, #0
- bne _037FB144
- ldmia sp!, {r4, r5, r6, lr}
- bx lr
-
- arm_func_start OSi_CommonCallback
-OSi_CommonCallback: ; 0x037FB164
- stmfd sp!, {lr}
- sub sp, sp, #4
- and r0, r1, #32512 ; 0x7f00
- mov r0, r0, lsl #8
- mov r0, r0, lsr #16
- cmp r0, #16
- moveq r1, #1
- ldreq r0, _037FB19C ; =_03807954
- streqh r1, [r0]
- beq _037FB190
- bl OS_Terminate
-_037FB190:
- add sp, sp, #4
- ldmia sp!, {lr}
- bx lr
-_037FB19C: .word _03807954
-
- arm_func_start OS_IsResetOccurred
-OS_IsResetOccurred: ; 0x037FB1A0
- ldr r0, _037FB1AC ; =_03807954
- ldrh r0, [r0]
- bx lr
-_037FB1AC: .word _03807954
-
- arm_func_start OS_InitReset
-OS_InitReset: ; 0x037FB1B0
- stmfd sp!, {lr}
- sub sp, sp, #4
- ldr r0, _037FB1E8 ; =_03807950
- ldrh r1, [r0]
- cmp r1, #0
- bne _037FB1DC
- mov r1, #1
- strh r1, [r0]
- mov r0, #12
- ldr r1, _037FB1EC ; =OSi_CommonCallback
- bl PXI_SetFifoRecvCallback
-_037FB1DC:
- add sp, sp, #4
- ldmia sp!, {lr}
- bx lr
-_037FB1E8: .word _03807950
-_037FB1EC: .word OSi_CommonCallback
diff --git a/arm7/lib/include/MI_dma.h b/arm7/lib/include/MI_dma.h
new file mode 100644
index 00000000..b728f814
--- /dev/null
+++ b/arm7/lib/include/MI_dma.h
@@ -0,0 +1,10 @@
+#ifndef GUARD_MI_DMA_H
+#define GUARD_MI_DMA_H
+
+#include "nitro/dma.h"
+#include "nitro/types.h"
+
+void MI_StopDma(u32 channel);
+void MI_WaitDma(u32 channel);
+
+#endif
diff --git a/arm7/lib/include/MI_memory.h b/arm7/lib/include/MI_memory.h
new file mode 100644
index 00000000..cb0c53fc
--- /dev/null
+++ b/arm7/lib/include/MI_memory.h
@@ -0,0 +1,15 @@
+#ifndef GUARD_MI_MEMORY_H
+#define GUARD_MI_MEMORY_H
+
+#include "nitro/types.h"
+
+void MIi_CpuClear16(register u16 value, register u16 * dst, register u32 size);
+void MIi_CpuCopy16(register u16 * src, register u16 * dst, register u32 size);
+void MIi_CpuClear32(register u32 value, register u32 * dst, register u32 size);
+void MIi_CpuCopy32(register u32 * src, register u32 * dst, register u32 size);
+void MIi_CpuClearFast(register u32 value, register u32 * dst, register u32 size);
+void MIi_CpuCopyFast(register u32 * src, register u32 * dst, register u32 size);
+void MI_CpuFill8(register u8 value, register u8 * dst, register u32 size);
+void MI_CpuCopy8(register u8 * src, register u8 * dst, register u32 size);
+
+#endif
diff --git a/arm7/lib/include/MI_swap.h b/arm7/lib/include/MI_swap.h
new file mode 100644
index 00000000..8b18c5c1
--- /dev/null
+++ b/arm7/lib/include/MI_swap.h
@@ -0,0 +1,8 @@
+#ifndef GUARD_MI_SWAP_H
+#define GUARD_MI_SWAP_H
+
+#include "nitro/types.h"
+
+u32 MI_SwapWord(register u32 data, register u32 * dst);
+
+#endif
diff --git a/arm7/lib/include/OS_init.h b/arm7/lib/include/OS_init.h
index 9c9b1f93..c90740c2 100644
--- a/arm7/lib/include/OS_init.h
+++ b/arm7/lib/include/OS_init.h
@@ -4,6 +4,8 @@
#include "nitro/types.h"
#include "OS_system.h"
#include "OS_arena.h"
+#include "OS_alloc.h"
+#include "OS_reset.h"
void OS_Init(void);
diff --git a/arm7/lib/include/OS_interrupt.h b/arm7/lib/include/OS_interrupt.h
new file mode 100644
index 00000000..afcb9b5f
--- /dev/null
+++ b/arm7/lib/include/OS_interrupt.h
@@ -0,0 +1,6 @@
+#ifndef POKEDIAMOND_ARM7_OS_INTERRUPT_H
+#define POKEDIAMOND_ARM7_OS_INTERRUPT_H
+
+#include "nitro/OS_interrupt_shared.h"
+
+#endif //POKEDIAMOND_ARM7_OS_INTERRUPT_H
diff --git a/arm7/lib/include/OS_reset.h b/arm7/lib/include/OS_reset.h
new file mode 100644
index 00000000..f643dd58
--- /dev/null
+++ b/arm7/lib/include/OS_reset.h
@@ -0,0 +1,14 @@
+#ifndef POKEDIAMOND_ARM7_OS_RESET_H
+#define POKEDIAMOND_ARM7_OS_RESET_H
+
+#include "nitro/types.h"
+#include "nitro/OS_reset_shared.h"
+#include "PXI_fifo.h"
+
+void OS_InitReset(void);
+BOOL OS_IsResetOccurred(void);
+static void OSi_CommonCallback(PXIFifoTag tag, u32 data, BOOL err);
+static void OSi_SendToPxi(u16 data);
+void OS_ResetSystem(void);
+
+#endif //POKEDIAMOND_ARM7_OS_RESET_H
diff --git a/arm7/lib/include/PXI_fifo.h b/arm7/lib/include/PXI_fifo.h
new file mode 100644
index 00000000..6d634f72
--- /dev/null
+++ b/arm7/lib/include/PXI_fifo.h
@@ -0,0 +1,6 @@
+#ifndef POKEDIAMOND_ARM7_PXI_FIFO_H
+#define POKEDIAMOND_ARM7_PXI_FIFO_H
+
+#include "nitro/PXI_fifo_shared.h"
+
+#endif //POKEDIAMOND_ARM7_PXI_FIFO_H
diff --git a/arm7/lib/src/MI_dma.c b/arm7/lib/src/MI_dma.c
new file mode 100644
index 00000000..fc2ff0c9
--- /dev/null
+++ b/arm7/lib/src/MI_dma.c
@@ -0,0 +1,36 @@
+#include "function_target.h"
+#include "MI_dma.h"
+#include "OS_system.h"
+
+ARM_FUNC void MI_WaitDma(u32 channel) {
+ OSIntrMode mode = OS_DisableInterrupts();
+ vu32 * addr = (vu32 *)(REG_ADDR_DMA0SAD + (channel * 3 + 2) * 4);
+ while(addr[0] & 0x80000000) ;
+ if (channel == 0) {
+ addr = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
+ addr[0] = 0;
+ addr[1] = 0;
+ addr[2] = 0x81400001;
+ }
+ mode = OS_RestoreInterrupts(mode);
+}
+
+ARM_FUNC void MI_StopDma(u32 channel) {
+ OSIntrMode mode = OS_DisableInterrupts();
+ vu16 * addr = (vu16 *)(REG_ADDR_DMA0SAD + (channel * 6 + 5) * 2);
+ addr[0] &= ~(DMA_START_MASK | DMA_REPEAT);
+ addr[0] &= ~DMA_ENABLE;
+ {
+ s32 dummy = addr[0];
+ }
+ {
+ s32 dummy = addr[0];
+ }
+ if (channel == 0) {
+ vu32 * addr32 = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
+ addr32[0] = 0;
+ addr32[1] = 0;
+ addr32[2] = 0x81400001;
+ }
+ mode = OS_RestoreInterrupts(mode);
+}
diff --git a/arm7/lib/src/MI_memory.c b/arm7/lib/src/MI_memory.c
new file mode 100644
index 00000000..acb982a4
--- /dev/null
+++ b/arm7/lib/src/MI_memory.c
@@ -0,0 +1,219 @@
+#include "function_target.h"
+#include "MI_memory.h"
+
+asm void MIi_CpuClear16(register u16 value, register u16 * dst, register u32 size) {
+ mov r3, #0
+loop:
+ cmp r3, r2
+ strlth r0, [r1, r3]
+ addlt r3, r3, #2
+ blt loop
+ bx lr
+}
+
+asm void MIi_CpuCopy16(register u16 * src, register u16 * dst, register u32 size) {
+ mov ip, #0
+_037FB31C:
+ cmp ip, r2
+ ldrlth r3, [r0, ip]
+ strlth r3, [r1, ip]
+ addlt ip, ip, #2
+ blt _037FB31C
+ bx lr
+}
+
+asm void MIi_CpuClear32(register u32 value, register u32 * dst, register u32 size) {
+ add ip, r1, r2
+_037FB338:
+ cmp r1, ip
+ stmltia r1!, {r0}
+ blt _037FB338
+ bx lr
+}
+
+asm void MIi_CpuCopy32(register u32 * src, register u32 * dst, register u32 size) {
+ add ip, r1, r2
+_037FB34C:
+ cmp r1, ip
+ ldmltia r0!, {r2}
+ stmltia r1!, {r2}
+ blt _037FB34C
+ bx lr
+}
+
+asm void MIi_CpuClearFast(register u32 value, register u32 * dst, register u32 size) {
+ stmdb sp!, {r4, r5, r6, r7, r8, r9}
+ add r9, r1, r2
+ mov ip, r2, lsr #5
+ add ip, r1, ip, lsl #5
+ mov r2, r0
+ mov r3, r2
+ mov r4, r2
+ mov r5, r2
+ mov r6, r2
+ mov r7, r2
+ mov r8, r2
+_037FB38C:
+ cmp r1, ip
+ stmltia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
+ blt _037FB38C
+_037FB398:
+ cmp r1, r9
+ stmltia r1!, {r0}
+ blt _037FB398
+ ldmia sp!, {r4, r5, r6, r7, r8, r9}
+ bx lr
+}
+
+asm void MIi_CpuCopyFast(register u32 * src, register u32 * dst, register u32 size) {
+ stmdb sp!, {r4-r9, r10}
+ add r10, r1, r2
+ mov ip, r2, lsr #5
+ add ip, r1, ip, lsl #5
+_037FB3BC:
+ cmp r1, ip
+ ldmltia r0!, {r2-r9}
+ stmltia r1!, {r2-r9}
+ blt _037FB3BC
+_037FB3CC:
+ cmp r1, r10
+ ldmltia r0!, {r2}
+ stmltia r1!, {r2}
+ blt _037FB3CC
+ ldmia sp!, {r4-r9, r10}
+ bx lr
+}
+
+asm void MI_CpuFill8(register u8 value, register u8 * dst, register u32 size) {
+ cmp r2, #0
+ bxeq lr
+ tst r0, #1
+ beq _037FB410
+ ldrh ip, [r0, #-1]
+ and ip, ip, #0xff
+ orr r3, ip, r1, lsl #8
+ strh r3, [r0, #-1]
+ add r0, r0, #1
+ subs r2, r2, #1
+ bxeq lr
+_037FB410:
+ cmp r2, #2
+ bcc _037FB458
+ orr r1, r1, r1, lsl #8
+ tst r0, #2
+ beq _037FB430
+ strh r1, [r0], #2
+ subs r2, r2, #2
+ bxeq lr
+_037FB430:
+ orr r1, r1, r1, lsl #16
+ bics r3, r2, #3
+ beq _037FB450
+ sub r2, r2, r3
+ add ip, r3, r0
+_037FB444:
+ str r1, [r0], #4
+ cmp r0, ip
+ bcc _037FB444
+_037FB450:
+ tst r2, #2
+ strneh r1, [r0], #2
+_037FB458:
+ tst r2, #1
+ bxeq lr
+ ldrh r3, [r0]
+ and r3, r3, #0xff00
+ and r1, r1, #0xff
+ orr r1, r1, r3
+ strh r1, [r0]
+ bx lr
+}
+
+asm void MI_CpuCopy8(register u8 * src, register u8 * dst, u32 size) {
+ cmp r2, #0
+ bxeq lr
+ tst r1, #1
+ beq _037FB4B8
+ ldrh ip, [r1, #-1]
+ and ip, ip, #0xff
+ tst r0, #1
+ ldrneh r3, [r0, #-1]
+ movne r3, r3, lsr #8
+ ldreqh r3, [r0]
+ orr r3, ip, r3, lsl #8
+ strh r3, [r1, #-1]
+ add r0, r0, #1
+ add r1, r1, #1
+ subs r2, r2, #1
+ bxeq lr
+_037FB4B8:
+ eor ip, r1, r0
+ tst ip, #1
+ beq _037FB50C
+ bic r0, r0, #1
+ ldrh ip, [r0], #2
+ mov r3, ip, lsr #8
+ subs r2, r2, #2
+ bcc _037FB4F0
+_037FB4D8:
+ ldrh ip, [r0], #2
+ orr ip, r3, ip, lsl #8
+ strh ip, [r1], #2
+ mov r3, ip, lsr #16
+ subs r2, r2, #2
+ bcs _037FB4D8
+_037FB4F0:
+ tst r2, #1
+ bxeq lr
+ ldrh ip, [r1]
+ and ip, ip, #0xff00
+ orr ip, ip, r3
+ strh ip, [r1]
+ bx lr
+_037FB50C:
+ tst ip, #2
+ beq _037FB538
+ bics r3, r2, #1
+ beq _037FB584
+ sub r2, r2, r3
+ add ip, r3, r1
+_037FB524:
+ ldrh r3, [r0], #2
+ strh r3, [r1], #2
+ cmp r1, ip
+ bcc _037FB524
+ b _037FB584
+_037FB538:
+ cmp r2, #2
+ bcc _037FB584
+ tst r1, #2
+ beq _037FB558
+ ldrh r3, [r0], #2
+ strh r3, [r1], #2
+ subs r2, r2, #2
+ bxeq lr
+_037FB558:
+ bics r3, r2, #3
+ beq _037FB578
+ sub r2, r2, r3
+ add ip, r3, r1
+_037FB568:
+ ldr r3, [r0], #4
+ str r3, [r1], #4
+ cmp r1, ip
+ bcc _037FB568
+_037FB578:
+ tst r2, #2
+ ldrneh r3, [r0], #2
+ strneh r3, [r1], #2
+_037FB584:
+ tst r2, #1
+ bxeq lr
+ ldrh r2, [r1]
+ ldrh r0, [r0]
+ and r2, r2, #0xff00
+ and r0, r0, #0xff
+ orr r0, r2, r0
+ strh r0, [r1]
+ bx lr
+}
diff --git a/arm7/lib/src/MI_swap.c b/arm7/lib/src/MI_swap.c
new file mode 100644
index 00000000..71e523f8
--- /dev/null
+++ b/arm7/lib/src/MI_swap.c
@@ -0,0 +1,6 @@
+#include "MI_swap.h"
+
+asm u32 MI_SwapWord(register u32 data, register u32 * dst) {
+ swp r0, r0, [r1]
+ bx lr
+}
diff --git a/arm7/lib/src/OS_init.c b/arm7/lib/src/OS_init.c
index f4972638..583bb75e 100644
--- a/arm7/lib/src/OS_init.c
+++ b/arm7/lib/src/OS_init.c
@@ -7,7 +7,6 @@ extern void OS_InitIrqTable(void);
extern void OS_InitTick(void);
extern void OS_InitAlarm(void);
extern void OS_InitThread(void);
-extern void OS_InitReset(void);
extern void CTRDG_Init(void);
ARM_FUNC void OS_Init(void)
diff --git a/arm7/lib/src/OS_reset.c b/arm7/lib/src/OS_reset.c
new file mode 100644
index 00000000..c40fcff3
--- /dev/null
+++ b/arm7/lib/src/OS_reset.c
@@ -0,0 +1,59 @@
+#include "function_target.h"
+#include "OS_reset.h"
+#include "OS_interrupt.h"
+
+static u16 OSi_IsInitReset = 0;
+vu16 OSi_IsResetOccurred = 0;
+
+extern void MI_StopDma(u32 dma);
+extern OSIrqMask OS_SetIrqMask(OSIrqMask mask);
+extern OSIrqMask OS_ResetRequestIrqMask(OSIrqMask mask);
+extern void SND_Shutdown(void);
+extern void PXI_SetFifoRecvCallback(u32 param1, void* callback);
+extern void OS_Terminate(void);
+extern u32 PXI_SendWordByFifo(u32 param1, u32 data, u32 param2);
+extern void FUN_038073EC(void); //OSi_DoResetSystem, in wram
+
+ARM_FUNC void OS_InitReset(void)
+{
+ if (OSi_IsInitReset)
+ return;
+ OSi_IsInitReset = TRUE;
+
+ PXI_SetFifoRecvCallback(PXI_FIFO_TAG_OS, OSi_CommonCallback);
+}
+
+ARM_FUNC BOOL OS_IsResetOccurred(void)
+{
+ return OSi_IsResetOccurred;
+}
+
+ARM_FUNC static void OSi_CommonCallback(PXIFifoTag tag, u32 data, BOOL err)
+{
+#pragma unused(tag, err)
+ u16 command = (u16)((data & OS_PXI_COMMAND_MASK) >> OS_PXI_COMMAND_SHIFT);
+ if (command == OS_PXI_COMMAND_RESET)
+ {
+ OSi_IsResetOccurred = TRUE;
+ return;
+ }
+ OS_Terminate();
+}
+
+ARM_FUNC static void OSi_SendToPxi(u16 data)
+{
+ while (PXI_SendWordByFifo(PXI_FIFO_TAG_OS, (u32) data << 0x8, FALSE)) {}
+}
+
+ARM_FUNC void OS_ResetSystem(void) {
+ MI_StopDma(0);
+ MI_StopDma(1);
+ MI_StopDma(2);
+ MI_StopDma(3);
+
+ (void)OS_SetIrqMask(0x40000);
+ (void)OS_ResetRequestIrqMask((u32)~0);
+ SND_Shutdown();
+ OSi_SendToPxi(OS_PXI_COMMAND_RESET);
+ FUN_038073EC(); //OSi_DoResetSystem, in wram
+}
diff --git a/arm9/asm/OS_irqTable.s b/arm9/asm/OS_irqTable.s
deleted file mode 100644
index e42d600b..00000000
--- a/arm9/asm/OS_irqTable.s
+++ /dev/null
@@ -1,163 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- ; pragma section DTCM begin
- .section .dtcm
- .balign 16, 0
- .global OS_IRQTable
-OS_IRQTable: ; 027E0000 ;10b6a0
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OSi_IrqTimer0
- .word OSi_IrqTimer1
- .word OSi_IrqTimer2
- .word OSi_IrqTimer3
- .word OS_IrqDummy
- .word OSi_IrqDma0
- .word OSi_IrqDma1
- .word OSi_IrqDma2
- .word OSi_IrqDma3
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
- .word OS_IrqDummy
-
- ; pragma section DTCM end
-
- .section .bss
- .global OSi_IrqCallbackInfo
-OSi_IrqCallbackInfo: ; 0x021D341C
- .space 0x60
-
- .section .data
- .global OSi_IrqCallbackInfoIndex
-OSi_IrqCallbackInfoIndex: ; 0x02106818
- .short 8
- .short 9
- .short 10
- .short 11
- .short 3
- .short 4
- .short 5
- .short 6
-
- .section .text
-
- arm_func_start OSi_IrqTimer3
-OSi_IrqTimer3: ; 0x020C9C8C
- ldr ip, _020C9C98 ; =OSi_IrqCallback
- mov r0, #0x7
- bx r12
- .balign 4
-_020C9C98: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqTimer2
-OSi_IrqTimer2: ; 0x020C9C9C
- ldr ip, _020C9CA8 ; =OSi_IrqCallback
- mov r0, #0x6
- bx r12
- .balign 4
-_020C9CA8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqTimer1
-OSi_IrqTimer1: ; 0x020C9CAC
- ldr ip, _020C9CB8 ; =OSi_IrqCallback
- mov r0, #0x5
- bx r12
- .balign 4
-_020C9CB8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqTimer0
-OSi_IrqTimer0: ; 0x020C9CBC
- ldr ip, _020C9CC8 ; =OSi_IrqCallback
- mov r0, #0x4
- bx r12
- .balign 4
-_020C9CC8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqDma3
-OSi_IrqDma3: ; 0x020C9CCC
- ldr ip, _020C9CD8 ; =OSi_IrqCallback
- mov r0, #0x3
- bx r12
- .balign 4
-_020C9CD8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqDma2
-OSi_IrqDma2: ; 0x020C9CDC
- ldr ip, _020C9CE8 ; =OSi_IrqCallback
- mov r0, #0x2
- bx r12
- .balign 4
-_020C9CE8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqDma1
-OSi_IrqDma1: ; 0x020C9CEC
- ldr ip, _020C9CF8 ; =OSi_IrqCallback
- mov r0, #0x1
- bx r12
- .balign 4
-_020C9CF8: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqDma0
-OSi_IrqDma0: ; 0x020C9CFC
- ldr ip, _020C9D08 ; =OSi_IrqCallback
- mov r0, #0x0
- bx r12
- .balign 4
-_020C9D08: .word OSi_IrqCallback
-
- arm_func_start OSi_IrqCallback
-OSi_IrqCallback: ; 0x020C9D0C
- stmdb sp!, {r4-r5,lr}
- sub sp, sp, #0x4
- mov r1, #0xc
- mul r4, r0, r1
- ldr r2, _020C9D94 ; =OSi_IrqCallbackInfo
- ldr r3, _020C9D98 ; =OSi_IrqCallbackInfoIndex
- mov r0, r0, lsl #0x1
- ldr r1, [r2, r4]
- ldrh r3, [r3, r0]
- mov r5, #0x1
- mov r0, #0x0
- str r0, [r2, r4]
- cmp r1, #0x0
- mov r5, r5, lsl r3
- beq _020C9D54
- ldr r0, _020C9D9C ; =OSi_IrqCallbackInfo + 8
- ldr r0, [r0, r4]
- blx r1
-_020C9D54:
- ldr r0, _020C9DA0 ; =SDK_AUTOLOAD_DTCM_START
- ldr r1, _020C9DA4 ; =OSi_IrqCallbackInfo + 4
- add r0, r0, #0x3000
- ldr r2, [r0, #0xff8]
- orr r2, r2, r5
- str r2, [r0, #0xff8]
- ldr r0, [r1, r4]
- cmp r0, #0x0
- addne sp, sp, #0x4
- ldmneia sp!, {r4-r5,lr}
- bxne lr
- mov r0, r5
- bl OS_DisableIrqMask
- add sp, sp, #0x4
- ldmia sp!, {r4-r5,lr}
- bx lr
- .balign 4
-_020C9D94: .word OSi_IrqCallbackInfo
-_020C9D98: .word OSi_IrqCallbackInfoIndex
-_020C9D9C: .word OSi_IrqCallbackInfo + 8
-_020C9DA0: .word SDK_AUTOLOAD_DTCM_START
-_020C9DA4: .word OSi_IrqCallbackInfo + 4
-
- arm_func_start OS_IrqDummy
-OS_IrqDummy: ; 0x020C9DA8
- bx lr
diff --git a/arm9/lib/include/OS_init.h b/arm9/lib/include/OS_init.h
index baa2f442..3c8aea24 100644
--- a/arm9/lib/include/OS_init.h
+++ b/arm9/lib/include/OS_init.h
@@ -19,6 +19,7 @@
#include "OS_system.h"
#include "OS_terminate_proc.h"
#include "OS_irqHandler.h"
+#include "OS_irqTable.h"
#include "OS_interrupt.h"
#include "OS_reset.h"
#include "OS_spinLock.h"
diff --git a/arm9/lib/include/OS_interrupt.h b/arm9/lib/include/OS_interrupt.h
index 6ffa3a10..ec58a636 100644
--- a/arm9/lib/include/OS_interrupt.h
+++ b/arm9/lib/include/OS_interrupt.h
@@ -1,7 +1,8 @@
-#ifndef POKEDIAMOND_OS_INTERRUPT_H
-#define POKEDIAMOND_OS_INTERRUPT_H
+#ifndef POKEDIAMOND_ARM9_OS_INTERRUPT_H
+#define POKEDIAMOND_ARM9_OS_INTERRUPT_H
#include "nitro/types.h"
+#include "nitro/OS_interrupt_shared.h"
typedef void (*OSIrqFunction) (void);
@@ -12,8 +13,6 @@ typedef struct
void* arg;
} OSIrqCallbackInfo;
-typedef u32 OSIrqMask;
-
extern OSIrqFunction OS_IRQTable[];
extern OSIrqCallbackInfo OSi_IrqCallbackInfo[8];
@@ -28,4 +27,4 @@ OSIrqMask OS_DisableIrqMask(OSIrqMask mask);
OSIrqMask OS_ResetRequestIrqMask(OSIrqMask mask);
void OS_SetIrqStackChecker(void);
-#endif //POKEDIAMOND_OS_INTERRUPT_H
+#endif //POKEDIAMOND_ARM9_OS_INTERRUPT_H
diff --git a/arm9/lib/include/OS_irqTable.h b/arm9/lib/include/OS_irqTable.h
new file mode 100644
index 00000000..8cd7b7b3
--- /dev/null
+++ b/arm9/lib/include/OS_irqTable.h
@@ -0,0 +1,23 @@
+#ifndef POKEDIAMOND_OS_IRQTABLE_H
+#define POKEDIAMOND_OS_IRQTABLE_H
+
+#include "consts.h"
+#include "OS_interrupt.h"
+
+void OS_IrqDummy(void);
+void OSi_IrqCallback(s32 index);
+void OSi_IrqDma0(void);
+void OSi_IrqDma1(void);
+void OSi_IrqDma2(void);
+void OSi_IrqDma3(void);
+void OSi_IrqTimer0(void);
+void OSi_IrqTimer1(void);
+void OSi_IrqTimer2(void);
+void OSi_IrqTimer3(void);
+
+static inline void OS_SetIrqCheckFlag(OSIrqMask intr)
+{
+ *(vu32 *)HW_INTR_CHECK_BUF |= (u32)intr;
+}
+
+#endif //POKEDIAMOND_OS_IRQTABLE_H
diff --git a/arm9/lib/include/OS_reset.h b/arm9/lib/include/OS_reset.h
index cb7680d1..ef62184b 100644
--- a/arm9/lib/include/OS_reset.h
+++ b/arm9/lib/include/OS_reset.h
@@ -1,17 +1,10 @@
-//
-// Created by red031000 on 2020-05-06.
-//
-
-#ifndef POKEDIAMOND_OS_RESET_H
-#define POKEDIAMOND_OS_RESET_H
+#ifndef POKEDIAMOND_ARM9_OS_RESET_H
+#define POKEDIAMOND_ARM9_OS_RESET_H
#include "consts.h"
+#include "nitro/OS_reset_shared.h"
#include "PXI_fifo.h"
-#define OS_PXI_COMMAND_MASK 0x7f00
-#define OS_PXI_COMMAND_SHIFT 8
-#define OS_PXI_COMMAND_RESET 0x10
-
void OS_InitReset(void);
static void OSi_CommonCallback(PXIFifoTag tag, u32 data, BOOL err);
static void OSi_SendToPxi(u16 data);
@@ -27,4 +20,4 @@ static inline u32 OS_GetResetParameter(void)
return (u32)*(u32 *)HW_RESET_PARAMETER_BUF;
}
-#endif //POKEDIAMOND_OS_RESET_H
+#endif //POKEDIAMOND_ARM9_OS_RESET_H
diff --git a/arm9/lib/include/PXI_fifo.h b/arm9/lib/include/PXI_fifo.h
index 1d45dda2..45caa906 100644
--- a/arm9/lib/include/PXI_fifo.h
+++ b/arm9/lib/include/PXI_fifo.h
@@ -1,33 +1,6 @@
-//
-// Created by red031000 on 2020-05-06.
-//
+#ifndef POKEDIAMOND_ARM9_PXI_FIFO_H
+#define POKEDIAMOND_ARM9_PXI_FIFO_H
-#ifndef POKEDIAMOND_PXI_FIFO_H
-#define POKEDIAMOND_PXI_FIFO_H
+#include "nitro/PXI_fifo_shared.h"
-#include "function_target.h"
-
-ENUMS_ALWAYS_INT_ON
-typedef enum {
- PXI_FIFO_TAG_EX = 0, // Extension format
- PXI_FIFO_TAG_USER_0, // for application programmer, use it in free
- PXI_FIFO_TAG_USER_1, // for application programmer, use it in free
- PXI_FIFO_TAG_SYSTEM, // SDK inner usage
- PXI_FIFO_TAG_NVRAM, // NVRAM
- PXI_FIFO_TAG_RTC, // RTC
- PXI_FIFO_TAG_TOUCHPANEL, // Touch Panel
- PXI_FIFO_TAG_SOUND, // Sound
- PXI_FIFO_TAG_PM, // Power Management
- PXI_FIFO_TAG_MIC, // Microphone
- PXI_FIFO_TAG_WM, // Wireless Manager
- PXI_FIFO_TAG_FS, // File System
- PXI_FIFO_TAG_OS, // OS
- PXI_FIFO_TAG_CTRDG, // Cartridge
- PXI_FIFO_TAG_CARD, // Card
- PXI_FIFO_TAG_WVR, // Control driving wireless library
- PXI_FIFO_TAG_CTRDG_Ex, // Cartridge Ex
- PXI_MAX_FIFO_TAG = 32 // MAX FIFO TAG
-} PXIFifoTag;
-ENUMS_ALWAYS_INT_RESET
-
-#endif //POKEDIAMOND_PXI_FIFO_H
+#endif //POKEDIAMOND_ARM9_PXI_FIFO_H
diff --git a/arm9/lib/include/mmap.h b/arm9/lib/include/mmap.h
index d0e73aec..6a5f23c5 100644
--- a/arm9/lib/include/mmap.h
+++ b/arm9/lib/include/mmap.h
@@ -27,7 +27,6 @@ extern u32 SDK_AUTOLOAD_DTCM_START[];
#define HW_RESET_PARAMETER_BUF (HW_MAIN_MEM + 0x007ffc20)
#define HW_ROM_BASE_OFFSET_BUF (HW_MAIN_MEM + 0x007ffc2c)
-#define HW_WM_BOOT_BUF (HW_MAIN_MEM + 0x007ffc40)
#define HW_ROM_HEADER_BUF (HW_MAIN_MEM + 0x007ffe00) // ROM registration area data buffer
#define HW_RED_RESERVED (HW_MAIN_MEM + 0x007ff800) // Some kind of reserved data for shared memory
#define HW_MAIN_MEM_SYSTEM (HW_MAIN_MEM + 0x007ffc00)
diff --git a/arm9/lib/src/OS_irqTable.c b/arm9/lib/src/OS_irqTable.c
new file mode 100644
index 00000000..cc2a3a55
--- /dev/null
+++ b/arm9/lib/src/OS_irqTable.c
@@ -0,0 +1,110 @@
+#include "function_target.h"
+#include "sections.h"
+#include "OS_irqTable.h"
+
+#pragma section DTCM begin
+OSIrqFunction OS_IRQTable[22] = {
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OSi_IrqTimer0,
+ OSi_IrqTimer1,
+ OSi_IrqTimer2,
+ OSi_IrqTimer3,
+ OS_IrqDummy,
+ OSi_IrqDma0,
+ OSi_IrqDma1,
+ OSi_IrqDma2,
+ OSi_IrqDma3,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy,
+ OS_IrqDummy
+};
+#pragma section DTCM end
+
+OSIrqCallbackInfo OSi_IrqCallbackInfo[8] = {
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+ {NULL, 0, 0},
+};
+
+static u16 OSi_IrqCallbackInfoIndex[8] = {
+ 8, 9, 10, 11, 3, 4, 5, 6
+};
+
+ARM_FUNC void OS_IrqDummy(void)
+{
+ //noop
+}
+
+ARM_FUNC void OSi_IrqCallback(s32 index)
+{
+ OSIrqMask mask = (1UL << OSi_IrqCallbackInfoIndex[index]);
+ void (*callback)(void *) = OSi_IrqCallbackInfo[index].func;
+
+ OSi_IrqCallbackInfo[index].func = NULL;
+
+ if (callback)
+ {
+ (callback)(OSi_IrqCallbackInfo[index].arg);
+ }
+
+ OS_SetIrqCheckFlag(mask);
+
+ if (!OSi_IrqCallbackInfo[index].enable)
+ {
+ (void)OS_DisableIrqMask(mask);
+ }
+}
+
+ARM_FUNC void OSi_IrqDma0(void)
+{
+ OSi_IrqCallback(0);
+}
+
+ARM_FUNC void OSi_IrqDma1(void)
+{
+ OSi_IrqCallback(1);
+}
+
+ARM_FUNC void OSi_IrqDma2(void)
+{
+ OSi_IrqCallback(2);
+}
+
+ARM_FUNC void OSi_IrqDma3(void)
+{
+ OSi_IrqCallback(3);
+}
+
+ARM_FUNC void OSi_IrqTimer0(void)
+{
+ OSi_IrqCallback(4);
+}
+
+ARM_FUNC void OSi_IrqTimer1(void)
+{
+ OSi_IrqCallback(5);
+}
+
+ARM_FUNC void OSi_IrqTimer2(void)
+{
+ OSi_IrqCallback(6);
+}
+
+ARM_FUNC void OSi_IrqTimer3(void)
+{
+ OSi_IrqCallback(7);
+}
diff --git a/arm9/lib/src/OS_reset.c b/arm9/lib/src/OS_reset.c
index 0857bf0b..f22b0e3c 100644
--- a/arm9/lib/src/OS_reset.c
+++ b/arm9/lib/src/OS_reset.c
@@ -1,7 +1,3 @@
-//
-// Created by red031000 on 2020-05-06.
-//
-
#include "function_target.h"
#include "OS_reset.h"
#include "MB_mb.h"
diff --git a/include/nitro/OS_interrupt_shared.h b/include/nitro/OS_interrupt_shared.h
new file mode 100644
index 00000000..97bed8b1
--- /dev/null
+++ b/include/nitro/OS_interrupt_shared.h
@@ -0,0 +1,20 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_interrupt.h from the specific proc's lib
+ */
+
+#ifndef POKEDIAMOND_OS_INTERRUPT_SHARED_H
+#define POKEDIAMOND_OS_INTERRUPT_SHARED_H
+
+#include "nitro/types.h"
+
+typedef u32 OSIrqMask;
+
+#endif //POKEDIAMOND_OS_INTERRUPT_SHARED_H
diff --git a/include/nitro/OS_reset_shared.h b/include/nitro/OS_reset_shared.h
new file mode 100644
index 00000000..22f0b972
--- /dev/null
+++ b/include/nitro/OS_reset_shared.h
@@ -0,0 +1,20 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_reset.h from the specific proc's lib
+ */
+
+#ifndef POKEDIAMOND_OS_RESET_SHARED_H
+#define POKEDIAMOND_OS_RESET_SHARED_H
+
+#define OS_PXI_COMMAND_MASK 0x7f00
+#define OS_PXI_COMMAND_SHIFT 8
+#define OS_PXI_COMMAND_RESET 0x10
+
+#endif //POKEDIAMOND_OS_RESET_SHARED_H
diff --git a/include/nitro/PXI_fifo_shared.h b/include/nitro/PXI_fifo_shared.h
new file mode 100644
index 00000000..2698e89d
--- /dev/null
+++ b/include/nitro/PXI_fifo_shared.h
@@ -0,0 +1,37 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include PXI_fifo.h from the specific proc's lib
+ */
+
+#ifndef POKEDIAMOND_PXI_FIFO_SHARED_H
+#define POKEDIAMOND_PXI_FIFO_SHARED_H
+
+typedef enum {
+ PXI_FIFO_TAG_EX = 0, // Extension format
+ PXI_FIFO_TAG_USER_0, // for application programmer, use it in free
+ PXI_FIFO_TAG_USER_1, // for application programmer, use it in free
+ PXI_FIFO_TAG_SYSTEM, // SDK inner usage
+ PXI_FIFO_TAG_NVRAM, // NVRAM
+ PXI_FIFO_TAG_RTC, // RTC
+ PXI_FIFO_TAG_TOUCHPANEL, // Touch Panel
+ PXI_FIFO_TAG_SOUND, // Sound
+ PXI_FIFO_TAG_PM, // Power Management
+ PXI_FIFO_TAG_MIC, // Microphone
+ PXI_FIFO_TAG_WM, // Wireless Manager
+ PXI_FIFO_TAG_FS, // File System
+ PXI_FIFO_TAG_OS, // OS
+ PXI_FIFO_TAG_CTRDG, // Cartridge
+ PXI_FIFO_TAG_CARD, // Card
+ PXI_FIFO_TAG_WVR, // Control driving wireless library
+ PXI_FIFO_TAG_CTRDG_Ex, // Cartridge Ex
+ PXI_MAX_FIFO_TAG = 32 // MAX FIFO TAG
+} PXIFifoTag;
+
+#endif //POKEDIAMOND_PXI_FIFO_SHARED_H
diff --git a/include/nitro/dma.h b/include/nitro/dma.h
new file mode 100644
index 00000000..32944cb3
--- /dev/null
+++ b/include/nitro/dma.h
@@ -0,0 +1,25 @@
+#ifndef GUARD_DMA_H
+#define GUARD_DMA_H
+
+#define REG_ADDR_DMA0SAD 0x040000b0
+
+#define DMA_DEST_INC 0x0000
+#define DMA_DEST_DEC 0x0020
+#define DMA_DEST_FIXED 0x0040
+#define DMA_DEST_RELOAD 0x0060
+#define DMA_SRC_INC 0x0000
+#define DMA_SRC_DEC 0x0080
+#define DMA_SRC_FIXED 0x0100
+#define DMA_REPEAT 0x0200
+#define DMA_16BIT 0x0000
+#define DMA_32BIT 0x0400
+#define DMA_DREQ_ON 0x0800
+#define DMA_START_NOW 0x0000
+#define DMA_START_VBLANK 0x1000
+#define DMA_START_HBLANK 0x2000
+#define DMA_START_SPECIAL 0x3000
+#define DMA_START_MASK 0x3000
+#define DMA_INTR_ENABLE 0x4000
+#define DMA_ENABLE 0x8000
+
+#endif
diff --git a/include/nitro/mmap_shared.h b/include/nitro/mmap_shared.h
index ad97c912..587887bb 100644
--- a/include/nitro/mmap_shared.h
+++ b/include/nitro/mmap_shared.h
@@ -18,6 +18,7 @@
#define HW_MAIN_MEM_MAIN_SIZE 0x003E0000
#define HW_MAIN_MEM_SHARED_SIZE 0x00001000
+#define HW_WM_BOOT_BUF (HW_MAIN_MEM + 0x007ffc40)
#define HW_ARENA_INFO_BUF (HW_MAIN_MEM + 0x007ffda0)
#define HW_MAIN_MEM_MAIN_END (HW_MAIN_MEM + HW_MAIN_MEM_MAIN_SIZE)