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-rw-r--r--arm7/lib/include/MI_memory.h6
-rw-r--r--arm9/asm/MI_memory.s287
-rw-r--r--arm9/lib/include/MI_memory.h31
-rw-r--r--arm9/lib/include/gx.h3
-rw-r--r--arm9/lib/src/GX_g3imm.c2
-rw-r--r--arm9/lib/src/GX_g3x.c4
-rw-r--r--arm9/lib/src/MI_memory.c339
7 files changed, 361 insertions, 311 deletions
diff --git a/arm7/lib/include/MI_memory.h b/arm7/lib/include/MI_memory.h
index 53398ec5..1e0de0b9 100644
--- a/arm7/lib/include/MI_memory.h
+++ b/arm7/lib/include/MI_memory.h
@@ -1,5 +1,5 @@
-#ifndef GUARD_MI_MEMORY_H
-#define GUARD_MI_MEMORY_H
+#ifndef POKEDIAMOND_ARM7_MI_MEMORY_H
+#define POKEDIAMOND_ARM7_MI_MEMORY_H
#include "nitro/types.h"
@@ -22,4 +22,4 @@ static inline void MI_CpuClear32(void *dest, u32 size)
MI_CpuFill32(dest, 0, size);
}
-#endif
+#endif //POKEDIAMOND_ARM7_MI_MEMORY_H
diff --git a/arm9/asm/MI_memory.s b/arm9/asm/MI_memory.s
deleted file mode 100644
index ca664393..00000000
--- a/arm9/asm/MI_memory.s
+++ /dev/null
@@ -1,287 +0,0 @@
- .include "asm/macros.inc"
- .include "global.inc"
-
- .text
-
- arm_func_start MIi_CpuClear16
-MIi_CpuClear16: ; 0x020CE1C8
- mov r3, #0x0
-_020CE1CC:
- cmp r3, r2
- strlth r0, [r1, r3]
- addlt r3, r3, #0x2
- blt _020CE1CC
- bx lr
-
- arm_func_start MIi_CpuCopy16
-MIi_CpuCopy16: ; 0x020CE1E0
- mov r12, #0x0
-_020CE1E4:
- cmp r12, r2
- ldrlth r3, [r0, r12]
- strlth r3, [r1, r12]
- addlt r12, r12, #0x2
- blt _020CE1E4
- bx lr
-
- arm_func_start MIi_CpuClear32
-MIi_CpuClear32: ; 0x020CE1FC
- add r12, r1, r2
-_020CE200:
- cmp r1, r12
- stmltia r1!, {r0}
- blt _020CE200
- bx lr
-
- arm_func_start MIi_CpuCopy32
-MIi_CpuCopy32: ; 0x020CE210
- add r12, r1, r2
-_020CE214:
- cmp r1, r12
- ldmltia r0!, {r2}
- stmltia r1!, {r2}
- blt _020CE214
- bx lr
-
- arm_func_start MIi_CpuSend32
-MIi_CpuSend32: ; 0x020CE228
- add r12, r0, r2
-_020CE22C:
- cmp r0, r12
- ldmltia r0!, {r2}
- strlt r2, [r1, #0x0]
- blt _020CE22C
- bx lr
-
- arm_func_start MIi_CpuClearFast
-MIi_CpuClearFast: ; 0x020CE240
- stmdb sp!, {r4-r9}
- add r9, r1, r2
- mov r12, r2, lsr #0x5
- add r12, r1, r12, lsl #0x5
- mov r2, r0
- mov r3, r2
- mov r4, r2
- mov r5, r2
- mov r6, r2
- mov r7, r2
- mov r8, r2
-_020CE26C:
- cmp r1, r12
- stmltia r1!, {r0,r2-r8}
- blt _020CE26C
-_020CE278:
- cmp r1, r9
- stmltia r1!, {r0}
- blt _020CE278
- ldmia sp!, {r4-r9}
- bx lr
-
- arm_func_start MIi_CpuCopyFast
-MIi_CpuCopyFast: ; 0x020CE28C
- stmdb sp!, {r4-r10}
- add r10, r1, r2
- mov r12, r2, lsr #0x5
- add r12, r1, r12, lsl #0x5
-_020CE29C:
- cmp r1, r12
- ldmltia r0!, {r2-r9}
- stmltia r1!, {r2-r9}
- blt _020CE29C
-_020CE2AC:
- cmp r1, r10
- ldmltia r0!, {r2}
- stmltia r1!, {r2}
- blt _020CE2AC
- ldmia sp!, {r4-r10}
- bx lr
-
- arm_func_start MI_Copy16B
-MI_Copy16B:
- ldmia r0!, {r2, r3, ip}
- stmia r1!, {r2, r3, ip}
- ldmia r0!, {r2, r3, ip}
- stmia r1!, {r2, r3, ip}
- ldmia r0!, {r2, r3}
- stmia r1!, {r2, r3}
- bx lr
-
- arm_func_start MI_Copy36B
-MI_Copy36B: ; 0x020CE2E0
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- bx lr
-
- arm_func_start MI_Copy48B
-MI_Copy48B: ; 0x020CE2FC
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- bx lr
-
- arm_func_start MI_Copy64B
-MI_Copy64B: ; 0x020CE320
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0!, {r2-r3,r12}
- stmia r1!, {r2-r3,r12}
- ldmia r0, {r0,r2-r3,r12}
- stmia r1!, {r0,r2-r3,r12}
- bx lr
-
- arm_func_start MI_CpuFill8
-MI_CpuFill8: ; 0x020CE34C
- cmp r2, #0x0
- bxeq lr
- tst r0, #0x1
- beq _020CE378
- ldrh r12, [r0, #-0x1]
- and r12, r12, #0xff
- orr r3, r12, r1, lsl #0x8
- strh r3, [r0, #-0x1]
- add r0, r0, #0x1
- subs r2, r2, #0x1
- bxeq lr
-_020CE378:
- cmp r2, #0x2
- blo _020CE3C0
- orr r1, r1, r1, lsl #0x8
- tst r0, #0x2
- beq _020CE398
- strh r1, [r0], #0x2
- subs r2, r2, #0x2
- bxeq lr
-_020CE398:
- orr r1, r1, r1, lsl #0x10
- bics r3, r2, #0x3
- beq _020CE3B8
- sub r2, r2, r3
- add r12, r3, r0
-_020CE3AC:
- str r1, [r0], #0x4
- cmp r0, r12
- blo _020CE3AC
-_020CE3B8:
- tst r2, #0x2
- strneh r1, [r0], #0x2
-_020CE3C0:
- tst r2, #0x1
- bxeq lr
- ldrh r3, [r0, #0x0]
- and r3, r3, #0xff00
- and r1, r1, #0xff
- orr r1, r1, r3
- strh r1, [r0, #0x0]
- bx lr
-
- arm_func_start MI_CpuCopy8
-MI_CpuCopy8:
- cmp r2, #0x0
- bxeq lr
- tst r1, #0x1
- beq _020CE420
- ldrh r12, [r1, #-0x1]
- and r12, r12, #0xff
- tst r0, #0x1
- ldrneh r3, [r0, #-0x1]
- movne r3, r3, lsr #0x8
- ldreqh r3, [r0, #0x0]
- orr r3, r12, r3, lsl #0x8
- strh r3, [r1, #-0x1]
- add r0, r0, #0x1
- add r1, r1, #0x1
- subs r2, r2, #0x1
- bxeq lr
-_020CE420:
- eor r12, r1, r0
- tst r12, #0x1
- beq _020CE474
- bic r0, r0, #0x1
- ldrh r12, [r0], #0x2
- mov r3, r12, lsr #0x8
- subs r2, r2, #0x2
- blo _020CE458
-_020CE440:
- ldrh r12, [r0], #0x2
- orr r12, r3, r12, lsl #0x8
- strh r12, [r1], #0x2
- mov r3, r12, lsr #0x10
- subs r2, r2, #0x2
- bhs _020CE440
-_020CE458:
- tst r2, #0x1
- bxeq lr
- ldrh r12, [r1, #0x0]
- and r12, r12, #0xff00
- orr r12, r12, r3
- strh r12, [r1, #0x0]
- bx lr
-_020CE474:
- tst r12, #0x2
- beq _020CE4A0
- bics r3, r2, #0x1
- beq _020CE4EC
- sub r2, r2, r3
- add r12, r3, r1
-_020CE48C:
- ldrh r3, [r0], #0x2
- strh r3, [r1], #0x2
- cmp r1, r12
- blo _020CE48C
- b _020CE4EC
-_020CE4A0:
- cmp r2, #0x2
- blo _020CE4EC
- tst r1, #0x2
- beq _020CE4C0
- ldrh r3, [r0], #0x2
- strh r3, [r1], #0x2
- subs r2, r2, #0x2
- bxeq lr
-_020CE4C0:
- bics r3, r2, #0x3
- beq _020CE4E0
- sub r2, r2, r3
- add r12, r3, r1
-_020CE4D0:
- ldr r3, [r0], #0x4
- str r3, [r1], #0x4
- cmp r1, r12
- blo _020CE4D0
-_020CE4E0:
- tst r2, #0x2
- ldrneh r3, [r0], #0x2
- strneh r3, [r1], #0x2
-_020CE4EC:
- tst r2, #0x1
- bxeq lr
- ldrh r2, [r1, #0x0]
- ldrh r0, [r0, #0x0]
- and r2, r2, #0xff00
- and r0, r0, #0xff
- orr r0, r2, r0
- strh r0, [r1, #0x0]
- bx lr
-
- thumb_func_start MI_Zero36B
-MI_Zero36B: ; 0x020CE510
- mov r1, #0x0
- mov r2, #0x0
- mov r3, #0x0
- stmia r0!, {r1-r3}
- stmia r0!, {r1-r3}
- stmia r0!, {r1-r3}
- bx lr
diff --git a/arm9/lib/include/MI_memory.h b/arm9/lib/include/MI_memory.h
index 981fdc81..01c12f86 100644
--- a/arm9/lib/include/MI_memory.h
+++ b/arm9/lib/include/MI_memory.h
@@ -1,22 +1,29 @@
-#ifndef NITRO_MI_MEMORY_H_
-#define NITRO_MI_MEMORY_H_
+#ifndef POKEDIAMOND_ARM9_MI_MEMORY_H
+#define POKEDIAMOND_ARM9_MI_MEMORY_H
#include "nitro/types.h"
-void MI_CpuFill8(void *dest, u8 data, u32 size);
-void MI_CpuCopy8(void const *src, void *dest, u32 size);
-void MIi_CpuClearFast(u32 data, void *destp, u32 size);
+void MIi_CpuClear16(register u16 data, register void *destp, register u32 size);
+void MIi_CpuCopy16(register const void *srcp, register void *destp, register u32 size);
+void MIi_CpuClear32(register u32 data, register void *destp, register u32 size);
+void MIi_CpuCopy32(register const void *srcp, register void *destp, register u32 size);
+void MIi_CpuSend32(register const void *srcp, volatile void *destp, u32 size);
+void MIi_CpuClearFast(register u32 data, register void *destp, register u32 size);
+void MIi_CpuCopyFast(register const void *srcp, register void *destp, register u32 size);
+void MI_Copy32B(register const void *pSrc, register void *pDest);
+void MI_Copy36B(register const void *pSrc, register void *pDest);
+void MI_Copy48B(register const void *pSrc, register void *pDest);
+void MI_Copy64B(register const void *pSrc, register void *pDest);
+void MI_CpuFill8(register void *dstp, register u8 data, register u32 size);
+void MI_CpuCopy8(register const void *srcp, register void *dstp, register u32 size);
+void MI_Zero36B(register void *pDest);
+
static inline void MI_CpuClearFast(void *destp, u32 size) {
MIi_CpuClearFast(0, destp, size);
}
static inline void MI_CpuClear8(void *dest, u32 size) {
MI_CpuFill8(dest, 0, size);
}
-void MIi_CpuCopy16(const void *src, void *dst, u32 size);
-
-void MIi_CpuClear32(u32 data, void *destp, u32 size);
-
-void MIi_CpuClear16(u16 data, void *destp, u32 size);
static inline void MI_CpuClear16(void * destp, u32 size)
{
@@ -38,6 +45,4 @@ static inline void MI_CpuCopy16(const void *src, void *dest, u32 size)
MIi_CpuCopy16(src, dest, size);
}
-void MIi_CpuClearFast(u32 data, void *destp, u32 size);
-
-#endif //NITRO_MI_MEMORY_H_
+#endif //POKEDIAMOND_ARM9_MI_MEMORY_H
diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h
index f9478851..26f6cfaf 100644
--- a/arm9/lib/include/gx.h
+++ b/arm9/lib/include/gx.h
@@ -9,9 +9,6 @@
//temporary while other files aren't decompiled
void GXi_NopClearFifo128_(void *);
-void MI_Copy16B(const void *, void *);
-void MI_Copy64B(void *src, void *dst);
-void MIi_CpuCopy32(const void *src, void *dst, u32 size);
#include "GXcommon.h"
#include "GX_struct_2d.h"
diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c
index f2129c48..1798338e 100644
--- a/arm9/lib/src/GX_g3imm.c
+++ b/arm9/lib/src/GX_g3imm.c
@@ -1,8 +1,6 @@
#include "global.h"
#include "gx.h"
-void MI_Copy36B(void *src, void *dst);
-
ARM_FUNC void G3_LoadMtx43(struct Mtx43 *mtx){
reg_G3X_GXFIFO = 0x17;
GX_SendFifo48B(mtx, (void *)&reg_G3X_GXFIFO);
diff --git a/arm9/lib/src/GX_g3x.c b/arm9/lib/src/GX_g3x.c
index 41070a9b..9954c4cb 100644
--- a/arm9/lib/src/GX_g3x.c
+++ b/arm9/lib/src/GX_g3x.c
@@ -4,8 +4,6 @@
extern u32 GXi_DmaId;
-void MI_Copy36B(void *src, void *dst);
-
ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){
mov r1, #0x0
mov r2, #0x0
@@ -168,7 +166,7 @@ ARM_FUNC void G3X_SetEdgeColorTable(void *tbl_ptr){
}
ARM_FUNC void G3X_SetFogTable(void *tbl_ptr){
- MI_Copy16B(tbl_ptr, (void *)&reg_G3X_FOG_TABLE_0);
+ MI_Copy32B(tbl_ptr, (void *)&reg_G3X_FOG_TABLE_0);
}
ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){
diff --git a/arm9/lib/src/MI_memory.c b/arm9/lib/src/MI_memory.c
new file mode 100644
index 00000000..a97ff167
--- /dev/null
+++ b/arm9/lib/src/MI_memory.c
@@ -0,0 +1,339 @@
+#include "MI_memory.h"
+#include "function_target.h"
+
+ARM_FUNC asm void MIi_CpuClear16(register u16 data, register void *destp, register u32 size)
+{
+ mov r3, #0
+
+_020CE1CC:
+ cmp r3, r2
+ strlth r0, [r1, r3]
+ addlt r3, r3, #2
+ blt _020CE1CC
+
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuCopy16(register const void *srcp, register void *destp, register u32 size)
+{
+ mov r12, #0
+
+_020CE1CC:
+ cmp r12, r2
+ ldrlth r3, [r0, r12]
+ strlth r3, [r1, r12]
+ addlt r12, r12, #2
+ blt _020CE1CC
+
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuClear32(register u32 data, register void *destp, register u32 size)
+{
+ add r12, r1, r2
+
+_020CE200:
+ cmp r1, r12
+ stmltia r1!, {r0}
+ blt _020CE200
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuCopy32(register const void *srcp, register void *destp, register u32 size)
+{
+ add r12, r1, r2
+
+_020CE214:
+ cmp r1, r12
+ ldmltia r0!, {r2}
+ stmltia r1!, {r2}
+ blt _020CE214
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuSend32(register const void *srcp, volatile void *destp, u32 size)
+{
+ add r12, r0, r2
+
+_020CE22C:
+ cmp r0, r12
+ ldmltia r0!, {r2}
+ strlt r2, [r1]
+ blt _020CE22C
+
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuClearFast(register u32 data, register void *destp, register u32 size)
+{
+ stmfd sp!, {r4-r9}
+
+ add r9, r1, r2
+ mov r12, r2, lsr #5
+ add r12, r1, r12, lsl #5
+
+ mov r2, r0
+ mov r3, r2
+ mov r4, r2
+ mov r5, r2
+ mov r6, r2
+ mov r7, r2
+ mov r8, r2
+
+_020CE26C:
+ cmp r1, r12
+ stmltia r1!, {r0, r2-r8}
+ blt _020CE26C
+_020CE278:
+ cmp r1, r9
+ stmltia r1!, {r0}
+ blt _020CE278
+
+ ldmfd sp!, {r4-r9}
+ bx lr
+}
+
+ARM_FUNC asm void MIi_CpuCopyFast(register const void *srcp, register void *destp, register u32 size)
+{
+ stmfd sp!, {r4-r10}
+
+ add r10, r1, r2
+ mov r12, r2, lsr #5
+ add r12, r1, r12, lsl #5
+
+_020CE29C:
+ cmp r1, r12
+ ldmltia r0!, {r2-r9}
+ stmltia r1!, {r2-r9}
+ blt _020CE29C
+_020CE2AC:
+ cmp r1, r10
+ ldmltia r0!, {r2}
+ stmltia r1!, {r2}
+ blt _020CE2AC
+
+ ldmfd sp!, {r4-r10}
+ bx lr
+}
+
+ARM_FUNC asm void MI_Copy32B(register const void *pSrc, register void *pDest)
+{
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3}
+ stmia r1!, {r2, r3}
+
+ bx lr
+}
+
+ARM_FUNC asm void MI_Copy36B(register const void *pSrc, register void *pDest)
+{
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+
+ bx lr
+}
+
+ARM_FUNC asm void MI_Copy48B(register const void *pSrc, register void *pDest)
+{
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+
+ bx lr
+}
+
+ARM_FUNC asm void MI_Copy64B(register const void *pSrc, register void *pDest)
+{
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0!, {r2, r3, r12}
+ stmia r1!, {r2, r3, r12}
+ ldmia r0, {r0, r2, r3, r12}
+ stmia r1!, {r0, r2, r3, r12}
+
+ bx lr
+}
+
+ARM_FUNC asm void MI_CpuFill8(register void *dstp, register u8 data, register u32 size)
+{
+ cmp r2, #0
+ bxeq lr
+
+ tst r0, #1
+ beq _020CE378
+ ldrh r12, [r0, #-1]
+ and r12, r12, #0x00ff
+ orr r3, r12, r1, lsl #8
+ strh r3, [r0, #-1]
+ add r0, r0, #1
+ subs r2, r2, #1
+ bxeq lr
+
+_020CE378:
+ cmp r2, #2
+ bcc _020CE3C0
+ orr r1, r1, r1, lsl #8
+ tst r0, #2
+ beq _020CE398
+ strh r1, [r0], #2
+ subs r2, r2, #2
+ bxeq lr
+
+_020CE398:
+ orr r1, r1, r1, lsl #16
+ bics r3, r2, #3
+ beq _020CE3B8
+ sub r2, r2, r3
+ add r12, r3, r0
+
+_020CE3AC:
+ str r1, [r0], #4
+ cmp r0, r12
+ bcc _020CE3AC
+
+_020CE3B8:
+ tst r2, #2
+ strneh r1, [r0], #2
+
+_020CE3C0:
+ tst r2, #1
+ bxeq lr
+ ldrh r3, [r0]
+ and r3, r3, #0xff00
+ and r1, r1, #0x00ff
+ orr r1, r1, r3
+ strh r1, [r0]
+ bx lr
+}
+
+ARM_FUNC asm void MI_CpuCopy8(register const void *srcp, register void *dstp, register u32 size)
+{
+ cmp r2, #0
+ bxeq lr
+
+ tst r1, #1
+ beq _020CE420
+ ldrh r12, [r1, #-1]
+ and r12, r12, #0x00ff
+ tst r0, #1
+ ldrneh r3, [r0, #-1]
+ movne r3, r3, lsr #8
+ ldreqh r3, [r0]
+ orr r3, r12, r3, lsl #8
+ strh r3, [r1, #-1]
+ add r0, r0, #1
+ add r1, r1, #1
+ subs r2, r2, #1
+ bxeq lr
+
+_020CE420:
+ eor r12, r1, r0
+ tst r12, #1
+ beq _020CE474
+
+ bic r0, r0, #1
+ ldrh r12, [r0], #2
+ mov r3, r12, lsr #8
+ subs r2, r2, #2
+ bcc _020CE458
+
+_020CE440:
+ ldrh r12, [r0], #2
+ orr r12, r3, r12, lsl #8
+ strh r12, [r1], #2
+ mov r3, r12, lsr #16
+ subs r2, r2, #2
+ bcs _020CE440
+
+_020CE458:
+ tst r2, #1
+ bxeq lr
+ ldrh r12, [r1]
+ and r12, r12, #0xff00
+ orr r12, r12, r3
+ strh r12, [r1]
+ bx lr
+
+_020CE474:
+ tst r12, #2
+ beq _020CE4A0
+
+ bics r3, r2, #1
+ beq _020CE4EC
+ sub r2, r2, r3
+ add r12, r3, r1
+
+_020CE48C:
+ ldrh r3, [r0], #2
+ strh r3, [r1], #2
+ cmp r1, r12
+ bcc _020CE48C
+ b _020CE4EC
+
+_020CE4A0:
+ cmp r2, #2
+ bcc _020CE4EC
+ tst r1, #2
+ beq _020CE4C0
+ ldrh r3, [r0], #2
+ strh r3, [r1], #2
+ subs r2, r2, #2
+ bxeq lr
+
+_020CE4C0:
+ bics r3, r2, #3
+ beq _020CE4E0
+ sub r2, r2, r3
+ add r12, r3, r1
+
+_020CE4D0:
+ ldr r3, [r0], #4
+ str r3, [r1], #4
+ cmp r1, r12
+ bcc _020CE4D0
+
+_020CE4E0:
+ tst r2, #2
+ ldrneh r3, [r0], #2
+ strneh r3, [r1], #2
+
+_020CE4EC:
+ tst r2, #1
+ bxeq lr
+ ldrh r2, [r1]
+ ldrh r0, [r0]
+ and r2, r2, #0xff00
+ and r0, r0, #0x00ff
+ orr r0, r2, r0
+ strh r0, [r1]
+
+ bx lr
+}
+
+THUMB_FUNC asm void MI_Zero36B(register void *pDest)
+{
+ mov r1, #0
+ mov r2, #0
+ mov r3, #0
+ stmia r0!, {r1, r2, r3}
+ stmia r0!, {r1, r2, r3}
+ stmia r0!, {r1, r2, r3}
+
+ bx lr
+}
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-31 10:58:15 +0000