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-rw-r--r--arm9/lib/include/gx.h90
1 files changed, 0 insertions, 90 deletions
diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h
index 5abc2693..58e4c35f 100644
--- a/arm9/lib/include/gx.h
+++ b/arm9/lib/include/gx.h
@@ -20,98 +20,8 @@ void MIi_CpuCopy32(void *src, void *dst, u32 size);
void OSi_UnlockVram(u16, u16);
void MIi_CpuClear32(u32, void *, u32);
-//Todos before PR
//TODO: Add defines for GX commands, add structs/unions for HW registers
-#define HW_REG_DIV_NUMER 0x04000290
-#define HW_REG_DIV_DENOM 0x04000298
-
-#define HW_REG_MTX_MODE 0x04000440
-#define HW_REG_MTX_LOAD_4x4 0x04000458
-#define HW_REG_MTX_LOAD_4x3 0x0400045C
-#define HW_REG_MTX_MULT_3x3 0x04000468
-
-#define HW_REG_END_VTXS 0x04000504
-#define HW_REG_GXSTAT 0x04000600
-#define HW_REG_DISP3DCNT 0x04000060
-#define HW_REG_BG0HOFS 0x04000010
-#define HW_REG_CLEAR_COLOR 0x04000350
-#define HW_REG_CLEAR_DEPTH 0x04000354
-#define HW_REG_CLRIMAGE_OFFSET 0x04000356
-#define HW_REG_FOG_COLOR 0x04000358
-#define HW_REG_FOG_OFFSET 0x0400035C
-#define HW_REG_BG0CNT 0x04000008
-#define HW_REG_POLYGON_ATTR 0x040004A4
-#define HW_REG_TEXIMAGE_PARAM 0x040004A8
-#define HW_REG_PLTT_BASE 0x040004AC
-
-#define HW_REG_POWCNT1 0x04000304
-
-#define HW_REG_GXFIFO 0x04000400
-#define HW_REG_MTX_IDENTITY 0x04000454
-#define HW_REG_MTX_POP 0x04000448
-#define HW_REG_MTX_MODE 0x04000440
-
-#define HW_REG_CLIPMTX_RESULT 0x04000640
-#define HW_REG_VECMTX_RESULT 0x04000680
-
-#define HW_REG_EDGE_COLOR 0x04000330
-#define HW_REG_FOG_TABLE 0x04000360
-
-#define HW_REG_SHININESS 0x040004D0
-
-#define HW_REG_MASTER_BRIGHT 0x0400006C
-
-#define HW_REG_VRAMCNT_A 0x04000240
-#define HW_REG_VRAMCNT_B 0x04000241
-#define HW_REG_VRAMCNT_C 0x04000242
-#define HW_REG_VRAMCNT_D 0x04000243
-#define HW_REG_VRAMCNT_E 0x04000244
-#define HW_REG_VRAMCNT_F 0x04000245
-#define HW_REG_VRAMCNT_G 0x04000246
-#define HW_REG_WRAMCNT 0x04000247
-#define HW_REG_VRAMCNT_H 0x04000248
-#define HW_REG_VRAMCNT_I 0x04000249
-
-#define HW_REG_DISPCNT 0x04000000
-#define HW_REG_DISPSTAT 0x04000004
-#define HW_REG_DISPCNT_2D 0x04001000
-
-#define HW_REG_DISP3DCNT 0x04000060
-
-#define HW_REG_BG2PA_A 0x04000020
-#define HW_REG_BG2PD_A 0x04000026
-#define HW_REG_BG3PA_A 0x04000030
-#define HW_REG_BG3PD_A 0x04000036
-#define HW_REG_BG2PA_B 0x04001020
-#define HW_REG_BG2PD_B 0x04001026
-#define HW_REG_BG3PA_B 0x04001030
-#define HW_REG_BG3PD_B 0x04001036
-
-#define HW_REG_BG0CNT_A 0x04000008
-#define HW_REG_BG1CNT_A 0x0400000A
-#define HW_REG_BG2CNT_A 0x0400000C
-#define HW_REG_BG3CNT_A 0x0400000E
-
-#define HW_REG_BG0CNT_B 0x04001008
-#define HW_REG_BG1CNT_B 0x0400100A
-#define HW_REG_BG2CNT_B 0x0400100C
-#define HW_REG_BG3CNT_B 0x0400100E
-
-#define HW_REG_DISPCNT_A 0x04000000
-#define HW_REG_DISPCNT_B 0x04001000
-
-//TODO: wait for register commit and replace these
-#define SETREG8(x, y) ((*(vu8 *)x) = y)
-#define SETREG16(x, y) ((*(vu16 *)x) = y)
-#define SETREG32(x, y) ((*(vu32 *)x) = y)
-#define SETREG64(x, y) ((*(vu64 *)x) = y)
-
-#define READREG8(x) (*(vu8 *)x)
-#define READREG16(x) (*(vu16 *)x)
-#define READREG32(x) (*(vu32 *)x)
-#define READREG64(x) (*(vu64 *)x)
-
static inline void _GX_Load_16(u32 var, void *src, void *dst, u32 size){
if (var != -1 && size > 0x1C)
{