diff options
Diffstat (limited to 'arm9/lib/include')
-rw-r--r-- | arm9/lib/include/GX_g2.h | 10 | ||||
-rw-r--r-- | arm9/lib/include/GX_vramcnt.h | 24 | ||||
-rw-r--r-- | arm9/lib/include/OS_interrupt.h | 2 | ||||
-rw-r--r-- | arm9/lib/include/gx.h | 10 | ||||
-rw-r--r-- | arm9/lib/include/registers.h | 71 |
5 files changed, 102 insertions, 15 deletions
diff --git a/arm9/lib/include/GX_g2.h b/arm9/lib/include/GX_g2.h index 987bda38..97fa0e10 100644 --- a/arm9/lib/include/GX_g2.h +++ b/arm9/lib/include/GX_g2.h @@ -111,6 +111,16 @@ static inline void G2S_SetBG3Affine(const struct Mtx22 *mtx, int centerX, int ce G2x_SetBGyAffine_((u32)®_G2S_DB_BG3PA, mtx, centerX, centerY, x1, y1); } +static inline void G2_BlendNone(void) +{ + reg_G2_BLDCNT = 0; +} + +static inline void G2S_BlendNone(void) +{ + reg_G2S_DB_BLDCNT = 0; +} + //The g2 and g2_oam headers contain a lot of inline functions and enums that may want to be ported over at some point #endif //GUARD_GX_G2_H diff --git a/arm9/lib/include/GX_vramcnt.h b/arm9/lib/include/GX_vramcnt.h index 6fe677bc..3b82d28c 100644 --- a/arm9/lib/include/GX_vramcnt.h +++ b/arm9/lib/include/GX_vramcnt.h @@ -16,7 +16,7 @@ void GX_SetBankForSubBG(s32 subbg); void GX_SetBankForSubOBJ(s32 subobj); void GX_SetBankForSubBGExtPltt(s32 subbgextpltt); void GX_SetBankForSubOBJExtPltt(s32 subobjextpltt); -u32 FUN_020C6130(u16 *ptr); +u32 resetBankForX_(u16 *ptr); u32 GX_ResetBankForBG(); u32 GX_ResetBankForOBJ(); u32 GX_ResetBankForBGExtPltt(); @@ -25,31 +25,31 @@ u32 GX_ResetBankForTex(); u32 GX_ResetBankForTexPltt(); u32 GX_ResetBankForClearImage(); u32 GX_ResetBankForSubBG(); -u32 FUN_020C605C(); -u32 FUN_020C6034(); u32 GX_ResetBankForSubOBJ(); -u32 FUN_020C5F28(u16 *ptr); -u32 disableBankForX_(); -u32 GX_DisableBankForOBJExtPltt_2(); +u32 GX_ResetBankForSubBGExtPltt(); +u32 GX_ResetBankForSubOBJExtPltt(); +u32 disableBankForX_(u16 *ptr); +u32 GX_DisableBankForBG(); +u32 GX_DisableBankForOBJ(); u32 GX_DisableBankForBGExtPltt(); u32 GX_DisableBankForOBJExtPltt(); -u32 GX_DisableBankForTexPltt_2(); +u32 GX_DisableBankForTex(); u32 GX_DisableBankForTexPltt(); u32 GX_DisableBankForClearImage(); u32 GX_DisableBankForARM7(); u32 GX_DisableBankForLCDC(); +u32 GX_DisableBankForSubBG(); +u32 GX_DisableBankForSubOBJ(); u32 GX_DisableBankForSubBGExtPltt(); -u32 GX_DisableBankForSubOBJExtPltt_2(); -u32 FUN_020C5E04(); u32 GX_DisableBankForSubOBJExtPltt(); -u32 GX_GetBankForBGExtPltt_2(); +u32 GX_GetBankForBG(); u32 GX_GetBankForOBJ(); u32 GX_GetBankForBGExtPltt(); u32 GX_GetBankForOBJExtPltt(); -u32 FUN_020C5D8C(); +u32 GX_GetBankForTex(); u32 GX_GetBankForTexPltt(); u32 GX_GetBankForLCDC(); -u32 GX_GetBankForSubBGExtPltt_2(); +u32 GX_GetBankForSubBG(); u32 GX_GetBankForSubOBJ(); u32 GX_GetBankForSubBGExtPltt(); u32 GX_GetBankForSubOBJExtPltt(); diff --git a/arm9/lib/include/OS_interrupt.h b/arm9/lib/include/OS_interrupt.h index d063b817..130ad2de 100644 --- a/arm9/lib/include/OS_interrupt.h +++ b/arm9/lib/include/OS_interrupt.h @@ -12,6 +12,8 @@ #define OS_IE_V_COUNT (1UL << REG_OS_IE_VE_SHIFT) #define OS_IE_TIMER0 (1UL << REG_OS_IE_T0_SHIFT) #define OS_IE_TIMER1 (1UL << REG_OS_IE_T1_SHIFT) +#define OS_IE_TIMER2 (1UL << REG_OS_IE_T2_SHIFT) +#define OS_IE_TIMER3 (1UL << REG_OS_IE_T3_SHIFT) #define OS_IE_SPFIFO_RECV (1UL << REG_OS_IE_IFN_SHIFT) #define OS_IE_CARD_DATA (1UL << REG_OS_IE_MC_SHIFT) diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h index 7ba8d1f3..cce14e57 100644 --- a/arm9/lib/include/gx.h +++ b/arm9/lib/include/gx.h @@ -216,4 +216,14 @@ static inline void GX_SetBGCharOffset(GXBGCharOffset offset) reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_BGCHAROFFSET_MASK) | (offset << REG_GX_DISPCNT_BGCHAROFFSET_SHIFT)); } +static inline void GX_SetVisibleWnd(int window) +{ + reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~(REG_GX_DISPCNT_W0_MASK | REG_GX_DISPCNT_W1_MASK | REG_GX_DISPCNT_OW_MASK)) | (window << REG_GX_DISPCNT_W0_SHIFT)); +} + +static inline void GXS_SetVisibleWnd(int window) +{ + reg_GXS_DB_DISPCNT = (u32)((reg_GXS_DB_DISPCNT & ~(REG_GXS_DB_DISPCNT_W0_MASK | REG_GXS_DB_DISPCNT_W1_MASK | REG_GXS_DB_DISPCNT_OW_MASK)) | (window << REG_GXS_DB_DISPCNT_W0_SHIFT)); +} + #endif //GUARD_GX_H diff --git a/arm9/lib/include/registers.h b/arm9/lib/include/registers.h index 27796cf7..b4fd8ce7 100644 --- a/arm9/lib/include/registers.h +++ b/arm9/lib/include/registers.h @@ -350,12 +350,11 @@ #define REG_OS_IE_VE_SHIFT 2 #define REG_OS_IE_T0_SHIFT 3 #define REG_OS_IE_T1_SHIFT 4 +#define REG_OS_IE_T2_SHIFT 5 +#define REG_OS_IE_T3_SHIFT 6 #define REG_OS_IE_IFN_SHIFT 18 #define REG_OS_IE_MC_SHIFT 19 -#define REG_OS_TM0CNT_H_I_MASK 0x0040 -#define REG_OS_TM0CNT_H_E_MASK 0x0080 - #define REG_PAD_KEYINPUT_L_SHIFT 9 #define REG_PAD_KEYINPUT_L_SIZE 1 #define REG_PAD_KEYINPUT_L_MASK 0x0200 @@ -1001,4 +1000,70 @@ #define REG_G2S_DB_BG3OFS_HOFFSET_SIZE 9 #define REG_G2S_DB_BG3OFS_HOFFSET_MASK 0x000001ff +// Timer control + +#define REG_OS_TM0CNT_L_TIMER0CNT_SHIFT 0 +#define REG_OS_TM0CNT_L_TIMER0CNT_SIZE 16 +#define REG_OS_TM0CNT_L_TIMER0CNT_MASK 0xffff + +#define REG_OS_TM0CNT_H_E_SHIFT 7 +#define REG_OS_TM0CNT_H_E_SIZE 1 +#define REG_OS_TM0CNT_H_E_MASK 0x0080 + +#define REG_OS_TM0CNT_H_I_SHIFT 6 +#define REG_OS_TM0CNT_H_I_SIZE 1 +#define REG_OS_TM0CNT_H_I_MASK 0x0040 + +#define REG_OS_TM0CNT_H_PS_SHIFT 0 +#define REG_OS_TM0CNT_H_PS_SIZE 2 +#define REG_OS_TM0CNT_H_PS_MASK 0x0003 + +#define REG_OS_TM1CNT_L_TIMER0CNT_SHIFT 0 +#define REG_OS_TM1CNT_L_TIMER0CNT_SIZE 16 +#define REG_OS_TM1CNT_L_TIMER0CNT_MASK 0xffff + +#define REG_OS_TM1CNT_H_E_SHIFT 7 +#define REG_OS_TM1CNT_H_E_SIZE 1 +#define REG_OS_TM1CNT_H_E_MASK 0x0080 + +#define REG_OS_TM1CNT_H_I_SHIFT 6 +#define REG_OS_TM1CNT_H_I_SIZE 1 +#define REG_OS_TM1CNT_H_I_MASK 0x0040 + +#define REG_OS_TM1CNT_H_PS_SHIFT 0 +#define REG_OS_TM1CNT_H_PS_SIZE 2 +#define REG_OS_TM1CNT_H_PS_MASK 0x0003 + +#define REG_OS_TM2CNT_L_TIMER0CNT_SHIFT 0 +#define REG_OS_TM2CNT_L_TIMER0CNT_SIZE 16 +#define REG_OS_TM2CNT_L_TIMER0CNT_MASK 0xffff + +#define REG_OS_TM2CNT_H_E_SHIFT 7 +#define REG_OS_TM2CNT_H_E_SIZE 1 +#define REG_OS_TM2CNT_H_E_MASK 0x0080 + +#define REG_OS_TM2CNT_H_I_SHIFT 6 +#define REG_OS_TM2CNT_H_I_SIZE 1 +#define REG_OS_TM2CNT_H_I_MASK 0x0040 + +#define REG_OS_TM2CNT_H_PS_SHIFT 0 +#define REG_OS_TM2CNT_H_PS_SIZE 2 +#define REG_OS_TM2CNT_H_PS_MASK 0x0003 + +#define REG_OS_TM3CNT_L_TIMER0CNT_SHIFT 0 +#define REG_OS_TM3CNT_L_TIMER0CNT_SIZE 16 +#define REG_OS_TM3CNT_L_TIMER0CNT_MASK 0xffff + +#define REG_OS_TM3CNT_H_E_SHIFT 7 +#define REG_OS_TM3CNT_H_E_SIZE 1 +#define REG_OS_TM3CNT_H_E_MASK 0x0080 + +#define REG_OS_TM3CNT_H_I_SHIFT 6 +#define REG_OS_TM3CNT_H_I_SIZE 1 +#define REG_OS_TM3CNT_H_I_MASK 0x0040 + +#define REG_OS_TM3CNT_H_PS_SHIFT 0 +#define REG_OS_TM3CNT_H_PS_SIZE 2 +#define REG_OS_TM3CNT_H_PS_MASK 0x0003 + #endif //POKEDIAMOND_ARM9_REGISTERS_H |