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-rw-r--r--arm9/lib/include/gx.h8
-rw-r--r--arm9/lib/src/GX_g3imm.c18
-rw-r--r--arm9/lib/src/GX_state.c26
3 files changed, 51 insertions, 1 deletions
diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h
index a17132ed..c542f560 100644
--- a/arm9/lib/include/gx.h
+++ b/arm9/lib/include/gx.h
@@ -307,6 +307,12 @@ void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness);
void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 brightness);
void *G2x_ChangeBlendBrightness_(u16 *ptr, fx32 brightness);
-//GXi_NopClearFifo128_ probably asm
+//GX_state
+void GX_InitGXState();
+
+//GX_g3imm
+void G3_LoadMtx43(struct Mtx43 *mtx);
+void G3_MultMtx43(struct Mtx43 *mtx);
+void G3_MultMtx33(struct Mtx33 *mtx);
#endif //GUARD_GX_H
diff --git a/arm9/lib/src/GX_g3imm.c b/arm9/lib/src/GX_g3imm.c
new file mode 100644
index 00000000..f41b5cbf
--- /dev/null
+++ b/arm9/lib/src/GX_g3imm.c
@@ -0,0 +1,18 @@
+#include "global.h"
+#include "main.h"
+#include "gx.h"
+
+void G3_LoadMtx43(struct Mtx43 *mtx){
+ SETREG32(HW_REG_GXFIFO, 0x17);
+ GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO);
+}
+
+void G3_MultMtx43(struct Mtx43 *mtx){
+ SETREG32(HW_REG_GXFIFO, 0x19);
+ GX_SendFifo48B(mtx, (void *)HW_REG_GXFIFO);
+}
+
+void G3_MultMtx33(struct Mtx33 *mtx){
+ SETREG32(HW_REG_GXFIFO, 0x1A);
+ MI_Copy36B(mtx, (void *)HW_REG_GXFIFO);
+}
diff --git a/arm9/lib/src/GX_state.c b/arm9/lib/src/GX_state.c
new file mode 100644
index 00000000..52d3c6f5
--- /dev/null
+++ b/arm9/lib/src/GX_state.c
@@ -0,0 +1,26 @@
+#include "global.h"
+#include "main.h"
+#include "gx.h"
+
+extern struct VRAM_banks gUnk021D33C4;
+
+void GX_InitGXState(){
+ gUnk021D33C4.var00 = 0x0;
+ gUnk021D33C4.var02 = 0x0;
+ gUnk021D33C4.var04 = 0x0;
+ gUnk021D33C4.var06 = 0x0;
+ gUnk021D33C4.var08 = 0x0;
+ gUnk021D33C4.var0A = 0x0;
+ gUnk021D33C4.var0C = 0x0;
+ gUnk021D33C4.var0E = 0x0;
+ gUnk021D33C4.var10 = 0x0;
+ gUnk021D33C4.var12 = 0x0;
+ gUnk021D33C4.var14 = 0x0;
+ gUnk021D33C4.var16 = 0x0;
+ gUnk021D33C4.var18 = 0x0;
+ SETREG32(HW_REG_VRAMCNT_A, 0x0);
+ SETREG8(HW_REG_VRAMCNT_E, 0x0);
+ SETREG8(HW_REG_VRAMCNT_F, 0x0);
+ SETREG8(HW_REG_VRAMCNT_G, 0x0);
+ SETREG16(HW_REG_VRAMCNT_H, 0x0);
+}