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-rw-r--r--arm9/lib/include/CARD_common.h6
-rw-r--r--arm9/lib/include/CARD_rom.h71
-rw-r--r--arm9/lib/include/FSi_util.h2
-rw-r--r--arm9/lib/include/MI_dma.h2
-rw-r--r--arm9/lib/include/OS_interrupt.h1
-rw-r--r--arm9/lib/include/registers.h1
-rw-r--r--arm9/lib/src/CARD_rom.c280
-rw-r--r--arm9/lib/src/OS_init.c2
8 files changed, 357 insertions, 8 deletions
diff --git a/arm9/lib/include/CARD_common.h b/arm9/lib/include/CARD_common.h
index 7730ffa4..95274fd2 100644
--- a/arm9/lib/include/CARD_common.h
+++ b/arm9/lib/include/CARD_common.h
@@ -24,6 +24,10 @@
((size) << CARD_BACKUP_TYPE_SIZEBIT_SHIFT) | \
((vender) << CARD_BACKUP_TYPE_VENDER_SHIFT))
+#define ALIGN_MASK(a) ((a) - 1)
+#define CARD_ALIGN_HI_BIT(n) (((u32)(n)) & ~ALIGN_MASK(CARD_ROM_PAGE_SIZE))
+#define CARD_ALIGN_LO_BIT(n) (((u32)(n)) & ALIGN_MASK(CARD_ROM_PAGE_SIZE))
+
typedef enum
{
CARD_BACKUP_TYPE_EEPROM_4KBITS = CARD_BACKUP_TYPE_DEFINE(EEPROM, 9, 0),
@@ -209,8 +213,6 @@ void CARD_UnlockBackup(u16 lock_id);
#define CARD_RETRY_COUNT_MAX 10
-void CARD_Init(void);
-
extern BOOL PXI_SendWordByFifo(u32 param1, u32 data, u32 param2);
static inline void CARDi_SendPxi(u32 data)
diff --git a/arm9/lib/include/CARD_rom.h b/arm9/lib/include/CARD_rom.h
index b96c527b..e72d653f 100644
--- a/arm9/lib/include/CARD_rom.h
+++ b/arm9/lib/include/CARD_rom.h
@@ -1,9 +1,31 @@
-#ifndef NITRO_CARD_ROM_H_
-#define NITRO_CARD_ROM_H_
+#ifndef POKEDIAMOND_CARD_ROM_H
+#define POKEDIAMOND_CARD_ROM_H
#include "nitro/types.h"
#include "MI_exMemory.h"
#include "MI_dma.h"
+#include "CARD_common.h"
+#include "OS_tcm.h"
+
+#define CARD_ROM_PAGE_SIZE 512
+
+#define CARDMST_SEL_ROM 0x00
+#define CARDMST_IF_ENABLE 0x40
+#define CARDMST_ENABLE 0x80
+
+#define CARD_DATA_READY 0x00800000
+#define CARD_COMMAND_PAGE 0x01000000
+#define CARD_COMMAND_ID 0x07000000
+#define CARD_COMMAND_MASK 0x07000000
+#define CARD_RESET_HI 0x20000000
+#define CARD_READ_MODE 0x00000000
+#define CARD_START 0x80000000
+#define CARD_LATENCY1_MASK 0x00001FFF
+
+#define MROMOP_G_READ_PAGE 0xB7000000
+#define MROMOP_G_READ_ID 0xB8000000
+
+extern CARDiCommon cardi_common;
typedef struct
{
@@ -12,6 +34,15 @@ typedef struct
}
CARDRomRegion;
+typedef struct CARDRomStat
+{
+ void (*read_func) (struct CARDRomStat *);
+ u32 ctrl;
+ u8 *cache_page;
+ u32 dummy[5];
+ u8 cache_buf[CARD_ROM_PAGE_SIZE];
+} CARDRomStat;
+
static inline const CARDRomRegion * CARD_GetRomRegionOVT(MIProcessor target)
{
return (target == MI_PROCESSOR_ARM9)
@@ -19,7 +50,14 @@ static inline const CARDRomRegion * CARD_GetRomRegionOVT(MIProcessor target)
: (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x58);
}
-void CARDi_ReadRom(u32 dma, const void * src, void * dst, u32 len, MIDmaCallback done_cb, void * arg, BOOL is_async);
+BOOL CARDi_TryReadCardDma(CARDRomStat *p);
+void CARDi_ReadCard(CARDRomStat *p);
+u32 CARDi_ReadRomIDCore(void);
+void CARDi_CheckPulledOutCore(u32 id);
+void CARDi_ReadRom(u32 dma, const void *src, void *dst, u32 len, MIDmaCallback callback, void *arg, BOOL is_async);
+void CARD_Init(void);
+void CARD_WaitRomAsync(void);
+void (*CARDi_GetRomAccessor(void)) (CARDRomStat *);
static inline void CARD_ReadRomAsync(u32 dma, const void * src, void * dst, u32 len, MIDmaCallback callback, void * arg)
{
@@ -34,4 +72,29 @@ static inline const CARDRomRegion * CARD_GetRomRegionFAT() {
return (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x48);
}
-#endif //NITRO_CARD_ROM_H_
+static inline void CARDi_ReadEnd(void)
+{
+ CARDiCommon *const p = &cardi_common;
+ CARDi_CheckPulledOutCore(CARDi_ReadRomIDCore());
+ p->cmd->result = CARD_RESULT_SUCCESS;
+ CARDi_EndTask(p, TRUE);
+}
+
+static inline BOOL CARDi_IsInTcm(u32 buf, u32 len)
+{
+ const u32 i = (u32)HW_ITCM;
+ const u32 d = OS_GetDTCMAddress();
+ return ((i < buf + len) && (i + HW_ITCM_SIZE > buf)) ||
+ ((d < buf + len) && (d + HW_DTCM_SIZE > buf));
+}
+
+extern u32 cardi_rom_header_addr;
+
+static inline u32 CARDi_GetRomFlag(u32 flag)
+{
+ const u32 rom_ctrl = *(vu32 *)(cardi_rom_header_addr + 0x60);
+ return (u32)((rom_ctrl & ~CARD_COMMAND_MASK) | flag |
+ CARD_READ_MODE | CARD_START | CARD_RESET_HI);
+}
+
+#endif //POKEDIAMOND_CARD_ROM_H
diff --git a/arm9/lib/include/FSi_util.h b/arm9/lib/include/FSi_util.h
index 6e96681e..2357b446 100644
--- a/arm9/lib/include/FSi_util.h
+++ b/arm9/lib/include/FSi_util.h
@@ -1,7 +1,7 @@
#ifndef NITRO_FSI_UTIL_H_
#define NITRO_FSI_UTIL_H_
-#define ALIGN_MASK(a) ((u32)((a) - 1))
+#include "CARD_common.h"
#define ALIGN_BYTE(n, a) (((u32)(n) + ALIGN_MASK(a)) & ~ALIGN_MASK(a))
diff --git a/arm9/lib/include/MI_dma.h b/arm9/lib/include/MI_dma.h
index aafc798b..8ce3f417 100644
--- a/arm9/lib/include/MI_dma.h
+++ b/arm9/lib/include/MI_dma.h
@@ -7,6 +7,8 @@
typedef void (*MIDmaCallback)(void *);
+#define MI_DMA_MAX_NUM 3
+
#define REG_ADDR_DMA0CNT 0x40000b8
#define REG_ADDR_DMA0_CLR_DATA 0x40000e0
diff --git a/arm9/lib/include/OS_interrupt.h b/arm9/lib/include/OS_interrupt.h
index 08417872..3d139079 100644
--- a/arm9/lib/include/OS_interrupt.h
+++ b/arm9/lib/include/OS_interrupt.h
@@ -12,6 +12,7 @@
#define OS_IE_V_COUNT (1UL << REG_OS_IE_VE_SHIFT)
#define OS_IE_TIMER0 (1UL << REG_OS_IE_T0_SHIFT)
#define OS_IE_TIMER1 (1UL << REG_OS_IE_T1_SHIFT)
+#define OS_IE_CARD_DATA (1UL << REG_OS_IE_MC_SHIFT)
extern OSIrqFunction OS_IRQTable[];
extern OSIrqCallbackInfo OSi_IrqCallbackInfo[8];
diff --git a/arm9/lib/include/registers.h b/arm9/lib/include/registers.h
index dc1b4fdb..44a21bf0 100644
--- a/arm9/lib/include/registers.h
+++ b/arm9/lib/include/registers.h
@@ -350,6 +350,7 @@
#define REG_OS_IE_VE_SHIFT 2
#define REG_OS_IE_T0_SHIFT 3
#define REG_OS_IE_T1_SHIFT 4
+#define REG_OS_IE_MC_SHIFT 19
#define REG_OS_TM0CNT_H_I_MASK 0x0040
#define REG_OS_TM0CNT_H_E_MASK 0x0080
diff --git a/arm9/lib/src/CARD_rom.c b/arm9/lib/src/CARD_rom.c
new file mode 100644
index 00000000..6d6b1ff8
--- /dev/null
+++ b/arm9/lib/src/CARD_rom.c
@@ -0,0 +1,280 @@
+#include "function_target.h"
+#include "nitro/types.h"
+#include "CARD_pullOut.h"
+#include "CARD_rom.h"
+#include "MI_dma_card.h"
+#include "MI_memory.h"
+#include "OS_cache.h"
+#include "OS_interrupt.h"
+
+extern u32 cardi_rom_base;
+u32 cardi_rom_base;
+u32 cardi_rom_header_addr = HW_ROM_HEADER_BUF;
+
+CARDRomStat rom_stat ALIGN(32);
+
+static BOOL CARDi_ReadFromCache(CARDRomStat *p);
+static void CARDi_SetRomOp(u32 cmd1, u32 cmd2);
+static void CARDi_SetCardDma(void);
+static void CARDi_OnReadCard(void);
+static void CARDi_ReadRomSyncCore(CARDiCommon *c);
+
+static inline BOOL CARDi_OnReadPageDirect(CARDRomStat *arg)
+{
+#pragma unused(arg)
+ CARDiCommon *p = &cardi_common;
+ p->src += CARD_ROM_PAGE_SIZE;
+ p->dst += CARD_ROM_PAGE_SIZE;
+ p->len -= CARD_ROM_PAGE_SIZE;
+ return (p->len > 0);
+}
+
+ARM_FUNC static BOOL CARDi_ReadFromCache(CARDRomStat *p)
+{
+ CARDiCommon *c = &cardi_common;
+ const u32 cur_page = CARD_ALIGN_HI_BIT(c->src);
+ if (cur_page == (u32)p->cache_page)
+ {
+ const u32 mod = c->src - cur_page;
+ u32 len = CARD_ROM_PAGE_SIZE - mod;
+ if (len > c->len)
+ {
+ len = c->len;
+ }
+ MI_CpuCopy8(p->cache_buf + mod, (void *)c->dst, len);
+ c->src += len;
+ c->dst += len;
+ c->len -= len;
+ }
+ return (c->len > 0);
+}
+
+ARM_FUNC static void CARDi_SetRomOp(u32 cmd1, u32 cmd2)
+{
+ while ((reg_CARD_CNT & CARD_START) != 0) {}
+
+ reg_CARD_MASTERCNT = CARDMST_SEL_ROM | CARDMST_ENABLE | CARDMST_IF_ENABLE;
+ {
+ vu8 *const p_cmd = &reg_CARD_CMD;
+ p_cmd[0] = (u8)(cmd1 >> (8 * 3));
+ p_cmd[1] = (u8)(cmd1 >> (8 * 2));
+ p_cmd[2] = (u8)(cmd1 >> (8 * 1));
+ p_cmd[3] = (u8)(cmd1 >> (8 * 0));
+ p_cmd[4] = (u8)(cmd2 >> (8 * 3));
+ p_cmd[5] = (u8)(cmd2 >> (8 * 2));
+ p_cmd[6] = (u8)(cmd2 >> (8 * 1));
+ p_cmd[7] = (u8)(cmd2 >> (8 * 0));
+ }
+}
+
+static inline void CARDi_SetRomOpReadPage1(u32 src)
+{
+ CARDi_SetRomOp((u32)(MROMOP_G_READ_PAGE | (src >> 8)), (u32)(src << 24));
+}
+
+ARM_FUNC static void CARDi_SetCardDma(void)
+{
+ CARDiCommon *const c = &cardi_common;
+ CARDRomStat *const p = &rom_stat;
+ MIi_CardDmaCopy32(c->dma, (const void *)&reg_CARD_DATA, (void *)c->dst, CARD_ROM_PAGE_SIZE);
+ CARDi_SetRomOpReadPage1(c->src);
+ reg_CARD_CNT = p->ctrl;
+}
+
+ARM_FUNC static void CARDi_OnReadCard(void)
+{
+ CARDRomStat *const p = &rom_stat;
+ CARDiCommon *const c = &cardi_common;
+ MI_StopDma(c->dma);
+ if (!CARDi_OnReadPageDirect(p))
+ {
+ (void)OS_DisableIrqMask(OS_IE_CARD_DATA);
+ (void)OS_ResetRequestIrqMask(OS_IE_CARD_DATA);
+ CARDi_ReadEnd();
+ }
+ else
+ {
+ CARDi_SetCardDma();
+ }
+}
+
+ARM_FUNC BOOL CARDi_TryReadCardDma(CARDRomStat *p)
+{
+ CARDiCommon *const c = &cardi_common;
+ const u32 dst = c->dst;
+ u32 len = c->len;
+ const BOOL is_async = !(dst & 31) &&
+ (c->dma <= MI_DMA_MAX_NUM) &&
+ !CARDi_IsInTcm(dst, len) &&
+ !CARD_ALIGN_LO_BIT(c->src | len) &&
+ (len > 0);
+ p->ctrl = CARDi_GetRomFlag(CARD_COMMAND_PAGE);
+ if (is_async)
+ {
+ OSIntrMode bak_psr = OS_DisableInterrupts();
+ IC_InvalidateRange((void *)dst, len);
+ {
+ u32 pos = dst;
+ u32 mod = (dst & (HW_CACHE_LINE_SIZE - 1));
+ if (mod)
+ {
+ pos -= mod;
+ DC_StoreRange((void *)(pos), HW_CACHE_LINE_SIZE);
+ DC_StoreRange((void *)(pos + len), HW_CACHE_LINE_SIZE);
+ len += HW_CACHE_LINE_SIZE;
+ }
+ DC_InvalidateRange((void *)pos, len);
+ DC_WaitWriteBufferEmpty();
+ }
+ (void)OS_SetIrqFunction(OS_IE_CARD_DATA, CARDi_OnReadCard);
+ (void)OS_ResetRequestIrqMask(OS_IE_CARD_DATA);
+ (void)OS_EnableIrqMask(OS_IE_CARD_DATA);
+ (void)OS_RestoreInterrupts(bak_psr);
+ CARDi_SetCardDma();
+ }
+ return is_async;
+}
+
+ARM_FUNC void CARDi_ReadCard(CARDRomStat *p)
+{
+ CARDiCommon *const c = &cardi_common;
+ while (TRUE)
+ {
+ const u32 len = CARD_ROM_PAGE_SIZE;
+ u32 src = CARD_ALIGN_HI_BIT(c->src);
+ u32 dst;
+ if ((src != c->src) || ((c->dst & 3) != 0) || (c->len < len))
+ {
+ dst = (u32)p->cache_buf;
+ p->cache_page = (void *)src;
+ }
+ else
+ {
+ dst = c->dst;
+ }
+
+ CARDi_SetRomOpReadPage1(src);
+ {
+ u32 pos = 0;
+ reg_CARD_CNT = p->ctrl;
+ while (TRUE)
+ {
+ const u32 ctrl = reg_CARD_CNT;
+ if ((ctrl & CARD_DATA_READY) != 0)
+ {
+ u32 data = reg_CARD_DATA;
+ if (pos < len)
+ {
+ ((u32 *)dst)[pos++] = data;
+ }
+ }
+ if (!(ctrl & CARD_START))
+ {
+ break;
+ }
+ }
+ }
+ if (dst == c->dst)
+ {
+ if (!CARDi_OnReadPageDirect(p))
+ {
+ break;
+ }
+ }
+ else
+ {
+ if (!CARDi_ReadFromCache(p))
+ {
+ break;
+ }
+ }
+ }
+}
+
+ARM_FUNC u32 CARDi_ReadRomIDCore(void)
+{
+ CARDi_SetRomOp(MROMOP_G_READ_ID, 0);
+ reg_CARD_CNT = (u32)(CARDi_GetRomFlag(CARD_COMMAND_ID) & ~CARD_LATENCY1_MASK);
+ while (!(reg_CARD_CNT & CARD_DATA_READY)) {}
+ return reg_CARD_DATA;
+}
+
+ARM_FUNC static void CARDi_ReadRomSyncCore(CARDiCommon *c)
+{
+#pragma unused(c)
+ CARDRomStat *const p = &rom_stat;
+
+ if (CARDi_ReadFromCache(p))
+ {
+ (*p->read_func) (p);
+ }
+ CARDi_ReadEnd();
+}
+
+ARM_FUNC void CARDi_ReadRom(u32 dma, const void *src, void *dst, u32 len, MIDmaCallback callback, void *arg, BOOL is_async)
+{
+ CARDRomStat *const p = &rom_stat;
+ CARDiCommon *const c = &cardi_common;
+
+ CARD_CheckEnabled();
+
+ CARDi_WaitTask(c, callback, arg);
+
+ c->dma = dma;
+ c->src = (u32)((u32)src + cardi_rom_base);
+ c->dst = (u32)dst;
+ c->len = (u32)len;
+ if (dma <= MI_DMA_MAX_NUM)
+ {
+ MI_StopDma(dma);
+ }
+
+ if (CARDi_TryReadCardDma(p))
+ {
+ if (!is_async)
+ {
+ CARD_WaitRomAsync();
+ }
+ }
+ else if (is_async)
+ {
+ CARDi_SetTask(CARDi_ReadRomSyncCore);
+ }
+ else
+ {
+ c->cur_th = OS_GetCurrentThread();
+ CARDi_ReadRomSyncCore(c);
+ }
+}
+
+ARM_FUNC void CARD_Init(void)
+{
+ CARDiCommon *const p = &cardi_common;
+
+ if (!p->flag)
+ {
+ p->flag = CARD_STAT_INIT;
+ p->src = p->dst = p->len = 0;
+ p->dma = (u32)~0;
+ p->callback = NULL;
+ p->callback_arg = NULL;
+
+ cardi_rom_base = 0;
+
+ CARDi_InitCommon();
+
+ rom_stat.read_func = CARDi_GetRomAccessor();
+
+ CARD_InitPulledOutCallback();
+ }
+}
+
+ARM_FUNC void CARD_WaitRomAsync(void)
+{
+ (void)CARDi_WaitAsync();
+}
+
+ARM_FUNC void (*CARDi_GetRomAccessor(void)) (CARDRomStat *)
+{
+ return CARDi_ReadCard;
+}
diff --git a/arm9/lib/src/OS_init.c b/arm9/lib/src/OS_init.c
index 83e8a7d9..d1465625 100644
--- a/arm9/lib/src/OS_init.c
+++ b/arm9/lib/src/OS_init.c
@@ -2,9 +2,9 @@
#include "OS_init.h"
#include "MI_init.h"
#include "PXI_init.h"
+#include "CARD_rom.h"
extern void CTRDG_Init(void);
-extern void CARD_Init(void);
extern void PM_Init(void);
ARM_FUNC void OS_Init(void) {
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-26 12:56:44 +0000