diff options
Diffstat (limited to 'arm9/lib')
-rw-r--r-- | arm9/lib/include/GX_ioreg.h | 67 | ||||
-rw-r--r-- | arm9/lib/include/OS_irqHandler.h | 2 | ||||
-rw-r--r-- | arm9/lib/include/gx.h | 23 | ||||
-rw-r--r-- | arm9/lib/src/GX.c | 53 |
4 files changed, 110 insertions, 35 deletions
diff --git a/arm9/lib/include/GX_ioreg.h b/arm9/lib/include/GX_ioreg.h index 81055b0a..bfdc370a 100644 --- a/arm9/lib/include/GX_ioreg.h +++ b/arm9/lib/include/GX_ioreg.h @@ -81,4 +81,71 @@ #define REG_GX_DISPCNT_EXOBJ_BM_SIZE 1
#define REG_GX_DISPCNT_EXOBJ_BM_MASK 0x00400000
+// DISPSTAT
+#define REG_GX_DISPSTAT_VCOUNTER_SHIFT 7
+#define REG_GX_DISPSTAT_VCOUNTER_SIZE 9
+#define REG_GX_DISPSTAT_VCOUNTER_MASK 0xff80
+
+#define REG_GX_DISPSTAT_VQI_SHIFT 5
+#define REG_GX_DISPSTAT_VQI_SIZE 1
+#define REG_GX_DISPSTAT_VQI_MASK 0x0020
+
+#define REG_GX_DISPSTAT_HBI_SHIFT 4
+#define REG_GX_DISPSTAT_HBI_SIZE 1
+#define REG_GX_DISPSTAT_HBI_MASK 0x0010
+
+#define REG_GX_DISPSTAT_VBI_SHIFT 3
+#define REG_GX_DISPSTAT_VBI_SIZE 1
+#define REG_GX_DISPSTAT_VBI_MASK 0x0008
+
+#define REG_GX_DISPSTAT_LYC_SHIFT 2
+#define REG_GX_DISPSTAT_LYC_SIZE 1
+#define REG_GX_DISPSTAT_LYC_MASK 0x0004
+
+#define REG_GX_DISPSTAT_HBLK_SHIFT 1
+#define REG_GX_DISPSTAT_HBLK_SIZE 1
+#define REG_GX_DISPSTAT_HBLK_MASK 0x0002
+
+#define REG_GX_DISPSTAT_VBLK_SHIFT 0
+#define REG_GX_DISPSTAT_VBLK_SIZE 1
+#define REG_GX_DISPSTAT_VBLK_MASK 0x0001
+
+// POWCNT
+#define REG_GX_POWCNT_GE_SHIFT 3
+#define REG_GX_POWCNT_GE_SIZE 1
+#define REG_GX_POWCNT_GE_MASK 0x0008
+
+#define REG_GX_POWCNT_RE_SHIFT 2
+#define REG_GX_POWCNT_RE_SIZE 1
+#define REG_GX_POWCNT_RE_MASK 0x0004
+
+#define REG_GX_POWCNT_E2DG_SHIFT 1
+#define REG_GX_POWCNT_E2DG_SIZE 1
+#define REG_GX_POWCNT_E2DG_MASK 0x0002
+
+#define REG_GX_POWCNT_LCD_SHIFT 0
+#define REG_GX_POWCNT_LCD_SIZE 1
+#define REG_GX_POWCNT_LCD_MASK 0x0001
+
+#define REG_GX_POWCNT_LCDB_SHIFT 8
+#define REG_GX_POWCNT_LCDB_SIZE 1
+#define REG_GX_POWCNT_LCDB_MASK 0x0100
+
+#define REG_GX_POWCNT_E2DGB_SHIFT 9
+#define REG_GX_POWCNT_E2DGB_SIZE 1
+#define REG_GX_POWCNT_E2DGB_MASK 0x0200
+
+#define REG_GX_POWCNT_DSEL_SHIFT 15
+#define REG_GX_POWCNT_DSEL_SIZE 1
+#define REG_GX_POWCNT_DSEL_MASK 0x8000
+
+// MASTER BRIGHT
+#define REG_GX_MASTER_BRIGHT_E_MOD_SHIFT 14
+#define REG_GX_MASTER_BRIGHT_E_MOD_SIZE 2
+#define REG_GX_MASTER_BRIGHT_E_MOD_MASK 0xc000
+
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SHIFT 0
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SIZE 5
+#define REG_GX_MASTER_BRIGHT_E_VALUE_MASK 0x001f
+
#endif //NITRO_GX_IOREG_H
diff --git a/arm9/lib/include/OS_irqHandler.h b/arm9/lib/include/OS_irqHandler.h index f052016d..ea12a0ad 100644 --- a/arm9/lib/include/OS_irqHandler.h +++ b/arm9/lib/include/OS_irqHandler.h @@ -16,6 +16,6 @@ static inline OSIrqMask OS_GetIrqCheckFlag(void) void OS_IrqHandler(void); void OS_IrqHandler_ThreadSwitch(void); -void OS_WaitIrq(BOOL param1, u32 param2); +void OS_WaitIrq(BOOL clear, OSIrqMask irqFlags); #endif //POKEDIAMOND_OS_IRQHANDLER_H diff --git a/arm9/lib/include/gx.h b/arm9/lib/include/gx.h index 210d61f4..d73b4f53 100644 --- a/arm9/lib/include/gx.h +++ b/arm9/lib/include/gx.h @@ -27,15 +27,6 @@ void GXi_NopClearFifo128_(void *); #include "GX_g3imm.h" #include "GX_dma.h" -void GX_Init(); -u32 GX_HBlankIntr(u32 enable); -u32 GX_VBlankIntr(u32 enable); -void GX_DispOff(); -void GX_DispOn(); -void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3); -void GXS_SetGraphicsMode(u32 mode); -void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness); - typedef union { u32 raw; @@ -181,4 +172,18 @@ typedef enum } GXOBJVRamModeChar; +void GX_Init(); +u32 GX_HBlankIntr(u32 enable); +u32 GX_VBlankIntr(u32 enable); +void GX_DispOff(); +void GX_DispOn(); +void GX_SetGraphicsMode(GXDispMode dispMode, GXBGMode bgMode, GXBG0As bg0_2d3d); +void GXS_SetGraphicsMode(GXBGMode mode); +void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness); + +static inline void GX_SetMasterBrightness(int brightness) +{ + GXx_SetMasterBrightness_(®_GX_MASTER_BRIGHT, brightness); +} + #endif //GUARD_GX_H diff --git a/arm9/lib/src/GX.c b/arm9/lib/src/GX.c index 69ad8718..57233492 100644 --- a/arm9/lib/src/GX.c +++ b/arm9/lib/src/GX.c @@ -1,5 +1,6 @@ #include "global.h" #include "gx.h" +#include "GXS_ioreg.h" u32 GXi_DmaId = 3; vu16 GXi_VRamLockId = 0; @@ -7,16 +8,18 @@ vu16 GXi_VRamLockId = 0; static u16 sDispMode = 0; static u16 sIsDispOn = TRUE; +#define _powcnt_init_mask (REG_GX_POWCNT_E2DGB_MASK | REG_GX_POWCNT_E2DG_MASK | REG_GX_POWCNT_RE_MASK | REG_GX_POWCNT_GE_MASK) + ARM_FUNC void GX_Init(){ - reg_GX_POWCNT |= 0x8000; - reg_GX_POWCNT = (u16)((reg_GX_POWCNT & ~0x20E) | 0x20E); - reg_GX_POWCNT = (u16)(reg_GX_POWCNT | 0x1); + reg_GX_POWCNT |= REG_GX_POWCNT_DSEL_MASK; + reg_GX_POWCNT = (u16)((reg_GX_POWCNT & ~_powcnt_init_mask) | _powcnt_init_mask); + reg_GX_POWCNT = (u16)(reg_GX_POWCNT | REG_GX_POWCNT_LCD_MASK); GX_InitGXState(); s32 temp; while (GXi_VRamLockId == 0) { temp = OS_GetLockID(); - if (temp == -3) + if (temp == OS_LOCK_ID_ERROR) { OS_Terminate(); } @@ -47,62 +50,62 @@ ARM_FUNC void GX_Init(){ } ARM_FUNC u32 GX_HBlankIntr(u32 enable){ - u32 temp = (u32)(reg_GX_DISPSTAT & 0x10); + u32 temp = (u32)(reg_GX_DISPSTAT & REG_GX_DISPSTAT_HBI_MASK); if (enable) { - reg_GX_DISPSTAT |= 0x10; + reg_GX_DISPSTAT |= REG_GX_DISPSTAT_HBI_MASK; } else { - reg_GX_DISPSTAT &= ~0x10; + reg_GX_DISPSTAT &= ~REG_GX_DISPSTAT_HBI_MASK; } return temp; } ARM_FUNC u32 GX_VBlankIntr(u32 enable){ - u32 temp = (u32)(reg_GX_DISPSTAT & 0x8); + u32 temp = (u32)(reg_GX_DISPSTAT & REG_GX_DISPSTAT_VBI_MASK); if (enable) { - reg_GX_DISPSTAT |= 0x8; + reg_GX_DISPSTAT |= REG_GX_DISPSTAT_VBI_MASK; } else { - reg_GX_DISPSTAT &= ~0x8; + reg_GX_DISPSTAT &= ~REG_GX_DISPSTAT_VBI_MASK; } return temp; } ARM_FUNC void GX_DispOff(){ u32 temp = reg_GX_DISPCNT; - sIsDispOn = 0x0; - sDispMode = (u16)((temp & 0x30000) >> 0x10); - reg_GX_DISPCNT = temp & ~0x30000; + sIsDispOn = FALSE; + sDispMode = (u16)((temp & REG_GX_DISPCNT_MODE_MASK) >> REG_GX_DISPCNT_MODE_SHIFT); + reg_GX_DISPCNT = temp & ~REG_GX_DISPCNT_MODE_MASK; } ARM_FUNC void GX_DispOn(){ - sIsDispOn = 0x1; + sIsDispOn = TRUE; if (sDispMode) { - reg_GX_DISPCNT = (reg_GX_DISPCNT & ~0x30000) | (sDispMode << 0x10); + reg_GX_DISPCNT = (reg_GX_DISPCNT & ~REG_GX_DISPCNT_MODE_MASK) | (sDispMode << REG_GX_DISPCNT_MODE_SHIFT); } else { - reg_GX_DISPCNT = reg_GX_DISPCNT | 0x10000; + reg_GX_DISPCNT = reg_GX_DISPCNT | (GX_DISPMODE_GRAPHICS << REG_GX_DISPCNT_MODE_SHIFT); } } -ARM_FUNC void GX_SetGraphicsMode(u32 mode1, u32 mode2, u32 mode3){ +ARM_FUNC void GX_SetGraphicsMode(GXDispMode dispMode, GXBGMode bgMode, GXBG0As bg0_2d3d){ u32 temp2 = reg_GX_DISPCNT; - sDispMode = (u16)mode1; + sDispMode = (u16)dispMode; if (!sIsDispOn) - mode1 = 0; - reg_GX_DISPCNT = (mode2 | ((temp2 & 0xFFF0FFF0) | (mode1 << 0x10))) | (mode3 << 0x3); + dispMode = 0; + reg_GX_DISPCNT = ((bgMode << REG_GX_DISPCNT_BGMODE_SHIFT) | ((temp2 & ~(REG_GX_DISPCNT_BGMODE_MASK | REG_GX_DISPCNT_MODE_MASK | REG_GX_DISPCNT_BG02D3D_MASK | REG_GX_DISPCNT_VRAM_MASK)) | (dispMode << REG_GX_DISPCNT_MODE_SHIFT))) | (bg0_2d3d << REG_GX_DISPCNT_BG02D3D_SHIFT); if (!sDispMode) - sIsDispOn = 0x0; + sIsDispOn = FALSE; } -ARM_FUNC void GXS_SetGraphicsMode(u32 mode){ - reg_GXS_DB_DISPCNT = (reg_GXS_DB_DISPCNT & ~0x7) | mode; +ARM_FUNC void GXS_SetGraphicsMode(GXBGMode mode){ + reg_GXS_DB_DISPCNT = (reg_GXS_DB_DISPCNT & ~REG_GXS_DB_DISPCNT_BGMODE_MASK) | mode; } ARM_FUNC void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ @@ -112,10 +115,10 @@ ARM_FUNC void GXx_SetMasterBrightness_(vu16 *dst, s32 brightness){ } else if (brightness > 0) { - *dst = (u16)(0x4000 | brightness); + *dst = (u16)((1 << REG_GX_MASTER_BRIGHT_E_MOD_SHIFT) | brightness); } else { - *dst = (u16)(0x8000 | -brightness); + *dst = (u16)((2 << REG_GX_MASTER_BRIGHT_E_MOD_SHIFT) | -brightness); } } |