blob: 5e21d7e6b3312e9318ea278ad88b03a997119f2d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
|
#ifndef POKEDIAMOND_MI_EXMEMORY_H
#define POKEDIAMOND_MI_EXMEMORY_H
#include "registers.h"
typedef enum {
MI_PROCESSOR_ARM9 = 0,
MI_PROCESSOR_ARM7 = 1
} MIProcessor;
typedef enum
{
MI_CTRDG_ROMCYCLE1_10 = 0,
MI_CTRDG_ROMCYCLE1_8 = 1,
MI_CTRDG_ROMCYCLE1_6 = 2,
MI_CTRDG_ROMCYCLE1_18 = 3
} MICartridgeRomCycle1st;
typedef enum
{
MI_CTRDG_ROMCYCLE2_6 = 0,
MI_CTRDG_ROMCYCLE2_4 = 1
} MICartridgeRomCycle2nd;
typedef enum
{
MI_CTRDG_RAMCYCLE_10 = 0,
MI_CTRDG_RAMCYCLE_8 = 1,
MI_CTRDG_RAMCYCLE_6 = 2,
MI_CTRDG_RAMCYCLE_18 = 3
} MICartridgeRamCycle;
static inline void MIi_SetCardProcessor(MIProcessor proc)
{
reg_MI_EXMEMCNT =
(u16)((reg_MI_EXMEMCNT & ~0x0800) | (proc << 11));
}
static inline void MIi_SetCartridgeProcessor(MIProcessor proc)
{
reg_MI_EXMEMCNT =
(u16)((reg_MI_EXMEMCNT & ~0x0080) | (proc << 7));
}
static inline MICartridgeRomCycle1st MI_GetCartridgeRomCycle1st(void)
{
return (MICartridgeRomCycle1st)((reg_MI_EXMEMCNT & 0xc) >> 2);
}
static inline MICartridgeRomCycle2nd MI_GetCartridgeRomCycle2nd(void)
{
return (MICartridgeRomCycle2nd)((reg_MI_EXMEMCNT & 0x10) >> 4);
}
static inline void MI_SetCartridgeRomCycle1st(MICartridgeRomCycle1st c1)
{
reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~0xc) | (c1 << 2));
}
static inline void MI_SetCartridgeRomCycle2nd(MICartridgeRomCycle2nd c2)
{
reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~0x10) | (c2 << 4));
}
static inline void MI_SetCartridgeRamCycle(MICartridgeRamCycle c)
{
reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~3) | (c << 0));
}
static inline MICartridgeRamCycle MI_GetCartridgeRamCycle(void)
{
return (MICartridgeRamCycle)((reg_MI_EXMEMCNT & 3) >> 0);
}
#endif //POKEDIAMOND_MI_EXMEMORY_H
|