1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
|
#include "global.h"
#include "main.h"
#include "gx.h"
extern u32 GXi_DmaId;
ARM_FUNC asm void GXi_NopClearFifo128_(void *reg){
mov r1, #0x0
mov r2, #0x0
mov r3, #0x0
mov r12, #0x0
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
stmia r0, {r1-r3,r12}
bx lr
}
ARM_FUNC void G3X_Init(){
G3X_ClearFifo();
reg_G3_END_VTXS = 0x0;
while (reg_G3X_GXSTAT & 0x8000000) {} //wait for geometry engine to not be busy
reg_G3X_DISP3DCNT = 0x0;
reg_G3X_GXSTAT = 0x0;
reg_G2_BG0OFS = 0x0;
reg_G3X_DISP3DCNT |= 0x2000;
reg_G3X_DISP3DCNT |= 0x1000;
reg_G3X_DISP3DCNT &= ~0x3002;
reg_G3X_DISP3DCNT = (u16)((reg_G3X_DISP3DCNT & ~0x3000) | 0x10);
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT & (u16)~0x3004);
reg_G3X_GXSTAT |= 0x8000;
reg_G3X_GXSTAT = (reg_G3X_GXSTAT & ~0xC0000000) | 0x80000000;
G3X_InitMtxStack();
reg_G3X_CLEAR_COLOR = 0x0;
reg_G3X_CLEAR_DEPTH = 0x7FFF;
reg_G3X_CLRIMAGE_OFFSET = 0x0;
reg_G3X_FOG_COLOR = 0x0;
reg_G3X_FOG_OFFSET = 0x0;
reg_G2_BG0CNT &= ~0x3;
G3X_InitTable();
reg_G3_POLYGON_ATTR = 0x1F0080;
reg_G3_TEXIMAGE_PARAM = 0x0;
reg_G3_TEXPLTT_BASE = 0x0;
}
ARM_FUNC void G3X_ResetMtxStack(){
while (reg_G3X_GXSTAT & 0x8000000) {}
reg_G3X_GXSTAT |= 0x8000;
reg_G3X_DISP3DCNT |= 0x2000;
reg_G3X_DISP3DCNT |= 0x1000;
G3X_ResetMtxStack_2();
reg_G3_POLYGON_ATTR = 0x1F0080;
reg_G3_TEXIMAGE_PARAM = 0x0;
reg_G3_TEXPLTT_BASE = 0x0;
}
ARM_FUNC void G3X_ClearFifo(){
GXi_NopClearFifo128_((void *)®_G3X_GXFIFO);
while (reg_G3X_GXSTAT & 0x8000000) {}
}
ARM_FUNC void G3X_InitMtxStack(){
u32 PV_level, PJ_level;
reg_G3X_GXSTAT |= 0x8000;
while (G3X_GetMtxStackLevelPV(&PV_level)) {}
while (G3X_GetMtxStackLevelPJ(&PJ_level)) {}
reg_G3_MTX_MODE = 0x3;
reg_G3_MTX_IDENTITY = 0x0;
reg_G3_MTX_MODE = 0x0;
if (PJ_level)
{
reg_G3_MTX_POP = PJ_level;
}
reg_G3_MTX_IDENTITY = 0x0;
reg_G3_MTX_MODE = 0x2;
reg_G3_MTX_POP = PV_level;
reg_G3_MTX_IDENTITY = 0x0;
}
ARM_FUNC void G3X_ResetMtxStack_2(){
u32 PV_level, PJ_level;
reg_G3X_GXSTAT |= 0x8000;
while (G3X_GetMtxStackLevelPV(&PV_level)) {}
while (G3X_GetMtxStackLevelPJ(&PJ_level)) {}
reg_G3_MTX_MODE = 0x3;
reg_G3_MTX_IDENTITY = 0x0;
reg_G3_MTX_MODE = 0x0;
if (PJ_level)
{
reg_G3_MTX_POP = PJ_level;
}
reg_G3_MTX_MODE = 0x2;
reg_G3_MTX_POP = PV_level;
reg_G3_MTX_IDENTITY = 0x0;
}
ARM_FUNC void G3X_SetFog(u32 enable, u32 alphamode, u32 depth, s32 offset){
if (enable)
{
reg_G3X_FOG_OFFSET = (u16)offset;
reg_G3X_DISP3DCNT = (u16)((reg_G3X_DISP3DCNT &~0x3f40) | (((depth << 0x8)| (alphamode << 0x6)|0x80 )));
}
else
{
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT & (u16)~0x3080);
}
}
ARM_FUNC u32 G3X_GetClipMtx(struct Mtx44 *dst){
if (reg_G3X_GXSTAT & 0x8000000)
{
return (u32)-1;
}
else
{
MI_Copy64B((void *)®_G3X_CLIPMTX_RESULT_0, dst);
return 0;
}
}
ARM_FUNC u32 G3X_GetVectorMtx(struct Mtx33 *dst){
if (reg_G3X_GXSTAT & 0x8000000)
{
return (u32)-1;
}
else
{
MI_Copy36B((void *)®_G3X_VECMTX_RESULT_0, dst);
return 0;
}
}
ARM_FUNC void G3X_SetEdgeColorTable(void *tbl_ptr){
MIi_CpuCopy16(tbl_ptr, (void *)®_G3X_EDGE_COLOR_0, 0x10);
}
ARM_FUNC void G3X_SetFogTable(void *tbl_ptr){
MI_Copy32B(tbl_ptr, (void *)®_G3X_FOG_TABLE_0);
}
ARM_FUNC void G3X_SetClearColor(u32 col, u32 alpha, u32 depth, u32 polygon_id, u32 enable_fog){
u32 temp = col | (alpha << 0x10) | (polygon_id << 0x18);
if (enable_fog)
temp |= 0x8000;
reg_G3X_CLEAR_COLOR = temp;
reg_G3X_CLEAR_DEPTH = (u16)depth;
}
ARM_FUNC void G3X_InitTable(){
if (GXi_DmaId != -1)
{
MI_DmaFill32Async(GXi_DmaId, (void *)®_G3X_EDGE_COLOR_0, 0x0, 0x10, 0x0, 0x0);
MI_DmaFill32(GXi_DmaId, (void *)®_G3X_FOG_TABLE_0, 0x0, 0x60);
}
else
{
MIi_CpuClear32(0x0, (void *)®_G3X_EDGE_COLOR_0, 0x10);
MIi_CpuClear32(0x0, (void *)®_G3X_FOG_TABLE_0, 0x60);
}
for (int i = 0; i < 0x20; i++)
{
reg_G3_SHININESS = 0x0;
}
}
ARM_FUNC u32 G3X_GetMtxStackLevelPV(u32 *level){
if (reg_G3X_GXSTAT & 0x4000)
{
return (u32)-1;
}
else
{
*level = (reg_G3X_GXSTAT & 0x1F00) >> 0x8;
return 0;
}
}
ARM_FUNC u32 G3X_GetMtxStackLevelPJ(u32 *level){
if (reg_G3X_GXSTAT & 0x4000)
{
return (u32)-1;
}
else
{
*level = (reg_G3X_GXSTAT & 0x2000) >> 0xD;
return 0;
}
}
ARM_FUNC u32 G3X_GetBoxTestResult(u32 *result){
if (reg_G3X_GXSTAT & 0x1)
{
return (u32)-1;
}
else
{
*result = (reg_G3X_GXSTAT & 0x2);
return 0;
}
}
ARM_FUNC void G3X_SetHOffset(u32 offset){
reg_G2_BG0OFS = offset;
}
|
