librfu_stwi

Co-authored-by: Max Thomas <mtinc2@gmail.com>

6 files changed, 715 insertions, 1577 deletions

diff --git a/asm/librfu_stwi.s b/asm/librfu_stwi.s
deleted file mode 100644
index 5434d037f..000000000
--- a/asm/librfu_stwi.s
+++ /dev/null
@@ -1,1560 +0,0 @@
-	.include "constants/gba_constants.inc"
-	.include "asm/macros.inc"
-
-	.syntax unified
-
-	.text
-
-	thumb_func_start STWI_init_all
-STWI_init_all: @ 81DF114
-	push {r4,lr}
-	adds r3, r0, 0
-	lsls r2, 24
-	lsrs r2, 24
-	cmp r2, 0x1
-	bne _081DF150
-	adds r2, r3, 0
-	adds r2, 0xE8
-	str r2, [r1]
-	ldr r1, _081DF13C @ =0x040000d4
-	ldr r0, _081DF140 @ =IntrSIO32
-	str r0, [r1]
-	str r2, [r1, 0x4]
-	ldr r0, _081DF144 @ =0x800004b0
-	str r0, [r1, 0x8]
-	ldr r0, [r1, 0x8]
-	ldr r1, _081DF148 @ =gRfuState
-	ldr r2, _081DF14C @ =0x00000a48
-	adds r0, r3, r2
-	b _081DF15A
-	.align 2, 0
-_081DF13C: .4byte 0x040000d4
-_081DF140: .4byte IntrSIO32
-_081DF144: .4byte 0x800004b0
-_081DF148: .4byte gRfuState
-_081DF14C: .4byte 0x00000a48
-_081DF150:
-	ldr r0, _081DF1D4 @ =IntrSIO32
-	str r0, [r1]
-	ldr r1, _081DF1D8 @ =gRfuState
-	adds r0, r3, 0
-	adds r0, 0xE8
-_081DF15A:
-	str r0, [r1]
-	adds r2, r1, 0
-	ldr r1, [r2]
-	str r3, [r1, 0x28]
-	adds r0, r3, 0
-	adds r0, 0x74
-	str r0, [r1, 0x24]
-	ldrb r0, [r1, 0x14]
-	movs r4, 0
-	movs r0, 0x1
-	strb r0, [r1, 0x14]
-	ldr r0, [r2]
-	str r4, [r0]
-	strb r4, [r0, 0x4]
-	ldr r0, [r2]
-	strb r4, [r0, 0x5]
-	ldr r0, [r2]
-	strb r4, [r0, 0x7]
-	ldr r0, [r2]
-	strb r4, [r0, 0x8]
-	ldr r0, [r2]
-	strb r4, [r0, 0x9]
-	ldr r0, [r2]
-	str r4, [r0, 0xC]
-	ldrb r1, [r0, 0x10]
-	strb r4, [r0, 0x10]
-	ldr r0, [r2]
-	ldrh r1, [r0, 0x12]
-	movs r1, 0
-	strh r4, [r0, 0x12]
-	strb r1, [r0, 0x15]
-	ldr r0, [r2]
-	adds r0, 0x2C
-	ldrb r2, [r0]
-	strb r1, [r0]
-	ldr r1, _081DF1DC @ =0x04000134
-	movs r2, 0x80
-	lsls r2, 1
-	adds r0, r2, 0
-	strh r0, [r1]
-	subs r1, 0xC
-	ldr r2, _081DF1E0 @ =0x00005003
-	adds r0, r2, 0
-	strh r0, [r1]
-	bl STWI_init_Callback_M
-	bl STWI_init_Callback_S
-	ldr r3, _081DF1E4 @ =0x04000208
-	ldrh r2, [r3]
-	strh r4, [r3]
-	ldr r4, _081DF1E8 @ =0x04000200
-	ldrh r0, [r4]
-	movs r1, 0x80
-	orrs r0, r1
-	strh r0, [r4]
-	strh r2, [r3]
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF1D4: .4byte IntrSIO32
-_081DF1D8: .4byte gRfuState
-_081DF1DC: .4byte 0x04000134
-_081DF1E0: .4byte 0x00005003
-_081DF1E4: .4byte 0x04000208
-_081DF1E8: .4byte 0x04000200
-	thumb_func_end STWI_init_all
-
-	thumb_func_start STWI_init_timer
-STWI_init_timer: @ 81DF1EC
-	push {r4,r5,lr}
-	ldr r2, _081DF218 @ =STWI_intr_timer
-	str r2, [r0]
-	ldr r5, _081DF21C @ =gRfuState
-	ldr r0, [r5]
-	movs r4, 0
-	strb r1, [r0, 0xA]
-	ldr r3, _081DF220 @ =0x04000208
-	ldrh r2, [r3]
-	strh r4, [r3]
-	ldr r4, _081DF224 @ =0x04000200
-	ldr r1, [r5]
-	movs r0, 0x8
-	ldrb r1, [r1, 0xA]
-	lsls r0, r1
-	ldrh r1, [r4]
-	orrs r0, r1
-	strh r0, [r4]
-	strh r2, [r3]
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF218: .4byte STWI_intr_timer
-_081DF21C: .4byte gRfuState
-_081DF220: .4byte 0x04000208
-_081DF224: .4byte 0x04000200
-	thumb_func_end STWI_init_timer
-
-	thumb_func_start AgbRFU_SoftReset
-AgbRFU_SoftReset: @ 81DF228
-	push {r4,r5,lr}
-	ldr r5, _081DF2C0 @ =0x04000134
-	movs r1, 0x80
-	lsls r1, 8
-	adds r0, r1, 0
-	strh r0, [r5]
-	ldr r2, _081DF2C4 @ =0x000080a0
-	adds r0, r2, 0
-	strh r0, [r5]
-	ldr r1, _081DF2C8 @ =gRfuState
-	ldr r0, [r1]
-	ldrb r0, [r0, 0xA]
-	lsls r0, 2
-	ldr r3, _081DF2CC @ =0x04000100
-	adds r2, r0, r3
-	ldr r4, _081DF2D0 @ =0x04000102
-	adds r3, r0, r4
-	movs r0, 0
-	strh r0, [r3]
-	strh r0, [r2]
-	movs r0, 0x83
-	strh r0, [r3]
-	ldrh r0, [r2]
-	adds r4, r1, 0
-	cmp r0, 0x11
-	bhi _081DF268
-	ldr r0, _081DF2D4 @ =0x000080a2
-	adds r1, r0, 0
-_081DF260:
-	strh r1, [r5]
-	ldrh r0, [r2]
-	cmp r0, 0x11
-	bls _081DF260
-_081DF268:
-	movs r0, 0x3
-	strh r0, [r3]
-	ldr r1, _081DF2C0 @ =0x04000134
-	ldr r2, _081DF2C4 @ =0x000080a0
-	adds r0, r2, 0
-	strh r0, [r1]
-	subs r1, 0xC
-	ldr r3, _081DF2D8 @ =0x00005003
-	adds r0, r3, 0
-	strh r0, [r1]
-	ldr r0, [r4]
-	movs r2, 0
-	str r2, [r0]
-	strb r2, [r0, 0x4]
-	ldr r0, [r4]
-	strb r2, [r0, 0x5]
-	ldr r0, [r4]
-	strb r2, [r0, 0x6]
-	ldr r0, [r4]
-	strb r2, [r0, 0x7]
-	ldr r0, [r4]
-	strb r2, [r0, 0x8]
-	ldr r0, [r4]
-	strb r2, [r0, 0x9]
-	ldr r0, [r4]
-	str r2, [r0, 0xC]
-	ldrb r1, [r0, 0x10]
-	strb r2, [r0, 0x10]
-	ldr r1, [r4]
-	ldrh r0, [r1, 0x12]
-	movs r3, 0
-	strh r2, [r1, 0x12]
-	ldrb r0, [r1, 0x14]
-	movs r0, 0x1
-	strb r0, [r1, 0x14]
-	ldr r0, [r4]
-	strb r3, [r0, 0x15]
-	ldr r0, [r4]
-	adds r0, 0x2C
-	ldrb r1, [r0]
-	strb r3, [r0]
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF2C0: .4byte 0x04000134
-_081DF2C4: .4byte 0x000080a0
-_081DF2C8: .4byte gRfuState
-_081DF2CC: .4byte 0x04000100
-_081DF2D0: .4byte 0x04000102
-_081DF2D4: .4byte 0x000080a2
-_081DF2D8: .4byte 0x00005003
-	thumb_func_end AgbRFU_SoftReset
-
-	thumb_func_start STWI_set_MS_mode
-STWI_set_MS_mode: @ 81DF2DC
-	lsls r0, 24
-	lsrs r0, 24
-	ldr r1, _081DF2EC @ =gRfuState
-	ldr r1, [r1]
-	ldrb r2, [r1, 0x14]
-	strb r0, [r1, 0x14]
-	bx lr
-	.align 2, 0
-_081DF2EC: .4byte gRfuState
-	thumb_func_end STWI_set_MS_mode
-
-	thumb_func_start STWI_read_status
-STWI_read_status: @ 81DF2F0
-	push {lr}
-	lsls r0, 24
-	lsrs r0, 24
-	adds r1, r0, 0
-	cmp r0, 0x1
-	beq _081DF31C
-	cmp r0, 0x1
-	bgt _081DF306
-	cmp r0, 0
-	beq _081DF310
-	b _081DF344
-_081DF306:
-	cmp r1, 0x2
-	beq _081DF328
-	cmp r1, 0x3
-	beq _081DF338
-	b _081DF344
-_081DF310:
-	ldr r0, _081DF318 @ =gRfuState
-	ldr r0, [r0]
-	ldrh r0, [r0, 0x12]
-	b _081DF346
-	.align 2, 0
-_081DF318: .4byte gRfuState
-_081DF31C:
-	ldr r0, _081DF324 @ =gRfuState
-	ldr r0, [r0]
-	ldrb r0, [r0, 0x14]
-	b _081DF346
-	.align 2, 0
-_081DF324: .4byte gRfuState
-_081DF328:
-	ldr r0, _081DF334 @ =gRfuState
-	ldr r0, [r0]
-	ldr r0, [r0]
-	lsls r0, 16
-	lsrs r0, 16
-	b _081DF346
-	.align 2, 0
-_081DF334: .4byte gRfuState
-_081DF338:
-	ldr r0, _081DF340 @ =gRfuState
-	ldr r0, [r0]
-	ldrb r0, [r0, 0x6]
-	b _081DF346
-	.align 2, 0
-_081DF340: .4byte gRfuState
-_081DF344:
-	ldr r0, _081DF34C @ =0x0000ffff
-_081DF346:
-	pop {r1}
-	bx r1
-	.align 2, 0
-_081DF34C: .4byte 0x0000ffff
-	thumb_func_end STWI_read_status
-
-	thumb_func_start STWI_init_Callback_M
-STWI_init_Callback_M: @ 81DF350
-	push {lr}
-	movs r0, 0
-	bl STWI_set_Callback_M
-	pop {r0}
-	bx r0
-	thumb_func_end STWI_init_Callback_M
-
-	thumb_func_start STWI_init_Callback_S
-STWI_init_Callback_S: @ 81DF35C
-	push {lr}
-	movs r0, 0
-	bl STWI_set_Callback_S
-	pop {r0}
-	bx r0
-	thumb_func_end STWI_init_Callback_S
-
-	thumb_func_start STWI_set_Callback_M
-STWI_set_Callback_M: @ 81DF368
-	ldr r1, _081DF370 @ =gRfuState
-	ldr r1, [r1]
-	str r0, [r1, 0x18]
-	bx lr
-	.align 2, 0
-_081DF370: .4byte gRfuState
-	thumb_func_end STWI_set_Callback_M
-
-	thumb_func_start STWI_set_Callback_S
-STWI_set_Callback_S: @ 81DF374
-	ldr r1, _081DF37C @ =gRfuState
-	ldr r1, [r1]
-	str r0, [r1, 0x1C]
-	bx lr
-	.align 2, 0
-_081DF37C: .4byte gRfuState
-	thumb_func_end STWI_set_Callback_S
-
-	thumb_func_start STWI_set_Callback_ID
-STWI_set_Callback_ID: @ 81DF380
-	ldr r1, _081DF388 @ =gRfuState
-	ldr r1, [r1]
-	str r0, [r1, 0x20]
-	bx lr
-	.align 2, 0
-_081DF388: .4byte gRfuState
-	thumb_func_end STWI_set_Callback_ID
-
-	thumb_func_start STWI_poll_CommandEnd
-STWI_poll_CommandEnd: @ 81DF38C
-	push {lr}
-	ldr r0, _081DF3B0 @ =gRfuState
-	ldr r1, [r0]
-	adds r2, r1, 0
-	adds r2, 0x2C
-	ldrb r1, [r2]
-	adds r3, r0, 0
-	cmp r1, 0x1
-	bne _081DF3A6
-	adds r1, r2, 0
-_081DF3A0:
-	ldrb r0, [r1]
-	cmp r0, 0x1
-	beq _081DF3A0
-_081DF3A6:
-	ldr r0, [r3]
-	ldrh r0, [r0, 0x12]
-	pop {r1}
-	bx r1
-	.align 2, 0
-_081DF3B0: .4byte gRfuState
-	thumb_func_end STWI_poll_CommandEnd
-
-	thumb_func_start STWI_send_ResetREQ
-STWI_send_ResetREQ: @ 81DF3B4
-	push {lr}
-	movs r0, 0x10
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF3CE
-	ldr r0, _081DF3D4 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF3CE:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF3D4: .4byte gRfuState
-	thumb_func_end STWI_send_ResetREQ
-
-	thumb_func_start STWI_send_LinkStatusREQ
-STWI_send_LinkStatusREQ: @ 81DF3D8
-	push {lr}
-	movs r0, 0x11
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF3F2
-	ldr r0, _081DF3F8 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF3F2:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF3F8: .4byte gRfuState
-	thumb_func_end STWI_send_LinkStatusREQ
-
-	thumb_func_start STWI_send_VersionStatusREQ
-STWI_send_VersionStatusREQ: @ 81DF3FC
-	push {lr}
-	movs r0, 0x12
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF416
-	ldr r0, _081DF41C @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF416:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF41C: .4byte gRfuState
-	thumb_func_end STWI_send_VersionStatusREQ
-
-	thumb_func_start STWI_send_SystemStatusREQ
-STWI_send_SystemStatusREQ: @ 81DF420
-	push {lr}
-	movs r0, 0x13
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF43A
-	ldr r0, _081DF440 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF43A:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF440: .4byte gRfuState
-	thumb_func_end STWI_send_SystemStatusREQ
-
-	thumb_func_start STWI_send_SlotStatusREQ
-STWI_send_SlotStatusREQ: @ 81DF444
-	push {lr}
-	movs r0, 0x14
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF45E
-	ldr r0, _081DF464 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF45E:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF464: .4byte gRfuState
-	thumb_func_end STWI_send_SlotStatusREQ
-
-	thumb_func_start STWI_send_ConfigStatusREQ
-STWI_send_ConfigStatusREQ: @ 81DF468
-	push {lr}
-	movs r0, 0x15
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF482
-	ldr r0, _081DF488 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF482:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF488: .4byte gRfuState
-	thumb_func_end STWI_send_ConfigStatusREQ
-
-	thumb_func_start STWI_send_GameConfigREQ
-STWI_send_GameConfigREQ: @ 81DF48C
-	push {r4,r5,lr}
-	adds r4, r0, 0
-	adds r5, r1, 0
-	movs r0, 0x16
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF4D8
-	ldr r2, _081DF4E0 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x6
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r1, [r0, 0x24]
-	adds r1, 0x4
-	ldrh r0, [r4]
-	strh r0, [r1]
-	adds r1, 0x2
-	adds r4, 0x2
-	movs r2, 0xD
-_081DF4B6:
-	ldrb r0, [r4]
-	strb r0, [r1]
-	adds r1, 0x1
-	adds r4, 0x1
-	subs r2, 0x1
-	cmp r2, 0
-	bge _081DF4B6
-	movs r2, 0x7
-_081DF4C6:
-	ldrb r0, [r5]
-	strb r0, [r1]
-	adds r1, 0x1
-	adds r5, 0x1
-	subs r2, 0x1
-	cmp r2, 0
-	bge _081DF4C6
-	bl STWI_start_Command
-_081DF4D8:
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF4E0: .4byte gRfuState
-	thumb_func_end STWI_send_GameConfigREQ
-
-	thumb_func_start STWI_send_SystemConfigREQ
-STWI_send_SystemConfigREQ: @ 81DF4E4
-	push {r4-r6,lr}
-	lsls r0, 16
-	lsrs r6, r0, 16
-	lsls r1, 24
-	lsrs r5, r1, 24
-	lsls r2, 24
-	lsrs r4, r2, 24
-	movs r0, 0x17
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF51A
-	ldr r2, _081DF520 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r0, [r0, 0x24]
-	adds r0, 0x4
-	strb r4, [r0]
-	adds r0, 0x1
-	strb r5, [r0]
-	adds r0, 0x1
-	strh r6, [r0]
-	bl STWI_start_Command
-_081DF51A:
-	pop {r4-r6}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF520: .4byte gRfuState
-	thumb_func_end STWI_send_SystemConfigREQ
-
-	thumb_func_start STWI_send_SC_StartREQ
-STWI_send_SC_StartREQ: @ 81DF524
-	push {lr}
-	movs r0, 0x19
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF53E
-	ldr r0, _081DF544 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF53E:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF544: .4byte gRfuState
-	thumb_func_end STWI_send_SC_StartREQ
-
-	thumb_func_start STWI_send_SC_PollingREQ
-STWI_send_SC_PollingREQ: @ 81DF548
-	push {lr}
-	movs r0, 0x1A
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF562
-	ldr r0, _081DF568 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF562:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF568: .4byte gRfuState
-	thumb_func_end STWI_send_SC_PollingREQ
-
-	thumb_func_start STWI_send_SC_EndREQ
-STWI_send_SC_EndREQ: @ 81DF56C
-	push {lr}
-	movs r0, 0x1B
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF586
-	ldr r0, _081DF58C @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF586:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF58C: .4byte gRfuState
-	thumb_func_end STWI_send_SC_EndREQ
-
-	thumb_func_start STWI_send_SP_StartREQ
-STWI_send_SP_StartREQ: @ 81DF590
-	push {lr}
-	movs r0, 0x1C
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF5AA
-	ldr r0, _081DF5B0 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF5AA:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF5B0: .4byte gRfuState
-	thumb_func_end STWI_send_SP_StartREQ
-
-	thumb_func_start STWI_send_SP_PollingREQ
-STWI_send_SP_PollingREQ: @ 81DF5B4
-	push {lr}
-	movs r0, 0x1D
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF5CE
-	ldr r0, _081DF5D4 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF5CE:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF5D4: .4byte gRfuState
-	thumb_func_end STWI_send_SP_PollingREQ
-
-	thumb_func_start STWI_send_SP_EndREQ
-STWI_send_SP_EndREQ: @ 81DF5D8
-	push {lr}
-	movs r0, 0x1E
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF5F2
-	ldr r0, _081DF5F8 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF5F2:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF5F8: .4byte gRfuState
-	thumb_func_end STWI_send_SP_EndREQ
-
-	thumb_func_start STWI_send_CP_StartREQ
-STWI_send_CP_StartREQ: @ 81DF5FC
-	push {r4,lr}
-	lsls r0, 16
-	lsrs r4, r0, 16
-	movs r0, 0x1F
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF620
-	ldr r2, _081DF628 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r0, [r0, 0x24]
-	str r4, [r0, 0x4]
-	bl STWI_start_Command
-_081DF620:
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF628: .4byte gRfuState
-	thumb_func_end STWI_send_CP_StartREQ
-
-	thumb_func_start STWI_send_CP_PollingREQ
-STWI_send_CP_PollingREQ: @ 81DF62C
-	push {lr}
-	movs r0, 0x20
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF646
-	ldr r0, _081DF64C @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF646:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF64C: .4byte gRfuState
-	thumb_func_end STWI_send_CP_PollingREQ
-
-	thumb_func_start STWI_send_CP_EndREQ
-STWI_send_CP_EndREQ: @ 81DF650
-	push {lr}
-	movs r0, 0x21
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF66A
-	ldr r0, _081DF670 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF66A:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF670: .4byte gRfuState
-	thumb_func_end STWI_send_CP_EndREQ
-
-	thumb_func_start STWI_send_DataTxREQ
-STWI_send_DataTxREQ: @ 81DF674
-	push {r4-r6,lr}
-	adds r6, r0, 0
-	lsls r4, r1, 24
-	lsrs r5, r4, 24
-	movs r0, 0x24
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF6B2
-	lsrs r2, r4, 26
-	movs r0, 0x3
-	ands r0, r5
-	cmp r0, 0
-	beq _081DF694
-	adds r2, 0x1
-_081DF694:
-	ldr r1, _081DF6B8 @ =gRfuState
-	ldr r0, [r1]
-	strb r2, [r0, 0x4]
-	ldr r0, [r1]
-	ldr r1, [r0, 0x24]
-	adds r1, 0x4
-	ldrb r2, [r0, 0x4]
-	movs r0, 0x80
-	lsls r0, 19
-	orrs r2, r0
-	adds r0, r6, 0
-	bl CpuSet
-	bl STWI_start_Command
-_081DF6B2:
-	pop {r4-r6}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF6B8: .4byte gRfuState
-	thumb_func_end STWI_send_DataTxREQ
-
-	thumb_func_start STWI_send_DataTxAndChangeREQ
-STWI_send_DataTxAndChangeREQ: @ 81DF6BC
-	push {r4-r6,lr}
-	adds r6, r0, 0
-	lsls r4, r1, 24
-	lsrs r5, r4, 24
-	movs r0, 0x25
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF6FA
-	lsrs r2, r4, 26
-	movs r0, 0x3
-	ands r0, r5
-	cmp r0, 0
-	beq _081DF6DC
-	adds r2, 0x1
-_081DF6DC:
-	ldr r1, _081DF700 @ =gRfuState
-	ldr r0, [r1]
-	strb r2, [r0, 0x4]
-	ldr r0, [r1]
-	ldr r1, [r0, 0x24]
-	adds r1, 0x4
-	ldrb r2, [r0, 0x4]
-	movs r0, 0x80
-	lsls r0, 19
-	orrs r2, r0
-	adds r0, r6, 0
-	bl CpuSet
-	bl STWI_start_Command
-_081DF6FA:
-	pop {r4-r6}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF700: .4byte gRfuState
-	thumb_func_end STWI_send_DataTxAndChangeREQ
-
-	thumb_func_start STWI_send_DataRxREQ
-STWI_send_DataRxREQ: @ 81DF704
-	push {lr}
-	movs r0, 0x26
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF71E
-	ldr r0, _081DF724 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF71E:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF724: .4byte gRfuState
-	thumb_func_end STWI_send_DataRxREQ
-
-	thumb_func_start STWI_send_MS_ChangeREQ
-STWI_send_MS_ChangeREQ: @ 81DF728
-	push {lr}
-	movs r0, 0x27
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF742
-	ldr r0, _081DF748 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF742:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF748: .4byte gRfuState
-	thumb_func_end STWI_send_MS_ChangeREQ
-
-	thumb_func_start STWI_send_DataReadyAndChangeREQ
-STWI_send_DataReadyAndChangeREQ: @ 81DF74C
-	push {r4,r5,lr}
-	lsls r0, 24
-	lsrs r4, r0, 24
-	adds r5, r4, 0
-	movs r0, 0x28
-	bl STWI_init
-	lsls r0, 16
-	lsrs r3, r0, 16
-	cmp r3, 0
-	bne _081DF792
-	cmp r4, 0
-	bne _081DF774
-	ldr r0, _081DF770 @ =gRfuState
-	ldr r0, [r0]
-	strb r3, [r0, 0x4]
-	b _081DF78E
-	.align 2, 0
-_081DF770: .4byte gRfuState
-_081DF774:
-	ldr r2, _081DF798 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r0, [r0, 0x24]
-	adds r0, 0x4
-	strb r5, [r0]
-	adds r0, 0x1
-	strb r3, [r0]
-	adds r0, 0x1
-	strb r3, [r0]
-	strb r3, [r0, 0x1]
-_081DF78E:
-	bl STWI_start_Command
-_081DF792:
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF798: .4byte gRfuState
-	thumb_func_end STWI_send_DataReadyAndChangeREQ
-
-	thumb_func_start STWI_send_DisconnectedAndChangeREQ
-STWI_send_DisconnectedAndChangeREQ: @ 81DF79C
-	push {r4,r5,lr}
-	lsls r0, 24
-	lsrs r4, r0, 24
-	lsls r1, 24
-	lsrs r5, r1, 24
-	movs r0, 0x29
-	bl STWI_init
-	lsls r0, 16
-	lsrs r3, r0, 16
-	cmp r3, 0
-	bne _081DF7D2
-	ldr r2, _081DF7D8 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r0, [r0, 0x24]
-	adds r0, 0x4
-	strb r4, [r0]
-	adds r0, 0x1
-	strb r5, [r0]
-	adds r0, 0x1
-	strb r3, [r0]
-	strb r3, [r0, 0x1]
-	bl STWI_start_Command
-_081DF7D2:
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF7D8: .4byte gRfuState
-	thumb_func_end STWI_send_DisconnectedAndChangeREQ
-
-	thumb_func_start STWI_send_ResumeRetransmitAndChangeREQ
-STWI_send_ResumeRetransmitAndChangeREQ: @ 81DF7DC
-	push {lr}
-	movs r0, 0x37
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF7F6
-	ldr r0, _081DF7FC @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF7F6:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF7FC: .4byte gRfuState
-	thumb_func_end STWI_send_ResumeRetransmitAndChangeREQ
-
-	thumb_func_start STWI_send_DisconnectREQ
-STWI_send_DisconnectREQ: @ 81DF800
-	push {r4,lr}
-	lsls r0, 24
-	lsrs r4, r0, 24
-	movs r0, 0x30
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF824
-	ldr r2, _081DF82C @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r0, [r0, 0x24]
-	str r4, [r0, 0x4]
-	bl STWI_start_Command
-_081DF824:
-	pop {r4}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF82C: .4byte gRfuState
-	thumb_func_end STWI_send_DisconnectREQ
-
-	thumb_func_start STWI_send_TestModeREQ
-STWI_send_TestModeREQ: @ 81DF830
-	push {r4,r5,lr}
-	lsls r0, 24
-	lsrs r5, r0, 24
-	lsls r1, 24
-	lsrs r4, r1, 24
-	movs r0, 0x31
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF85C
-	ldr r2, _081DF864 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x1
-	strb r0, [r1, 0x4]
-	ldr r0, [r2]
-	ldr r1, [r0, 0x24]
-	lsls r0, r4, 8
-	orrs r0, r5
-	str r0, [r1, 0x4]
-	bl STWI_start_Command
-_081DF85C:
-	pop {r4,r5}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF864: .4byte gRfuState
-	thumb_func_end STWI_send_TestModeREQ
-
-	thumb_func_start STWI_send_CPR_StartREQ
-STWI_send_CPR_StartREQ: @ 81DF868
-	push {r4-r6,lr}
-	lsls r0, 16
-	lsrs r5, r0, 16
-	lsls r1, 16
-	lsrs r4, r1, 16
-	lsls r2, 24
-	lsrs r6, r2, 24
-	movs r0, 0x32
-	bl STWI_init
-	lsls r0, 16
-	cmp r0, 0
-	bne _081DF89A
-	ldr r2, _081DF8A0 @ =gRfuState
-	ldr r1, [r2]
-	movs r0, 0x2
-	strb r0, [r1, 0x4]
-	lsls r0, r5, 16
-	orrs r0, r4
-	ldr r1, [r2]
-	ldr r1, [r1, 0x24]
-	str r0, [r1, 0x4]
-	str r6, [r1, 0x8]
-	bl STWI_start_Command
-_081DF89A:
-	pop {r4-r6}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF8A0: .4byte gRfuState
-	thumb_func_end STWI_send_CPR_StartREQ
-
-	thumb_func_start STWI_send_CPR_PollingREQ
-STWI_send_CPR_PollingREQ: @ 81DF8A4
-	push {lr}
-	movs r0, 0x33
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF8BE
-	ldr r0, _081DF8C4 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF8BE:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF8C4: .4byte gRfuState
-	thumb_func_end STWI_send_CPR_PollingREQ
-
-	thumb_func_start STWI_send_CPR_EndREQ
-STWI_send_CPR_EndREQ: @ 81DF8C8
-	push {lr}
-	movs r0, 0x34
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF8E2
-	ldr r0, _081DF8E8 @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF8E2:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF8E8: .4byte gRfuState
-	thumb_func_end STWI_send_CPR_EndREQ
-
-	thumb_func_start STWI_send_StopModeREQ
-STWI_send_StopModeREQ: @ 81DF8EC
-	push {lr}
-	movs r0, 0x3D
-	bl STWI_init
-	lsls r0, 16
-	lsrs r1, r0, 16
-	cmp r1, 0
-	bne _081DF906
-	ldr r0, _081DF90C @ =gRfuState
-	ldr r0, [r0]
-	strb r1, [r0, 0x4]
-	bl STWI_start_Command
-_081DF906:
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DF90C: .4byte gRfuState
-	thumb_func_end STWI_send_StopModeREQ
-
-	thumb_func_start STWI_intr_timer
-STWI_intr_timer: @ 81DF910
-	push {r4,lr}
-	ldr r4, _081DF928 @ =gRfuState
-	ldr r1, [r4]
-	ldr r0, [r1, 0xC]
-	cmp r0, 0x2
-	beq _081DF936
-	cmp r0, 0x2
-	bhi _081DF92C
-	cmp r0, 0x1
-	beq _081DF944
-	b _081DF96C
-	.align 2, 0
-_081DF928: .4byte gRfuState
-_081DF92C:
-	cmp r0, 0x3
-	beq _081DF94E
-	cmp r0, 0x4
-	beq _081DF944
-	b _081DF96C
-_081DF936:
-	ldrb r0, [r1, 0x10]
-	movs r0, 0x1
-	strb r0, [r1, 0x10]
-	movs r0, 0x32
-	bl STWI_set_timer
-	b _081DF96C
-_081DF944:
-	bl STWI_stop_timer
-	bl STWI_restart_Command
-	b _081DF96C
-_081DF94E:
-	ldrb r0, [r1, 0x10]
-	movs r0, 0x1
-	strb r0, [r1, 0x10]
-	bl STWI_stop_timer
-	bl STWI_reset_ClockCounter
-	ldr r0, [r4]
-	ldr r2, [r0, 0x18]
-	cmp r2, 0
-	beq _081DF96C
-	movs r0, 0xFF
-	movs r1, 0
-	bl _call_via_r2
-_081DF96C:
-	pop {r4}
-	pop {r0}
-	bx r0
-	thumb_func_end STWI_intr_timer
-
-	thumb_func_start STWI_set_timer
-STWI_set_timer: @ 81DF974
-	push {r4-r7,lr}
-	lsls r0, 24
-	lsrs r3, r0, 24
-	adds r5, r3, 0
-	ldr r2, _081DF9A4 @ =gRfuState
-	ldr r0, [r2]
-	ldrb r0, [r0, 0xA]
-	lsls r0, 2
-	ldr r1, _081DF9A8 @ =0x04000100
-	adds r4, r0, r1
-	adds r1, 0x2
-	adds r7, r0, r1
-	ldr r1, _081DF9AC @ =0x04000208
-	movs r0, 0
-	strh r0, [r1]
-	adds r6, r2, 0
-	cmp r3, 0x50
-	beq _081DF9CC
-	cmp r3, 0x50
-	bgt _081DF9B0
-	cmp r3, 0x32
-	beq _081DF9BA
-	b _081DF9F8
-	.align 2, 0
-_081DF9A4: .4byte gRfuState
-_081DF9A8: .4byte 0x04000100
-_081DF9AC: .4byte 0x04000208
-_081DF9B0:
-	cmp r5, 0x64
-	beq _081DF9DC
-	cmp r5, 0x82
-	beq _081DF9EC
-	b _081DF9F8
-_081DF9BA:
-	ldr r1, _081DF9C8 @ =0x0000fccb
-	adds r0, r1, 0
-	strh r0, [r4]
-	ldr r1, [r6]
-	movs r0, 0x1
-	b _081DF9F6
-	.align 2, 0
-_081DF9C8: .4byte 0x0000fccb
-_081DF9CC:
-	ldr r1, _081DF9D8 @ =0x0000fae0
-	adds r0, r1, 0
-	strh r0, [r4]
-	ldr r1, [r6]
-	movs r0, 0x2
-	b _081DF9F6
-	.align 2, 0
-_081DF9D8: .4byte 0x0000fae0
-_081DF9DC:
-	ldr r1, _081DF9E8 @ =0x0000f996
-	adds r0, r1, 0
-	strh r0, [r4]
-	ldr r1, [r6]
-	movs r0, 0x3
-	b _081DF9F6
-	.align 2, 0
-_081DF9E8: .4byte 0x0000f996
-_081DF9EC:
-	ldr r1, _081DFA14 @ =0x0000f7ad
-	adds r0, r1, 0
-	strh r0, [r4]
-	ldr r1, [r6]
-	movs r0, 0x4
-_081DF9F6:
-	str r0, [r1, 0xC]
-_081DF9F8:
-	movs r0, 0xC3
-	strh r0, [r7]
-	ldr r2, _081DFA18 @ =0x04000202
-	ldr r1, [r6]
-	movs r0, 0x8
-	ldrb r1, [r1, 0xA]
-	lsls r0, r1
-	strh r0, [r2]
-	ldr r1, _081DFA1C @ =0x04000208
-	movs r0, 0x1
-	strh r0, [r1]
-	pop {r4-r7}
-	pop {r0}
-	bx r0
-	.align 2, 0
-_081DFA14: .4byte 0x0000f7ad
-_081DFA18: .4byte 0x04000202
-_081DFA1C: .4byte 0x04000208
-	thumb_func_end STWI_set_timer
-
-	thumb_func_start STWI_stop_timer
-STWI_stop_timer: @ 81DFA20
-	ldr r2, _081DFA40 @ =gRfuState
-	ldr r0, [r2]
-	movs r1, 0
-	str r1, [r0, 0xC]
-	ldrb r0, [r0, 0xA]
-	lsls r0, 2
-	ldr r3, _081DFA44 @ =0x04000100
-	adds r0, r3
-	strh r1, [r0]
-	ldr r0, [r2]
-	ldrb r0, [r0, 0xA]
-	lsls r0, 2
-	ldr r2, _081DFA48 @ =0x04000102
-	adds r0, r2
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_081DFA40: .4byte gRfuState
-_081DFA44: .4byte 0x04000100
-_081DFA48: .4byte 0x04000102
-	thumb_func_end STWI_stop_timer
-
-	thumb_func_start STWI_init
-STWI_init: @ 81DFA4C
-	push {r4-r6,lr}
-	lsls r0, 24
-	lsrs r5, r0, 24
-	adds r6, r5, 0
-	ldr r0, _081DFA78 @ =0x04000208
-	ldrh r0, [r0]
-	cmp r0, 0
-	bne _081DFA80
-	ldr r0, _081DFA7C @ =gRfuState
-	ldr r1, [r0]
-	ldrh r0, [r1, 0x12]
-	movs r0, 0x6
-	strh r0, [r1, 0x12]
-	ldr r2, [r1, 0x18]
-	cmp r2, 0
-	beq _081DFACA
-	ldrh r1, [r1, 0x12]
-	adds r0, r5, 0
-	bl _call_via_r2
-	b _081DFACA
-	.align 2, 0
-_081DFA78: .4byte 0x04000208
-_081DFA7C: .4byte gRfuState
-_081DFA80:
-	ldr r4, _081DFAAC @ =gRfuState
-	ldr r2, [r4]
-	adds r3, r2, 0
-	adds r3, 0x2C
-	ldrb r0, [r3]
-	cmp r0, 0x1
-	bne _081DFAB0
-	ldrh r0, [r2, 0x12]
-	movs r1, 0
-	movs r0, 0x2
-	strh r0, [r2, 0x12]
-	ldrb r0, [r3]
-	strb r1, [r3]
-	ldr r0, [r4]
-	ldr r2, [r0, 0x18]
-	cmp r2, 0
-	beq _081DFACA
-	ldrh r1, [r0, 0x12]
-	adds r0, r5, 0
-	bl _call_via_r2
-	b _081DFACA
-	.align 2, 0
-_081DFAAC: .4byte gRfuState
-_081DFAB0:
-	ldrb r0, [r2, 0x14]
-	cmp r0, 0
-	bne _081DFACE
-	ldrh r0, [r2, 0x12]
-	movs r0, 0x4
-	strh r0, [r2, 0x12]
-	ldr r3, [r2, 0x18]
-	cmp r3, 0
-	beq _081DFACA
-	ldrh r1, [r2, 0x12]
-	adds r0, r5, 0
-	bl _call_via_r3
-_081DFACA:
-	movs r0, 0x1
-	b _081DFB16
-_081DFACE:
-	ldrb r0, [r3]
-	movs r1, 0
-	movs r0, 0x1
-	strb r0, [r3]
-	ldr r0, [r4]
-	strb r6, [r0, 0x6]
-	ldr r0, [r4]
-	str r1, [r0]
-	strb r1, [r0, 0x4]
-	ldr r0, [r4]
-	strb r1, [r0, 0x5]
-	ldr r0, [r4]
-	strb r1, [r0, 0x7]
-	ldr r0, [r4]
-	strb r1, [r0, 0x8]
-	ldr r0, [r4]
-	strb r1, [r0, 0x9]
-	ldr r0, [r4]
-	str r1, [r0, 0xC]
-	ldrb r2, [r0, 0x10]
-	strb r1, [r0, 0x10]
-	ldr r0, [r4]
-	ldrh r2, [r0, 0x12]
-	movs r2, 0
-	strh r1, [r0, 0x12]
-	strb r2, [r0, 0x15]
-	ldr r1, _081DFB1C @ =0x04000134
-	movs r2, 0x80
-	lsls r2, 1
-	adds r0, r2, 0
-	strh r0, [r1]
-	subs r1, 0xC
-	ldr r2, _081DFB20 @ =0x00005003
-	adds r0, r2, 0
-	strh r0, [r1]
-	movs r0, 0
-_081DFB16:
-	pop {r4-r6}
-	pop {r1}
-	bx r1
-	.align 2, 0
-_081DFB1C: .4byte 0x04000134
-_081DFB20: .4byte 0x00005003
-	thumb_func_end STWI_init
-
-	thumb_func_start STWI_start_Command
-STWI_start_Command: @ 81DFB24
-	push {r4,r5,lr}
-	ldr r5, _081DFB7C @ =gRfuState
-	ldr r0, [r5]
-	ldr r3, [r0, 0x24]
-	ldrb r1, [r0, 0x4]
-	lsls r1, 8
-	ldrb r0, [r0, 0x6]
-	ldr r2, _081DFB80 @ =0x99660000
-	orrs r0, r2
-	orrs r1, r0
-	str r1, [r3]
-	ldr r2, _081DFB84 @ =0x04000120
-	ldr r1, [r5]
-	ldr r0, [r1, 0x24]
-	ldr r0, [r0]
-	str r0, [r2]
-	movs r2, 0
-	str r2, [r1]
-	movs r0, 0x1
-	strb r0, [r1, 0x5]
-	ldr r4, _081DFB88 @ =0x04000208
-	ldrh r3, [r4]
-	strh r2, [r4]
-	ldr r2, _081DFB8C @ =0x04000200
-	ldr r1, [r5]
-	movs r0, 0x8
-	ldrb r1, [r1, 0xA]
-	lsls r0, r1
-	ldrh r1, [r2]
-	orrs r0, r1
-	strh r0, [r2]
-	ldrh r0, [r2]
-	movs r1, 0x80
-	orrs r0, r1
-	strh r0, [r2]
-	strh r3, [r4]
-	ldr r1, _081DFB90 @ =0x04000128
-	ldr r2, _081DFB94 @ =0x00005083
-	adds r0, r2, 0
-	strh r0, [r1]
-	movs r0, 0
-	pop {r4,r5}
-	pop {r1}
-	bx r1
-	.align 2, 0
-_081DFB7C: .4byte gRfuState
-_081DFB80: .4byte 0x99660000
-_081DFB84: .4byte 0x04000120
-_081DFB88: .4byte 0x04000208
-_081DFB8C: .4byte 0x04000200
-_081DFB90: .4byte 0x04000128
-_081DFB94: .4byte 0x00005083
-	thumb_func_end STWI_start_Command
-
-	thumb_func_start STWI_restart_Command
-STWI_restart_Command: @ 81DFB98
-	push {r4,lr}
-	ldr r4, _081DFBB0 @ =gRfuState
-	ldr r2, [r4]
-	ldrb r0, [r2, 0x15]
-	adds r3, r4, 0
-	cmp r0, 0x1
-	bhi _081DFBB4
-	adds r0, 0x1
-	strb r0, [r2, 0x15]
-	bl STWI_start_Command
-	b _081DFC0E
-	.align 2, 0
-_081DFBB0: .4byte gRfuState
-_081DFBB4:
-	ldrb r0, [r2, 0x6]
-	cmp r0, 0x27
-	beq _081DFBC6
-	cmp r0, 0x25
-	beq _081DFBC6
-	cmp r0, 0x35
-	beq _081DFBC6
-	cmp r0, 0x37
-	bne _081DFBE8
-_081DFBC6:
-	ldr r0, [r3]
-	ldrh r1, [r0, 0x12]
-	movs r2, 0
-	movs r1, 0x1
-	strh r1, [r0, 0x12]
-	adds r0, 0x2C
-	ldrb r1, [r0]
-	strb r2, [r0]
-	ldr r1, [r3]
-	ldr r2, [r1, 0x18]
-	cmp r2, 0
-	beq _081DFC0E
-	ldrb r0, [r1, 0x6]
-	ldrh r1, [r1, 0x12]
-	bl _call_via_r2
-	b _081DFC0E
-_081DFBE8:
-	ldrh r0, [r2, 0x12]
-	movs r1, 0
-	movs r0, 0x1
-	strh r0, [r2, 0x12]
-	adds r0, r2, 0
-	adds r0, 0x2C
-	ldrb r2, [r0]
-	strb r1, [r0]
-	ldr r1, [r4]
-	ldr r2, [r1, 0x18]
-	cmp r2, 0
-	beq _081DFC08
-	ldrb r0, [r1, 0x6]
-	ldrh r1, [r1, 0x12]
-	bl _call_via_r2
-_081DFC08:
-	ldr r1, [r4]
-	movs r0, 0x4
-	str r0, [r1]
-_081DFC0E:
-	movs r0, 0
-	pop {r4}
-	pop {r1}
-	bx r1
-	thumb_func_end STWI_restart_Command
-
-	thumb_func_start STWI_reset_ClockCounter
-STWI_reset_ClockCounter: @ 81DFC18
-	ldr r3, _081DFC44 @ =gRfuState
-	ldr r1, [r3]
-	movs r0, 0x5
-	str r0, [r1]
-	movs r2, 0
-	strb r2, [r1, 0x4]
-	ldr r0, [r3]
-	strb r2, [r0, 0x5]
-	ldr r1, _081DFC48 @ =0x04000120
-	movs r0, 0x80
-	lsls r0, 24
-	str r0, [r1]
-	adds r1, 0x8
-	strh r2, [r1]
-	ldr r2, _081DFC4C @ =0x00005003
-	adds r0, r2, 0
-	strh r0, [r1]
-	adds r2, 0x7F
-	adds r0, r2, 0
-	strh r0, [r1]
-	movs r0, 0
-	bx lr
-	.align 2, 0
-_081DFC44: .4byte gRfuState
-_081DFC48: .4byte 0x04000120
-_081DFC4C: .4byte 0x00005003
-	thumb_func_end STWI_reset_ClockCounter
diff --git a/include/gba/io_reg.h b/include/gba/io_reg.h
index 6d54bc5fb..8eacc8aa7 100644
--- a/include/gba/io_reg.h
+++ b/include/gba/io_reg.h
@@ -137,6 +137,8 @@
 #define REG_OFFSET_DMA3CNT_H   0xde
 
 #define REG_OFFSET_TMCNT       0x100
+#define REG_OFFSET_TMCNT_L     0x100
+#define REG_OFFSET_TMCNT_H     0x102
 #define REG_OFFSET_TM0CNT      0x100
 #define REG_OFFSET_TM0CNT_L    0x100
 #define REG_OFFSET_TM0CNT_H    0x102
@@ -298,6 +300,8 @@
 #define REG_ADDR_DMA3CNT_H   (REG_BASE + REG_OFFSET_DMA3CNT_H)
 
 #define REG_ADDR_TMCNT       (REG_BASE + REG_OFFSET_TMCNT)
+#define REG_ADDR_TMCNT_L     (REG_BASE + REG_OFFSET_TMCNT_L)
+#define REG_ADDR_TMCNT_H     (REG_BASE + REG_OFFSET_TMCNT_H)
 #define REG_ADDR_TM0CNT      (REG_BASE + REG_OFFSET_TM0CNT)
 #define REG_ADDR_TM0CNT_L    (REG_BASE + REG_OFFSET_TM0CNT_L)
 #define REG_ADDR_TM0CNT_H    (REG_BASE + REG_OFFSET_TM0CNT_H)
@@ -458,6 +462,8 @@
 #define REG_DMA3CNT_H   (*(vu16 *)REG_ADDR_DMA3CNT_H)
 
 #define REG_TMCNT(n)    (*(vu16 *)(REG_ADDR_TMCNT + ((n) * 4)))
+#define REG_TMCNT_L(n)  (*(vu16 *)(REG_ADDR_TMCNT_L + ((n) * 4)))
+#define REG_TMCNT_H(n)  (*(vu16 *)(REG_ADDR_TMCNT_H + ((n) * 4)))
 #define REG_TM0CNT      (*(vu32 *)REG_ADDR_TM0CNT)
 #define REG_TM0CNT_L    (*(vu16 *)REG_ADDR_TM0CNT_L)
 #define REG_TM0CNT_H    (*(vu16 *)REG_ADDR_TM0CNT_H)
diff --git a/include/gba/macro.h b/include/gba/macro.h
index e416c3577..a3e870210 100644
--- a/include/gba/macro.h
+++ b/include/gba/macro.h
@@ -105,7 +105,7 @@
     }                                                     \
 }
 
-#define DmaClearLarge(dmaNum, dest, size, block, bit) \
+#define DmaClearLarge(dmaNum, dest, size, block, bit)     \
 {                                                         \
     u32 _size = size;                                     \
     while (1)                                             \
@@ -170,4 +170,14 @@
 #define DmaFill16Defvars(dmaNum, value, dest, size) DmaFillDefvars(dmaNum, value, dest, size, 16)
 #define DmaFill32Defvars(dmaNum, value, dest, size) DmaFillDefvars(dmaNum, value, dest, size, 32)
 
+#define IntrEnable(flags)                                       \
+{                                                               \
+    u16 imeTemp;                                                \
+                                                                \
+    imeTemp = REG_IME;                                          \
+    REG_IME = 0;                                                \
+    REG_IE |= flags;                                            \
+    REG_IME = imeTemp;                                          \
+}
+
 #endif // GUARD_GBA_MACRO_H
diff --git a/include/librfu.h b/include/librfu.h
index 5eb9fd7a0..709074f9c 100644
--- a/include/librfu.h
+++ b/include/librfu.h
@@ -108,7 +108,7 @@ struct RfuStruct
     u8 ackActiveCommand;
     u8 timerSelect;
     u8 unk_b;
-    s32 timerState;
+    u32 timerState; // this field is s32 in emerald
     vu8 timerActive;
     u8 unk_11;
     vu16 error;
@@ -126,10 +126,10 @@ struct RfuStruct
 
 struct RfuIntrStruct
 {
-    u8 rxPacketAlloc[0x74];
-    u8 txPacketAlloc[0x74];
-    u8 block1[0x960];
-    u8 block2[0x30];
+    union RfuPacket rxPacketAlloc;
+    union RfuPacket txPacketAlloc;
+    u8 block1[0x960]; // size of librfu_intr.s binary
+    struct RfuStruct block2;
 };
 
 struct RfuSlotStatusUNI
@@ -248,14 +248,6 @@ struct Unk_3007470
     u16 unkA;
 };
 
-struct STWIStruct
-{
-    // TODO: resolve the struct
-    u8 unk_0[232];
-    u8 function[2400];
-    struct RfuStruct STWIStatus;
-};
-
 struct Unk_3001190
 {
     struct RfuLinkStatus linkStatus;
@@ -263,7 +255,7 @@ struct Unk_3001190
     struct RfuFixed fixed;
     struct RfuSlotStatusNI NI[4];
     struct RfuSlotStatusUNI UNI[4];
-    struct STWIStruct STWI;
+    struct RfuIntrStruct intr;
 };
 
 extern struct RfuStruct *gRfuState;
@@ -275,7 +267,6 @@ extern struct RfuSlotStatusUNI *gRfuSlotStatusUNI[4];
 extern struct Unk_3007470 gUnknown_3007470;
 
 void rfu_STC_clearAPIVariables(void);
-void STWI_init_all(struct RfuIntrStruct * interruptStruct, IntrFunc *interrupt, bool8 copyInterruptToRam);
 void rfu_REQ_stopMode(void);
 void rfu_waitREQComplete(void);
 u32 rfu_REQBN_softReset_and_checkID(void);
@@ -323,4 +314,50 @@ void rfu_UNI_clearRecvNewDataFlag(u8 a0);
 void rfu_REQ_PARENT_resumeRetransmitAndChange(void);
 void rfu_NI_setSendData(u8, u8, const void *, u32);
 
+// librfu_intr
+void IntrSIO32(void);
+
+// librfu_stwi
+void STWI_init_all(struct RfuIntrStruct * interruptStruct, IntrFunc *interrupt, bool8 copyInterruptToRam);
+void STWI_set_MS_mode(u8 mode);
+void STWI_init_Callback_M(void);
+void STWI_init_Callback_S(void);
+void STWI_set_Callback_M(void (*callbackM)());
+void STWI_set_Callback_S(void (*callbackS)());
+void STWI_init_timer(IntrFunc *interrupt, s32 timerSelect);
+void AgbRFU_SoftReset(void);
+void STWI_set_Callback_ID(u32 id);
+u16 STWI_read_status(u8 index);
+u16 STWI_poll_CommandEnd(void);
+void STWI_send_DataRxREQ(void);
+void STWI_send_MS_ChangeREQ(void);
+void STWI_send_StopModeREQ(void);
+void STWI_send_SystemStatusREQ(void);
+void STWI_send_GameConfigREQ(u8 *unk1, u8 *data);
+void STWI_send_ResetREQ(void);
+void STWI_send_LinkStatusREQ(void);
+void STWI_send_VersionStatusREQ(void);
+void STWI_send_SlotStatusREQ(void);
+void STWI_send_ConfigStatusREQ(void);
+void STWI_send_ResumeRetransmitAndChangeREQ(void);
+void STWI_send_SystemConfigREQ(u16 unk1, u8 unk2, u8 unk3);
+void STWI_send_SC_StartREQ(void);
+void STWI_send_SC_PollingREQ(void);
+void STWI_send_SC_EndREQ(void);
+void STWI_send_SP_StartREQ(void);
+void STWI_send_SP_PollingREQ(void);
+void STWI_send_SP_EndREQ(void);
+void STWI_send_CP_StartREQ(u16 unk1);
+void STWI_send_CP_PollingREQ(void);
+void STWI_send_CP_EndREQ(void);
+void STWI_send_DataTxREQ(const void *in, u8 size);
+void STWI_send_DataTxAndChangeREQ(const void *in, u8 size);
+void STWI_send_DataReadyAndChangeREQ(u8 unk);
+void STWI_send_DisconnectedAndChangeREQ(u8 unk0, u8 unk1);
+void STWI_send_DisconnectREQ(u8 unk);
+void STWI_send_TestModeREQ(u8 unk0, u8 unk1);
+void STWI_send_CPR_StartREQ(u16 unk0, u16 unk1, u8 unk2);
+void STWI_send_CPR_PollingREQ(void);
+void STWI_send_CPR_EndREQ(void);
+
 #endif // GUARD_LIBRFU_H
diff --git a/ld_script.txt b/ld_script.txt
index aeb11a271..c57b7b4a0 100644
--- a/ld_script.txt
+++ b/ld_script.txt
@@ -317,7 +317,7 @@ SECTIONS {
         src/agb_flash_1m.o(.text);
         src/agb_flash_mx.o(.text);
         src/agb_flash_le.o(.text);
-        asm/librfu_stwi.o(.text);
+        src/librfu_stwi.o(.text);
         asm/librfu_intr.o(.text);
         asm/librfu.o(.text);
         src/isagbprn.o(.text);
diff --git a/src/librfu_stwi.c b/src/librfu_stwi.c
new file mode 100644
index 000000000..fe8a4ef76
--- /dev/null
+++ b/src/librfu_stwi.c
@@ -0,0 +1,645 @@
+#include "global.h"
+#include "librfu.h"
+
+static void STWI_intr_timer(void);
+static u16 STWI_init(u8 request);
+static s32 STWI_start_Command(void);
+static void STWI_set_timer(u8 unk);
+static void STWI_stop_timer(void);
+static s32 STWI_restart_Command(void);
+static s32 STWI_reset_ClockCounter(void);
+
+void STWI_init_all(struct RfuIntrStruct *interruptStruct, IntrFunc *interrupt, bool8 copyInterruptToRam)
+{
+    // If we're copying our interrupt into RAM, DMA it to block1 and use
+    // block2 for our RfuStruct, otherwise block1 holds the RfuStruct.
+    // interrupt usually is a pointer to gIntrTable[1]
+    if (copyInterruptToRam == TRUE)
+    {
+        *interrupt = (IntrFunc)interruptStruct->block1;
+        DmaCopy16(3, &IntrSIO32, interruptStruct->block1, sizeof(interruptStruct->block1));
+        gRfuState = &interruptStruct->block2;
+    }
+    else
+    {
+        *interrupt = IntrSIO32;
+        gRfuState = (struct RfuStruct *)interruptStruct->block1;
+    }
+    gRfuState->rxPacket = &interruptStruct->rxPacketAlloc;
+    gRfuState->txPacket = &interruptStruct->txPacketAlloc;
+    gRfuState->msMode = 1;
+    gRfuState->state = 0;
+    gRfuState->reqLength = 0;
+    gRfuState->reqNext = 0;
+    gRfuState->ackLength = 0;
+    gRfuState->ackNext = 0;
+    gRfuState->ackActiveCommand = 0;
+    gRfuState->timerState = 0;
+    gRfuState->timerActive = 0;
+    gRfuState->error = 0;
+    gRfuState->recoveryCount = 0;
+    gRfuState->unk_2c = 0;
+    REG_RCNT = 0x100; // TODO: mystery bit? 
+    REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
+    STWI_init_Callback_M();
+    STWI_init_Callback_S();
+    IntrEnable(INTR_FLAG_SERIAL);
+}
+
+void STWI_init_timer(IntrFunc *interrupt, s32 timerSelect)
+{
+    *interrupt = STWI_intr_timer;
+    gRfuState->timerSelect = timerSelect;
+    IntrEnable(INTR_FLAG_TIMER0 << gRfuState->timerSelect);
+}
+
+void AgbRFU_SoftReset(void)
+{
+    vu16 *timerL;
+    vu16 *timerH;
+
+    REG_RCNT = 0x8000;
+    REG_RCNT = 0x80A0; // all these bits are undocumented
+    timerL = &REG_TMCNT_L(gRfuState->timerSelect);
+    timerH = &REG_TMCNT_H(gRfuState->timerSelect);
+    *timerH = 0;
+    *timerL = 0;
+    *timerH = 0x83;
+    while (*timerL <= 0x11)
+        REG_RCNT = 0x80A2;
+    *timerH = 3;
+    REG_RCNT = 0x80A0;
+    REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
+    gRfuState->state = 0;
+    gRfuState->reqLength = 0;
+    gRfuState->reqNext = 0;
+    gRfuState->reqActiveCommand = 0;
+    gRfuState->ackLength = 0;
+    gRfuState->ackNext = 0;
+    gRfuState->ackActiveCommand = 0;
+    gRfuState->timerState = 0;
+    gRfuState->timerActive = 0;
+    gRfuState->error = 0;
+    gRfuState->msMode = 1;
+    gRfuState->recoveryCount = 0;
+    gRfuState->unk_2c = 0;
+}
+
+void STWI_set_MS_mode(u8 mode)
+{
+    gRfuState->msMode = mode;
+}
+
+u16 STWI_read_status(u8 index)
+{
+    switch (index)
+    {
+    case 0:
+        return gRfuState->error;
+    case 1:
+        return gRfuState->msMode;
+    case 2:
+        return gRfuState->state;
+    case 3:
+        return gRfuState->reqActiveCommand;
+    default:
+        return 0xFFFF;
+    }
+}
+
+void STWI_init_Callback_M(void)
+{
+    STWI_set_Callback_M(NULL);
+}
+
+void STWI_init_Callback_S(void)
+{
+    STWI_set_Callback_S(NULL);
+}
+
+void STWI_set_Callback_M(void (*callbackM)())
+{
+    gRfuState->callbackM = callbackM;
+}
+
+void STWI_set_Callback_S(void (*callbackS)())
+{
+    gRfuState->callbackS = callbackS;
+}
+
+void STWI_set_Callback_ID(u32 id)
+{
+    gRfuState->callbackId = id;
+}
+
+u16 STWI_poll_CommandEnd(void)
+{
+    while (gRfuState->unk_2c == TRUE)
+        ;
+    return gRfuState->error;
+}
+
+void STWI_send_ResetREQ(void)
+{
+    if (!STWI_init(RFU_RESET))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_LinkStatusREQ(void)
+{
+    if (!STWI_init(RFU_LINK_STATUS))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_VersionStatusREQ(void)
+{
+    if (!STWI_init(RFU_VERSION_STATUS))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SystemStatusREQ(void)
+{
+    if (!STWI_init(RFU_SYSTEM_STATUS))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SlotStatusREQ(void)
+{
+    if (!STWI_init(RFU_SLOT_STATUS))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_ConfigStatusREQ(void)
+{
+    if (!STWI_init(RFU_CONFIG_STATUS))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_GameConfigREQ(u8 *unk1, u8 *data)
+{
+    u8 *packetBytes;
+    s32 i;
+
+    if (!STWI_init(RFU_GAME_CONFIG))
+    {
+        gRfuState->reqLength = 6;
+        // TODO: what is unk1
+        packetBytes = gRfuState->txPacket->rfuPacket8.data;
+        packetBytes += sizeof(u32);
+        *(u16 *)packetBytes = *(u16 *)unk1;
+        packetBytes += sizeof(u16);
+        unk1 += sizeof(u16);
+        for (i = 0; i < 14; ++i)
+        {
+            *packetBytes = *unk1;
+            ++packetBytes;
+            ++unk1;
+        }
+        for (i = 0; i < 8; ++i)
+        {
+            *packetBytes = *data;
+            ++packetBytes;
+            ++data;
+        }
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SystemConfigREQ(u16 unk1, u8 unk2, u8 unk3)
+{
+    if (!STWI_init(RFU_SYSTEM_CONFIG))
+    {
+        u8 *packetBytes;
+
+        gRfuState->reqLength = 1;
+        packetBytes = gRfuState->txPacket->rfuPacket8.data;
+        packetBytes += sizeof(u32);
+        *packetBytes++ = unk3;
+        *packetBytes++ = unk2;
+        *(u16*)packetBytes = unk1;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SC_StartREQ(void)
+{
+    if (!STWI_init(RFU_SC_START))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SC_PollingREQ(void)
+{
+    if (!STWI_init(RFU_SC_POLLING))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SC_EndREQ(void)
+{
+    if (!STWI_init(RFU_SC_END))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SP_StartREQ(void)
+{
+    if (!STWI_init(RFU_SP_START))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SP_PollingREQ(void)
+{
+    if (!STWI_init(RFU_SP_POLLING))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_SP_EndREQ(void)
+{
+    if (!STWI_init(RFU_SP_END))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CP_StartREQ(u16 unk1)
+{
+    if (!STWI_init(RFU_CP_START))
+    {
+        gRfuState->reqLength = 1;
+        gRfuState->txPacket->rfuPacket32.data[0] = unk1;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CP_PollingREQ(void)
+{
+    if (!STWI_init(RFU_CP_POLLING))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CP_EndREQ(void)
+{
+    if (!STWI_init(RFU_CP_END))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DataTxREQ(const void *in, u8 size)
+{
+    if (!STWI_init(RFU_DATA_TX))
+    {
+        u8 reqLength = (size / sizeof(u32));
+        if (size & (sizeof(u32) - 1))
+            reqLength += 1;
+        gRfuState->reqLength = reqLength;
+        CpuCopy32(in, gRfuState->txPacket->rfuPacket32.data, gRfuState->reqLength * sizeof(u32));
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DataTxAndChangeREQ(const void *in, u8 size)
+{
+    if (!STWI_init(RFU_DATA_TX_AND_CHANGE))
+    {
+        u8 reqLength = (size / sizeof(u32));
+        if (size & (sizeof(u32) - 1))
+            reqLength += 1;
+        gRfuState->reqLength = reqLength;
+        CpuCopy32(in, gRfuState->txPacket->rfuPacket32.data, gRfuState->reqLength * sizeof(u32));
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DataRxREQ(void)
+{
+    if (!STWI_init(RFU_DATA_RX))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_MS_ChangeREQ(void)
+{
+    if (!STWI_init(RFU_MS_CHANGE))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DataReadyAndChangeREQ(u8 unk)
+{
+    if (!STWI_init(RFU_DATA_READY_AND_CHANGE))
+    {
+        if (!unk)
+        {
+            gRfuState->reqLength = 0;
+        }
+        else
+        {
+            u8 *packetBytes;
+
+            gRfuState->reqLength = 1;
+            packetBytes = gRfuState->txPacket->rfuPacket8.data;
+            packetBytes += sizeof(u32);
+            *packetBytes++ = unk;
+            *packetBytes++ = 0;
+            *packetBytes++ = 0;
+            *packetBytes = 0;
+        }
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DisconnectedAndChangeREQ(u8 unk0, u8 unk1)
+{
+    if (!STWI_init(RFU_DISCONNECTED_AND_CHANGE))
+    {
+        u8 *packetBytes;
+
+        gRfuState->reqLength = 1;
+        packetBytes = gRfuState->txPacket->rfuPacket8.data;
+        packetBytes += sizeof(u32);
+        *packetBytes++ = unk0;
+        *packetBytes++ = unk1;
+        *packetBytes++ = 0;
+        *packetBytes = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_ResumeRetransmitAndChangeREQ(void)
+{
+    if (!STWI_init(RFU_RESUME_RETRANSMIT_AND_CHANGE))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_DisconnectREQ(u8 unk)
+{
+    if (!STWI_init(RFU_DISCONNECT))
+    {
+        gRfuState->reqLength = 1;
+        gRfuState->txPacket->rfuPacket32.data[0] = unk;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_TestModeREQ(u8 unk0, u8 unk1)
+{
+    if (!STWI_init(RFU_TEST_MODE))
+    {
+        gRfuState->reqLength = 1;
+        gRfuState->txPacket->rfuPacket32.data[0] = unk0 | (unk1 << 8);
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CPR_StartREQ(u16 unk0, u16 unk1, u8 unk2)
+{
+    u32 *packetData;
+    u32 arg1;
+
+    if (!STWI_init(RFU_CPR_START))
+    {
+        gRfuState->reqLength = 2;
+        arg1 = unk1 | (unk0 << 16);
+        packetData = gRfuState->txPacket->rfuPacket32.data;
+        packetData[0] = arg1;
+        packetData[1] = unk2;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CPR_PollingREQ(void)
+{
+    if (!STWI_init(RFU_CPR_POLLING))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_CPR_EndREQ(void)
+{
+    if (!STWI_init(RFU_CPR_END))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+void STWI_send_StopModeREQ(void)
+{
+    if (!STWI_init(RFU_STOP_MODE))
+    {
+        gRfuState->reqLength = 0;
+        STWI_start_Command();
+    }
+}
+
+static void STWI_intr_timer(void)
+{
+    switch (gRfuState->timerState)
+    {
+    // TODO: Make an enum for these
+    case 2:
+        gRfuState->timerActive = 1;
+        STWI_set_timer(50);
+        break;
+    case 1:
+    case 4:
+        STWI_stop_timer();
+        STWI_restart_Command();
+        break;
+    case 3:
+        gRfuState->timerActive = 1;
+        STWI_stop_timer();
+        STWI_reset_ClockCounter();
+        if (gRfuState->callbackM)
+            gRfuState->callbackM(255, 0);
+        break;
+    }
+}
+
+static void STWI_set_timer(u8 unk)
+{
+    vu16 *timerL;
+    vu16 *timerH;
+
+    timerL = &REG_TMCNT_L(gRfuState->timerSelect);
+    timerH = &REG_TMCNT_H(gRfuState->timerSelect);
+    REG_IME = 0;
+    switch (unk)
+    {
+    case 50:
+        *timerL = 0xFCCB;
+        gRfuState->timerState = 1;
+        break;
+    case 80:
+        *timerL = 0xFAE0;
+        gRfuState->timerState = 2;
+        break;
+    case 100:
+        *timerL = 0xF996;
+        gRfuState->timerState = 3;
+        break;
+    case 130:
+        *timerL = 0xF7AD;
+        gRfuState->timerState = 4;
+        break;
+    }
+    *timerH = TIMER_ENABLE | TIMER_INTR_ENABLE | TIMER_1024CLK;
+    REG_IF = INTR_FLAG_TIMER0 << gRfuState->timerSelect;
+    REG_IME = 1;
+}
+
+static void STWI_stop_timer(void)
+{
+    gRfuState->timerState = 0;
+    REG_TMCNT_L(gRfuState->timerSelect) = 0;
+    REG_TMCNT_H(gRfuState->timerSelect) = 0;
+}
+
+static u16 STWI_init(u8 request)
+{
+    if (!REG_IME)
+    {
+        gRfuState->error = 6;
+        if (gRfuState->callbackM)
+            gRfuState->callbackM(request, gRfuState->error);
+        return TRUE;
+    }
+    else if (gRfuState->unk_2c == TRUE)
+    {
+        gRfuState->error = 2;
+        gRfuState->unk_2c = FALSE;
+        if (gRfuState->callbackM)
+            gRfuState->callbackM(request, gRfuState->error);
+        return TRUE;
+    }
+    else if(!gRfuState->msMode)
+    {
+        gRfuState->error = 4;
+        if (gRfuState->callbackM)
+            gRfuState->callbackM(request, gRfuState->error, gRfuState);
+        return TRUE;
+    }
+    else
+    {
+        gRfuState->unk_2c = TRUE;
+        gRfuState->reqActiveCommand = request;
+        gRfuState->state = 0;
+        gRfuState->reqLength = 0;
+        gRfuState->reqNext = 0;
+        gRfuState->ackLength = 0;
+        gRfuState->ackNext = 0;
+        gRfuState->ackActiveCommand = 0;
+        gRfuState->timerState = 0;
+        gRfuState->timerActive = 0;
+        gRfuState->error = 0;
+        gRfuState->recoveryCount = 0;
+        REG_RCNT = 0x100;
+        REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
+        return FALSE;
+    }
+}
+
+static s32 STWI_start_Command(void)
+{
+    u16 imeTemp;
+
+    // equivalent to gRfuState->txPacket->rfuPacket32.command, 
+    // but the cast here is required to avoid register issue
+    *(u32 *)gRfuState->txPacket->rfuPacket8.data = 0x99660000 | (gRfuState->reqLength << 8) | gRfuState->reqActiveCommand;
+    REG_SIODATA32 = gRfuState->txPacket->rfuPacket32.command;
+    gRfuState->state = 0;
+    gRfuState->reqNext = 1;
+    imeTemp = REG_IME;
+    REG_IME = 0;
+    REG_IE |= (INTR_FLAG_TIMER0 << gRfuState->timerSelect);
+    REG_IE |= INTR_FLAG_SERIAL;
+    REG_IME = imeTemp;
+    REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_MULTI_BUSY | SIO_115200_BPS;
+    return 0;
+}
+
+static s32 STWI_restart_Command(void)
+{
+    if (gRfuState->recoveryCount <= 1)
+    {
+        ++gRfuState->recoveryCount;
+        STWI_start_Command();
+    }
+    else
+    {
+        if (gRfuState->reqActiveCommand == RFU_MS_CHANGE || gRfuState->reqActiveCommand == RFU_DATA_TX_AND_CHANGE || gRfuState->reqActiveCommand == RFU_UNK35 || gRfuState->reqActiveCommand == RFU_RESUME_RETRANSMIT_AND_CHANGE)
+        {
+            gRfuState->error = 1;
+            gRfuState->unk_2c = 0;
+            if (gRfuState->callbackM)
+                gRfuState->callbackM(gRfuState->reqActiveCommand, gRfuState->error);
+        }
+        else
+        {
+            gRfuState->error = 1;
+            gRfuState->unk_2c = 0;
+            if (gRfuState->callbackM)
+                gRfuState->callbackM(gRfuState->reqActiveCommand, gRfuState->error);
+            gRfuState->state = 4; // TODO: what's 4
+        }
+    }
+    return 0;
+}
+
+static s32 STWI_reset_ClockCounter(void)
+{
+    gRfuState->state = 5; // TODO: what is 5
+    gRfuState->reqLength = 0;
+    gRfuState->reqNext = 0;
+    REG_SIODATA32 = (1 << 31);
+    REG_SIOCNT = 0;
+    REG_SIOCNT = SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS;
+    REG_SIOCNT = (SIO_INTR_ENABLE | SIO_32BIT_MODE | SIO_115200_BPS) + 0x7F;
+    return 0;
+}