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authorRevo <projectrevotpp@hotmail.com>2020-09-10 09:24:03 -0400
committerGitHub <noreply@github.com>2020-09-10 09:24:03 -0400
commit8ff4ccfa397ed02e85d3b2372c7d616bcc050703 (patch)
tree065348745693ad1db5c3f4a10c10e00538289a3d
parentd49316075e372af6a0f3697d2b25e2c7befc0d8b (diff)
parent208fb0df62a669cae88c338bcd10f96c9d6d21ea (diff)
Merge pull request #28 from red031000/master
rename stdlibc++ and trk funcs
Diffstat
-rw-r--r--asm/init.s104
-rw-r--r--asm/text_1.s4
-rw-r--r--asm/text_10.s32
-rw-r--r--asm/text_11.s2
-rw-r--r--asm/text_2.s2
-rw-r--r--asm/text_4.s32
-rw-r--r--asm/text_5.s58
-rw-r--r--asm/text_6.s604
-rw-r--r--asm/text_7.s34
-rw-r--r--asm/text_8.s34
-rw-r--r--asm/text_9.s38
11 files changed, 481 insertions, 463 deletions
diff --git a/asm/init.s b/asm/init.s
index 6460b3e..2633cde 100644
--- a/asm/init.s
+++ b/asm/init.s
@@ -110,7 +110,7 @@ TRK_memset:
/* 8000413C 0000023C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80004140 00000240 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80004144 00000244 7C 7F 1B 78 */ mr r31, r3
-/* 80004148 00000248 48 1D 2F F5 */ bl func_801D713C
+/* 80004148 00000248 48 1D 2F F5 */ bl TRK_fill_mem
/* 8000414C 0000024C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80004150 00000250 7F E3 FB 78 */ mr r3, r31
/* 80004154 00000254 83 E1 00 0C */ lwz r31, 0xc(r1)
@@ -158,8 +158,8 @@ lbl_80004188:
/* 800043B4 000004B4 7C 60 00 A6 */ mfmsr r3
/* 800043B8 000004B8 60 63 00 30 */ ori r3, r3, 0x30
/* 800043BC 000004BC 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800043C0 000004C0 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800043C4 000004C4 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800043C0 000004C0 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800043C4 000004C4 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800043C8 000004C8 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800043CC 000004CC 38 60 02 00 */ li r3, 0x200
/* 800043D0 000004D0 4C 00 00 64 */ rfi
@@ -174,8 +174,8 @@ lbl_80004188:
/* 8000449C 0000059C 7C 60 00 A6 */ mfmsr r3
/* 800044A0 000005A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800044A4 000005A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800044A8 000005A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800044AC 000005AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800044A8 000005A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800044AC 000005AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800044B0 000005B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800044B4 000005B4 38 60 03 00 */ li r3, 0x300
/* 800044B8 000005B8 4C 00 00 64 */ rfi
@@ -190,8 +190,8 @@ lbl_80004188:
/* 8000459C 0000069C 7C 60 00 A6 */ mfmsr r3
/* 800045A0 000006A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800045A4 000006A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800045A8 000006A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800045AC 000006AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800045A8 000006A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800045AC 000006AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800045B0 000006B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800045B4 000006B4 38 60 04 00 */ li r3, 0x400
/* 800045B8 000006B8 4C 00 00 64 */ rfi
@@ -206,8 +206,8 @@ lbl_80004188:
/* 8000469C 0000079C 7C 60 00 A6 */ mfmsr r3
/* 800046A0 000007A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800046A4 000007A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800046A8 000007A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800046AC 000007AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800046A8 000007A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800046AC 000007AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800046B0 000007B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800046B4 000007B4 38 60 05 00 */ li r3, 0x500
/* 800046B8 000007B8 4C 00 00 64 */ rfi
@@ -222,8 +222,8 @@ lbl_80004188:
/* 8000479C 0000089C 7C 60 00 A6 */ mfmsr r3
/* 800047A0 000008A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800047A4 000008A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800047A8 000008A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800047AC 000008AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800047A8 000008A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800047AC 000008AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800047B0 000008B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800047B4 000008B4 38 60 06 00 */ li r3, 0x600
/* 800047B8 000008B8 4C 00 00 64 */ rfi
@@ -238,8 +238,8 @@ lbl_80004188:
/* 8000489C 0000099C 7C 60 00 A6 */ mfmsr r3
/* 800048A0 000009A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800048A4 000009A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800048A8 000009A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800048AC 000009AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800048A8 000009A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800048AC 000009AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800048B0 000009B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800048B4 000009B4 38 60 07 00 */ li r3, 0x700
/* 800048B8 000009B8 4C 00 00 64 */ rfi
@@ -254,8 +254,8 @@ lbl_80004188:
/* 8000499C 00000A9C 7C 60 00 A6 */ mfmsr r3
/* 800049A0 00000AA0 60 63 00 30 */ ori r3, r3, 0x30
/* 800049A4 00000AA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800049A8 00000AA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800049AC 00000AAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800049A8 00000AA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800049AC 00000AAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800049B0 00000AB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800049B4 00000AB4 38 60 08 00 */ li r3, 0x800
/* 800049B8 00000AB8 4C 00 00 64 */ rfi
@@ -270,8 +270,8 @@ lbl_80004188:
/* 80004A9C 00000B9C 7C 60 00 A6 */ mfmsr r3
/* 80004AA0 00000BA0 60 63 00 30 */ ori r3, r3, 0x30
/* 80004AA4 00000BA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80004AA8 00000BA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80004AAC 00000BAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80004AA8 00000BA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80004AAC 00000BAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80004AB0 00000BB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80004AB4 00000BB4 38 60 09 00 */ li r3, 0x900
/* 80004AB8 00000BB8 4C 00 00 64 */ rfi
@@ -286,8 +286,8 @@ lbl_80004188:
/* 80004D9C 00000E9C 7C 60 00 A6 */ mfmsr r3
/* 80004DA0 00000EA0 60 63 00 30 */ ori r3, r3, 0x30
/* 80004DA4 00000EA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80004DA8 00000EA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80004DAC 00000EAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80004DA8 00000EA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80004DAC 00000EAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80004DB0 00000EB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80004DB4 00000EB4 38 60 0C 00 */ li r3, 0xc00
/* 80004DB8 00000EB8 4C 00 00 64 */ rfi
@@ -350,8 +350,8 @@ lbl_80004188:
/* 80004E9C 00000F9C 7C 60 00 A6 */ mfmsr r3
/* 80004EA0 00000FA0 60 63 00 30 */ ori r3, r3, 0x30
/* 80004EA4 00000FA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80004EA8 00000FA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80004EAC 00000FAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80004EA8 00000FA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80004EAC 00000FAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80004EB0 00000FB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80004EB4 00000FB4 38 60 0D 00 */ li r3, 0xd00
/* 80004EB8 00000FB8 4C 00 00 64 */ rfi
@@ -414,8 +414,8 @@ lbl_80004188:
/* 80004F9C 0000109C 7C 60 00 A6 */ mfmsr r3
/* 80004FA0 000010A0 60 63 00 30 */ ori r3, r3, 0x30
/* 80004FA4 000010A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80004FA8 000010A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80004FAC 000010AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80004FA8 000010A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80004FAC 000010AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80004FB0 000010B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80004FB4 000010B4 38 60 0E 00 */ li r3, 0xe00
/* 80004FB8 000010B8 4C 00 00 64 */ rfi
@@ -486,8 +486,8 @@ lbl_80004188:
/* 800050BC 000011BC 7C 60 00 A6 */ mfmsr r3
/* 800050C0 000011C0 60 63 00 30 */ ori r3, r3, 0x30
/* 800050C4 000011C4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800050C8 000011C8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800050CC 000011CC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800050C8 000011C8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800050CC 000011CC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800050D0 000011D0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800050D4 000011D4 38 60 0F 20 */ li r3, 0xf20
/* 800050D8 000011D8 4C 00 00 64 */ rfi
@@ -500,8 +500,8 @@ lbl_800050DC:
/* 800050F0 000011F0 7C 60 00 A6 */ mfmsr r3
/* 800050F4 000011F4 60 63 00 30 */ ori r3, r3, 0x30
/* 800050F8 000011F8 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800050FC 000011FC 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80005100 00001200 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800050FC 000011FC 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80005100 00001200 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80005104 00001204 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80005108 00001208 38 60 0F 00 */ li r3, 0xf00
/* 8000510C 0000120C 4C 00 00 64 */ rfi
@@ -559,8 +559,8 @@ lbl_800051B8:
/* 800051D8 000012D8 7C 60 00 A6 */ mfmsr r3
/* 800051DC 000012DC 60 63 00 30 */ ori r3, r3, 0x30
/* 800051E0 000012E0 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800051E4 000012E4 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800051E8 000012E8 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800051E4 000012E4 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800051E8 000012E8 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800051EC 000012EC 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800051F0 000012F0 38 60 10 00 */ li r3, 0x1000
/* 800051F4 000012F4 4C 00 00 64 */ rfi
@@ -624,8 +624,8 @@ lbl_800052B8:
/* 800052D8 000013D8 7C 60 00 A6 */ mfmsr r3
/* 800052DC 000013DC 60 63 00 30 */ ori r3, r3, 0x30
/* 800052E0 000013E0 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800052E4 000013E4 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800052E8 000013E8 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800052E4 000013E4 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800052E8 000013E8 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800052EC 000013EC 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800052F0 000013F0 38 60 11 00 */ li r3, 0x1100
/* 800052F4 000013F4 4C 00 00 64 */ rfi
@@ -689,8 +689,8 @@ lbl_800053B8:
/* 800053D8 000014D8 7C 60 00 A6 */ mfmsr r3
/* 800053DC 000014DC 60 63 00 30 */ ori r3, r3, 0x30
/* 800053E0 000014E0 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800053E4 000014E4 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800053E8 000014E8 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800053E4 000014E4 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800053E8 000014E8 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800053EC 000014EC 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800053F0 000014F0 38 60 12 00 */ li r3, 0x1200
/* 800053F4 000014F4 4C 00 00 64 */ rfi
@@ -738,8 +738,8 @@ lbl_800053B8:
/* 8000549C 0000159C 7C 60 00 A6 */ mfmsr r3
/* 800054A0 000015A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800054A4 000015A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800054A8 000015A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800054AC 000015AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800054A8 000015A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800054AC 000015AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800054B0 000015B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800054B4 000015B4 38 60 13 00 */ li r3, 0x1300
/* 800054B8 000015B8 4C 00 00 64 */ rfi
@@ -802,8 +802,8 @@ lbl_800053B8:
/* 8000559C 0000169C 7C 60 00 A6 */ mfmsr r3
/* 800055A0 000016A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800055A4 000016A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800055A8 000016A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800055AC 000016AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800055A8 000016A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800055AC 000016AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800055B0 000016B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800055B4 000016B4 38 60 14 00 */ li r3, 0x1400
/* 800055B8 000016B8 4C 00 00 64 */ rfi
@@ -930,8 +930,8 @@ lbl_800053B8:
/* 8000579C 0000189C 7C 60 00 A6 */ mfmsr r3
/* 800057A0 000018A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800057A4 000018A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800057A8 000018A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800057AC 000018AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800057A8 000018A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800057AC 000018AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800057B0 000018B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800057B4 000018B4 38 60 16 00 */ li r3, 0x1600
/* 800057B8 000018B8 4C 00 00 64 */ rfi
@@ -994,8 +994,8 @@ lbl_800053B8:
/* 8000589C 0000199C 7C 60 00 A6 */ mfmsr r3
/* 800058A0 000019A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800058A4 000019A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800058A8 000019A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800058AC 000019AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800058A8 000019A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800058AC 000019AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800058B0 000019B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800058B4 000019B4 38 60 17 00 */ li r3, 0x1700
/* 800058B8 000019B8 4C 00 00 64 */ rfi
@@ -1314,8 +1314,8 @@ lbl_800053B8:
/* 80005D9C 00001E9C 7C 60 00 A6 */ mfmsr r3
/* 80005DA0 00001EA0 60 63 00 30 */ ori r3, r3, 0x30
/* 80005DA4 00001EA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80005DA8 00001EA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80005DAC 00001EAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80005DA8 00001EA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80005DAC 00001EAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80005DB0 00001EB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80005DB4 00001EB4 38 60 1C 00 */ li r3, 0x1c00
/* 80005DB8 00001EB8 4C 00 00 64 */ rfi
@@ -1378,8 +1378,8 @@ lbl_800053B8:
/* 80005E9C 00001F9C 7C 60 00 A6 */ mfmsr r3
/* 80005EA0 00001FA0 60 63 00 30 */ ori r3, r3, 0x30
/* 80005EA4 00001FA4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80005EA8 00001FA8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80005EAC 00001FAC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80005EA8 00001FA8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80005EAC 00001FAC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80005EB0 00001FB0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80005EB4 00001FB4 38 60 1D 00 */ li r3, 0x1d00
/* 80005EB8 00001FB8 4C 00 00 64 */ rfi
@@ -1442,8 +1442,8 @@ lbl_800053B8:
/* 80005F9C 0000209C 7C 60 00 A6 */ mfmsr r3
/* 80005FA0 000020A0 60 63 00 30 */ ori r3, r3, 0x30
/* 80005FA4 000020A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 80005FA8 000020A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 80005FAC 000020AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 80005FA8 000020A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 80005FAC 000020AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 80005FB0 000020B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 80005FB4 000020B4 38 60 1E 00 */ li r3, 0x1e00
/* 80005FB8 000020B8 4C 00 00 64 */ rfi
@@ -1506,8 +1506,8 @@ lbl_800053B8:
/* 8000609C 0000219C 7C 60 00 A6 */ mfmsr r3
/* 800060A0 000021A0 60 63 00 30 */ ori r3, r3, 0x30
/* 800060A4 000021A4 7C 7B 03 A6 */ mtspr 0x1b, r3
-/* 800060A8 000021A8 3C 60 80 1D */ lis r3, lbl_801D725C@h
-/* 800060AC 000021AC 60 63 72 5C */ ori r3, r3, lbl_801D725C@l
+/* 800060A8 000021A8 3C 60 80 1D */ lis r3, TRKInterruptHandler@h
+/* 800060AC 000021AC 60 63 72 5C */ ori r3, r3, TRKInterruptHandler@l
/* 800060B0 000021B0 7C 7A 03 A6 */ mtspr 0x1a, r3
/* 800060B4 000021B4 38 60 1F 00 */ li r3, 0x1f00
/* 800060B8 000021B8 4C 00 00 64 */ rfi
@@ -1592,8 +1592,8 @@ lbl_8000618C:
/* 800061B0 000022B0 4B FF FF 61 */ bl func_80006110
/* 800061B4 000022B4 48 00 00 14 */ b lbl_800061C8
lbl_800061B8:
-/* 800061B8 000022B8 3C C0 80 1E */ lis r6, lbl_801D9138@ha
-/* 800061BC 000022BC 38 C6 91 38 */ addi r6, r6, lbl_801D9138@l
+/* 800061B8 000022B8 3C C0 80 1E */ lis r6, InitMetroTRK@ha
+/* 800061BC 000022BC 38 C6 91 38 */ addi r6, r6, InitMetroTRK@l
/* 800061C0 000022C0 7C C8 03 A6 */ mtlr r6
/* 800061C4 000022C4 4E 80 00 21 */ blrl
lbl_800061C8:
@@ -1646,7 +1646,7 @@ lbl_8000626C:
/* 8000626C 0000236C 4B FF FE B1 */ bl func_8000611C
/* 80006270 00002370 28 03 00 01 */ cmplwi r3, 1
/* 80006274 00002374 40 82 00 08 */ bne lbl_8000627C
-/* 80006278 00002378 48 1D 2F 59 */ bl func_801D91D0
+/* 80006278 00002378 48 1D 2F 59 */ bl InitMetroTRK_BBA
lbl_8000627C:
/* 8000627C 0000237C 48 26 E2 29 */ bl func_802744A4
/* 80006280 00002380 7D C3 73 78 */ mr r3, r14
diff --git a/asm/text_1.s b/asm/text_1.s
index efa03a4..2be8b38 100644
--- a/asm/text_1.s
+++ b/asm/text_1.s
@@ -91493,7 +91493,7 @@ lbl_80055F3C:
/* 80055F5C 00051BBC 54 C3 18 38 */ slwi r3, r6, 3
/* 80055F60 00051BC0 50 E3 1F 7E */ rlwimi r3, r7, 3, 0x1d, 0x1f
/* 80055F64 00051BC4 54 06 8B FE */ srwi r6, r0, 0xf
-/* 80055F68 00051BC8 48 17 12 25 */ bl func_801C718C
+/* 80055F68 00051BC8 48 17 12 25 */ bl __div2u
/* 80055F6C 00051BCC 80 AD 81 E0 */ lwz r5, lbl_8063D4A0-_SDA_BASE_(r13)
/* 80055F70 00051BD0 90 85 00 04 */ stw r4, 4(r5)
/* 80055F74 00051BD4 90 65 00 00 */ stw r3, 0(r5)
@@ -95303,7 +95303,7 @@ lbl_8005933C:
/* 8005935C 00054FBC 54 63 18 38 */ slwi r3, r3, 3
/* 80059360 00054FC0 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 80059364 00054FC4 54 06 8B FE */ srwi r6, r0, 0xf
-/* 80059368 00054FC8 48 16 DE 25 */ bl func_801C718C
+/* 80059368 00054FC8 48 16 DE 25 */ bl __div2u
/* 8005936C 00054FCC 80 AD 81 E0 */ lwz r5, lbl_8063D4A0-_SDA_BASE_(r13)
/* 80059370 00054FD0 90 85 10 A4 */ stw r4, 0x10a4(r5)
/* 80059374 00054FD4 90 65 10 A0 */ stw r3, 0x10a0(r5)
diff --git a/asm/text_10.s b/asm/text_10.s
index 82a0d3a..b94f891 100644
--- a/asm/text_10.s
+++ b/asm/text_10.s
@@ -1570,7 +1570,7 @@ lbl_8032A1A8:
/* 8032A1F8 00325E58 7C 66 19 10 */ subfe r3, r6, r3
/* 8032A1FC 00325E5C 38 A0 00 00 */ li r5, 0
/* 8032A200 00325E60 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032A204 00325E64 4B E9 D0 75 */ bl func_801C7278
+/* 8032A204 00325E64 4B E9 D0 75 */ bl __div2i
/* 8032A208 00325E68 80 DC 00 04 */ lwz r6, 4(r28)
/* 8032A20C 00325E6C 38 A0 00 00 */ li r5, 0
/* 8032A210 00325E70 6C 60 80 00 */ xoris r0, r3, 0x8000
@@ -1594,7 +1594,7 @@ lbl_8032A1A8:
/* 8032A258 00325EB8 7C 87 20 10 */ subfc r4, r7, r4
/* 8032A25C 00325EBC 7C 66 19 10 */ subfe r3, r6, r3
/* 8032A260 00325EC0 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032A264 00325EC4 4B E9 D0 15 */ bl func_801C7278
+/* 8032A264 00325EC4 4B E9 D0 15 */ bl __div2i
/* 8032A268 00325EC8 7C 86 23 78 */ mr r6, r4
/* 8032A26C 00325ECC 7C 65 1B 78 */ mr r5, r3
/* 8032A270 00325ED0 38 9F 0D 00 */ addi r4, r31, 0xd00
@@ -4957,7 +4957,7 @@ lbl_8032D198:
/* 8032D1C0 00328E20 38 A0 00 00 */ li r5, 0
/* 8032D1C4 00328E24 7C 67 19 10 */ subfe r3, r7, r3
/* 8032D1C8 00328E28 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032D1CC 00328E2C 4B E9 A0 AD */ bl func_801C7278
+/* 8032D1CC 00328E2C 4B E9 A0 AD */ bl __div2i
/* 8032D1D0 00328E30 48 00 00 0C */ b lbl_8032D1DC
lbl_8032D1D4:
/* 8032D1D4 00328E34 38 60 00 01 */ li r3, 1
@@ -5266,7 +5266,7 @@ lbl_8032D5D8:
/* 8032D614 00329274 7C 66 19 10 */ subfe r3, r6, r3
/* 8032D618 00329278 38 A0 00 00 */ li r5, 0
/* 8032D61C 0032927C 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032D620 00329280 4B E9 9B 6D */ bl func_801C718C
+/* 8032D620 00329280 4B E9 9B 6D */ bl __div2u
/* 8032D624 00329284 54 85 F8 3E */ rotlwi r5, r4, 0x1f
/* 8032D628 00329288 38 80 01 2C */ li r4, 0x12c
/* 8032D62C 0032928C 50 65 F8 00 */ rlwimi r5, r3, 0x1f, 0, 0
@@ -5470,7 +5470,7 @@ lbl_8032D8B8:
/* 8032D8E0 00329540 38 A0 00 00 */ li r5, 0
/* 8032D8E4 00329544 7C 67 19 10 */ subfe r3, r7, r3
/* 8032D8E8 00329548 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032D8EC 0032954C 4B E9 99 8D */ bl func_801C7278
+/* 8032D8EC 0032954C 4B E9 99 8D */ bl __div2i
/* 8032D8F0 00329550 48 00 00 0C */ b lbl_8032D8FC
lbl_8032D8F4:
/* 8032D8F4 00329554 38 60 00 01 */ li r3, 1
@@ -5876,7 +5876,7 @@ lbl_8032DE70:
/* 8032DEA0 00329B00 8B A8 00 02 */ lbz r29, 2(r8)
/* 8032DEA4 00329B04 38 A0 00 00 */ li r5, 0
/* 8032DEA8 00329B08 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032DEAC 00329B0C 4B E9 93 CD */ bl func_801C7278
+/* 8032DEAC 00329B0C 4B E9 93 CD */ bl __div2i
/* 8032DEB0 00329B10 1C DD 17 70 */ mulli r6, r29, 0x1770
/* 8032DEB4 00329B14 3B C0 00 00 */ li r30, 0
/* 8032DEB8 00329B18 6C 60 80 00 */ xoris r0, r3, 0x8000
@@ -6005,7 +6005,7 @@ lbl_8032E02C:
/* 8032E084 00329CE4 7C 66 19 10 */ subfe r3, r6, r3
/* 8032E088 00329CE8 38 A0 00 00 */ li r5, 0
/* 8032E08C 00329CEC 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032E090 00329CF0 4B E9 91 E9 */ bl func_801C7278
+/* 8032E090 00329CF0 4B E9 91 E9 */ bl __div2i
/* 8032E094 00329CF4 80 DE 00 04 */ lwz r6, 4(r30)
/* 8032E098 00329CF8 38 A0 00 00 */ li r5, 0
/* 8032E09C 00329CFC 6C 60 80 00 */ xoris r0, r3, 0x8000
@@ -6033,7 +6033,7 @@ lbl_8032E0B8:
/* 8032E0F0 00329D50 7C 66 19 10 */ subfe r3, r6, r3
/* 8032E0F4 00329D54 38 A0 00 00 */ li r5, 0
/* 8032E0F8 00329D58 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032E0FC 00329D5C 4B E9 91 7D */ bl func_801C7278
+/* 8032E0FC 00329D5C 4B E9 91 7D */ bl __div2i
/* 8032E100 00329D60 80 DD 00 04 */ lwz r6, 4(r29)
/* 8032E104 00329D64 38 A0 00 00 */ li r5, 0
/* 8032E108 00329D68 6C 60 80 00 */ xoris r0, r3, 0x8000
@@ -6087,7 +6087,7 @@ lbl_8032E180:
/* 8032E1B8 00329E18 7C 66 19 10 */ subfe r3, r6, r3
/* 8032E1BC 00329E1C 38 A0 00 00 */ li r5, 0
/* 8032E1C0 00329E20 54 06 D1 BE */ srwi r6, r0, 6
-/* 8032E1C4 00329E24 4B E9 90 B5 */ bl func_801C7278
+/* 8032E1C4 00329E24 4B E9 90 B5 */ bl __div2i
/* 8032E1C8 00329E28 7C 86 23 78 */ mr r6, r4
/* 8032E1CC 00329E2C 7C 65 1B 78 */ mr r5, r3
/* 8032E1D0 00329E30 38 9F 12 D8 */ addi r4, r31, 0x12d8
@@ -9557,7 +9557,7 @@ lbl_8033120C:
/* 80331270 0032CED0 7C 66 19 10 */ subfe r3, r6, r3
/* 80331274 0032CED4 38 A0 00 00 */ li r5, 0
/* 80331278 0032CED8 54 06 D1 BE */ srwi r6, r0, 6
-/* 8033127C 0032CEDC 4B E9 5F FD */ bl func_801C7278
+/* 8033127C 0032CEDC 4B E9 5F FD */ bl __div2i
/* 80331280 0032CEE0 80 F8 00 30 */ lwz r7, 0x30(r24)
/* 80331284 0032CEE4 7C 04 38 40 */ cmplw r4, r7
/* 80331288 0032CEE8 40 81 00 38 */ ble lbl_803312C0
@@ -13109,7 +13109,7 @@ lbl_803345EC:
/* 80334618 00330278 7C 66 19 10 */ subfe r3, r6, r3
/* 8033461C 0033027C 38 A0 00 00 */ li r5, 0
/* 80334620 00330280 54 06 D1 BE */ srwi r6, r0, 6
-/* 80334624 00330284 4B E9 2C 55 */ bl func_801C7278
+/* 80334624 00330284 4B E9 2C 55 */ bl __div2i
/* 80334628 00330288 38 00 00 00 */ li r0, 0
/* 8033462C 0033028C 38 C0 75 30 */ li r6, 0x7530
/* 80334630 00330290 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -13292,7 +13292,7 @@ lbl_803348B0:
/* 803348DC 0033053C 7C 66 19 10 */ subfe r3, r6, r3
/* 803348E0 00330540 38 A0 00 00 */ li r5, 0
/* 803348E4 00330544 54 06 D1 BE */ srwi r6, r0, 6
-/* 803348E8 00330548 4B E9 29 91 */ bl func_801C7278
+/* 803348E8 00330548 4B E9 29 91 */ bl __div2i
/* 803348EC 0033054C 38 00 00 00 */ li r0, 0
/* 803348F0 00330550 38 C0 75 30 */ li r6, 0x7530
/* 803348F4 00330554 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -18007,7 +18007,7 @@ func_80338B08:
/* 80338B24 00334784 38 A0 00 00 */ li r5, 0
/* 80338B28 00334788 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 80338B2C 0033478C 54 06 F0 BE */ srwi r6, r0, 2
-/* 80338B30 00334790 4B E8 E7 49 */ bl func_801C7278
+/* 80338B30 00334790 4B E8 E7 49 */ bl __div2i
/* 80338B34 00334794 2C 1F 00 00 */ cmpwi r31, 0
/* 80338B38 00334798 41 82 00 0C */ beq lbl_80338B44
/* 80338B3C 0033479C 90 9F 00 04 */ stw r4, 4(r31)
@@ -18376,7 +18376,7 @@ func_80338FD8:
/* 80338FFC 00334C5C 54 00 F0 BE */ srwi r0, r0, 2
/* 80339000 00334C60 7C 06 00 16 */ mulhwu r0, r6, r0
/* 80339004 00334C64 54 06 D1 BE */ srwi r6, r0, 6
-/* 80339008 00334C68 4B E8 E2 71 */ bl func_801C7278
+/* 80339008 00334C68 4B E8 E2 71 */ bl __div2i
/* 8033900C 00334C6C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80339010 00334C70 7C 83 23 78 */ mr r3, r4
/* 80339014 00334C74 7C 08 03 A6 */ mtlr r0
@@ -20097,7 +20097,7 @@ lbl_8033A71C:
/* 8033A724 00336384 54 00 10 3A */ slwi r0, r0, 2
/* 8033A728 00336388 38 A0 00 00 */ li r5, 0
/* 8033A72C 0033638C 7C DD 00 2E */ lwzx r6, r29, r0
-/* 8033A730 00336390 4B E8 CA 5D */ bl func_801C718C
+/* 8033A730 00336390 4B E8 CA 5D */ bl __div2u
/* 8033A734 00336394 7C 9B 23 78 */ mr r27, r4
/* 8033A738 00336398 7C 7A 1B 78 */ mr r26, r3
/* 8033A73C 0033639C 38 61 00 0C */ addi r3, r1, 0xc
@@ -99123,7 +99123,7 @@ lbl_8037F0E0:
/* 8037F0F4 0037AD54 38 A0 00 00 */ li r5, 0
/* 8037F0F8 0037AD58 7C 87 01 D6 */ mullw r4, r7, r0
/* 8037F0FC 0037AD5C 7C 67 00 96 */ mulhw r3, r7, r0
-/* 8037F100 0037AD60 4B E4 81 79 */ bl func_801C7278
+/* 8037F100 0037AD60 4B E4 81 79 */ bl __div2i
lbl_8037F104:
/* 8037F104 0037AD64 38 00 00 00 */ li r0, 0
/* 8037F108 0037AD68 90 1C 00 00 */ stw r0, 0(r28)
diff --git a/asm/text_11.s b/asm/text_11.s
index c4ce330..bc28e69 100644
--- a/asm/text_11.s
+++ b/asm/text_11.s
@@ -3921,7 +3921,7 @@ lbl_80384670:
/* 8038469C 003802FC 7C 07 01 D6 */ mullw r0, r7, r0
/* 803846A0 00380300 7C 87 41 D6 */ mullw r4, r7, r8
/* 803846A4 00380304 7C 63 02 14 */ add r3, r3, r0
-/* 803846A8 00380308 4B E4 2B D1 */ bl func_801C7278
+/* 803846A8 00380308 4B E4 2B D1 */ bl __div2i
/* 803846AC 0038030C 7C 9D 23 78 */ mr r29, r4
lbl_803846B0:
/* 803846B0 00380310 80 01 00 24 */ lwz r0, 0x24(r1)
diff --git a/asm/text_2.s b/asm/text_2.s
index 19265bc..9c61354 100644
--- a/asm/text_2.s
+++ b/asm/text_2.s
@@ -24389,7 +24389,7 @@ lbl_800756E8:
/* 80075714 00071374 38 A0 00 00 */ li r5, 0
/* 80075718 00071378 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 8007571C 0007137C 54 06 F0 BE */ srwi r6, r0, 2
-/* 80075720 00071380 48 15 1B 59 */ bl func_801C7278
+/* 80075720 00071380 48 15 1B 59 */ bl __div2i
/* 80075724 00071384 7F 83 E3 78 */ mr r3, r28
/* 80075728 00071388 48 0F 17 61 */ bl func_80166E88
/* 8007572C 0007138C 48 00 09 40 */ b lbl_8007606C
diff --git a/asm/text_4.s b/asm/text_4.s
index 73c76a8..9b956d4 100644
--- a/asm/text_4.s
+++ b/asm/text_4.s
@@ -55579,7 +55579,7 @@ lbl_8014B20C:
/* 8014B238 00146E98 7C DE 02 14 */ add r6, r30, r0
/* 8014B23C 00146E9C 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B240 00146EA0 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B244 00146EA4 48 07 BF 49 */ bl func_801C718C
+/* 8014B244 00146EA4 48 07 BF 49 */ bl __div2u
/* 8014B248 00146EA8 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B24C 00146EAC 80 BB 00 08 */ lwz r5, 8(r27)
/* 8014B250 00146EB0 B0 1A 00 00 */ sth r0, 0(r26)
@@ -55592,7 +55592,7 @@ lbl_8014B20C:
/* 8014B26C 00146ECC 7C DE 02 14 */ add r6, r30, r0
/* 8014B270 00146ED0 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B274 00146ED4 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B278 00146ED8 48 07 BF 15 */ bl func_801C718C
+/* 8014B278 00146ED8 48 07 BF 15 */ bl __div2u
/* 8014B27C 00146EDC 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B280 00146EE0 80 BB 00 10 */ lwz r5, 0x10(r27)
/* 8014B284 00146EE4 B0 1A 00 02 */ sth r0, 2(r26)
@@ -55605,7 +55605,7 @@ lbl_8014B20C:
/* 8014B2A0 00146F00 7C DE 02 14 */ add r6, r30, r0
/* 8014B2A4 00146F04 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B2A8 00146F08 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B2AC 00146F0C 48 07 BE E1 */ bl func_801C718C
+/* 8014B2AC 00146F0C 48 07 BE E1 */ bl __div2u
/* 8014B2B0 00146F10 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B2B4 00146F14 80 BB 00 18 */ lwz r5, 0x18(r27)
/* 8014B2B8 00146F18 B0 1A 00 04 */ sth r0, 4(r26)
@@ -55618,7 +55618,7 @@ lbl_8014B20C:
/* 8014B2D4 00146F34 7C DE 02 14 */ add r6, r30, r0
/* 8014B2D8 00146F38 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B2DC 00146F3C 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B2E0 00146F40 48 07 BE AD */ bl func_801C718C
+/* 8014B2E0 00146F40 48 07 BE AD */ bl __div2u
/* 8014B2E4 00146F44 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B2E8 00146F48 80 BB 00 20 */ lwz r5, 0x20(r27)
/* 8014B2EC 00146F4C B0 1A 00 06 */ sth r0, 6(r26)
@@ -55631,7 +55631,7 @@ lbl_8014B20C:
/* 8014B308 00146F68 7C DE 02 14 */ add r6, r30, r0
/* 8014B30C 00146F6C 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B310 00146F70 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B314 00146F74 48 07 BE 79 */ bl func_801C718C
+/* 8014B314 00146F74 48 07 BE 79 */ bl __div2u
/* 8014B318 00146F78 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B31C 00146F7C 80 BB 00 28 */ lwz r5, 0x28(r27)
/* 8014B320 00146F80 B0 1A 00 08 */ sth r0, 8(r26)
@@ -55644,7 +55644,7 @@ lbl_8014B20C:
/* 8014B33C 00146F9C 7C DE 02 14 */ add r6, r30, r0
/* 8014B340 00146FA0 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014B344 00146FA4 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014B348 00146FA8 48 07 BE 45 */ bl func_801C718C
+/* 8014B348 00146FA8 48 07 BE 45 */ bl __div2u
/* 8014B34C 00146FAC 3A 94 00 06 */ addi r20, r20, 6
/* 8014B350 00146FB0 7C 04 F8 14 */ addc r0, r4, r31
/* 8014B354 00146FB4 28 14 00 0C */ cmplwi r20, 0xc
@@ -59777,7 +59777,7 @@ lbl_8014EFB8:
/* 8014EFDC 0014AC3C 7C DE 02 14 */ add r6, r30, r0
/* 8014EFE0 0014AC40 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014EFE4 0014AC44 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014EFE8 0014AC48 48 07 81 A5 */ bl func_801C718C
+/* 8014EFE8 0014AC48 48 07 81 A5 */ bl __div2u
/* 8014EFEC 0014AC4C 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014EFF0 0014AC50 7C C4 F8 14 */ addc r6, r4, r31
/* 8014EFF4 0014AC54 7F 63 DB 78 */ mr r3, r27
@@ -59792,7 +59792,7 @@ lbl_8014EFB8:
/* 8014F018 0014AC78 7C DE 02 14 */ add r6, r30, r0
/* 8014F01C 0014AC7C 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014F020 0014AC80 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014F024 0014AC84 48 07 81 69 */ bl func_801C718C
+/* 8014F024 0014AC84 48 07 81 69 */ bl __div2u
/* 8014F028 0014AC88 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014F02C 0014AC8C 7C C4 F8 14 */ addc r6, r4, r31
/* 8014F030 0014AC90 7F 63 DB 78 */ mr r3, r27
@@ -59807,7 +59807,7 @@ lbl_8014EFB8:
/* 8014F054 0014ACB4 7C DE 02 14 */ add r6, r30, r0
/* 8014F058 0014ACB8 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014F05C 0014ACBC 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014F060 0014ACC0 48 07 81 2D */ bl func_801C718C
+/* 8014F060 0014ACC0 48 07 81 2D */ bl __div2u
/* 8014F064 0014ACC4 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014F068 0014ACC8 7C C4 F8 14 */ addc r6, r4, r31
/* 8014F06C 0014ACCC 7F 63 DB 78 */ mr r3, r27
@@ -59822,7 +59822,7 @@ lbl_8014EFB8:
/* 8014F090 0014ACF0 7C DE 02 14 */ add r6, r30, r0
/* 8014F094 0014ACF4 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014F098 0014ACF8 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014F09C 0014ACFC 48 07 80 F1 */ bl func_801C718C
+/* 8014F09C 0014ACFC 48 07 80 F1 */ bl __div2u
/* 8014F0A0 0014AD00 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014F0A4 0014AD04 7C C4 F8 14 */ addc r6, r4, r31
/* 8014F0A8 0014AD08 7F 63 DB 78 */ mr r3, r27
@@ -59837,7 +59837,7 @@ lbl_8014EFB8:
/* 8014F0CC 0014AD2C 7C DE 02 14 */ add r6, r30, r0
/* 8014F0D0 0014AD30 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014F0D4 0014AD34 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014F0D8 0014AD38 48 07 80 B5 */ bl func_801C718C
+/* 8014F0D8 0014AD38 48 07 80 B5 */ bl __div2u
/* 8014F0DC 0014AD3C 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014F0E0 0014AD40 7C C4 F8 14 */ addc r6, r4, r31
/* 8014F0E4 0014AD44 7F 63 DB 78 */ mr r3, r27
@@ -59852,7 +59852,7 @@ lbl_8014EFB8:
/* 8014F108 0014AD68 7C DE 02 14 */ add r6, r30, r0
/* 8014F10C 0014AD6C 80 A6 00 08 */ lwz r5, 8(r6)
/* 8014F110 0014AD70 80 C6 00 0C */ lwz r6, 0xc(r6)
-/* 8014F114 0014AD74 48 07 80 79 */ bl func_801C718C
+/* 8014F114 0014AD74 48 07 80 79 */ bl __div2u
/* 8014F118 0014AD78 80 0D 82 B8 */ lwz r0, lbl_8063D578-_SDA_BASE_(r13)
/* 8014F11C 0014AD7C 3B 39 00 06 */ addi r25, r25, 6
/* 8014F120 0014AD80 28 19 00 0C */ cmplwi r25, 0xc
@@ -83270,10 +83270,10 @@ func_80163434:
/* 80163468 0015F0C8 38 A0 00 00 */ li r5, 0
/* 8016346C 0015F0CC 7C 67 19 10 */ subfe r3, r7, r3
/* 80163470 0015F0D0 54 06 D1 BE */ srwi r6, r0, 6
-/* 80163474 0015F0D4 48 06 3E 05 */ bl func_801C7278
+/* 80163474 0015F0D4 48 06 3E 05 */ bl __div2i
/* 80163478 0015F0D8 38 C0 00 0A */ li r6, 0xa
/* 8016347C 0015F0DC 38 A0 00 00 */ li r5, 0
-/* 80163480 0015F0E0 48 06 3D F9 */ bl func_801C7278
+/* 80163480 0015F0E0 48 06 3D F9 */ bl __div2i
/* 80163484 0015F0E4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80163488 0015F0E8 7C 83 23 78 */ mr r3, r4
/* 8016348C 0015F0EC 7C 08 03 A6 */ mtlr r0
@@ -85750,7 +85750,7 @@ func_80165534:
/* 80165554 001611B4 38 A0 00 00 */ li r5, 0
/* 80165558 001611B8 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 8016555C 001611BC 54 06 F0 BE */ srwi r6, r0, 2
-/* 80165560 001611C0 48 06 1D 19 */ bl func_801C7278
+/* 80165560 001611C0 48 06 1D 19 */ bl __div2i
/* 80165564 001611C4 3C A0 80 49 */ lis r5, lbl_8048BE28@ha
/* 80165568 001611C8 38 00 00 20 */ li r0, 0x20
/* 8016556C 001611CC 7C 9D 23 78 */ mr r29, r4
@@ -85948,7 +85948,7 @@ func_801657F0:
/* 80165814 00161474 38 A0 00 00 */ li r5, 0
/* 80165818 00161478 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 8016581C 0016147C 54 06 F0 BE */ srwi r6, r0, 2
-/* 80165820 00161480 48 06 1A 59 */ bl func_801C7278
+/* 80165820 00161480 48 06 1A 59 */ bl __div2i
/* 80165824 00161484 7C 9F 23 78 */ mr r31, r4
/* 80165828 00161488 7F A3 EB 78 */ mr r3, r29
/* 8016582C 0016148C 4B FF FD 09 */ bl func_80165534
diff --git a/asm/text_5.s b/asm/text_5.s
index 37571dc..342229b 100644
--- a/asm/text_5.s
+++ b/asm/text_5.s
@@ -97349,8 +97349,8 @@ func_801C717C:
/* 801C7184 001C2DE4 83 EB FF FC */ lwz r31, -4(r11)
/* 801C7188 001C2DE8 4E 80 00 20 */ blr
-.global func_801C718C
-func_801C718C:
+.global __div2u
+__div2u:
/* 801C718C 001C2DEC 2C 03 00 00 */ cmpwi r3, 0
/* 801C7190 001C2DF0 7C 60 00 34 */ cntlzw r0, r3
/* 801C7194 001C2DF4 7C 89 00 34 */ cntlzw r9, r4
@@ -97420,8 +97420,8 @@ lbl_801C726C:
/* 801C7270 001C2ED0 38 60 00 00 */ li r3, 0
/* 801C7274 001C2ED4 4E 80 00 20 */ blr
-.global func_801C7278
-func_801C7278:
+.global __div2i
+__div2i:
/* 801C7278 001C2ED8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801C727C 001C2EDC 54 69 00 01 */ rlwinm. r9, r3, 0, 0, 0
/* 801C7280 001C2EE0 41 82 00 0C */ beq lbl_801C728C
@@ -97677,8 +97677,8 @@ func_801C75A0:
/* 801C75BC 001C321C 7C 84 28 30 */ slw r4, r4, r5
/* 801C75C0 001C3220 4E 80 00 20 */ blr
-.global func_801C75C4
-func_801C75C4:
+.global __cvt_sll_flt
+__cvt_sll_flt:
/* 801C75C4 001C3224 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801C75C8 001C3228 54 65 00 01 */ rlwinm. r5, r3, 0, 0, 0
/* 801C75CC 001C322C 41 82 00 0C */ beq lbl_801C75D8
@@ -97836,13 +97836,19 @@ func_801C77C0:
/* 801C77D8 001C3438 3C 60 80 00 */ lis r3, lbl_80006948@ha
/* 801C77DC 001C343C 7C 44 13 78 */ mr r4, r2
/* 801C77E0 001C3440 38 63 69 48 */ addi r3, r3, lbl_80006948@l
-/* 801C77E4 001C3444 48 00 00 4D */ bl func_801C7830
+/* 801C77E4 001C3444 48 00 00 4D */ bl __register_fragment
/* 801C77E8 001C3448 90 6D 83 D8 */ stw r3, lbl_8063D698-_SDA_BASE_(r13)
lbl_801C77EC:
/* 801C77EC 001C344C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801C77F0 001C3450 7C 08 03 A6 */ mtlr r0
/* 801C77F4 001C3454 38 21 00 10 */ addi r1, r1, 0x10
/* 801C77F8 001C3458 4E 80 00 20 */ blr
+
+.global func_801C77FC
+func_801C77FC: #__fini_cpp_exceptions
+#causes "runtime sources 'global_destructor_chain.c' and '__init_cpp_exceptions.cpp' both need to be updated to latest
+#version. Please contact Metrowerks support." error
+#needs to be split correctly before renaming
/* 801C77FC 001C345C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801C7800 001C3460 7C 08 02 A6 */ mflr r0
/* 801C7804 001C3464 90 01 00 14 */ stw r0, 0x14(r1)
@@ -97858,8 +97864,8 @@ lbl_801C7820:
/* 801C7828 001C3488 38 21 00 10 */ addi r1, r1, 0x10
/* 801C782C 001C348C 4E 80 00 20 */ blr
-.global func_801C7830
-func_801C7830:
+.global __register_fragment
+__register_fragment:
/* 801C7830 001C3490 3C A0 80 49 */ lis r5, lbl_8048EAE0@ha
/* 801C7834 001C3494 38 A5 EA E0 */ addi r5, r5, lbl_8048EAE0@l
/* 801C7838 001C3498 80 05 00 08 */ lwz r0, 8(r5)
@@ -98040,7 +98046,7 @@ lbl_801C7A5C:
/* 801C7A88 001C36E8 98 87 00 05 */ stb r4, 5(r7)
/* 801C7A8C 001C36EC 7F C4 F3 78 */ mr r4, r30
/* 801C7A90 001C36F0 98 1D 00 04 */ stb r0, 4(r29)
-/* 801C7A94 001C36F4 4B FF F6 F9 */ bl func_801C718C
+/* 801C7A94 001C36F4 4B FF F6 F9 */ bl __div2u
/* 801C7A98 001C36F8 7C 9E 23 78 */ mr r30, r4
/* 801C7A9C 001C36FC 7C 7F 1B 78 */ mr r31, r3
lbl_801C7AA0:
@@ -99827,8 +99833,8 @@ lbl_801C9378:
/* 801C9390 001C4FF0 38 21 01 80 */ addi r1, r1, 0x180
/* 801C9394 001C4FF4 4E 80 00 20 */ blr
-.global func_801C9398
-func_801C9398:
+.global abs
+abs:
/* 801C9398 001C4FF8 7C 64 FE 70 */ srawi r4, r3, 0x1f
/* 801C939C 001C4FFC 7C 80 1A 78 */ xor r0, r4, r3
/* 801C93A0 001C5000 7C 64 00 50 */ subf r3, r4, r0
@@ -100961,18 +100967,18 @@ func_801CA274:
/* 801CA2A4 001C5F04 41 82 00 1C */ beq lbl_801CA2C0
/* 801CA2A8 001C5F08 2C 07 00 00 */ cmpwi r7, 0
/* 801CA2AC 001C5F0C 40 82 00 0C */ bne lbl_801CA2B8
-/* 801CA2B0 001C5F10 48 00 02 99 */ bl func_801CA548
+/* 801CA2B0 001C5F10 48 00 02 99 */ bl __copy_longs_unaligned
/* 801CA2B4 001C5F14 48 00 00 20 */ b lbl_801CA2D4
lbl_801CA2B8:
-/* 801CA2B8 001C5F18 48 00 03 51 */ bl func_801CA608
+/* 801CA2B8 001C5F18 48 00 03 51 */ bl __copy_longs_rev_unaligned
/* 801CA2BC 001C5F1C 48 00 00 18 */ b lbl_801CA2D4
lbl_801CA2C0:
/* 801CA2C0 001C5F20 2C 07 00 00 */ cmpwi r7, 0
/* 801CA2C4 001C5F24 40 82 00 0C */ bne lbl_801CA2D0
-/* 801CA2C8 001C5F28 48 00 01 1D */ bl func_801CA3E4
+/* 801CA2C8 001C5F28 48 00 01 1D */ bl __copy_longs_aligned
/* 801CA2CC 001C5F2C 48 00 00 08 */ b lbl_801CA2D4
lbl_801CA2D0:
-/* 801CA2D0 001C5F30 48 00 01 D1 */ bl func_801CA4A0
+/* 801CA2D0 001C5F30 48 00 01 D1 */ bl __copy_longs_rev_aligned
lbl_801CA2D4:
/* 801CA2D4 001C5F34 7F E3 FB 78 */ mr r3, r31
/* 801CA2D8 001C5F38 48 00 00 54 */ b lbl_801CA32C
@@ -101010,8 +101016,8 @@ lbl_801CA32C:
/* 801CA338 001C5F98 38 21 00 10 */ addi r1, r1, 0x10
/* 801CA33C 001C5F9C 4E 80 00 20 */ blr
-.global func_801CA340
-func_801CA340:
+.global memchr
+memchr:
/* 801CA340 001C5FA0 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 801CA344 001C5FA4 38 63 FF FF */ addi r3, r3, -1
/* 801CA348 001C5FA8 38 A5 00 01 */ addi r5, r5, 1
@@ -101066,8 +101072,8 @@ lbl_801CA3D4:
/* 801CA3DC 001C603C 38 60 00 00 */ li r3, 0
/* 801CA3E0 001C6040 4E 80 00 20 */ blr
-.global func_801CA3E4
-func_801CA3E4:
+.global __copy_longs_aligned
+__copy_longs_aligned:
/* 801CA3E4 001C6044 7C 03 00 D0 */ neg r0, r3
/* 801CA3E8 001C6048 38 84 FF FF */ addi r4, r4, -1
/* 801CA3EC 001C604C 54 06 07 BF */ clrlwi. r6, r0, 0x1e
@@ -101123,8 +101129,8 @@ lbl_801CA48C:
/* 801CA498 001C60F8 40 82 FF F4 */ bne lbl_801CA48C
/* 801CA49C 001C60FC 4E 80 00 20 */ blr
-.global func_801CA4A0
-func_801CA4A0:
+.global __copy_longs_rev_aligned
+__copy_longs_rev_aligned:
/* 801CA4A0 001C6100 7C E3 2A 14 */ add r7, r3, r5
/* 801CA4A4 001C6104 7C C4 2A 14 */ add r6, r4, r5
/* 801CA4A8 001C6108 54 E3 07 BF */ clrlwi. r3, r7, 0x1e
@@ -101175,8 +101181,8 @@ lbl_801CA534:
/* 801CA540 001C61A0 40 82 FF F4 */ bne lbl_801CA534
/* 801CA544 001C61A4 4E 80 00 20 */ blr
-.global func_801CA548
-func_801CA548:
+.global __copy_longs_unaligned
+__copy_longs_unaligned:
/* 801CA548 001C61A8 7C 03 00 D0 */ neg r0, r3
/* 801CA54C 001C61AC 39 04 FF FF */ addi r8, r4, -1
/* 801CA550 001C61B0 54 06 07 BF */ clrlwi. r6, r0, 0x1e
@@ -101231,8 +101237,8 @@ lbl_801CA5F4:
/* 801CA600 001C6260 40 82 FF F4 */ bne lbl_801CA5F4
/* 801CA604 001C6264 4E 80 00 20 */ blr
-.global func_801CA608
-func_801CA608:
+.global __copy_longs_rev_unaligned
+__copy_longs_rev_unaligned:
/* 801CA608 001C6268 7D 63 2A 14 */ add r11, r3, r5
/* 801CA60C 001C626C 7D 44 2A 14 */ add r10, r4, r5
/* 801CA610 001C6270 55 63 07 BF */ clrlwi. r3, r11, 0x1e
diff --git a/asm/text_6.s b/asm/text_6.s
index 8b015a7..0ef7635 100644
--- a/asm/text_6.s
+++ b/asm/text_6.s
@@ -684,7 +684,7 @@ lbl_801CB0E0:
/* 801CB0FC 001C6D5C 7F C4 F3 78 */ mr r4, r30
/* 801CB100 001C6D60 7F A5 EB 78 */ mr r5, r29
/* 801CB104 001C6D64 7F 86 E3 78 */ mr r6, r28
-/* 801CB108 001C6D68 4B FF C0 85 */ bl func_801C718C
+/* 801CB108 001C6D68 4B FF C0 85 */ bl __div2u
/* 801CB10C 001C6D6C 2C 16 00 0A */ cmpwi r22, 0xa
/* 801CB110 001C6D70 7C 9E 23 78 */ mr r30, r4
/* 801CB114 001C6D74 7C 7F 1B 78 */ mr r31, r3
@@ -2173,7 +2173,7 @@ lbl_801CC514:
/* 801CC524 001C8184 7F 43 D3 78 */ mr r3, r26
/* 801CC528 001C8188 38 80 00 00 */ li r4, 0
/* 801CC52C 001C818C 7F 65 DB 78 */ mr r5, r27
-/* 801CC530 001C8190 4B FF DE 11 */ bl func_801CA340
+/* 801CC530 001C8190 4B FF DE 11 */ bl memchr
/* 801CC534 001C8194 2C 03 00 00 */ cmpwi r3, 0
/* 801CC538 001C8198 41 82 01 08 */ beq lbl_801CC640
/* 801CC53C 001C819C 7F 7A 18 50 */ subf r27, r26, r3
@@ -6661,7 +6661,7 @@ lbl_801D014C:
/* 801D0158 001CBDB8 7D E5 FE 70 */ srawi r5, r15, 0x1f
/* 801D015C 001CBDBC 38 60 FF FF */ li r3, -1
/* 801D0160 001CBDC0 38 80 FF FF */ li r4, -1
-/* 801D0164 001CBDC4 4B FF 70 29 */ bl func_801C718C
+/* 801D0164 001CBDC4 4B FF 70 29 */ bl __div2u
/* 801D0168 001CBDC8 7C 96 23 78 */ mr r22, r4
/* 801D016C 001CBDCC 7C 77 1B 78 */ mr r23, r3
lbl_801D0170:
@@ -6792,7 +6792,7 @@ lbl_801D0310:
/* 801D0328 001CBF88 7D E5 FE 70 */ srawi r5, r15, 0x1f
/* 801D032C 001CBF8C 38 60 FF FF */ li r3, -1
/* 801D0330 001CBF90 38 80 FF FF */ li r4, -1
-/* 801D0334 001CBF94 4B FF 6E 59 */ bl func_801C718C
+/* 801D0334 001CBF94 4B FF 6E 59 */ bl __div2u
/* 801D0338 001CBF98 7C 96 23 78 */ mr r22, r4
/* 801D033C 001CBF9C 7C 77 1B 78 */ mr r23, r3
lbl_801D0340:
@@ -7234,6 +7234,9 @@ lbl_801D08DC:
lbl_801D08E0:
/* 801D08E0 001CC540 7C 83 23 78 */ mr r3, r4
/* 801D08E4 001CC544 4E 80 00 20 */ blr
+
+.global __write_console
+__write_console:
/* 801D08E8 001CC548 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D08EC 001CC54C 7C 08 02 A6 */ mflr r0
/* 801D08F0 001CC550 90 01 00 24 */ stw r0, 0x24(r1)
@@ -11775,8 +11778,8 @@ func_801D4830:
func_801D4834:
/* 801D4834 001D0494 4B FF FD B4 */ b lbl_801D45E8
-.global func_801D4838
-func_801D4838:
+.global TRKNubMainLoop
+TRKNubMainLoop:
/* 801D4838 001D0498 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D483C 001D049C 7C 08 02 A6 */ mflr r0
/* 801D4840 001D04A0 90 01 00 24 */ stw r0, 0x24(r1)
@@ -11787,7 +11790,7 @@ func_801D4838:
/* 801D4854 001D04B4 48 00 00 BC */ b lbl_801D4910
lbl_801D4858:
/* 801D4858 001D04B8 38 61 00 08 */ addi r3, r1, 8
-/* 801D485C 001D04BC 48 00 01 F1 */ bl func_801D4A4C
+/* 801D485C 001D04BC 48 00 01 F1 */ bl TRKGetNextEvent
/* 801D4860 001D04C0 2C 03 00 00 */ cmpwi r3, 0
/* 801D4864 001D04C4 41 82 00 6C */ beq lbl_801D48D0
/* 801D4868 001D04C8 80 01 00 08 */ lwz r0, 8(r1)
@@ -11806,7 +11809,7 @@ lbl_801D488C:
/* 801D4898 001D04F8 48 00 00 1C */ b lbl_801D48B4
lbl_801D489C:
/* 801D489C 001D04FC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D48A0 001D0500 48 00 0B 3D */ bl func_801D53DC
+/* 801D48A0 001D0500 48 00 0B 3D */ bl TRKGetBuffer
/* 801D48A4 001D0504 48 00 0E D9 */ bl func_801D577C
/* 801D48A8 001D0508 48 00 00 1C */ b lbl_801D48C4
lbl_801D48AC:
@@ -11817,7 +11820,7 @@ lbl_801D48B4:
/* 801D48B8 001D0518 48 00 31 85 */ bl func_801D7A3C
/* 801D48BC 001D051C 48 00 00 08 */ b lbl_801D48C4
lbl_801D48C0:
-/* 801D48C0 001D0520 48 00 2D 75 */ bl func_801D7634
+/* 801D48C0 001D0520 48 00 2D 75 */ bl TRKTargetSupportRequest
lbl_801D48C4:
/* 801D48C4 001D0524 38 61 00 08 */ addi r3, r1, 8
/* 801D48C8 001D0528 48 00 00 69 */ bl func_801D4930
@@ -11833,13 +11836,13 @@ lbl_801D48D0:
/* 801D48EC 001D054C 41 82 00 10 */ beq lbl_801D48FC
lbl_801D48F0:
/* 801D48F0 001D0550 3B C0 00 01 */ li r30, 1
-/* 801D48F4 001D0554 48 00 0C CD */ bl func_801D55C0
+/* 801D48F4 001D0554 48 00 0C CD */ bl TRKGetInput
/* 801D48F8 001D0558 48 00 00 18 */ b lbl_801D4910
lbl_801D48FC:
/* 801D48FC 001D055C 48 00 2D 29 */ bl func_801D7624
/* 801D4900 001D0560 2C 03 00 00 */ cmpwi r3, 0
/* 801D4904 001D0564 40 82 00 08 */ bne lbl_801D490C
-/* 801D4908 001D0568 48 00 50 51 */ bl func_801D9958
+/* 801D4908 001D0568 48 00 50 51 */ bl TRKTargetContinue
lbl_801D490C:
/* 801D490C 001D056C 3B C0 00 00 */ li r30, 0
lbl_801D4910:
@@ -11858,14 +11861,14 @@ func_801D4930:
/* 801D4934 001D0594 7C 08 02 A6 */ mflr r0
/* 801D4938 001D0598 90 01 00 14 */ stw r0, 0x14(r1)
/* 801D493C 001D059C 80 63 00 08 */ lwz r3, 8(r3)
-/* 801D4940 001D05A0 48 00 0A 39 */ bl func_801D5378
+/* 801D4940 001D05A0 48 00 0A 39 */ bl TRKReleaseBuffer
/* 801D4944 001D05A4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D4948 001D05A8 7C 08 03 A6 */ mtlr r0
/* 801D494C 001D05AC 38 21 00 10 */ addi r1, r1, 0x10
/* 801D4950 001D05B0 4E 80 00 20 */ blr
-.global func_801D4954
-func_801D4954:
+.global TRKConstructEvent
+TRKConstructEvent:
/* 801D4954 001D05B4 90 83 00 00 */ stw r4, 0(r3)
/* 801D4958 001D05B8 38 80 00 00 */ li r4, 0
/* 801D495C 001D05BC 38 00 FF FF */ li r0, -1
@@ -11873,8 +11876,8 @@ func_801D4954:
/* 801D4964 001D05C4 90 03 00 08 */ stw r0, 8(r3)
/* 801D4968 001D05C8 4E 80 00 20 */ blr
-.global func_801D496C
-func_801D496C:
+.global TRKPostEvent
+TRKPostEvent:
/* 801D496C 001D05CC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D4970 001D05D0 7C 08 02 A6 */ mflr r0
/* 801D4974 001D05D4 3C 80 80 49 */ lis r4, lbl_8048EDF0@ha
@@ -11935,8 +11938,8 @@ lbl_801D4A20:
/* 801D4A44 001D06A4 38 21 00 20 */ addi r1, r1, 0x20
/* 801D4A48 001D06A8 4E 80 00 20 */ blr
-.global func_801D4A4C
-func_801D4A4C:
+.global TRKGetNextEvent
+TRKGetNextEvent:
/* 801D4A4C 001D06AC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D4A50 001D06B0 7C 08 02 A6 */ mflr r0
/* 801D4A54 001D06B4 3C 80 80 49 */ lis r4, lbl_8048EDF0@ha
@@ -11985,8 +11988,8 @@ lbl_801D4AD4:
/* 801D4AF8 001D0758 38 21 00 20 */ addi r1, r1, 0x20
/* 801D4AFC 001D075C 4E 80 00 20 */ blr
-.global func_801D4B00
-func_801D4B00:
+.global TRKInitializeEventQueue
+TRKInitializeEventQueue:
/* 801D4B00 001D0760 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D4B04 001D0764 7C 08 02 A6 */ mflr r0
/* 801D4B08 001D0768 3C 60 80 49 */ lis r3, lbl_8048EDF0@ha
@@ -12010,14 +12013,14 @@ func_801D4B00:
/* 801D4B50 001D07B0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D4B54 001D07B4 4E 80 00 20 */ blr
-.global func_801D4B58
-func_801D4B58:
+.global TRKNubWelcome
+TRKNubWelcome:
/* 801D4B58 001D07B8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D4B5C 001D07BC 7C 08 02 A6 */ mflr r0
/* 801D4B60 001D07C0 3C 60 80 40 */ lis r3, lbl_803FD640@ha
/* 801D4B64 001D07C4 90 01 00 14 */ stw r0, 0x14(r1)
/* 801D4B68 001D07C8 38 63 D6 40 */ addi r3, r3, lbl_803FD640@l
-/* 801D4B6C 001D07CC 48 00 4A 11 */ bl func_801D957C
+/* 801D4B6C 001D07CC 48 00 4A 11 */ bl TRK_board_display
/* 801D4B70 001D07D0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D4B74 001D07D4 7C 08 03 A6 */ mtlr r0
/* 801D4B78 001D07D8 38 21 00 10 */ addi r1, r1, 0x10
@@ -12075,12 +12078,12 @@ lbl_801D4C18:
lbl_801D4C24:
/* 801D4C24 001D0884 2C 1F 00 00 */ cmpwi r31, 0
/* 801D4C28 001D0888 40 82 00 0C */ bne lbl_801D4C34
-/* 801D4C2C 001D088C 4B FF FE D5 */ bl func_801D4B00
+/* 801D4C2C 001D088C 4B FF FE D5 */ bl TRKInitializeEventQueue
/* 801D4C30 001D0890 7C 7F 1B 78 */ mr r31, r3
lbl_801D4C34:
/* 801D4C34 001D0894 2C 1F 00 00 */ cmpwi r31, 0
/* 801D4C38 001D0898 40 82 00 0C */ bne lbl_801D4C44
-/* 801D4C3C 001D089C 48 00 08 95 */ bl func_801D54D0
+/* 801D4C3C 001D089C 48 00 08 95 */ bl TRKInitializeMessageBuffers
/* 801D4C40 001D08A0 7C 7F 1B 78 */ mr r31, r3
lbl_801D4C44:
/* 801D4C44 001D08A4 2C 1F 00 00 */ cmpwi r31, 0
@@ -12088,7 +12091,7 @@ lbl_801D4C44:
/* 801D4C4C 001D08AC 48 00 0C 71 */ bl func_801D58BC
/* 801D4C50 001D08B0 7C 7F 1B 78 */ mr r31, r3
lbl_801D4C54:
-/* 801D4C54 001D08B4 48 00 48 D1 */ bl func_801D9524
+/* 801D4C54 001D08B4 48 00 48 D1 */ bl InitializeProgramEndTrap
/* 801D4C58 001D08B8 2C 1F 00 00 */ cmpwi r31, 0
/* 801D4C5C 001D08BC 40 82 00 0C */ bne lbl_801D4C68
/* 801D4C60 001D08C0 48 00 08 ED */ bl func_801D554C
@@ -12096,7 +12099,7 @@ lbl_801D4C54:
lbl_801D4C68:
/* 801D4C68 001D08C8 2C 1F 00 00 */ cmpwi r31, 0
/* 801D4C6C 001D08CC 40 82 00 0C */ bne lbl_801D4C78
-/* 801D4C70 001D08D0 48 00 45 F5 */ bl func_801D9264
+/* 801D4C70 001D08D0 48 00 45 F5 */ bl TRKInitializeTarget
/* 801D4C74 001D08D4 7C 7F 1B 78 */ mr r31, r3
lbl_801D4C78:
/* 801D4C78 001D08D8 2C 1F 00 00 */ cmpwi r31, 0
@@ -12107,7 +12110,7 @@ lbl_801D4C78:
/* 801D4C8C 001D08EC 38 80 00 01 */ li r4, 1
/* 801D4C90 001D08F0 38 65 E1 00 */ addi r3, r5, 0x0000E100@l
/* 801D4C94 001D08F4 38 A0 00 00 */ li r5, 0
-/* 801D4C98 001D08F8 48 00 4A 65 */ bl func_801D96FC
+/* 801D4C98 001D08F8 48 00 4A 65 */ bl TRKInitializeIntDrivenUART
/* 801D4C9C 001D08FC 3C 80 80 64 */ lis r4, lbl_8063F2A0@ha
/* 801D4CA0 001D0900 7C 60 1B 78 */ mr r0, r3
/* 801D4CA4 001D0904 38 64 F2 A0 */ addi r3, r4, lbl_8063F2A0@l
@@ -12140,8 +12143,8 @@ func_801D4CDC:
/* 801D4D00 001D0960 38 21 00 10 */ addi r1, r1, 0x10
/* 801D4D04 001D0964 4E 80 00 20 */ blr
-.global func_801D4D08
-func_801D4D08:
+.global TRKReadBuffer_ui32
+TRKReadBuffer_ui32:
/* 801D4D08 001D0968 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 801D4D0C 001D096C 7C 08 02 A6 */ mflr r0
/* 801D4D10 001D0970 3C C0 80 49 */ lis r6, lbl_8048EE18@ha
@@ -12210,8 +12213,8 @@ lbl_801D4DE4:
/* 801D4DF0 001D0A50 38 21 00 30 */ addi r1, r1, 0x30
/* 801D4DF4 001D0A54 4E 80 00 20 */ blr
-.global func_801D4DF8
-func_801D4DF8:
+.global TRKReadBuffer_ui8
+TRKReadBuffer_ui8:
/* 801D4DF8 001D0A58 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D4DFC 001D0A5C 7C 08 02 A6 */ mflr r0
/* 801D4E00 001D0A60 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12255,8 +12258,8 @@ lbl_801D4E7C:
/* 801D4E88 001D0AE8 38 21 00 20 */ addi r1, r1, 0x20
/* 801D4E8C 001D0AEC 4E 80 00 20 */ blr
-.global func_801D4E90
-func_801D4E90:
+.global TRKReadBuffer1_ui64
+TRKReadBuffer1_ui64:
/* 801D4E90 001D0AF0 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 801D4E94 001D0AF4 7C 08 02 A6 */ mflr r0
/* 801D4E98 001D0AF8 3C A0 80 49 */ lis r5, lbl_8048EE18@ha
@@ -12320,8 +12323,8 @@ lbl_801D4F60:
/* 801D4F70 001D0BD0 38 21 00 30 */ addi r1, r1, 0x30
/* 801D4F74 001D0BD4 4E 80 00 20 */ blr
-.global func_801D4F78
-func_801D4F78:
+.global TRKAppendBuffer_ui32
+TRKAppendBuffer_ui32:
/* 801D4F78 001D0BD8 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 801D4F7C 001D0BDC 7C 08 02 A6 */ mflr r0
/* 801D4F80 001D0BE0 3C C0 80 49 */ lis r6, lbl_8048EE18@ha
@@ -12394,8 +12397,8 @@ lbl_801D5060:
/* 801D506C 001D0CCC 38 21 00 30 */ addi r1, r1, 0x30
/* 801D5070 001D0CD0 4E 80 00 20 */ blr
-.global func_801D5074
-func_801D5074:
+.global TRKAppendBuffer_ui8
+TRKAppendBuffer_ui8:
/* 801D5074 001D0CD4 39 20 00 00 */ li r9, 0
/* 801D5078 001D0CD8 38 00 00 00 */ li r0, 0
/* 801D507C 001D0CDC 48 00 00 48 */ b lbl_801D50C4
@@ -12428,8 +12431,8 @@ lbl_801D50D4:
/* 801D50D4 001D0D34 7C 03 03 78 */ mr r3, r0
/* 801D50D8 001D0D38 4E 80 00 20 */ blr
-.global func_801D50DC
-func_801D50DC:
+.global TRKAppendBuffer1_ui64
+TRKAppendBuffer1_ui64:
/* 801D50DC 001D0D3C 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 801D50E0 001D0D40 7C 08 02 A6 */ mflr r0
/* 801D50E4 001D0D44 3C 80 80 49 */ lis r4, lbl_8048EE18@ha
@@ -12499,8 +12502,8 @@ lbl_801D51A4:
/* 801D51D0 001D0E30 38 21 00 30 */ addi r1, r1, 0x30
/* 801D51D4 001D0E34 4E 80 00 20 */ blr
-.global func_801D51D8
-func_801D51D8:
+.global TRKReadBuffer
+TRKReadBuffer:
/* 801D51D8 001D0E38 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D51DC 001D0E3C 7C 08 02 A6 */ mflr r0
/* 801D51E0 001D0E40 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12540,8 +12543,8 @@ lbl_801D5248:
/* 801D525C 001D0EBC 38 21 00 20 */ addi r1, r1, 0x20
/* 801D5260 001D0EC0 4E 80 00 20 */ blr
-.global func_801D5264
-func_801D5264:
+.global TRKAppendBuffer
+TRKAppendBuffer:
/* 801D5264 001D0EC4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D5268 001D0EC8 7C 08 02 A6 */ mflr r0
/* 801D526C 001D0ECC 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12589,8 +12592,8 @@ lbl_801D52EC:
/* 801D5300 001D0F60 38 21 00 20 */ addi r1, r1, 0x20
/* 801D5304 001D0F64 4E 80 00 20 */ blr
-.global func_801D5308
-func_801D5308:
+.global TRKSetBufferPosition
+TRKSetBufferPosition:
/* 801D5308 001D0F68 28 04 08 80 */ cmplwi r4, 0x880
/* 801D530C 001D0F6C 38 A0 00 00 */ li r5, 0
/* 801D5310 001D0F70 40 81 00 0C */ ble lbl_801D531C
@@ -12606,8 +12609,8 @@ lbl_801D5330:
/* 801D5330 001D0F90 7C A3 2B 78 */ mr r3, r5
/* 801D5334 001D0F94 4E 80 00 20 */ blr
-.global func_801D5338
-func_801D5338:
+.global TRKResetBuffer
+TRKResetBuffer:
/* 801D5338 001D0F98 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D533C 001D0F9C 7C 08 02 A6 */ mflr r0
/* 801D5340 001D0FA0 2C 04 00 00 */ cmpwi r4, 0
@@ -12626,8 +12629,8 @@ lbl_801D5368:
/* 801D5370 001D0FD0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D5374 001D0FD4 4E 80 00 20 */ blr
-.global func_801D5378
-func_801D5378:
+.global TRKReleaseBuffer
+TRKReleaseBuffer:
/* 801D5378 001D0FD8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D537C 001D0FDC 7C 08 02 A6 */ mflr r0
/* 801D5380 001D0FE0 2C 03 FF FF */ cmpwi r3, -1
@@ -12655,8 +12658,8 @@ lbl_801D53C8:
/* 801D53D4 001D1034 38 21 00 10 */ addi r1, r1, 0x10
/* 801D53D8 001D1038 4E 80 00 20 */ blr
-.global func_801D53DC
-func_801D53DC:
+.global TRKGetBuffer
+TRKGetBuffer:
/* 801D53DC 001D103C 2C 03 00 00 */ cmpwi r3, 0
/* 801D53E0 001D1040 38 00 00 00 */ li r0, 0
/* 801D53E4 001D1044 41 80 00 1C */ blt lbl_801D5400
@@ -12670,8 +12673,8 @@ lbl_801D5400:
/* 801D5400 001D1060 7C 03 03 78 */ mr r3, r0
/* 801D5404 001D1064 4E 80 00 20 */ blr
-.global func_801D5408
-func_801D5408:
+.global TRKGetFreeBuffer
+TRKGetFreeBuffer:
/* 801D5408 001D1068 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D540C 001D106C 7C 08 02 A6 */ mflr r0
/* 801D5410 001D1070 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12719,7 +12722,7 @@ lbl_801D549C:
/* 801D54A8 001D1108 40 82 00 10 */ bne lbl_801D54B8
/* 801D54AC 001D110C 3C 60 80 40 */ lis r3, lbl_803FD660@ha
/* 801D54B0 001D1110 38 63 D6 60 */ addi r3, r3, lbl_803FD660@l
-/* 801D54B4 001D1114 48 00 02 41 */ bl func_801D56F4
+/* 801D54B4 001D1114 48 00 02 41 */ bl usr_puts_serial
lbl_801D54B8:
/* 801D54B8 001D1118 7F C3 F3 78 */ mr r3, r30
/* 801D54BC 001D111C BB 61 00 0C */ lmw r27, 0xc(r1)
@@ -12728,8 +12731,8 @@ lbl_801D54B8:
/* 801D54C8 001D1128 38 21 00 20 */ addi r1, r1, 0x20
/* 801D54CC 001D112C 4E 80 00 20 */ blr
-.global func_801D54D0
-func_801D54D0:
+.global TRKInitializeMessageBuffers
+TRKInitializeMessageBuffers:
/* 801D54D0 001D1130 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D54D4 001D1134 7C 08 02 A6 */ mflr r0
/* 801D54D8 001D1138 3C 60 80 49 */ lis r3, lbl_8048EE20@ha
@@ -12778,8 +12781,8 @@ func_801D554C:
/* 801D5568 001D11C8 90 04 00 0C */ stw r0, 0xc(r4)
/* 801D556C 001D11CC 4E 80 00 20 */ blr
-.global func_801D5570
-func_801D5570:
+.global TRKProcessInput
+TRKProcessInput:
/* 801D5570 001D11D0 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D5574 001D11D4 7C 08 02 A6 */ mflr r0
/* 801D5578 001D11D8 38 80 00 02 */ li r4, 2
@@ -12787,22 +12790,22 @@ func_801D5570:
/* 801D5580 001D11E0 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 801D5584 001D11E4 7C 7F 1B 78 */ mr r31, r3
/* 801D5588 001D11E8 38 61 00 08 */ addi r3, r1, 8
-/* 801D558C 001D11EC 4B FF F3 C9 */ bl func_801D4954
+/* 801D558C 001D11EC 4B FF F3 C9 */ bl TRKConstructEvent
/* 801D5590 001D11F0 3C 60 80 49 */ lis r3, lbl_804907D0@ha
/* 801D5594 001D11F4 38 00 FF FF */ li r0, -1
/* 801D5598 001D11F8 38 83 07 D0 */ addi r4, r3, lbl_804907D0@l
/* 801D559C 001D11FC 93 E1 00 10 */ stw r31, 0x10(r1)
/* 801D55A0 001D1200 38 61 00 08 */ addi r3, r1, 8
/* 801D55A4 001D1204 90 04 00 00 */ stw r0, 0(r4)
-/* 801D55A8 001D1208 4B FF F3 C5 */ bl func_801D496C
+/* 801D55A8 001D1208 4B FF F3 C5 */ bl TRKPostEvent
/* 801D55AC 001D120C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 801D55B0 001D1210 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 801D55B4 001D1214 7C 08 03 A6 */ mtlr r0
/* 801D55B8 001D1218 38 21 00 20 */ addi r1, r1, 0x20
/* 801D55BC 001D121C 4E 80 00 20 */ blr
-.global func_801D55C0
-func_801D55C0:
+.global TRKGetInput
+TRKGetInput:
/* 801D55C0 001D1220 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D55C4 001D1224 7C 08 02 A6 */ mflr r0
/* 801D55C8 001D1228 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12811,17 +12814,17 @@ func_801D55C0:
/* 801D55D4 001D1234 7C 7F 1B 78 */ mr r31, r3
/* 801D55D8 001D1238 2C 1F FF FF */ cmpwi r31, -1
/* 801D55DC 001D123C 41 82 00 30 */ beq lbl_801D560C
-/* 801D55E0 001D1240 4B FF FD FD */ bl func_801D53DC
+/* 801D55E0 001D1240 4B FF FD FD */ bl TRKGetBuffer
/* 801D55E4 001D1244 38 61 00 08 */ addi r3, r1, 8
/* 801D55E8 001D1248 38 80 00 02 */ li r4, 2
-/* 801D55EC 001D124C 4B FF F3 69 */ bl func_801D4954
+/* 801D55EC 001D124C 4B FF F3 69 */ bl TRKConstructEvent
/* 801D55F0 001D1250 3C 60 80 49 */ lis r3, lbl_804907D0@ha
/* 801D55F4 001D1254 38 00 FF FF */ li r0, -1
/* 801D55F8 001D1258 38 83 07 D0 */ addi r4, r3, lbl_804907D0@l
/* 801D55FC 001D125C 93 E1 00 10 */ stw r31, 0x10(r1)
/* 801D5600 001D1260 38 61 00 08 */ addi r3, r1, 8
/* 801D5604 001D1264 90 04 00 00 */ stw r0, 0(r4)
-/* 801D5608 001D1268 4B FF F3 65 */ bl func_801D496C
+/* 801D5608 001D1268 4B FF F3 65 */ bl TRKPostEvent
lbl_801D560C:
/* 801D560C 001D126C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 801D5610 001D1270 83 E1 00 1C */ lwz r31, 0x1c(r1)
@@ -12843,42 +12846,42 @@ func_801D5620:
lbl_801D5644:
/* 801D5644 001D12A4 38 61 00 0C */ addi r3, r1, 0xc
/* 801D5648 001D12A8 38 81 00 08 */ addi r4, r1, 8
-/* 801D564C 001D12AC 4B FF FD BD */ bl func_801D5408
+/* 801D564C 001D12AC 4B FF FD BD */ bl TRKGetFreeBuffer
/* 801D5650 001D12B0 7C 60 1B 78 */ mr r0, r3
/* 801D5654 001D12B4 80 61 00 08 */ lwz r3, 8(r1)
/* 801D5658 001D12B8 7C 1F 03 78 */ mr r31, r0
/* 801D565C 001D12BC 38 80 00 00 */ li r4, 0
-/* 801D5660 001D12C0 4B FF FC A9 */ bl func_801D5308
+/* 801D5660 001D12C0 4B FF FC A9 */ bl TRKSetBufferPosition
/* 801D5664 001D12C4 38 61 00 10 */ addi r3, r1, 0x10
/* 801D5668 001D12C8 38 80 00 40 */ li r4, 0x40
-/* 801D566C 001D12CC 48 00 3F DD */ bl func_801D9648
+/* 801D566C 001D12CC 48 00 3F DD */ bl TRKWriteUARTN
/* 801D5670 001D12D0 2C 03 00 00 */ cmpwi r3, 0
/* 801D5674 001D12D4 40 82 00 58 */ bne lbl_801D56CC
/* 801D5678 001D12D8 80 61 00 08 */ lwz r3, 8(r1)
/* 801D567C 001D12DC 38 81 00 10 */ addi r4, r1, 0x10
/* 801D5680 001D12E0 38 A0 00 40 */ li r5, 0x40
-/* 801D5684 001D12E4 4B FF F9 F1 */ bl func_801D5074
+/* 801D5684 001D12E4 4B FF F9 F1 */ bl TRKAppendBuffer_ui8
/* 801D5688 001D12E8 80 61 00 10 */ lwz r3, 0x10(r1)
/* 801D568C 001D12EC 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 801D5690 001D12F0 34 83 FF C0 */ addic. r4, r3, -64
/* 801D5694 001D12F4 40 81 00 44 */ ble lbl_801D56D8
/* 801D5698 001D12F8 38 61 00 50 */ addi r3, r1, 0x50
-/* 801D569C 001D12FC 48 00 3F AD */ bl func_801D9648
+/* 801D569C 001D12FC 48 00 3F AD */ bl TRKWriteUARTN
/* 801D56A0 001D1300 2C 03 00 00 */ cmpwi r3, 0
/* 801D56A4 001D1304 40 82 00 18 */ bne lbl_801D56BC
/* 801D56A8 001D1308 80 61 00 08 */ lwz r3, 8(r1)
/* 801D56AC 001D130C 38 81 00 50 */ addi r4, r1, 0x50
/* 801D56B0 001D1310 80 A1 00 10 */ lwz r5, 0x10(r1)
-/* 801D56B4 001D1314 4B FF F9 C1 */ bl func_801D5074
+/* 801D56B4 001D1314 4B FF F9 C1 */ bl TRKAppendBuffer_ui8
/* 801D56B8 001D1318 48 00 00 20 */ b lbl_801D56D8
lbl_801D56BC:
/* 801D56BC 001D131C 7F E3 FB 78 */ mr r3, r31
-/* 801D56C0 001D1320 4B FF FC B9 */ bl func_801D5378
+/* 801D56C0 001D1320 4B FF FC B9 */ bl TRKReleaseBuffer
/* 801D56C4 001D1324 3B E0 FF FF */ li r31, -1
/* 801D56C8 001D1328 48 00 00 10 */ b lbl_801D56D8
lbl_801D56CC:
/* 801D56CC 001D132C 7F E3 FB 78 */ mr r3, r31
-/* 801D56D0 001D1330 4B FF FC A9 */ bl func_801D5378
+/* 801D56D0 001D1330 4B FF FC A9 */ bl TRKReleaseBuffer
/* 801D56D4 001D1334 3B E0 FF FF */ li r31, -1
lbl_801D56D8:
/* 801D56D8 001D1338 7F E3 FB 78 */ mr r3, r31
@@ -12893,8 +12896,8 @@ lbl_801D56DC:
func_801D56F0:
/* 801D56F0 001D1350 4E 80 00 20 */ blr
-.global func_801D56F4
-func_801D56F4:
+.global usr_puts_serial
+usr_puts_serial:
/* 801D56F4 001D1354 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D56F8 001D1358 7C 08 02 A6 */ mflr r0
/* 801D56FC 001D135C 90 01 00 24 */ stw r0, 0x24(r1)
@@ -12911,11 +12914,11 @@ lbl_801D571C:
/* 801D5724 001D1384 7C 7E 1B 78 */ mr r30, r3
/* 801D5728 001D1388 38 60 00 00 */ li r3, 0
/* 801D572C 001D138C 9B E1 00 09 */ stb r31, 9(r1)
-/* 801D5730 001D1390 48 00 12 55 */ bl func_801D6984
+/* 801D5730 001D1390 48 00 12 55 */ bl SetTRKConnected
/* 801D5734 001D1394 38 61 00 08 */ addi r3, r1, 8
/* 801D5738 001D1398 4B E3 23 8D */ bl func_80007AC4
/* 801D573C 001D139C 7F C3 F3 78 */ mr r3, r30
-/* 801D5740 001D13A0 48 00 12 45 */ bl func_801D6984
+/* 801D5740 001D13A0 48 00 12 45 */ bl SetTRKConnected
/* 801D5744 001D13A4 38 60 00 00 */ li r3, 0
lbl_801D5748:
/* 801D5748 001D13A8 2C 03 00 00 */ cmpwi r3, 0
@@ -12943,7 +12946,7 @@ func_801D577C:
/* 801D5790 001D13F0 3B E0 05 00 */ li r31, 0x500
/* 801D5794 001D13F4 93 C1 00 08 */ stw r30, 8(r1)
/* 801D5798 001D13F8 7C 7E 1B 78 */ mr r30, r3
-/* 801D579C 001D13FC 4B FF FB 6D */ bl func_801D5308
+/* 801D579C 001D13FC 4B FF FB 6D */ bl TRKSetBufferPosition
/* 801D57A0 001D1400 88 1E 00 14 */ lbz r0, 0x14(r30)
/* 801D57A4 001D1404 28 00 00 1A */ cmplwi r0, 0x1a
/* 801D57A8 001D1408 41 81 00 F8 */ bgt lbl_801D58A0
@@ -13036,18 +13039,18 @@ func_801D58C4:
/* 801D58E8 001D1548 28 00 00 01 */ cmplwi r0, 1
/* 801D58EC 001D154C 40 82 00 30 */ bne lbl_801D591C
/* 801D58F0 001D1550 38 7F 00 00 */ addi r3, r31, 0
-/* 801D58F4 001D1554 4B FF FE 01 */ bl func_801D56F4
+/* 801D58F4 001D1554 4B FF FE 01 */ bl usr_puts_serial
/* 801D58F8 001D1558 28 1E 00 00 */ cmplwi r30, 0
/* 801D58FC 001D155C 41 82 00 10 */ beq lbl_801D590C
/* 801D5900 001D1560 38 7F 00 20 */ addi r3, r31, 0x20
-/* 801D5904 001D1564 4B FF FD F1 */ bl func_801D56F4
+/* 801D5904 001D1564 4B FF FD F1 */ bl usr_puts_serial
/* 801D5908 001D1568 48 00 00 0C */ b lbl_801D5914
lbl_801D590C:
/* 801D590C 001D156C 38 7F 00 28 */ addi r3, r31, 0x28
-/* 801D5910 001D1570 4B FF FD E5 */ bl func_801D56F4
+/* 801D5910 001D1570 4B FF FD E5 */ bl usr_puts_serial
lbl_801D5914:
/* 801D5914 001D1574 7F C3 F3 78 */ mr r3, r30
-/* 801D5918 001D1578 48 00 40 85 */ bl func_801D999C
+/* 801D5918 001D1578 48 00 40 85 */ bl SetUseSerialIO
lbl_801D591C:
/* 801D591C 001D157C 38 61 00 08 */ addi r3, r1, 8
/* 801D5920 001D1580 38 80 00 00 */ li r4, 0
@@ -13085,7 +13088,7 @@ func_801D5990:
/* 801D5994 001D15F4 7C 08 02 A6 */ mflr r0
/* 801D5998 001D15F8 90 01 00 54 */ stw r0, 0x54(r1)
/* 801D599C 001D15FC 93 E1 00 4C */ stw r31, 0x4c(r1)
-/* 801D59A0 001D1600 48 00 1C 5D */ bl func_801D75FC
+/* 801D59A0 001D1600 48 00 1C 5D */ bl TRKTargetStop
/* 801D59A4 001D1604 2C 03 07 04 */ cmpwi r3, 0x704
/* 801D59A8 001D1608 41 82 00 2C */ beq lbl_801D59D4
/* 801D59AC 001D160C 40 80 00 10 */ bge lbl_801D59BC
@@ -13148,7 +13151,7 @@ func_801D5A5C:
/* 801D5A68 001D16C8 90 01 01 64 */ stw r0, 0x164(r1)
/* 801D5A6C 001D16CC BF 61 01 4C */ stmw r27, 0x14c(r1)
/* 801D5A70 001D16D0 7C 7B 1B 78 */ mr r27, r3
-/* 801D5A74 001D16D4 4B FF F8 95 */ bl func_801D5308
+/* 801D5A74 001D16D4 4B FF F8 95 */ bl TRKSetBufferPosition
/* 801D5A78 001D16D8 8B FB 00 18 */ lbz r31, 0x18(r27)
/* 801D5A7C 001D16DC 83 BB 00 20 */ lwz r29, 0x20(r27)
/* 801D5A80 001D16E0 2C 1F 00 10 */ cmpwi r31, 0x10
@@ -13390,7 +13393,7 @@ lbl_801D5DA8:
/* 801D5DF4 001D1A54 90 09 00 00 */ stw r0, 0(r9)
/* 801D5DF8 001D1A58 90 E1 00 14 */ stw r7, 0x14(r1)
/* 801D5DFC 001D1A5C 48 00 38 11 */ bl func_801D960C
-/* 801D5E00 001D1A60 48 00 3B 59 */ bl func_801D9958
+/* 801D5E00 001D1A60 48 00 3B 59 */ bl TRKTargetContinue
lbl_801D5E04:
/* 801D5E04 001D1A64 80 01 00 94 */ lwz r0, 0x94(r1)
/* 801D5E08 001D1A68 7C 08 03 A6 */ mtlr r0
@@ -13411,7 +13414,7 @@ func_801D5E14:
/* 801D5E38 001D1A98 8B E3 00 18 */ lbz r31, 0x18(r3)
/* 801D5E3C 001D1A9C A3 C3 00 1C */ lhz r30, 0x1c(r3)
/* 801D5E40 001D1AA0 A3 A3 00 20 */ lhz r29, 0x20(r3)
-/* 801D5E44 001D1AA4 4B FF F4 C5 */ bl func_801D5308
+/* 801D5E44 001D1AA4 4B FF F4 C5 */ bl TRKSetBufferPosition
/* 801D5E48 001D1AA8 7C 1E E8 40 */ cmplw r30, r29
/* 801D5E4C 001D1AAC 40 81 00 64 */ ble lbl_801D5EB0
/* 801D5E50 001D1AB0 38 61 00 4C */ addi r3, r1, 0x4c
@@ -13441,7 +13444,7 @@ func_801D5E14:
lbl_801D5EB0:
/* 801D5EB0 001D1B10 7F 83 E3 78 */ mr r3, r28
/* 801D5EB4 001D1B14 38 80 00 40 */ li r4, 0x40
-/* 801D5EB8 001D1B18 4B FF F4 51 */ bl func_801D5308
+/* 801D5EB8 001D1B18 4B FF F4 51 */ bl TRKSetBufferPosition
/* 801D5EBC 001D1B1C 2C 1F 00 02 */ cmpwi r31, 2
/* 801D5EC0 001D1B20 41 82 00 64 */ beq lbl_801D5F24
/* 801D5EC4 001D1B24 40 80 00 14 */ bge lbl_801D5ED8
@@ -13459,7 +13462,7 @@ lbl_801D5EE4:
/* 801D5EEC 001D1B4C 7F 85 E3 78 */ mr r5, r28
/* 801D5EF0 001D1B50 38 C1 00 08 */ addi r6, r1, 8
/* 801D5EF4 001D1B54 38 E0 00 00 */ li r7, 0
-/* 801D5EF8 001D1B58 48 00 28 01 */ bl func_801D86F8
+/* 801D5EF8 001D1B58 48 00 28 01 */ bl TRKTargetAccessDefault
/* 801D5EFC 001D1B5C 7C 7F 1B 78 */ mr r31, r3
/* 801D5F00 001D1B60 48 00 00 68 */ b lbl_801D5F68
lbl_801D5F04:
@@ -13468,7 +13471,7 @@ lbl_801D5F04:
/* 801D5F0C 001D1B6C 7F 85 E3 78 */ mr r5, r28
/* 801D5F10 001D1B70 38 C1 00 08 */ addi r6, r1, 8
/* 801D5F14 001D1B74 38 E0 00 00 */ li r7, 0
-/* 801D5F18 001D1B78 48 00 22 D5 */ bl func_801D81EC
+/* 801D5F18 001D1B78 48 00 22 D5 */ bl TRKTargetAccessFP
/* 801D5F1C 001D1B7C 7C 7F 1B 78 */ mr r31, r3
/* 801D5F20 001D1B80 48 00 00 48 */ b lbl_801D5F68
lbl_801D5F24:
@@ -13477,7 +13480,7 @@ lbl_801D5F24:
/* 801D5F2C 001D1B8C 7F 85 E3 78 */ mr r5, r28
/* 801D5F30 001D1B90 38 C1 00 08 */ addi r6, r1, 8
/* 801D5F34 001D1B94 38 E0 00 00 */ li r7, 0
-/* 801D5F38 001D1B98 48 00 21 45 */ bl func_801D807C
+/* 801D5F38 001D1B98 48 00 21 45 */ bl TRKTargetAccessExtended1
/* 801D5F3C 001D1B9C 7C 7F 1B 78 */ mr r31, r3
/* 801D5F40 001D1BA0 48 00 00 28 */ b lbl_801D5F68
lbl_801D5F44:
@@ -13486,7 +13489,7 @@ lbl_801D5F44:
/* 801D5F4C 001D1BAC 7F 85 E3 78 */ mr r5, r28
/* 801D5F50 001D1BB0 38 C1 00 08 */ addi r6, r1, 8
/* 801D5F54 001D1BB4 38 E0 00 00 */ li r7, 0
-/* 801D5F58 001D1BB8 48 00 1C ED */ bl func_801D7C44
+/* 801D5F58 001D1BB8 48 00 1C ED */ bl TRKTargetAccessExtended2
/* 801D5F5C 001D1BBC 7C 7F 1B 78 */ mr r31, r3
/* 801D5F60 001D1BC0 48 00 00 08 */ b lbl_801D5F68
lbl_801D5F64:
@@ -13494,7 +13497,7 @@ lbl_801D5F64:
lbl_801D5F68:
/* 801D5F68 001D1BC8 7F 83 E3 78 */ mr r3, r28
/* 801D5F6C 001D1BCC 38 80 00 00 */ li r4, 0
-/* 801D5F70 001D1BD0 4B FF F3 C9 */ bl func_801D5338
+/* 801D5F70 001D1BD0 4B FF F3 C9 */ bl TRKResetBuffer
/* 801D5F74 001D1BD4 2C 1F 00 00 */ cmpwi r31, 0
/* 801D5F78 001D1BD8 40 82 00 54 */ bne lbl_801D5FCC
/* 801D5F7C 001D1BDC 38 61 00 8C */ addi r3, r1, 0x8c
@@ -13515,7 +13518,7 @@ lbl_801D5F68:
/* 801D5FB8 001D1C18 9B E1 00 94 */ stb r31, 0x94(r1)
/* 801D5FBC 001D1C1C 90 07 00 00 */ stw r0, 0(r7)
/* 801D5FC0 001D1C20 90 C1 00 98 */ stw r6, 0x98(r1)
-/* 801D5FC4 001D1C24 4B FF F2 A1 */ bl func_801D5264
+/* 801D5FC4 001D1C24 4B FF F2 A1 */ bl TRKAppendBuffer
/* 801D5FC8 001D1C28 7C 7F 1B 78 */ mr r31, r3
lbl_801D5FCC:
/* 801D5FCC 001D1C2C 2C 1F 00 00 */ cmpwi r31, 0
@@ -13643,17 +13646,17 @@ lbl_801D6154:
/* 801D6174 001D1DD4 90 E1 00 8C */ stw r7, 0x8c(r1)
/* 801D6178 001D1DD8 90 06 00 00 */ stw r0, 0(r6)
/* 801D617C 001D1DDC 90 A1 00 98 */ stw r5, 0x98(r1)
-/* 801D6180 001D1DE0 4B FF F1 B9 */ bl func_801D5338
+/* 801D6180 001D1DE0 4B FF F1 B9 */ bl TRKResetBuffer
/* 801D6184 001D1DE4 7F E3 FB 78 */ mr r3, r31
/* 801D6188 001D1DE8 38 81 00 8C */ addi r4, r1, 0x8c
/* 801D618C 001D1DEC 38 A0 00 40 */ li r5, 0x40
-/* 801D6190 001D1DF0 4B FF EE E5 */ bl func_801D5074
+/* 801D6190 001D1DF0 4B FF EE E5 */ bl TRKAppendBuffer_ui8
/* 801D6194 001D1DF4 7F E5 FB 78 */ mr r5, r31
/* 801D6198 001D1DF8 38 C1 00 08 */ addi r6, r1, 8
/* 801D619C 001D1DFC 38 60 00 00 */ li r3, 0
/* 801D61A0 001D1E00 38 80 00 24 */ li r4, 0x24
/* 801D61A4 001D1E04 38 E0 00 01 */ li r7, 1
-/* 801D61A8 001D1E08 48 00 25 51 */ bl func_801D86F8
+/* 801D61A8 001D1E08 48 00 25 51 */ bl TRKTargetAccessDefault
/* 801D61AC 001D1E0C 2C 03 00 00 */ cmpwi r3, 0
/* 801D61B0 001D1E10 40 82 00 1C */ bne lbl_801D61CC
/* 801D61B4 001D1E14 7F E5 FB 78 */ mr r5, r31
@@ -13661,7 +13664,7 @@ lbl_801D6154:
/* 801D61BC 001D1E1C 38 60 00 00 */ li r3, 0
/* 801D61C0 001D1E20 38 80 00 21 */ li r4, 0x21
/* 801D61C4 001D1E24 38 E0 00 01 */ li r7, 1
-/* 801D61C8 001D1E28 48 00 20 25 */ bl func_801D81EC
+/* 801D61C8 001D1E28 48 00 20 25 */ bl TRKTargetAccessFP
lbl_801D61CC:
/* 801D61CC 001D1E2C 2C 03 00 00 */ cmpwi r3, 0
/* 801D61D0 001D1E30 40 82 00 1C */ bne lbl_801D61EC
@@ -13670,7 +13673,7 @@ lbl_801D61CC:
/* 801D61DC 001D1E3C 38 60 00 00 */ li r3, 0
/* 801D61E0 001D1E40 38 80 00 60 */ li r4, 0x60
/* 801D61E4 001D1E44 38 E0 00 01 */ li r7, 1
-/* 801D61E8 001D1E48 48 00 1E 95 */ bl func_801D807C
+/* 801D61E8 001D1E48 48 00 1E 95 */ bl TRKTargetAccessExtended1
lbl_801D61EC:
/* 801D61EC 001D1E4C 2C 03 00 00 */ cmpwi r3, 0
/* 801D61F0 001D1E50 40 82 00 1C */ bne lbl_801D620C
@@ -13679,7 +13682,7 @@ lbl_801D61EC:
/* 801D61FC 001D1E5C 38 60 00 00 */ li r3, 0
/* 801D6200 001D1E60 38 80 00 1F */ li r4, 0x1f
/* 801D6204 001D1E64 38 E0 00 01 */ li r7, 1
-/* 801D6208 001D1E68 48 00 1A 3D */ bl func_801D7C44
+/* 801D6208 001D1E68 48 00 1A 3D */ bl TRKTargetAccessExtended2
lbl_801D620C:
/* 801D620C 001D1E6C 2C 03 00 00 */ cmpwi r3, 0
/* 801D6210 001D1E70 41 82 00 C8 */ beq lbl_801D62D8
@@ -13795,23 +13798,23 @@ func_801D62F4:
lbl_801D6390:
/* 801D6390 001D1FF0 90 81 00 20 */ stw r4, 0x20(r1)
/* 801D6394 001D1FF4 38 80 00 40 */ li r4, 0x40
-/* 801D6398 001D1FF8 4B FF EF 71 */ bl func_801D5308
+/* 801D6398 001D1FF8 4B FF EF 71 */ bl TRKSetBufferPosition
/* 801D639C 001D1FFC 80 A1 00 20 */ lwz r5, 0x20(r1)
/* 801D63A0 001D2000 7F A3 EB 78 */ mr r3, r29
/* 801D63A4 001D2004 38 81 01 00 */ addi r4, r1, 0x100
-/* 801D63A8 001D2008 4B FF EE 31 */ bl func_801D51D8
+/* 801D63A8 001D2008 4B FF EE 31 */ bl TRKReadBuffer
/* 801D63AC 001D200C 57 E0 EF FE */ rlwinm r0, r31, 0x1d, 0x1f, 0x1f
/* 801D63B0 001D2010 7F C4 F3 78 */ mr r4, r30
/* 801D63B4 001D2014 38 61 01 00 */ addi r3, r1, 0x100
/* 801D63B8 001D2018 38 A1 00 20 */ addi r5, r1, 0x20
/* 801D63BC 001D201C 68 06 00 01 */ xori r6, r0, 1
/* 801D63C0 001D2020 38 E0 00 00 */ li r7, 0
-/* 801D63C4 001D2024 48 00 24 75 */ bl func_801D8838
+/* 801D63C4 001D2024 48 00 24 75 */ bl TRKTargetAccessMemory
/* 801D63C8 001D2028 7C 60 1B 78 */ mr r0, r3
/* 801D63CC 001D202C 7F A3 EB 78 */ mr r3, r29
/* 801D63D0 001D2030 7C 1F 03 78 */ mr r31, r0
/* 801D63D4 001D2034 38 80 00 00 */ li r4, 0
-/* 801D63D8 001D2038 4B FF EF 61 */ bl func_801D5338
+/* 801D63D8 001D2038 4B FF EF 61 */ bl TRKResetBuffer
/* 801D63DC 001D203C 2C 1F 00 00 */ cmpwi r31, 0
/* 801D63E0 001D2040 40 82 00 54 */ bne lbl_801D6434
/* 801D63E4 001D2044 38 61 00 A4 */ addi r3, r1, 0xa4
@@ -13832,7 +13835,7 @@ lbl_801D6390:
/* 801D6420 001D2080 9B E1 00 AC */ stb r31, 0xac(r1)
/* 801D6424 001D2084 90 07 00 00 */ stw r0, 0(r7)
/* 801D6428 001D2088 90 C1 00 B0 */ stw r6, 0xb0(r1)
-/* 801D642C 001D208C 4B FF EE 39 */ bl func_801D5264
+/* 801D642C 001D208C 4B FF EE 39 */ bl TRKAppendBuffer
/* 801D6430 001D2090 7C 7F 1B 78 */ mr r31, r3
lbl_801D6434:
/* 801D6434 001D2094 2C 1F 00 00 */ cmpwi r31, 0
@@ -13945,12 +13948,12 @@ lbl_801D65B0:
/* 801D65C0 001D2220 38 A1 00 20 */ addi r5, r1, 0x20
/* 801D65C4 001D2224 68 06 00 01 */ xori r6, r0, 1
/* 801D65C8 001D2228 38 E0 00 01 */ li r7, 1
-/* 801D65CC 001D222C 48 00 22 6D */ bl func_801D8838
+/* 801D65CC 001D222C 48 00 22 6D */ bl TRKTargetAccessMemory
/* 801D65D0 001D2230 7C 60 1B 78 */ mr r0, r3
/* 801D65D4 001D2234 7F E3 FB 78 */ mr r3, r31
/* 801D65D8 001D2238 7C 1D 03 78 */ mr r29, r0
/* 801D65DC 001D223C 38 80 00 00 */ li r4, 0
-/* 801D65E0 001D2240 4B FF ED 59 */ bl func_801D5338
+/* 801D65E0 001D2240 4B FF ED 59 */ bl TRKResetBuffer
/* 801D65E4 001D2244 2C 1D 00 00 */ cmpwi r29, 0
/* 801D65E8 001D2248 40 82 00 90 */ bne lbl_801D6678
/* 801D65EC 001D224C 38 61 00 A4 */ addi r3, r1, 0xa4
@@ -13972,7 +13975,7 @@ lbl_801D65B0:
/* 801D662C 001D228C 99 01 00 A8 */ stb r8, 0xa8(r1)
/* 801D6630 001D2290 90 07 00 00 */ stw r0, 0(r7)
/* 801D6634 001D2294 90 C1 00 B0 */ stw r6, 0xb0(r1)
-/* 801D6638 001D2298 4B FF EC 2D */ bl func_801D5264
+/* 801D6638 001D2298 4B FF EC 2D */ bl TRKAppendBuffer
/* 801D663C 001D229C 57 C0 06 73 */ rlwinm. r0, r30, 0, 0x19, 0x19
/* 801D6640 001D22A0 41 82 00 24 */ beq lbl_801D6664
/* 801D6644 001D22A4 57 80 06 FE */ clrlwi r0, r28, 0x1b
@@ -13980,14 +13983,14 @@ lbl_801D65B0:
/* 801D664C 001D22AC 80 A1 00 20 */ lwz r5, 0x20(r1)
/* 801D6650 001D22B0 7F E3 FB 78 */ mr r3, r31
/* 801D6654 001D22B4 7C 84 02 14 */ add r4, r4, r0
-/* 801D6658 001D22B8 4B FF EC 0D */ bl func_801D5264
+/* 801D6658 001D22B8 4B FF EC 0D */ bl TRKAppendBuffer
/* 801D665C 001D22BC 7C 7D 1B 78 */ mr r29, r3
/* 801D6660 001D22C0 48 00 00 18 */ b lbl_801D6678
lbl_801D6664:
/* 801D6664 001D22C4 80 A1 00 20 */ lwz r5, 0x20(r1)
/* 801D6668 001D22C8 7F E3 FB 78 */ mr r3, r31
/* 801D666C 001D22CC 38 81 01 00 */ addi r4, r1, 0x100
-/* 801D6670 001D22D0 4B FF EB F5 */ bl func_801D5264
+/* 801D6670 001D22D0 4B FF EB F5 */ bl TRKAppendBuffer
/* 801D6674 001D22D4 7C 7D 1B 78 */ mr r29, r3
lbl_801D6678:
/* 801D6678 001D22D8 2C 1D 00 00 */ cmpwi r29, 0
@@ -14088,7 +14091,7 @@ func_801D6768:
/* 801D67C0 001D2420 90 09 00 00 */ stw r0, 0(r9)
/* 801D67C4 001D2424 90 E1 00 14 */ stw r7, 0x14(r1)
/* 801D67C8 001D2428 48 00 2E 45 */ bl func_801D960C
-/* 801D67CC 001D242C 48 00 2A E5 */ bl func_801D92B0
+/* 801D67CC 001D242C 48 00 2A E5 */ bl __TRK_copy_vectors
/* 801D67D0 001D2430 80 01 00 54 */ lwz r0, 0x54(r1)
/* 801D67D4 001D2434 38 60 00 00 */ li r3, 0
/* 801D67D8 001D2438 7C 08 03 A6 */ mtlr r0
@@ -14162,9 +14165,9 @@ func_801D6860:
/* 801D68D0 001D2530 48 00 2D 3D */ bl func_801D960C
/* 801D68D4 001D2534 38 61 00 08 */ addi r3, r1, 8
/* 801D68D8 001D2538 38 80 00 01 */ li r4, 1
-/* 801D68DC 001D253C 4B FF E0 79 */ bl func_801D4954
+/* 801D68DC 001D253C 4B FF E0 79 */ bl TRKConstructEvent
/* 801D68E0 001D2540 38 61 00 08 */ addi r3, r1, 8
-/* 801D68E4 001D2544 4B FF E0 89 */ bl func_801D496C
+/* 801D68E4 001D2544 4B FF E0 89 */ bl TRKPostEvent
/* 801D68E8 001D2548 80 01 00 64 */ lwz r0, 0x64(r1)
/* 801D68EC 001D254C 38 60 00 00 */ li r3, 0
/* 801D68F0 001D2550 7C 08 03 A6 */ mtlr r0
@@ -14208,8 +14211,8 @@ func_801D68FC:
/* 801D697C 001D25DC 38 21 00 50 */ addi r1, r1, 0x50
/* 801D6980 001D25E0 4E 80 00 20 */ blr
-.global func_801D6984
-func_801D6984:
+.global SetTRKConnected
+SetTRKConnected:
/* 801D6984 001D25E4 3C 80 80 49 */ lis r4, lbl_804907EC@ha
/* 801D6988 001D25E8 90 64 07 EC */ stw r3, lbl_804907EC@l(r4)
/* 801D698C 001D25EC 4E 80 00 20 */ blr
@@ -14221,8 +14224,8 @@ func_801D6990:
/* 801D6998 001D25F8 80 63 00 00 */ lwz r3, 0(r3)
/* 801D699C 001D25FC 4E 80 00 20 */ blr
-.global func_801D69A0
-func_801D69A0:
+.global HandlePositionFileSupportRequest
+HandlePositionFileSupportRequest:
/* 801D69A0 001D2600 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 801D69A4 001D2604 7C 08 02 A6 */ mflr r0
/* 801D69A8 001D2608 90 01 00 74 */ stw r0, 0x74(r1)
@@ -14248,13 +14251,13 @@ func_801D69A0:
/* 801D69F8 001D2658 80 1D 00 00 */ lwz r0, 0(r29)
/* 801D69FC 001D265C 90 01 00 20 */ stw r0, 0x20(r1)
/* 801D6A00 001D2660 9B E1 00 24 */ stb r31, 0x24(r1)
-/* 801D6A04 001D2664 4B FF EA 05 */ bl func_801D5408
+/* 801D6A04 001D2664 4B FF EA 05 */ bl TRKGetFreeBuffer
/* 801D6A08 001D2668 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6A0C 001D266C 40 82 00 18 */ bne lbl_801D6A24
/* 801D6A10 001D2670 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6A14 001D2674 38 81 00 14 */ addi r4, r1, 0x14
/* 801D6A18 001D2678 38 A0 00 40 */ li r5, 0x40
-/* 801D6A1C 001D267C 4B FF E6 59 */ bl func_801D5074
+/* 801D6A1C 001D267C 4B FF E6 59 */ bl TRKAppendBuffer_ui8
/* 801D6A20 001D2680 7C 7F 1B 78 */ mr r31, r3
lbl_801D6A24:
/* 801D6A24 001D2684 2C 1F 00 00 */ cmpwi r31, 0
@@ -14272,7 +14275,7 @@ lbl_801D6A24:
/* 801D6A54 001D26B4 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6A58 001D26B8 40 82 00 24 */ bne lbl_801D6A7C
/* 801D6A5C 001D26BC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6A60 001D26C0 4B FF E9 7D */ bl func_801D53DC
+/* 801D6A60 001D26C0 4B FF E9 7D */ bl TRKGetBuffer
/* 801D6A64 001D26C4 28 03 00 00 */ cmplwi r3, 0
/* 801D6A68 001D26C8 41 82 00 14 */ beq lbl_801D6A7C
/* 801D6A6C 001D26CC 80 03 00 20 */ lwz r0, 0x20(r3)
@@ -14281,10 +14284,10 @@ lbl_801D6A24:
/* 801D6A78 001D26D8 90 1D 00 00 */ stw r0, 0(r29)
lbl_801D6A7C:
/* 801D6A7C 001D26DC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6A80 001D26E0 4B FF E8 F9 */ bl func_801D5378
+/* 801D6A80 001D26E0 4B FF E8 F9 */ bl TRKReleaseBuffer
lbl_801D6A84:
/* 801D6A84 001D26E4 80 61 00 0C */ lwz r3, 0xc(r1)
-/* 801D6A88 001D26E8 4B FF E8 F1 */ bl func_801D5378
+/* 801D6A88 001D26E8 4B FF E8 F1 */ bl TRKReleaseBuffer
/* 801D6A8C 001D26EC 80 01 00 74 */ lwz r0, 0x74(r1)
/* 801D6A90 001D26F0 7F E3 FB 78 */ mr r3, r31
/* 801D6A94 001D26F4 83 E1 00 6C */ lwz r31, 0x6c(r1)
@@ -14295,8 +14298,8 @@ lbl_801D6A84:
/* 801D6AA8 001D2708 38 21 00 70 */ addi r1, r1, 0x70
/* 801D6AAC 001D270C 4E 80 00 20 */ blr
-.global func_801D6AB0
-func_801D6AB0:
+.global HandleCloseFileSupportRequest
+HandleCloseFileSupportRequest:
/* 801D6AB0 001D2710 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 801D6AB4 001D2714 7C 08 02 A6 */ mflr r0
/* 801D6AB8 001D2718 38 A0 00 40 */ li r5, 0x40
@@ -14316,13 +14319,13 @@ func_801D6AB0:
/* 801D6AF0 001D2750 38 81 00 08 */ addi r4, r1, 8
/* 801D6AF4 001D2754 90 01 00 14 */ stw r0, 0x14(r1)
/* 801D6AF8 001D2758 93 E1 00 1C */ stw r31, 0x1c(r1)
-/* 801D6AFC 001D275C 4B FF E9 0D */ bl func_801D5408
+/* 801D6AFC 001D275C 4B FF E9 0D */ bl TRKGetFreeBuffer
/* 801D6B00 001D2760 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6B04 001D2764 40 82 00 18 */ bne lbl_801D6B1C
/* 801D6B08 001D2768 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6B0C 001D276C 38 81 00 14 */ addi r4, r1, 0x14
/* 801D6B10 001D2770 38 A0 00 40 */ li r5, 0x40
-/* 801D6B14 001D2774 4B FF E5 61 */ bl func_801D5074
+/* 801D6B14 001D2774 4B FF E5 61 */ bl TRKAppendBuffer_ui8
/* 801D6B18 001D2778 7C 7F 1B 78 */ mr r31, r3
lbl_801D6B1C:
/* 801D6B1C 001D277C 2C 1F 00 00 */ cmpwi r31, 0
@@ -14338,7 +14341,7 @@ lbl_801D6B1C:
/* 801D6B44 001D27A4 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6B48 001D27A8 40 82 00 10 */ bne lbl_801D6B58
/* 801D6B4C 001D27AC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6B50 001D27B0 4B FF E8 8D */ bl func_801D53DC
+/* 801D6B50 001D27B0 4B FF E8 8D */ bl TRKGetBuffer
/* 801D6B54 001D27B4 7C 7E 1B 78 */ mr r30, r3
lbl_801D6B58:
/* 801D6B58 001D27B8 2C 1F 00 00 */ cmpwi r31, 0
@@ -14347,10 +14350,10 @@ lbl_801D6B58:
/* 801D6B64 001D27C4 90 1D 00 00 */ stw r0, 0(r29)
lbl_801D6B68:
/* 801D6B68 001D27C8 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6B6C 001D27CC 4B FF E8 0D */ bl func_801D5378
+/* 801D6B6C 001D27CC 4B FF E8 0D */ bl TRKReleaseBuffer
lbl_801D6B70:
/* 801D6B70 001D27D0 80 61 00 0C */ lwz r3, 0xc(r1)
-/* 801D6B74 001D27D4 4B FF E8 05 */ bl func_801D5378
+/* 801D6B74 001D27D4 4B FF E8 05 */ bl TRKReleaseBuffer
/* 801D6B78 001D27D8 80 01 00 74 */ lwz r0, 0x74(r1)
/* 801D6B7C 001D27DC 7F E3 FB 78 */ mr r3, r31
/* 801D6B80 001D27E0 83 E1 00 6C */ lwz r31, 0x6c(r1)
@@ -14360,8 +14363,8 @@ lbl_801D6B70:
/* 801D6B90 001D27F0 38 21 00 70 */ addi r1, r1, 0x70
/* 801D6B94 001D27F4 4E 80 00 20 */ blr
-.global func_801D6B98
-func_801D6B98:
+.global HandleOpenFileSupportRequest
+HandleOpenFileSupportRequest:
/* 801D6B98 001D27F8 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 801D6B9C 001D27FC 7C 08 02 A6 */ mflr r0
/* 801D6BA0 001D2800 90 01 00 74 */ stw r0, 0x74(r1)
@@ -14379,30 +14382,30 @@ func_801D6B98:
/* 801D6BD0 001D2830 90 7C 00 00 */ stw r3, 0(r28)
/* 801D6BD4 001D2834 7F 63 DB 78 */ mr r3, r27
/* 801D6BD8 001D2838 98 01 00 18 */ stb r0, 0x18(r1)
-/* 801D6BDC 001D283C 48 00 06 19 */ bl func_801D71F4
+/* 801D6BDC 001D283C 48 00 06 19 */ bl strlen
/* 801D6BE0 001D2840 38 03 00 41 */ addi r0, r3, 0x41
/* 801D6BE4 001D2844 9B E1 00 1C */ stb r31, 0x1c(r1)
/* 801D6BE8 001D2848 7F 63 DB 78 */ mr r3, r27
/* 801D6BEC 001D284C 90 01 00 14 */ stw r0, 0x14(r1)
-/* 801D6BF0 001D2850 48 00 06 05 */ bl func_801D71F4
+/* 801D6BF0 001D2850 48 00 06 05 */ bl strlen
/* 801D6BF4 001D2854 38 03 00 01 */ addi r0, r3, 1
/* 801D6BF8 001D2858 38 61 00 0C */ addi r3, r1, 0xc
/* 801D6BFC 001D285C B0 01 00 20 */ sth r0, 0x20(r1)
/* 801D6C00 001D2860 38 81 00 08 */ addi r4, r1, 8
-/* 801D6C04 001D2864 4B FF E8 05 */ bl func_801D5408
+/* 801D6C04 001D2864 4B FF E8 05 */ bl TRKGetFreeBuffer
/* 801D6C08 001D2868 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6C0C 001D286C 38 81 00 14 */ addi r4, r1, 0x14
/* 801D6C10 001D2870 38 A0 00 40 */ li r5, 0x40
-/* 801D6C14 001D2874 4B FF E4 61 */ bl func_801D5074
+/* 801D6C14 001D2874 4B FF E4 61 */ bl TRKAppendBuffer_ui8
/* 801D6C18 001D2878 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6C1C 001D287C 40 82 00 24 */ bne lbl_801D6C40
/* 801D6C20 001D2880 7F 63 DB 78 */ mr r3, r27
-/* 801D6C24 001D2884 48 00 05 D1 */ bl func_801D71F4
+/* 801D6C24 001D2884 48 00 05 D1 */ bl strlen
/* 801D6C28 001D2888 7C 65 1B 78 */ mr r5, r3
/* 801D6C2C 001D288C 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6C30 001D2890 7F 64 DB 78 */ mr r4, r27
/* 801D6C34 001D2894 38 A5 00 01 */ addi r5, r5, 1
-/* 801D6C38 001D2898 4B FF E4 3D */ bl func_801D5074
+/* 801D6C38 001D2898 4B FF E4 3D */ bl TRKAppendBuffer_ui8
/* 801D6C3C 001D289C 7C 7F 1B 78 */ mr r31, r3
lbl_801D6C40:
/* 801D6C40 001D28A0 2C 1F 00 00 */ cmpwi r31, 0
@@ -14418,7 +14421,7 @@ lbl_801D6C40:
/* 801D6C68 001D28C8 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D6C6C 001D28CC 40 82 00 10 */ bne lbl_801D6C7C
/* 801D6C70 001D28D0 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6C74 001D28D4 4B FF E7 69 */ bl func_801D53DC
+/* 801D6C74 001D28D4 4B FF E7 69 */ bl TRKGetBuffer
/* 801D6C78 001D28D8 7C 7E 1B 78 */ mr r30, r3
lbl_801D6C7C:
/* 801D6C7C 001D28DC 80 1E 00 20 */ lwz r0, 0x20(r30)
@@ -14426,10 +14429,10 @@ lbl_801D6C7C:
/* 801D6C84 001D28E4 80 1E 00 18 */ lwz r0, 0x18(r30)
/* 801D6C88 001D28E8 90 1C 00 00 */ stw r0, 0(r28)
/* 801D6C8C 001D28EC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6C90 001D28F0 4B FF E6 E9 */ bl func_801D5378
+/* 801D6C90 001D28F0 4B FF E6 E9 */ bl TRKReleaseBuffer
lbl_801D6C94:
/* 801D6C94 001D28F4 80 61 00 0C */ lwz r3, 0xc(r1)
-/* 801D6C98 001D28F8 4B FF E6 E1 */ bl func_801D5378
+/* 801D6C98 001D28F8 4B FF E6 E1 */ bl TRKReleaseBuffer
/* 801D6C9C 001D28FC 7F E3 FB 78 */ mr r3, r31
/* 801D6CA0 001D2900 BB 61 00 5C */ lmw r27, 0x5c(r1)
/* 801D6CA4 001D2904 80 01 00 74 */ lwz r0, 0x74(r1)
@@ -14477,10 +14480,10 @@ lbl_801D6D34:
/* 801D6D34 001D2994 2C 03 FF FF */ cmpwi r3, -1
/* 801D6D38 001D2998 41 82 00 44 */ beq lbl_801D6D7C
/* 801D6D3C 001D299C 3B 20 00 00 */ li r25, 0
-/* 801D6D40 001D29A0 4B FF E6 9D */ bl func_801D53DC
+/* 801D6D40 001D29A0 4B FF E6 9D */ bl TRKGetBuffer
/* 801D6D44 001D29A4 38 80 00 00 */ li r4, 0
/* 801D6D48 001D29A8 7C 7E 1B 78 */ mr r30, r3
-/* 801D6D4C 001D29AC 4B FF E5 BD */ bl func_801D5308
+/* 801D6D4C 001D29AC 4B FF E5 BD */ bl TRKSetBufferPosition
/* 801D6D50 001D29B0 80 9E 00 08 */ lwz r4, 8(r30)
/* 801D6D54 001D29B4 38 7E 00 10 */ addi r3, r30, 0x10
/* 801D6D58 001D29B8 48 00 2F 0D */ bl func_801D9C64
@@ -14488,7 +14491,7 @@ lbl_801D6D34:
/* 801D6D60 001D29C0 28 1B 00 80 */ cmplwi r27, 0x80
/* 801D6D64 001D29C4 40 80 00 18 */ bge lbl_801D6D7C
/* 801D6D68 001D29C8 80 77 00 00 */ lwz r3, 0(r23)
-/* 801D6D6C 001D29CC 4B FF E8 05 */ bl func_801D5570
+/* 801D6D6C 001D29CC 4B FF E8 05 */ bl TRKProcessInput
/* 801D6D70 001D29D0 38 00 FF FF */ li r0, -1
/* 801D6D74 001D29D4 90 17 00 00 */ stw r0, 0(r23)
/* 801D6D78 001D29D8 4B FF FF 8C */ b lbl_801D6D04
@@ -14523,7 +14526,7 @@ lbl_801D6DD0:
/* 801D6DD8 001D2A38 2C 19 00 00 */ cmpwi r25, 0
/* 801D6DDC 001D2A3C 41 82 00 10 */ beq lbl_801D6DEC
lbl_801D6DE0:
-/* 801D6DE0 001D2A40 4B FF E5 99 */ bl func_801D5378
+/* 801D6DE0 001D2A40 4B FF E5 99 */ bl TRKReleaseBuffer
/* 801D6DE4 001D2A44 38 00 FF FF */ li r0, -1
/* 801D6DE8 001D2A48 90 17 00 00 */ stw r0, 0(r23)
lbl_801D6DEC:
@@ -14549,8 +14552,8 @@ lbl_801D6E1C:
/* 801D6E2C 001D2A8C 38 21 00 30 */ addi r1, r1, 0x30
/* 801D6E30 001D2A90 4E 80 00 20 */ blr
-.global func_801D6E34
-func_801D6E34:
+.global TRKSuppAccessFile
+TRKSuppAccessFile:
/* 801D6E34 001D2A94 94 21 FF 70 */ stwu r1, -0x90(r1)
/* 801D6E38 001D2A98 7C 08 02 A6 */ mflr r0
/* 801D6E3C 001D2A9C 90 01 00 94 */ stw r0, 0x94(r1)
@@ -14604,11 +14607,11 @@ lbl_801D6EDC:
/* 801D6EE4 001D2B44 38 81 00 08 */ addi r4, r1, 8
/* 801D6EE8 001D2B48 92 E1 00 1C */ stw r23, 0x1c(r1)
/* 801D6EEC 001D2B4C B3 E1 00 20 */ sth r31, 0x20(r1)
-/* 801D6EF0 001D2B50 4B FF E5 19 */ bl func_801D5408
+/* 801D6EF0 001D2B50 4B FF E5 19 */ bl TRKGetFreeBuffer
/* 801D6EF4 001D2B54 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6EF8 001D2B58 38 81 00 14 */ addi r4, r1, 0x14
/* 801D6EFC 001D2B5C 38 A0 00 40 */ li r5, 0x40
-/* 801D6F00 001D2B60 4B FF E1 75 */ bl func_801D5074
+/* 801D6F00 001D2B60 4B FF E1 75 */ bl TRKAppendBuffer_ui8
/* 801D6F04 001D2B64 2C 1C 00 00 */ cmpwi r28, 0
/* 801D6F08 001D2B68 7C 75 1B 78 */ mr r21, r3
/* 801D6F0C 001D2B6C 40 82 00 20 */ bne lbl_801D6F2C
@@ -14617,7 +14620,7 @@ lbl_801D6EDC:
/* 801D6F18 001D2B78 80 61 00 08 */ lwz r3, 8(r1)
/* 801D6F1C 001D2B7C 7F E5 FB 78 */ mr r5, r31
/* 801D6F20 001D2B80 7C 98 F2 14 */ add r4, r24, r30
-/* 801D6F24 001D2B84 4B FF E1 51 */ bl func_801D5074
+/* 801D6F24 001D2B84 4B FF E1 51 */ bl TRKAppendBuffer_ui8
/* 801D6F28 001D2B88 7C 75 1B 78 */ mr r21, r3
lbl_801D6F2C:
/* 801D6F2C 001D2B8C 2C 15 00 00 */ cmpwi r21, 0
@@ -14642,7 +14645,7 @@ lbl_801D6F54:
/* 801D6F74 001D2BD4 7C 75 1B 79 */ or. r21, r3, r3
/* 801D6F78 001D2BD8 40 82 00 10 */ bne lbl_801D6F88
/* 801D6F7C 001D2BDC 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6F80 001D2BE0 4B FF E4 5D */ bl func_801D53DC
+/* 801D6F80 001D2BE0 4B FF E4 5D */ bl TRKGetBuffer
/* 801D6F84 001D2BE4 7C 76 1B 78 */ mr r22, r3
lbl_801D6F88:
/* 801D6F88 001D2BE8 80 16 00 20 */ lwz r0, 0x20(r22)
@@ -14656,11 +14659,11 @@ lbl_801D6F88:
/* 801D6FA8 001D2C08 41 81 00 30 */ bgt lbl_801D6FD8
/* 801D6FAC 001D2C0C 7E C3 B3 78 */ mr r3, r22
/* 801D6FB0 001D2C10 38 80 00 40 */ li r4, 0x40
-/* 801D6FB4 001D2C14 4B FF E3 55 */ bl func_801D5308
+/* 801D6FB4 001D2C14 4B FF E3 55 */ bl TRKSetBufferPosition
/* 801D6FB8 001D2C18 7E C3 B3 78 */ mr r3, r22
/* 801D6FBC 001D2C1C 7E 65 9B 78 */ mr r5, r19
/* 801D6FC0 001D2C20 7C 98 F2 14 */ add r4, r24, r30
-/* 801D6FC4 001D2C24 4B FF DE 35 */ bl func_801D4DF8
+/* 801D6FC4 001D2C24 4B FF DE 35 */ bl TRKReadBuffer_ui8
/* 801D6FC8 001D2C28 7C 75 1B 78 */ mr r21, r3
/* 801D6FCC 001D2C2C 2C 15 03 02 */ cmpwi r21, 0x302
/* 801D6FD0 001D2C30 40 82 00 08 */ bne lbl_801D6FD8
@@ -14673,7 +14676,7 @@ lbl_801D6FD8:
lbl_801D6FE8:
/* 801D6FE8 001D2C48 92 9A 00 00 */ stw r20, 0(r26)
/* 801D6FEC 001D2C4C 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D6FF0 001D2C50 4B FF E3 89 */ bl func_801D5378
+/* 801D6FF0 001D2C50 4B FF E3 89 */ bl TRKReleaseBuffer
/* 801D6FF4 001D2C54 48 00 00 10 */ b lbl_801D7004
lbl_801D6FF8:
/* 801D6FF8 001D2C58 80 61 00 08 */ lwz r3, 8(r1)
@@ -14681,7 +14684,7 @@ lbl_801D6FF8:
/* 801D7000 001D2C60 7C 75 1B 78 */ mr r21, r3
lbl_801D7004:
/* 801D7004 001D2C64 80 61 00 0C */ lwz r3, 0xc(r1)
-/* 801D7008 001D2C68 4B FF E3 71 */ bl func_801D5378
+/* 801D7008 001D2C68 4B FF E3 71 */ bl TRKReleaseBuffer
/* 801D700C 001D2C6C 7F DE FA 14 */ add r30, r30, r31
lbl_801D7010:
/* 801D7010 001D2C70 2C 1D 00 00 */ cmpwi r29, 0
@@ -14719,8 +14722,8 @@ func_801D7064:
/* 801D7064 001D2CC4 38 60 00 00 */ li r3, 0
/* 801D7068 001D2CC8 4E 80 00 20 */ blr
-.global func_801D706C
-func_801D706C:
+.global TRKDoNotifyStopped
+TRKDoNotifyStopped:
/* 801D706C 001D2CCC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D7070 001D2CD0 7C 08 02 A6 */ mflr r0
/* 801D7074 001D2CD4 90 01 00 24 */ stw r0, 0x24(r1)
@@ -14729,18 +14732,18 @@ func_801D706C:
/* 801D7080 001D2CE0 93 C1 00 18 */ stw r30, 0x18(r1)
/* 801D7084 001D2CE4 7C 7E 1B 78 */ mr r30, r3
/* 801D7088 001D2CE8 38 61 00 0C */ addi r3, r1, 0xc
-/* 801D708C 001D2CEC 4B FF E3 7D */ bl func_801D5408
+/* 801D708C 001D2CEC 4B FF E3 7D */ bl TRKGetFreeBuffer
/* 801D7090 001D2CF0 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D7094 001D2CF4 40 82 00 54 */ bne lbl_801D70E8
/* 801D7098 001D2CF8 40 82 00 20 */ bne lbl_801D70B8
/* 801D709C 001D2CFC 2C 1E 00 90 */ cmpwi r30, 0x90
/* 801D70A0 001D2D00 40 82 00 10 */ bne lbl_801D70B0
/* 801D70A4 001D2D04 80 61 00 08 */ lwz r3, 8(r1)
-/* 801D70A8 001D2D08 48 00 09 09 */ bl func_801D79B0
+/* 801D70A8 001D2D08 48 00 09 09 */ bl TRKTargetAddStopInfo
/* 801D70AC 001D2D0C 48 00 00 0C */ b lbl_801D70B8
lbl_801D70B0:
/* 801D70B0 001D2D10 80 61 00 08 */ lwz r3, 8(r1)
-/* 801D70B4 001D2D14 48 00 08 79 */ bl func_801D792C
+/* 801D70B4 001D2D14 48 00 08 79 */ bl TRKTargetAddExceptionInfo
lbl_801D70B8:
/* 801D70B8 001D2D18 80 61 00 08 */ lwz r3, 8(r1)
/* 801D70BC 001D2D1C 38 81 00 10 */ addi r4, r1, 0x10
@@ -14751,10 +14754,10 @@ lbl_801D70B8:
/* 801D70D0 001D2D30 7C 7F 1B 79 */ or. r31, r3, r3
/* 801D70D4 001D2D34 40 82 00 0C */ bne lbl_801D70E0
/* 801D70D8 001D2D38 80 61 00 10 */ lwz r3, 0x10(r1)
-/* 801D70DC 001D2D3C 4B FF E2 9D */ bl func_801D5378
+/* 801D70DC 001D2D3C 4B FF E2 9D */ bl TRKReleaseBuffer
lbl_801D70E0:
/* 801D70E0 001D2D40 80 61 00 0C */ lwz r3, 0xc(r1)
-/* 801D70E4 001D2D44 4B FF E2 95 */ bl func_801D5378
+/* 801D70E4 001D2D44 4B FF E2 95 */ bl TRKReleaseBuffer
lbl_801D70E8:
/* 801D70E8 001D2D48 80 01 00 24 */ lwz r0, 0x24(r1)
/* 801D70EC 001D2D4C 7F E3 FB 78 */ mr r3, r31
@@ -14764,8 +14767,8 @@ lbl_801D70E8:
/* 801D70FC 001D2D5C 38 21 00 20 */ addi r1, r1, 0x20
/* 801D7100 001D2D60 4E 80 00 20 */ blr
-.global func_801D7104
-func_801D7104:
+.global TRK_flush_cache
+TRK_flush_cache:
/* 801D7104 001D2D64 3C A0 FF FF */ lis r5, 0xFFFFFFF1@h
/* 801D7108 001D2D68 60 A5 FF F1 */ ori r5, r5, 0xFFFFFFF1@l
/* 801D710C 001D2D6C 7C A5 18 38 */ and r5, r5, r3
@@ -14782,8 +14785,8 @@ lbl_801D7118:
/* 801D7134 001D2D94 4C 00 01 2C */ isync
/* 801D7138 001D2D98 4E 80 00 20 */ blr
-.global func_801D713C
-func_801D713C:
+.global TRK_fill_mem
+TRK_fill_mem:
/* 801D713C 001D2D9C 28 05 00 20 */ cmplwi r5, 0x20
/* 801D7140 001D2DA0 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 801D7144 001D2DA4 38 C3 FF FF */ addi r6, r3, -1
@@ -14840,8 +14843,8 @@ lbl_801D71E4:
/* 801D71EC 001D2E4C 40 82 FF F8 */ bne lbl_801D71E4
/* 801D71F0 001D2E50 4E 80 00 20 */ blr
-.global func_801D71F4
-func_801D71F4:
+.global strlen
+strlen:
/* 801D71F4 001D2E54 38 83 FF FF */ addi r4, r3, -1
/* 801D71F8 001D2E58 38 60 FF FF */ li r3, -1
lbl_801D71FC:
@@ -14861,8 +14864,8 @@ func_801D7218:
/* 801D7218 001D2E78 7C 60 01 24 */ mtmsr r3
/* 801D721C 001D2E7C 4E 80 00 20 */ blr
-.global func_801D7220
-func_801D7220:
+.global TRK_ppc_memcpy
+TRK_ppc_memcpy:
/* 801D7220 001D2E80 7D 00 00 A6 */ mfmsr r8
/* 801D7224 001D2E84 39 40 00 00 */ li r10, 0
lbl_801D7228:
@@ -14880,8 +14883,9 @@ lbl_801D7250:
/* 801D7250 001D2EB0 7D 00 01 24 */ mtmsr r8
/* 801D7254 001D2EB4 7C 00 04 AC */ sync 0
/* 801D7258 001D2EB8 4E 80 00 20 */ blr
-.global lbl_801D725C
-lbl_801D725C:
+
+.global TRKInterruptHandler
+TRKInterruptHandler:
/* 801D725C 001D2EBC 7C 5A 03 A6 */ mtspr 0x1a, r2
/* 801D7260 001D2EC0 7C 9B 03 A6 */ mtspr 0x1b, r4
/* 801D7264 001D2EC4 7C 93 42 A6 */ mfspr r4, 0x113
@@ -14959,7 +14963,7 @@ lbl_801D7324:
/* 801D737C 001D2FDC 7F C9 02 A6 */ mfctr r30
/* 801D7380 001D2FE0 7F E1 02 A6 */ mfxer r31
/* 801D7384 001D2FE4 BF 62 00 80 */ stmw r27, 0x80(r2)
-/* 801D7388 001D2FE8 48 00 18 C9 */ bl func_801D8C50
+/* 801D7388 001D2FE8 48 00 18 C9 */ bl TRKSaveExtended1Block
/* 801D738C 001D2FEC 3C 40 80 42 */ lis r2, lbl_8042323C@h
/* 801D7390 001D2FF0 60 42 32 3C */ ori r2, r2, lbl_8042323C@l
/* 801D7394 001D2FF4 38 60 00 01 */ li r3, 1
@@ -14984,7 +14988,7 @@ lbl_801D7324:
/* 801D73E0 001D3040 80 02 00 00 */ lwz r0, 0(r2)
/* 801D73E4 001D3044 80 22 00 04 */ lwz r1, 4(r2)
/* 801D73E8 001D3048 80 42 00 08 */ lwz r2, 8(r2)
-/* 801D73EC 001D304C 48 00 07 AC */ b lbl_801D7B98
+/* 801D73EC 001D304C 48 00 07 AC */ b TRKPostInterruptEvent
lbl_801D73F0:
/* 801D73F0 001D3050 3C 40 80 42 */ lis r2, lbl_8042323C@h
/* 801D73F4 001D3054 60 42 32 3C */ ori r2, r2, lbl_8042323C@l
@@ -15028,8 +15032,8 @@ lbl_801D7468:
/* 801D7484 001D30E4 7C 72 42 A6 */ mfspr r3, 0x112
/* 801D7488 001D30E8 4C 00 00 64 */ rfi
-.global func_801D748C
-func_801D748C:
+.global TRKSwapAndGo
+TRKSwapAndGo:
/* 801D748C 001D30EC 3C 60 80 49 */ lis r3, lbl_804907F4@h
/* 801D7490 001D30F0 60 63 07 F4 */ ori r3, r3, lbl_804907F4@l
/* 801D7494 001D30F4 BC 03 00 00 */ stmw r0, 0(r3)
@@ -15066,7 +15070,7 @@ lbl_801D7508:
/* 801D750C 001D316C 60 42 32 3C */ ori r2, r2, lbl_8042323C@l
/* 801D7510 001D3170 38 60 00 00 */ li r3, 0
/* 801D7514 001D3174 98 62 00 0C */ stb r3, 0xc(r2)
-/* 801D7518 001D3178 48 00 18 F1 */ bl func_801D8E08
+/* 801D7518 001D3178 48 00 18 F1 */ bl TRKRestoreExtended1Block
/* 801D751C 001D317C 3C 40 80 49 */ lis r2, lbl_80490898@h
/* 801D7520 001D3180 60 42 08 98 */ ori r2, r2, lbl_80490898@l
/* 801D7524 001D3184 BB 62 00 80 */ lmw r27, 0x80(r2)
@@ -15101,10 +15105,10 @@ lbl_801D7550:
/* 801D7594 001D31F4 80 02 00 00 */ lwz r0, 0(r2)
/* 801D7598 001D31F8 80 22 00 04 */ lwz r1, 4(r2)
/* 801D759C 001D31FC 80 42 00 08 */ lwz r2, 8(r2)
-/* 801D75A0 001D3200 48 00 05 F8 */ b lbl_801D7B98
+/* 801D75A0 001D3200 48 00 05 F8 */ b TRKPostInterruptEvent
-.global func_801D75A4
-func_801D75A4:
+.global ReadFPSCR
+ReadFPSCR:
/* 801D75A4 001D3204 94 21 FF C0 */ stwu r1, -0x40(r1)
/* 801D75A8 001D3208 DB E1 00 10 */ stfd f31, 0x10(r1)
/* 801D75AC 001D320C F3 E1 00 20 */ psq_st f31, 32(r1), 0, qr0
@@ -15115,8 +15119,8 @@ func_801D75A4:
/* 801D75C0 001D3220 38 21 00 40 */ addi r1, r1, 0x40
/* 801D75C4 001D3224 4E 80 00 20 */ blr
-.global func_801D75C8
-func_801D75C8:
+.global WriteFPSCR
+WriteFPSCR:
/* 801D75C8 001D3228 94 21 FF C0 */ stwu r1, -0x40(r1)
/* 801D75CC 001D322C DB E1 00 10 */ stfd f31, 0x10(r1)
/* 801D75D0 001D3230 F3 E1 00 20 */ psq_st f31, 32(r1), 0, qr0
@@ -15134,8 +15138,8 @@ func_801D75EC:
/* 801D75F4 001D3254 90 64 00 A0 */ stw r3, 0xa0(r4)
/* 801D75F8 001D3258 4E 80 00 20 */ blr
-.global func_801D75FC
-func_801D75FC:
+.global TRKTargetStop
+TRKTargetStop:
/* 801D75FC 001D325C 3C 60 80 49 */ lis r3, lbl_804907F4@ha
/* 801D7600 001D3260 38 00 00 01 */ li r0, 1
/* 801D7604 001D3264 38 83 07 F4 */ addi r4, r3, lbl_804907F4@l
@@ -15157,8 +15161,8 @@ func_801D7624:
/* 801D762C 001D328C 80 63 00 98 */ lwz r3, 0x98(r3)
/* 801D7630 001D3290 4E 80 00 20 */ blr
-.global func_801D7634
-func_801D7634:
+.global TRKTargetSupportRequest
+TRKTargetSupportRequest:
/* 801D7634 001D3294 94 21 FF C0 */ stwu r1, -0x40(r1)
/* 801D7638 001D3298 7C 08 02 A6 */ mflr r0
/* 801D763C 001D329C 3C 60 80 49 */ lis r3, lbl_80490898@ha
@@ -15178,9 +15182,9 @@ func_801D7634:
/* 801D7674 001D32D4 41 82 00 20 */ beq lbl_801D7694
/* 801D7678 001D32D8 38 61 00 10 */ addi r3, r1, 0x10
/* 801D767C 001D32DC 38 80 00 04 */ li r4, 4
-/* 801D7680 001D32E0 4B FF D2 D5 */ bl func_801D4954
+/* 801D7680 001D32E0 4B FF D2 D5 */ bl TRKConstructEvent
/* 801D7684 001D32E4 38 61 00 10 */ addi r3, r1, 0x10
-/* 801D7688 001D32E8 4B FF D2 E5 */ bl func_801D496C
+/* 801D7688 001D32E8 4B FF D2 E5 */ bl TRKPostEvent
/* 801D768C 001D32EC 38 60 00 00 */ li r3, 0
/* 801D7690 001D32F0 48 00 01 90 */ b lbl_801D7820
lbl_801D7694:
@@ -15193,7 +15197,7 @@ lbl_801D7694:
/* 801D76AC 001D330C 80 64 00 10 */ lwz r3, 0x10(r4)
/* 801D76B0 001D3310 80 A4 00 18 */ lwz r5, 0x18(r4)
/* 801D76B4 001D3314 54 04 06 3E */ clrlwi r4, r0, 0x18
-/* 801D76B8 001D3318 4B FF F4 E1 */ bl func_801D6B98
+/* 801D76B8 001D3318 4B FF F4 E1 */ bl HandleOpenFileSupportRequest
/* 801D76BC 001D331C 80 01 00 0C */ lwz r0, 0xc(r1)
/* 801D76C0 001D3320 7C 7E 1B 78 */ mr r30, r3
/* 801D76C4 001D3324 2C 00 00 00 */ cmpwi r0, 0
@@ -15213,7 +15217,7 @@ lbl_801D76E8:
/* 801D76F4 001D3354 38 81 00 0C */ addi r4, r1, 0xc
/* 801D76F8 001D3358 38 63 08 98 */ addi r3, r3, lbl_80490898@l
/* 801D76FC 001D335C 80 63 00 10 */ lwz r3, 0x10(r3)
-/* 801D7700 001D3360 4B FF F3 B1 */ bl func_801D6AB0
+/* 801D7700 001D3360 4B FF F3 B1 */ bl HandleCloseFileSupportRequest
/* 801D7704 001D3364 80 01 00 0C */ lwz r0, 0xc(r1)
/* 801D7708 001D3368 7C 7E 1B 78 */ mr r30, r3
/* 801D770C 001D336C 2C 00 00 00 */ cmpwi r0, 0
@@ -15239,7 +15243,7 @@ lbl_801D7730:
/* 801D7754 001D33B4 80 7D 00 10 */ lwz r3, 0x10(r29)
/* 801D7758 001D33B8 54 05 06 3E */ clrlwi r5, r0, 0x18
/* 801D775C 001D33BC 90 E1 00 08 */ stw r7, 8(r1)
-/* 801D7760 001D33C0 4B FF F2 41 */ bl func_801D69A0
+/* 801D7760 001D33C0 4B FF F2 41 */ bl HandlePositionFileSupportRequest
/* 801D7764 001D33C4 80 01 00 0C */ lwz r0, 0xc(r1)
/* 801D7768 001D33C8 7C 7E 1B 78 */ mr r30, r3
/* 801D776C 001D33CC 2C 00 00 00 */ cmpwi r0, 0
@@ -15267,7 +15271,7 @@ lbl_801D779C:
/* 801D77BC 001D341C 80 9D 00 18 */ lwz r4, 0x18(r29)
/* 801D77C0 001D3420 7F 85 E3 78 */ mr r5, r28
/* 801D77C4 001D3424 38 E0 00 01 */ li r7, 1
-/* 801D77C8 001D3428 4B FF F6 6D */ bl func_801D6E34
+/* 801D77C8 001D3428 4B FF F6 6D */ bl TRKSuppAccessFile
/* 801D77CC 001D342C 80 01 00 0C */ lwz r0, 0xc(r1)
/* 801D77D0 001D3430 7C 7E 1B 78 */ mr r30, r3
/* 801D77D4 001D3434 2C 00 00 00 */ cmpwi r0, 0
@@ -15283,7 +15287,7 @@ lbl_801D77EC:
/* 801D77F8 001D3458 40 82 00 10 */ bne lbl_801D7808
/* 801D77FC 001D345C 80 7D 00 18 */ lwz r3, 0x18(r29)
/* 801D7800 001D3460 80 9C 00 00 */ lwz r4, 0(r28)
-/* 801D7804 001D3464 4B FF F9 01 */ bl func_801D7104
+/* 801D7804 001D3464 4B FF F9 01 */ bl TRK_flush_cache
lbl_801D7808:
/* 801D7808 001D3468 3C 80 80 49 */ lis r4, lbl_80490898@ha
/* 801D780C 001D346C 7F C3 F3 78 */ mr r3, r30
@@ -15375,8 +15379,8 @@ lbl_801D7914:
/* 801D7924 001D3584 90 04 00 98 */ stw r0, 0x98(r4)
/* 801D7928 001D3588 4E 80 00 20 */ blr
-.global func_801D792C
-func_801D792C:
+.global TRKTargetAddExceptionInfo
+TRKTargetAddExceptionInfo:
/* 801D792C 001D358C 94 21 FF A0 */ stwu r1, -0x60(r1)
/* 801D7930 001D3590 7C 08 02 A6 */ mflr r0
/* 801D7934 001D3594 38 80 00 00 */ li r4, 0
@@ -15394,7 +15398,7 @@ func_801D792C:
/* 801D7964 001D35C4 38 61 00 08 */ addi r3, r1, 8
/* 801D7968 001D35C8 98 01 00 10 */ stb r0, 0x10(r1)
/* 801D796C 001D35CC 90 81 00 14 */ stw r4, 0x14(r1)
-/* 801D7970 001D35D0 48 00 0E 7D */ bl func_801D87EC
+/* 801D7970 001D35D0 48 00 0E 7D */ bl TRKTargetReadInstruction
/* 801D7974 001D35D4 3C 60 80 42 */ lis r3, lbl_8042323C@ha
/* 801D7978 001D35D8 80 A1 00 08 */ lwz r5, 8(r1)
/* 801D797C 001D35DC 38 83 32 3C */ addi r4, r3, lbl_8042323C@l
@@ -15404,15 +15408,15 @@ func_801D792C:
/* 801D798C 001D35EC 90 A1 00 18 */ stw r5, 0x18(r1)
/* 801D7990 001D35F0 38 A0 00 40 */ li r5, 0x40
/* 801D7994 001D35F4 90 01 00 1C */ stw r0, 0x1c(r1)
-/* 801D7998 001D35F8 4B FF D6 DD */ bl func_801D5074
+/* 801D7998 001D35F8 4B FF D6 DD */ bl TRKAppendBuffer_ui8
/* 801D799C 001D35FC 80 01 00 64 */ lwz r0, 0x64(r1)
/* 801D79A0 001D3600 83 E1 00 5C */ lwz r31, 0x5c(r1)
/* 801D79A4 001D3604 7C 08 03 A6 */ mtlr r0
/* 801D79A8 001D3608 38 21 00 60 */ addi r1, r1, 0x60
/* 801D79AC 001D360C 4E 80 00 20 */ blr
-.global func_801D79B0
-func_801D79B0:
+.global TRKTargetAddStopInfo
+TRKTargetAddStopInfo:
/* 801D79B0 001D3610 94 21 FF A0 */ stwu r1, -0x60(r1)
/* 801D79B4 001D3614 7C 08 02 A6 */ mflr r0
/* 801D79B8 001D3618 38 80 00 00 */ li r4, 0
@@ -15431,7 +15435,7 @@ func_801D79B0:
/* 801D79EC 001D364C 90 A1 00 0C */ stw r5, 0xc(r1)
/* 801D79F0 001D3650 98 01 00 10 */ stb r0, 0x10(r1)
/* 801D79F4 001D3654 90 81 00 14 */ stw r4, 0x14(r1)
-/* 801D79F8 001D3658 48 00 0D F5 */ bl func_801D87EC
+/* 801D79F8 001D3658 48 00 0D F5 */ bl TRKTargetReadInstruction
/* 801D79FC 001D365C 3C 60 80 49 */ lis r3, lbl_80490898@ha
/* 801D7A00 001D3660 80 A1 00 08 */ lwz r5, 8(r1)
/* 801D7A04 001D3664 38 83 08 98 */ addi r4, r3, lbl_80490898@l
@@ -15442,7 +15446,7 @@ func_801D79B0:
/* 801D7A18 001D3678 38 A0 00 40 */ li r5, 0x40
/* 801D7A1C 001D367C 54 00 04 3E */ clrlwi r0, r0, 0x10
/* 801D7A20 001D3680 90 01 00 1C */ stw r0, 0x1c(r1)
-/* 801D7A24 001D3684 4B FF D6 51 */ bl func_801D5074
+/* 801D7A24 001D3684 4B FF D6 51 */ bl TRKAppendBuffer_ui8
/* 801D7A28 001D3688 80 01 00 64 */ lwz r0, 0x64(r1)
/* 801D7A2C 001D368C 83 E1 00 5C */ lwz r31, 0x5c(r1)
/* 801D7A30 001D3690 7C 08 03 A6 */ mtlr r0
@@ -15541,13 +15545,15 @@ lbl_801D7B60:
/* 801D7B78 001D37D8 38 83 07 F4 */ addi r4, r3, lbl_804907F4@l
/* 801D7B7C 001D37DC 38 60 00 90 */ li r3, 0x90
/* 801D7B80 001D37E0 90 04 00 98 */ stw r0, 0x98(r4)
-/* 801D7B84 001D37E4 4B FF F4 E9 */ bl func_801D706C
+/* 801D7B84 001D37E4 4B FF F4 E9 */ bl TRKDoNotifyStopped
lbl_801D7B88:
/* 801D7B88 001D37E8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D7B8C 001D37EC 7C 08 03 A6 */ mtlr r0
/* 801D7B90 001D37F0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D7B94 001D37F4 4E 80 00 20 */ blr
-lbl_801D7B98:
+
+.global TRKPostInterruptEvent
+TRKPostInterruptEvent:
/* 801D7B98 001D37F8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D7B9C 001D37FC 7C 08 02 A6 */ mflr r0
/* 801D7BA0 001D3800 3C 60 80 49 */ lis r3, lbl_804907F4@ha
@@ -15575,7 +15581,7 @@ lbl_801D7BEC:
/* 801D7BF0 001D3850 38 61 00 08 */ addi r3, r1, 8
/* 801D7BF4 001D3854 38 84 08 98 */ addi r4, r4, lbl_80490898@l
/* 801D7BF8 001D3858 80 84 00 80 */ lwz r4, 0x80(r4)
-/* 801D7BFC 001D385C 48 00 0B F1 */ bl func_801D87EC
+/* 801D7BFC 001D385C 48 00 0B F1 */ bl TRKTargetReadInstruction
/* 801D7C00 001D3860 80 61 00 08 */ lwz r3, 8(r1)
/* 801D7C04 001D3864 3C 03 F0 20 */ addis r0, r3, 0xf020
/* 801D7C08 001D3868 28 00 00 00 */ cmplwi r0, 0
@@ -15589,17 +15595,17 @@ lbl_801D7C20:
/* 801D7C20 001D3880 38 80 00 04 */ li r4, 4
lbl_801D7C24:
/* 801D7C24 001D3884 38 61 00 0C */ addi r3, r1, 0xc
-/* 801D7C28 001D3888 4B FF CD 2D */ bl func_801D4954
+/* 801D7C28 001D3888 4B FF CD 2D */ bl TRKConstructEvent
/* 801D7C2C 001D388C 38 61 00 0C */ addi r3, r1, 0xc
-/* 801D7C30 001D3890 4B FF CD 3D */ bl func_801D496C
+/* 801D7C30 001D3890 4B FF CD 3D */ bl TRKPostEvent
lbl_801D7C34:
/* 801D7C34 001D3894 80 01 00 24 */ lwz r0, 0x24(r1)
/* 801D7C38 001D3898 7C 08 03 A6 */ mtlr r0
/* 801D7C3C 001D389C 38 21 00 20 */ addi r1, r1, 0x20
/* 801D7C40 001D38A0 4E 80 00 20 */ blr
-.global func_801D7C44
-func_801D7C44:
+.global TRKTargetAccessExtended2
+TRKTargetAccessExtended2:
/* 801D7C44 001D38A4 94 21 FE D0 */ stwu r1, -0x130(r1)
/* 801D7C48 001D38A8 7C 08 02 A6 */ mflr r0
/* 801D7C4C 001D38AC 90 01 01 34 */ stw r0, 0x134(r1)
@@ -15658,7 +15664,7 @@ lbl_801D7C78:
/* 801D7D1C 001D397C 90 C1 00 C4 */ stw r6, 0xc4(r1)
/* 801D7D20 001D3980 90 A1 00 C8 */ stw r5, 0xc8(r1)
/* 801D7D24 001D3984 90 01 00 E8 */ stw r0, 0xe8(r1)
-/* 801D7D28 001D3988 4B FF F3 DD */ bl func_801D7104
+/* 801D7D28 001D3988 4B FF F3 DD */ bl TRK_flush_cache
/* 801D7D2C 001D398C 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D7D30 001D3990 39 81 00 C4 */ addi r12, r1, 0xc4
/* 801D7D34 001D3994 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -15700,7 +15706,7 @@ lbl_801D7C78:
/* 801D7DC4 001D3A24 90 C1 00 9C */ stw r6, 0x9c(r1)
/* 801D7DC8 001D3A28 90 A1 00 A0 */ stw r5, 0xa0(r1)
/* 801D7DCC 001D3A2C 90 01 00 C0 */ stw r0, 0xc0(r1)
-/* 801D7DD0 001D3A30 4B FF F3 35 */ bl func_801D7104
+/* 801D7DD0 001D3A30 4B FF F3 35 */ bl TRK_flush_cache
/* 801D7DD4 001D3A34 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D7DD8 001D3A38 39 81 00 9C */ addi r12, r1, 0x9c
/* 801D7DDC 001D3A3C 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -15741,7 +15747,7 @@ lbl_801D7C78:
/* 801D7E68 001D3AC8 90 C1 00 74 */ stw r6, 0x74(r1)
/* 801D7E6C 001D3ACC 90 A1 00 78 */ stw r5, 0x78(r1)
/* 801D7E70 001D3AD0 90 01 00 98 */ stw r0, 0x98(r1)
-/* 801D7E74 001D3AD4 4B FF F2 91 */ bl func_801D7104
+/* 801D7E74 001D3AD4 4B FF F2 91 */ bl TRK_flush_cache
/* 801D7E78 001D3AD8 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D7E7C 001D3ADC 39 81 00 74 */ addi r12, r1, 0x74
/* 801D7E80 001D3AE0 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -15789,7 +15795,7 @@ lbl_801D7F14:
/* 801D7F20 001D3B80 7F A3 EB 78 */ mr r3, r29
/* 801D7F24 001D3B84 90 01 00 70 */ stw r0, 0x70(r1)
/* 801D7F28 001D3B88 38 80 00 28 */ li r4, 0x28
-/* 801D7F2C 001D3B8C 4B FF F1 D9 */ bl func_801D7104
+/* 801D7F2C 001D3B8C 4B FF F1 D9 */ bl TRK_flush_cache
/* 801D7F30 001D3B90 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D7F34 001D3B94 39 81 00 4C */ addi r12, r1, 0x4c
/* 801D7F38 001D3B98 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -15799,12 +15805,12 @@ lbl_801D7F14:
/* 801D7F48 001D3BA8 80 A1 00 0C */ lwz r5, 0xc(r1)
/* 801D7F4C 001D3BAC 7F 03 C3 78 */ mr r3, r24
/* 801D7F50 001D3BB0 80 C1 00 10 */ lwz r6, 0x10(r1)
-/* 801D7F54 001D3BB4 4B FF D1 89 */ bl func_801D50DC
+/* 801D7F54 001D3BB4 4B FF D1 89 */ bl TRKAppendBuffer1_ui64
/* 801D7F58 001D3BB8 48 00 00 AC */ b lbl_801D8004
lbl_801D7F5C:
/* 801D7F5C 001D3BBC 7F 03 C3 78 */ mr r3, r24
/* 801D7F60 001D3BC0 38 81 00 0C */ addi r4, r1, 0xc
-/* 801D7F64 001D3BC4 4B FF CF 2D */ bl func_801D4E90
+/* 801D7F64 001D3BC4 4B FF CF 2D */ bl TRKReadBuffer1_ui64
/* 801D7F68 001D3BC8 3C 60 80 40 */ lis r3, lbl_80400004@ha
/* 801D7F6C 001D3BCC 85 83 D6 F0 */ lwzu r12, -0x2910(r3)
/* 801D7F70 001D3BD0 2C 1A 00 00 */ cmpwi r26, 0
@@ -15837,7 +15843,7 @@ lbl_801D7FCC:
/* 801D7FD8 001D3C38 7F 83 E3 78 */ mr r3, r28
/* 801D7FDC 001D3C3C 90 01 00 48 */ stw r0, 0x48(r1)
/* 801D7FE0 001D3C40 38 80 00 28 */ li r4, 0x28
-/* 801D7FE4 001D3C44 4B FF F1 21 */ bl func_801D7104
+/* 801D7FE4 001D3C44 4B FF F1 21 */ bl TRK_flush_cache
/* 801D7FE8 001D3C48 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D7FEC 001D3C4C 39 81 00 24 */ addi r12, r1, 0x24
/* 801D7FF0 001D3C50 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -15881,8 +15887,8 @@ lbl_801D8068:
/* 801D8074 001D3CD4 38 21 01 30 */ addi r1, r1, 0x130
/* 801D8078 001D3CD8 4E 80 00 20 */ blr
-.global func_801D807C
-func_801D807C:
+.global TRKTargetAccessExtended1
+TRKTargetAccessExtended1:
/* 801D807C 001D3CDC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D8080 001D3CE0 7C 08 02 A6 */ mflr r0
/* 801D8084 001D3CE4 28 04 00 60 */ cmplwi r4, 0x60
@@ -15924,7 +15930,7 @@ lbl_801D80A4:
/* 801D8110 001D3D70 41 82 00 14 */ beq lbl_801D8124
/* 801D8114 001D3D74 7C A3 2B 78 */ mr r3, r5
/* 801D8118 001D3D78 7C 05 03 78 */ mr r5, r0
-/* 801D811C 001D3D7C 4B FF CE 5D */ bl func_801D4F78
+/* 801D811C 001D3D7C 4B FF CE 5D */ bl TRKAppendBuffer_ui32
/* 801D8120 001D3D80 48 00 00 74 */ b lbl_801D8194
lbl_801D8124:
/* 801D8124 001D3D84 38 67 01 EC */ addi r3, r7, 0x1ec
@@ -15956,7 +15962,7 @@ lbl_801D8150:
lbl_801D8188:
/* 801D8188 001D3DE8 7C A3 2B 78 */ mr r3, r5
/* 801D818C 001D3DEC 7C 05 03 78 */ mr r5, r0
-/* 801D8190 001D3DF0 4B FF CB 79 */ bl func_801D4D08
+/* 801D8190 001D3DF0 4B FF CB 79 */ bl TRKReadBuffer_ui32
lbl_801D8194:
/* 801D8194 001D3DF4 88 1F 00 0D */ lbz r0, 0xd(r31)
/* 801D8198 001D3DF8 28 00 00 00 */ cmplwi r0, 0
@@ -15983,8 +15989,8 @@ lbl_801D81D4:
/* 801D81E4 001D3E44 38 21 00 20 */ addi r1, r1, 0x20
/* 801D81E8 001D3E48 4E 80 00 20 */ blr
-.global func_801D81EC
-func_801D81EC:
+.global TRKTargetAccessFP
+TRKTargetAccessFP:
/* 801D81EC 001D3E4C 94 21 FF 10 */ stwu r1, -0xf0(r1)
/* 801D81F0 001D3E50 7C 08 02 A6 */ mflr r0
/* 801D81F4 001D3E54 90 01 00 F4 */ stw r0, 0xf4(r1)
@@ -16062,7 +16068,7 @@ lbl_801D82FC:
/* 801D8308 001D3F68 7F 23 CB 78 */ mr r3, r25
/* 801D830C 001D3F6C 90 01 00 BC */ stw r0, 0xbc(r1)
/* 801D8310 001D3F70 38 80 00 28 */ li r4, 0x28
-/* 801D8314 001D3F74 4B FF ED F1 */ bl func_801D7104
+/* 801D8314 001D3F74 4B FF ED F1 */ bl TRK_flush_cache
/* 801D8318 001D3F78 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D831C 001D3F7C 39 81 00 98 */ addi r12, r1, 0x98
/* 801D8320 001D3F80 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -16075,11 +16081,11 @@ lbl_801D8334:
/* 801D8338 001D3F98 2C 1F 00 00 */ cmpwi r31, 0
/* 801D833C 001D3F9C 41 82 00 10 */ beq lbl_801D834C
/* 801D8340 001D3FA0 38 61 00 08 */ addi r3, r1, 8
-/* 801D8344 001D3FA4 4B FF F2 61 */ bl func_801D75A4
+/* 801D8344 001D3FA4 4B FF F2 61 */ bl ReadFPSCR
/* 801D8348 001D3FA8 48 00 00 0C */ b lbl_801D8354
lbl_801D834C:
/* 801D834C 001D3FAC 38 61 00 08 */ addi r3, r1, 8
-/* 801D8350 001D3FB0 4B FF F2 79 */ bl func_801D75C8
+/* 801D8350 001D3FB0 4B FF F2 79 */ bl WriteFPSCR
lbl_801D8354:
/* 801D8354 001D3FB4 80 81 00 08 */ lwz r4, 8(r1)
/* 801D8358 001D3FB8 38 00 00 00 */ li r0, 0
@@ -16140,7 +16146,7 @@ lbl_801D841C:
/* 801D8424 001D4084 38 04 00 20 */ addi r0, r4, 0x4E800020@l
/* 801D8428 001D4088 38 80 00 28 */ li r4, 0x28
/* 801D842C 001D408C 90 01 00 6C */ stw r0, 0x6c(r1)
-/* 801D8430 001D4090 4B FF EC D5 */ bl func_801D7104
+/* 801D8430 001D4090 4B FF EC D5 */ bl TRK_flush_cache
/* 801D8434 001D4094 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D8438 001D4098 39 81 00 48 */ addi r12, r1, 0x48
/* 801D843C 001D409C 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -16160,12 +16166,12 @@ lbl_801D8470:
/* 801D8470 001D40D0 80 A1 00 08 */ lwz r5, 8(r1)
/* 801D8474 001D40D4 7F A3 EB 78 */ mr r3, r29
/* 801D8478 001D40D8 80 C1 00 0C */ lwz r6, 0xc(r1)
-/* 801D847C 001D40DC 4B FF CC 61 */ bl func_801D50DC
+/* 801D847C 001D40DC 4B FF CC 61 */ bl TRKAppendBuffer1_ui64
/* 801D8480 001D40E0 48 00 02 00 */ b lbl_801D8680
lbl_801D8484:
/* 801D8484 001D40E4 7F A3 EB 78 */ mr r3, r29
/* 801D8488 001D40E8 38 81 00 08 */ addi r4, r1, 8
-/* 801D848C 001D40EC 4B FF CA 05 */ bl func_801D4E90
+/* 801D848C 001D40EC 4B FF CA 05 */ bl TRKReadBuffer1_ui64
/* 801D8490 001D40F0 3C 60 80 40 */ lis r3, lbl_803FD718@ha
/* 801D8494 001D40F4 28 15 00 20 */ cmplwi r21, 0x20
/* 801D8498 001D40F8 39 83 D7 18 */ addi r12, r3, lbl_803FD718@l
@@ -16202,7 +16208,7 @@ lbl_801D8504:
/* 801D8510 001D4170 7E E3 BB 78 */ mr r3, r23
/* 801D8514 001D4174 90 01 00 94 */ stw r0, 0x94(r1)
/* 801D8518 001D4178 38 80 00 28 */ li r4, 0x28
-/* 801D851C 001D417C 4B FF EB E9 */ bl func_801D7104
+/* 801D851C 001D417C 4B FF EB E9 */ bl TRK_flush_cache
/* 801D8520 001D4180 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D8524 001D4184 39 81 00 70 */ addi r12, r1, 0x70
/* 801D8528 001D4188 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -16216,11 +16222,11 @@ lbl_801D8540:
/* 801D8544 001D41A4 2C 1F 00 00 */ cmpwi r31, 0
/* 801D8548 001D41A8 41 82 00 10 */ beq lbl_801D8558
/* 801D854C 001D41AC 38 61 00 08 */ addi r3, r1, 8
-/* 801D8550 001D41B0 4B FF F0 55 */ bl func_801D75A4
+/* 801D8550 001D41B0 4B FF F0 55 */ bl ReadFPSCR
/* 801D8554 001D41B4 48 00 00 0C */ b lbl_801D8560
lbl_801D8558:
/* 801D8558 001D41B8 38 61 00 08 */ addi r3, r1, 8
-/* 801D855C 001D41BC 4B FF F0 6D */ bl func_801D75C8
+/* 801D855C 001D41BC 4B FF F0 6D */ bl WriteFPSCR
lbl_801D8560:
/* 801D8560 001D41C0 80 81 00 08 */ lwz r4, 8(r1)
/* 801D8564 001D41C4 38 00 00 00 */ li r0, 0
@@ -16281,7 +16287,7 @@ lbl_801D8628:
/* 801D8630 001D4290 38 04 00 20 */ addi r0, r4, 0x4E800020@l
/* 801D8634 001D4294 38 80 00 28 */ li r4, 0x28
/* 801D8638 001D4298 90 01 00 44 */ stw r0, 0x44(r1)
-/* 801D863C 001D429C 4B FF EA C9 */ bl func_801D7104
+/* 801D863C 001D429C 4B FF EA C9 */ bl TRK_flush_cache
/* 801D8640 001D42A0 3C 60 80 49 */ lis r3, lbl_80490D5C@ha
/* 801D8644 001D42A4 39 81 00 20 */ addi r12, r1, 0x20
/* 801D8648 001D42A8 38 83 0D 5C */ addi r4, r3, lbl_80490D5C@l
@@ -16335,8 +16341,8 @@ lbl_801D86E4:
/* 801D86F0 001D4350 38 21 00 F0 */ addi r1, r1, 0xf0
/* 801D86F4 001D4354 4E 80 00 20 */ blr
-.global func_801D86F8
-func_801D86F8:
+.global TRKTargetAccessDefault
+TRKTargetAccessDefault:
/* 801D86F8 001D4358 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D86FC 001D435C 7C 08 02 A6 */ mflr r0
/* 801D8700 001D4360 28 04 00 24 */ cmplwi r4, 0x24
@@ -16372,12 +16378,12 @@ lbl_801D8720:
/* 801D8774 001D43D4 41 82 00 14 */ beq lbl_801D8788
/* 801D8778 001D43D8 7C A3 2B 78 */ mr r3, r5
/* 801D877C 001D43DC 7D 85 63 78 */ mr r5, r12
-/* 801D8780 001D43E0 4B FF C7 F9 */ bl func_801D4F78
+/* 801D8780 001D43E0 4B FF C7 F9 */ bl TRKAppendBuffer_ui32
/* 801D8784 001D43E4 48 00 00 10 */ b lbl_801D8794
lbl_801D8788:
/* 801D8788 001D43E8 7C A3 2B 78 */ mr r3, r5
/* 801D878C 001D43EC 7D 85 63 78 */ mr r5, r12
-/* 801D8790 001D43F0 4B FF C5 79 */ bl func_801D4D08
+/* 801D8790 001D43F0 4B FF C5 79 */ bl TRKReadBuffer_ui32
lbl_801D8794:
/* 801D8794 001D43F4 88 1E 00 0D */ lbz r0, 0xd(r30)
/* 801D8798 001D43F8 28 00 00 00 */ cmplwi r0, 0
@@ -16404,8 +16410,8 @@ lbl_801D87D4:
/* 801D87E4 001D4444 38 21 00 20 */ addi r1, r1, 0x20
/* 801D87E8 001D4448 4E 80 00 20 */ blr
-.global func_801D87EC
-func_801D87EC:
+.global TRKTargetReadInstruction
+TRKTargetReadInstruction:
/* 801D87EC 001D444C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D87F0 001D4450 7C 08 02 A6 */ mflr r0
/* 801D87F4 001D4454 38 C0 00 00 */ li r6, 0
@@ -16414,7 +16420,7 @@ func_801D87EC:
/* 801D8800 001D4460 38 00 00 04 */ li r0, 4
/* 801D8804 001D4464 38 A1 00 08 */ addi r5, r1, 8
/* 801D8808 001D4468 90 01 00 08 */ stw r0, 8(r1)
-/* 801D880C 001D446C 48 00 00 2D */ bl func_801D8838
+/* 801D880C 001D446C 48 00 00 2D */ bl TRKTargetAccessMemory
/* 801D8810 001D4470 2C 03 00 00 */ cmpwi r3, 0
/* 801D8814 001D4474 40 82 00 14 */ bne lbl_801D8828
/* 801D8818 001D4478 80 01 00 08 */ lwz r0, 8(r1)
@@ -16427,8 +16433,8 @@ lbl_801D8828:
/* 801D8830 001D4490 38 21 00 10 */ addi r1, r1, 0x10
/* 801D8834 001D4494 4E 80 00 20 */ blr
-.global func_801D8838
-func_801D8838:
+.global TRKTargetAccessMemory
+TRKTargetAccessMemory:
/* 801D8838 001D4498 94 21 FF C0 */ stwu r1, -0x40(r1)
/* 801D883C 001D449C 7C 08 02 A6 */ mflr r0
/* 801D8840 001D44A0 3C C0 80 42 */ lis r6, lbl_8042323C@ha
@@ -16450,12 +16456,12 @@ func_801D8838:
/* 801D8880 001D44E0 90 A1 00 10 */ stw r5, 0x10(r1)
/* 801D8884 001D44E4 90 81 00 14 */ stw r4, 0x14(r1)
/* 801D8888 001D44E8 98 1F 00 0D */ stb r0, 0xd(r31)
-/* 801D888C 001D44EC 48 00 0B 51 */ bl func_801D93DC
+/* 801D888C 001D44EC 48 00 0B 51 */ bl TRKTargetTranslate
/* 801D8890 001D44F0 7F A0 00 34 */ cntlzw r0, r29
/* 801D8894 001D44F4 80 9C 00 00 */ lwz r4, 0(r28)
/* 801D8898 001D44F8 7C 79 1B 78 */ mr r25, r3
/* 801D889C 001D44FC 54 05 D9 7E */ srwi r5, r0, 5
-/* 801D88A0 001D4500 48 00 00 E5 */ bl func_801D8984
+/* 801D88A0 001D4500 48 00 00 E5 */ bl TRKValidMemory32
/* 801D88A4 001D4504 7C 7E 1B 79 */ or. r30, r3, r3
/* 801D88A8 001D4508 41 82 00 10 */ beq lbl_801D88B8
/* 801D88AC 001D450C 38 00 00 00 */ li r0, 0
@@ -16475,7 +16481,7 @@ lbl_801D88B8:
/* 801D88E0 001D4540 7F 43 D3 78 */ mr r3, r26
/* 801D88E4 001D4544 7F 24 CB 78 */ mr r4, r25
/* 801D88E8 001D4548 7D 06 43 78 */ mr r6, r8
-/* 801D88EC 001D454C 4B FF E9 35 */ bl func_801D7220
+/* 801D88EC 001D454C 4B FF E9 35 */ bl TRK_ppc_memcpy
/* 801D88F0 001D4550 48 00 00 3C */ b lbl_801D892C
lbl_801D88F4:
/* 801D88F4 001D4554 80 BC 00 00 */ lwz r5, 0(r28)
@@ -16483,15 +16489,15 @@ lbl_801D88F4:
/* 801D88FC 001D455C 7F 44 D3 78 */ mr r4, r26
/* 801D8900 001D4560 7C E6 3B 78 */ mr r6, r7
/* 801D8904 001D4564 7D 07 43 78 */ mr r7, r8
-/* 801D8908 001D4568 4B FF E9 19 */ bl func_801D7220
+/* 801D8908 001D4568 4B FF E9 19 */ bl TRK_ppc_memcpy
/* 801D890C 001D456C 80 9C 00 00 */ lwz r4, 0(r28)
/* 801D8910 001D4570 7F 23 CB 78 */ mr r3, r25
-/* 801D8914 001D4574 4B FF E7 F1 */ bl func_801D7104
+/* 801D8914 001D4574 4B FF E7 F1 */ bl TRK_flush_cache
/* 801D8918 001D4578 7C 1B C8 40 */ cmplw r27, r25
/* 801D891C 001D457C 41 82 00 10 */ beq lbl_801D892C
/* 801D8920 001D4580 80 9C 00 00 */ lwz r4, 0(r28)
/* 801D8924 001D4584 7F 63 DB 78 */ mr r3, r27
-/* 801D8928 001D4588 4B FF E7 DD */ bl func_801D7104
+/* 801D8928 001D4588 4B FF E7 DD */ bl TRK_flush_cache
lbl_801D892C:
/* 801D892C 001D458C 88 1F 00 0D */ lbz r0, 0xd(r31)
/* 801D8930 001D4590 28 00 00 00 */ cmplwi r0, 0
@@ -16517,8 +16523,8 @@ lbl_801D8944:
/* 801D897C 001D45DC 38 21 00 40 */ addi r1, r1, 0x40
/* 801D8980 001D45E0 4E 80 00 20 */ blr
-.global func_801D8984
-func_801D8984:
+.global TRKValidMemory32
+TRKValidMemory32:
/* 801D8984 001D45E4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D8988 001D45E8 7C 08 02 A6 */ mflr r0
/* 801D898C 001D45EC 90 01 00 24 */ stw r0, 0x24(r1)
@@ -16614,7 +16620,7 @@ lbl_801D8ABC:
/* 801D8AD4 001D4734 40 80 00 14 */ bge lbl_801D8AE8
/* 801D8AD8 001D4738 7F 45 D3 78 */ mr r5, r26
/* 801D8ADC 001D473C 7C 83 00 50 */ subf r4, r3, r0
-/* 801D8AE0 001D4740 4B FF FE A5 */ bl func_801D8984
+/* 801D8AE0 001D4740 4B FF FE A5 */ bl TRKValidMemory32
/* 801D8AE4 001D4744 7C 66 1B 78 */ mr r6, r3
lbl_801D8AE8:
/* 801D8AE8 001D4748 2C 06 00 00 */ cmpwi r6, 0
@@ -16627,7 +16633,7 @@ lbl_801D8AE8:
/* 801D8B04 001D4764 40 81 00 14 */ ble lbl_801D8B18
/* 801D8B08 001D4768 7F 45 D3 78 */ mr r5, r26
/* 801D8B0C 001D476C 7C 83 F0 50 */ subf r4, r3, r30
-/* 801D8B10 001D4770 4B FF FE 75 */ bl func_801D8984
+/* 801D8B10 001D4770 4B FF FE 75 */ bl TRKValidMemory32
/* 801D8B14 001D4774 7C 66 1B 78 */ mr r6, r3
lbl_801D8B18:
/* 801D8B18 001D4778 7C C5 33 78 */ mr r5, r6
@@ -16685,7 +16691,7 @@ lbl_801D8BBC:
/* 801D8BD4 001D4834 40 80 00 14 */ bge lbl_801D8BE8
/* 801D8BD8 001D4838 7F 45 D3 78 */ mr r5, r26
/* 801D8BDC 001D483C 7C 83 00 50 */ subf r4, r3, r0
-/* 801D8BE0 001D4840 4B FF FD A5 */ bl func_801D8984
+/* 801D8BE0 001D4840 4B FF FD A5 */ bl TRKValidMemory32
/* 801D8BE4 001D4844 7C 66 1B 78 */ mr r6, r3
lbl_801D8BE8:
/* 801D8BE8 001D4848 2C 06 00 00 */ cmpwi r6, 0
@@ -16695,7 +16701,7 @@ lbl_801D8BE8:
/* 801D8BF8 001D4858 40 81 00 14 */ ble lbl_801D8C0C
/* 801D8BFC 001D485C 7F 45 D3 78 */ mr r5, r26
/* 801D8C00 001D4860 7C 83 F0 50 */ subf r4, r3, r30
-/* 801D8C04 001D4864 4B FF FD 81 */ bl func_801D8984
+/* 801D8C04 001D4864 4B FF FD 81 */ bl TRKValidMemory32
/* 801D8C08 001D4868 7C 66 1B 78 */ mr r6, r3
lbl_801D8C0C:
/* 801D8C0C 001D486C 7C C5 33 78 */ mr r5, r6
@@ -16721,8 +16727,8 @@ func_801D8C30:
/* 801D8C48 001D48A8 0F E0 00 00 */ twui r0, 0
/* 801D8C4C 001D48AC 4E 80 00 20 */ blr
-.global func_801D8C50
-func_801D8C50:
+.global TRKSaveExtended1Block
+TRKSaveExtended1Block:
/* 801D8C50 001D48B0 3C 40 80 49 */ lis r2, lbl_80490898@h
/* 801D8C54 001D48B4 60 42 08 98 */ ori r2, r2, lbl_80490898@l
/* 801D8C58 001D48B8 7E 00 04 A6 */ mfsr r16, 0
@@ -16835,8 +16841,8 @@ lbl_801D8DA0:
/* 801D8E00 001D4A60 93 E2 02 78 */ stw r31, 0x278(r2)
/* 801D8E04 001D4A64 4E 80 00 20 */ blr
-.global func_801D8E08
-func_801D8E08:
+.global TRKRestoreExtended1Block
+TRKRestoreExtended1Block:
/* 801D8E08 001D4A68 3C 40 80 49 */ lis r2, lbl_80490898@h
/* 801D8E0C 001D4A6C 60 42 08 98 */ ori r2, r2, lbl_80490898@l
/* 801D8E10 001D4A70 3C A0 80 42 */ lis r5, lbl_80423230@h
@@ -17008,6 +17014,9 @@ lbl_801D9064:
/* 801D9070 001D4CD0 7C 08 03 A6 */ mtlr r0
/* 801D9074 001D4CD4 38 21 00 20 */ addi r1, r1, 0x20
/* 801D9078 001D4CD8 4E 80 00 20 */ blr
+
+.global __TRK_write_console
+__TRK_write_console:
/* 801D907C 001D4CDC 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D9080 001D4CE0 7C 08 02 A6 */ mflr r0
/* 801D9084 001D4CE4 90 01 00 24 */ stw r0, 0x24(r1)
@@ -17062,8 +17071,9 @@ lbl_801D9120:
/* 801D912C 001D4D8C 7C 08 03 A6 */ mtlr r0
/* 801D9130 001D4D90 38 21 00 20 */ addi r1, r1, 0x20
/* 801D9134 001D4D94 4E 80 00 20 */ blr
-.global lbl_801D9138
-lbl_801D9138:
+
+.global InitMetroTRK
+InitMetroTRK:
/* 801D9138 001D4D98 38 21 FF FC */ addi r1, r1, -4
/* 801D913C 001D4D9C 90 61 00 00 */ stw r3, 0(r1)
/* 801D9140 001D4DA0 3C 60 80 49 */ lis r3, lbl_80490898@h
@@ -17083,7 +17093,7 @@ lbl_801D9138:
/* 801D9178 001D4DD8 68 63 80 00 */ xori r3, r3, 0x8000
/* 801D917C 001D4DDC 7C 60 01 24 */ mtmsr r3
/* 801D9180 001D4DE0 7C 9B 03 A6 */ mtspr 0x1b, r4
-/* 801D9184 001D4DE4 4B FF FA CD */ bl func_801D8C50
+/* 801D9184 001D4DE4 4B FF FA CD */ bl TRKSaveExtended1Block
/* 801D9188 001D4DE8 3C 60 80 49 */ lis r3, lbl_80490898@h
/* 801D918C 001D4DEC 60 63 08 98 */ ori r3, r3, lbl_80490898@l
/* 801D9190 001D4DF0 B8 03 00 00 */ .4byte 0xB8030000 /* illegal lmw r0, 0(r3) */
@@ -17104,8 +17114,8 @@ lbl_801D91C8:
/* 801D91C8 001D4E28 48 00 02 8C */ b lbl_801D9454
/* 801D91CC 001D4E2C 4E 80 00 20 */ blr
-.global func_801D91D0
-func_801D91D0:
+.global InitMetroTRK_BBA
+InitMetroTRK_BBA:
/* 801D91D0 001D4E30 38 21 FF FC */ addi r1, r1, -4
/* 801D91D4 001D4E34 90 61 00 00 */ stw r3, 0(r1)
/* 801D91D8 001D4E38 3C 60 80 49 */ lis r3, lbl_80490898@h
@@ -17124,7 +17134,7 @@ func_801D91D0:
/* 801D920C 001D4E6C 60 83 80 00 */ ori r3, r4, 0x8000
/* 801D9210 001D4E70 7C 60 01 24 */ mtmsr r3
/* 801D9214 001D4E74 7C 9B 03 A6 */ mtspr 0x1b, r4
-/* 801D9218 001D4E78 4B FF FA 39 */ bl func_801D8C50
+/* 801D9218 001D4E78 4B FF FA 39 */ bl TRKSaveExtended1Block
/* 801D921C 001D4E7C 3C 60 80 49 */ lis r3, lbl_80490898@h
/* 801D9220 001D4E80 60 63 08 98 */ ori r3, r3, lbl_80490898@l
/* 801D9224 001D4E84 B8 03 00 00 */ .4byte 0xB8030000 /* illegal lmw r0, 0(r3) */
@@ -17145,8 +17155,8 @@ lbl_801D925C:
/* 801D925C 001D4EBC 48 00 01 F8 */ b lbl_801D9454
/* 801D9260 001D4EC0 4E 80 00 20 */ blr
-.global func_801D9264
-func_801D9264:
+.global TRKInitializeTarget
+TRKInitializeTarget:
/* 801D9264 001D4EC4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9268 001D4EC8 7C 08 02 A6 */ mflr r0
/* 801D926C 001D4ECC 3C 60 80 49 */ lis r3, lbl_804907F4@ha
@@ -17167,8 +17177,8 @@ func_801D9264:
/* 801D92A8 001D4F08 38 21 00 10 */ addi r1, r1, 0x10
/* 801D92AC 001D4F0C 4E 80 00 20 */ blr
-.global func_801D92B0
-func_801D92B0:
+.global __TRK_copy_vectors
+__TRK_copy_vectors:
/* 801D92B0 001D4F10 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D92B4 001D4F14 7C 08 02 A6 */ mflr r0
/* 801D92B8 001D4F18 3C 60 80 49 */ lis r3, lbl_80490D70@ha
@@ -17240,7 +17250,7 @@ lbl_801D9394:
/* 801D93A8 001D5008 4B E2 AD BD */ bl TRK_memcpy
/* 801D93AC 001D500C 7F 63 DB 78 */ mr r3, r27
/* 801D93B0 001D5010 38 80 01 00 */ li r4, 0x100
-/* 801D93B4 001D5014 4B FF DD 51 */ bl func_801D7104
+/* 801D93B4 001D5014 4B FF DD 51 */ bl TRK_flush_cache
lbl_801D93B8:
/* 801D93B8 001D5018 3B DE 00 01 */ addi r30, r30, 1
/* 801D93BC 001D501C 3B FF 00 04 */ addi r31, r31, 4
@@ -17252,8 +17262,8 @@ lbl_801D93B8:
/* 801D93D4 001D5034 38 21 00 20 */ addi r1, r1, 0x20
/* 801D93D8 001D5038 4E 80 00 20 */ blr
-.global func_801D93DC
-func_801D93DC:
+.global TRKTargetTranslate
+TRKTargetTranslate:
/* 801D93DC 001D503C 3C 80 80 49 */ lis r4, lbl_80490D70@ha
/* 801D93E0 001D5040 38 84 0D 70 */ addi r4, r4, lbl_80490D70@l
/* 801D93E4 001D5044 80 84 00 00 */ lwz r4, 0(r4)
@@ -17284,7 +17294,7 @@ func_801D9434:
/* 801D9434 001D5094 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9438 001D5098 7C 08 02 A6 */ mflr r0
/* 801D943C 001D509C 90 01 00 14 */ stw r0, 0x14(r1)
-/* 801D9440 001D50A0 48 00 02 75 */ bl func_801D96B4
+/* 801D9440 001D50A0 48 00 02 75 */ bl EnableEXI2Interrupts
/* 801D9444 001D50A4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D9448 001D50A8 7C 08 03 A6 */ mtlr r0
/* 801D944C 001D50AC 38 21 00 10 */ addi r1, r1, 0x10
@@ -17298,8 +17308,8 @@ lbl_801D9454:
/* 801D9468 001D50C8 2C 03 00 00 */ cmpwi r3, 0
/* 801D946C 001D50CC 90 64 0D 78 */ stw r3, lbl_80490D78@l(r4)
/* 801D9470 001D50D0 40 82 00 0C */ bne lbl_801D947C
-/* 801D9474 001D50D4 4B FF B6 E5 */ bl func_801D4B58
-/* 801D9478 001D50D8 4B FF B3 C1 */ bl func_801D4838
+/* 801D9474 001D50D4 4B FF B6 E5 */ bl TRKNubWelcome
+/* 801D9478 001D50D8 4B FF B3 C1 */ bl TRKNubMainLoop
lbl_801D947C:
/* 801D947C 001D50DC 4B FF B7 05 */ bl func_801D4B80
/* 801D9480 001D50E0 3C 80 80 49 */ lis r4, lbl_80490D78@ha
@@ -17309,8 +17319,8 @@ lbl_801D947C:
/* 801D9490 001D50F0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D9494 001D50F4 4E 80 00 20 */ blr
-.global func_801D9498
-func_801D9498:
+.global TRKLoadContext
+TRKLoadContext:
/* 801D9498 001D50F8 80 03 00 00 */ lwz r0, 0(r3)
/* 801D949C 001D50FC 80 23 00 04 */ lwz r1, 4(r3)
/* 801D94A0 001D5100 80 43 00 08 */ lwz r2, 8(r3)
@@ -17346,14 +17356,14 @@ lbl_801D94C4:
/* 801D9510 001D5170 80 5F 01 98 */ lwz r2, 0x198(r31)
/* 801D9514 001D5174 80 9F 01 9C */ lwz r4, 0x19c(r31)
/* 801D9518 001D5178 83 FF 00 7C */ lwz r31, 0x7c(r31)
-/* 801D951C 001D517C 4B FF DD 40 */ b lbl_801D725C
+/* 801D951C 001D517C 4B FF DD 40 */ b TRKInterruptHandler
.global func_801D9520
func_801D9520:
/* 801D9520 001D5180 4E 80 00 20 */ blr
-.global func_801D9524
-func_801D9524:
+.global InitializeProgramEndTrap
+InitializeProgramEndTrap:
/* 801D9524 001D5184 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9528 001D5188 7C 08 02 A6 */ mflr r0
/* 801D952C 001D518C 3C 80 80 27 */ lis r4, func_80268268@ha
@@ -17377,8 +17387,8 @@ func_801D9524:
/* 801D9574 001D51D4 38 21 00 10 */ addi r1, r1, 0x10
/* 801D9578 001D51D8 4E 80 00 20 */ blr
-.global func_801D957C
-func_801D957C:
+.global TRK_board_display
+TRK_board_display:
/* 801D957C 001D51DC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9580 001D51E0 7C 08 02 A6 */ mflr r0
/* 801D9584 001D51E4 3C A0 80 40 */ lis r5, lbl_803FD744@ha
@@ -17407,8 +17417,8 @@ func_801D95AC:
/* 801D95D4 001D5234 38 21 00 10 */ addi r1, r1, 0x10
/* 801D95D8 001D5238 4E 80 00 20 */ blr
-.global func_801D95DC
-func_801D95DC:
+.global UnreserveEXI2Port
+UnreserveEXI2Port:
/* 801D95DC 001D523C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D95E0 001D5240 7C 08 02 A6 */ mflr r0
/* 801D95E4 001D5244 3C 60 80 42 */ lis r3, lbl_804232A0@ha
@@ -17440,8 +17450,8 @@ func_801D960C:
/* 801D9640 001D52A0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D9644 001D52A4 4E 80 00 20 */ blr
-.global func_801D9648
-func_801D9648:
+.global TRKWriteUARTN
+TRKWriteUARTN:
/* 801D9648 001D52A8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D964C 001D52AC 7C 08 02 A6 */ mflr r0
/* 801D9650 001D52B0 3C A0 80 42 */ lis r5, lbl_804232A0@ha
@@ -17473,8 +17483,8 @@ func_801D9684:
/* 801D96AC 001D530C 38 21 00 10 */ addi r1, r1, 0x10
/* 801D96B0 001D5310 4E 80 00 20 */ blr
-.global func_801D96B4
-func_801D96B4:
+.global EnableEXI2Interrupts
+EnableEXI2Interrupts:
/* 801D96B4 001D5314 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D96B8 001D5318 7C 08 02 A6 */ mflr r0
/* 801D96BC 001D531C 3C 60 80 49 */ lis r3, lbl_80490D80@ha
@@ -17495,14 +17505,14 @@ lbl_801D96EC:
/* 801D96F4 001D5354 38 21 00 10 */ addi r1, r1, 0x10
/* 801D96F8 001D5358 4E 80 00 20 */ blr
-.global func_801D96FC
-func_801D96FC:
+.global TRKInitializeIntDrivenUART
+TRKInitializeIntDrivenUART:
/* 801D96FC 001D535C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9700 001D5360 7C 08 02 A6 */ mflr r0
-/* 801D9704 001D5364 3C 80 80 1E */ lis r4, lbl_801D9920@ha
+/* 801D9704 001D5364 3C 80 80 1E */ lis r4, TRKEXICallBack@ha
/* 801D9708 001D5368 3C 60 80 42 */ lis r3, lbl_804232A0@ha
/* 801D970C 001D536C 90 01 00 14 */ stw r0, 0x14(r1)
-/* 801D9710 001D5370 38 84 99 20 */ addi r4, r4, lbl_801D9920@l
+/* 801D9710 001D5370 38 84 99 20 */ addi r4, r4, TRKEXICallBack@l
/* 801D9714 001D5374 81 83 32 A0 */ lwz r12, lbl_804232A0@l(r3)
/* 801D9718 001D5378 7C C3 33 78 */ mr r3, r6
/* 801D971C 001D537C 7D 89 03 A6 */ mtctr r12
@@ -17640,7 +17650,9 @@ lbl_801D9904:
/* 801D9914 001D5574 7C 08 03 A6 */ mtlr r0
/* 801D9918 001D5578 38 21 00 20 */ addi r1, r1, 0x20
/* 801D991C 001D557C 4E 80 00 20 */ blr
-lbl_801D9920:
+
+.global TRKEXICallBack
+TRKEXICallBack:
/* 801D9920 001D5580 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D9924 001D5584 7C 08 02 A6 */ mflr r0
/* 801D9928 001D5588 90 01 00 14 */ stw r0, 0x14(r1)
@@ -17649,23 +17661,23 @@ lbl_801D9920:
/* 801D9934 001D5594 48 09 7A 4D */ bl func_80271380
/* 801D9938 001D5598 7F E3 FB 78 */ mr r3, r31
/* 801D993C 001D559C 38 80 05 00 */ li r4, 0x500
-/* 801D9940 001D55A0 4B FF FB 59 */ bl func_801D9498
+/* 801D9940 001D55A0 4B FF FB 59 */ bl TRKLoadContext
/* 801D9944 001D55A4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D9948 001D55A8 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 801D994C 001D55AC 7C 08 03 A6 */ mtlr r0
/* 801D9950 001D55B0 38 21 00 10 */ addi r1, r1, 0x10
/* 801D9954 001D55B4 4E 80 00 20 */ blr
-.global func_801D9958
-func_801D9958:
+.global TRKTargetContinue
+TRKTargetContinue:
/* 801D9958 001D55B8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 801D995C 001D55BC 7C 08 02 A6 */ mflr r0
/* 801D9960 001D55C0 38 60 00 00 */ li r3, 0
/* 801D9964 001D55C4 90 01 00 14 */ stw r0, 0x14(r1)
/* 801D9968 001D55C8 4B FF DC AD */ bl func_801D7614
/* 801D996C 001D55CC 4B FF FC 41 */ bl func_801D95AC
-/* 801D9970 001D55D0 4B FF DB 1D */ bl func_801D748C
-/* 801D9974 001D55D4 4B FF FC 69 */ bl func_801D95DC
+/* 801D9970 001D55D0 4B FF DB 1D */ bl TRKSwapAndGo
+/* 801D9974 001D55D4 4B FF FC 69 */ bl UnreserveEXI2Port
/* 801D9978 001D55D8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D997C 001D55DC 38 60 00 00 */ li r3, 0
/* 801D9980 001D55E0 7C 08 03 A6 */ mtlr r0
@@ -17679,8 +17691,8 @@ func_801D998C:
/* 801D9994 001D55F4 88 63 00 00 */ lbz r3, 0(r3)
/* 801D9998 001D55F8 4E 80 00 20 */ blr
-.global func_801D999C
-func_801D999C:
+.global SetUseSerialIO
+SetUseSerialIO:
/* 801D999C 001D55FC 3C 80 80 49 */ lis r4, lbl_80490D88@ha
/* 801D99A0 001D5600 98 64 0D 88 */ stb r3, lbl_80490D88@l(r4)
/* 801D99A4 001D5604 4E 80 00 20 */ blr
diff --git a/asm/text_7.s b/asm/text_7.s
index e84332b..ed1177e 100644
--- a/asm/text_7.s
+++ b/asm/text_7.s
@@ -11679,7 +11679,7 @@ lbl_8022CA28:
/* 8022CA28 00228688 7F C3 F3 78 */ mr r3, r30
/* 8022CA2C 0022868C 48 00 13 09 */ bl func_8022DD34
lbl_8022CA30:
-/* 8022CA30 00228690 4B F9 C9 69 */ bl func_801C9398
+/* 8022CA30 00228690 4B F9 C9 69 */ bl abs
/* 8022CA34 00228694 38 00 00 01 */ li r0, 1
/* 8022CA38 00228698 90 7F 00 04 */ stw r3, 4(r31)
/* 8022CA3C 0022869C B0 1F 00 00 */ sth r0, 0(r31)
@@ -17001,7 +17001,7 @@ func_80231260:
/* 80231298 0022CEF8 7C 7F 1B 78 */ mr r31, r3
/* 8023129C 0022CEFC 7C 85 20 10 */ subfc r4, r5, r4
/* 802312A0 0022CF00 7C 60 19 10 */ subfe r3, r0, r3
-/* 802312A4 0022CF04 4B F9 63 21 */ bl func_801C75C4
+/* 802312A4 0022CF04 4B F9 63 21 */ bl __cvt_sll_flt
/* 802312A8 0022CF08 3C 60 80 00 */ lis r3, 0x800000F8@ha
/* 802312AC 0022CF0C 3C 00 43 30 */ lis r0, 0x4330
/* 802312B0 0022CF10 80 A3 00 F8 */ lwz r5, 0x800000F8@l(r3)
@@ -33300,7 +33300,7 @@ lbl_8023F7D4:
/* 8023F7E4 0023B444 7C 7F 1B 78 */ mr r31, r3
/* 8023F7E8 0023B448 7C 85 20 10 */ subfc r4, r5, r4
/* 8023F7EC 0023B44C 7C 60 19 10 */ subfe r3, r0, r3
-/* 8023F7F0 0023B450 4B F8 7D D5 */ bl func_801C75C4
+/* 8023F7F0 0023B450 4B F8 7D D5 */ bl __cvt_sll_flt
/* 8023F7F4 0023B454 3C 80 80 00 */ lis r4, 0x800000F8@ha
/* 8023F7F8 0023B458 3C 60 43 30 */ lis r3, 0x4330
/* 8023F7FC 0023B45C 80 A4 00 F8 */ lwz r5, 0x800000F8@l(r4)
@@ -60603,7 +60603,7 @@ lbl_8025751C:
/* 80257560 002531C0 7C 07 01 D6 */ mullw r0, r7, r0
/* 80257564 002531C4 7C 87 F1 D6 */ mullw r4, r7, r30
/* 80257568 002531C8 7C 63 02 14 */ add r3, r3, r0
-/* 8025756C 002531CC 4B F6 FD 0D */ bl func_801C7278
+/* 8025756C 002531CC 4B F6 FD 0D */ bl __div2i
/* 80257570 002531D0 90 9F 00 B4 */ stw r4, 0xb4(r31)
/* 80257574 002531D4 48 00 00 38 */ b lbl_802575AC
lbl_80257578:
@@ -60618,7 +60618,7 @@ lbl_80257578:
/* 80257598 002531F8 7C 07 01 D6 */ mullw r0, r7, r0
/* 8025759C 002531FC 7C 87 F1 D6 */ mullw r4, r7, r30
/* 802575A0 00253200 7C 63 02 14 */ add r3, r3, r0
-/* 802575A4 00253204 4B F6 FC D5 */ bl func_801C7278
+/* 802575A4 00253204 4B F6 FC D5 */ bl __div2i
/* 802575A8 00253208 90 9F 00 B4 */ stw r4, 0xb4(r31)
lbl_802575AC:
/* 802575AC 0025320C 80 7F 00 B4 */ lwz r3, 0xb4(r31)
@@ -66829,7 +66829,7 @@ lbl_8025CB94:
/* 8025CBC4 00258824 7C 65 19 10 */ subfe r3, r5, r3
/* 8025CBC8 00258828 38 A0 00 00 */ li r5, 0
/* 8025CBCC 0025882C 54 06 D1 BE */ srwi r6, r0, 6
-/* 8025CBD0 00258830 4B F6 A6 A9 */ bl func_801C7278
+/* 8025CBD0 00258830 4B F6 A6 A9 */ bl __div2i
/* 8025CBD4 00258834 38 00 00 00 */ li r0, 0
/* 8025CBD8 00258838 38 C0 27 10 */ li r6, 0x2710
/* 8025CBDC 0025883C 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -68649,10 +68649,10 @@ func_8025E370:
/* 8025E3A4 0025A004 38 A0 00 00 */ li r5, 0
/* 8025E3A8 0025A008 7C 67 19 10 */ subfe r3, r7, r3
/* 8025E3AC 0025A00C 54 06 D1 BE */ srwi r6, r0, 6
-/* 8025E3B0 0025A010 4B F6 8E C9 */ bl func_801C7278
+/* 8025E3B0 0025A010 4B F6 8E C9 */ bl __div2i
/* 8025E3B4 0025A014 38 C0 00 64 */ li r6, 0x64
/* 8025E3B8 0025A018 38 A0 00 00 */ li r5, 0
-/* 8025E3BC 0025A01C 4B F6 8E BD */ bl func_801C7278
+/* 8025E3BC 0025A01C 4B F6 8E BD */ bl __div2i
/* 8025E3C0 0025A020 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8025E3C4 0025A024 7C 83 23 78 */ mr r3, r4
/* 8025E3C8 0025A028 7C 08 03 A6 */ mtlr r0
@@ -68669,7 +68669,7 @@ func_8025E3D4:
/* 8025E3E8 0025A048 38 A0 00 00 */ li r5, 0
/* 8025E3EC 0025A04C 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 8025E3F0 0025A050 54 06 F0 BE */ srwi r6, r0, 2
-/* 8025E3F4 0025A054 4B F6 8E 85 */ bl func_801C7278
+/* 8025E3F4 0025A054 4B F6 8E 85 */ bl __div2i
/* 8025E3F8 0025A058 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8025E3FC 0025A05C 7C 83 23 78 */ mr r3, r4
/* 8025E400 0025A060 7C 08 03 A6 */ mtlr r0
@@ -73417,7 +73417,7 @@ lbl_80262348:
/* 80262370 0025DFD0 38 A0 00 00 */ li r5, 0
/* 80262374 0025DFD4 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 80262378 0025DFD8 54 06 F0 BE */ srwi r6, r0, 2
-/* 8026237C 0025DFDC 4B F6 4E FD */ bl func_801C7278
+/* 8026237C 0025DFDC 4B F6 4E FD */ bl __div2i
/* 80262380 0025DFE0 90 8D A7 30 */ stw r4, lbl_8063F9F0-_SDA_BASE_(r13)
/* 80262384 0025DFE4 38 60 00 00 */ li r3, 0
/* 80262388 0025DFE8 80 01 00 14 */ lwz r0, 0x14(r1)
@@ -82004,7 +82004,7 @@ func_80269734:
/* 802697B4 00265414 7C 7C 19 10 */ subfe r3, r28, r3
/* 802697B8 00265418 7F 45 D3 78 */ mr r5, r26
/* 802697BC 0026541C 7F 26 CB 78 */ mr r6, r25
-/* 802697C0 00265420 4B F5 DA B9 */ bl func_801C7278
+/* 802697C0 00265420 4B F5 DA B9 */ bl __div2i
/* 802697C4 00265424 38 00 00 01 */ li r0, 1
/* 802697C8 00265428 7C 84 00 14 */ addc r4, r4, r0
/* 802697CC 0026542C 7C 19 20 16 */ mulhwu r0, r25, r4
@@ -92704,7 +92704,7 @@ lbl_80272A6C:
/* 80272A80 0026E6E0 57 C4 18 38 */ slwi r4, r30, 3
/* 80272A84 0026E6E4 53 C3 1F 7E */ rlwimi r3, r30, 3, 0x1d, 0x1f
/* 80272A88 0026E6E8 54 06 8B FE */ srwi r6, r0, 0xf
-/* 80272A8C 0026E6EC 4B F5 47 ED */ bl func_801C7278
+/* 80272A8C 0026E6EC 4B F5 47 ED */ bl __div2i
/* 80272A90 0026E6F0 38 C0 03 E8 */ li r6, 0x3e8
/* 80272A94 0026E6F4 38 A0 00 00 */ li r5, 0
/* 80272A98 0026E6F8 4B F5 49 FD */ bl func_801C7494
@@ -92719,7 +92719,7 @@ lbl_80272A6C:
/* 80272ABC 0026E71C 54 00 F0 BE */ srwi r0, r0, 2
/* 80272AC0 0026E720 7C 06 00 16 */ mulhwu r0, r6, r0
/* 80272AC4 0026E724 54 06 D1 BE */ srwi r6, r0, 6
-/* 80272AC8 0026E728 4B F5 47 B1 */ bl func_801C7278
+/* 80272AC8 0026E728 4B F5 47 B1 */ bl __div2i
/* 80272ACC 0026E72C 38 C0 03 E8 */ li r6, 0x3e8
/* 80272AD0 0026E730 38 A0 00 00 */ li r5, 0
/* 80272AD4 0026E734 4B F5 49 C1 */ bl func_801C7494
@@ -92729,13 +92729,13 @@ lbl_80272A6C:
/* 80272AE4 0026E744 38 A0 00 00 */ li r5, 0
/* 80272AE8 0026E748 80 1A 00 F8 */ lwz r0, 0xf8(r26)
/* 80272AEC 0026E74C 54 06 F0 BE */ srwi r6, r0, 2
-/* 80272AF0 0026E750 4B F5 47 89 */ bl func_801C7278
+/* 80272AF0 0026E750 4B F5 47 89 */ bl __div2i
/* 80272AF4 0026E754 3F 60 00 01 */ lis r27, 0x00015180@ha
/* 80272AF8 0026E758 7C 9C 23 78 */ mr r28, r4
/* 80272AFC 0026E75C 7C 7A 1B 78 */ mr r26, r3
/* 80272B00 0026E760 38 A0 00 00 */ li r5, 0
/* 80272B04 0026E764 38 DB 51 80 */ addi r6, r27, 0x00015180@l
-/* 80272B08 0026E768 4B F5 47 71 */ bl func_801C7278
+/* 80272B08 0026E768 4B F5 47 71 */ bl __div2i
/* 80272B0C 0026E76C 3C 60 00 0B */ lis r3, 0x000B2575@ha
/* 80272B10 0026E770 38 DB 51 80 */ addi r6, r27, 0x5180
/* 80272B14 0026E774 38 03 25 75 */ addi r0, r3, 0x000B2575@l
@@ -95275,10 +95275,10 @@ lbl_80274DF8:
/* 80274E18 00270A78 7C 05 00 16 */ mulhwu r0, r5, r0
/* 80274E1C 00270A7C 54 06 D1 BE */ srwi r6, r0, 6
/* 80274E20 00270A80 38 A0 00 00 */ li r5, 0
-/* 80274E24 00270A84 4B F5 24 55 */ bl func_801C7278
+/* 80274E24 00270A84 4B F5 24 55 */ bl __div2i
/* 80274E28 00270A88 38 C0 00 64 */ li r6, 0x64
/* 80274E2C 00270A8C 38 A0 00 00 */ li r5, 0
-/* 80274E30 00270A90 4B F5 24 49 */ bl func_801C7278
+/* 80274E30 00270A90 4B F5 24 49 */ bl __div2i
/* 80274E34 00270A94 38 84 00 01 */ addi r4, r4, 1
/* 80274E38 00270A98 57 80 10 3A */ slwi r0, r28, 2
/* 80274E3C 00270A9C 7C 7F 02 14 */ add r3, r31, r0
diff --git a/asm/text_8.s b/asm/text_8.s
index 621d3e9..cb1ca39 100644
--- a/asm/text_8.s
+++ b/asm/text_8.s
@@ -601,7 +601,7 @@ lbl_80279E9C:
/* 80279EBC 00275B1C 54 63 18 38 */ slwi r3, r3, 3
/* 80279EC0 00275B20 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 80279EC4 00275B24 54 06 8B FE */ srwi r6, r0, 0xf
-/* 80279EC8 00275B28 4B F4 D3 B1 */ bl func_801C7278
+/* 80279EC8 00275B28 4B F4 D3 B1 */ bl __div2i
/* 80279ECC 00275B2C 7F 65 FE 70 */ srawi r5, r27, 0x1f
/* 80279ED0 00275B30 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 80279ED4 00275B34 6C A5 80 00 */ xoris r5, r5, 0x8000
@@ -660,7 +660,7 @@ lbl_80279F70:
/* 80279F90 00275BF0 54 63 18 38 */ slwi r3, r3, 3
/* 80279F94 00275BF4 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 80279F98 00275BF8 54 06 8B FE */ srwi r6, r0, 0xf
-/* 80279F9C 00275BFC 4B F4 D2 DD */ bl func_801C7278
+/* 80279F9C 00275BFC 4B F4 D2 DD */ bl __div2i
/* 80279FA0 00275C00 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 80279FA4 00275C04 6E E5 80 00 */ xoris r5, r23, 0x8000
/* 80279FA8 00275C08 7C 78 20 10 */ subfc r3, r24, r4
@@ -723,7 +723,7 @@ lbl_8027A054:
/* 8027A074 00275CD4 54 63 18 38 */ slwi r3, r3, 3
/* 8027A078 00275CD8 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A07C 00275CDC 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A080 00275CE0 4B F4 D1 F9 */ bl func_801C7278
+/* 8027A080 00275CE0 4B F4 D1 F9 */ bl __div2i
/* 8027A084 00275CE4 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A088 00275CE8 6F 45 80 00 */ xoris r5, r26, 0x8000
/* 8027A08C 00275CEC 7C 7B 20 10 */ subfc r3, r27, r4
@@ -750,7 +750,7 @@ lbl_8027A0BC:
/* 8027A0DC 00275D3C 54 63 18 38 */ slwi r3, r3, 3
/* 8027A0E0 00275D40 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A0E4 00275D44 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A0E8 00275D48 4B F4 D1 91 */ bl func_801C7278
+/* 8027A0E8 00275D48 4B F4 D1 91 */ bl __div2i
/* 8027A0EC 00275D4C 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A0F0 00275D50 6F 45 80 00 */ xoris r5, r26, 0x8000
/* 8027A0F4 00275D54 7C 7B 20 10 */ subfc r3, r27, r4
@@ -790,7 +790,7 @@ lbl_8027A158:
/* 8027A178 00275DD8 54 63 18 38 */ slwi r3, r3, 3
/* 8027A17C 00275DDC 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A180 00275DE0 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A184 00275DE4 4B F4 D0 F5 */ bl func_801C7278
+/* 8027A184 00275DE4 4B F4 D0 F5 */ bl __div2i
/* 8027A188 00275DE8 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A18C 00275DEC 6F 45 80 00 */ xoris r5, r26, 0x8000
/* 8027A190 00275DF0 7C 7B 20 10 */ subfc r3, r27, r4
@@ -823,7 +823,7 @@ lbl_8027A1D8:
/* 8027A1F8 00275E58 54 63 18 38 */ slwi r3, r3, 3
/* 8027A1FC 00275E5C 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A200 00275E60 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A204 00275E64 4B F4 D0 75 */ bl func_801C7278
+/* 8027A204 00275E64 4B F4 D0 75 */ bl __div2i
/* 8027A208 00275E68 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A20C 00275E6C 6F A5 80 00 */ xoris r5, r29, 0x8000
/* 8027A210 00275E70 7C 7E 20 10 */ subfc r3, r30, r4
@@ -934,7 +934,7 @@ lbl_8027A368:
/* 8027A388 00275FE8 54 63 18 38 */ slwi r3, r3, 3
/* 8027A38C 00275FEC 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A390 00275FF0 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A394 00275FF4 4B F4 CE E5 */ bl func_801C7278
+/* 8027A394 00275FF4 4B F4 CE E5 */ bl __div2i
/* 8027A398 00275FF8 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A39C 00275FFC 6E A5 80 00 */ xoris r5, r21, 0x8000
/* 8027A3A0 00276000 7C 78 20 10 */ subfc r3, r24, r4
@@ -962,7 +962,7 @@ lbl_8027A3D4:
/* 8027A3F4 00276054 54 63 18 38 */ slwi r3, r3, 3
/* 8027A3F8 00276058 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A3FC 0027605C 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A400 00276060 4B F4 CE 79 */ bl func_801C7278
+/* 8027A400 00276060 4B F4 CE 79 */ bl __div2i
/* 8027A404 00276064 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A408 00276068 6E A5 80 00 */ xoris r5, r21, 0x8000
/* 8027A40C 0027606C 7C 78 20 10 */ subfc r3, r24, r4
@@ -1039,7 +1039,7 @@ lbl_8027A4E8:
/* 8027A508 00276168 54 63 18 38 */ slwi r3, r3, 3
/* 8027A50C 0027616C 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A510 00276170 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A514 00276174 4B F4 CD 65 */ bl func_801C7278
+/* 8027A514 00276174 4B F4 CD 65 */ bl __div2i
/* 8027A518 00276178 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A51C 0027617C 6F 85 80 00 */ xoris r5, r28, 0x8000
/* 8027A520 00276180 7C 7B 20 10 */ subfc r3, r27, r4
@@ -1066,7 +1066,7 @@ lbl_8027A550:
/* 8027A570 002761D0 54 63 18 38 */ slwi r3, r3, 3
/* 8027A574 002761D4 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A578 002761D8 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A57C 002761DC 4B F4 CC FD */ bl func_801C7278
+/* 8027A57C 002761DC 4B F4 CC FD */ bl __div2i
/* 8027A580 002761E0 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A584 002761E4 6F 85 80 00 */ xoris r5, r28, 0x8000
/* 8027A588 002761E8 7C 7B 20 10 */ subfc r3, r27, r4
@@ -1100,7 +1100,7 @@ lbl_8027A5D4:
/* 8027A5F4 00276254 54 63 18 38 */ slwi r3, r3, 3
/* 8027A5F8 00276258 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A5FC 0027625C 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A600 00276260 4B F4 CC 79 */ bl func_801C7278
+/* 8027A600 00276260 4B F4 CC 79 */ bl __div2i
/* 8027A604 00276264 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A608 00276268 6F 85 80 00 */ xoris r5, r28, 0x8000
/* 8027A60C 0027626C 7C 7B 20 10 */ subfc r3, r27, r4
@@ -1127,7 +1127,7 @@ lbl_8027A63C:
/* 8027A65C 002762BC 54 63 18 38 */ slwi r3, r3, 3
/* 8027A660 002762C0 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A664 002762C4 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A668 002762C8 4B F4 CC 11 */ bl func_801C7278
+/* 8027A668 002762C8 4B F4 CC 11 */ bl __div2i
/* 8027A66C 002762CC 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A670 002762D0 6F 85 80 00 */ xoris r5, r28, 0x8000
/* 8027A674 002762D4 7C 7B 20 10 */ subfc r3, r27, r4
@@ -1208,7 +1208,7 @@ lbl_8027A764:
/* 8027A784 002763E4 54 63 18 38 */ slwi r3, r3, 3
/* 8027A788 002763E8 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A78C 002763EC 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A790 002763F0 4B F4 CA E9 */ bl func_801C7278
+/* 8027A790 002763F0 4B F4 CA E9 */ bl __div2i
/* 8027A794 002763F4 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A798 002763F8 6E 85 80 00 */ xoris r5, r20, 0x8000
/* 8027A79C 002763FC 7C 75 20 10 */ subfc r3, r21, r4
@@ -1241,7 +1241,7 @@ lbl_8027A7E4:
/* 8027A804 00276464 54 63 18 38 */ slwi r3, r3, 3
/* 8027A808 00276468 50 C3 1F 7E */ rlwimi r3, r6, 3, 0x1d, 0x1f
/* 8027A80C 0027646C 54 06 8B FE */ srwi r6, r0, 0xf
-/* 8027A810 00276470 4B F4 CA 69 */ bl func_801C7278
+/* 8027A810 00276470 4B F4 CA 69 */ bl __div2i
/* 8027A814 00276474 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 8027A818 00276478 6E 85 80 00 */ xoris r5, r20, 0x8000
/* 8027A81C 0027647C 7C 75 20 10 */ subfc r3, r21, r4
@@ -22006,7 +22006,7 @@ func_8028CE48:
/* 8028CE74 00288AD4 38 A0 00 00 */ li r5, 0
/* 8028CE78 00288AD8 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 8028CE7C 00288ADC 54 06 F0 BE */ srwi r6, r0, 2
-/* 8028CE80 00288AE0 4B F3 A3 F9 */ bl func_801C7278
+/* 8028CE80 00288AE0 4B F3 A3 F9 */ bl __div2i
/* 8028CE84 00288AE4 90 9F 00 0C */ stw r4, 0xc(r31)
/* 8028CE88 00288AE8 3C 60 80 43 */ lis r3, lbl_804361DC@ha
/* 8028CE8C 00288AEC 3C C0 80 29 */ lis r6, lbl_8028CDB4@ha
@@ -50877,7 +50877,7 @@ lbl_802A5E94:
/* 802A5EB4 002A1B14 80 FD 09 08 */ lwz r7, 0x908(r29)
/* 802A5EB8 002A1B18 54 06 F0 BE */ srwi r6, r0, 2
/* 802A5EBC 002A1B1C 7C 67 19 10 */ subfe r3, r7, r3
-/* 802A5EC0 002A1B20 4B F2 13 B9 */ bl func_801C7278
+/* 802A5EC0 002A1B20 4B F2 13 B9 */ bl __div2i
/* 802A5EC4 002A1B24 2C 04 00 01 */ cmpwi r4, 1
/* 802A5EC8 002A1B28 40 81 00 A0 */ ble lbl_802A5F68
/* 802A5ECC 002A1B2C 88 0D AE 62 */ lbz r0, lbl_80640122-_SDA_BASE_(r13)
@@ -51960,7 +51960,7 @@ lbl_802A6E0C:
/* 802A6E30 002A2A90 80 FD 08 F0 */ lwz r7, 0x8f0(r29)
/* 802A6E34 002A2A94 54 06 F0 BE */ srwi r6, r0, 2
/* 802A6E38 002A2A98 7C 67 19 10 */ subfe r3, r7, r3
-/* 802A6E3C 002A2A9C 4B F2 04 3D */ bl func_801C7278
+/* 802A6E3C 002A2A9C 4B F2 04 3D */ bl __div2i
/* 802A6E40 002A2AA0 88 0D AE 62 */ lbz r0, lbl_80640122-_SDA_BASE_(r13)
/* 802A6E44 002A2AA4 1C 00 00 3C */ mulli r0, r0, 0x3c
/* 802A6E48 002A2AA8 7C 04 00 00 */ cmpw r4, r0
diff --git a/asm/text_9.s b/asm/text_9.s
index 765d5e2..dc0c5d3 100644
--- a/asm/text_9.s
+++ b/asm/text_9.s
@@ -26256,7 +26256,7 @@ lbl_802E9920:
/* 802E9934 002E5594 54 00 F0 BE */ srwi r0, r0, 2
/* 802E9938 002E5598 7C 1D 00 16 */ mulhwu r0, r29, r0
/* 802E993C 002E559C 54 06 D1 BE */ srwi r6, r0, 6
-/* 802E9940 002E55A0 4B ED D9 39 */ bl func_801C7278
+/* 802E9940 002E55A0 4B ED D9 39 */ bl __div2i
/* 802E9944 002E55A4 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 802E9948 002E55A8 6F 45 80 00 */ xoris r5, r26, 0x8000
/* 802E994C 002E55AC 7C 7F 20 10 */ subfc r3, r31, r4
@@ -38245,7 +38245,7 @@ func_802F3DB8:
/* 802F3E18 002EFA78 57 84 18 38 */ slwi r4, r28, 3
/* 802F3E1C 002EFA7C 38 A0 00 00 */ li r5, 0
/* 802F3E20 002EFA80 54 06 8B FE */ srwi r6, r0, 0xf
-/* 802F3E24 002EFA84 4B ED 34 55 */ bl func_801C7278
+/* 802F3E24 002EFA84 4B ED 34 55 */ bl __div2i
/* 802F3E28 002EFA88 54 84 D0 3E */ rotlwi r4, r4, 0x1a
/* 802F3E2C 002EFA8C 7C 60 36 70 */ srawi r0, r3, 6
/* 802F3E30 002EFA90 50 64 D0 0A */ rlwimi r4, r3, 0x1a, 0, 5
@@ -38367,7 +38367,7 @@ lbl_802F3FAC:
/* 802F3FCC 002EFC2C 53 A3 1F 7E */ rlwimi r3, r29, 3, 0x1d, 0x1f
/* 802F3FD0 002EFC30 38 A0 00 00 */ li r5, 0
/* 802F3FD4 002EFC34 54 06 8B FE */ srwi r6, r0, 0xf
-/* 802F3FD8 002EFC38 4B ED 32 A1 */ bl func_801C7278
+/* 802F3FD8 002EFC38 4B ED 32 A1 */ bl __div2i
/* 802F3FDC 002EFC3C 80 1F 65 F4 */ lwz r0, 0x65f4(r31)
/* 802F3FE0 002EFC40 54 84 D0 3E */ rotlwi r4, r4, 0x1a
/* 802F3FE4 002EFC44 50 64 D0 0A */ rlwimi r4, r3, 0x1a, 0, 5
@@ -40142,7 +40142,7 @@ lbl_802F581C:
/* 802F5828 002F1488 54 00 F0 BE */ srwi r0, r0, 2
/* 802F582C 002F148C 7C 06 00 16 */ mulhwu r0, r6, r0
/* 802F5830 002F1490 54 06 D1 BE */ srwi r6, r0, 6
-/* 802F5834 002F1494 4B ED 1A 45 */ bl func_801C7278
+/* 802F5834 002F1494 4B ED 1A 45 */ bl __div2i
/* 802F5838 002F1498 7C 83 23 78 */ mr r3, r4
/* 802F583C 002F149C 48 00 08 89 */ bl func_802F60C4
/* 802F5840 002F14A0 7C 72 1B 78 */ mr r18, r3
@@ -41572,7 +41572,7 @@ lbl_802F6B60:
/* 802F6B78 002F27D8 54 00 F0 BE */ srwi r0, r0, 2
/* 802F6B7C 002F27DC 7C 06 00 16 */ mulhwu r0, r6, r0
/* 802F6B80 002F27E0 54 06 D1 BE */ srwi r6, r0, 6
-/* 802F6B84 002F27E4 4B ED 06 F5 */ bl func_801C7278
+/* 802F6B84 002F27E4 4B ED 06 F5 */ bl __div2i
/* 802F6B88 002F27E8 90 9B 00 04 */ stw r4, 4(r27)
/* 802F6B8C 002F27EC 90 7B 00 00 */ stw r3, 0(r27)
lbl_802F6B90:
@@ -57691,7 +57691,7 @@ lbl_80304614:
/* 8030462C 0030028C 38 A0 00 00 */ li r5, 0
/* 80304630 00300290 80 06 00 F8 */ lwz r0, 0x800000F8@l(r6)
/* 80304634 00300294 54 06 F0 BE */ srwi r6, r0, 2
-/* 80304638 00300298 4B EC 2C 41 */ bl func_801C7278
+/* 80304638 00300298 4B EC 2C 41 */ bl __div2i
/* 8030463C 0030029C 7F FF 20 10 */ subfc r31, r31, r4
/* 80304640 003002A0 38 60 00 00 */ li r3, 0
lbl_80304644:
@@ -89501,7 +89501,7 @@ lbl_8031F5F4:
/* 8031F640 0031B2A0 7C 66 19 10 */ subfe r3, r6, r3
/* 8031F644 0031B2A4 38 A0 00 00 */ li r5, 0
/* 8031F648 0031B2A8 54 06 D1 BE */ srwi r6, r0, 6
-/* 8031F64C 0031B2AC 4B EA 7C 2D */ bl func_801C7278
+/* 8031F64C 0031B2AC 4B EA 7C 2D */ bl __div2i
/* 8031F650 0031B2B0 38 A0 00 00 */ li r5, 0
/* 8031F654 0031B2B4 38 C0 01 2C */ li r6, 0x12c
/* 8031F658 0031B2B8 6C 60 80 00 */ xoris r0, r3, 0x8000
@@ -91411,7 +91411,7 @@ lbl_803210B0:
/* 803210EC 0031CD4C 7C 66 19 10 */ subfe r3, r6, r3
/* 803210F0 0031CD50 38 A0 00 00 */ li r5, 0
/* 803210F4 0031CD54 54 06 D1 BE */ srwi r6, r0, 6
-/* 803210F8 0031CD58 4B EA 61 81 */ bl func_801C7278
+/* 803210F8 0031CD58 4B EA 61 81 */ bl __div2i
/* 803210FC 0031CD5C 3C A0 00 01 */ lis r5, 0x0000EA60@ha
/* 80321100 0031CD60 38 00 00 00 */ li r0, 0
/* 80321104 0031CD64 38 C5 EA 60 */ addi r6, r5, 0x0000EA60@l
@@ -96319,7 +96319,7 @@ lbl_8032551C:
/* 80325584 003211E4 38 A0 00 00 */ li r5, 0
/* 80325588 003211E8 7C 67 19 10 */ subfe r3, r7, r3
/* 8032558C 003211EC 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325590 003211F0 4B EA 1C E9 */ bl func_801C7278
+/* 80325590 003211F0 4B EA 1C E9 */ bl __div2i
/* 80325594 003211F4 80 DD 01 D0 */ lwz r6, 0x1d0(r29)
/* 80325598 003211F8 3B E0 00 00 */ li r31, 0
/* 8032559C 003211FC 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96481,7 +96481,7 @@ lbl_803257A4:
/* 803257E8 00321448 38 A0 00 00 */ li r5, 0
/* 803257EC 0032144C 7C 67 19 10 */ subfe r3, r7, r3
/* 803257F0 00321450 54 06 D1 BE */ srwi r6, r0, 6
-/* 803257F4 00321454 4B EA 1A 85 */ bl func_801C7278
+/* 803257F4 00321454 4B EA 1A 85 */ bl __div2i
/* 803257F8 00321458 38 A0 00 00 */ li r5, 0
/* 803257FC 0032145C 6C 60 80 00 */ xoris r0, r3, 0x8000
/* 80325800 00321460 6C A5 80 00 */ xoris r5, r5, 0x8000
@@ -96534,7 +96534,7 @@ lbl_80325884:
/* 803258AC 0032150C 38 A0 00 00 */ li r5, 0
/* 803258B0 00321510 7C 67 19 10 */ subfe r3, r7, r3
/* 803258B4 00321514 54 06 D1 BE */ srwi r6, r0, 6
-/* 803258B8 00321518 4B EA 19 C1 */ bl func_801C7278
+/* 803258B8 00321518 4B EA 19 C1 */ bl __div2i
/* 803258BC 0032151C 3B E0 00 00 */ li r31, 0
/* 803258C0 00321520 6C 65 80 00 */ xoris r5, r3, 0x8000
/* 803258C4 00321524 6F E0 80 00 */ xoris r0, r31, 0x8000
@@ -96569,7 +96569,7 @@ lbl_80325884:
/* 80325938 00321598 38 A0 00 00 */ li r5, 0
/* 8032593C 0032159C 7C 67 19 10 */ subfe r3, r7, r3
/* 80325940 003215A0 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325944 003215A4 4B EA 19 35 */ bl func_801C7278
+/* 80325944 003215A4 4B EA 19 35 */ bl __div2i
/* 80325948 003215A8 3B E0 00 00 */ li r31, 0
/* 8032594C 003215AC 38 C0 61 A8 */ li r6, 0x61a8
/* 80325950 003215B0 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96608,7 +96608,7 @@ lbl_8032599C:
/* 803259D0 00321630 38 A0 00 00 */ li r5, 0
/* 803259D4 00321634 7C 67 19 10 */ subfe r3, r7, r3
/* 803259D8 00321638 54 06 D1 BE */ srwi r6, r0, 6
-/* 803259DC 0032163C 4B EA 18 9D */ bl func_801C7278
+/* 803259DC 0032163C 4B EA 18 9D */ bl __div2i
/* 803259E0 00321640 3B E0 00 00 */ li r31, 0
/* 803259E4 00321644 38 C0 17 70 */ li r6, 0x1770
/* 803259E8 00321648 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96684,7 +96684,7 @@ lbl_80325AA8:
/* 80325AF4 00321754 38 A0 00 00 */ li r5, 0
/* 80325AF8 00321758 7C 67 19 10 */ subfe r3, r7, r3
/* 80325AFC 0032175C 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325B00 00321760 4B EA 17 79 */ bl func_801C7278
+/* 80325B00 00321760 4B EA 17 79 */ bl __div2i
/* 80325B04 00321764 38 00 00 00 */ li r0, 0
/* 80325B08 00321768 38 C0 17 70 */ li r6, 0x1770
/* 80325B0C 0032176C 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96712,7 +96712,7 @@ lbl_80325B28:
/* 80325B60 003217C0 38 A0 00 00 */ li r5, 0
/* 80325B64 003217C4 7C 67 19 10 */ subfe r3, r7, r3
/* 80325B68 003217C8 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325B6C 003217CC 4B EA 17 0D */ bl func_801C7278
+/* 80325B6C 003217CC 4B EA 17 0D */ bl __div2i
/* 80325B70 003217D0 38 00 00 00 */ li r0, 0
/* 80325B74 003217D4 38 C0 4A 38 */ li r6, 0x4a38
/* 80325B78 003217D8 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96759,7 +96759,7 @@ lbl_80325B94:
/* 80325C18 00321878 38 A0 00 00 */ li r5, 0
/* 80325C1C 0032187C 7C 67 19 10 */ subfe r3, r7, r3
/* 80325C20 00321880 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325C24 00321884 4B EA 16 55 */ bl func_801C7278
+/* 80325C24 00321884 4B EA 16 55 */ bl __div2i
/* 80325C28 00321888 3B E0 00 00 */ li r31, 0
/* 80325C2C 0032188C 38 C0 75 30 */ li r6, 0x7530
/* 80325C30 00321890 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96863,7 +96863,7 @@ lbl_80325D5C:
/* 80325DA0 00321A00 38 A0 00 00 */ li r5, 0
/* 80325DA4 00321A04 7C 67 19 10 */ subfe r3, r7, r3
/* 80325DA8 00321A08 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325DAC 00321A0C 4B EA 14 CD */ bl func_801C7278
+/* 80325DAC 00321A0C 4B EA 14 CD */ bl __div2i
/* 80325DB0 00321A10 38 00 00 00 */ li r0, 0
/* 80325DB4 00321A14 38 C0 75 30 */ li r6, 0x7530
/* 80325DB8 00321A18 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -96958,7 +96958,7 @@ lbl_80325ED0:
/* 80325F08 00321B68 38 A0 00 00 */ li r5, 0
/* 80325F0C 00321B6C 7C 67 19 10 */ subfe r3, r7, r3
/* 80325F10 00321B70 54 06 D1 BE */ srwi r6, r0, 6
-/* 80325F14 00321B74 4B EA 13 65 */ bl func_801C7278
+/* 80325F14 00321B74 4B EA 13 65 */ bl __div2i
/* 80325F18 00321B78 38 00 00 00 */ li r0, 0
/* 80325F1C 00321B7C 38 C0 27 10 */ li r6, 0x2710
/* 80325F20 00321B80 6C 65 80 00 */ xoris r5, r3, 0x8000
@@ -97164,7 +97164,7 @@ lbl_803261D4:
/* 8032620C 00321E6C 38 A0 00 00 */ li r5, 0
/* 80326210 00321E70 7C 67 19 10 */ subfe r3, r7, r3
/* 80326214 00321E74 54 06 D1 BE */ srwi r6, r0, 6
-/* 80326218 00321E78 4B EA 10 61 */ bl func_801C7278
+/* 80326218 00321E78 4B EA 10 61 */ bl __div2i
/* 8032621C 00321E7C 38 00 00 00 */ li r0, 0
/* 80326220 00321E80 38 C0 0B B8 */ li r6, 0xbb8
/* 80326224 00321E84 6C 65 80 00 */ xoris r5, r3, 0x8000
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-24 20:39:27 +0000