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| author | Max <34987259+mparisi20@users.noreply.github.com> | 2020-09-30 11:11:34 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-30 11:11:34 -0400 |
| commit | 657b04e3b40680fa96de914c2c690b460a18d05e (patch) | |
| tree | 763ba0cc81604761870db7eeb0e6c06137969949 /asm/MetroTRK/targimpl.s | |
| parent | 89d7e06a792a5859b3d284257612820feb2980a2 (diff) | |
| parent | fa4ee0a512a03120599bd41ccb2987a93fb4224d (diff) | |
Merge pull request #109 from mparisi20/master
split the rest of MetroTRK, and add '*' escape sequence to postprocess.py
Diffstat (limited to 'asm/MetroTRK/targimpl.s')
| -rw-r--r-- | asm/MetroTRK/targimpl.s | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/asm/MetroTRK/targimpl.s b/asm/MetroTRK/targimpl.s index 5355556..47e43d4 100644 --- a/asm/MetroTRK/targimpl.s +++ b/asm/MetroTRK/targimpl.s @@ -56,7 +56,7 @@ TRKInterruptHandler: /* 801D72A8 001D2F08 60 42 08 98 */ ori r2, r2, lbl_80490898@l
/* 801D72AC 001D2F0C 7C 68 02 A6 */ mflr r3
/* 801D72B0 001D2F10 90 62 04 2C */ stw r3, 0x42c(r2)
-/* 801D72B4 001D2F14 48 00 22 6D */ bl func_801D9520
+/* 801D72B4 001D2F14 48 00 22 6D */ bl TRKUARTInterruptHandler
/* 801D72B8 001D2F18 3C 40 80 49 */ lis r2, lbl_80490898@h
/* 801D72BC 001D2F1C 60 42 08 98 */ ori r2, r2, lbl_80490898@l
/* 801D72C0 001D2F20 80 62 04 2C */ lwz r3, 0x42c(r2)
@@ -1867,3 +1867,14 @@ lbl_801D8C14: /* 801D8C24 001D4884 4E 80 00 20 */ blr
/* 801D8C28 001D4888 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
/* 801D8C2C 001D488C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
+
+.global $6fill$6
+$6fill$6:
+/* 801D8C30 001D4890 0F E0 00 00 */ twui r0, 0
+/* 801D8C34 001D4894 4E 80 00 20 */ blr
+/* 801D8C38 001D4898 0F E0 00 00 */ twui r0, 0
+/* 801D8C3C 001D489C 4E 80 00 20 */ blr
+/* 801D8C40 001D48A0 0F E0 00 00 */ twui r0, 0
+/* 801D8C44 001D48A4 4E 80 00 20 */ blr
+/* 801D8C48 001D48A8 0F E0 00 00 */ twui r0, 0
+/* 801D8C4C 001D48AC 4E 80 00 20 */ blr
|