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| author | Max <34987259+mparisi20@users.noreply.github.com> | 2020-10-04 13:46:40 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-10-04 13:46:40 -0400 |
| commit | eb574b30bc24d82badaa10f28713648d9cbe7b87 (patch) | |
| tree | de940633b2eae3a836a6f9b9981b58ce3bacece9 /asm/code_800097D8.s | |
| parent | bcae721dbb421c50416eed649e17e468ba46efc0 (diff) | |
| parent | db7f2f608adc0e77d64e5862c0e3fce12d0857de (diff) | |
Merge pull request #120 from mparisi20/master
Split MEM, MIX, DSP, TPL, and THP libraries
Diffstat (limited to 'asm/code_800097D8.s')
| -rw-r--r-- | asm/code_800097D8.s | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/asm/code_800097D8.s b/asm/code_800097D8.s index 61646a4..cec5044 100644 --- a/asm/code_800097D8.s +++ b/asm/code_800097D8.s @@ -372,7 +372,7 @@ func_80009B44: /* 80009CD8 00005938 80 7E 00 1C */ lwz r3, 0x1c(r30) /* 80009CDC 0000593C 38 81 00 10 */ addi r4, r1, 0x10 /* 80009CE0 00005940 38 A0 00 00 */ li r5, 0 -/* 80009CE4 00005944 48 29 1D 69 */ bl func_8029BA4C +/* 80009CE4 00005944 48 29 1D 69 */ bl TPLGetGXTexObjFromPalette /* 80009CE8 00005948 38 61 00 10 */ addi r3, r1, 0x10 /* 80009CEC 0000594C 38 80 00 00 */ li r4, 0 /* 80009CF0 00005950 48 27 8E D5 */ bl GXLoadTexObj @@ -600,7 +600,7 @@ lbl_80009EF0: /* 80009FD8 00005C38 38 A0 00 00 */ li r5, 0 /* 80009FDC 00005C3C 48 1D 2C D1 */ bl func_801DCCAC /* 80009FE0 00005C40 90 7C 00 1C */ stw r3, 0x1c(r28) -/* 80009FE4 00005C44 48 29 19 35 */ bl func_8029B918 +/* 80009FE4 00005C44 48 29 19 35 */ bl TPLBind /* 80009FE8 00005C48 80 01 00 44 */ lwz r0, 0x44(r1) /* 80009FEC 00005C4C 83 E1 00 3C */ lwz r31, 0x3c(r1) /* 80009FF0 00005C50 83 C1 00 38 */ lwz r30, 0x38(r1) @@ -655,7 +655,7 @@ lbl_8000A08C: /* 8000A098 00005CF8 80 8D 96 2C */ lwz r4, lbl_8063E8EC-_SDA_BASE_(r13) /* 8000A09C 00005CFC 38 7F 00 A0 */ addi r3, r31, 0xa0 /* 8000A0A0 00005D00 38 A0 00 20 */ li r5, 0x20 -/* 8000A0A4 00005D04 48 28 D6 A1 */ bl func_80297744 +/* 8000A0A4 00005D04 48 28 D6 A1 */ bl MEMInitAllocatorForExpHeap /* 8000A0A8 00005D08 38 80 00 00 */ li r4, 0 /* 8000A0AC 00005D0C 38 1F 00 A0 */ addi r0, r31, 0xa0 /* 8000A0B0 00005D10 90 9F 00 30 */ stw r4, 0x30(r31) |