diff options
author | Max <mparisi@stevens.edu> | 2020-09-29 19:18:08 -0400 |
---|---|---|
committer | Max <mparisi@stevens.edu> | 2020-09-29 19:18:08 -0400 |
commit | 0912e90a6ac1aee0d04cf4e26bc871a392b827d7 (patch) | |
tree | f0c99427dfbb5b3055f1added38a70303af04cba /asm/libstdc++/s_atan.s | |
parent | bb28572125c45ec20f5fbf85120cd71fb2486bac (diff) |
math library splits
Diffstat (limited to 'asm/libstdc++/s_atan.s')
-rw-r--r-- | asm/libstdc++/s_atan.s | 162 |
1 files changed, 162 insertions, 0 deletions
diff --git a/asm/libstdc++/s_atan.s b/asm/libstdc++/s_atan.s new file mode 100644 index 0000000..15a3fe0 --- /dev/null +++ b/asm/libstdc++/s_atan.s @@ -0,0 +1,162 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global atan
+atan:
+/* 801D3E0C 001CFA6C 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801D3E10 001CFA70 3C A0 80 40 */ lis r5, lbl_803FD5A8@ha
+/* 801D3E14 001CFA74 3C 00 44 10 */ lis r0, 0x4410
+/* 801D3E18 001CFA78 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3E1C 001CFA7C 38 A5 D5 A8 */ addi r5, r5, lbl_803FD5A8@l
+/* 801D3E20 001CFA80 80 C1 00 08 */ lwz r6, 8(r1)
+/* 801D3E24 001CFA84 54 C4 00 7E */ clrlwi r4, r6, 1
+/* 801D3E28 001CFA88 7C 04 00 00 */ cmpw r4, r0
+/* 801D3E2C 001CFA8C 41 80 00 6C */ blt lbl_801D3E98
+/* 801D3E30 001CFA90 3C 00 7F F0 */ lis r0, 0x7ff0
+/* 801D3E34 001CFA94 7C 04 00 00 */ cmpw r4, r0
+/* 801D3E38 001CFA98 41 81 00 1C */ bgt lbl_801D3E54
+/* 801D3E3C 001CFA9C 3C 04 80 10 */ addis r0, r4, 0x8010
+/* 801D3E40 001CFAA0 28 00 00 00 */ cmplwi r0, 0
+/* 801D3E44 001CFAA4 40 82 00 18 */ bne lbl_801D3E5C
+/* 801D3E48 001CFAA8 80 01 00 0C */ lwz r0, 0xc(r1)
+/* 801D3E4C 001CFAAC 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3E50 001CFAB0 41 82 00 0C */ beq lbl_801D3E5C
+lbl_801D3E54:
+/* 801D3E54 001CFAB4 FC 21 08 2A */ fadd f1, f1, f1
+/* 801D3E58 001CFAB8 48 00 01 EC */ b lbl_801D4044
+lbl_801D3E5C:
+/* 801D3E5C 001CFABC 2C 06 00 00 */ cmpwi r6, 0
+/* 801D3E60 001CFAC0 40 81 00 1C */ ble lbl_801D3E7C
+/* 801D3E64 001CFAC4 38 85 00 00 */ addi r4, r5, 0
+/* 801D3E68 001CFAC8 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D3E6C 001CFACC C8 24 00 18 */ lfd f1, 0x18(r4)
+/* 801D3E70 001CFAD0 C8 03 00 18 */ lfd f0, 0x18(r3)
+/* 801D3E74 001CFAD4 FC 21 00 2A */ fadd f1, f1, f0
+/* 801D3E78 001CFAD8 48 00 01 CC */ b lbl_801D4044
+lbl_801D3E7C:
+/* 801D3E7C 001CFADC 38 85 00 00 */ addi r4, r5, 0
+/* 801D3E80 001CFAE0 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D3E84 001CFAE4 C8 24 00 18 */ lfd f1, 0x18(r4)
+/* 801D3E88 001CFAE8 C8 03 00 18 */ lfd f0, 0x18(r3)
+/* 801D3E8C 001CFAEC FC 20 08 50 */ fneg f1, f1
+/* 801D3E90 001CFAF0 FC 21 00 28 */ fsub f1, f1, f0
+/* 801D3E94 001CFAF4 48 00 01 B0 */ b lbl_801D4044
+lbl_801D3E98:
+/* 801D3E98 001CFAF8 3C 00 3F DC */ lis r0, 0x3fdc
+/* 801D3E9C 001CFAFC 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EA0 001CFB00 40 80 00 30 */ bge lbl_801D3ED0
+/* 801D3EA4 001CFB04 3C 00 3E 20 */ lis r0, 0x3e20
+/* 801D3EA8 001CFB08 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EAC 001CFB0C 40 80 00 1C */ bge lbl_801D3EC8
+/* 801D3EB0 001CFB10 C8 42 95 58 */ lfd f2, lbl_80641B58-_SDA2_BASE_(r2)
+/* 801D3EB4 001CFB14 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3EB8 001CFB18 FC 42 08 2A */ fadd f2, f2, f1
+/* 801D3EBC 001CFB1C FC 02 00 40 */ fcmpo cr0, f2, f0
+/* 801D3EC0 001CFB20 40 81 00 08 */ ble lbl_801D3EC8
+/* 801D3EC4 001CFB24 48 00 01 80 */ b lbl_801D4044
+lbl_801D3EC8:
+/* 801D3EC8 001CFB28 38 00 FF FF */ li r0, -1
+/* 801D3ECC 001CFB2C 48 00 00 A4 */ b lbl_801D3F70
+lbl_801D3ED0:
+/* 801D3ED0 001CFB30 3C 00 3F F3 */ lis r0, 0x3ff3
+/* 801D3ED4 001CFB34 FC 60 0A 10 */ fabs f3, f1
+/* 801D3ED8 001CFB38 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EDC 001CFB3C 40 80 00 50 */ bge lbl_801D3F2C
+/* 801D3EE0 001CFB40 3C 00 3F E6 */ lis r0, 0x3fe6
+/* 801D3EE4 001CFB44 7C 04 00 00 */ cmpw r4, r0
+/* 801D3EE8 001CFB48 40 80 00 28 */ bge lbl_801D3F10
+/* 801D3EEC 001CFB4C C8 02 95 68 */ lfd f0, lbl_80641B68-_SDA2_BASE_(r2)
+/* 801D3EF0 001CFB50 38 00 00 00 */ li r0, 0
+/* 801D3EF4 001CFB54 C8 22 95 60 */ lfd f1, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3EF8 001CFB58 FC 40 00 F2 */ fmul f2, f0, f3
+/* 801D3EFC 001CFB5C FC 00 18 2A */ fadd f0, f0, f3
+/* 801D3F00 001CFB60 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D3F04 001CFB64 FC 21 00 24 */ fdiv f1, f1, f0
+/* 801D3F08 001CFB68 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F0C 001CFB6C 48 00 00 64 */ b lbl_801D3F70
+lbl_801D3F10:
+/* 801D3F10 001CFB70 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3F14 001CFB74 38 00 00 01 */ li r0, 1
+/* 801D3F18 001CFB78 FC 23 00 28 */ fsub f1, f3, f0
+/* 801D3F1C 001CFB7C FC 00 18 2A */ fadd f0, f0, f3
+/* 801D3F20 001CFB80 FC 21 00 24 */ fdiv f1, f1, f0
+/* 801D3F24 001CFB84 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F28 001CFB88 48 00 00 48 */ b lbl_801D3F70
+lbl_801D3F2C:
+/* 801D3F2C 001CFB8C 3C 60 40 04 */ lis r3, 0x40038000@ha
+/* 801D3F30 001CFB90 38 03 80 00 */ addi r0, r3, 0x40038000@l
+/* 801D3F34 001CFB94 7C 04 00 00 */ cmpw r4, r0
+/* 801D3F38 001CFB98 40 80 00 28 */ bge lbl_801D3F60
+/* 801D3F3C 001CFB9C C8 42 95 70 */ lfd f2, lbl_80641B70-_SDA2_BASE_(r2)
+/* 801D3F40 001CFBA0 38 00 00 02 */ li r0, 2
+/* 801D3F44 001CFBA4 C8 02 95 60 */ lfd f0, lbl_80641B60-_SDA2_BASE_(r2)
+/* 801D3F48 001CFBA8 FC 22 00 F2 */ fmul f1, f2, f3
+/* 801D3F4C 001CFBAC FC 43 10 28 */ fsub f2, f3, f2
+/* 801D3F50 001CFBB0 FC 00 08 2A */ fadd f0, f0, f1
+/* 801D3F54 001CFBB4 FC 22 00 24 */ fdiv f1, f2, f0
+/* 801D3F58 001CFBB8 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D3F5C 001CFBBC 48 00 00 14 */ b lbl_801D3F70
+lbl_801D3F60:
+/* 801D3F60 001CFBC0 C8 02 95 78 */ lfd f0, lbl_80641B78-_SDA2_BASE_(r2)
+/* 801D3F64 001CFBC4 38 00 00 03 */ li r0, 3
+/* 801D3F68 001CFBC8 FC 20 18 24 */ fdiv f1, f0, f3
+/* 801D3F6C 001CFBCC D8 21 00 08 */ stfd f1, 8(r1)
+lbl_801D3F70:
+/* 801D3F70 001CFBD0 FC 01 00 72 */ fmul f0, f1, f1
+/* 801D3F74 001CFBD4 38 65 00 40 */ addi r3, r5, 0x40
+/* 801D3F78 001CFBD8 C8 63 00 50 */ lfd f3, 0x50(r3)
+/* 801D3F7C 001CFBDC 2C 00 00 00 */ cmpwi r0, 0
+/* 801D3F80 001CFBE0 C8 43 00 48 */ lfd f2, 0x48(r3)
+/* 801D3F84 001CFBE4 C9 63 00 40 */ lfd f11, 0x40(r3)
+/* 801D3F88 001CFBE8 FD A0 00 32 */ fmul f13, f0, f0
+/* 801D3F8C 001CFBEC C8 A3 00 38 */ lfd f5, 0x38(r3)
+/* 801D3F90 001CFBF0 C9 43 00 30 */ lfd f10, 0x30(r3)
+/* 801D3F94 001CFBF4 C8 83 00 28 */ lfd f4, 0x28(r3)
+/* 801D3F98 001CFBF8 C9 23 00 20 */ lfd f9, 0x20(r3)
+/* 801D3F9C 001CFBFC FD 8D 00 F2 */ fmul f12, f13, f3
+/* 801D3FA0 001CFC00 C8 63 00 18 */ lfd f3, 0x18(r3)
+/* 801D3FA4 001CFC04 FC CD 00 B2 */ fmul f6, f13, f2
+/* 801D3FA8 001CFC08 C9 03 00 10 */ lfd f8, 0x10(r3)
+/* 801D3FAC 001CFC0C C8 43 00 08 */ lfd f2, 8(r3)
+/* 801D3FB0 001CFC10 FD 6B 60 2A */ fadd f11, f11, f12
+/* 801D3FB4 001CFC14 C8 E5 00 40 */ lfd f7, 0x40(r5)
+/* 801D3FB8 001CFC18 FC A5 30 2A */ fadd f5, f5, f6
+/* 801D3FBC 001CFC1C FC CD 02 F2 */ fmul f6, f13, f11
+/* 801D3FC0 001CFC20 FC AD 01 72 */ fmul f5, f13, f5
+/* 801D3FC4 001CFC24 FC CA 30 2A */ fadd f6, f10, f6
+/* 801D3FC8 001CFC28 FC 84 28 2A */ fadd f4, f4, f5
+/* 801D3FCC 001CFC2C FC AD 01 B2 */ fmul f5, f13, f6
+/* 801D3FD0 001CFC30 FC 8D 01 32 */ fmul f4, f13, f4
+/* 801D3FD4 001CFC34 FC A9 28 2A */ fadd f5, f9, f5
+/* 801D3FD8 001CFC38 FC 63 20 2A */ fadd f3, f3, f4
+/* 801D3FDC 001CFC3C FC 8D 01 72 */ fmul f4, f13, f5
+/* 801D3FE0 001CFC40 FC 6D 00 F2 */ fmul f3, f13, f3
+/* 801D3FE4 001CFC44 FC 88 20 2A */ fadd f4, f8, f4
+/* 801D3FE8 001CFC48 FC 42 18 2A */ fadd f2, f2, f3
+/* 801D3FEC 001CFC4C FC 6D 01 32 */ fmul f3, f13, f4
+/* 801D3FF0 001CFC50 FC 8D 00 B2 */ fmul f4, f13, f2
+/* 801D3FF4 001CFC54 FC 47 18 2A */ fadd f2, f7, f3
+/* 801D3FF8 001CFC58 FC 00 00 B2 */ fmul f0, f0, f2
+/* 801D3FFC 001CFC5C 40 80 00 14 */ bge lbl_801D4010
+/* 801D4000 001CFC60 FC 00 20 2A */ fadd f0, f0, f4
+/* 801D4004 001CFC64 FC 01 00 32 */ fmul f0, f1, f0
+/* 801D4008 001CFC68 FC 21 00 28 */ fsub f1, f1, f0
+/* 801D400C 001CFC6C 48 00 00 38 */ b lbl_801D4044
+lbl_801D4010:
+/* 801D4010 001CFC70 FC 00 20 2A */ fadd f0, f0, f4
+/* 801D4014 001CFC74 54 00 18 38 */ slwi r0, r0, 3
+/* 801D4018 001CFC78 38 65 00 20 */ addi r3, r5, 0x20
+/* 801D401C 001CFC7C 38 85 00 00 */ addi r4, r5, 0
+/* 801D4020 001CFC80 7C 43 04 AE */ lfdx f2, r3, r0
+/* 801D4024 001CFC84 2C 06 00 00 */ cmpwi r6, 0
+/* 801D4028 001CFC88 FC 61 00 32 */ fmul f3, f1, f0
+/* 801D402C 001CFC8C 7C 04 04 AE */ lfdx f0, r4, r0
+/* 801D4030 001CFC90 FC 43 10 28 */ fsub f2, f3, f2
+/* 801D4034 001CFC94 FC 22 08 28 */ fsub f1, f2, f1
+/* 801D4038 001CFC98 FC 20 08 28 */ fsub f1, f0, f1
+/* 801D403C 001CFC9C 40 80 00 08 */ bge lbl_801D4044
+/* 801D4040 001CFCA0 FC 20 08 50 */ fneg f1, f1
+lbl_801D4044:
+/* 801D4044 001CFCA4 38 21 00 10 */ addi r1, r1, 0x10
+/* 801D4048 001CFCA8 4E 80 00 20 */ blr
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