diff options
Diffstat (limited to 'asm/libstdc++/s_floor.s')
-rw-r--r-- | asm/libstdc++/s_floor.s | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/asm/libstdc++/s_floor.s b/asm/libstdc++/s_floor.s new file mode 100644 index 0000000..aed6568 --- /dev/null +++ b/asm/libstdc++/s_floor.s @@ -0,0 +1,99 @@ +.include "macros.inc"
+
+.section .text, "ax" # 0x80006980 - 0x803E1E60
+
+.global floor
+floor:
+/* 801D414C 001CFDAC 94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 801D4150 001CFDB0 D8 21 00 08 */ stfd f1, 8(r1)
+/* 801D4154 001CFDB4 80 A1 00 08 */ lwz r5, 8(r1)
+/* 801D4158 001CFDB8 80 C1 00 0C */ lwz r6, 0xc(r1)
+/* 801D415C 001CFDBC 54 A3 65 7E */ rlwinm r3, r5, 0xc, 0x15, 0x1f
+/* 801D4160 001CFDC0 38 E3 FC 01 */ addi r7, r3, -1023
+/* 801D4164 001CFDC4 2C 87 00 14 */ cmpwi cr1, r7, 0x14
+/* 801D4168 001CFDC8 40 84 00 98 */ bge cr1, lbl_801D4200
+/* 801D416C 001CFDCC 2C 07 00 00 */ cmpwi r7, 0
+/* 801D4170 001CFDD0 40 80 00 44 */ bge lbl_801D41B4
+/* 801D4174 001CFDD4 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D4178 001CFDD8 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D417C 001CFDDC FC 22 08 2A */ fadd f1, f2, f1
+/* 801D4180 001CFDE0 FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D4184 001CFDE4 40 81 00 F8 */ ble lbl_801D427C
+/* 801D4188 001CFDE8 2C 05 00 00 */ cmpwi r5, 0
+/* 801D418C 001CFDEC 41 80 00 10 */ blt lbl_801D419C
+/* 801D4190 001CFDF0 38 C0 00 00 */ li r6, 0
+/* 801D4194 001CFDF4 38 A0 00 00 */ li r5, 0
+/* 801D4198 001CFDF8 48 00 00 E4 */ b lbl_801D427C
+lbl_801D419C:
+/* 801D419C 001CFDFC 54 A0 00 7E */ clrlwi r0, r5, 1
+/* 801D41A0 001CFE00 7C 00 33 79 */ or. r0, r0, r6
+/* 801D41A4 001CFE04 41 82 00 D8 */ beq lbl_801D427C
+/* 801D41A8 001CFE08 3C A0 BF F0 */ lis r5, 0xbff0
+/* 801D41AC 001CFE0C 38 C0 00 00 */ li r6, 0
+/* 801D41B0 001CFE10 48 00 00 CC */ b lbl_801D427C
+lbl_801D41B4:
+/* 801D41B4 001CFE14 3C 60 00 10 */ lis r3, 0x000FFFFF@ha
+/* 801D41B8 001CFE18 38 03 FF FF */ addi r0, r3, 0x000FFFFF@l
+/* 801D41BC 001CFE1C 7C 04 3E 30 */ sraw r4, r0, r7
+/* 801D41C0 001CFE20 7C A0 20 38 */ and r0, r5, r4
+/* 801D41C4 001CFE24 7C C0 03 79 */ or. r0, r6, r0
+/* 801D41C8 001CFE28 40 82 00 08 */ bne lbl_801D41D0
+/* 801D41CC 001CFE2C 48 00 00 BC */ b lbl_801D4288
+lbl_801D41D0:
+/* 801D41D0 001CFE30 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D41D4 001CFE34 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D41D8 001CFE38 FC 22 08 2A */ fadd f1, f2, f1
+/* 801D41DC 001CFE3C FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D41E0 001CFE40 40 81 00 9C */ ble lbl_801D427C
+/* 801D41E4 001CFE44 2C 05 00 00 */ cmpwi r5, 0
+/* 801D41E8 001CFE48 40 80 00 0C */ bge lbl_801D41F4
+/* 801D41EC 001CFE4C 7C 60 3E 30 */ sraw r0, r3, r7
+/* 801D41F0 001CFE50 7C A5 02 14 */ add r5, r5, r0
+lbl_801D41F4:
+/* 801D41F4 001CFE54 7C A5 20 78 */ andc r5, r5, r4
+/* 801D41F8 001CFE58 38 C0 00 00 */ li r6, 0
+/* 801D41FC 001CFE5C 48 00 00 80 */ b lbl_801D427C
+lbl_801D4200:
+/* 801D4200 001CFE60 2C 07 00 33 */ cmpwi r7, 0x33
+/* 801D4204 001CFE64 40 81 00 14 */ ble lbl_801D4218
+/* 801D4208 001CFE68 2C 07 04 00 */ cmpwi r7, 0x400
+/* 801D420C 001CFE6C 40 82 00 7C */ bne lbl_801D4288
+/* 801D4210 001CFE70 FC 21 08 2A */ fadd f1, f1, f1
+/* 801D4214 001CFE74 48 00 00 74 */ b lbl_801D4288
+lbl_801D4218:
+/* 801D4218 001CFE78 38 07 FF EC */ addi r0, r7, -20
+/* 801D421C 001CFE7C 38 60 FF FF */ li r3, -1
+/* 801D4220 001CFE80 7C 64 04 30 */ srw r4, r3, r0
+/* 801D4224 001CFE84 7C C0 20 39 */ and. r0, r6, r4
+/* 801D4228 001CFE88 40 82 00 08 */ bne lbl_801D4230
+/* 801D422C 001CFE8C 48 00 00 5C */ b lbl_801D4288
+lbl_801D4230:
+/* 801D4230 001CFE90 C8 42 95 88 */ lfd f2, lbl_80641B88-_SDA2_BASE_(r2)
+/* 801D4234 001CFE94 C8 02 95 90 */ lfd f0, lbl_80641B90-_SDA2_BASE_(r2)
+/* 801D4238 001CFE98 FC 22 08 2A */ fadd f1, f2, f1
+/* 801D423C 001CFE9C FC 01 00 40 */ fcmpo cr0, f1, f0
+/* 801D4240 001CFEA0 40 81 00 3C */ ble lbl_801D427C
+/* 801D4244 001CFEA4 2C 05 00 00 */ cmpwi r5, 0
+/* 801D4248 001CFEA8 40 80 00 30 */ bge lbl_801D4278
+/* 801D424C 001CFEAC 40 86 00 0C */ bne cr1, lbl_801D4258
+/* 801D4250 001CFEB0 38 A5 00 01 */ addi r5, r5, 1
+/* 801D4254 001CFEB4 48 00 00 24 */ b lbl_801D4278
+lbl_801D4258:
+/* 801D4258 001CFEB8 20 07 00 34 */ subfic r0, r7, 0x34
+/* 801D425C 001CFEBC 38 60 00 01 */ li r3, 1
+/* 801D4260 001CFEC0 7C 60 00 30 */ slw r0, r3, r0
+/* 801D4264 001CFEC4 7C 06 02 14 */ add r0, r6, r0
+/* 801D4268 001CFEC8 7C 00 30 40 */ cmplw r0, r6
+/* 801D426C 001CFECC 40 80 00 08 */ bge lbl_801D4274
+/* 801D4270 001CFED0 38 A5 00 01 */ addi r5, r5, 1
+lbl_801D4274:
+/* 801D4274 001CFED4 7C 06 03 78 */ mr r6, r0
+lbl_801D4278:
+/* 801D4278 001CFED8 7C C6 20 78 */ andc r6, r6, r4
+lbl_801D427C:
+/* 801D427C 001CFEDC 90 A1 00 08 */ stw r5, 8(r1)
+/* 801D4280 001CFEE0 90 C1 00 0C */ stw r6, 0xc(r1)
+/* 801D4284 001CFEE4 C8 21 00 08 */ lfd f1, 8(r1)
+lbl_801D4288:
+/* 801D4288 001CFEE8 38 21 00 10 */ addi r1, r1, 0x10
+/* 801D428C 001CFEEC 4E 80 00 20 */ blr
|