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.include "macros.inc"
.section .text, "ax" # 0x80006980 - 0x803E1E60
.global __kernel_sin
__kernel_sin:
/* 801D3AF4 001CF754 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 801D3AF8 001CF758 3C 00 3E 40 */ lis r0, 0x3e40
/* 801D3AFC 001CF75C D8 21 00 08 */ stfd f1, 8(r1)
/* 801D3B00 001CF760 80 81 00 08 */ lwz r4, 8(r1)
/* 801D3B04 001CF764 54 84 00 7E */ clrlwi r4, r4, 1
/* 801D3B08 001CF768 7C 04 00 00 */ cmpw r4, r0
/* 801D3B0C 001CF76C 40 80 00 1C */ bge lbl_801D3B28
/* 801D3B10 001CF770 FC 00 08 1E */ fctiwz f0, f1
/* 801D3B14 001CF774 D8 01 00 10 */ stfd f0, 0x10(r1)
/* 801D3B18 001CF778 80 01 00 14 */ lwz r0, 0x14(r1)
/* 801D3B1C 001CF77C 2C 00 00 00 */ cmpwi r0, 0
/* 801D3B20 001CF780 40 82 00 08 */ bne lbl_801D3B28
/* 801D3B24 001CF784 48 00 00 88 */ b lbl_801D3BAC
lbl_801D3B28:
/* 801D3B28 001CF788 FC E1 00 72 */ fmul f7, f1, f1
/* 801D3B2C 001CF78C C8 02 95 08 */ lfd f0, lbl_80641B08-_SDA2_BASE_(r2)
/* 801D3B30 001CF790 C8 A2 95 00 */ lfd f5, lbl_80641B00-_SDA2_BASE_(r2)
/* 801D3B34 001CF794 2C 03 00 00 */ cmpwi r3, 0
/* 801D3B38 001CF798 C8 82 94 F8 */ lfd f4, lbl_80641AF8-_SDA2_BASE_(r2)
/* 801D3B3C 001CF79C C8 62 94 F0 */ lfd f3, lbl_80641AF0-_SDA2_BASE_(r2)
/* 801D3B40 001CF7A0 FC C0 01 F2 */ fmul f6, f0, f7
/* 801D3B44 001CF7A4 C8 02 94 E8 */ lfd f0, lbl_80641AE8-_SDA2_BASE_(r2)
/* 801D3B48 001CF7A8 FD 07 00 72 */ fmul f8, f7, f1
/* 801D3B4C 001CF7AC FC A5 30 2A */ fadd f5, f5, f6
/* 801D3B50 001CF7B0 FC A7 01 72 */ fmul f5, f7, f5
/* 801D3B54 001CF7B4 FC 84 28 2A */ fadd f4, f4, f5
/* 801D3B58 001CF7B8 FC 87 01 32 */ fmul f4, f7, f4
/* 801D3B5C 001CF7BC FC 63 20 2A */ fadd f3, f3, f4
/* 801D3B60 001CF7C0 FC 67 00 F2 */ fmul f3, f7, f3
/* 801D3B64 001CF7C4 FC 00 18 2A */ fadd f0, f0, f3
/* 801D3B68 001CF7C8 40 82 00 1C */ bne lbl_801D3B84
/* 801D3B6C 001CF7CC FC 47 00 32 */ fmul f2, f7, f0
/* 801D3B70 001CF7D0 C8 02 95 10 */ lfd f0, lbl_80641B10-_SDA2_BASE_(r2)
/* 801D3B74 001CF7D4 FC 00 10 2A */ fadd f0, f0, f2
/* 801D3B78 001CF7D8 FC 08 00 32 */ fmul f0, f8, f0
/* 801D3B7C 001CF7DC FC 21 00 2A */ fadd f1, f1, f0
/* 801D3B80 001CF7E0 48 00 00 2C */ b lbl_801D3BAC
lbl_801D3B84:
/* 801D3B84 001CF7E4 C8 82 95 18 */ lfd f4, lbl_80641B18-_SDA2_BASE_(r2)
/* 801D3B88 001CF7E8 FC 68 00 32 */ fmul f3, f8, f0
/* 801D3B8C 001CF7EC C8 02 95 10 */ lfd f0, lbl_80641B10-_SDA2_BASE_(r2)
/* 801D3B90 001CF7F0 FC 84 00 B2 */ fmul f4, f4, f2
/* 801D3B94 001CF7F4 FC 00 02 32 */ fmul f0, f0, f8
/* 801D3B98 001CF7F8 FC 64 18 28 */ fsub f3, f4, f3
/* 801D3B9C 001CF7FC FC 67 00 F2 */ fmul f3, f7, f3
/* 801D3BA0 001CF800 FC 43 10 28 */ fsub f2, f3, f2
/* 801D3BA4 001CF804 FC 02 00 28 */ fsub f0, f2, f0
/* 801D3BA8 001CF808 FC 21 00 28 */ fsub f1, f1, f0
lbl_801D3BAC:
/* 801D3BAC 001CF80C 38 21 00 20 */ addi r1, r1, 0x20
/* 801D3BB0 001CF810 4E 80 00 20 */ blr
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