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.include "macros.inc"
.section .init, "ax" # 0x80004000 - 0x800064E0
.global TRK_memset
TRK_memset:
/* 80004134 00000234 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80004138 00000238 7C 08 02 A6 */ mflr r0
/* 8000413C 0000023C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80004140 00000240 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80004144 00000244 7C 7F 1B 78 */ mr r31, r3
/* 80004148 00000248 48 1D 2F F5 */ bl TRK_fill_mem
/* 8000414C 0000024C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80004150 00000250 7F E3 FB 78 */ mr r3, r31
/* 80004154 00000254 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80004158 00000258 7C 08 03 A6 */ mtlr r0
/* 8000415C 0000025C 38 21 00 10 */ addi r1, r1, 0x10
/* 80004160 00000260 4E 80 00 20 */ blr
.global TRK_memcpy
TRK_memcpy:
/* 80004164 00000264 38 84 FF FF */ addi r4, r4, -1
/* 80004168 00000268 38 C3 FF FF */ addi r6, r3, -1
/* 8000416C 0000026C 38 A5 00 01 */ addi r5, r5, 1
/* 80004170 00000270 48 00 00 0C */ b lbl_8000417C
lbl_80004174:
/* 80004174 00000274 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80004178 00000278 9C 06 00 01 */ stbu r0, 1(r6)
lbl_8000417C:
/* 8000417C 0000027C 34 A5 FF FF */ addic. r5, r5, -1
/* 80004180 00000280 40 82 FF F4 */ bne lbl_80004174
/* 80004184 00000284 4E 80 00 20 */ blr
.section .text, "ax" # 0x80006980 - 0x803E1E60
.global TRK_fill_mem
TRK_fill_mem:
/* 801D713C 001D2D9C 28 05 00 20 */ cmplwi r5, 0x20
/* 801D7140 001D2DA0 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 801D7144 001D2DA4 38 C3 FF FF */ addi r6, r3, -1
/* 801D7148 001D2DA8 7C 87 23 78 */ mr r7, r4
/* 801D714C 001D2DAC 41 80 00 90 */ blt lbl_801D71DC
/* 801D7150 001D2DB0 7C C0 30 F8 */ nor r0, r6, r6
/* 801D7154 001D2DB4 54 03 07 BF */ clrlwi. r3, r0, 0x1e
/* 801D7158 001D2DB8 41 82 00 14 */ beq lbl_801D716C
/* 801D715C 001D2DBC 7C A3 28 50 */ subf r5, r3, r5
lbl_801D7160:
/* 801D7160 001D2DC0 34 63 FF FF */ addic. r3, r3, -1
/* 801D7164 001D2DC4 9C E6 00 01 */ stbu r7, 1(r6)
/* 801D7168 001D2DC8 40 82 FF F8 */ bne lbl_801D7160
lbl_801D716C:
/* 801D716C 001D2DCC 28 07 00 00 */ cmplwi r7, 0
/* 801D7170 001D2DD0 41 82 00 1C */ beq lbl_801D718C
/* 801D7174 001D2DD4 54 E3 C0 0E */ slwi r3, r7, 0x18
/* 801D7178 001D2DD8 54 E0 80 1E */ slwi r0, r7, 0x10
/* 801D717C 001D2DDC 54 E4 40 2E */ slwi r4, r7, 8
/* 801D7180 001D2DE0 7C 60 03 78 */ or r0, r3, r0
/* 801D7184 001D2DE4 7C 80 03 78 */ or r0, r4, r0
/* 801D7188 001D2DE8 7C E7 03 78 */ or r7, r7, r0
lbl_801D718C:
/* 801D718C 001D2DEC 54 A4 D9 7F */ rlwinm. r4, r5, 0x1b, 5, 0x1f
/* 801D7190 001D2DF0 38 66 FF FD */ addi r3, r6, -3
/* 801D7194 001D2DF4 41 82 00 2C */ beq lbl_801D71C0
lbl_801D7198:
/* 801D7198 001D2DF8 90 E3 00 04 */ stw r7, 4(r3)
/* 801D719C 001D2DFC 34 84 FF FF */ addic. r4, r4, -1
/* 801D71A0 001D2E00 90 E3 00 08 */ stw r7, 8(r3)
/* 801D71A4 001D2E04 90 E3 00 0C */ stw r7, 0xc(r3)
/* 801D71A8 001D2E08 90 E3 00 10 */ stw r7, 0x10(r3)
/* 801D71AC 001D2E0C 90 E3 00 14 */ stw r7, 0x14(r3)
/* 801D71B0 001D2E10 90 E3 00 18 */ stw r7, 0x18(r3)
/* 801D71B4 001D2E14 90 E3 00 1C */ stw r7, 0x1c(r3)
/* 801D71B8 001D2E18 94 E3 00 20 */ stwu r7, 0x20(r3)
/* 801D71BC 001D2E1C 40 82 FF DC */ bne lbl_801D7198
lbl_801D71C0:
/* 801D71C0 001D2E20 54 A4 F7 7F */ rlwinm. r4, r5, 0x1e, 0x1d, 0x1f
/* 801D71C4 001D2E24 41 82 00 10 */ beq lbl_801D71D4
lbl_801D71C8:
/* 801D71C8 001D2E28 34 84 FF FF */ addic. r4, r4, -1
/* 801D71CC 001D2E2C 94 E3 00 04 */ stwu r7, 4(r3)
/* 801D71D0 001D2E30 40 82 FF F8 */ bne lbl_801D71C8
lbl_801D71D4:
/* 801D71D4 001D2E34 38 C3 00 03 */ addi r6, r3, 3
/* 801D71D8 001D2E38 54 A5 07 BE */ clrlwi r5, r5, 0x1e
lbl_801D71DC:
/* 801D71DC 001D2E3C 28 05 00 00 */ cmplwi r5, 0
/* 801D71E0 001D2E40 4D 82 00 20 */ beqlr
lbl_801D71E4:
/* 801D71E4 001D2E44 34 A5 FF FF */ addic. r5, r5, -1
/* 801D71E8 001D2E48 9C E6 00 01 */ stbu r7, 1(r6)
/* 801D71EC 001D2E4C 40 82 FF F8 */ bne lbl_801D71E4
/* 801D71F0 001D2E50 4E 80 00 20 */ blr
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