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.include "macros.inc"
.section .text, "ax" # 0x80006980 - 0x803E1E60
.global __OSInitNet
__OSInitNet:
/* 80274110 0026FD70 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80274114 0026FD74 7C 08 02 A6 */ mflr r0
/* 80274118 0026FD78 90 01 00 24 */ stw r0, 0x24(r1)
/* 8027411C 0026FD7C 38 61 00 08 */ addi r3, r1, 8
/* 80274120 0026FD80 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 80274124 0026FD84 3F E0 80 43 */ lis r31, lbl_80433DA0@ha
/* 80274128 0026FD88 3B FF 3D A0 */ addi r31, r31, lbl_80433DA0@l
/* 8027412C 0026FD8C 4B FF 43 95 */ bl __OSGetIOSRev
/* 80274130 0026FD90 88 01 00 09 */ lbz r0, 9(r1)
/* 80274134 0026FD94 28 00 00 04 */ cmplwi r0, 4
/* 80274138 0026FD98 40 81 00 68 */ ble lbl_802741A0
/* 8027413C 0026FD9C 28 00 00 09 */ cmplwi r0, 9
/* 80274140 0026FDA0 40 82 00 08 */ bne lbl_80274148
/* 80274144 0026FDA4 48 00 00 5C */ b lbl_802741A0
lbl_80274148:
/* 80274148 0026FDA8 48 09 0B D5 */ bl NWC24iPrepareShutdown
/* 8027414C 0026FDAC 2C 03 00 00 */ cmpwi r3, 0
/* 80274150 0026FDB0 41 82 00 34 */ beq lbl_80274184
/* 80274154 0026FDB4 40 80 00 14 */ bge lbl_80274168
/* 80274158 0026FDB8 7C 64 1B 78 */ mr r4, r3
/* 8027415C 0026FDBC 38 7F 00 00 */ addi r3, r31, 0
/* 80274160 0026FDC0 4C C6 31 82 */ crclr 6
/* 80274164 0026FDC4 4B D9 39 61 */ bl OSReport
lbl_80274168:
/* 80274168 0026FDC8 48 08 F8 8D */ bl NWC24SuspendScheduler
/* 8027416C 0026FDCC 2C 03 00 00 */ cmpwi r3, 0
/* 80274170 0026FDD0 40 80 00 14 */ bge lbl_80274184
/* 80274174 0026FDD4 7C 64 1B 78 */ mr r4, r3
/* 80274178 0026FDD8 38 7F 00 34 */ addi r3, r31, 0x34
/* 8027417C 0026FDDC 4C C6 31 82 */ crclr 6
/* 80274180 0026FDE0 4B D9 39 45 */ bl OSReport
lbl_80274184:
/* 80274184 0026FDE4 48 09 04 65 */ bl NWC24iSynchronizeRtcCounter
/* 80274188 0026FDE8 2C 03 00 00 */ cmpwi r3, 0
/* 8027418C 0026FDEC 41 82 00 14 */ beq lbl_802741A0
/* 80274190 0026FDF0 7C 64 1B 78 */ mr r4, r3
/* 80274194 0026FDF4 38 7F 00 68 */ addi r3, r31, 0x68
/* 80274198 0026FDF8 4C C6 31 82 */ crclr 6
/* 8027419C 0026FDFC 4B D9 39 29 */ bl OSReport
lbl_802741A0:
/* 802741A0 0026FE00 80 01 00 24 */ lwz r0, 0x24(r1)
/* 802741A4 0026FE04 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 802741A8 0026FE08 7C 08 03 A6 */ mtlr r0
/* 802741AC 0026FE0C 38 21 00 20 */ addi r1, r1, 0x20
/* 802741B0 0026FE10 4E 80 00 20 */ blr
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