summaryrefslogtreecommitdiff
path: root/asm/SDK/OS/OSStateFlags.s
blob: 16bc09f872eebf0e2d34905e6abfc52ec063c6e7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
.include "macros.inc"

.section .text, "ax"  # 0x80006980 - 0x803E1E60

.global __OSWriteStateFlags
__OSWriteStateFlags:
/* 80273F04 0026FB64  94 21 FF 60 */	stwu r1, -0xa0(r1)
/* 80273F08 0026FB68  7C 08 02 A6 */	mflr r0
/* 80273F0C 0026FB6C  7C 64 1B 78 */	mr r4, r3
/* 80273F10 0026FB70  38 A0 00 20 */	li r5, 0x20
/* 80273F14 0026FB74  90 01 00 A4 */	stw r0, 0xa4(r1)
/* 80273F18 0026FB78  93 E1 00 9C */	stw r31, 0x9c(r1)
/* 80273F1C 0026FB7C  93 C1 00 98 */	stw r30, 0x98(r1)
/* 80273F20 0026FB80  3F C0 80 51 */	lis r30, lbl_805154A0@ha
/* 80273F24 0026FB84  38 7E 54 A0 */	addi r3, r30, lbl_805154A0@l
/* 80273F28 0026FB88  4B D9 00 D9 */	bl memcpy
/* 80273F2C 0026FB8C  3B FE 54 A0 */	addi r31, r30, 0x54a0
/* 80273F30 0026FB90  3C 60 80 43 */	lis r3, lbl_80433D78@ha
/* 80273F34 0026FB94  80 DF 00 04 */	lwz r6, 4(r31)
/* 80273F38 0026FB98  38 63 3D 78 */	addi r3, r3, lbl_80433D78@l
/* 80273F3C 0026FB9C  80 1F 00 08 */	lwz r0, 8(r31)
/* 80273F40 0026FBA0  38 81 00 08 */	addi r4, r1, 8
/* 80273F44 0026FBA4  38 A0 00 02 */	li r5, 2
/* 80273F48 0026FBA8  7C C6 02 14 */	add r6, r6, r0
/* 80273F4C 0026FBAC  80 1F 00 0C */	lwz r0, 0xc(r31)
/* 80273F50 0026FBB0  7C C6 02 14 */	add r6, r6, r0
/* 80273F54 0026FBB4  80 1F 00 10 */	lwz r0, 0x10(r31)
/* 80273F58 0026FBB8  7C C6 02 14 */	add r6, r6, r0
/* 80273F5C 0026FBBC  80 1F 00 14 */	lwz r0, 0x14(r31)
/* 80273F60 0026FBC0  7C C6 02 14 */	add r6, r6, r0
/* 80273F64 0026FBC4  80 1F 00 18 */	lwz r0, 0x18(r31)
/* 80273F68 0026FBC8  7C C6 02 14 */	add r6, r6, r0
/* 80273F6C 0026FBCC  80 1F 00 1C */	lwz r0, 0x1c(r31)
/* 80273F70 0026FBD0  7C C6 02 14 */	add r6, r6, r0
/* 80273F74 0026FBD4  90 DE 54 A0 */	stw r6, 0x54a0(r30)
/* 80273F78 0026FBD8  48 07 44 91 */	bl NANDOpen
/* 80273F7C 0026FBDC  2C 03 00 00 */	cmpwi r3, 0
/* 80273F80 0026FBE0  40 82 00 44 */	bne lbl_80273FC4
/* 80273F84 0026FBE4  7F E4 FB 78 */	mr r4, r31
/* 80273F88 0026FBE8  38 61 00 08 */	addi r3, r1, 8
/* 80273F8C 0026FBEC  38 A0 00 20 */	li r5, 0x20
/* 80273F90 0026FBF0  48 07 3A 11 */	bl NANDWrite
/* 80273F94 0026FBF4  28 03 00 20 */	cmplwi r3, 0x20
/* 80273F98 0026FBF8  41 82 00 14 */	beq lbl_80273FAC
/* 80273F9C 0026FBFC  38 61 00 08 */	addi r3, r1, 8
/* 80273FA0 0026FC00  48 07 46 E9 */	bl NANDClose
/* 80273FA4 0026FC04  38 60 00 00 */	li r3, 0
/* 80273FA8 0026FC08  48 00 00 28 */	b lbl_80273FD0
lbl_80273FAC:
/* 80273FAC 0026FC0C  38 61 00 08 */	addi r3, r1, 8
/* 80273FB0 0026FC10  48 07 46 D9 */	bl NANDClose
/* 80273FB4 0026FC14  2C 03 00 00 */	cmpwi r3, 0
/* 80273FB8 0026FC18  41 82 00 14 */	beq lbl_80273FCC
/* 80273FBC 0026FC1C  38 60 00 00 */	li r3, 0
/* 80273FC0 0026FC20  48 00 00 10 */	b lbl_80273FD0
lbl_80273FC4:
/* 80273FC4 0026FC24  38 60 00 00 */	li r3, 0
/* 80273FC8 0026FC28  48 00 00 08 */	b lbl_80273FD0
lbl_80273FCC:
/* 80273FCC 0026FC2C  38 60 00 01 */	li r3, 1
lbl_80273FD0:
/* 80273FD0 0026FC30  80 01 00 A4 */	lwz r0, 0xa4(r1)
/* 80273FD4 0026FC34  83 E1 00 9C */	lwz r31, 0x9c(r1)
/* 80273FD8 0026FC38  83 C1 00 98 */	lwz r30, 0x98(r1)
/* 80273FDC 0026FC3C  7C 08 03 A6 */	mtlr r0
/* 80273FE0 0026FC40  38 21 00 A0 */	addi r1, r1, 0xa0
/* 80273FE4 0026FC44  4E 80 00 20 */	blr

.global __OSReadStateFlags
__OSReadStateFlags:
/* 80273FE8 0026FC48  94 21 FF 50 */	stwu r1, -0xb0(r1)
/* 80273FEC 0026FC4C  7C 08 02 A6 */	mflr r0
/* 80273FF0 0026FC50  38 A0 00 01 */	li r5, 1
/* 80273FF4 0026FC54  90 01 00 B4 */	stw r0, 0xb4(r1)
/* 80273FF8 0026FC58  38 81 00 08 */	addi r4, r1, 8
/* 80273FFC 0026FC5C  93 E1 00 AC */	stw r31, 0xac(r1)
/* 80274000 0026FC60  93 C1 00 A8 */	stw r30, 0xa8(r1)
/* 80274004 0026FC64  93 A1 00 A4 */	stw r29, 0xa4(r1)
/* 80274008 0026FC68  3F A0 80 43 */	lis r29, lbl_80433D78@ha
/* 8027400C 0026FC6C  93 81 00 A0 */	stw r28, 0xa0(r1)
/* 80274010 0026FC70  7C 7C 1B 78 */	mr r28, r3
/* 80274014 0026FC74  38 7D 3D 78 */	addi r3, r29, lbl_80433D78@l
/* 80274018 0026FC78  48 07 43 F1 */	bl NANDOpen
/* 8027401C 0026FC7C  2C 03 00 00 */	cmpwi r3, 0
/* 80274020 0026FC80  40 82 00 4C */	bne lbl_8027406C
/* 80274024 0026FC84  3F C0 80 51 */	lis r30, lbl_805154A0@ha
/* 80274028 0026FC88  38 61 00 08 */	addi r3, r1, 8
/* 8027402C 0026FC8C  38 9E 54 A0 */	addi r4, r30, lbl_805154A0@l
/* 80274030 0026FC90  38 A0 00 20 */	li r5, 0x20
/* 80274034 0026FC94  48 07 38 8D */	bl NANDRead
/* 80274038 0026FC98  7C 7F 1B 78 */	mr r31, r3
/* 8027403C 0026FC9C  38 61 00 08 */	addi r3, r1, 8
/* 80274040 0026FCA0  48 07 46 49 */	bl NANDClose
/* 80274044 0026FCA4  28 1F 00 20 */	cmplwi r31, 0x20
/* 80274048 0026FCA8  41 82 00 3C */	beq lbl_80274084
/* 8027404C 0026FCAC  38 7D 3D 78 */	addi r3, r29, 0x3d78
/* 80274050 0026FCB0  48 07 37 01 */	bl NANDDelete
/* 80274054 0026FCB4  7F 83 E3 78 */	mr r3, r28
/* 80274058 0026FCB8  38 80 00 00 */	li r4, 0
/* 8027405C 0026FCBC  38 A0 00 20 */	li r5, 0x20
/* 80274060 0026FCC0  4B D9 00 A5 */	bl memset
/* 80274064 0026FCC4  38 60 00 00 */	li r3, 0
/* 80274068 0026FCC8  48 00 00 88 */	b lbl_802740F0
lbl_8027406C:
/* 8027406C 0026FCCC  7F 83 E3 78 */	mr r3, r28
/* 80274070 0026FCD0  38 80 00 00 */	li r4, 0
/* 80274074 0026FCD4  38 A0 00 20 */	li r5, 0x20
/* 80274078 0026FCD8  4B D9 00 8D */	bl memset
/* 8027407C 0026FCDC  38 60 00 00 */	li r3, 0
/* 80274080 0026FCE0  48 00 00 70 */	b lbl_802740F0
lbl_80274084:
/* 80274084 0026FCE4  38 9E 54 A0 */	addi r4, r30, 0x54a0
/* 80274088 0026FCE8  80 1E 54 A0 */	lwz r0, 0x54a0(r30)
/* 8027408C 0026FCEC  80 A4 00 04 */	lwz r5, 4(r4)
/* 80274090 0026FCF0  80 64 00 08 */	lwz r3, 8(r4)
/* 80274094 0026FCF4  7C A5 1A 14 */	add r5, r5, r3
/* 80274098 0026FCF8  80 64 00 0C */	lwz r3, 0xc(r4)
/* 8027409C 0026FCFC  7C A5 1A 14 */	add r5, r5, r3
/* 802740A0 0026FD00  80 64 00 10 */	lwz r3, 0x10(r4)
/* 802740A4 0026FD04  7C A5 1A 14 */	add r5, r5, r3
/* 802740A8 0026FD08  80 64 00 14 */	lwz r3, 0x14(r4)
/* 802740AC 0026FD0C  7C A5 1A 14 */	add r5, r5, r3
/* 802740B0 0026FD10  80 64 00 18 */	lwz r3, 0x18(r4)
/* 802740B4 0026FD14  7C A5 1A 14 */	add r5, r5, r3
/* 802740B8 0026FD18  80 64 00 1C */	lwz r3, 0x1c(r4)
/* 802740BC 0026FD1C  7C A5 1A 14 */	add r5, r5, r3
/* 802740C0 0026FD20  7C 00 28 40 */	cmplw r0, r5
/* 802740C4 0026FD24  41 82 00 1C */	beq lbl_802740E0
/* 802740C8 0026FD28  7F 83 E3 78 */	mr r3, r28
/* 802740CC 0026FD2C  38 80 00 00 */	li r4, 0
/* 802740D0 0026FD30  38 A0 00 20 */	li r5, 0x20
/* 802740D4 0026FD34  4B D9 00 31 */	bl memset
/* 802740D8 0026FD38  38 60 00 00 */	li r3, 0
/* 802740DC 0026FD3C  48 00 00 14 */	b lbl_802740F0
lbl_802740E0:
/* 802740E0 0026FD40  7F 83 E3 78 */	mr r3, r28
/* 802740E4 0026FD44  38 A0 00 20 */	li r5, 0x20
/* 802740E8 0026FD48  4B D8 FF 19 */	bl memcpy
/* 802740EC 0026FD4C  38 60 00 01 */	li r3, 1
lbl_802740F0:
/* 802740F0 0026FD50  80 01 00 B4 */	lwz r0, 0xb4(r1)
/* 802740F4 0026FD54  83 E1 00 AC */	lwz r31, 0xac(r1)
/* 802740F8 0026FD58  83 C1 00 A8 */	lwz r30, 0xa8(r1)
/* 802740FC 0026FD5C  83 A1 00 A4 */	lwz r29, 0xa4(r1)
/* 80274100 0026FD60  83 81 00 A0 */	lwz r28, 0xa0(r1)
/* 80274104 0026FD64  7C 08 03 A6 */	mtlr r0
/* 80274108 0026FD68  38 21 00 B0 */	addi r1, r1, 0xb0
/* 8027410C 0026FD6C  4E 80 00 20 */	blr