diff options
author | YamaArashi <shadow962@live.com> | 2016-06-09 01:32:19 -0700 |
---|---|---|
committer | YamaArashi <shadow962@live.com> | 2016-06-09 01:32:19 -0700 |
commit | a37de9f76364f3ed95c49ca1417ee01cd4d617b1 (patch) | |
tree | c8039e8fc47394076faad856abb859c5bb39fcf3 /include | |
parent | 54c60e33cb69514228f4bfb3d65b2668c824e449 (diff) |
double-colon global labels in preproc; misc other stuff
Diffstat (limited to 'include')
-rw-r--r-- | include/gba/defines.h | 26 | ||||
-rw-r--r-- | include/gba/io_reg.h | 37 |
2 files changed, 59 insertions, 4 deletions
diff --git a/include/gba/defines.h b/include/gba/defines.h index 5b83d3d03..4fd54975d 100644 --- a/include/gba/defines.h +++ b/include/gba/defines.h @@ -34,15 +34,33 @@ #define INTR_CHECK (*(u16 *)0x3007FF8) #define INTR_VECTOR (*(void **)0x3007FFC) -#define BG_VRAM 0x6000000 +#define PLTT 0x5000000 +#define PLTT_SIZE 0x400 +#define BG_PLTT PLTT +#define BG_PLTT_SIZE 0x200 + +#define OBJ_PLTT (PLTT + 0x200) +#define OBJ_PLTT_SIZE 0x200 + +#define VRAM 0x6000000 +#define VRAM_SIZE 0x18000 + +#define BG_VRAM VRAM +#define BG_VRAM_SIZE 0x10000 #define BG_CHAR_ADDR(n) (BG_VRAM + (0x4000 * (n))) #define BG_SCREEN_ADDR(n) (BG_VRAM + (0x800 * (n))) -#define OBJ_VRAM0 0x6010000 // when BG is in tiled mode -#define OBJ_VRAM1 0x6014000 // when BG is in bitmap mode +// text-mode BG +#define OBJ_VRAM0 (VRAM + 0x10000) +#define OBJ_VRAM0_SIZE 0x8000 + +// bitmap-mode BG +#define OBJ_VRAM1 (VRAM + 0x14000) +#define OBJ_VRAM1_SIZE 0x4000 -#define OAM 0x7000000 +#define OAM 0x7000000 +#define OAM_SIZE 0x400 #define DISPLAY_WIDTH 240 #define DISPLAY_HEIGHT 160 diff --git a/include/gba/io_reg.h b/include/gba/io_reg.h index 3c30c494e..0be92fa60 100644 --- a/include/gba/io_reg.h +++ b/include/gba/io_reg.h @@ -24,16 +24,20 @@ #define REG_OFFSET_BG2PB 0x22 #define REG_OFFSET_BG2PC 0x24 #define REG_OFFSET_BG2PD 0x26 +#define REG_OFFSET_BG2X 0x28 #define REG_OFFSET_BG2X_L 0x28 #define REG_OFFSET_BG2X_H 0x2a +#define REG_OFFSET_BG2Y 0x2c #define REG_OFFSET_BG2Y_L 0x2c #define REG_OFFSET_BG2Y_H 0x2e #define REG_OFFSET_BG3PA 0x30 #define REG_OFFSET_BG3PB 0x32 #define REG_OFFSET_BG3PC 0x34 #define REG_OFFSET_BG3PD 0x36 +#define REG_OFFSET_BG3X 0x38 #define REG_OFFSET_BG3X_L 0x38 #define REG_OFFSET_BG3X_H 0x3a +#define REG_OFFSET_BG3Y 0x3c #define REG_OFFSET_BG3Y_L 0x3c #define REG_OFFSET_BG3Y_H 0x3e #define REG_OFFSET_WIN0H 0x40 @@ -197,16 +201,20 @@ #define REG_ADDR_BG2PB (REG_BASE + REG_OFFSET_BG2PB) #define REG_ADDR_BG2PC (REG_BASE + REG_OFFSET_BG2PC) #define REG_ADDR_BG2PD (REG_BASE + REG_OFFSET_BG2PD) +#define REG_ADDR_BG2X (REG_BASE + REG_OFFSET_BG2X) #define REG_ADDR_BG2X_L (REG_BASE + REG_OFFSET_BG2X_L) #define REG_ADDR_BG2X_H (REG_BASE + REG_OFFSET_BG2X_H) +#define REG_ADDR_BG2Y (REG_BASE + REG_OFFSET_BG2Y) #define REG_ADDR_BG2Y_L (REG_BASE + REG_OFFSET_BG2Y_L) #define REG_ADDR_BG2Y_H (REG_BASE + REG_OFFSET_BG2Y_H) #define REG_ADDR_BG3PA (REG_BASE + REG_OFFSET_BG3PA) #define REG_ADDR_BG3PB (REG_BASE + REG_OFFSET_BG3PB) #define REG_ADDR_BG3PC (REG_BASE + REG_OFFSET_BG3PC) #define REG_ADDR_BG3PD (REG_BASE + REG_OFFSET_BG3PD) +#define REG_ADDR_BG3X (REG_BASE + REG_OFFSET_BG3X) #define REG_ADDR_BG3X_L (REG_BASE + REG_OFFSET_BG3X_L) #define REG_ADDR_BG3X_H (REG_BASE + REG_OFFSET_BG3X_H) +#define REG_ADDR_BG3Y (REG_BASE + REG_OFFSET_BG3Y) #define REG_ADDR_BG3Y_L (REG_BASE + REG_OFFSET_BG3Y_L) #define REG_ADDR_BG3Y_H (REG_BASE + REG_OFFSET_BG3Y_H) #define REG_ADDR_WIN0H (REG_BASE + REG_OFFSET_WIN0H) @@ -350,7 +358,36 @@ #define REG_BG2VOFS (*(vu16 *)REG_ADDR_BG2VOFS) #define REG_BG3HOFS (*(vu16 *)REG_ADDR_BG3HOFS) #define REG_BG3VOFS (*(vu16 *)REG_ADDR_BG3VOFS) +#define REG_BG2PA (*(vu16 *)REG_ADDR_BG2PA) +#define REG_BG2PB (*(vu16 *)REG_ADDR_BG2PB) +#define REG_BG2PC (*(vu16 *)REG_ADDR_BG2PC) +#define REG_BG2PD (*(vu16 *)REG_ADDR_BG2PD) +#define REG_BG2X (*(vu32 *)REG_ADDR_BG2X) +#define REG_BG2X_L (*(vu16 *)REG_ADDR_BG2X_L) +#define REG_BG2X_H (*(vu16 *)REG_ADDR_BG2X_H) +#define REG_BG2Y (*(vu32 *)REG_ADDR_BG2Y) +#define REG_BG2Y_L (*(vu16 *)REG_ADDR_BG2Y_L) +#define REG_BG2Y_H (*(vu16 *)REG_ADDR_BG2Y_H) +#define REG_BG3PA (*(vu16 *)REG_ADDR_BG3PA) +#define REG_BG3PB (*(vu16 *)REG_ADDR_BG3PB) +#define REG_BG3PC (*(vu16 *)REG_ADDR_BG3PC) +#define REG_BG3PD (*(vu16 *)REG_ADDR_BG3PD) +#define REG_BG3X (*(vu32 *)REG_ADDR_BG3X) +#define REG_BG3X_L (*(vu16 *)REG_ADDR_BG3X_L) +#define REG_BG3X_H (*(vu16 *)REG_ADDR_BG3X_H) +#define REG_BG3Y (*(vu32 *)REG_ADDR_BG3Y) +#define REG_BG3Y_L (*(vu16 *)REG_ADDR_BG3Y_L) +#define REG_BG3Y_H (*(vu16 *)REG_ADDR_BG3Y_H) +#define REG_WIN0H (*(vu16 *)REG_ADDR_WIN0H) +#define REG_WIN1H (*(vu16 *)REG_ADDR_WIN1H) +#define REG_WIN0V (*(vu16 *)REG_ADDR_WIN0V) +#define REG_WIN1V (*(vu16 *)REG_ADDR_WIN1V) +#define REG_WININ (*(vu16 *)REG_ADDR_WININ) +#define REG_WINOUT (*(vu16 *)REG_ADDR_WINOUT) +#define REG_MOSAIC (*(vu16 *)REG_ADDR_MOSAIC) +#define REG_BLDCNT (*(vu16 *)REG_ADDR_BLDCNT) #define REG_BLDALPHA (*(vu16 *)REG_ADDR_BLDALPHA) +#define REG_BLDY (*(vu16 *)REG_ADDR_BLDY) #define REG_SOUND1CNT_L (*(vu16 *)REG_ADDR_SOUND1CNT_L) #define REG_NR10 (*(vu8 *)REG_ADDR_NR10) |