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authorRaúl Peñacoba <raul.mikaop.zelda@gmail.com>2017-08-04 13:21:18 +0200
committerRaúl Peñacoba <raul.mikaop.zelda@gmail.com>2017-08-04 13:21:18 +0200
commitb1f4bed3d16b251a2f9075b54da11652b22aa7fe (patch)
tree2fb01d5af045b20c895a67c11d6c053379c0d1a3 /src
parent00116b858033312ee9f00d85d72c5a9d421faf14 (diff)
sub_80EC4A0()
Diffstat (limited to 'src')
-rw-r--r--src/pokenav_before.c365
1 files changed, 365 insertions, 0 deletions
diff --git a/src/pokenav_before.c b/src/pokenav_before.c
index d0efd2bbd..4545da2c3 100644
--- a/src/pokenav_before.c
+++ b/src/pokenav_before.c
@@ -608,4 +608,369 @@ void sub_80EC268() {
ewram0.var304++;
return;
}
+#else
+__attribute__((naked))
+void sub_80EC268() {
+ asm_unified("push {r4-r6,lr}\n\
+ ldr r4, _080EC290 @ =0x02000000\n\
+ movs r0, 0xC1\n\
+ lsls r0, 2\n\
+ adds r6, r4, r0\n\
+ ldrh r0, [r6]\n\
+ cmp r0, 0x3\n\
+ bne _080EC27A\n\
+ b _080EC3BE\n\
+_080EC27A:\n\
+ cmp r0, 0x3\n\
+ bgt _080EC294\n\
+ cmp r0, 0x1\n\
+ bne _080EC284\n\
+ b _080EC3A2\n\
+_080EC284:\n\
+ cmp r0, 0x1\n\
+ ble _080EC28A\n\
+ b _080EC3B4\n\
+_080EC28A:\n\
+ cmp r0, 0\n\
+ beq _080EC2AE\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC290: .4byte 0x02000000\n\
+_080EC294:\n\
+ cmp r0, 0x6\n\
+ bne _080EC29A\n\
+ b _080EC414\n\
+_080EC29A:\n\
+ cmp r0, 0x6\n\
+ bgt _080EC2A6\n\
+ cmp r0, 0x4\n\
+ bne _080EC2A4\n\
+ b _080EC3DC\n\
+_080EC2A4:\n\
+ b _080EC492\n\
+_080EC2A6:\n\
+ cmp r0, 0xFF\n\
+ bne _080EC2AC\n\
+ b _080EC44C\n\
+_080EC2AC:\n\
+ b _080EC492\n\
+_080EC2AE:\n\
+ bl sub_80EEC10\n\
+ lsls r0, 24\n\
+ cmp r0, 0\n\
+ beq _080EC2D4\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r1, _080EC2D0 @ =0x00006dad\n\
+ adds r0, r4, r1\n\
+ ldrb r1, [r0]\n\
+ movs r0, 0\n\
+ bl sub_80EF428\n\
+ bl sub_80EED9C\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC2D0: .4byte 0x00006dad\n\
+_080EC2D4:\n\
+ ldr r0, _080EC310 @ =gMain\n\
+ ldrh r1, [r0, 0x2E]\n\
+ movs r2, 0x1\n\
+ adds r0, r2, 0\n\
+ ands r0, r1\n\
+ cmp r0, 0\n\
+ beq _080EC394\n\
+ ldr r2, _080EC314 @ =0x00006dad\n\
+ adds r0, r4, r2\n\
+ ldrb r1, [r0]\n\
+ adds r2, 0x2F\n\
+ adds r0, r4, r2\n\
+ strb r1, [r0]\n\
+ ldrb r0, [r0]\n\
+ lsls r0, 24\n\
+ asrs r0, 24\n\
+ subs r2, 0x2A\n\
+ adds r1, r4, r2\n\
+ adds r0, r1\n\
+ ldrb r0, [r0]\n\
+ subs r0, 0x1\n\
+ cmp r0, 0x4\n\
+ bls _080EC304\n\
+ b _080EC492\n\
+_080EC304:\n\
+ lsls r0, 2\n\
+ ldr r1, _080EC318 @ =_080EC31C\n\
+ adds r0, r1\n\
+ ldr r0, [r0]\n\
+ mov pc, r0\n\
+ .align 2, 0\n\
+_080EC310: .4byte gMain\n\
+_080EC314: .4byte 0x00006dad\n\
+_080EC318: .4byte _080EC31C\n\
+ .align 2, 0\n\
+_080EC31C:\n\
+ .4byte _080EC330\n\
+ .4byte _080EC344\n\
+ .4byte _080EC380\n\
+ .4byte _080EC36C\n\
+ .4byte _080EC358\n\
+_080EC330:\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r0, _080EC340 @ =sub_80EC4A0\n\
+ bl sub_80EBDBC\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC340: .4byte sub_80EC4A0\n\
+_080EC344:\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r0, _080EC354 @ =sub_80EC81C\n\
+ bl sub_80EBDBC\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC354: .4byte sub_80EC81C\n\
+_080EC358:\n\
+ ldr r0, _080EC368 @ =0x02000000\n\
+ movs r1, 0xC1\n\
+ lsls r1, 2\n\
+ adds r0, r1\n\
+ movs r1, 0x1\n\
+ strh r1, [r0]\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC368: .4byte 0x02000000\n\
+_080EC36C:\n\
+ ldr r0, _080EC37C @ =0x02000000\n\
+ movs r2, 0xC1\n\
+ lsls r2, 2\n\
+ adds r0, r2\n\
+ movs r1, 0x2\n\
+ strh r1, [r0]\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC37C: .4byte 0x02000000\n\
+_080EC380:\n\
+ ldr r0, _080EC390 @ =0x02000000\n\
+ movs r1, 0xC1\n\
+ lsls r1, 2\n\
+ adds r0, r1\n\
+ movs r1, 0x6\n\
+ strh r1, [r0]\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC390: .4byte 0x02000000\n\
+_080EC394:\n\
+ movs r0, 0x2\n\
+ ands r0, r1\n\
+ cmp r0, 0\n\
+ bne _080EC39E\n\
+ b _080EC492\n\
+_080EC39E:\n\
+ strh r2, [r6]\n\
+ b _080EC492\n\
+_080EC3A2:\n\
+ bl sub_80F208C\n\
+ ldr r0, _080EC3B0 @ =sub_80EE96C\n\
+ bl sub_80EBDBC\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC3B0: .4byte sub_80EE96C\n\
+_080EC3B4:\n\
+ bl sub_80F6208\n\
+ ldrh r0, [r6]\n\
+ adds r0, 0x1\n\
+ strh r0, [r6]\n\
+_080EC3BE:\n\
+ bl sub_80F6250\n\
+ lsls r0, 24\n\
+ cmp r0, 0\n\
+ bne _080EC492\n\
+ ldr r1, _080EC3D8 @ =0x02000000\n\
+ movs r2, 0xC1\n\
+ lsls r2, 2\n\
+ adds r1, r2\n\
+ ldrh r0, [r1]\n\
+ adds r0, 0x1\n\
+ strh r0, [r1]\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC3D8: .4byte 0x02000000\n\
+_080EC3DC:\n\
+ bl sub_8055870\n\
+ cmp r0, 0\n\
+ bne _080EC492\n\
+ ldr r1, _080EC400 @ =0x00008fe8\n\
+ adds r0, r4, r1\n\
+ ldrb r0, [r0]\n\
+ lsls r0, 24\n\
+ asrs r0, 24\n\
+ cmp r0, 0\n\
+ beq _080EC408\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r0, _080EC404 @ =sub_80EDB88\n\
+ bl sub_80EBDBC\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC400: .4byte 0x00008fe8\n\
+_080EC404: .4byte sub_80EDB88\n\
+_080EC408:\n\
+ movs r0, 0x20\n\
+ bl PlaySE\n\
+ movs r0, 0\n\
+ movs r1, 0x5\n\
+ b _080EC442\n\
+_080EC414:\n\
+ bl sub_80F6C20\n\
+ ldr r2, _080EC430 @ =0x0000d158\n\
+ adds r0, r4, r2\n\
+ ldrh r0, [r0]\n\
+ cmp r0, 0\n\
+ beq _080EC438\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r0, _080EC434 @ =sub_80EE3D8\n\
+ bl sub_80EBDBC\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC430: .4byte 0x0000d158\n\
+_080EC434: .4byte sub_80EE3D8\n\
+_080EC438:\n\
+ movs r0, 0x20\n\
+ bl PlaySE\n\
+ movs r0, 0\n\
+ movs r1, 0x6\n\
+_080EC442:\n\
+ bl sub_80EF428\n\
+ movs r0, 0xFF\n\
+ strh r0, [r6]\n\
+ b _080EC492\n\
+_080EC44C:\n\
+ bl sub_80EEC10\n\
+ lsls r0, 24\n\
+ lsrs r5, r0, 24\n\
+ cmp r5, 0\n\
+ beq _080EC478\n\
+ movs r0, 0x5\n\
+ bl PlaySE\n\
+ ldr r1, _080EC474 @ =0x00006dad\n\
+ adds r0, r4, r1\n\
+ ldrb r1, [r0]\n\
+ movs r0, 0\n\
+ bl sub_80EF428\n\
+ movs r0, 0\n\
+ strh r0, [r6]\n\
+ bl sub_80EED9C\n\
+ b _080EC492\n\
+ .align 2, 0\n\
+_080EC474: .4byte 0x00006dad\n\
+_080EC478:\n\
+ ldr r0, _080EC498 @ =gMain\n\
+ ldrh r1, [r0, 0x2E]\n\
+ movs r0, 0x3\n\
+ ands r0, r1\n\
+ cmp r0, 0\n\
+ beq _080EC492\n\
+ ldr r2, _080EC49C @ =0x00006dad\n\
+ adds r0, r4, r2\n\
+ ldrb r1, [r0]\n\
+ movs r0, 0\n\
+ bl sub_80EF428\n\
+ strh r5, [r6]\n\
+_080EC492:\n\
+ pop {r4-r6}\n\
+ pop {r0}\n\
+ bx r0\n\
+ .align 2, 0\n\
+_080EC498: .4byte gMain\n\
+_080EC49C: .4byte 0x00006dad\n\
+ ");
+}
#endif
+
+void sub_80F1E84();
+bool8 sub_80F1F10();
+void sub_80EEFBC(u32);
+bool8 sub_80EEF34();
+void sub_80EED0C();
+void sub_80F2620();
+void sub_80EF814();
+void sub_80EF840();
+bool8 sub_80EF874();
+void sub_80F2DD8();
+void sub_80EC67C();
+
+void sub_80EC4A0() {
+ u32 var1;
+ u32 var2;
+ switch (ewram0.var304) {
+ case 0:
+ sub_80F1E84();
+ sub_80F2D04(0);
+ ewram0.var304++;
+ break;
+ case 1:
+ if (!sub_80F1F10()) {
+ if (gSaveBlock2.regionMapZoom) {
+ var1 = 0x7;
+ }
+ else var1 = 0x8;
+ sub_80EEFBC(var1);
+ ewram0.var304++;
+ }
+ break;
+ case 2:
+ if (!(var2 = sub_80EEF34())) {
+ BeginNormalPaletteFade(ewram0.var308, -1, 0x0, 0x10, var2);
+ ewram0.var304++;
+ }
+ break;
+ case 3:
+ if (gPaletteFade.active) return;
+ SetVBlankCallback(NULL);
+ sub_80EED0C();
+ ewram0.var304++;
+ break;
+ case 4:
+ sub_80F2620();
+ ewram0.var304++;
+ break;
+ case 5:
+ sub_80EF814();
+ ewram0.var304++;
+ break;
+ case 6:
+ sub_80EF840();
+ ewram0.var304++;
+ case 7:
+ if (sub_80EF874()) return;
+ ewram0.var304++;
+ break;
+ case 8:
+ sub_80F2C80(0x4);
+ ewram0.var304++;
+ case 9:
+ if (sub_80F2CBC(0x4)) return;
+ ewram0.var304++;
+ break;
+ case 0xA:
+ sub_80F2DD8();
+ SetVBlankCallback(&sub_80EBD30);
+ ewram0.var304++;
+ break;
+ case 0xB:
+ if (sub_8055870()) return;
+ ewram0.var304++;
+ break;
+ case 0xC:
+ BeginNormalPaletteFade(ewram0.var308, -1, 0x10, 0, 0);
+ ewram0.var304++;
+ break;
+ case 0xD:
+ sub_80EED2C(0x1);
+ ewram0.var304++;
+ break;
+ case 0xE:
+ if (gPaletteFade.active) return;
+ sub_80EBDBC(&sub_80EC67C);
+ }
+}