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AgeCommit message (Expand)Author
2021-05-21ei + ret -> retiRangi
2021-04-23Optimize 'sub hl, de'Rangi
2021-03-24VariantsRangi
2021-03-24hlRangi
2021-03-24no_carry_3Rangi
2021-03-24Add or subtract the carry flag from a 16-bit registerRangi
2021-03-24NoteRangi
2021-03-24Add or subtract the carry flag from a register besides `a`Rangi
2021-03-16ld [hl], FOO / inc|dec hl -> ld a, FOO / ld [hli|hld], aRangi
2021-03-12Conditional returnRangi
2021-02-22jp ccRangi
2021-02-22call ccRangi
2021-02-16hl+=aRangi
2021-02-12...Rangi
2020-11-29correct cyclesRangi
2020-11-29bitnessRangi
2020-11-29hl = aRangi
2020-11-29ax6's trickRangi
2020-11-29hl = a + {0-255}Rangi
2020-11-29commentsRangi
2020-11-26three 5 or 6 cycles that are always 5 cyclesDamian Yerrick
2020-11-26GF's bad exampleRangi
2020-11-26save 2 bytes and 9 cycles off size over speed bit reversalDamian Yerrick
2020-11-26Lookup tableRangi
2020-11-26FormattingRangi
2020-11-26Don'tRangi
2020-11-26Not identicalRangi
2020-11-26Remove less efficient versionJL2210
2020-11-26Added formatting to the bit reverse snippet.nitro2k01
2020-11-26Added version of the bit reverse code adapter for GB.nitro2k01
2020-11-25Omit ld b, 0Rangi
2020-11-25Optimize hl|bc|de = Foo + aRangi
2020-11-25http://www.retroprogramming.com/2014/01/fast-z80-bit-reversal.htmlRangi
2020-11-24no_carryRangi
2020-11-24carry tableRangi
2020-10-06NameRangi
2020-10-06NameRangi
2020-10-06jr timingRangi
2020-10-06Fix jrRangi
2020-08-29asmRangi
2020-08-29swap aRangi
2020-08-29asmRangi
2020-08-29hl = a * 16Rangi
2020-08-26carryRangi
2020-08-22`jr nc, .ok / inc|dec a / .ok` == `ccf / adc|sbc 0`Rangi
2020-08-22inc/dec a depending on carryRangi
2020-08-21bit 7, aRangi
2020-08-21rlcaRangi
2020-06-25'or 0' , 'and $ff' --> 'and a'Rangi
2020-06-22ld hl, Foo / ld a, [hli] / ld l, [hl] / ld h, aRangi
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