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-rw-r--r--arm9/lib/src/FX_cp.c48
-rw-r--r--arm9/lib/src/FX_vec.c44
2 files changed, 46 insertions, 46 deletions
diff --git a/arm9/lib/src/FX_cp.c b/arm9/lib/src/FX_cp.c
index 2ca9d720..08443dc8 100644
--- a/arm9/lib/src/FX_cp.c
+++ b/arm9/lib/src/FX_cp.c
@@ -16,8 +16,8 @@ ARM_FUNC fx32 FX_Inv(fx32 x){
ARM_FUNC fx32 FX_Sqrt(fx32 x){
if (x > 0)
{
- SETREG16(HW_REG_SQRTCNT, 0x1);
- SETREG64(HW_REG_SQRT_PARAM, (fx64)x << 32);
+ reg_CP_SQRTCNT = 0x1;
+ reg_CP_SQRT_PARAM = (fx64)x << 32;
return FX_GetSqrtResult();
}
else
@@ -27,44 +27,44 @@ ARM_FUNC fx32 FX_Sqrt(fx32 x){
}
ARM_FUNC fx64c FX_GetDivResultFx64c(){
- while (READREG16(HW_REG_DIVCNT) & 0x8000);
- return READREG64(HW_REG_DIV_RESULT);
+ while (reg_CP_DIVCNT & 0x8000);
+ return reg_CP_DIV_RESULT;
}
ARM_FUNC fx32 FX_GetDivResult(){
- while (READREG16(HW_REG_DIVCNT) & 0x8000);
- return (READREG64(HW_REG_DIV_RESULT) + (1 << (0x14 - 1))) >> 0x14;
+ while (reg_CP_DIVCNT & 0x8000);
+ return (reg_CP_DIV_RESULT + (1 << (0x14 - 1))) >> 0x14;
}
ARM_FUNC void FX_InvAsync(fx32 x){
- SETREG16(HW_REG_DIVCNT, 0x1);
- SETREG64(HW_REG_DIV_NUMER, (fx64)0x00001000 << 32);
- SETREG64(HW_REG_DIV_DENOM, (u32)x);
+ reg_CP_DIVCNT = 0x1;
+ reg_CP_DIV_NUMER = (fx64)0x00001000 << 32;
+ reg_CP_DIV_DENOM = (u32)x;
}
ARM_FUNC fx32 FX_GetSqrtResult(){
- while (READREG16(HW_REG_SQRTCNT) & 0x8000);
- return (READREG32(HW_REG_SQRT_RESULT) + (1 << (0xA - 1))) >> 0xA;
+ while (reg_CP_SQRTCNT & 0x8000);
+ return (reg_CP_SQRT_RESULT + (1 << (0xA - 1))) >> 0xA;
}
ARM_FUNC void FX_DivAsync(fx32 numerator, fx32 denominator){
- SETREG16(HW_REG_DIVCNT, 0x1);
- SETREG64(HW_REG_DIV_NUMER, (fx64)numerator << 32);
- SETREG64(HW_REG_DIV_DENOM, (u32)denominator);
+ reg_CP_DIVCNT = 0x1;
+ reg_CP_DIV_NUMER = (fx64)numerator << 32;
+ reg_CP_DIV_DENOM = (u32)denominator;
}
ARM_FUNC fx32 FX_DivS32(fx32 numerator, fx32 denominator){
- SETREG16(HW_REG_DIVCNT, 0x0);
- SETREG32(HW_REG_DIV_NUMER, (u32)numerator); //32bit write for some reason
- SETREG64(HW_REG_DIV_DENOM, (u32)denominator);
- while (READREG16(HW_REG_DIVCNT) & 0x8000);
- return READREG32(HW_REG_DIV_RESULT);
+ reg_CP_DIVCNT = 0x0;
+ *(REGType32 *)REG_DIV_NUMER_ADDR = (u32)numerator; //32bit write for some reason
+ reg_CP_DIV_DENOM = (u32)denominator;
+ while (reg_CP_DIVCNT & 0x8000);
+ return *(REGType32 *)REG_DIV_RESULT_ADDR;
}
ARM_FUNC fx32 FX_ModS32(fx32 num, fx32 mod){
- SETREG16(HW_REG_DIVCNT, 0x0);
- SETREG32(HW_REG_DIV_NUMER, (u32)num); //32bit write for some reason
- SETREG64(HW_REG_DIV_DENOM, (u32)mod);
- while (READREG16(HW_REG_DIVCNT) & 0x8000);
- return READREG32(HW_REG_DIVREM_RESULT);
+ reg_CP_DIVCNT = 0x0;
+ *(REGType32 *)REG_DIV_NUMER_ADDR = (u32)num; //32bit write for some reason
+ reg_CP_DIV_DENOM = (u32)mod;
+ while (reg_CP_DIVCNT & 0x8000);
+ return *(REGType32 *)REG_DIVREM_RESULT_ADDR;
}
diff --git a/arm9/lib/src/FX_vec.c b/arm9/lib/src/FX_vec.c
index af36fe89..95805f33 100644
--- a/arm9/lib/src/FX_vec.c
+++ b/arm9/lib/src/FX_vec.c
@@ -55,10 +55,10 @@ ARM_FUNC fx32 VEC_Mag(struct Vecx32 *a){
fx64 l2 = (fx64)a->x * a->x;
l2 += (fx64)a->y * a->y;
l2 += (fx64)a->z * a->z;
- SETREG16(HW_REG_SQRTCNT, 0x1);
- SETREG64(HW_REG_SQRT_PARAM, l2 * 4);
- while (READREG16(HW_REG_SQRTCNT) & 0x8000); //wait for coprocessor to finish
- return ((fx32)READREG32(HW_REG_SQRT_RESULT) + 1) >> 1;
+ reg_CP_SQRTCNT = 0x1;
+ reg_CP_SQRT_PARAM = l2 * 4;
+ while (reg_CP_SQRTCNT & 0x8000); //wait for coprocessor to finish
+ return ((fx32)reg_CP_SQRT_RESULT + 1) >> 1;
}
ARM_FUNC void VEC_Normalize(struct Vecx32 *a, struct Vecx32 *dst){
@@ -66,15 +66,15 @@ ARM_FUNC void VEC_Normalize(struct Vecx32 *a, struct Vecx32 *dst){
l2 += (fx64)a->y * a->y;
l2 += (fx64)a->z * a->z;
//1/sqrt(l) is computed by calculating sqrt(l)*(1/l)
- SETREG16(HW_REG_DIVCNT, 0x2);
- SETREG64(HW_REG_DIV_NUMER, 0x0100000000000000);
- SETREG64(HW_REG_DIV_DENOM, l2);
- SETREG16(HW_REG_SQRTCNT, 0x1);
- SETREG64(HW_REG_SQRT_PARAM, l2 * 4);
- while (READREG16(HW_REG_SQRTCNT) & 0x8000); //wait for sqrt to finish
- fx32 sqrtresult = READREG32(HW_REG_SQRT_RESULT);
- while (READREG16(HW_REG_DIVCNT) & 0x8000); //wait for division to finish
- l2 = READREG64(HW_REG_DIV_RESULT);
+ reg_CP_DIVCNT = 0x2;
+ reg_CP_DIV_NUMER = 0x0100000000000000;
+ reg_CP_DIV_DENOM = l2;
+ reg_CP_SQRTCNT = 0x1;
+ reg_CP_SQRT_PARAM = l2 * 4;
+ while (reg_CP_SQRTCNT & 0x8000); //wait for sqrt to finish
+ fx32 sqrtresult = reg_CP_SQRT_RESULT;
+ while (reg_CP_DIVCNT & 0x8000); //wait for division to finish
+ l2 = reg_CP_DIV_RESULT;
l2 = sqrtresult * l2;
dst->x = (l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D;
dst->y = (l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D;
@@ -86,15 +86,15 @@ ARM_FUNC void VEC_Fx16Normalize(struct Vecx16 *a, struct Vecx16 *dst){
l2 += a->y * a->y;
l2 += a->z * a->z;
//1/sqrt(l) is computed by calculating sqrt(l)*(1/l)
- SETREG16(HW_REG_DIVCNT, 0x2);
- SETREG64(HW_REG_DIV_NUMER, 0x0100000000000000);
- SETREG64(HW_REG_DIV_DENOM, l2);
- SETREG16(HW_REG_SQRTCNT, 0x1);
- SETREG64(HW_REG_SQRT_PARAM, l2 * 4);
- while (READREG16(HW_REG_SQRTCNT) & 0x8000); //wait for sqrt to finish
- fx32 sqrtresult = READREG32(HW_REG_SQRT_RESULT);
- while (READREG16(HW_REG_DIVCNT) & 0x8000); //wait for division to finish
- l2 = READREG64(HW_REG_DIV_RESULT);
+ reg_CP_DIVCNT = 0x2;
+ reg_CP_DIV_NUMER = 0x0100000000000000;
+ reg_CP_DIV_DENOM = l2;
+ reg_CP_SQRTCNT = 0x1;
+ reg_CP_SQRT_PARAM = l2 * 4;
+ while (reg_CP_SQRTCNT & 0x8000); //wait for sqrt to finish
+ fx32 sqrtresult = reg_CP_SQRT_RESULT;
+ while (reg_CP_DIVCNT & 0x8000); //wait for division to finish
+ l2 = reg_CP_DIV_RESULT;
l2 = sqrtresult * l2;
dst->x = (l2 * a->x + (1LL << (0x2D - 1))) >> 0x2D;
dst->y = (l2 * a->y + (1LL << (0x2D - 1))) >> 0x2D;
generated by cgit v1.2.3 (git 2.25.1) at 2025-05-10 08:43:32 +0000