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| author | Seth Barberee <seth.barberee@gmail.com> | 2021-01-04 13:40:33 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-01-04 13:40:33 -0600 |
| commit | 469212f7ee42d04e3160d357ed1f088f12edd391 (patch) | |
| tree | ea53fd58f6dc9a42e38c3a7a78d6b7baa760a520 /asm/code_800D090.s | |
| parent | 87cd9885a9f8b38a76ab6add4a634e2a8a4837ee (diff) | |
CPU and GPU Reg Funcs Decomp (#16)
* decomp/doc cpu funcs and gpu reg funcs
* use Cpu32 macro funcs
* address review comments
* decomp SetBGOBJEnableFlags
Diffstat (limited to 'asm/code_800D090.s')
| -rw-r--r-- | asm/code_800D090.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/asm/code_800D090.s b/asm/code_800D090.s index a77aeab..3fd539a 100644 --- a/asm/code_800D090.s +++ b/asm/code_800D090.s @@ -7522,7 +7522,7 @@ sub_8010960: adds r1, r5 movs r2, 0 ldrsh r1, [r1, r2] - bl sub_800CCA0 + bl SetBG2RegOffsets ldr r1, [r6] adds r4, r1, r4 movs r2, 0 @@ -7530,7 +7530,7 @@ sub_8010960: adds r1, r5 movs r2, 0 ldrsh r1, [r1, r2] - bl sub_800CCAC + bl SetBG3RegOffsets movs r0, 0x1 bl sub_8010A88 bl sub_8010A00 @@ -9139,7 +9139,7 @@ sub_801169C: adds r1, r6 movs r3, 0 ldrsh r1, [r1, r3] - bl sub_800CCA0 + bl SetBG2RegOffsets ldr r1, [r5] adds r4, r1, r4 movs r2, 0 @@ -9147,7 +9147,7 @@ sub_801169C: adds r1, r6 movs r3, 0 ldrsh r1, [r1, r3] - bl sub_800CCAC + bl SetBG3RegOffsets bl sub_8010F28 bl sub_80111C4 lsls r0, 24 |